Computer Architecture short answer questions

1. In Reverse Polish notation, expression A*B+C*D is written as

AB*CD*+

2. SIMD represents an organization that .

includes many processing units under the supervision of a common control unit

3. Floating point representation is used to store

real integers

4. Suppose that a bus has 16 data lines and requires 4 cycles of 250 nsecs each to transfer data. The
bandwidth of this bus would be 2 Megabytes/sec. If the cycle time of the bus was reduced to 125 nsecs
and the number of cycles required for transfer stayed the same what would the bandwidth of the bus?
2 Megabytes/sec

5. Assembly language
uses alphabetic codes in place of binary numbers used in machine language

6. In computers, subtraction is generally carried out by

2’s complement

7. The amount of time required to read a block of data from a disk into memory is composed of seek
time, rotational latency, and transfer time. Rotational latency refers to
the time its takes for the platter to make a full rotation

8. What characteristic of RAM memory makes it not suitable for permanent storage?
it is volatile

9. Computers use addressing mode techniques for .

• giving programming versatility to the user by providing facilities as pointers to memory counters for loop
control
• to reduce no. of bits in the field of instruction
• specifying rules for modifying or interpreting address field of the instruction

10. The circuit used to store one bit of data is known as

Flip Flop

11. (2FAOC) 16 is equivalent to

(001011111010 0000 1100) 2

12. The average time required to reach a storage location in memory and obtain its contents is called the
access time

13. Which of the following is not a weighted code?

Excess 3-cod

14. The idea of cache memory is based

on the property of locality of reference
15. Which of the following is lowest in memory hierarchy?
Secondary memory

16. The addressing mode used in an instruction of the form ADD X Y, is

index

17. If memory access takes 20 ns with cache and 110 ns with out it, then the ratio (cache uses a 10 ns
memory) is
90%

18. In a memory-mapped I/O system, which of the following will not be there?
LDA

19. In a vectored interrupt.

the interrupting source supplies the branch information to the processor through an interrupt vector.

20. Von Neumann architecture is

SISD

21. The circuit used to store one bit of data is known as

Flip Flop

22. Cache memory acts between

CPU and RAM

23. Write Through technique is used in which memory for updating the data
Cache memory

24. Generally Dynamic RAM is used as main memory in a computer system as it

has higher speed

25. In signed-magnitude binary division, if the dividend is (11100) 2 and divisor is (10011) 2 then the
result is
(10100)

26. Virtual memory consists of

Static RAM

27. In a program using subroutine call instruction, it is necessary

Clear the instruction register

28. A Stack-organised Computer uses instruction of

Zero addressing

29. If the main memory is of 8K bytes and the cache memory is of 2K words. It uses associative
mapping. Then each word of cache memory shall be
16 bits

30 A-Flip Flop can be converted into T-Flip Flop by using additional logic circuit
n TQD =?
31. Logic X-OR operation of (4ACO) H & (B53F) H results
FFFF

32. When CPU is executing a Program that is part of the Operating System, it is said to be in
System mode

33. An n-bit microprocessor has

n-bit instruction register

34. Cache memory works on the principle of

Locality of reference

35. The main memory in a Personal Computer (PC) is made of

cache memory and static RAM

36. In computers, subtraction is carried out generally by

2’s complement method

37. PSW is saved in stack when there is a

interrupt recognised

38. The multiplicand register & multiplier register of a hardware circuit implementing booth’s
algorithm have (11101) & (1100). The result shall be
(812) 10

39. The circuit converting binary data in to decimal is

Code converter

40. A three input NOR gate gives logic high output only when
all input are high

41. n bits in operation code imply that there are possible distinct operators
2n

42. register keeps tracks of the instructions stored in program stored in memory.
PC (Program Counter)

43. Memory unit accessed by content is called

Associative Memory

44. ‘Aging registers’ are

Counters which indicate how long ago their associated pages have been referenced.

45. The instruction ‘ORG O’ is a

Pseudo instruction.

46. Translation from symbolic program into Binary is done in

Two passes.

47 A floating point number that has a O in the MSB of mantissa is said to have
Underflow
48. The BSA instruction is
Branch and save return address

49. State whether True or False.

(i) Arithmetic operations with fixed point numbers take longer time for execution as compared to with floating
point numbers.
Ans: True.
(ii) An arithmetic shift left multiplies a signed binary number by 2. Ans: False.

50. Logic gates with a set of input and outputs is arrangement of

Combinational circuit

51. MIMD stands for

Multiple instruction multiple data

52 A k-bit field can specify any one of

2k registers

53 The time interval between adjacent bits is called the

Bit-time

54 A group of bits that tell the computer to perform a specific operation is known as
Instruction code

55 The load instruction is mostly used to designate a transfer from memory to a processor register
known as
Accumulator

56 The communication between the components in a microcomputer takes place via the address and
Data bus

57 An instruction pipeline can be implemented by means of

FIFO buffer

58 Data input command is just the opposite of a

Data output

59 A microprogram sequencer
generates the address of next micro instruction to be executed.

60 . A binary digit is called a

Bit

61 A flip-flop is a binary cell capable of storing information of

One bit

62 The operation executed on data stored in registers is called

Micro-operation
63 MRI indicates
Memory Reference Instruction.

64 Self-contained sequence of instructions that performs a given computational task is called

Function

65 Microinstructions are stored in control memory groups, with each group specifying a
Routine

66 An interface that provides a method for transferring binary information between internal storage
and external devices is called
I/O interface

67 Status bit is also called

Flag bit

68 An address in main memory is called

Physical address

69 If the value V(x) of the target operand is contained in the address field itself, the addressing mode is
direct

70 can be represented in a signed magnitude format and in a 1’s complement format as

111011 & 100100

71 The instructions which copy information from one location to another either in the processor’s
internal register set or in the external main memory are called
Data transfer instructions.

72 A device/circuit that goes through a predefined sequence of states upon the application of input
pulses is called
counter

73. The performance of cache memory is frequently measured in terms of a quantity called
Latency ratio

74. The information available in a state table may be represented graphically in a

state diagram

75 Content of the program counter is added to the address part of the instruction in order to obtain the
effective address is called.
relative address mode

76 An interface that provides I/O transfer of data directly to and form the memory unit and peripheral
is termed as
DMA.

77 The 2s compliment form (Use 6 bit word) of the number 1010 is

110110

78 A register capable of shifting its binary information either to the right or the left is called a
shift register

79 What is the content of Stack Pointer (SP)?

Address of the top element of the stack

80 Which of the following interrupt is non maskable

TRAP

81 Which of the following is a main memory

Cache memory

82 Which of the following are not a machine instructions

(B) & (C)

83 In Assembly language programming, minimum number of operands required for an instruction

is/are
Zero

84 The maximum addressing capacity of a micro processor which uses 16 bit database & 32 bit address
base is
4 GB

85 The memory unit that communicates directly with the CPU is called the
main memory

86 The average time required to reach a storage location in memory and obtain its contents is called
Access time.
State True or False

87 A byte is a group of 16 bits.

False

88 A nibble is a group of 16 bits.

False

89 When a word is to be written in an associative memory, address has got to be given.

False

90 When two equal numbers are subtracted, the result would be and not .
+ZERO, -ZERO.

91 A development system and an are essential tools for writing large assembly
language programs.
Microprocessor, assembler

92 In an operation performed by the ALU, carry bit is set to 1 if the end carry C 8 is
. It is cleared to 0 (zero) if the carry is .
One, zero

93 A successive A/D converter is

a medium speed converter
94 When necessary, the results are transferred from the CPU to main memory by
shift registers

96 A combinational logic circuit which sends data coming from a single source to two or more separate
destinations is
Demultiplexer.

97 In which addressing mode the operand is given explicitly in the instruction

Immediate

98 A stack organized computer has

Zero-address Instruction.

99 A Program Counter contains a number 825 and address part of the instruction contains the number
24. The effective address in the relative address mode, when an instruction is read from the memory is
850.

102 A page fault

Occurs when a program accesses a page not currently in main memory.

103. The load instruction is mostly used to designate a transfer from memory to a processor register
known as .
Accumulator

104. A group of bits that tell the computer to perform a specific operation is known as .
Instruction code

105. The time interval between adjacent bits is called the_ .

Bit-time

106. A k-bit field can specify any one of .

2k registers

107. MIMD stands for .

Multiple instruction multiple data

108. Logic gates with a set of input and outputs is arrangement of .

Computational circuit

109. The average time required to reach a storage location in memory and obtain its contents is called
.
Access time.

110. The BSA instruction is .

Branch and save return address

111. A floating point number that has a O in the MSB of mantissa is said to have .
Underflow
112. Translation from symbolic program into Binary is done in .
Two passes.

113. The instruction ‘ORG O’ is a .

Pseudo instruction.

114. ‘Aging registers’ are .

Counters which indicate how long ago their associated pages have been referenced.

115. Memory unit accessed by content is called .

Associative Memory

116. register keeps tracks of the instructions stored in program stored in memory.
. PC (Program Counter)

117. n bits in operation code imply that there are possible distinct operators.
2n

118. A three input NOR gate gives logic high output only when .
all input are high

119. The circuit converting binary data in to decimal is .

Code converter

120. The multiplicand register & multiplier register of a hardware circuit implementing
booth’s algorithm have (11101) & (1100). The result shall be .
(812)10

121. PSW is saved in stack when there is a .

interrupt recognized

122. In computers, subtraction is carried out generally by .

. 2’s complement method

123. The main memory in a Personal Computer (PC) is made of .

bothA.and (B).

124. Cache memory works on the principle of .

Locality of reference

125. An n-bit microprocessor has .

n-bit instruction register

126. When CPU is executing a Program that is part of the Operating System, it is said to be in .
System mode

127. Logic X-OR operation of (4ACO)H& (B53F)H results .

FFFF
128. If the main memory is of 8K bytes and the cache memory is of 2K words. It uses associative
mapping. Then each word of cache memory shall be .
16 bits

129. A Stack-organised Computer uses instruction of .

Zero addressing

130. In a program using subroutine call instruction, it is necessary .

Clear the instruction register

131. Virtual memory consists of .

Static RAM

132. In signed-magnitude binary division, if the dividend is (11100)2 and divisor is (10011)2 then the
result is .
(10100)2

133. Generally Dynamic RAM is used as main memory in a computer system as it .

has higher speed

134. Write Through technique is used in which memory for updating the data .
Cache memory

135. Cache memory acts between .

CPU and RAM

136. The circuit used to store one bit of data is known as .

Flip Flop

137. Von Neumann architecture is .

SISD

138. In a vectored interrupt.

the interrupting source supplies the branch information to the processor through

139. . In a memory-mapped I/O system, which of the following will not be there?
LDA

140. If memory access takes 20 ns with cache and 110 ns without it, then the ratio (cache uses a 10 ns
memory) is .
90%

141. The addressing mode used in an instruction of the form ADD X Y, is .

index

142. register keeps track of the instructions stored in program stored in memory.
PC (Program Counter)

143. The idea of cache memory is based _.

on the property of locality of reference
144. Which of the following is not a weighted code?
Excess 3-cod

145. The average time required to reach a storage location in memory and obtain its contents is called
the .
access time

146. (2FAOC)16 is equivalent to .

(001011111010 0000 1100)2

147. The circuit used to store one bit of data is known as .

Flip Flop

148. . Computers use addressing mode techniques for .

• giving programming versatility to the user by providing facilities as pointers to memory counters for loop
control
• to reduce no. of bits in the field of instruction
• specifying rules for modifying or interpreting address field of the instruction

149. What characteristic of RAM memory makes it not suitable for permanent storage?
it is volatile

150. The amount of time required to read a block of data from a disk into memory is composed of seek
time, rotational latency, and transfer time. Rotational latency refers to
.
the time its takes for the platter to make a full rotation

151. In computers, subtraction is generally carried out by .

2’s complement

152. Assembly language .

uses alphabetic codes in place of binary numbers used in machine language

153. Suppose that a bus has 16 data lines and requires 4 cycles of 250 nsecs each to transfer data. The
bandwidth of this bus would be 2 Megabytes/sec. If the cycle time of the bus was reduced to 125 nsecs
and the number of cycles required for transfer stayed the same what would the bandwidth of the bus?
2 Megabytes/sec

154. Floating point representation is used to store .

real integers

155. SIMD represents an organization that .

includes many processing units under the supervision of a common control unit

156. In Reverse Polish notation, expression A*B+C*D is written as

A. AB*CD*+

157. Processors of all computers, whether micro, mini or mainframe must have
Primary Storage
158. What is the control unit’s function in the CPU?
• To transfer data to primary storage
• to store program instruction
• to perform logic operations
• to decode program instruction

159. What is meant by a dedicated computer?

• which is used by one person only
• which is assigned to one and only one task
• which does one kind of software
• which is meant for application software only

160. The most common addressing techiniques employed by a CPU is

register

161. Pipeline implement

calculate operand

162. Which of the following code is used in present day computing was developed by IBM corporation?
EBCDIC code

163. When a subroutine is called, the address of the instruction following the CALL instructions stored
in/on the
stack

164. A microprogram written as string of 0’s and 1’s is a

binary microprogram

165. Interrupts which are initiated by an instruction are

software

166. Memory access in RISC architecture is limited to instructions

STA and LDA

167. A collection of lines that connects several devices is called …………..

bus

168. A complete microcomputer system consist of ………..

• microprocessor
• memory
• peripheral equipment

169. PC Program Counter is also called ……………….

instruction pointer

170. In a single byte how many bits will be there?

8

171. CPU does not perform the operation ………………

data transfer
172. The access time of memory is …………… the time required for performing any single CPU
operation.
Longer than

173. Memory address refers to the successive memory words and the machine is called as
…………
word addressable

174. A microprogram written as string of 0’s and 1’s is a ………….

binary microprogram

175. A pipeline is like ………………..

an automobile assembly line

176. Data hazards occur when ……

Pipeline changes the order of read/write access to operands

177. Where does a computer add and compare data?

CPU chip

178. Which of the following registers is used to keep track of address of the memory location where the
next instruction is located?
Program Register

179. A complete microcomputer system consists of

• microprocessor
• memory
• peripheral equipment

180. CPU does not perform the operation

logic operation

181. Pipelining strategy is called implement

instruction decoding

182. A stack is
an 8-bit register in the microprocessor

183. A stack pointer is

a 16-bit register in the microprocessor that indicate the beginning of the stack memory.

184. The branch logic that provides decision making capabilities in the control unit is known as
unconditional transfer

185. Interrupts which are initiated by an instruction are

software

186. A time sharing system imply

more than one program in memory
187.Virtual memory is –
an illusion of an extremely large memory

188.Fragmentation is –
dividing the main memory into equal size f ragments

189.Which memory unit has lowest access time?

Registers

190.Cache memory-
f aster to access than RAM

191.When more than one processes are running concurrently on a system-

multi programming system

192.Which of the following memories must be refreshed many times per second?
Static RAM

193.RAM stands for

Random access memory

194.CPU fetches the instruction from memory according to the value of

program counter

195.A memory buffer used to accommodate a speed differential is called

cache

196.Which one of the following is the address generated by CPU?

logical address

197.Run time mapping from virtual to physical address is done by

memory management unit

198.Memory management technique in which system stores and retrieves data from secondary storage
for use in main memory is called
paging

199.The address of a page table in memory is pointed by

stack pointer

200.Program always deals with

logical address