Major RR
Major RR
Major RR
ABSTRACT - This paper presents the has been obtained experimentally using
design and implementation of three number of cascaded H-bridge
microcontroller-based single-phase inverters which require less power
multilevel inverters for reducing the switching devices. It is found that total
number of switching devices and total harmonic distortion is reduced with
harmonic content at the output voltage. increasing number of levels at the output
Multilevel inverters are suitable for high- voltage of the multilevel inverter.
voltage and high-current applications.
Keywords- microcontroller;
The proposed system consists of a
microcontroller, three separate input de multilevel inverter; cascaded H-
sources, isolating circuit and three bridge; total harmonies distortion.
cascaded H-bridge MOSFET-based
I. INTRODUCTION
voltage source inverters. A
microcontroller has been used to In recent years, multilevel inverters
generate proper gate signals for have been attracting the attention of
MOSFETs of the three H-bridge Electrical Engineers due to its high power
inverters. The complexity of generating quality, high voltage capability, low
gate drive signals for higher levels of switching losses and low Electro-Magnetic
inverter output voltage can be reduced Interference [1-5]. A multilevel inverter is a
dramatically using microcontroller. power electronics circuit which is capable
Maximum thirteen-level output voltage of providing desired alternating voltage
level at the output with variable voltage and inverter improves the AC power quality by
frequency from single de voltage or performing the power conversion in small
multiple lower level de voltages as input voltage steps leading to lower harmonics.
and they have been proposed as the best
A large number of research works [6-
choice in several medium and high voltage
23] have been undertaken and various
applications [1].
classifications of multilevel inverters have
A conventional inverter has two been made with different topologies, such
possible voltage levels. Multilevel inverter as, diode clamped, flying capacitor,
can switch their outputs between many cascaded H-bridge, hybrid H-bridge and
voltage or current levels and have multiple new hybrid H-bridge multilevel inverters.
voltage or current sources. A multilevel Out of these topologies, cascaded H-bridge
inverter can be implemented in different multilevel inverter has been attracted much
topology [6-10] with its own advantages attention of the Electrical Engineers due to
and limitations. The simplest technique its simplicity. The serially connected H-
adopted is parallel or series connection of bridge with separate DC source is called as
conventional inverters to form the cascaded H-bridge multilevel inverter. In
multilevel inverter. More complex this type of configuration voltage on each
structures involve, inserting inverter within DC source is same value 1]. However, the
inverter to form a multilevel inverter. multilevel inverter has drawbacks like
trouble in increasing the voltage levels in
The main function of a multilevel
the power switching devices, switching
inverter is to produce a desired AC voltage
losses, circuit complexity and economic
level from several DC voltage sources. This
aspects. Also, the increasing number of
DC voltage source may or may not be equal
switching devices tends to reduce the
to one another. The AC voltage produced
overall reliability and efficiency of the
from this DC voltage appears to be a
power converter. The main objective
sinusoidal. One pitfall of using multilevel
of the present works is to design and
inverter is to approximate sinusoidal
implement cascaded H-bridge multilevel
waveforms concern with harmonics. The
inverters with minimum number of
staircase waveform produced by a
switching devices in order to minimize the
multilevel inverter contains sharp
overall energy loss and total harmonic
transitions. The harmonics generated on the
distortion, and thereby improve the
AC side greatly influence the power quality
performance of the inverters.
of the control system. The multilevel
II.DESCRIPTIONOF PROPOSED MI0, and the lower switches by MIl and
ACKNOWLEDGEMENT