8051 Microcontroller

Lecture Two
 8051 Microcontroller
●
The MC incorporates all the features that are found in microprocessor.
●
It has built in ROM, RAM, Input Output ports, Serial Port, timers,
interrupts and clock circuit.
●
Microcontroller (MC) may be called computer on chip since it has
basic features within single chip.
●
These are usually dedicated devices embedded within an application.
●
For example, microcontrollers are used as engine controllers in
automobiles and as exposure and focus controllers in cameras.
 8051 Architecture
●
Intel introduced 8051, referred as MCS-51, in 1981.
●
The 8051 is an 8-bit processor
●
The CPU can work on only 8 bits of data at a time.
• The 8051 had
• 128 bytes of RAM
• 4K bytes of on-chip ROM
• Two timers
• One serial port
• Four I/O ports, each 8 bits wide
• 6 interrupt sources

•
The 8051 became widely popular after allowing other manufactures to
make and market any flavor of the 8051, but remaining code-
compatible
 8051 Architecture
●
It has 4 ports, each having 8 I/O lines, total of 32 I/O lines , which are
sufficient to make all necessary connections to peripheral
environment.
●
It has Accumulator, general purpose registers and special purpose
registers
●
It has ALU which does all kind of arithmetic and logical operations.
●
s
●
The 8051 is a subset of the 8052.
●
The 8031 is a ROM-less 8051
Feature 8051 8052 8031

ROM (on-chip program 4K 8K 0K

space in bytes)

RAM (bytes) 128 256 128

Timers 2 3 2

I/O pins 32 32 32

Serial port 1 1 1

Interrupt sources 6 8 6
Pin Configuration
 Pinout Description
●
Pins 1-8: Port1 Each of these pins can be configured as an input or an
output.
●
Pin 9: RS A logic one on this pin disables the microcontroller and
clears the contents of most registers.
●
Pins 10-17: Port 3 Similar to port 1, each of these pins can serve as
general input or output. Besides, all of them have alternative
functions.
●
Pin 10: RXD Serial asynchronous communication input or Serial
synchronous communication output.
●
Pin 11: TXD Serial asynchronous communication output or Serial
synchronous communication clock output.
 Pinout Description
●
Pin 12: INT0 Interrupt 0 input.
●
Pin 13: INT1 Interrupt 1 input.
●
Pin 14: T0 Counter 0 clock input.
●
Pin 15: T1 Counter 1 clock input.
●
Pin 16: WR Write to external (additional) RAM.
●
Pin 17: RD Read from external RAM.
●
Pin 18, 19: X2, X1 Internal oscillator input and output.
●
Pin 20:GND Ground.
 Pinout Description
●
Pin 21-28: Port pins are configured as general inputs/outputs. In case external
memory is used, the higher address byte.
●
Pin 29: PSEN If external ROM is used for storing program then a logic zero (0)
appears on it every time the microcontroller reads a byte from memory.
●
Pin 30: ALE Prior to reading from external memory, the microcontroller puts
the lower address byte (A0-A7) on P0 and activates the ALE output. After
receiving signal from the ALE pin, the external register memorizes the state of
P0 and uses it as a memory chip address. Immediately after that, the ALU pin is
returned its previous logic state and P0 is now used as a Data Bus. As seen, port
data multiplexing is performed by means of only one additional (and cheap)
integrated circuit. In other words, this port is used for both data and address
transmission.
 Pinout Description
●
Pin 31: EA By applying logic zero to this pin, P2 and P3 are used for data
and address transmission with no regard to whether there is internal memory
or not. It means that even there is a program written to the MC, it will not be
executed. Instead, the program written to external ROM will be executed. By
applying logic one to the EA pin, the MC will use both memories, first
internal then external (if exists).
●
Pin 32-39: Port 0 Similar to P2, if external memory is not used, these pins
can be used as general inputs/outputs. Otherwise, P0 is configured as address
output (A0-A7) when the ALE pin is driven high (1) or as data output (Data
Bus) when the ALE pin is driven low (0).
●
Pin 40: VCC +5V power supply.
 Special function registers
●
During program execution Program counter (PC) plays vital role. It
is 16 bit length. Holds address of the instruction to be execute next.
●
It has many special purpose registers like PSW, TMOD , SBUF etc.
 Program Status Word (PSW)
●
It is a special purpose register.
●
It is 8-bit wide.
●
The PSW register contains program status information execution.
 Program Status Word (PSW)
●
q
●
Example
●
Example
 RAM Memory Space Allocation
●
a
 Register Banks
●
These 32 bytes are divided into 4 banks of registers in which each bank
has 8 registers, R0-R7
– RAM location from 0 to 7 are set aside for bank 0 of R0-R7 where
R0 is RAM location 0, R1 is RAM location 1, R2 is RAM location
2, and so on, until memory location 7 which belongs to R7 of bank 0
– It is much easier to refer to these RAM locations with names such
as R0, R1, and so on, than by their memory locations
●
Register bank 0 is the default when 8051 is powered up
 Register Banks
●
u
 Register Banks
●
We can switch to other banks by use of the PSW register

– Bits D4 and D3 of the PSW are used to select the desired register
bank

– Use the bit-addressable instructions SETB and CLR to access

PSW.4 and PSW.3
●
 Register Banks
●
We
 Serial Data Buffer (SBUF)
●
Serial data buffer supports serial communication.
●
It is actually two separate registers, one transmit buffer and one
receive buffer register.
●
When data is moved to SBUF, it goes to the transmit buffer where it
is held for serial transmission.
●
When data is moved from SBUF, it comes from the receive buffer.
●
It acts as a interface between either transmitter or receiver to the
processor.
 Timer Registers

●
Timer register pairs (TH0, TL0), (TH1,TL1), are the 16-bit
counting registers for Timer/Counters 0, 1 respectively.
●
This can be operated as 8 bit /13bit/16 bit timers.
●
It counts the external negative transition also if it is configured as
counter.
 Control Registers
●
Special Function Registers IP, IE, TMOD, TCON, SCON, and PCON
contain control and status bits for the interrupt system, the
timer/counters, and the serial port.
●
When the system configured for interrupt based service then Interrupt
Enable(IE) and TCON registers place major role.
●
IE is set to 1 for enabling the system to work on interrupt. SCON is
used during serial communication.
●
TMOD is used during the timer/counter operation.
●
These registers are used to support, enable and to activate different
processes which can be handled by 8051 microcontroller.
 Memory
●
The 8051 has two types of memory and these are Program Memory and Data
Memory.
●
Program Memory (ROM) is used to permanently save the program being
executed, while Data Memory (RAM) is used for temporarily storing data and
intermediate results created and used during the operation of the
microcontroller.
●
Depending on the model in use, at most a few Kb of ROM and 128 or 256 bytes
of RAM is used.
●
However all 8051 microcontrollers have a 16-bit addressing bus and are capable
of addressing 64 kb memory.
●
It is neither a mistake nor a big ambition of engineers who were working on
basic core development.
●
It is a matter of smart memory organization which makes these
microcontrollers a real “programmers’ goody“.
 Arithmetic and Logic unit ( ALU )
●
Arithmetic and logic unit is a 8 bit unit. It performs arithmetic and logical
operations.
●
For doing addition operation minimum two operands are needed and one of the
operand comes through the accumulator and other one comes through the temporary
register.
●
After the addition operation, data is send to another temporary register.
●
For doing multiplication or division operation the operands are put in Accumulator
and B register.
●
It also performs Increment/decrement register contents.
●
Sometimes the PC values can be incremented or the data values can be decremented
in the register.
 Timers and counters
●
The microcontroller oscillator uses quartz crystal for its operation.
●
As the frequency of this oscillator is precisely defined and very stable, pulses are generated
with same width, which makes them ideal for time measurement.
●
In order to measure time between two events it is sufficient to count up pulses coming from
this oscillator.
●
If the timer is properly programmed, the value stored in its register will be incremented (or
decremented) with each coming pulse, i.e. once per each machine cycle.
●
A single machine-cycle instruction lasts for 12 quartz oscillator periods, which means that by
embedding quartz with oscillator frequency of 12MHz, a number stored in the timer register
will be changed million times per second, i.e. each microsecond.
●
The 8051 microcontroller has 2 timers/counters called T0 and T1.
●
The main purpose is to measure time and count external events.
●
Besides, they can be used for generating clock pulses to be used in serial communication, so
called Baud Rate.
 Introduction to 8051 assembly language
programming
●
Register are used to store information temporarily, while the
information could be
– a byte of data to be processed, or Registers
– an address pointing to the data to be fetched
●
The vast majority of 8051 register are 8-bit registers
– There is only one data type, 8 bits
●
The 8 bits of a register are shown from MSB D7 to the LSB D0.
– With an 8-bit data type, any data larger than 8 bits must be broken
into 8-bit chunks before it is processed
●
The most widely used registers
●
A (Accumulator)
– For all arithmetic and logic instructions
●
B register is used during multiply and divide operations for other
instructions.
●
R0, R1, R2, R3, R4, R5, R6, R7 general purpose register(GPR)
●
DPTR (data pointer), and PC (program counter)
●
An Assembly language instruction consists of four fields:
●
[label:] Mnemonic [operands] [;comment]
 MOV Instruction
●
Format:
●
MOV destination, source ;copy source to dest
●
The instruction tells the CPU to move (in reality, COPY) the source
operand to the destination operand
●
Notes on programming
– Value (proceeded with #) can be loaded directly to registers A, B,
or R0 – R7

●
If values 0 to F moved into an 8-bit register, the rest of the bits are
assumed all zeros
●
MOV A, #5, the result will be A=05; i.e., A= 00000101 in binary
●
Moving a value that is too large into a register will cause an error
●
MOV A, #7F2H ; ILLEGAL: 7F2H>8 bits (FFH)
 ADD Instruction
●
ADD A, source ;ADD the source operand
;to the accumulator
●
The ADD instruction tells the CPU to add the source byte to register A and put the
result in register A
●
Source operand can be either a register or immediate data, but the destination must
always be register A
●
“ADD R4, A” and “ADD R2, #12H” are invalid since A must be the destination of
any arithmetic operation
Ex. MOV A, #25H ;load 25H into A
MOV R2, #34H ;load 34H into R2
ADD A, R2 ;add R2 to Accumulator
 ORG (origin) and END
●
ORG (origin)
– The ORG directive is used to indicate the beginning of the address
– The number that comes after ORG can be either in hex and decimal.
●
If the number is not followed by H, it is decimal and the assembler will
convert it to hex
●
END
● This indicates to the assembler the end of the source (asm) file
● The END directive is the last line of an 8051 program
● Mean that in the code anything after the END directive is ignored by the
assembler
 PROGRAM COUNTER AND ROM SPACE
●
The program counter points to the address of the next instruction to be executed
– As the CPU fetches the opcode from the program ROM, the program counter is
increasing to point to the next instruction
●
The program counter is 16 bits wide
– This means that it can access program addresses 0000 to FFFFH, a total of 64K
bytes of code
●
All 8051 members start at memory address 0000 when they’re powered up

– Program Counter has the value of 0000

– The first opcode is burned into ROM address 0000H, since this is where the 8051
looks for the first instruction when it is booted

– We achieve this by the ORG statement in the source program

●
Examine the list file and how the code is placed in ROM.
●
After the program is burned into ROM, the opcode and operand are
placed in ROM memory location starting at 0000.
●
A step-by-step description of the action of the 8051 upon applying
power on it.
1. When 8051 is powered up, the PC has 0000 and starts to fetch the
first opcode from location 0000 of program ROM
– Upon executing the opcode 7D, the CPU fetches the value 25 and
places it in R5
– Now one instruction is finished, and then the PC is incremented to
point to 0002, containing opcode 7F.
2. Upon executing the opcode 7F, the value 34H is moved into R7.
– The PC is incremented to 0004
3. The instruction at location 0004 is executed and now PC = 0006
4. After the execution of the 1-byte instruction at location 0006, PC =
0007
5. Upon execution of this 1-byte instruction at 0007, PC is
incremented to 0008
• This process goes on until all the instructions are fetched and
executed
• The fact that program counter points at the next instruction to be
executed explains some microprocessors call it the instruction
pointer
 STACK
●
The stack is a section of RAM used by the CPU to store information
temporarily
– This information could be data or an address
●
The register used to access the stack is called the SP (stack pointer)
register
– The stack pointer in the 8051 is only 8 bit wide, which means that
it can take value of 00 to FFH
– When the 8051 is powered up, the SP register contains value 07
●
RAM location 08 is the first location begin used for the stack
by the 8051
 STACK
●
The storing of a CPU register in the stack is called a PUSH
– SP is pointing to the last used location of the stack
– As we push data onto the stack, the SP is incremented by one.
●
This is different from many microprocessors
●
Loading the contents of the stack back into a CPU register is called a
POP
– With every pop, the top byte of the stack is copied to the register
specified by the instruction and the stack pointer is decremented
once
●
Example
●
Example :POP
 ADDRESSING MODES
●
The CPU can access data in various ways, which are called addressing
modes.
 IMMEDIATE ADDRESSING MODE
●
The source operand is a constant
●
The immediate data must be preceded by the pound sign, “#”
●
Can load information into any registers, including 16-bit DPTR
register
●
DPTR can also be accessed as two 8-bit registers, the high byte DPH
and low byte DPL
 REGISTER ADDRESSING MODE
●
Use registers to hold the data to be manipulated

●
The source and destination registers must match in size.

●
The movement of data between Rn registers is not allowed
– MOV R4,R7 is invalid
 Direct Addressing Mode
●
a
 Register Indirect Addressing Mode
●
A register is used as a pointer to the data
– Only register R0 and R1 are used for this purpose
– R2 – R7 cannot be used to hold the address of an operand located
in RAM
●
When R0 and R1 hold the addresses of RAM locations, they must be
preceded by the “@” sign
●
Example:
 Indexed Addressing Mode
●
Indexed addressing mode is widely used in accessing data elements
of look-up table entries located in the program ROM
●
The instruction used for this purpose is
– MOVC A,@A+DPTR
●
Use instruction MOVC, “C” means code
●
The contents of A are added to the 16-bit register DPTR to form the
16-bit address of the needed data
 Indexed Addressing Mode and MOVX
●
In many applications, the size of program code does not leave any
room to share the 64K-byte code space with data
– The 8051 has another 64K bytes of memory space set aside
exclusively for data storage
●
This data memory space is referred to as external memory and
it is accessed only by the MOVX instruction
●
The 8051 has a total of 128K bytes of memory space
– 64K bytes of code and 64K bytes of data
– The data space cannot be shared between code and data
 BIT ADDRESSES
●
Many microprocessors allow program to access registers and I/O ports
in byte size only
– However, in many applications we need to check a single bit
●
One unique and powerful feature of the 8051 is single-bit operation
– Single-bit instructions allow the programmer to set, clear, move,
and complement individual bits of a port, memory, or register
– It is registers, RAM, and I/O ports that need to be bit-addressable
●
ROM, holding program code for execution, is not bit-
addressable
 BIT ADDRESSES: Bit- Addressable RAM
●
The bit-addressable RAM location are 20H to 2FH.
– These 16 bytes provide 128 bits of RAM bit-addressability, since 16 × 8
= 128
● 0 to 127 (in decimal) or 00 to 7FH
– The first byte of internal RAM location 20H has bit address 0 to 7H
– The last byte of 2FH has bit address 78H to 7FH
●
Internal RAM locations 20-2FH are both byte-addressable and bit-
addressable
– Bit address 00-7FH belong to RAM byte addresses 20-2FH
– Bit address 80-F7H belong to SFR P0, P1, …
BIT ADDRESSES: Bit- Addressable RAM
BIT ADDRESSES: Bit- Addressable RAM
 BIT ADDRESSES: Bit- Addressable RAM
●
To avoid confusion regarding the addresses 00 – 7FH
– The 128 bytes of RAM have the byte addresses of 00 – 7FH can be
accessed in byte size using various addressing modes
●
Direct and register-indirect
– The 16 bytes of RAM locations 20 – 2FH have bit address of 00 –
7FH
●
We can use only the single-bit instructions and these
instructions use only direct addressing mode
 BIT ADDRESSES: Bit- Addressable RAM
●
Instructions that are used for signal-bit operations are as following
 Branch and conditional instructions
– JUMP
– LOOP
– CALL
 Looping
●
Repeating a sequence of instructions a certain number of times is called
a loop
– Loop action is performed by
DJNZ reg, Label
– The register is decremented
– If it is not zero, it jumps to the target address referred to by the label
– Prior to the start of loop the register is loaded with the counter for
the number of repetitions
– Counter can be R0 – R7 or RAM location
 Nested Looping
●
If we want to repeat an action more times than 256, we use a loop inside
a loop, which is called nested loop
●
We use multiple registers to hold the count
 Conditional Jumps
●
q
 Conditional Jumps
●
q
 Conditional Jumps
●
All conditional jumps are short jumps
●
The address of the target must within -128 to +127 bytes of the
contents of PC
 Unconditional Jumps
●
The unconditional jump is a jump in which control is
transferred unconditionally to the target location
●
LJMP (long jump)
– 3-byte instruction
●
First byte is the opcode
●
Second and third bytes represent the 16-bit target address
●
Any memory location from 0000 to FFFFH
●
SJMP (short jump)
– 2-byte instruction
●
First byte is the opcode
●
Second byte is the relative target address
●
00 to FFH (forward +127 and backward -128 bytes from the
current PC)
 CALL INSTRUCTIONS
●
Call instruction is used to call subroutine
– Subroutines are often used to perform tasks that need to be performed
frequently
– This makes a program more structured in addition to saving memory space
●
LCALL (long call)
– 3-byte instruction
●
First byte is the opcode
●
Second and third bytes are used for address of target subroutine
– Subroutine is located anywhere within 64K byte address space
●
ACALL (absolute call)
– 2-byte instruction
●
11 bits are used for address within 2K-byte range
 CALL INSTRUCTIONS
●
The only difference between ACALL and LCALL is

– The target address for LCALL can be anywhere within the 64K
byte address

– The target address of ACALL must be within a 2K-byte range

ACALL
●
The use of ACALL instead of LCALL can save a number of bytes of
program ROM space
ARITHMETIC & LOGIC INSTRUCTIONS
AND PROGRAMS
– ADD
– ADDC
– SUB
– SUBB
– MUL
– DIV
 Addition of Unsigned Numbers
●
ADD A,source ;A = A + source
●
The instruction ADD is used to add two operands
– Destination operand is always in register A
– Source operand can be a register, immediate data, or in memory
– Memory-to-memory arithmetic operations are never allowed in
8051 Assembly language
ADDC and Addition of 16-Bit Numbers
●
When adding two 16-bit data operands, the propagation of a carry
from lower byte to higher byte is concerned.
 BCD Number System
●
The binary representation of the digits 0 to 9 is called BCD (Binary
Coded Decimal)
– Unpacked BCD
– In unpacked BCD, the lower 4 bits of the number represent the
BCD number, and the rest of the bits are 0
– Ex. 00001001 and 00000101 are unpacked BCD for 9 and 5
– Packed BCD
– In packed BCD, a single byte has two BCD number in it, one in
the lower 4 bits, and one in the upper 4 bits
– Ex. 0101 1001 is packed BCD for 59H
 BCD Number System
●
Adding two BCD numbers must give a BCD result

●
This is achieved via DA Instruction
 BCD Number System: DA Instruction
DA A ;decimal adjust for addition
●
The DA instruction is provided to correct the aforementioned problem
associated with BCD addition
– The DA instruction will add 6 to the lower nibble or higher nibble
if need.
 Summary of DA instruction
●
Summary of DA instruction
– After an ADD or ADDC instruction
– If the lower nibble (4 bits) is greater than 9, or if AC=1, add
0110 to the lower 4 bits
– If the upper nibble is greater than 9, or if CY=1, add 0110 to
the upper 4 bits
Subtraction of Unsigned Numbers
●
In many microprocessor there are two different instructions for
subtraction:SUB and SUBB (subtract with borrow)
– In the 8051 we have only SUBB
– The 8051 uses adder circuitry to perform the subtraction
●
SUBB A,source ;A = A – source – CY
●
To make SUB out of SUBB, we have to make CY=0 prior to the
execution of the instruction
●
Notice that we use the CY flag for the borrow
 Subtraction of Unsigned Numbers
●
SUBB when CY = 0
– Take the 2’s complement of the
– subtrahend (source operand)
– Add it to the minuend (A)
– Invert the carry
●
Example:
MOV A, #4C ;load A with value 4CH
●
SUBB A, #6EH ;subtract 6E from A
Subtraction of Unsigned Numbers
 Unsigned Multiplication
●
he 8051 supports byte by byte multiplication only
– The byte are assumed to be unsigned data
MUL AB ;AxB, 16-bit result in B, A
 Division
●
The 8051 supports byte over byte division only
– The byte are assumed to be unsigned data
DIV AB ;divide A by B, A/B
Application for DIV
 LOGIC AND COMPARE INSTRUCTIONS

●
AND
●
OR
●
XOR
 LOGIC AND
ANL destination,source ;dest = dest AND source
●
This instruction will perform a logic AND on the two operands and
place the result in the destination
– The destination is normally the accumulator
– The source operand can be a register, in memory, or immediate
 LOGIC OR
ORL destination,source ;dest = dest OR source
●
The destination and source operands are ORed and the result is placed
in the destination
– The destination is normally the accumulator
– The source operand can be a register, in memory, or immediate
 LOGIC XOR
XRL destination,source ;dest = dest XOR source
●
This instruction will perform XOR operation on the two operands and
place the result in the destination
– The destination is normally the accumulator
– The source operand can be a register, in memory, or immediate
– The XRL instruction can be used to clear the contents of a register
by XORing it with itself.
 Complement Accumulator
CPL A ;complements the register A
●
This is called 1’s complement

●
To get the 2’s complement, all we have to do is to to add 1 to the 1’s
complement
 Compare Instruction
CJNE destination, source, rel. addr.
●
The actions of comparing and jumping are combined into a single
instruction called CJNE (compare and jump if not equal)
– The CJNE instruction compares two operands, and jumps if they
are not equal
– The destination operand can be in the accumulator or in one of the
Rn registers
– The source operand can be in a register, in memory, or immediate
– The operands themselves remain unchanged
– It changes the CY flag to indicate if the destination operand is
larger or smaller
 Compare Instruction
●
Notice in the CJNE instruction that any Rn register can be compared
with an immediate value
– There is no need for register A to be involved

●
The compare instruction is really a subtraction, except that the
operands remain unchanged
– Flags are changed according to the execution of the SUBB
instruction
Example
 ROTATE INSTRUCTION
●
RR
●
RL
●
RRC
●
RLC
 Rotating Right and Left
RR A ;rotate right A
●
In rotate right
– The 8 bits of the accumulator are rotated right one bit, and
– Bit D0 exits from the LSB and enters into MSB, D7
 Rotating Right and Left
RL A ;rotate left A
●
In rotate left
– The 8 bits of the accumulator are rotated left one bit, and
– Bit D7 exits from the MSB and enters into LSB, D0
 Rotating via Carry
RRC A ;rotate right through carry
●
In RRC A
– Bits are rotated from left to right
– They exit the LSB to the carry flag, and the carry flag enters the
MSB
 Rotating via Carry
RLC A ;rotate left through carry
●
In RLC A
– Bits are shifted from right to left
– They exit the MSB and enter the carry flag, and the carry flag
enters the LSB