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18ES1L01 BASIC ELECTRONICS

LAB MANUAL

Department Of Electronics & Communication Engineering


Type Code L-T-P Credits Marks
BASIC ELECTRONICS LAB
PC 18ES1L01 0-0-2 1 100

Objectives The objective of this laboratory is to introduce the student about:


1. To be familiar with the functionalities of different electronic
devices, components and measuring instruments.
2. Understand the working principles, design, specifications and
applications of various electronics circuits.
3. Simulation of various electronics circuits using Or-cad PSpice.
Pre-Requisites Knowledge of electronic components, basic Circuit analysis and semi-
conductor Physics.
Teaching Scheme Regular laboratory experiments to be conducted using hardware and
software tools under the supervision of teacher; some experiments
shall consist of programming assignments.

Evaluation Scheme
Daily Lab Test/
Attendance Record Viva-voce Total
Performance Mini Project
10 30 15 30 15 100

Detailed Syllabus
Experiment # Assignment / Experiment
1 Familiarization of electronic components and its accessories.
2 Plot V-I characteristics of Zener and semiconductor diode.
3 Study the working principle of DSO(Digital Storage Oscilloscope) and signal
generator. Display various waveforms of different amplitude and
frequency using the above mentioned instruments.
4 Study and implementation of clipper circuits.
5 Study and implementation of half-wave rectifier (HWR) circuit.
6 Study and implementation of Full-wave rectifier(center tapped/Bridge)circuit.
7 Study of static input/output characteristics of BJT in CE configuration.
8 Study and implementation of a fixed bias circuit using BJT.
9 Study of static characteristics of FET in CS configuration.
10 Study and implementation of summer, Inverting and non-inverting
Amplifier using Op-AMP.

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11 Study and implementation of Differentiator and Integrator Amplifier using
Op-AMP.
12 Study and implementation of R.C phase shift Oscillator using Op-AMP.
13 Study and simulation of BJT input and output characteristics using OrCAD
PSpice.
14 Study and simulation of FET input and output characteristics using OrCAD
PSpice.
15 Verify logic behavior of digital logic Gates and Implementation of Half-
adder using basic gates.
16 Design 2:1 MUX and simple S-R latch.

Text Books:
T1. Adel S. Sedra and Kenneth C. Smith, Microelectronic Circuits, 5th Edition, Oxford
University Press.
T2. Robert L. Boylestad and Louis Nashelsky, Electronic Devices and Circuit Theory, 9th
Edition, Pearson Education.
Reference Books:
R1. V.K.Mehta, Rohit Mehta, Principles of Electronics, 3rd Edition, S. Chand Publishing, 1980.
Online Resources:
1. http://vlab.co.in/ba_labs_all.php?id=1
2. http://iitg.vlab.co.in/?sub=59&brch=165
Course Outcomes:
CO1 To be familiar with diodes and its applications
CO2 Study of different configurations and biasing circuits of transistor
Design, and implementation of various electronic circuits employing Bipolar
CO3
Junction transistor
CO4 Understand and study of different electronic circuits using operational amplifier
CO5 Design and implementation of digital circuits using logic gates
Program Outcomes Relevant to the Course:
Engineering Knowledge: Apply the knowledge of mathematical science,
PO1 engineering fundamentals, and an engineering specialization to the solution of
complex engineering problems.
Problem Analysis: Identify, formulate, review research literature, and analyze
PO2 complex engineering problems reaching substantiated conclusion using first
principle of mathematics, natural sciences, and engineering sciences.

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Design and Development of solution: Design solutions for complex engineering
problems and design system components or processes that meet the specified
PO3
needs with appropriate consideration for the public health and safety, and the
cultural and societal, and environmental considerations.
Conduct investigations of complex problems: Use research-based knowledge and
PO4 research methods including design of experiments, analysis and interpretation of
data, and synthesis of the information to provide valid conclusions.
Modern Tool Usage: Create, select, and apply appropriate techniques, resources,
PO5 and modern engineering and IT tools including prediction and modeling to complex
engineering activities with an understanding of the limitations.
Life-long Learning: Recognize the need for, and have the preparation and ability to
PO12 engage in independent and life-long learning in the broadest context of
technological change.

Mapping of CO’s to PO’s: (1: Low, 2: Medium, 3: High)


PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12
CO1 3 1 2 - 3 - - - - - - -
CO2 3 - 2 2 3 - - - - - - -
CO3 3 - 3 2 1 - - - - - - -
CO4 3 - 2 2 2 - - - - - - 2
CO5 3 2 3 2 3 2

DO’SAND DONT’S OF THE LABORATORY


DO’S :
 To be responsible for your own safety and keep the laboratory in a good order, you
must comply with the rules below.
 Solid footwear must be worn by all students inside the laboratory. Staffs are required
by the university to ensure that everyone in the laboratory is wearing solid footwear.
Students with bare feet, thongs, sandals, or other forms of open footwear will not be
allowed into the laboratory.
 Always have your circuits checked by a demonstrator before switching on, and always
switch the power off immediately after taking measurements.
 Act sensibly and tidy up after yourself.
 There is a safety switch on each bench which switches power to (and protects) the
GPO's (general purpose outlets/power points).
 Under no circumstances should you attempt to remove any of the panels on the
bench. There is a 220-volt supply behind them which could be lethal.

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DONT’S :
 You should not take equipment from another bench. If something is faulty (or
missing) ask the lab staff for assistance.
 No smoking, drinking, or eating is permitted in the laboratory (this includes chewing
gum and confectionaries).

PREFACE
The Basic Electronics lab is designed to help students understand the basic of electronic
circuit’s analysis as well as giving them the insight on design, simulation and hardware
implementation of circuits. The main aim is to provide hands-on experience to the students
so that they are able to put theoretical concepts to practice.
The content of this course consists of two parts, ‘simulation’ and ‘hardwired’. Computer
simulation is stressed upon as it is a key analysis tool of engineering design. OrCAD PSpice
software is used for simulation experiments.

LABORATORY ORIENTATION
OVERALL PURPOSE
The laboratory portion of this course is designed to give the student practical experience in
working with diode, transistors and operational amplifiers. The laboratory integrates the
theory taught in the lectures with practical design, and should help the student to apply his
or her knowledge for higher semester course like analog electronics and digital electronics.

GENERAL COMMENTS
Every week before lab, each student should read over the laboratory design or experiment
and work out the various calculations, etc. that are outlined. The student should refer to the
text as prescribed in the course description for the fundamental theory. Your grade will
reflect how well you have prepared for the lab. LABORATORY AND EQUIPMENT
MAINTENANCE is the responsibility of not only the laboratory staff, but also the students. A
concerted effort to keep the equipment in excellent condition and the working environment
well‐organized will result in a productive and safe laboratory. There are useful guides one
should follow to avoid the pitfalls in electronic instrumentation and measurement. Above
all, keep in mind that safety is first!

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LABORATORY NOTE BOOK
 Each student should maintain a laboratory notebook according to the following
guidelines:
 Obtain a printed material whose pages are consecutively numbered.
 Write name, register number, course number and name, section number, lab
location, semester, and staff’s name on the cover.
 Record data by pen, not pencil. Do not use eraser.
 Sign and date each page that has data.
 Log all events, whether positive or negative, in the lab. This includes not only data,
but also problems encountered, equipment uses, equipment settings, measurement
technique, or any departure from the procedure suggested by the lab manual.
 Record instruments, their settings, and methods used to acquire data.
 Label the axes of a graph with variable names, units, origin, and scales.
 Demonstrate to the lab staff your understanding and achievement of the lab
objectives.
 Have the lab staff sign and date all data groups before completing each laboratory
session. It is the responsibility of both the staff and the student to make sure that
the data is within expectation before the student leaves each lab session.

LABORATORY RECORDS
Lab reports will be submitted by each student at the beginning of the following lab period.
The report will be graded on clarity, legibility, and content, neither on length nor on the
quality of the artwork. Although the data is measured jointly, the text and analysis of the
report must be original work and may not be copied.

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CONTENTS
EXPERIMENT
LIST OF EXPERIMENTS Page
NO
1 Familiarization of electronic components and its accessories. 1-6
2 Plot V-I characteristics of Zener and semiconductor diode. 7-10
3 Study the working principle of Oscilloscope and signal generator. 11-20
Display various waveforms of different amplitude and frequency
using the above mentioned instruments.
4 Study and implementation of clipper circuits. 21-24
5 Study and implementation of half-wave rectifier (HWR) circuit. 25-29
6 Study and implementation of Full-wave rectifier (center tapped/ 30-35
Bridge) circuit.
7 Study of static input/output characteristics of BJT in CE 36-41
configuration.
8 Study and implementation of a fixed bias circuit using BJT. 42-46
9 Study of static characteristics of FET in CS configuration. 47-50
10 Study and implementation of summer, Inverting and non-inverting 51-57
Amplifier using Op-AMP.
11 Study and implementation of Differentiator and Integrator 58-63
Amplifier using Op-AMP.
12 Study and implementation of R.C phase shift Oscillator using Op- 64-66
AMP.
13 Study and simulation of BJT input and output characteristics using 67-69
OrCADPSpice.
14 Study and simulation of FET input and output characteristics using 70-73
OrCAD PSpice.
15 Verify logic behavior of digital logic Gates and Implementation of 74-81
Half-adder using basic gates.
16 Design 2:1 MUX and simple S-R latch. 82-84

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LIST OF NOMENCLATURE, ACRONYMS & SYMBOLS
Acronyms, Nomenclature
Description
& Symbols
R : Resistance of the Resister
µF : Microfarad
LEDs : Light Emitting Diodes
V-I characteristics : voltage current characteristics curve
BJT : Bipolar junction transistor
β : (beta) Current gain
JFET : Junction field effect transistor
C : Capacitance
IC : Integrated circuit
ƒ : Frequency
dB : Decibel
DC : Direct current
AC : Alternating current
Hz : Hertz
CRO : Cathode Ray Oscilloscope
CRT : cathode ray tube
BNC cable : British Naval Connector or Bayonet Nut Connector
ADC : analog-to-digital converter
DSO : Digital Storage Oscilloscopes
FC : Function Generator
1N4007 : Diode IC
VS : Supply voltage
VPP : Peak-to-peak voltage
VDD : Drain supply voltage
Vm : Maximum Voltage
BW : Bandwidth
λ : MOSFET scale length
MOSFET : Metal oxide semiconductor field effect transistor
L : Inductor
Nm : Nanometer (1 nm = 10-7 cm)
Ω : Ohm
A : Ampere
rms : Root mean square
PCB : Printed circuit board
BC107 : Low signal NPN transistor
IC 741 : Op-amp IC
v : Small signal voltage
BFW11/10 : JFET
OP-AMP : Operational amplifier
Vt : Threshold voltage
BD115 : NPN high voltage transistor
IDSS : Saturation current
Pspice : Personal Simulation Program with Integrated Circuit Emphasis

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EXPERIMENT-1

AIM OF THE EXPERIMENT


Familiarization of electronic components and its accessories.
OBJECTIVE
 To find the resistance of different resistors by using colored code.
 Identify the specifications of capacitors, diodes, transistors, ICs
 Breadboard Basics and Connections
 Basic Functions and Use of A Digital Multimeter

HARDWARE REQUIRED:
1. Resistor
2. Capacitor
3. PN Junction Diode
4. Zener Diode
5. BJT
6. IC
7. Multimeter
8. Breadboard
THEORY:
An electronic component is a basic physical entity in an electronic system used to affect the flow of
electrons. Electronic components have two or more electrical terminals or leads. A component may be
classified as passive or active.
 The components which have own source of energy (e.g. battery) or which utilizes external source
to process (rectify, amplify etc.) an electrical signal are known as Active Components. Example:
Transistor, Diode etc.
 The components which can't introduce net energy into the circuit are called as Passive
Components. They can store energy or dissipate energy. Example: inductors, capacitors, resistors.

Resistors: Resistor opposes the flow of electrons i.e opposes the flow of current. There are two
types resistor, (a) Fixed resistors (b) Variable Resistors. There are also two types of band axial
resistors like 4-band axial resistors and 5-band axial Resistors.

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EXPERIMENT-1

4-band axial resistors 5-band axial Resistors

Resistors
 It consists of four colored bands that are painted around the body of the resistor.
 The first two numbers are the first two significant digits of the resistance value.
 The third is a multiplier.
 The fourth is the tolerance of the value. Each color corresponds to a certain number.
The tolerance for a 4-band resistor will be 2%, 5% or 10%.

Resistor colour code calculation:


R  xy 10 z  T % , Where x=Colour code

z=Colour code of 3rdcolour, T= Tolerance

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EXPERIMENT-1

• The first band RED has a value of 2.


• The second band VIOLET has a value of 7
• The third band BROWN has a multiplier of x 101
• The last band GOLDEN indicates a tolerance value of ± 5%
• Resistance value is 270Ω ± 5%

5-band Axial Resistors

In 5-band axial resistor, the first three bands represent the significant digits, the fourth band is
the multiplier and the fifth one is the tolerance.

Variable Resistors
Variable resistors consist of a resistance
track with connections at both ends and a
wiper which moves along the track as you
turn the spindle. The track may be made
from carbon, cermets (ceramic and metal
mixture) or a coil of wire (for low resistances).

Capacitors
A capacitor is a passive two-terminal electrical component
used to store energy in an electric field. Electrolytic Capacitors
are polarized and require one of the electrodes to be positive
relative to the other. If voltage is reversed, the center layer of
dielectric material may be destroyed via electrochemical

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EXPERIMENT-1

reduction, following the loss of the dielectric material. With sufficient short circuit current, the
electrolyte will rapidly heat up and either leak or cause the capacitor to burst. A bar across the
side of the capacitor is usually used to indicate the negative terminal. Also, the negative
terminal lead of a radial electrolytic is shorter than the positive lead and may be otherwise
distinguishable.
Ceramic capacitors

Ceramic capacitors are non-polarized capacitors. They don’t have


polarity.

e.g.103 means C  10 103 pF  0.01F

Light Emitting Diodes (LEDs)


LEDs emit light when an electric current passes through them.
Connecting and soldering LEDs must be connected the correct way
round, the diagram may be labeled a or + for anode and k or - for
cathode. The cathode is the short lead and there may be a slight flat
on the body of round LEDs.

Rectifier Diode
Rectifier Diode is a component that restricts the directional movement of charge carriers. It
allows an electric current to flow in one direction, but essentially blocks it in the opposite
direction.

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EXPERIMENT-1

The Zener Diode


As the reverse voltage increases the diode can avalanche-
breakdown or zener breakdown. This causes an increase in
current in the reverse direction. It is used as a voltage regulator.

Transistors
The transistor is three terminals device like Emitter, Base and Collector
which is used for amplification purpose. It was invented in December,

1947 at Bell Labs. There two classes of BJT like NPN and PNP.

Breadboard
A breadboard is a rectangular plastic board with a bunch of tiny
holes in it. These holes let you easily insert electronic components
to prototype (meaning to build and test an early version of) an
electronic circuit, like this one with a battery, switch, resistor, and
an LED (light-emitting diode).
Digital Multi-meter
A multimeter or a multitester, also known as a VOM (volt-ohm-
milliammeter), is an electronic measuring instrument that combines
several measurement functions in one unit. A typical multimeter can
measure voltage, current, and resistance.

Integrated Circuit(IC)
An integrated circuit (referred to as an IC, a chip) is a set of electronic
circuits on one small plate of semiconductor material, normally silicon.
This can be made much smaller than a discrete circuit made from
independent components. ICs can be made very compact, having
several billion transistors and other electronic components in an area
the size of a fingernail.

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EXPERIMENT-1

PROCEDURE:
• The first band RED has a value of 2.
• The second band VIOLET has a value of 7
• The third band BROWN has a multiplier of x 101
• The last band GOLDEN indicates a tolerance value of ± 5%

• Resistance value is 270Ω ± 5%

TABULATION AND CALCULATIONS:


R  xy  10 z  T % , Where x = Colour code of 1stcolour, y = Colour code of 2nd colour,

Z = Colour code of 3rd colour, T= Tolerance

SIMULATION RESULT AND ITS ANALYSIS:


A resistor has the following coloured markings; Yellow Violet Red = 4 7 2, R= 4 7 x 102 = 4700Ω
or 47kΩ. The fourth and fifth bands are used to determine the percentage tolerance of
the resistor
CONCLUSION:

QUESTIONNAIRE:
1. Define resistor. How, three equal resistors of 1Ω each are connected to get equivalent
resistance of 2/3 ?
2. What is the difference between parallel plate and ceramic capacitor?
3. Write one application of variable resistor.
4. Explain, why zener behaves as good conduction in reverse biased?
5. What are the difference between BJT and FET?
6. Discuss one application of Zener diode.
7. What do you mean by Multi-meter?
8. What is the difference between analog meter and digital meter?
9. What is the use of Bread board?
10. What is IC

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EXPERIMENT-3

AIM OF THE EXPERIMENT


Plot V-I characteristics of semiconductor diode.
OBJECTIVE
 Understand PN junction diode and its biasing configuration.
 Recognize the differentiation between PN junction and Zener diode
 Determine their DC and AC resistances from V-I characteristics of diode.

HARDWARE REQUIRED:
1. D.C. Variable Power Supply
2. Multimeter
3. Diode 1N4007 (1 No.)
4. Resistor 1KΩ (1 No.)
THEORY:
The semiconductor diode, a solid-state electronic device is formed by simply joining
n-type and p-type material together. The region of uncovered positive and negative
ions is called depletion region due to the depletion of carrier in this region. The
term bias refers to application of external voltage across the diode.
A Diode is a simplest two-terminal unilateral semiconductor device. It allows
current to flow only in one direction and blocks the current that flows in the
opposite direction. The two terminals of the diode are called as anode and
cathode. The symbol of diode is as shown in the figure below.

The characteristics of a diode closely match to that of a switch. An ideal switch


when open does not conduct current in either directions and in closed state
conducts in both directions. The characteristic of a diode is as shown in the figure
below.
Case-I: No bias applied (VD = 0V): In absence of an applied bias voltage, the net flow
of charge in any one direction for semiconductor diode is zero i.e. in the absence of
a voltage across a resistor results in zero current through it. So, when the applied
voltage is 0 V the current is 0 A.

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EXPERIMENT-3

Case-II: Reverse bias condition (VD< 0V)


If the +ve terminal of external source is connected to n-type and –ve terminal is
connected to p-type of material of the diode is called reverse biasing. At that time
the applied electric field is in same direction with the barrier potential. So the
depletion layer expands to oppose the flow of current. But there will be a small
leakage current will flow through diode due to minority charge carrier. That current
is called reverse solution current (IS).

Case-III: Forward-bias condition (VD> OV)


If the +ve terminal of external source is connected to the p-type and the -ve
terminal is connected to the n-type material of the material of the diode then it is
called forward bias. At that time the applied electric field appears across the
depletion region. When the applied external electric field is greater than barrier
potential then current starts building exponentially will increase of external field.
Diode Equation: ID = IS(eqVD/ηKT – 1)
Where ID =Diode current in amperes, IS = Reverse saturation current
q=charge of Electron, VD= Voltage across the diode
K = Boltzmann’s constant,  = 1 for Ge,  = 2 for Si
T = Absolute temperature
Diode characteristic is the graph between the voltage across the diode and diode
current.

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EXPERIMENT-3

V-I Characteristics of PN-Junction diode:

CIRCUIT DIAGRAM:
General diode (Forward Bias)

Zener diode (Reverse Bias):

PROCEDURE:
(i) Connect the circuit as per the diagram.
(ii) Apply forward bias across the diode.
(iii) Change the variable potential (VDC) and note the reading of
voltmeter and ammeter.
(iv) Now change the polarity of the variable potential.
(v) Repeat the step-iii

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EXPERIMENT-3

(vi) Draw the graph between voltage and current, taking voltage along
X-axis and current along Y-axis.
TABULATION AND CALCULATIONS:
For Forward Bias: For Reverse Bias:
Sl. Voltage(V) Current(mA) Sl. Voltage(V) Current(µA)

SIMULATION RESULT AND ITS ANALYSIS:

CONCLUSION:

QUESTIONNAIRE:
1) Why, PN junction diode is called as un-directional device?
2) What is the circuit equivalent of a diode?
3) Explain switching characteristics of diode?
4) Explain, how temperature effects on p-n junction diode?
5) Explain the Diffusion and Drifting phenomenon.
6) Explain the switching action of diode.
7) Why N-type semiconductor is mostly used as compared to P-type
semiconductor?
8) Give the relation between current I and voltage V across PN junction diode.
9) What are the differences between a Ge and Si diode?
10) What do you mean by Reverse Biased current? Explain, how reverse
saturation current varies with temperature?

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EXPERIMENT-2

AIM OF THE EXPERIMENT


Study the working principle of DSO and signal generator. Display various waveforms
of different amplitude and frequency using the above mentioned instruments.
OBJECTIVE:
 To be familiar with the functional block diagram of DSO and its operation
through the front panel knobs.
 To know functional operation of function generator through front panel knobs
 Configure the function generator to generate a sinusoidal signal of a specific
peak-peak voltage and frequency.
 To measure the amplitude, time period and frequency of time varying signals
using DSO.

HARDWARE REQUIRED:
1. DSO
2. Function generator
3. BNC cable

THEORY:
Cathode Ray Oscilloscope (CRO): The cathode ray oscilloscope is an extremely
useful and versatile laboratory instrument used for studying wave shapes of
alternating currents and voltages as well as for measurement of voltage, current,
power and frequency, in fact, almost any quantity that involves amplitude and
waveform. It allows the user to see the amplitude of electrical signals as a function
of time on the screen. It is widely used for trouble shooting radio and TV receivers
as well as laboratory work involving research and design. It can also be employed
for studying the wave shape of a signal with respect to amplitude distortion and
deviation from the normal.

The instrument employs a cathode ray tube (CRT), which is the heart of the
oscilloscope. It generates the electron beam, accelerates the beam to a high

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EXPERIMENT-2

velocity, deflects the beam to create the image, and contains a phosphor screen
where the electron beam eventually becomes visible. For accomplishing these tasks
various electrical signals and voltages are required, which are provided by the power
supply circuit of the oscilloscope. Low voltage supply is required for the heater of
the electron gun for generation of electron beam and high voltage, of the order of
few thousand volts, is required for cathode ray tube to accelerate the beam.
Normal voltage supply, say a few hundred volts, is required for other control circuits
of the oscilloscope. A basic block diagram of a general purpose oscilloscope is shown
in figure. Horizontal and vertical deflection plates are fitted between electron gun
and screen to deflect the beam according to input signal. Electron beam strikes the
screen and creates a visible spot. This spot is deflected on the screen in horizontal
direction (X-axis) with constant time dependent rate. This is accomplished by a time
base circuit provided in the oscilloscope. The signal to be viewed is supplied to the
vertical deflection plates through the vertical amplifier, which raises the potential of
the input signal to a level that will provide usable deflection of the electron beam.
Now electron beam deflects in two directions, horizontal on X-axis and vertical on Y-
axis. A triggering circuit is provided for synchronizing two types of deflections so
that horizontal deflection starts at the same point of the input vertical signal each
time it sweeps.
Digital oscilloscopes: While analog devices make use of continually varying voltages,
digital devices employ binary numbers which correspond to samples of the voltage.
In the case of digital oscilloscopes, an analog-to-digital converter (ADC) is used to
change the measured voltages into digital information.

Fig: A modern DSO.


The digital storage oscilloscope, or DSO for short, is now the preferred type for most
industrial applications, although simple analog CROs are still used by hobbyists. It

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EXPERIMENT-2

replaces the unreliable storage method used in analog storage scopes with digital
memory, which can store data as long as required without degradation. It also allows
complex processing of the signal by high-speed digital signal processing circuits.
CRO Front Panel Diagram:

FRONT PANEL CONTROLS DESCRIPTION:


1 POWER Push button switch to turn scope ON and OFF.
(PB Switch + LED) LED indicates 'POWER ON' condition.
2 INTENS (Knob) Intensity control to adjust Brightness of CRT display.
3 FOCUS (Knob) Focus control to adjust Sharpness of CRT display.
4 TR Trace Rotation Pot. Screw driver adjustment for alignment
of trace with gratitude.
Compensates influence of earth's magnetic field.
5 X-Y (PB Switch) Switch when pressed, cuts off Internal Time base and
selects X-Y operation.
(X signal via CH-II)
6 X-POS (Knob) Controls Horizontal Positioning of trace.
7 HOLD OFF Controls Hold Off time between Sweeps in the ratio 1:10
(Knob) approx.
(Normal (Cal) position = full counter clockwise.)
8 TRIG. (LED) LED glows, if Sweep is triggered.
9 TV SEP. TV sync separator.
(Levier switch) OFF = Normal operation.
TV: H = Line or Horizontal Frequency.

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EXPERIMENT-2

TV: V = Frame or Vertical Frequency.


10 TRIG AC-DC-HF- Selects Internal Trigger Coupling Mode.
LF-~ AC: 10Hz to 20MHz
(Lever switch) DC: DC to 20MHz
HF: 1.5 kHz to 40MHz
LF: DC to 'kHz
LINE~: Internal line triggering.
11 +/- Selects the Slope of Trigger Signal.
(PB Switch) + = rising edge.
- = falling edge.
12 TIME/DIV Selects Time base speeds from 0.5pS/div. to 0.2mS/div.
(Rotary switch)
13 Variable Time base variable control.
(Center knob) Increases Time base speed in the ratio I: 2.5 approx.
(LED) Cal. Position = full counterclockwise, LED OFF.
Uncal Position = LED ON.
14 EXT. (PB Switch) Switch when pressed selects External Triggering. (Trigger
signal via TRIGINP. 15) Switch when in out position, selects
Internal Triggering.
15 TRIG. INP. Input for External Trigger Signal
(BNC connector)
16 AT/NORM. Switch in out position = Automatic Triggering.
(PB Switch) (Trace visible without signal.)
Switch pressed = Normal Triggering with Level control.
(Trace invisible without signal.)
17 LEVEL Adjusts trigger point of the Signal from +ve peak to -ve
(Knob) peak, if AT/NORM PB switch (16) is pressed
18 X-MAG x10 Switch when pressed, magnifies Trace or Signal 10 times
(PB Switch) in X-direction. On 0.5pS/div. range, this improves time
base speed to 50nS/div
19 CAL 0.2V/2V Calibrator output sockets provided for probes
(2mm socket) compensation.
Signal available at the sockets is flat top square wave, of
amplitude 0.2Vpp and 2Vpp,
Frequency = 1KHz approx.
0.2Vpp used for 10:1 probes compensation.
2Vpp used for 100:1 probes compensation

20 CT Switch when pressed converts the instrument from


(PB Switch & oscilloscope to Component Tester Mode.
4mm socket) One test lead is connected to CT socket and the second

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EXPERIMENT-2

test lead is connected to ground (24. or 36.) socket.


21 Y-POS. I (Knob) Controls Vertical positioning of CH.1 trace.
22 INVERT (CH.I) Switch when Pressed, inverts the polarity of CH.1 signal.
(PB Switch) In combination with ADD switch, used for algebraic
addition or difference of two channels.
23 CHI Signal input for CH.1, Input Impedance I MC/ II 25pF.
(BNC connector)
24 GROUND Separate Ground socket.
(4mm socket)
25 AC/DC/GD Input coupling switches for CH.I
(PB Switches) AC: Both switches in out position.
Signal is capacitively coupled, DC is blocked.
DC: AC/DC switch pressed, GD switch in out
position. All components (AC &DC) of the
signal are passed.
GD: GD switch pressed. AC/DC switch may be at any
position. Signal is disconnected, VP of vertical
amplifier is grounded.
26 1mV Switch when pressed magnifies the input signal of CH.II,
(PB Switch LED) 5 times in Y-direction. On 5mV position, this
improves the sensitivity of CH.II to 1mV.
LED indication for x5 action.
27 VOLTS/DIV. CH.I Input Attenuator. Selects input sensitivity in mV/div.
(Rotary switch)
or V/div. in 1-2-5 sequence.
28 VAR-GAIN Continuously variable gain between the calibrated
(Center nob)
(LED) positions of the VOLTS/DIV. switch for CH.I.
Increases sensitivity by a ratio 1: 2.5
Cal. Position = fully counterclockwise, LED OFF.
Uncal. Position = LED ON.
On 5mv range, when knob turned fully clockwise,
sensitivity becomes 2mV.
29 CH.I/II-TRIG.I/11 Switch in out position = CH.1 only & internal trigger
(PB Switch) from CH.I Switch pressed = CH.I1 only & internal
trigger from CH.II
In DUAL &ADD mode, switch selects internal trigger signal.
30 DUAL Switch in out position = Single Channel separately.
(PB Switch) Only DUAL Switch pressed = CH.I & CH.II in alternate
mode. DUAL+ADD switches pressed = CH.I & CH.II in
CHOP mode.

31 ADD (PB Switch) Only ADD switch pressed = Algebraic addition or


difference of CH.1 & CH.11, in combination with INVERT
switches

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32 VOLTS/DIV. CH.II Input Attenuator.


(Rotary switch)
Selects input sensitivity in mV/div. or V/div. in 1-2-5
sequence
33 VAR-GAIN Continuously variable gain between the calibrated
(Center knob)
(LED) positions of the VOLTS/DIV. switch for CH.II.
Increases sensitivity by a ratio 1: 2.5
Cal. Position = fully counterclockwise LED OFF.
Uncal. Position = LED ON.
On 5mv range, when knob turned fully clockwise,
sensitivity becomes 2mV.
34 1mV Switch when pressed magnifies the input signal of CH.II,5
(PB Switch LED) times in Y-direction. On 5mV position, this improves the
sensitivity of CH.II to 1mV.
LED indication for x5 action.
35 AC/DC/GD Input coupling switches for CH.I
(PB Switches) AC: Both switches in out position.
Signal is capacitively coupled, DC is blocked.
DC: AC/DC switch pressed, GD switch in out
position. All components (AC &DC) of the
signal are passed.
GD: GD switch pressed. AC/DC switch may be at any
position. Signal is disconnected; VP of vertical
amplifier is grounded.
36 GROUND Separate Ground socket.
(4mm socket)
37 CH.II
Signal input for CH.II, Input Impedance IML1 II 25p1'.
(BNC connector)
38 Switch when pressed inverts the polarity of CH.II signal. In
INVERT (CH.II)
combination with ADD switch, used for algebraic addition
(PB Switch)
or difference of two channels.
39 Y-POS. II (Knob) Controls Vertical positioning of CH.II trace.
40 ALT Switch when pressed, two signals of different frequency
(PB Switch) and shapes are triggered simultaneously.
41 OVERSCAN LED indicates when trace is out of screen on either side,
(LEDs) top or bottom.

FIRST TIME OPERATION


Check that the instrument is set to the correct mains line voltage.
Before applying power to the oscilloscope it is recommended that the following
simple procedures be performed.
 Check that all pushbuttons are in the out position, i.e. released.

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 Rotate the four variable controls with dots, i.e. TIME/DIV. variable control,
CH. I and CH. II attenuator variable controls and HOLD OFF control, fully
counter-clockwise to their calibrated position.
 Set all controls with dots to their mid-range position.
 The TV SEP lever switch and the TRIG. Selector level switch in the X-field
should be set to their uppermost position.
 Both DC-AC-GD input coupling pushbutton switches for CH. I and CH. II
should be set to the GD position.

Switch on the oscilloscope by pressing the red POWER pushbutton. An LED will
illuminate to indicate working status. The trace, displaying one baseline, should be
visible after a short warm-up period of few seconds. Adjust Y-POS I and X-POS.
Controls to center the baseline. Adjust INTENS. (Intensity) and FOCUS controls for
medium brightness and optimum sharpness of the trace. The oscilloscope is now
ready for use. If only a spot appears (CAUTION: CRT phosphor can be damaged),
reduce the intensity immediately and check that the X-Y pushbutton is in the released
(out) position. If the trace is not visible check the correct positions of all knobs and
switches (particularly AT/NORM. button must be in out position).To obtain the
maximum life from the cathode-ray tube, the minimum intensity setting necessary for
the measurement in hand and the ambient light conditions should be used.

FUNCTION GENERATOR:
A function generator is usually a piece of
electronic test equipment used to generate
different types of electrical waveforms over a
wide range of frequencies. Some of the most
common waveforms produced by the function
generator are the sine, square, triangular and
saw tooth shapes. Function generators are used
in the development, test and repair of electronic equipment. For example, they may
be used as a signal source to test amplifiers or to introduce an error signal into a
control loop. Simple function generators usually generate triangular waveform
whose frequency can be controlled smoothly as well as in steps. This triangular
wave is used as the basis for all of its other outputs. The triangular wave is
generated by repeatedly charging and discharging a capacitor from a constant

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current source. This produces a linearly ascending or descending voltage ramp. As


the output voltage reaches upper and lower limits, the charging and discharging is
reversed using a comparator, producing the linear triangle wave. By varying the
current and the size of the capacitor, different frequencies may be obtained. Saw-
tooth waves can be produced by charging the capacitor slowly, using a current, but
using a diode over the current source to discharge quickly - the polarity of the diode
changes the polarity of the resulting saw-tooth, i.e. slow rise and fast fall, or fast rise
and slow fall.

FRONT PANEL OF FUNCTION GENERATOR:

FRONT PANEL CONTROLS DESCRIPTION:


1 POWER Push button switch for supplying power to instrument
2 DIGITALDISPLAY 4 digit frequency meter, LED indicators for Hz and kHz

3  RANGE  Frequency range selection from 0.3Hz to 3MHz in 7 decade


steps.
4 FREQUENCY Continuous and linear frequency fine adjustment,
(adjustingknob) overlapping the ranges selected with. Setting range from
x0.09 to x 1.1 of the selected range
5 OFFSET Adjustment of the positive or negative offset voltage. DC
voltage can be superimposed on the output signal. The
max. offset voltage is ±5V (o.c.) or ±2.5V when terminated
with 50 Ω
6 Continuous adjustment of the output amplitude from 0 to -
AMPLITUDE 20dB.
7 FUNCTION Mode selection switch (Triangle- Sine - Square - DC).
8 SPEED Selling of wobbulation speed in Sweep mode.
9 SWEEP Activates the internal Sweep mode.

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10 WIDTH Setting of wobbulation width.


11 OFFSET Activates the DC offset function.
12 50 Ω /600 Ω Selects the output impedance at the output BNC.
13 -20dB When pressed the output signal gets attenuated by 20 dB
fixed attenuator.
14 OUTPUT (BNC Short-circuit-proof signal output of the generator.
connector) The output impedance is 50 52/6000, and the max. Output
amplitude is 20 VPP (o.c.) or 10 VPP respectively when
terminated with 50 Ω.
15 -20dB When pressed the output signal gets attenuated by20 dB
fixed attenuator. When both attenuator pushbuttons are
active, a total attenuation of 40dB results. Including the
amplitude control  the max. Attenuation amounts to
60dB (factor 1000).

PROCEDURE:
1. Generation of Sine Waves by Function Generator and Measurement by
Oscilloscope (±5Vpp, 1kHz sine wave)
2. Connect one terminal of BNC cable to the output socket of the function
generator, and another terminal to the CH1 socket of the oscilloscope.
3. Select “GND” switch and adjust position switch to center the vertical position
of the signal.
4. Select sine wave and set the frequency dial to the designated value on the
function generator.
5. Construct a stationary wave form by adjusting sweep switch of the function
generator and TIME/DIV dial of the oscilloscope.
6. Measure the frequency and peak voltage of the signal as follows
(a) Peak-to-Peak Voltage:
Use the vertical-position knob to place a peak (positive or negative) on a horizontal
line, keeping the peak on the screen.
Use the horizontal-position knob to set the next (opposite sign) peak on the center
vertical line.
Count the number of divisions between the positive and negative peaks.
Multiply the number of divisions from step 3 by the volts/div setting for the channel
in use.
(b) Period:

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Use the horizontal-position knobs to align any edge of the signal with a vertical line.
Use the vertical-position knob to place the next identical edge crossing on the X-axis.
Count the number of divisions along the horizontal line to the next crossing in the
same direction.
Multiply the number of divisions from step 3 by the time/div setting.

(c) Frequency:
Measure the period of the signal (T). Calculate frequency (f) using f = 1/T.

TABULATION AND CALCULATIONS:


Assuming the Volts/Div knob reads 2 V/div, the above peak-to-peak voltage would be:
Vpp = 2 volts/div * 5.2 div = 10.4 volts
Assuming the Time/Div control knob read 50ms, the above period would be:
T = 50 ms/div * 5.25 div = 262.50 ms

SIMULATION RESULT AND ITS ANALYSIS:


The peak to peak voltage, time period and frequency of the signal are -------.

CONCLUSION:

QUESTIONNAIRE:
1. What is peak to peak value?
2. What is X-Y mode?
3. Define Digital oscilloscope.
4. What is Function generator?
5. Differentiate between periodic and non periodic waveforms
6. State the process for generating a waveform of 5.5 KHz.
7. Why, the input impedance of CRO is in MΩ range?
8. What is the peak-peak voltage of the signal x(t)=(sin2000πt+cos2000πt)volt?
9. What is the time period of the signal x(t)=(sin2000πt+cos2000πt)volt?
10. Make the block diagram for generating a square wave.

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EXPERIMENT-4

AIM OF THE EXPERIMENT


Study and implementation of clipper circuits.
OBJECTIVE
1. Understand the concept of clipping of signal.
2. Generate positive and negative clipping signal through circuit
HARDWARE REQUIRED:
1. Dual Channel DSO
2. Bread Board/ Trainer Kit
3. Connecting Wires
4. Diode 1N4007 (1 No.)
5. Resistor 1KΩ (1 No.), 10KΩ (1 No.)

THEORY:
Clipper circuits: Clipper circuits consist up of diodes and resistors which have the ability
to “clip” off a portion of the input signal without distorting the remaining part of the
alternating waveform. Half-wave rectifier is an example of simple clipper circuit. The
basic components required for a clipping circuit are a diode and a resistor. In order to
fix the clipping level to the desired amount, a dc battery must also be included.
Different levels of clipping can be obtained by varying the amount of voltage of the
battery and also interchanging the positions of the diode and resistor.
Classification of Clippers: On the basis of network configuration:
 Series Clippers: The series configuration is defined as one where diode is in
series with the load
 Parallel Clippers: The shunt clipper has the diode in a branch parallel to the load.
On the basis of clipped output
 Positive Clipper: In a positive clipper, the positive half cycles of the input voltage
will be removed.
 Negative Clipper: In a negative clipper, the negative half cycles of the input
voltage will be removed.

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To check the forward biased or reverse biased of a diode:


 Assume any direction of current in a diode, and by applying KVL, find the
current for a given input voltage.
 If the current is positive then the assumed direction is the true current
direction, or else if the current comes negative the current direction is opposite
to the assumed current direction.
 Then if the current direction is same as diode direction, then the given input
voltage forward biases the diode. Or else if current direction is opposite to
diode direction, then the given input voltage reverse biases the diode.

Positive Clipper Negative Clipper

Since the input is an alternating voltage vi=vmSin(ωt), there is a certain transition


voltage at which, diode goes forward to reverse and reverse to forward. Assuming
current direction as shown in the circuit and putting KVL, the transition input voltage is
found as:
vi  V  V D  I D R  0
(at transition VD=0, ID=0 for an ideal diode)
 vi T  V

Finding current direction,


vi  V  V D
ID 
R
When vi  v m
v m  V  VD
ID  which is a positive quantity as V<vm
R

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So the assumed current direction is true current direction.

But this current is in same direction, as the diode direction, so vi = vm is in the forward
bias region, and the region containing this voltage is the forward bias region bounded
only by the transition voltages. The region next to this region beyond the transition
voltage is reverse bias region bounded transition voltage.
When forward biased, by using KVL: vo  V  VD (VD=0 for ideal diode)

When reverse biased the diode is open circuit, so v o  vi  I D R

Similarly, the negative clipper can be analyzed.

CIRCUIT DIAGRAM:
Positive clipper

Negative clipper

PROCEDURE:
1. Connect the circuits as per the circuit diagram
2. Calculate the values of output theoretically
3. Set input signal voltage (say 5V, 1 kHz) using signal generator
4. Observe the output waveform using CRO (DC-mode)
5. Sketch the calculated & observed waveforms on the graph.

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TABULATION AND CALCULATIONS:


v m  V  VD
When vi  v m , I D  which is a positive quantity as V<vm
R
When forward biased, by using KVL: vo  V  VD (VD=0 for ideal diode)

When reverse biased the diode is open circuit, so v o  vi  I D R

SIMULATION RESULT AND ITS ANALYSIS:

CONCLUSION:

QUESTIONNAIRE:

1. Is clip per and rectifier circuits are similar?


2. What is the basic principle used to form a clipper circuit?
3. What do you mean biased clipper?
4. What are the applications of Clipper Circuits?
5. Write the piecewise linear characteristics of a diode?
6. What do you mean by transfer characteristics of a clipper circuit?
7. What is the difference between clipping and clamping operations?
8. Clippers come under linear or non linear wave shaping?
9. Which kind of a clipper is called a slicer circuit?
10. Design a clipper circuit using zener diode with 4.7V break down voltage.

k/

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EXPERIMENT-5

AIM OF THE EXPERIMENT


Study and implementation of half-wave rectifier (HWR) circuit.
OBJECTIVE:
1. To be familiar with rectifying action of signals
2. Generation of half-wave rectified waveform through the circuit diagram
3. Performance evaluation (average values, RMS values, ripple factor and
efficiency) of HWR with and without low pass filter
HARDWARE REQUIRED:
1. Dual Channel DSO
2. Bread Board
3. Connecting Wires
4. Diode 1N4007 (1 No.)
5. Resistor 100 KΩ (1 No.)
THEORY:
It is possible to obtain a DC power from the available AC sources. The process of
converting AC to DC is called rectification. There are two types of rectifier which are
used for this conversion process. They are namely half wave rectifier (HWR) and full
wave rectifier (FWR). A half wave rectifier converts either positive or negative half cycle
of input AC to pulsating DC. As a result, a bipolar AC can be converted into unipolar
pulsating DC by exploiting the unidirectional property of a semiconductor diode. If the
polarity of the semiconductor diode is reversed then the HWR converts the negative
half cycles of input AC to pulsating DC. A FWR on the other hand converts both the
cycle of input AC to DC.

In case of HWR, the rectified output contains both AC and DC components. The
presence of AC components in the rectified output is called ripple which needs to be

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removed to generate a pure DC output. This can be accomplished by incorporating a


low pass filter at the rectified out. A capacitor connected in shunt across the load acts
as a low pass filter which allows the DC to pass through it and blocks the AC ripples.
Consequently, the half wave rectified output with much reduced ripples is obtained.
Diode Rectification Process:
An AC signal can be represented by a periodic sinusoidal voltage waveform of period T.
Over one full cycle defined by period T, the average value is zero. The action of the
diode is such as to allow current to flow in only one direction, i.e. when it is forward
biased. Therefore when an alternating waveform is applied to a diode, then it will only
allow conduction over half the waveform. The remaining half is blocked. There are a
number of different configurations of diode rectifier circuit that can be used. These
different configurations each have their own advantages and disadvantages, and are
therefore applicable to different applications.
Half-wave rectifier: This circuit will generate a waveform v0 that will have an average
value of particular use in AC-to-DC conversion process. During the interval t =0 → T/2,
the polarity of the applied voltage vi is such as to forward bias the diode and turn it on.
Substituting the short-circuit equivalence for the ideal diode will result in the
equivalent circuit, where the output signal is an exact replica of the applied signal.

For the period T/2 →T, the polarity of the input vi is such that it reverse biases the
diode producing an “off” state with an open-circuit equivalent. The result is the

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absence of a path for charge to flow, and vo = iR = (0)R=0 V for the period T/2 → T. The
process of removing one-half the input signal to establish a dc level is called half-wave
rectification.
Average voltage calculation:
Let vi=vmSin(ωt)
The average is calculated for a period ‘T’, but output exists for only one half-cycle i.e.
from 0 to T/2. Hence the average voltage can be calculated as :
T /2

 vo t dt
1
vav 
T
0

T /2

 vm Sin t dt m


1 v

T
0

Root Mean Square voltage calculation:


Let vi=vmSin(ωt)
The RMS voltage is calculated for a period ‘T’, but output exists for only one half-cycle
i.e. from 0 to T/2. Hence the RMS voltage can be calculated as :
T /2

 v t dt
1
vRMS  o
T 0

T /2
Sin 2 t dt
1
 v
2
m
T 0

vm

2
The effect of using a silicon diode with VT = 0.7 V instead of ideal diode is that, the
applied signal must now be at least 0.7 V before the diode can turn “on”. For levels of vi
less than 0.7 V, the diode is still in an open circuit state and vo= 0 V.

vm  vT  vm  vT 
Now in such a case: vav  , v RMS 
 2

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PROCEDURE:
1. Connections are made as per the circuit diagram.
2. In case of HWR, a 100 kΩ resistor and a capacitor of 470 µF is taken for
assembling the circuit. The resister is used to limit the current when the diode is
forward biased.
3. The AC input is introduced at the input and the rectified output is observed across
the load.
4. The output is also observed along with the low pass filter.
5. The waveforms are observed for inputs with different amplitude and frequencies.
6. The average and rms values corresponding to each output waveform is calculated

TABULATION AND CALCULATION:


Serial Input peak Input Average output RMS output
no. amplitude frequency voltage voltage
(volts) (Hz) (volts) (volts)

EXPERIMENTAL RESULTS AND ANALYSIS


1. Comment about rectified output with and without low pass filtering.
2. Compare the peak voltage with the average output voltage.
3. Analyze about the presence of the resistance in HWR circuit.

CONCLUSION:

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It may be observed from the output waveform that the half wave rectifier converts
only one half cycles (either positive or negative) of the input AC to pulsating DC. The
capacitor which is connected in shunt across the load operates as a low pass filter. The
capacitor bypasses the AC ripples to the ground and makes DC available at the output.
Since no filter is perfectly ideal, still some AC ripples are available at the output but the
magnitude of AC ripples is considerably reduced. Since the HWR converts only half of
the input AC to DC, its efficiency is less than 50%.

QUESTIONNAIRE:

1) What is difference between peak voltage and average voltage?


2) What do you mean by RMS voltage?
3) What is the relation between RMS and average voltage in case of HWR?
4) What is ripple?
5) What is the difference between DC and pulsating DC?
6) How ripple in HWR can be reduced?
7) What is the efficiency of HWR?
8) What is peak inverse voltage?
9) How the negative half cycle of input AC can be converted to DC?
10) What is the significance of connecting load resistance across the diode?

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AIM OF THE EXPERIMENT: -


Study and implementation of Full-wave rectifier (center tapped/ Bridge) circuit.
OBJECTIVES:
1.
2. To be familiar with Full-wave rectified (center tapped/ Bridge type) waveform
through the circuit diagram
3. Recognize the difference between FWR and HWR
4. Performance evaluation (average values, RMS values, ripple factor and
efficiency) of FWR with and without low pass filter
HARDWARE REQUIRED:
EQUIPMENTS : -
1. Dual Channel DSO
2. Bread Board
3. Connecting Wires
4. Diode 1N4007 (4 No.)
5. Resistor 100 KΩ (1 No.)
THEORY:
A full-wave rectifier (FWR) converts AC to pulsating DC by exploiting the unidirectional
property of semiconductor diodes. It is named so, because it converts both the cycles
of input AC to DC. There are basically two types of full wave rectifiers. They are namely
center-tapped full wave rectifier and bridge rectifier. The center-tapped FWR exploits
two diodes and a center-tapped transformer for AC to DC conversion whereas bridge
rectifier makes use of four semiconductor diodes for this conversion process. However,
both of the rectifiers produce unwanted ripples at the rectified output. Therefore, to
overcome this problem, a low pass filter is used at the output terminal to suppress the
ripples which represents high frequency. Hence, a steady DC is obtained which can be
used by various devices such as radios, mobile phones, computing devices etc.
Diode Rectification Process:

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An AC signal can be represented by a periodic sinusoidal voltage waveform of period T.


Over one full cycle defined by period T, the average value is zero. The action of the
diode is such as to allow current to flow in only one direction, i.e. when it is forward
biased. Therefore when an alternating waveform is applied to a diode, then it will only
allow conduction over half the waveform. The remaining half is blocked. There are a
number of different configurations of diode rectifier circuit that can be used. These
different configurations each have their own advantages and disadvantages, and are
therefore applicable to different applications.
1) Fullwave Centre-tapped Rectifier: The dc level obtained from a sinusoidal input can
be improved 100% using a process called full-wave rectification. Full wave rectifiers
have some fundamental advantages over their half wave rectifier counterparts. The
average (DC) output voltage is higher than for half wave, the output of the full wave
rectifier has much less ripple than that of the half wave rectifier producing a
smoother output waveform. In a Full Wave Rectifier circuit two diodes are now
used, one for each half of the cycle. A multiple winding transformer is used whose
secondary winding is split equally into two halves with a common centre tapped
connection, (C). This configuration results in each diode conducting in turn when its
anode terminal is positive with respect to the transformer centre point C producing
an output during both half-cycles, twice that for the half wave rectifier so it is 100%
efficient as shown below.

Fig. 6.1 Working of center-tapped full wave rectifier

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The full wave rectifier circuit consists of two diodes connected to a single load
resistance (RL) with each diode taking its in turn to supply current to the load. When
point A of the transformer is positive with respect to point C, diode D1 conducts in the
forward direction as indicated by the arrows.
When point B is positive (in the negative half of the cycle) with respect to point C,
diode D2 conducts in the forward direction. The current flowing through resistor RL is in
the same direction for both half-cycles.
Average voltage calculation:
Let vi=vmSin(ωt)
The output is periodic with a periodicity T/2. So the average can be calculated for the
time ‘T/2’. Hence the average voltage is calculated as:

T /2

 vo t dt
1
v av 
(T / 2 )
0

T /2
2 vm
 vm Sin t dt
2

T
0

Root Mean Square (RMS) voltage calculation:
Let vi=vmSin(ωt)
The RMS voltage is calculated for the time ‘T/2’, as the output is periodic with a
periodicity T/2.Hence the RMS voltage can be calculated as :
T /2

 v t dt
1
vRMS  o
(T / 2) 0

T /2
Sin 2 t dt
2
 v
2
m
T 0

vm

2
2vm  vT  v  v 
For practical diode: vav  , v RMS  m T
 2
2) Full wave Bridge Rectifier: Another type of circuit that produces the same output
waveform as the full wave rectifier circuit above is that of the Full Wave Bridge

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Rectifier. This type of rectifier uses four individual diodes connected in a closed
loop "bridge" configuration to produce the desired output. The main advantage of
this bridge circuit is that it does not require a special centre tapped transformer,
thereby reducing its size and cost.

Fig. 6.2 working of full wave bridge rectifier


The four diodes labeled D1 to D4 are arranged in "series pairs" with only two diodes
conducting current during each half cycle. During the positive half cycle of the supply,
diodes D1 and D2 conduct in series while diodes D3 and D4 are reverse biased, and
vice-versa for the negative half cycle.

Fig. 6.3 Flow of current during positive and negetive half cycle

As the current flowing through the load is unidirectional, so the voltage developed
across the load is also unidirectional.
2vm  vm 
For ideal diodes: vav  , v RMS 
 2
2vm  2vT  vm  2vT 
For practical diodes: vav  , v RMS 
 2
The Smoothing Capacitor Filter: The output of both the rectifiers has been a pulsating
unidirectional DC. The output required is a constant steady DC voltage. The DC value in

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full wave rectifier is more than in half wave rectifier. We can further increase its
average DC output level higher by connecting a suitable smoothing capacitor across the
output load.

Fig. 6.4 Rectified output waveform with and without capacitor


PROCEDURE:
1. Connections are made as per the circuit diagram.
2. The AC input is introduced at the input and the rectified output is observed
across the load with and without a low pass filter.
3. The waveforms are observed for inputs with different amplitude and
frequencies.
4. The average and rms values corresponding to each output waveform is
calculated.
TABULATION AND CALCULATION:
Input amplitude Input frequency Average output voltage RMS output voltage
(volts) (Hz) (volts) (volts)

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EXPERIMENTAL RESULTS AND ANALYSIS


1. Comment about rectified output with and without low pass filtering.
2. Compare the peak voltage with the average output voltage.
3. Comparison of FWR with the performance of HWR

CONCLUSION:
It may be observed from the output waveform that the full wave rectifier converts
both the cycles of the input AC to pulsating DC. The capacitor which is connected in
shunt across the load operates as a low pass filter. Hence, it reduces the ripple
significantly in the rectified output. It may also be perceived that FWR has twice the
average output voltage and better RMS voltage than half wave rectifier (HWR). In
addition, it has improved efficiency in comparison to HWR. Hence, FWR has an overall
better performance than HWR and therefore is preferred in the design and
implementation of power supply units.

QUESTIONNAIRE:
1) What is the drawback of center-tapped FWR?
2) What are the differences between center-tapped FWR and bridge rectifier?
3) What is the relation between RMS and average voltage in case of FWR?
4) Which FWR is suitable for high voltage applications and why?
5) What is center-tapped transformer?
6) How ripple in FWR can be reduced?
7) What is the efficiency of FWR?
8) What is peak inverse voltage (PIV) and what would be the PIV in case of center-
tapped FWR and bridge rectifier?
9) How a negative full wave rectified voltage can be obtained at the output?
10) Differentiate between HWR and FWR?

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AIM OF THE EXPERIMENT


Study of static input and output characteristics of BJT in CE configuration.
OBJECTIVES:
 To know about BJT fundamentals and its configurations
 To be familiar about experiment setup of Input and output characteristics
 To plot input/output characteristics
 To calculate the input/output resistance at a given operating condition.

HARDWARE REQUIRED:
1. Universal trainer kit
2. DC Ammeter
3. DC Voltmeter
4. Connecting wires
5. Transistor
6. Resistor

THEORY:
A transistor is a current control bipolar device which is widely used as an amplifier
when operated in active region and is used as a switch if operated in saturation and
cut-off regions. In case of transistor, both majority and minority charge carriers are
involved for the flow of current and hence is called bipolar junction transistor (BJT) or
simply bipolar transistor. Transistor is basically a three layered semiconductor device
which is formed by placing a p-type semiconductor in between two layers n-type
semiconductors and vice versa. Hence, there are two types of transistor. The former is
called npn transistor and the later is called pnp transistor.
A transistor has three terminals and two junctions. The three terminals are
named as emitter, base and collector. The two junctions are namely emitter-base and

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base-collector junction. The junction between the emitter and base is called base-
emitter junction. Likewise, the junction between base and collector is called base-
collector junction. In order to operate a transistor in active region which meant for
amplification in CE configuration, the emitter-base junction is forward biased and base-
collector junction is reverse biased. A transistor can be used in a circuit in the following
three configurations.
1. Common Base Configuration (CB Configuration)
2. Common Emitter Configuration (CE Configuration)
3. Common Collector Configuration (CC Configuration)
In case of common emitter (CE) configuration, the input is introduced across base and
emitter and the output is taken across collector and emitter. Since the emitter is
common in between input and output, this type of configuration is called as common
emitter configuration. The CE configuration is generally preferred in amplifier because
of very high current gain.

Experiment Setup for Input and output characteristics


INPUT CHARACTERISTICS:
The input characteristics in CE configuration is the characteristics plot between
base to emitter voltage (Vbe) and base current (Ib) with a constant value of collector to

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emitter voltage (Vce). A family of input characteristics plots between V be and Ib can be
obtained for different values Vce as illustrated in the following figure. Here the input
characteristics are plotted without introducing any AC signal and hence the
characteristics become stationary and so are called static characteristics. The input
characteristics plot resembles the diode characteristics in the forward biased condition
because the emitter-base junction in CE configuration is forward biased and base-
collector junction is reversed biased.
The input resistance in CE configuration at particular value of V be is obtained by
taking the ratio base to emitter voltage with respect to the corresponding base current,
Ib. Since the input resistance is very low in CE configuration, a small change in voltage
level can generate considerable variations in the input current, Ib which intern
significantly varies the output current Ic by times meant for proper amplification of
weak signals. The is called current gain in CE configuration.

Experimental setup for input Input characteristics of a BJT in


characteristics: CE mode

PROCEDURE:
Input characteristics of BJT in CE Configuration
1. Connections are made as per the circuit diagram. The input resistance of 4.7KΩ
and output resistance of 1KΩ is taken here for this experimental set-up. The
transistor BD115 is used in this circuit as per the availability.

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2. Keep the collector voltage (Vce) constant at 5v, 10v and 15v to obtain a family of
input characteristics plot.
3. For each value of Vce, vary VS1 such that Vbe is increased stepwise and note
down the corresponding base current Ib.
4. From these readings, draw the graph Vbe versus Ib for each value of VS1. This will
give input characteristic of BJT in CE Configuration.
5. The input resistance at any particular value of Vs1 is obtained by taking the ratio
of Vbe with respect to the corresponding input current Ib.
TABULATION AND CALCULATION:
Input characteristics
Sl. Vce=1V Vce=10V
No. Vbe in volts Ib in µA Vbe in volts Ib in µA

EXPERIMENTAL RESULTS AND ANALYSIS OF INPUT CHARACTERISTICS


1. Obtain the families of input characteristics curves.
2. Comment about shape of the characteristics plot.
3. Comment about the calculated input resistance and its significance.

OUTPUT CHARACTERISTICS:
The output characteristics plot of BJT represents the variation of output
collector current, Ic with respect to the variation of collector to emitter voltage, V ce for
a constant value of input current, Ib. A family of output characteristics plots is obtained
by plotting Ic with respect to Vce for different values of Ib. In order to maintain constant
value of Ib the input source voltage VBB is kept fixed and at the same time, the output
voltage source Vcc is varied in order to obtain the output characteristics plot as
illustrated in the figure. Since no AC signal is introduced for determining the output
characteristics, the characteristics is found to be stationary and hence is termed as
stationary output characteristics as illustrated in the following figure.

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Experimental setup for output Output characteristics of a BJT in


characteristics CE mode

PROCEDURE:
1. Connections are made as per the circuit diagram. The input resistance of 4.7KΩ
and output resistance of 1KΩ is taken here for this experimental set-up. The
transistor BD115 may be used in this circuit as per the availability.
2. The base Current (Ib) is kept constant at 50A, 60A and 70A.
3. For each value of Ib vary VS2 such that Vce is increased stepwise and note down
the corresponding collector current Ic.
4. From these reading, draw the graph Vce Versus Ic for each value of Ib. This will
give output characteristic of BJT in CE configuration.
5. At a particular value of Vs2, the output resistance is computed by taking the
ratio of collector to emitter voltage with respect to output current, Ic.
TABULATION AND CALCULATION:
Output characteristics:

Sl. Ib=40 uA Ib=70 uA


No. Vce in volts Ic in mA Vce in volts Ic in mA

EXPERIMENTAL RESULTS AND ANALYSIS OF OUTPUT CHARACTERISTICS.


1. Obtain the families of output characteristics curves.
2. Comment about the shape of the output characteristics plot.
3. Comment about the calculated output resistance and its significance.

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CONCLUSION:
The input characteristics of the transistor in CE configuration resemble the diode
forward characteristics because in this configuration, the base-emitter junction is
forward biased. In addition, in this configuration, the input resistance is found to be
very less. Since the input resistance is very low, a small change in voltage level can
generate considerable variations in the input current, Ib which intern significantly varies
the output current Ic meant for proper amplification of weak signals.
It may be well perceived from output characteristics that the output current,
Icsaturates irrespective of variations in Vce. In addition, the variation of collector current
only depends on the change in the base current Ib and therefore the transistor is called
as a current control device. The saturation of Icwith respect to Vce indicates that the
output resistance of the transistor is high which is conducive for faithful amplification
of signals.
QUESTIONNAIRE:
1. Draw and explain the working of a PNP junction transistor?
2. Name the types of charge carriers.
3. What do you understand by hole current?
4. Which is the majority charge carrier in case of a PNP transistor?
5. What do you understand by biasing and why is biasing important?
6. Name the types of biasing circuits.
7. What is the minimum base-emitter voltage required to drive a common emitter
silicon transistor?
8. Draw the input characteristic graph of a PNP transistor.
9. Draw and explain the working of a NPN junction transistor?
10. Why BJT is called a bipolar device?
11. What do you understand by hole current?
12. Which is the majority charge carrier in case of a NPN transistor?
13. What is CB configuration and define the current gain in this configuration?
14. What is the range of current gain in CB configuration?
15. What is the relation between α and β?
16. What is the advantage of CE configuration over CB configuration?
17. What is CC configuration and mention about its significance?
18. What is faithful amplification?

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AIM OF THE EXPERIMENT:


Study of a BJT based fixed bias circuit and determination of its load line and the
operating point.
OBJECTIVE:
 Understand and analyze the concept of fixed bias configuration
 Implement this configuration to plot the output characteristics
 Calculate and draw the DC load line for a given operating condition
 Determine the operating point
HARDWARE REQUIRED:
1. Bread Board
2. Connecting Wires
3. Resistor RB=240KΩ (1 No.), Rc=2 KΩ (1 No.)
4. BJT

THEORY:
Transistor biasing is a process of applying DC potential to a transistor in order to
operate it in the active region so that faithful amplification of a weak signal can be
possible. The DC bias across the transistor is applied in such a way that the base
emitter junction is forward biased and the base collector junction is reverse biased.
Consequently, the operating point lies at the middle of the linear region of the
transistor output characteristics. If these conditions are violated then the operating
point switches to saturation or cut-off regions causing distortion in the amplified
output waveform. So, proper maintenance of collector current, Ic and collector to
emitter voltage VCE is essential to operate a transistor in active / linear region which is
possible only through transistor biasing. In addition, transistor biasing improves the
thermal stability of a transistor and avoids thermal breakdown.
There are different types of biasing circuits such as fixed bias, voltage divider bias, fixed
bias with collector feedback etc. The fixed bias circuit is simplest biasing circuit amongst
all whereas the voltage divider bias is the widely used biasing circuit. The fixed bias circuit

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is named so because the load current, Ic depends on fixed parameters and hence found
to be constant. The stability factor of fixed bias circuit is high which indicates poor
stability. The circuit diagram of fixed biased circuit is given as follows.
Fixed Biased Circuit

xd
In case of this fixed biased circuit, the base resistance RB is chosen as 240 KΩ and the
collector resistance RC is chosen to be 2 KΩ. Since the value of RB is greater than RC, the
voltage drop across RB is more than the voltage drop across RC. Therefore the voltage at
base is less than the voltage at the collector terminal. So, the base emitter junction is
forward biased and base collector junction is reverse biased to operate the Q-point
within the active region.
In fixed bias configuration, the operating point can be determined by finding out the
collector current and collector to emitter voltage. They can be determined by applying
KVL in the input and output circuit.
Applying KVL in the base-emitter loop:
VCC  I B RB  VBE  0
VCC  VBE (9.1)
 IB 
RB
The VCC, VBE and RB are constant terms and the base current, IB depends on all these
parameters and so is constant. Since the collector current is equal to β time of the base
current, is also constant. Where, β is called current gain in common emitter configuration.
I C  I B (9.2)
Output characteristics of a BJT in CE mode

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Now, using KVL in the collector emitter loop:


VCC  I C RC  VCE  0
(9.3)
 VCE  VCC  I C RC

The supply voltage, VCC and the collector current, IC are fixed in the fixed biased circuit
according to (9.2). VCE can be determined by choosing a suitable value of RC using (9.3)
and therefore is constant. Hence, the operating point, (VCE, Ic) is found to be static in
the output characteristics and the corresponding load line is also static. The load line is
therefore called static load line which can be determined on the output characteristics.
The two end point of the static load line can be obtained by solving the output
equation which is illustrated below. Applying KVL at the output circuit,

It may be observed from (9.4) that the collector current becomes maximum when V CE
becomes zero and hence the maximum value of collector current is given by,

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The maximum collector current, gives the locus of one of the end point of DC
load line at y-intercept and is given by

Similarly, the x-intercept of the DC load line can be obtained by putting in the
output expression. So the another end point of the DC load line at x-intercept is given by,

Once both the end point of the DC load line is determined, the location of the operating
point is found out at the middle of the load line using the following expression.

)=( (9.6)

PROCEDURE:
1. Connections are made as per the circuit diagram.
2. Plot the output characteristics for a given value of base current, I B.
3. Determine the locus of the y-intercept (0, ICmax) of the DC load line by
substituting VCE=0 in the output equation.
4. Likewise, determine the x-intercept (VCEmax, 0) of the DC load line by
substituting IC=0 in the output equation.
5. Determine the operating point using (9.6).
TABULATION AND CALCULATION:
Output Characteristics
Sl. Ib=40 uA Q-point 1 Ib=70 uA Q-point 2
No. Vce in volts Ic in mA Locus Vce in volts Ic in mA Locus

EXPERIMENTAL RESULTS AND ANALYSIS


1. Determine the two end points of DC load line for a given operating condition.
2. Determine the Q-point.
3. Comment about the location of Q-point in the output characteristics and
mention about its significance

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CONCLUSION:
It may be concluded from the above experiment that to operate the transistor in active
region, the base emitter junction should be forward biased and the base emitter
junction should be reversed biased. In order to achieve this condition, the base
resistance is chosen higher than the collector resistance so that the desired base and
collector current is obtained to operate the Q-point in the active region. In addition,
the design of fixed bias circuit is simple because we need to estimate the values of only
two resistors.

QUESTIONNAIRE:

1. What is transistor biasing?


2. What are the advantages of transistor biasing?
3. Whether biasing is required to operate the transistor as a switch?
4. What is operating point of a transistor?
5. How many types of biasing circuits are available?
6. What is fixed bias circuit and why it is named so?
7. How the base resistance and collector resistance of a fixed biased circuit is
selected?
8. What is load line?
9. What are the differences between AC and DC load line?
10. Comment about the stability of a fixed bias circuit.

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AIM OF THE EXPERIMENT


Study of static characteristics of FET in CS configuration.
OBJECTIVE:
1. To be familiar about the construction and working principle of JFET.
2. Compute the values of dynamic resistance (rd) from drain (output) characteristics.
3. Determine the value of trans-conductance (gm) from the transfer characteristics.
HARDWARE REQUIRED:
1. DC Regulated Power supply (0 - 30 V)
2. Multi-meters
3. JFET (BFW11/ BFW10)
4. Resistor 1KΩ ,10KΩ
THEORY:
The Field Effect Transistor or Simply FET uses the voltage that is applied to their input
terminal, called the Gate to control the current flowing through them resulting in the
output current being proportional to the input voltage, the Gates to source junction of
the FET is always reversed biased. As their operation relies on an electric field (hence
the name field effect) generated by the input Gate voltage, this then makes the Field
Effect Transistor a “VOLTAGE” operated device.
The Field Effect Transistor is a three terminal unipolar semiconductor device that has
very similar characteristics to those of their Bipolar Transistor counterpart’s i.e., high
efficiency, instant operation, robust and cheap and can be used in most electronic
circuit applications to replace their equivalent bipolar junction transistors (BJT).

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JFET Schematic Diagram


The Field Effect Transistor has one major advantage over its standard bipolar transistor,
in that input impedance, (Rin) is very high, (thousands of Ohms). This very high input
impedance makes them very sensitive to input voltage signals. There are two basic
configurations of junction field effect transistor, the N-channel JFET and the P-channel
JFET. The N-channel JFET’s channel is doped with donor impurities meaning that the flow
of current through the channel is negative (hence the term N-channel) in the form of
electrons. A FET is a three terminal device, having the characteristics of high input
impedance and less noise, the Gate to Source junction of the FET is always reverse
biased. In amplifier application, the FET is always used in the region beyond the pinch-off.
The characteristics curve:

The characteristics curves example shown above shows the four different regions of
operation for a JFET and these are given as:
Ohmic Region: When VGS =0, the depletion layer of the channel is very small and the
JFET acts like a voltage controlled resistor.
Cut-off region: This is also known as the pinch-off region where the Gate Voltage, VGS
is sufficient to cause the JFET to act as an open circuit as the channel resistance is at
maximum.
Saturation or Active Region: The JFET becomes a good conductor and is controlled by the
Gate-Source voltage, (VGS) while the Drain-Source voltage, (VDS) has little or no effect.
Breakdown Region: The voltage between the Drain and the Source, (VDS) is high
enough to causes the JFET’s resistive channel to break down and pass uncontrolled
maximum current.

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In response to small applied voltage from drain to source, then n-type bar acts as
simple resistor, and the drain current increases linearly with VDS. With increase in ID
the ohmic voltage drop between the source and the channel region reverse biases the
junction and the conducting position of the channel begins to remain constant. The
VDS at this instant is called “pinch of voltage” (see figure). If the gate to source voltage
(VGS) is applied in the direction to provide additional reverse bias, the pinch off voltage
is decreased.
Transfer characteristics are useful in evaluating the operating conditions of an FET. The
drain current expression is given as

CIRCUIT DIAGRAM:

Circuit diagram of FET characteristics O/P Characteristic of FET

PROCEDURE:
1. All the connections are made as per the circuit diagram.
2. To plot the drain characteristics keep VGS constant at 0V.
3. Vary the VDD and observe the values of VDS and ID.
4. Repeat the above steps 2, 3 for different values of VGS at 0.1V and 0.2V.
5. All the readings are tabulated.
6. To plot the transfer characteristics, keep VDS constant at 1V.
7. Vary VGS and observe the values of VGS and ID.
8. Repeat steps 6 and 7 for different values of VDS at 1.5V and 2V.
9. The readings are tabulated.10. From drain characteristics, calculate the values of
dynamic resistance (rd) by using
10. From transfer characteristics, calculate the value of transconductance (gm) By
using the

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TABULATION AND CALCULATIONS:


DRAIN CHARACTERISTICS:
S. No. Vgs=0v Vgs=-1v Vgs=-2v
Vds(in volt) Id(in mA) Vds(in volt) Id(in mA) Vds(in volt) Id(in mA)

TRANSFER CHARACTERISTICS:
S. No. Vds=0.5v Vds=1v Vds=1.5v
Vgs(in volt) Id(in mA) Vgs(in volt) Id(in mA) Vgs(in volt) Id(in mA)

SIMULATION RESULT AND ITS ANALYSIS:


The value of dynamic resistance from drain characteristics and the value of trans-
conductance from transfer characteristics need to be calculate.

CONCLUSION:

QUESTIONNAIRE:
1. Why FET is called as uni-polar device?
2. What are the advantages of FET?
3. What is trans-conductance of FET?
4. What are the disadvantages of FET?
5. Relation between µ, gm and rd?
6. Why a FET is said to be a voltage controlled device?
7. What is pinch off voltage?
8. What do mean by Schockley’s Equation?
9. What do mean by drain resistance in FET?
10. What is the difference between n-channel FET and p-channel FET?

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AIM OF THE EXPERIMENT:


Study and implementation of Inverting and non-inverting Amplifier using Op-AMP.
Objective:
1. Identify the basics of Op-Amp and its working principle with pin configurations.
2. Design and realize different operations such as Inverting and Non-Inverting
using Op-Amp.
3. Measure the Output voltage & Gain of realized operation

HARDWARE REQUIRED:

1. Dual channel DSO - 1 no.


2. Universal trainer kit - 1 no.
3. Function generator - 1 no.
4. Connecting wires - As per requirement
5. Op-Amp - IC-741 - 1 no.
6. Resistance - 10kΩ, 1kΩ

THEORY:
 Op-Amp stands for operational amplifier. It was originally the name of the
circuit used for carrying out different mathematical operation (Addition,
subtraction, differentiation, integration etc.)
 It is a linear analog IC. Fabricated with ‘Si’.
 It is a very high gain differential amplifier with high input impedance and low
output impedance.

Equivalent circuit of an Op-Amp : -

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Vo = A Vd i.e.
Vo = A (V1-V2)
A = Open loop gain
Vd = Differential input voltage
Vd = V1-V2
Symbol of Op-Amp : - Pin configuration : -

Virtual Ground: -
A point in any circuit is said to be grounded it the potential at that point is equal to the
ground potential.
If the point is connected to the ground with help of any conducting wire, then all the
current from that point flows towards the ground, the point is said to be physically or
mechanically ground.
Virtual means ‘not actual’. So in ‘virtual ground’, the point is not physically connected
to the ground but the potential at that point becomes same as ground potential.
The concept of ‘virtual ground’ is based on an ideal Op-Amp i.e. voltage gain of an ideal
Op-Amp is infinite and input impedance is infinite.

1. Since Rin (Input impedance)= ∞, Ii  0


i.e. Iin  If

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2. Since, Ad is infinite,
Ad = V0/Vd │ where Vd = V1 – V2
 Vd = V0/Ad
 Vd = V0/∞
 Vd = 0
 V1 – V2 = 0
 V1 = V2
Since V1 = 0 (ground)
 V2  0
 Potential at point ‘X’ is zero although it is not connected to ground physically. So
this concept is called virtual ground.
Application of Op-Amp :
1. Inverting Amplifier
Above figure shows the schematic diagram of an
ideal Op-Amp. In this the feedback is connected
from the output to the inverting terminal. Input
signal is also applied at the inverting terminal.
Considering Op-Amp to be ideal, Input impedance
Rin = ∞.
So input current through Op-Amp is zero.
I1 = I2
Vi  V g V g  Vo
 
R1 Rf

According to virtual ground concept,


Vg = 0
Vi  V o
 
R1 Rf

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 R f Vi
 Vo 
R1
If RF = R1, Vo = -Vi
Since the output voltage is –ve of input voltage it is called inverting amplifier.
For experiment R1=1kΩ , R2=10kΩ
2. Non Inverting Amplifier
 Fig (3) shows an Op-Amp circuit that works as a non-inverting amplifier or
constant multiplier.

 In non-inverting amplifier, input voltage is directly applied to the non-


inverting terminal.
 Since it is ideal Op-Amp, input current Ii = 0.
 So potential Vx = Vi
Since Ii = 0
 I1 = If
0  V x V x  Vo
 
R1 Rf
0  V1 V1  Vo
  (Since Vx = V1)
R1 Rf
 V1 V1 Vo
  
R1 Rf Rf

Vo V V  1 1 
  1  1  V1   
Rf R f R1 R 
 f R1 

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 R  Rf 
 Vo  V1 .R f  1 
 RR 
 1 f 

 Rf 
 Vo  1  V1
 R1 

It is clear that output voltage is proportional to the voltage at the non inverting
terminal V1. So it is called non-inverting amplifier.
For experiment R1=1kΩ, R2=10kΩ; and R1=1kΩ, R2=1kΩ
3. Summing Amplifier
There are a number of applications where it is useful to produce the sum, or more
generally the weighted sum, of two or more signals. One example is the mixer system
in a recording or broadcast studio where various sources (microphones, CD players,
etc.) are combined to produce the final mix for the track or program.

The inverting amplifier configuration we used makes this very easy to do, just add
another resistor to the inverting (-) input of the op amp:

Fig. Summing Amplifier


A quick analysis shows that , i.e. the output is a weighted sum

of the inputs. The key is to notice that the current flowing in RF must be (by KCL) equal
to the sum of the currents in R1 and R2. For this reason, the node of an op amp circuit
which is connected to the inverting input is sometimes referred to as the summing
junction. This summation can be extended to any number of inputs.
PROCEDURE :
1) Design the circuit as per circuit diagram.

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2) Connect VCC, VEE, GND at proper terminal.

3) Set the signal generator at proper range.

4) Check the connections of the Op-Amp properly before switch on the supply.

5) Apply the signal (sine, square, ramp etc.) at the input terminal of the circuit.

6) Test the circuit by applying the input signal of suitable amplitude (say 1V
peak to peak) from a function generator. Observe the output waveform on
the CRO and determine actual gain.

7) For Summing Amplifier Experiment, R1 = R2 = 1KΩ, RF = 10KΩ,V1 = 1Vp-p


(Sinusoidal) and V1 = 3Vp-p (Sinusoidal).

8) Measure the output voltage using CRO.

9) Trace the output waveform of different circuits.

TABULATION AND CALCULATIONS:


(a) Inverting Amplifier
Input Input Voltage Output Practical Theoretical % error
Frequency in (Vi) (p-p) in Voltage (VO) Gain (VO/Vi) Gain (VO/Vi)
kHz Volts (p-p) in Volts

(b) Non-Inverting Amplifier


Input Input Voltage Output Practical Theoretical % error
Frequency in (Vi) (p-p) in Voltage (VO) Gain (VO/Vi) Gain (VO/Vi)
kHz Volts (p-p) in Volts

(c) Summing Amplifier


Input Frequency Input Voltage Input Voltage Output Theoretical % error
in kHz (V1) (p-p) in (V2) (p-p) in Voltage (VO) Output

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Volts Volts (p-p) in Volts Voltage

RESULT AND ITS ANALYSIS:


The basic op-amp circuits of inverting, non-inverting and summing amplifiers were
designed and output waveforms were obtained in a CRO. The output voltages and
gains need to be calculated.

CONCLUSION :

QUESTIONNAIRE:
1. Difference Amplifier (subtractor)
2. For our two inputs, use the function generator for v1 and the dynamic
microphone for v1. The earpiece produces a comfortably loud output with a
signal of about 1 V p-p. Choose the value of R2 required to give a 1 V p-p output
when speaking into the microphone in a normal tone of voice.
3. Mention some of the linear applications of Op-Amps?
4. Mention some of the non – linear applications of Op-Amps?
5. What happens when the common terminal of V+ and V- sources is not grounded?
6. What are the ideal characteristics of an op-amp?
7. What is a comparator?
8. What is duty cycle?
9. What is slew rate? What are its units?
10. Write some application name of summing amplifier.

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EXPERIMENT-11

AIM OF THE EXPERIMENT:


Study and implementation of Differentiator and Integrator Amplifier using Op-AMP.
OBJECTIVES:
1. Understand the concept of Differentiator using Op-Amp
2. Understand the concept of Integrator using Op-Amp
3. Observe the output waveform for both Differentiator and Integrator

HARDWARE REQUIRED:
1. DSO - 1 no.
2. Universal trainer kit - 1 no.
3. Function generator - 1 no.
4. Connecting wires - As required
5. Op-Amp - IC-741 - 1 no.
6. Capacitor – 0.1µF - 1 no.
7. Resistance - 10kΩ, 1kΩ
THEORY:
 Op-Amp stands for operational amplifier. It was originally the name of the
circuit used for carrying out different mathematical operation (Addition,
subtraction, differentiation, integration etc.)
 It is a linear analog IC. Fabricated with ‘Si’.
 It is a very high gain differential amplifier with high input impedance and low
output impedance.
Equivalent circuit of an Op-Amp : -
Non-inverting terminal
Vo = A Vd i.e.
Vo = A (V1-V2)
A = Open loop gain
Vd = Differential input voltage
Vd = V1-V2

Inverting terminal

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EXPERIMENT-11

Symbol of Op-Amp : - Pin configuration : -

Application of Op-Amp:
1. Integrator

Assuming ideal Op-Amp, taking virtual ground into account,


Ii = If
Vi  V g d
 C (V g  Vo )
R1 dt

Vi  0 d
 C (0  V o )
R1 dt

( Vg = 0, virtual ground)
V1 d
  C Vo
R1 dt

1
 dv 0   V1 dt
R1C

1
 Vo  
R1C V1 dt

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EXPERIMENT-11

From the above expression, it is clear that output voltage is –ve of integration of
the input voltage. Therefore, Op-Amp is used as an integrator.

1
 Vo  
R1C1 V i dt

Integrated Output

 (impulse)dt  step
 (step)dt  ramp
For experiment R=1kΩ, C=0.1µF
2. Differentiator :-

If we interchange the position of R & C of the integrator circuit we get the


differentiator circuit.

Assuming ideal Op-Amp and taking virtual ground concept into account, we have I1 = If.

d V g  Vo
C (V1  V g ) 
dt R

But Vg = 0, due to virtual ground.


d 0  Vo
C (V1  0) 
dt R
dV1 V
C  o
dt R
dV1
 Vo   RC
dt

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EXPERIMENT-11

From the above equation, the output voltage is proportional to the time rate change of
input voltage. Hence Op-Amp is used as a differentiator.

For experiment R=1kΩ , C=0.1µF

Differentiated output
dV
 Vo   RC 1
dt
d
(ramp)  step
dt
d
( step)  inpulse
dt
If we apply a constantly changing signal such as a Square-wave, Triangular or Sine-wave
type signal to the input of a differentiator amplifier circuit the resultant output signal
will be changed and whose final shape is dependent upon the RC time constant of the
Resistor/Capacitor combination.

1 The Output waveforms obtain from the differentiator with respective input
waveforms

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EXPERIMENT-11

PROCEDURE :

1) Design the circuit as per circuit diagram.

2) Connect VCC, VEE, GND at proper terminal.

3) Set the signal generator at proper range.

4) Check the connections of the Op-Amp properly before switch on the supply.

5) Apply the signal (sine, square, ramp etc.) at the input terminal of the circuit.

6) Measure the output voltage using CRO.

7) Trace the output waveform of different circuits.

INTEGRATOR:
1. Set up the integrator circuit as shown in figure. Give a rectangular wave of ±1V (2V
pp) and 1 kHz frequency at the input and observe the input and output
simultaneously on CRO.
2. Vary the dc offset of the square wave input and observe the difference in the
output waveform.
3. Repeat the experiment by feeding triangular wave and sine wave at the input and
observe the output.

DIFFERENTIATOR:
1. Set up the differentiator circuit as shown in figure. Give a rectangular wave of ±1V
(2V pp) and 1 kHz frequency at the input and observe the input and output
simultaneously on CRO.
2. Repeat the experiment by feeding triangular wave and sine wave at the input and
observe the output.
RESULT AND ITS ANALYSIS:
Observe the Differentiator and Integrator output on the CRO fill the given table

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EXPERIMENT-11

INTEGRATOR:
Sl. Time Output Time
Input Waveform Amplitude Amplitude
No period waveform period
1 Rectangular wave (1KHz) 1ms 2Vp-p
2 Sine wave (1KHz) 1ms 2Vp-p

DIFFERENTIATOR:
Sl. Time Output Time
Input Waveform Amplitude Amplitude
No period waveform period
1 Triangular wave (1KHz) 1ms 2Vp-p

2 Sine wave (1KHz) 1ms 2Vp-p

CONCLUSION :

QUESTIONNAIRE:
1. Define integrator.
2. Define differentiator.
3. Write down output voltage formula for the integrator.
4. Write down output voltage formula for the differentiator.
5. What is the output of the differentiator for square wave input?
6. What are the problems in an ordinary op-amp differentiator? What are the
changes in the circuit of the practical differentiator to eliminate these problems?
7. What are the problems in an ordinary op-amp Integrator? What are the changes
in the circuit of a practical integrator?
8. What is a lossy integrator?
9. How a sine wave and cosine wave can be discriminated?
10. Why integrators are preferred over differentiators in electronic circuits?

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EXPERIMENT-12

AIM OF THE EXPERIMENT:


Study and implementation of R.C phase shift Oscillator using Op-AMP.

OBJECTIVE:
1. To be familiar with concepts of amplifiers and oscillators
2. Recognize the conditions of oscillator
3. Design of RC phase shift oscillator using OP-Amp and calculate the resonant
frequency.

HARDWARE REQUIRED:
1. Equipments – CRO
2. Resistors – R1 , R2 , R3 =100 ohm, R4 = 10 K Potentiometer
3. Capacitors- C1 = C2 = C3 = 0.1 µF
4. IC – OP-AMP IC- 741
5. Miscellaneous – Bread board and wires

THEORY:

 RC phase shift oscillator is a sinusoidal oscillator used to produce sustained well


shaped sine wave oscillations.
 It is used for different applications such as local oscillator for synchronous
receivers, musical instruments, study purposes etc.
 The main part of an RC phase shift oscillator is an op amp inverting amplifier
with its output feed back into its input using a regenerative feedback RC filter
network, hence the name RC phase shift oscillator.
 By varying the capacitor, the frequency of oscillations can be varied.
 The feedback RC network has a phase shift of 60 degrees each, hence total
phase shift provided by the three RC network is 180 degrees.
 The op amp is connected as inverting amplifier hence the total phase shift
around the loop will be 360 degrees. This condition is essential for sustained
oscillations.

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EXPERIMENT-12

Use Of RC Stages
Number of RC stages help improve the frequency stability. The total phase shift
introduced by the feedback network is 180 degrees, if we are using N RC stages each
RC section provide 180/N degree phase shift.
When 2 RC sections are cascaded, the frequency stability is low. For 3 sections
cascaded the phase change rate is high so there is improved frequency stability.
However for 4 RC sections there is a good phase change rate resulting in the most
stable oscillator configuration. But 4 RC sections increases cost and makes circuit
complexity.
Hence phase shift oscillators make use of 3 RC sections in which each section provides
a phase shift of 60 degree. The latter is generally used in high precision applications
where cost is not much regarded and only accuracy plays a major role.
Frequency of oscillation (f)

PROCEDURE:
 Collect all the required equipments from the laboratory.
 Connect the IC, capacitors and the resistors as per the circuit diagram on the
Breadboard.
 Before connecting the source voltage, Switch ON the kit and adjust the V CC at
12volt through Multimeter from 0 to 30 volt variable voltage source with
respect to ground point of the trainer kit.

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EXPERIMENT-12

 Before measurement check all the circuit connection and verify it through
concerned faculty.
 Vary the potentiometer 10k to get proper oscillation and compare it with the
calculated frequency.
 Trace the wave from at each test point i.e., at the output of op-Amp at each RC
stage with help of CRO.
TABULATION AND CALCULATIONS:

Parameter Frequency
Theoretical Value
Practical Value
% of Error

CONCLUSION:

QUESTIONNAIRE:
1. What is an oscillator? What kind of feedback is used in oscillator circuits?
2. What is the Barkhausen’s criterion for sustained oscillation?
3. What is the phase shift provided by each RC network?
4. What is the phase shift provided by OP-AMP?
5. What is the frequency of RC phase shift oscillator?
6. What are the applications of RC phase shift oscillators?
7. Why phase shift oscillator uses three RC pairs?
8. Can RC phase shift oscillator can be designed using 4 RC pairs?
9. What is formula for frequency of oscillations for RC phase shift oscillator?
10. Why three RC sections are used in the feedback for RC phase shift oscillator?

Department of Electronics & Communication Engineering Page 66


EXPERIMENT-13

AIM OF THE EXPERIMENT:


Study and simulation of BJT input and output characteristics using OrCAD PSpice.
OBJECTIVES:
1. To learn to realize the BJT CE amplifier using OrCAD PSpice
2. Plot the input and output characteristics of BJT in CE configuration
3. Calculate the input and output resistance at a given operating condition
SOFTWARE REQUIRED:
OrCAD PSpice
THEORY:
When a Bipolar Junction Transistor (BJT) is used as an amplifier, we get an AC output
which is a raised in level version of input AC signal. But the improved output AC power
level is the result of a transfer of energy from the applied DC supplies. In addition, a
linear operation is required for the amplification purpose, i.e. we need a linear
amplifier so that the output is a faithful amplified version of the input signal (faithful
means that the shape of output waveform should be same as the input wave-shape,
only size may differ). The DC current and voltage levels decide the region of the device
characteristics where the BJT may operate. For faithful amplification, we must have the
operating point in the linear region of the device characteristics. Once the desired DC
current and voltage are defined, a
network must be constructed that will
establish that desired operating point,
this designing process being called as
DC biasing of BJT. Hence the operating
point (or Q-point) is the point of
intersection of device characteristics
and the network characteristics.

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EXPERIMENT-13

PROCEDURE:
 Open ‘Capture CIS’ from the Desktop.
 Create a new Project (File  New  Project).
 Give a project name, then Select a project location “C:\PSpice\{YourName}”,
then chose “Analog or Mixed A/D” type of project then click OK.
 Select “Create a blank Project”, then click OK.
 Place Different required components Using “Place  PSpice Component “and
place components.
 Connect all components as per the circuit diagram.
Then Go to PSpice – New simulation Profile and give a name and allow simulation
process to go-on.
 After Simulation chose the voltage and current button to show the current and
voltage value on the circuit.
CIRCUIT DIAGRAM:

RESULT AND ITS ANALYSIS:


Input Characteristics
Sl. Vce=1V Vce=10V % Error
No. Vbe Ib Vbe Ib

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EXPERIMENT-13

Output Characteristics
Sl. Ib=40 uA Ib=70 uA % Error
No. Vce Ic Vce Ic

Experimental - Theoritical
% Error = ×100
Theoritical

CONCLUSION:

QUESTIONNAIRE:
1. Draw and explain the working of a PNP junction transistor?
2. Name the types of charge carriers.
3. What do you understand by hole current?
4. Which is the majority charge carrier in case of a PNP transistor?
5. What do you understand by biasing and why is biasing important?
6. Name the types of biasing circuit
7. What is faithful amplification?
8. What is the range of current gain in CB configuration?
9. What is the relation between α and β?
10. What is the advantage of CE configuration over CB configuration?
11. What is CC configuration and mention about its significance?

Department of Electronics & Communication Engineering Page 69


EXPERIMENT-14

AIM OF THE EXPERIMENT:


Study and simulation of FET input and output characteristics using OrCAD PSpice.

OBJECTIVE:
1. To learn to realize the JFETself-bias circuit using OrCADPSpice
2. Design and simulate the JFET self- bias circuit.
3. Compare the analytical and simulated results.

SOFTWARE REQUIRED:
OrCAD PSpice

THEORY
JFET: The Junction gate field-effect transistor (JFET) is the simplest type of field-effect
transistor. They are three-terminal semiconductor devices that can be used as
electronically-controlled switches, amplifiers, or voltage-controlled resistors. Unlike
bipolar transistors, JFETs are exclusively voltage-controlled in that they do not need a
biasing current. Electric charge flows through a semiconducting channel between
source and drain terminals. By applying a reverse bias voltage to a gate terminal, the
channel is "pinched", so that the electric current is impeded or switched off
completely. A JFET is usually on when there is no potential difference between its gate
and source terminals. If a potential difference of the proper polarity is applied between
its gate and source terminals, the JFET will be more resistive to current flow, which
means less current would flow in the channel between the source and drain terminals.
Thus, JFETs are sometimes referred to as depletion-mode devices.
Self Biasing
Main disadvantage of fixed bias configuration requires two dc voltage sources. Self bias
circuit requires only one DC supply to establish the desired operating point.

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EXPERIMENT-14

Mathematical Analysis
As gate source junction is reverse biased, So IG = 0 A and,
Therefore VG = IGRG = 0 V, hence ID = IS
Voltage at source is
VS = IS R S = IDR S

Applying KVL at Input loop


-IGR G - VGS - IS R S = 0
VGS = -IDR S
So, voltage drop across RS provides the biasing Voltage VGG and no external source is
required for biasing and this is the reason that it is called Self biasing.
The operating point can easily be determined from equation
VDS = VDD - ID  R D  R S 
Self biasing of a JFET stabilizes its quiescent operating point against any change in its
parameters like transconductance.

CALCULATIONS
• VDD = 12 Volts
• ID = 2.5 mA
• RG = 1MΩ

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EXPERIMENT-14

• Assume RD = 3 RS
• VDS = 7.4 Volts
• Calculate RD, RS, VGS =?
• Find RS = ? VDS = VDD - ID  R D  R S 

• Find RD = ? RD = 3 RS
• Find VGS = ? VGS = -IDR S

PROCEDURE:
 Open ‘Capture CIS’ from the Desktop.
 Create a new Project (File  New  Project).
 Give a project name, then Select a project location “C:\PSpice\{YourName}”,
then chose “Analog or Mixed A/D” type of project then click OK.
 Select “Create a blank Project”, then click OK.
 Place Different required components Using “Place  PSpice Component “and
place components.
 Connect all components as per the circuit diagram.
 Then Go to PSpice – New simulation Profile and give a name and allow
simulation process to go-on.
 After Simulation chose the voltage and current button to show the current and
voltage value on the circuit.

CIRCUIT DIAGRAM:

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EXPERIMENT-14

Parameters VDS(Volts) ID(mA)


Theoretical Values
(Calculation Values)

Practical Values (Taken


Values)

RESULT AND ITS ANALYSIS:


Experimental - Theoritical
% Error = ×100
Theoritical

CONCLUSION:

QUESTIONNAIRE:
1. Why FET is called as uni-polar device?
2. What are the advantages of FET?
3. What is trans-conductance of FET?
4. What are the disadvantages of FET?
5. Relation between µ, gm and rd?
6. Why a FET is said to be a voltage controlled device?
7. What is pinch off voltage?
8. What do mean by Schockley’s Equation?
9. What do mean by drain resistance in FET?
10. What is the difference between n-channel FET and p-channel FET?

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EXPERIMENT-15

AIM OF THE EXPERIMENT:


Verify logic behavior of digital logic Gates and Implementation of Half-adder using basic
gates.
OBJECTIVE:
1. To be familiar with the pin diagram of logic gates and their working principles.
2. Verify the truth table of each Logic Gates
3. Design Half-adder using logic gates
HARDWARE REQUIRED:
1. AND (IC 7408), OR(IC 7432), NOT(IC 7404), NAND(IC 7400), NOR(IC 7402),
XOR(IC 7486), XNOR(IC 74266)
2. Connecting Wires
3. Twiser
4. Universal Trainer Kit

THEORY:
A logic gate is an idealized or physical device implementing a Boolean function; it
performs a logical operation on one or more logic inputs and produces a single logic
output. The AND, OR, NAND, and NOR gates can be extended to have more than two
inputs. A gate can be extended to have multiple inputs if the binary operation it
represents is commutative and associative.
AND GATE (7408)
 The AND Gate is a digital logic gate whose output is a logic (1) if both of its
inputs are logic (1).
 If neither or only one input to the AND gate is HIGH, a LOW output results. In
another sense, the function of AND effectively finds the minimum between two
binary digits. Therefore, the output is always 0 except when all the inputs are 1s.

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EXPERIMENT-15

Truth Table
A X
INPUT A INPUT B OUTPUT X
0 0 0
B 0 1 0
SYMBOL AND 1 0 0
1 1 1

(7408 IC PIN CONFIGURATION)

OR GATE (7432)
 The OR Gate is a digital logic gate whose output is logic (1) if one or both the
inputs are logic (1).
 In another sense, the function of OR effectively finds the maximum between
two binary digits
Truth Table

INPUT X INPUT Y OUTPUT Z


0 0 0
0 1 1
1 0 1
SYMBOL OF OR 1 1 1

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EXPERIMENT-15

(7432 IC PIN CONFIGURATION)

NOT GATE (7404):


 The NOT gate (Inverter) is another basic kind of a digital circuit, also called as a
complementing circuit, which is most simple element of digital logic. The
inverter is different from AND and OR gates as it has only a single input, as a
result, it does not perform any decision making function that is dependent on a
combination of inputs.
 The inverter simply converts logic (1) at its input to logic (0) at its output and
conversely, logic (0) to logic (1).
Truth Table

A X INPUT A OUTPUT X
0 1
X=A 1 0

SYMBOL OF NOT

(7404 IC PIN CONFIGURATION)

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EXPERIMENT-15

NAND GATE (7400):


 This is an AND gate with the output inverted, as shown by the 'o' on the output.
 The output is true if input A and input B are not both true and given by
C = NOT (A AND B).
 A NAND gate can have two or more inputs and can be represented as “If either
of the input is LOW, the output is HIGH”.

Truth Table
Input A Input B Output C
A
0 0 1
0 1 1
C
B SYMBOL OF NAND GATE 1 0 1
1 1 0

(7400 IC PIN CONFIGURATION)

NOR GATE (7402) :


 This is an OR gate with the output inverted, as shown by the 'o' on the output.
 The output is true if input A or input B are not both true and given by:
Q = NOT (A OR B).
 A NOR gate can have two or more inputs and can be represented as “If either of
the input is HIGH, the output is LOW”.

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EXPERIMENT-15

Truth Table
A
Input A Input B Output C
Y 0 0 1
0 1 0
B
1 1 0
SYMBOL OF NOR 1 1 0

(7402 IC PIN CONFIGURATION)


XOR GATE (7486):
 The XOR gate (sometimes EOR gate or EXOR gate) is a digital logic gate that
implements an exclusive or; that is, a HIGH output (Logic 1) results if one, and
only one, of the inputs to the gate is HIGH (Logic 1).
 The two-input version implements inequality. If both inputs are LOW (Logic 0)
and both are HIGH (Logic 1), a low output (Logic 0) results. The output of the
Exclusive –OR gate, is LOW (Logic 0) when its two inputs are same and its
output is HIGH (Logic 1) when its two inputs are different.
 The generalized logic for XOR gate for any number of inputs is:” Among the
inputs, If odd number of inputs are high then output is high else output is low”.
Truth Table

INPUT X INPUT Y OUTPUT Z


0 0 0
0 1 1
1 0 1
1 1 0

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EXPERIMENT-15

(IC 7486 PIN CONFIGURATION)

EX-NOR GATE (74266):


 The XNOR gate (sometimes spelled "exnor" or "enor" and rarely written NXOR) is
a digital logic gate whose function is the inverse of the exclusive OR (XOR) gate.
 The two-input version implements logical equality. A HIGH output (Logic 1) results
if both of the inputs to the gate are the same. If one but not both inputs are HIGH
(Logic 1), a LOW output (Logic 0) results.
 The generalized logic for XNOR gate for any number of inputs is:” Among the
inputs, If even number of inputs are high then output is high else output is low”.
Truth Table
INPUT A INPUT B OUTPUT X
0 0 1
0 1 0
1 0 0
SYMBOL OF X-NOR 1 1 1

(IC 74266 PIN CONFIGURATION)

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EXPERIMENT-15

Implementation of Half adder:


 ADDER is a circuit, which adds the binary numbers; there are two types of adder
circuits used in digital electronics. They are Half Adder & Full Adder.
 A HALF ADDER is a combinational logic circuit that adds two binary bits. If A & B
are two input bits to the circuit and the outputs are carry & sum (denoted by C
& S) respectively.
CIRCUIT DIAGRAM:
Half Adder:
Truth Table
A B SUM(S) CARRY(C)

0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
Circuit Diagram

PROCEDURE:
 Collect your required no of ICs and equipments from the lab.
 Design your circuits with the help of connecting wires and ICs on the trainer kit
as per the circuit diagram.
 Before switching on the trainer kit check the circuit.
 By changing the input variables observe the outputs and compare it with the
truth table.
TABULATION AND CALCULATIONS:
Sl. No. A B Sum  AB  A B carry  AB

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EXPERIMENT-15

SIMULATION RESULT AND ITS ANALYSIS:

CONCLUSION:

QUESTIONNAIRE:

1. Define logic gates


2. What are the ‘basic’ logic gates?
3. How many universal gates exist? Name them.
4. State the level of input and output of logic gates.
5. Symbol and truth table of AND gate.
6. Why NAND and NOR gates are called ‘universal gates’?
7. Realize ‘X-NOR’ gate.
8. Explain ‘buffer-gate’?
9. Truth table of X-OR gate.
10. Realize 3- input NOR gate.
11. What are adders?
12. Realize different types of adders.
13. Design half adder using XOR gate and using basic gates.
14. Realize X-OR and X-NOR using basic gates

Department of Electronics & Communication Engineering Page 81


EXPERIMENT-16

AIM OF THE EXPERIMENT:


Design 2:1 MUX and simple S-R latch.

OBJECTIVE:
1. To be familiar with latch and flipflops.
2. Construct and Implement of S-R latch using NAND and NOR gates
3. Design and implement 2:1 MUX using basic logic gates.

HARDWARE REQUIRED:
1) Bread Board
2) Connecting wires
3) Twiser
4) AND (IC 7408), OR (IC 7432), NOT (IC 7404), NAND (IC 7400), NOR (IC 7402)

THEORY:
Latches: A latch is a type of temporary storage device that has 2 stable states (Bi-stable).Two
stable states are set (1) and Reset (0). The latches can retain either of these states indefinitely,
making them useful as storage device.
SR latch: The SR latch is not a circuit with 2 cross-coupled NOR gates or two cross coupled
NAND gates. It has 2 inputs labeled ‘S’ for set and R for reset.

SR latch Using NOR and its Truth Table:

S R Q n 1 Q n  1 Remark
0 0 Qn No change
Qn
0 1 0 1 Reset
1 0 1 0 Set
1 1 0 0 Invalid

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EXPERIMENT-16

SR latch Using NAND gate:-


Truth Table for SR Latch
S R Q n 1 Q n  1 Remark
0 0 1 1 Invalid
0 1 1 0 Set
1 0 0 1 Reset
1 1 Qn No change
Qn

MUX: Multiplexer (MUX) is a combinational logic circuit that receives information from
many inputs and directs this information to the output. The input information that is
selected is controlled by selector lines. A MUX with 2n inputs requires ‘n’ selector lines.
MUX is also sometimes known as many to one or it is known as data selector.
2:1 MUX: It has 2 inputs and one output, so number of selector line is one. Inputs are I 0
and I1, output is Y and selector line s.
CIRCUIT DIAGRAM:
2:1 MUX implementation:
S Y
Y  S I 0  SI 1 0 I0
1 I1

Latch Implementation using NOR and NAND

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EXPERIMENT-16

PROCEDURE:
1) Connect the gates as per the circuit diagram, on the breadboard.
2) Use manual switches and logic indicators for input and output.
3) After connection switch on the supply and verify the truth table of MUX.
4) Repeat the same procedure for the SR latch.

TABULATION AND CALCULATIONS:


The output 2:1 MUX is given by Y  S I 0  SI 1

Sl. No. S R Q

SIMULATION RESULT AND ITS ANALYSIS:

CONCLUSION:

QUESTIONNAIRE:
1. What is the difference between Latch and Flip-flop?
2. What is the characteristic Equation of S-R flip-flop?
3. What is the basic difference between MUX and Latch?
4. How many stable state/states a latch has?
5. What is De-MUX?
6. Does a MUX have memory or not?
7. What is the digital logic for S and R for invalid output?
8. What is the use of selection line for a MUX?
9. Write one application of MUX.
10. Latch stores how many binary bit/bits?

Department of Electronics & Communication Engineering Page 84

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