Unit 2 Assembly Language Programming and Interfacing-1-130
Unit 2 Assembly Language Programming and Interfacing-1-130
Microprocessor
Case Study: Intel
Slide 2
Processors
Microproce
Fifth Generation Pentium
4
8086 Microprocessor
Pins and Signals Common signals
AD0-AD15 (Bidirectional)
Address/Data bus
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8086 Microprocessor
Pins and Signals Common signals
MN/ MX
MINIMUM / MAXIMUM
TEST
READY
RESET (Input)
CLK
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8086 Microprocessor
Pins and Signals Minimum mode signals
Pins 24 -31
DT/𝐑
ഥ (Data Transmit/ Receive) Output signal from the
processor to control the direction of data flow
through the data transceivers
Pins 24 -31
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8086 Microprocessor
Pins and Signals Maximum mode signals
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8086 Microprocessor
Pins and Signals Maximum mode signals
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8086 Microprocessor
Pins and Signals Maximum mode signals
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8086 Microprocessor
Architecture
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8086 Microprocessor
Architecture
8086 registers
categorized 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
into 4 groups OF DF IF TF SF ZF AF PF CF
Segment
Registers
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8086 Microprocessor
Architecture Bus Interface Unit (BIU)
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8086 Microprocessor
Architecture Bus Interface Unit (BIU)
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8086 Microprocessor
Architecture Bus Interface Unit (BIU)
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8086 Microprocessor
Architecture Bus Interface Unit (BIU)
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8086 Microprocessor
Architecture Bus Interface Unit (BIU)
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8086 Microprocessor
Architecture Bus Interface Unit (BIU)
Instruction queue
A group of First-In-First-
Out (FIFO) in which up to
6 bytes of instruction
code are pre fetched
from the memory ahead
of time.
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8086 Microprocessor
Architecture Execution Unit (EU)
EU decodes and
executes instructions.
A decoder in the EU
control system
translates instructions.
and
Some of the 16 bit registers can be
Index registers (Source used as two 8 bit registers as :
Index, Destination Index)
each of 16-bits AX can be used as AH and AL
BX can be used as BH and BL
CX can be used as CH and CL 27
DX can be used as DH and DL
8086 Microprocessor
Architecture Execution Unit (EU)
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8086 Microprocessor
Architecture Execution Unit (EU)
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8086 Microprocessor
Architecture Execution Unit (EU)
Example:
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8086 Microprocessor
Architecture Execution Unit (EU)
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8086 Microprocessor
Architecture Execution Unit (EU)
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8086 Microprocessor
Architecture Execution Unit (EU)
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8086 Microprocessor
Architecture Execution Unit (EU)
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8086 Microprocessor
Architecture Execution Unit (EU)
Auxiliary Carry Flag
Carry Flag
Flag Register This is set, if there is a carry from the
This flag is set, when there is
lowest nibble, i.e, bit three during
addition, or borrow for the lowest a carry out of MSB in case of
nibble, i.e, bit three, during addition or a borrow in case
subtraction. of subtraction.
This flag is set, when the This flag is set, if the result of This flag is set to 1, if the lower
result of any computation the computation or comparison byte of the result contains even
is negative performed by an instruction is number of 1’s ; for odd number
zero of 1’s set to zero.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
OF DF IF TF SF ZF AF PF CF
Tarp Flag
Over flow Flag If this flag is set, the processor
This flag is set, if an overflow occurs, i.e, if the result of a signed enters the single step execution
operation is large enough to accommodate in a destination
mode by generating internal
register. The result is of more than 7-bits in size in case of 8-bit
signed operation and more than 15-bits in size in case of 16-bit interrupts after the execution of
sign operations, then the overflow will be set. each instruction
Direction Flag Interrupt Flag
This is used by string manipulation instructions. If this flag bit
is ‘0’, the string is processed beginning from the lowest Causes the 8086 to recognize
address to the highest address, i.e., auto incrementing mode. external mask interrupts; clearing IF
Otherwise, the string is processed from the highest address disables these interrupts.
towards the lowest address, i.e., auto incrementing mode. 35
ADDRESSING MODES
&
Instruction set
8086 Microprocessor
Introduction
Program
A set of instructions written to solve
a problem.
Instruction
Directions which a microprocessor
follows to execute a task or part of a
task.
Computer language
1. Register Addressing
Group I : Addressing modes for
2. Immediate Addressing register and immediate data
3. Direct Addressing
5. Based Addressing
Group II : Addressing modes for
6. Indexed Addressing memory data
7. Based Index Addressing
8. String Addressing
8. String Addressing
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8086 Microprocessor Group I : Addressing modes for
Addressing Modes register and immediate data
1. Register Addressing
In immediate addressing mode, an 8-bit or 16-bit
2. Immediate Addressing data is specified as part of the instruction
3. Direct Addressing
Example:
4. Register Indirect Addressing
MOV DL, 08H
5. Based Addressing
The 8-bit data (08H) given in the instruction is
6. Indexed Addressing moved to DL
8. String Addressing
MOV AX, 0A9FH
9. Direct I/O port Addressing
The 16-bit data (0A9FH) given in the instruction is
10. Indirect I/O port Addressing
moved to AX register
11. Relative Addressing
(AX) 0A9FH
12. Implied Addressing
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8086 Microprocessor
Addressing Modes : Memory Access
1. Register Addressing
2. Immediate Addressing
Here, the effective address of the memory
3. Direct Addressing
location at which the data operand is stored is
4. Register Indirect Addressing given in the instruction.
12. Implied Addressing This addressing mode is called direct because the
displacement of the operand from the segment
base is specified directly in the instruction.
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8086 Microprocessor Group II : Addressing modes
Addressing Modes for memory data
(CL) (MA)
(CH) (MA +1)
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8086 Microprocessor Group II : Addressing modes
Addressing Modes for memory data
(AL) (MA)
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(AH) (MA + 1)
8086 Microprocessor Group II : Addressing modes
Addressing Modes for memory data
(CL) (MA)
(CH) (MA + 1)
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8086 Microprocessor Group II : Addressing modes
Addressing Modes for memory data
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8086 Microprocessor Group II : Addressing modes
Addressing Modes for memory data
1. Register Addressing
2. Immediate Addressing
1. Register Addressing
2. Immediate Addressing
3. Direct Addressing
5. Based Addressing
6. Indexed Addressing
Instructions using this mode have no operands.
The instruction itself will specify the data to be
7. Based Index Addressing
operated by the instruction.
8. String Addressing
Example: CLC
9. Direct I/O port Addressing
This clears the carry flag to zero.
10. Indirect I/O port Addressing
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INSTRUCTION SET
8086 Microprocessor
Instruction Set
2. Arithmetic Instructions
3. Logical Instructions
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8086 Microprocessor
Instruction Set
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8086 Microprocessor
Instruction Set
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8086 Microprocessor
Instruction Set
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8086 Microprocessor
Instruction Set
2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
ADD A, data
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8086 Microprocessor
Instruction Set
2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
ADDC A, data
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8086 Microprocessor
Instruction Set
2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
SUB A, data
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8086 Microprocessor
Instruction Set
2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
SBB A, data
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8086 Microprocessor
Instruction Set
2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
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8086 Microprocessor
Instruction Set
2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
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8086 Microprocessor
Instruction Set
2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
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8086 Microprocessor
Instruction Set
2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
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8086 Microprocessor
Instruction Set
2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
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8086 Microprocessor
Instruction Set
2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
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8086 Microprocessor
Instruction Set
2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
CMP A, data
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8086 Microprocessor
Instruction Set
3. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
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8086 Microprocessor
Instruction Set
3. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
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8086 Microprocessor
Instruction Set
3. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
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8086 Microprocessor
Instruction Set
3. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
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8086 Microprocessor
Instruction Set
3. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
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8086 Microprocessor
Instruction Set
3. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
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8086 Microprocessor
Instruction Set
3. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
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8086 Microprocessor
Instruction Set
3. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
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8086 Microprocessor
Instruction Set
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8086 Microprocessor
Instruction Set
REP
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8086 Microprocessor
Instruction Set
MOVS
(MAE) (MA)
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8086 Microprocessor
Instruction Set
CMPS
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8086 Microprocessor
Instruction Set
LODS
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8086 Microprocessor
Instruction Set
STOS
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8086 Microprocessor
Instruction Set
CLC Clear CF 0
NOP No operation
Mnemonics Explanation
CALL reg/ mem/ disp16 Call subroutine
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8086 Microprocessor
Instruction Set
Checks flags
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8086 Microprocessor
Instruction Set
Mnemonics Explanation
JC disp8 Jump if CF = 1
JP disp8 Jump if PF = 1
JO disp8 Jump if OF = 1
JS disp8 Jump if SF = 1
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Assembler directives
8086 Microprocessor
Assemble Directives
Used to :
› specify the start and end of a program
› attach value to variables
› allocate storage locations to input/ output data
› define start and end of segments, procedures, macros etc..
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8086 Microprocessor
Assemble Directives
DB Define Byte
PROC
FAR Example:
NEAR LIST DB 7FH, 42H, 35H
ENDP
Three consecutive memory locations are reserved for
SHORT the variable LIST and each data specified in the
instruction are stored as initial value in the reserved
MACRO memory location
ENDM 94
8086 Microprocessor
Assemble Directives
DB Define Word
PROC
FAR Example:
NEAR ALIST DW 6512H, 0F251H, 0CDE2H
ENDP
Six consecutive memory locations are reserved for
SHORT the variable ALIST and each 16-bit data specified in
the instruction is stored in two consecutive memory
MACRO location.
ENDM 95
8086 Microprocessor
Assemble Directives
ORG
END Segnam SEGMENT
EVEN
…
EQU … Program code
… or
PROC … Data Defining Statements
…
FAR …
NEAR
ENDP Segnam ENDS
SHORT
ORG
User defined name of
END Segment Register
the segment
EVEN
EQU
PROC Example:
FAR
NEAR ASSUME CS: ACODE, DS:ADATA Tells the compiler that the
ENDP instructions of the program are
stored in the segment ACODE and
data are stored in the segment
SHORT ADATA
MACRO
ENDM 97
8086 Microprocessor
Assemble Directives
ORG
Examples:
END
EVEN ORG 1000H Informs the assembler that the statements
EQU following ORG 1000H should be stored in
memory starting with effective address
1000H
PROC
FAR
LOOP EQU 10FEH Value of variable LOOP is 10FEH
NEAR
ENDP
_SDATA SEGMENT In this data segment, effective address of
SHORT ORG 1200H memory location assigned to A will be 1200H
A DB 4CH and that of B will be 1202H and 1203H.
EVEN
MACRO B DW 1052H
ENDM _SDATA ENDS 98
8086 Microprocessor
Assemble Directives
General form
ASSUME
ORG
procname PROC[NEAR/ FAR]
END
EVEN …
… Program statements of the
EQU procedure
…
DB
Examples:
DW
RET
ORG
ADD64 ENDP
END
EVEN
EQU CONVERT PROC FAR The subroutine/ procedure named CONVERT
is declared as FAR and so the assembler will
… code the CALL and RET instructions involved
PROC … in this procedure as far call and return
ENDP …
FAR
RET
NEAR CONVERT ENDP
SHORT
MACRO
ENDM 100
8086 Microprocessor
Assemble Directives
PROC
ENDP
FAR
NEAR
SHORT
MACRO
ENDM 101
8086 Microprocessor
Assemble Directives
PROC
ENDP
FAR User defined name of
NEAR the macro
SHORT
MACRO
ENDM 102
103
Interfacing memory and i/o ports
8086 Microprocessor
Memory
Processor Memory
Registers inside a microcomputer
Store data and results temporarily
No speed disparity
Cost
Secondary Memory
Storage media comprising of slow
devices such as magnetic tapes and
disks
Hold large data files and programs:
Operating system, compilers,
databases, permanent programs etc. 105
8086 Microprocessor
Memory organization in 8086
8086 : 16-bit
Bank 0 : A0 = 0 Even
addressed memory bank
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8086 Microprocessor
Memory organization in 8086
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8086 Microprocessor
Interfacing SRAM and EPROM
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8086 Microprocessor
Interfacing SRAM and EPROM
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8086 Microprocessor
Interfacing SRAM and EPROM
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8086 Microprocessor
Interfacing SRAM and EPROM
Monitor Programs
Programing 8279 for keyboard scanning and display
refreshing
Initialization of stack
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8086 Microprocessor
Interfacing I/O and peripheral devices
I/O devices
For communication between microprocessor and
outside world
Ports / Buffer IC’s
Microprocessor I/ O devices
(interface circuitry)
Interrupt driven I/ O
I/O device interrupts the
processor and initiate data
transfer
Direct memory access
Data transfer is achieved by 113
bypassing the microprocessor
8086 Microprocessor
8086 and 8088 comparison
The I/O ports or peripherals can be Only IN and OUT instructions can be
treated like memory locations and used for data transfer between I/O
so all instructions related to device and processor
memory can be used for data
transmission between I/O device
and processor
Data can be moved from any Data transfer takes place only
register to ports and vice versa between accumulator and ports
When memory mapping is used for Full memory space can be used for
I/O devices, full memory address addressing memory.
space cannot be used for
addressing memory. Suitable for systems which
require large memory capacity
Useful only for small systems
where memory requirement is less
For accessing the memory mapped For accessing the I/O mapped
devices, the processor executes devices, the processor executes I/O
memory read or write cycle. read or write cycle.
UNIT : II
ASSEMBLER DIRECTIVE:
Assembler directives are non executable instructions which are pseudo
instructions which helps assembler to execute a program.
Few Examples for assembler directives are as follows
Org 2000h
Start:
End start
Assume DS: Data
ASSEMBLER DIRECTIVE:
ASSUME
The ASSUME directive is used tell the assembler the name of the logical
segment it should use for a specified segment. The statement ASSUME CS: CODE,
for example, tells the assembler that the instructions for a program are in a
logical segment named CODE.
The statement ASSUME DS: DATA tells the assembler that for any program
instruction, which refers to the data segment, it should use the logical segment
called DATA.
DB (Define Byte)
The DB directive is used to declare a byte type variable, or a set aside one or
more storage locations of type byte in memory
ASSEMBLER DIRECTIVE:
PRICES DB 49H, 98H, 29H Declare array of 3 bytes named PRICE and initialize
them with specified values.
RESULT DB 100 DUP (?) Set aside 100 bytes of storage in memory and give
it the name RESULT. But leave the 100 bytes un-initialized.
PRESSURE DB 20H DUP (0) Set aside 20H bytes of storage in memory, give it
the name PRESSURE and put 0 in all 20H locations.
ASSEMBLER DIRECTIVE:
DD (Define Double Word)
The DD directive is used to declare a variable of type double word or to reserve
memory locations, which can be accessed as type double word.
The statement ARRAY DD 25629261H, for example, will define a double word named
ARRAY and initialize the double word with the specified value when the program is loaded
into memory to be run. The low word, 9261H, will be put in memory at a lower address
than the high word.
DQ (Define Quadword)
The DQ directive is used to tell the assembler to declare a variable 4 words in length
or to reserve 4 words of storage in memory. The statement BIG_NUMBER DQ
243598740192A92BH, for example, will declare a variable named BIG_NUMBER and
initialize the 4 words set aside with the specified number when the program is loaded into
memory to be run.
ASSEMBLER DIRECTIVE:
OFFSET
OFFSET is an operator, which tells the assembler to determine the offset
or displacement of a named data item (variable), a procedure from the start of
the segment, which contains it. When the assembler reads the statement MOV
BX, OFFSET PRICES, for example, it will determine the offset of the variable
PRICES from the start of the segment in which PRICES is defined and will
load this value into BX.
ASSEMBLER DIRECTIVE:
PTR (POINTER)
The PTR operator is used to assign a specific type to a variable or a label. It is
necessary to do this in any instruction where the type of the operand is not clear. When the
assembler reads the instruction INC [BX], for example, it will not know whether to
increment the byte pointed to by BX. We use the PTR operator to clarify how we want the
assembler to code the instruction. The statement INC BYTE PTR [BX] tells the assembler
that we want to increment the byte pointed to by BX. The statement INC WORD PTR [BX]
tells the assembler that we want to increment the word pointed to by BX. The PTR operator
assigns the type specified before PTR to the variable specified after PTR.
We can also use the PTR operator to clarify our intentions when we use indirect Jump
instructions. The statement JMP [BX], for example, does not tell the assembler whether to
code the instruction for a near jump. If we want to do a near jump, we write the instruction
as JMP WORD PTR [BX]. If we want to do a far jump, we write the instruction as JMP
DWORD PTR [BX].
ASSEMBLER DIRECTIVE:
EVEN (Align On Even Memory Address)
As an assembler assembles a section of data declaration or instruction statements,
it uses a location counter to keep track of how many bytes it is from the start of a
segment at any time. The EVEN directive tells the assembler to increment the location
counter to the next even address, if it is not already at an even address. A NOP
instruction will be inserted in the location incremented over.
DATA SEGMENT
SALES DB 9 DUP (?) Location counter will point to 0009 after this instruction.
EVEN Increment location counter to 000AH
INVENTORY DW 100 DUP (0) Array of 100 words starting on even address for
quicker read DATA ENDS
Procedure
PROC (Procedure)
The PROC directive is used to identify the start of a procedure. The PROC
directive follows a name you give the procedure. After the PROC directive, the
term near or the term far is used to specify the type of the procedure. The
statement DIVIDE PROC FAR, for example, identifies the start of a procedure
named DIVIDE and tells the assembler that the procedure is far (in a segment
with different name from the one that contains the instructions which calls the
procedure). The PROC directive is used with the ENDP directive to “bracket”