Epc M3
Epc M3
1 OPERATIONAL AMPLIFIER
An operational amplifier, or op-amp, is the most important and versatile analog IC.
Definition: It is a direct coupled multistage voltage amplifier with an extremely high gain.
With the help of op-amp, the circuit design becomes very simple. The variety of useful circuits can be
built without the necessity of knowing about the complex internal circuitry.
An op-amp has two input terminals – an inverting input 1 and a non-inverting input 2, and an output
. It requires two power supplies: + and − . It has a very high input impedance , a very low
output impedance and a very high gain .
Op-amp circuit is said to be linear, if there exists a linear relationship between its input and the output.
For example, summing amplifier
Similarly, a circuit is said to be non-linear, if there exists a non-linear relationship between its input and
output i.e, whose output exhibits non-linear change with respect to the change in the input.
These circuits are commonly known as switching circuits, whose output switches between positive and
negative saturation voltage levels. Most popularly used circuit configurations are zero crossing
detectors, the Schmitt trigger, astable and monostable multivibrators.
The Subtracter
Figure below shows a circuit that subtracts two input voltages to produce an output voltage equal to the
difference of v1 and v2.
Working: Input v1 drives an inverter with a voltage gain of unity. The output of the first stage is v1.
This voltage is one of the inputs to the second-stage summing circuit. The other input is v2. Since the
gain of each channel is unity, the final output voltage equals v1 minus v2.
It is possible to perform addition and subtraction simultaneously with a single op-amp using the circuit
shown in figure. The output voltage Vo can be obtained by using superposition theorem. To find output
voltage due to V1 alone, make all other input voltages V2, V3 and V4 equal to zero. Thus, the output
voltage Vo due to all four input voltages is given by
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Vo = - V1 -V2 +V3+ V4
Similarly, the gain of whole circuit can be determined. The inverting side of the amplifier has two input
channels, and the noninverting side has two input channels. The total gain is the superposition of the
channel gains.
The gain of each inverting channel is the ratio of the feedback resistor Rf to input channel resistance,
either R1 or R2. The gain of each noninverting channel is:
The Averager
Figure below shows an averager, a circuit whose output equals the average of the input voltages. Each
channel has a voltage gain of:
When all amplified outputs are added, we get an output that is the average of all input voltages.
The circuit shown has three inputs. Any number of inputs can be used, as long as each channel input
resistance is changed to nR, where n is the number of channels.
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Digital-to-Analog Converters (DAC)
A DAC is an electronic circuit that takes in digital data as input and transforms it into an analog output
signal. It is actually the output voltage proportional to the binary code given at the DAC input and then
used to drive various circuits.
A weighted resistor DAC produces an analog output (voltage or current), which is equal to the digital
(binary) input by using binary weighted resistors in the inverting summing circuit. The weight is the
same as the gain of the channel.
Av3 = -1
Av2 = -0.5
Av1 = -0.25
Av0 = -0.125
Substituting R values,
It is the sum of input voltages. Note that negative sign only indicates the inverting amplifier.
With 4 inputs, there are 16 possible input combinations of v3v2v1v0: 0000, 0001, 0010, 0011, 0100,
0101, 0110, 0111, 1000, 1001, 1010, 1011, 1100, 1101, 1110, and 1111.
When all inputs are zero (0000), the output is:
Vout = 0
When v3 v2 v1 v0 = 0001, the output is:
Vout = -(0.125) = -0.125
When v3 v2 v1 v0 is 0010, the output is:
Vout = -(0.25) = -0.25
and so on. When the inputs are all 1s (1111), the output is maximum and equals:
Vout = -(1 +0.5 +0.25 +0.125)= - 1.875
If the D/A converter is driven by a circuit that produces the 0000 to 1111 sequence of numbers given
earlier, it will produce these output voltages:
0, -0.125, -0.25, -0.375, -0.5, -0.625, -0.75, -0.875, -1, -1.125, -1.25, -1.375, -1.5, -1.625, -1.75,
and -1.875.
The staircase voltage demonstrates that the D/A converter does not produce a continuous range of output
values. Therefore, strictly speaking its output is not truly analog. Low-pass filter circuits can be
connected to the output to provide a smoother transition between output steps.
A 4-input D/A converter has 16 possible outputs, an 8-input A/ D converter has 256 possible outputs,
and a 16-input D/A converter has 65,536 possible outputs.
The switches, D0 – D3, would normally be some type of active switch. The switches connect the four
inputs to either ground (logic 0) or Vref (logic 1). The ladder network converts the possible binary input
values from 0000 through 1111 to one of 16 unique output voltage levels. D0 is considered to be the
least significant input bit (LSB) while D3 is the most significant bit (MSB).
To determine the D/A converter’s output voltage, you must first change the binary input value to its
decimal equivalent value, BIN. This can be done by:
The output of a nonlinear op-amp circuit usually has a different shape from the input signal because the
op-amp saturates during part of the input cycle.
In this circuit the output voltage ideally switches from low to high or vice versa whenever the input
voltage crosses zero reference (x-axis) line. It can work as a comparator and it can build using an op
amp without feedback resistors, as shown in Fig.(a)
Because of the high open-loop voltage gain of op-amp, a positive input voltage produces positive
saturation, and a negative input voltage produces negative saturation.
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If Vsat =14 V, the output swing of the comparator is from approximately 14 to 14 V. If the open-loop
voltage gain is 100,000, the input voltage needed to produce saturation is:
This means that an input voltage more positive than 0.014 mV drives the comparator into positive
saturation (+Vsat), and an input voltage more negative than 0.014 mV drives it into negative saturation
(-Vsat). Input voltages used with comparators are usually much greater than 0.014 mV. This is why the
output voltage is a two-state output, either +Vsat or +Vsat. By looking at the output voltage, we can
instantly tell whether the input voltage is: greater than or less than zero.
Moving the Trip Point: a voltage divider formed by R1 and R2, produces the following reference
voltages for the inverting input:
and
When Vin is greater than Vref, the differential input voltage is positive and the output voltage is high
(+Vsat). When Vin is less than Vref, the differential input voltage is negative and the output voltage is low
(-Vsat).
A bypass capacitor, CBY is typically used on the inverting input, as shown in Figs. This reduces the
amount of power-supply ripple and other noise appearing at the inverting input. To be effective, the
cutoff frequency of CBY should be much lower than the ripple frequency of the power supply. The cutoff
frequency is given by:
The trip point is now equal to Vref. When Vin is greater than Vref, the output of the comparator goes into
positive saturation. When Vin is less than Vref, the output goes into negative saturation.
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Limit detector
A comparator sometimes used as a limit detector because a positive output indicates that the input
voltage exceeds a specific limit. With different values of R1 and R2, we can set the limit anywhere
between 0 and VCC. If a negative limit is preferred, connect VEE to the voltage divider. When Vin is more
positive than Vref, the differential input voltage is positive and the output is high, as shown in Fig,
below. When Vin is more negative than Vref, the output is low.
Single-supply comparator
A typical op amp can run on a single positive supply by grounding the VEE pin, as shown in Fig. a. The
output voltage has only one polarity, either a low or a high positive voltage.
For instance, with VCC = 15 V, the output swing is from approximately 1.5 V (low state) to around 13.5
V (high state).
When Vin is greater than Vref, the output is HIGH, as shown in Fig. b. When Vin is less than Vref, the
output is LOW. In either case, the output has a positive polarity.
For many digital applications, this kind of positive output is preferred.
When the output is positively saturated, the reference voltage applied to the non-inverting input is:
If the output is positively saturated in Fig. a, the feedback voltage to the non-inverting input is positive,
which reinforces the positive saturation. Similarly, if the output is negatively saturated, the feedback
voltage to the non-inverting input is negative, which reinforces the negative saturation.
Assume that the output is negatively saturated. The feedback voltage will hold the output in negative
saturation until the input voltage becomes slightly more positive than UTP. When this happens, the
output switches from negative to positive saturation.
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Once in positive saturation, the output stays there until the input voltage becomes slightly less than LTP.
Then, the output can change back to the negative state.
The equations for the trip points of a non-inverting Schmitt trigger are given by:
The ratio of R1 to R2 determines how much hysteresis the Schmitt trigger has. The difference between
these trip points is defined as the hysteresis:
H = UTP - LTP
Using above Eqs:
H = +BVsat - (-BVsat)
H = 2BVsat
An oscillator is an electronic circuit that produces a periodic signal. If the oscillator produces sinusoidal
oscillations, it is called as a sinusoidal oscillator. It converts the input energy from a DC source into an
AC output energy of a periodic signal.
Electronic oscillators are classified mainly into the following two categories −
Sinusoidal Oscillators − The oscillators that produce an output having a sine waveform are
called sinusoidal or harmonic oscillators.
Such oscillators can provide output at frequencies ranging from 20 Hz to 1 GHz.
Non-sinusoidal Oscillators − The oscillators that produce an output having a square, rectangular
or saw-tooth waveform are called non-sinusoidal or relaxation oscillators.
Such oscillators can provide output at frequencies ranging from 0 Hz to 20 MHz.
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Conditions of Oscillation for a sustained state of oscillation:
1. The phase shift around the feedback loop must be 0o .
2. The voltage gain, Acl, around the closed feedback loop (loop gain) must be 1 (Aβ=1)
The Wien-bridge oscillator is the standard oscillator circuit for low to moderate frequencies, in the range
of 5 Hz to about 1 MHz. It is almost always used in commercial audio generators and is usually
preferred for other low-frequency applications.
Lead-Lag Circuit
The Wien-bridge oscillator uses a resonant feedback circuit called a lead-lag circuit (Fig. a). At very low
frequencies, the series capacitor appears open to the input signal, and there is no output signal. At very
high frequencies, the shunt capacitor looks shorted, and there is no output.
Fig.a
In between these extremes, the output voltage reaches a maximum value. The frequency where the
output is maximum is the resonant frequency fr. At this frequency, the feedback fraction β reaches a
maximum value of 1⁄3.
The feedback fraction B has a maximum value at the resonant frequency. At this frequency, XC = R:
Working: Wien-bridge oscillator uses positive and negative feedback. There is a path for positive
feedback from the output through the lead-lag circuit to the non-inverting input. There is also a path for
negative feedback from the output through the voltage divider to the inverting input.
When the circuit is initially turned on, there is more positive feedback than negative feedback. This
allows the oscillations to build up, as previously described. After the output signal reaches a desired
level, the negative feedback becomes large enough to reduce loop gain AvB to 1.
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Since the lead-lag circuit has a B of 1⁄3, the loop gain is:
Av(CL)B = 3(1⁄3) =1
Op-amp (as an amplifier) produces 180o phase shift and lead-lag circuit (as feedback circuit) produces
another 180o phase shift, therefore around closed loop 360o phase shift will satisfy another condition.
Phase-Shift Oscillator
RC phase-shift oscillator uses three lead circuits in the feedback path. Each lead circuit produces a phase
shift between 60°. At some frequency, the total phase shift of the three lead circuits equals 180°
(approximately 60° each). The amplifier has an additional 180° of phase shift because the signal drives
the inverting input. As a result, the phase shift around the loop will be 360°, equivalent to 0°.
If AvB is greater than 1 at this particular frequency, oscillations can start.
This frequency is the frequency of the oscillator output and can be given by the following equation.
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Colpitts Oscillator
An LC circuit is called as tank circuit that can be used for frequencies between 1 and 500 MHz. The RF
choke has a very high inductive reactance, so it appears open to the ac signal. The capacitive voltage
divider formed by C1 and C2, produces the feedback voltage necessary for oscillations. Also, the
feedback voltage Vf appears across C2. This feedback voltage drives the base of the transistor and
sustains the oscillations developed across the tank circuit, provided there is enough voltage gain at the
oscillation frequency.
Working: When the DC supply (Vcc) turned on, the collector current starts rising and begins with the
charging charges the capacitors C1 and C2. When these capacitors are fully charged, they discharge
through coil L setting up damped harmonic oscillations in the tank circuit. The oscillatory current in the
tank circuit produces an AC voltages across C1, C2. The oscillations across C2 are applied to base-
emitter junction of the transistor and amplified by BJT amplifier.
Transistor offers 180o phase shift and LC tank circuit offers another 180o phase shift. Totally 360o of
phase shift fulfilled one of the essential conditions for the oscillation.
The required starting condition for any oscillator is AvB ≥1, at the resonant frequency of the tank circuit.
This is equivalent to Av ≥1/B. In Fig., the output voltage appears across C1 and the feedback voltage, Vf
appears across C2. The feedback fraction in this type of oscillator is given by:
Hartley Oscillator
When the LC tank is resonant, the circulating current flows through L1 in series with L2. The equivalent
L is: L = L1 + L2
In a Hartley oscillator, the feedback voltage is developed by the inductive voltage divider, L1 and L2.
Since the output voltage appears across L1 and the feedback voltage appears across L2, the feedback
fraction is:
For oscillations to start, the voltage gain must be greater than 1/B.
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Transistor offers 180o phase shift and LC tank circuit offers another 180o phase shift. Totally 360o of
phase shift fulfilled one of the essential conditions for the oscillation.
The resonant frequency of the oscillator can be determined by:
Working: When the DC supply (Vcc) turned on, the collector current starts rising and begins with the
charging of the capacitor C. Once capacitor C is fully charged, it starts discharging through L1 and L2.
The output of the amplifier is applied across the inductor L1 while the feedback voltage drawn across L2
is applied to the base of the transistor.
CRYSTAL OSCILLATORS
(a) (b)
(c)
When an AC voltage is applied across the crystal (see fig. (a)), it starts vibrating in resonant frequency,
and it looks like an equivalent tuned circuit as shown in Fig. (b). When the crystal mounted across the
AC source and if it is not vibrating it is equivalent to the capacitance CM. When it vibrates, acts like a
tuned R-L-C circuit.
In fig. (c), FET is used as amplifying device that provides 180o phase shift and offers very high input
impedances with the crystal connected between the drain (D) and gate (G) terminals. The crystal
operates at its series resonant frequency, ƒs giving a low impedance path between the output and the
input. There is 180o phase shift at resonance, making the feedback positive. The amplitude of the sine
wave is available at the Drain terminal (output). RFC coil (L1) provides d.c. bias while blocking any a.c.
signal on the power lines from affecting the output signal. Resistor, R1 controls the amount of feedback.
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R denotes internal frictional losses, L denotes the mass of the
crystal, and its stiffness represented by a capacitor C.
Because of CM, the crystal has two resonant frequencies.
i) Series resonant frequency (fs): RLC determine the resonant
frequency. The crystal has low impedance at which 2πfL = 1/2πfC.
Monostable Operation
Monostable multivibrator often called a one shot multivibrator is a pulse generating circuit in which the
duration of this pulse is determined by the RC network connected externally to the 555 timer. The
monostable circuit has only one stable state (output low) hence the name monostable. Note: When the
trigger input falls to slightly less than VCC /3, the lower comparator resets the flip-flop.
When negative trigger pulse is applied to pin-2, comparator-2 resets the flip-flop (Q = 0, = 1). This
changes the output (pin-3) from a LOW to a HIGH state for a time period determined by external RC
value. At this time the discharge transistor connected to pin-7 turns OFF. This action allows the
capacitor C to charge up towards VCC through external resistor R.
When the voltage across the capacitor equals 2/3 VCC, the comparator-1 sets the flip-flop (Q = 1, = 0).
At this time the transistor Q turns ON and hence the capacitor C rapidly discharges through the
transistor. Since, = 0, the output (pin-3) remains LOW until a trigger pulse is again applied. Then the
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cycle repeats. The pulse width of the trigger input must be smaller than the expected pulse width of the
output waveform. Also the trigger pulse must be a negative going input signal with amplitude larger
than 1/3 VCC. The pulse width can be calculated as: T= 1.1 RC.
The 555 Timer Astable Operation
This is also called free running or self-triggering oscillator. It has no stable state; but it has two quasi-
stable states (HIGH and LOW). No external triggering is required and it automatically interchanges its
two states continuously on a particular interval, hence generating a rectangular waveform. This time
duration of HIGH and LOW output has been determined by the external resistors and a capacitor.
When Q = 0 (output at pin-3 is HIGH), the discharging transistor is off and the capacitor C begins
charging toward VCC through resistances RA and RB. Its charging time constant is (RA+RB)C. Eventually,
the voltage across capacitor (threshold voltage) exceeds +2/3 VCC , the comparator 1 has a HIGH output
and sets the flip-flop so that its Q = 1, = 0 (output at pin-3 is LOW). Then, the discharge transistor is
turned ON and the capacitor C discharges through resistance RB with a discharging time constant RBC.
When discharging voltage across capacitor C drops below 1/3VCC, the output of comparator 2 goes
HIGH and this reset the flip-flop so that Q = 0, = 1, and the timer output is HIGH (pin-3). This the
cycle repeats. This charging and discharging of capacitor continues and a rectangular oscillating output
wave for is generated.
Time High (Seconds) TH = 0.693 (RA+RB)C Time Low (Seconds) TL = 0.693 RB C
Time Period T = Time High + Time Low = 0.693 (RA+2RB)C
Frequency f = 1/T = 1/ 0.693 (RA+2RB)C = 1.44 / (RA+2RB)C
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