EE5320: Analog Integrated Circuit Design; Nagendra Krishnapura ([email protected].

in) 1

Assignment 4
Use the square law model with λ = 0 (gds = 0) for MOS transistors unless otherwise mentioned.

is
vo
Cd R

(a) (b)
Cf
R R

− −
ωu vo ωu vo
+ +

(c) (d)
Figure 4.1: Problem 4.1.

4.1. Fig. 4.1 shows the model for a photodiode. The diode is setup in reverse bias (biasing arrangement not shown)
and when light shines on it, a current is produced. The current can be converted to voltage using the schemes in
Fig. 4.1(b) to (d). This circuit is used in optical communication systems. The goal is to maximize the gain as
well as the bandwidth of conversion from is to vo . Do the following for a given R (dc gain Vo /Is ).

(a) What is the bandwidth in Fig. 4.1(b)? What is the gain bandwidth product?
(b) What is the bandwidth in Fig. 4.1(c)? Choose the opamp’s ωu such that the quality factor of the denominator
√ √
polynomial is 1/ 2 (Same as damping factor ζ = 1/ 2). With this quality factor, you get a maximally flat
magnitude response (maximum possible bandwidth without peaking; derivatives dn /dω n |H(jω)|2 are zero
to the maximum degree n that is possible.). What is the gain bandwidth product? What are the advantages
and disaadvantages of Fig. 4.1(c) when compared to Fig. 4.1(b)? (One sentence each)
(c) What is the bandwidth in Fig. 4.1(c)? Assume an ωu for the opamp and then choose Cf such that you get
a maximally flat magnitude response. What is the gain bandwidth product? What are the advantages and
disaadvantages of Fig. 4.1(d) when compared to Fig. 4.1(b, c)? (One sentence each)

4.2. Fig. 4.2 shows a unity gain amplifier with a capacitive load. The transconductor Gm has input and output capaci-
tors Ci = Co = Gm /ωT where ωT is a technology parameter. Assume that realizing Gm requires a bias current
Ib = 0.5(VGS − VT ) · Gm . Treat VGS − VT as a constant in this problem (it depends on the internal details
of the transconductor). Determine the transfer function of the amplifier. Determine the bias current required to
have the transfer function pole at a certain frequency ωB . Plot Ib versus ωB . What is your inference from this
plot? If the transconductor’s noise can be represented by an output noise current with a PSD 4kT Gm , determine
the integrated output noise as a function of ωB .
2 EE5320: Analog Integrated Circuit Design; Nagendra Krishnapura ([email protected])

Ci Gm Gm
Co Vo
Vi +
vx Gmvx
− CL Gmvx

Figure 4.2: Problem 4.2.

RL
Ro Ro
io
vo
Ri Ri
B B B
Vbias+vi +− Vbias+vi +− vo Vbias +−
Ro Ibias+ii
Ri

(a) (b) (c)

4.3. Fig. 4.3 shows the basic single-transistor amplifier stages. Determine the gain (vo /vi or io /ii as applicable),
input resistance, and the output resistance when (a) the bulk terminal “B” is connected to the source, and (b)
when it is connected to ground. Show the small signal equivalent circuits and very brief calculations. Present
the final results in the form of a table with these quantities for the two cases. Very briefly comment on whether
body effect makes them “better” or “worse”. Model the transistors using gm , gds , and gmb .

4.4. Fig. 4.4 shows the basic cascode amplifier and a gain-boosted cascode amplifier. Give the expressions for the
output impedance Zo in these cases. In case of the gain-boosted opamp, show the results with (a) A(s) = ωu /s
and (b) A(s) = Ao /(1 + s/p1 ), p1 = ωu /Ao . Sketch the Bode magnitude and phase plots of Zo , on the same
set of axes for all 3 cases. What is the utility of the gain-boosted cascode?

4.5. The loop gain L(s) of a system with N extra poles and M < N extra zeros is given by
∑M
ωu,loop m=0 bm sm
L(s) = ∑N
s n=0 an s
n

b0 = a0 = 1. What does the loop gain step response (inverse laplace transform of L(s)/s) look like after the
initial transient period? Give your answer in terms of the poles of the additional factor (Hint: Split L(s) into a
sum of two parts, one of which is ωu,loop /s; This problem doesn’t require a lot of algebra, but requires reasoning
and basics of polynomials)

4.6. Determine the closed loop natural frequency and damping factor of an opamp in unity feedback when the opamp
EE5320: Analog Integrated Circuit Design; Nagendra Krishnapura ([email protected]) 3

Zo Zo

+
V0
V0 M2 −A(s) M2

VG1+vi M1 VG1+vi M1

(a) (b)

Figure 4.4: Problem 4.4. (a) Cascode, (b) Gain boosted cascode.

gain if A1 or A2 given below. Also determine the condition for critical damping

ωu 1
A1 (s) =
s 1 + s/p2
( )
ωu z1 s
A2 (s) = 1+
s2 z1

Sketch the loop gain in the two cases (for critically damped closed loop) on the same axes. Mark key points
clearly.