Faculty of Engineering & Information Technology

Al-AZHAR UNIVERSITY

Microcontrollers:
Programming and Applications
(ITME 4336 )

Chapter 3
Mid-range PIC Architecture
Lecturer: Dr. Mohammad Aqel
First Semester 2020/2021

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 Mid-range PIC Architecture

• We limit the coverage to the mid-range family of PICs.

• Within this family we have concentrated our attention on

the two most used, documented, and popular PICs: the
16F84A and the 16F877A.

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 Processor Architecture and Design
Harvard Architecture

• The PIC microcontrollers do not use the conventional

von Neumann architecture but a different hardware
design often referred to as Harvard architecture.

• Originally, Harvard architecture referred to a computer

design in which data and instruction used different signal
paths and storage areas.

• In other words, data and instructions are not located in

the same memory area but in separate ones.

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One consequence of the traditional von Neumann architecture is that the processor
can either read or write instructions or data but cannot do both at the same time,
since both instructions and data use the same signal lines.

In a machine with Harvard architecture, on the other hand, the processor can read
and write instructions and data to and from memory at the same time. This results
in a faster, even though more complex, machine. Thus a greater flow of data is
possible through the central processing unit, and of course, a greater speed of
work.
The figure below shows the program and data memory space in a mid-range PIC.

Mid-range PIC Memory (Harvard Architecture)

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• PICs have 8-bit data words but either 12-, 14-, or 16-bit program
instructions.

• PIC16F84A and PIC16F877A uses 14 bits for instructions which

allows for all instructions to be one word instructions.

• It is also typical for Harvard architecture to have fewer instructions

than von-Neumann's, and to have instructions usually executed in
one cycle.

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 RISC CPU Design
• The original design idea of the CISC (Complex
Instruction Set Computer) architecture was to
provide high-level instructions in order to facilitate
the implementation of high-level languages.

• However, some argued that the CISC architecture

did not result in better performance. Furthermore,
the more complex the instruction set resulted in
greater decoding time. At the same time,
implementing large instruction sets required more
design effort.
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• In contrast, a RISC (Reduced Instruction Set Computer)
machine contains fewer instructions and each instruction
performs more elementary operations.

• Consequences of this are a smaller silicon area, faster

execution, and reduced program size with fewer
accesses to main memory.

• The PIC designers have followed the RISC route.

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• Microcontrollers with Harvard architecture are
also called "RISC microcontrollers".
• Microcontrollers with von-Neumann's
architecture are called 'CISC microcontrollers'.
• Since PIC16F84 is a RISC microcontroller, that
means that it has a reduced set of instructions,
more precisely 35 instructions
• All of these instructions are executed in one
cycle except for jump and branch instructions.

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 Mid-Range Device Versions
• The device names used by Microchip use different
encodings to represent different versions of the various
devices.

• For example, the first letter following the family

affiliation designator represents the memory type of the
device, as follows:

1. The letter C, as in PIC16Cxxx, refers to devices with EPROM

type memory.

2. The letters CR, as in PIC16CRxxx, refer to devices with ROM

type memory.

3. The letter F, as in PIC16Fxxx, refers to devices with flash

memory.
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 Microcontroller PIC16F84
• PIC16F84 belongs to a class of 8-bit microcontrollers of RISC
architecture.

• Program memory (FLASH) - for storing a written program.

Since memory made in FLASH technology can be programmed and
cleared more than once, it makes this microcontroller suitable for
device development.

• EEPROM - data memory that needs to be saved when there is no

supply.

• It is usually used for storing important data that must not be lost if
power supply suddenly stops. For instance, one such data is an
assigned temperature in temperature regulators. If during a loss of
power supply this data was lost, we would have to make the
adjustment once again upon return of supply. Thus our device
looses on self-reliance.

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 PIC16F84
• RAM - data memory used by a program during its execution.

PORTA and PORTB are physical connections between the

microcontroller and the outside world. Port A has five, and port B
eight pins.

• FREE-RUN TIMER is an 8-bit register inside a microcontroller that

works independently of the program.

• On every fourth clock of the oscillator it increments its value until it

reaches the maximum (255), and then it starts counting over again
from zero.

• CENTRAL PROCESSING UNIT has a role of connective element

between other blocks in the microcontroller. It coordinates the work
of other blocks and executes the user program.

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 PIC16F84

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 Pin description
PIC16F84 has a total of 18 pins. It is most frequently found in a DIP18 type of
case but can also be found in SMD case which is smaller from a DIP.

DIP is an abbreviation for Dual In Package. SMD is an abbreviation for Surface

Mount Devices .

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• Pins on PIC16F84 microcontroller have the following meaning:
Pin no.1 RA2 Second pin on port A. Has no additional function
Pin no.2 RA3 Third pin on port A. Has no additional function.
Pin no.3 RA4 Fourth pin on port A. TOCKI which functions as a timer is also
found on this pin
Pin no.4 MCLR Reset input and Vpp programming voltage of a microcontroller

Pin no.5 Vss Ground of power supply.

Pin no.6 RB0 Zero pin on port B. Interrupt input is an additional function.
Pin no.7 RB1 First pin on port B. No additional function.
Pin no.8 RB2 Second pin on port B. No additional function.
Pin no.9 RB3 Third pin on port B. No additional function.
Pin no.10 RB4 Fourth pin on port B. No additional function.
Pin no.11 RB5 Fifth pin on port B. No additional function.
Pin no.12 RB6 Sixth pin on port B. 'Clock' line in program mode.
Pin no.13 RB7 Seventh pin on port B. 'Data' line in program mode.

Pin no.14 Vdd Positive power supply pole.

Pin no.15 OSC2 Pin assigned for connecting with an oscillator
Pin no.16 OSC1 Pin assigned for connecting with an oscillator
Pin no.17 RA0 Zero pin on port A. No additional function
Pin no.18 RA1 First pin on port A. No additional function.

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 Single-word Instructions
• One of the consequences of the PIC’s Harvard architecture is
that the instructions can be wider than the 8-bit data size.

• Since the device has separate buses for instructions and

data, it is possible for instructions to be sized differently than
data items.

• In the mid-range PICs each instruction is 14-bits wide and

every fetch operation brings into the execution unit one
complete operation code.

• Since each instruction takes up one 14-bit word, the number

of words of program memory in a device exactly equals the
number of program instructions that can be stored.

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• Since each instruction is 14-bits wide and the program
memory bus is also 14-bits wide, each instruction
contains all the necessary information, so it can be
executed without any additional fetching.

• Clock is microcontroller's main starter, and is obtained

from an external component called an "oscillator".

• Clock from the oscillator enters a microcontroller via

OSC1 pin where internal circuit of a microcontroller
divides the clock into four even clocks Q1, Q2, Q3, and
Q4 which do not overlap.

• These four clocks make up one instruction cycle (also

called machine cycle) during which one instruction is
executed.
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• Instruction is called from program memory on every Q1
and is written in instruction register on Q4. Decoding and
execution of instruction are done between the next Q1
and Q4 cycles.

• On the following diagram we can see the relationship

between instruction cycle and clock of the oscillator
(OSC1) as well as that of internal clocks Q1-Q4.

• Program counter (PC) holds information about the

address of the next instruction.

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The PIC clocking system is designed so that an instruction is fetched,
decoded, and executed every four clock cycles.

In this manner, a PIC equipped with a 4MHz oscillator clock beats at a

rate of 0.25 µs. Since each instruction executes at every four clock cycles,
each instruction takes 1 µs.
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 Clock generator - Oscillator
• Mid-range PICs require an external device to produce the clock
cycles required for its operation.

• Oscillator circuit is used for providing a microcontroller with a clock.

Clock is needed so that microcontroller could execute a program or
program instructions.

• The PIC executes an instruction every four clock cycles, so the

oscillator speed determines the device performance.

• Mid-range PICs support up to eight different oscillator modes. For

example, in the 16F877, any of the eight modes can be used, while
in the 16F84 only four oscillator modes are available.

• The oscillator mode is selected at device programming time and

cannot be changed at runtime.
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 Oscillator
• The configuration bits, which are non-volatile flags set
during device programming, determine which oscillator
mode is used by the program, among the following:

1. LP Low Power Frequency Crystal

2. XT Crystal Resonator
3. HS High Speed Crystal Resonator
4. RC External Resistor/Capacitor
5. EXTRC External Resistor/Capacitor
6. EXTRC External Resistor/Capacitor with CLKOUT
7. INTRC Internal 4 MHz Resistor/Capacitor
8. INTRC Internal 4 MHz Resistor/Capacitor with CLKOUT

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• The resistor/capacitor oscillator option is the least expensive to implement,
but also the least accurate one. This option is used only in systems where
clock accuracy and consistency are not issues.

• The low-power frequency crystal option is the one with lowest power
consumption and can be used in systems where the power consumption
element is important.

• The first three oscillator modes (LP, XT, and HS) allow selecting different
frequency ranges.

• The HS option has the highest frequency range and consumes the most
power.

• The XT option is based on a standard crystal resonator and has a mid-

range power consumption.

• The LP option has low gain and consumes the least power of the three
crystal modes.

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 XT Oscillator
• Crystal oscillator is kept in metal housing with two pins where
you have written down the frequency at which crystal
oscillates.
• One ceramic capacitor of 30pF whose other end is connected to
the ground needs to be connected with each pin.

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 Resonator operation
• XT Oscillator and capacitors can be packed
in joint case with three pins. Such element is
called ceramic resonator.

• This device, called a ceramic resonator,

contains three pins. The ones on the
extremes are connected to the corresponding
oscillator input lines on the PIC, labeled
OSC1 and OSC2. The center pin is
connected to ground.

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 RC oscillator
• In applications where great time precision is not necessary, RC oscillator
offers additional savings during purchase by connecting an external resistor
and a capacitor to the OSC1 input of the microcontroller as shown in the
Figure.
• Resonant frequency of RC oscillator depends on supply voltage rate,
resistance R, capacity C and working temperature.
• For most applications, using a 5 K resistor with a 20 pF capacitor gives
about 4 MHz and this may be acceptable in non-time critical applications.

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 Internal oscillator
• Some PIC microcontrollers (e.g. PIC12C672 and PIC16F628) have built-in
oscillator circuits and they do not require any external timing components.

• The built-in oscillator is usually set to operate at 4 MHz and is selected during
the programming of the device. For example, the PIC16F62X series of PIC
microcontrollers can be operated with an internal resistor– capacitor-based
4MHz oscillator (called mode INTRC).

• For example, the internal oscillator frequency in the PIC16F62X can be set by
connecting a resistor to pin RA7 as shown in the Figure.

• Depending on the value of this resistance the oscillator frequency can be

selected from 200 kHz to 10.4 MHz (see Table 2.8). When used in this mode,
pin RA7 is not available as a digital I/O pin.

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 System Reset
• The reset mechanism places the PIC in a known condition.

• The reset mechanism is used to gain control of a runaway or hung-up

program, as a forced interrupt in program execution, or to make the
device ready at program load time.

• The mid-range PICs are capable of several reset actions:

1. Reset during power on (POR).

2. !MCLR reset during normal operation.
3. Reset during SLEEP mode.
4. Watchdog timer reset (WDT).
5. Brown-out reset (BOR).
6. Parity error reset.

• The first two reset sources in the preceding list are the most common.
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• POR reset serves to bring all PIC registers to an initial state,
including the program counter register.

• The processor’s !MCLR pin produces the reset action when it reads
logic zero. The exclamation sign preceding the pin’s name (or a line
over it) indicates that the action is active-low.

• To prevent accidental resets the !MCLR pin must be connected to

the positive voltage supply through a 5K or 10K resistor.

• When a resistor serves to place a logic

one on a line it is called a pull-up resistor.
• This switch is useful during program
development since it provides a way of
forcefully restarting execution.
• The Figure shows a typical wiring of the
!MCLR line to provide a reset action.

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 • User RAM memory is not affected by a reset.

• The GPRs (general purpose register) are in an unknown state

during power-up and are not changed by reset.

• SFR registers, on the other hand, are reset to an initial

state. The initialization conditions for each of the SFRs are
found in the device data sheet.

• The most important of these is the program count (PC)

which is reset to zero. This action directs execution to the first
instruction and effectively restarts the program.

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• Reset at supply voltage drop below the permissible
(Brown-out Reset).

• Impulse for resetting during voltage voltage-up is

generated by microcontroller itself when it detects an
increase in supply Vdd (in a range from 1.2V to 1.8V).

• That impulse lasts 72ms which is enough time for an

oscillator to get stabilized.

• These 72ms are provided by an internal PWRT timer

(Power Up timer) which has its own RC oscillator.

• Microcontroller is in a reset mode as long as PWRT is

active.
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• However, as device is working, problem arises when supply
doesn't drop to zero but falls below the limit that guarantees
microcontroller's proper functioning (instability of power
supply).
•To solve this problem we need to make sure that microcontroller
is in a reset state each time supply falls below the approved limit.

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 Ports
• Port refers to a group of pins on a microcontroller which
can be accessed simultaneously.

• Physically, port is a register inside a microcontroller

which is connected by wires to the pins of a
microcontroller.

• Ports represent physical connection of Central

Processing Unit with an outside world.

• Due to functionality, some pins have two fold roles like

PA4/TOCKI for instance, which is simultaneously the
fourth bit of port A and an external input for free-run
counter.

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All port pins can be defined as input or output, according to the needs of a device
that's being developed.

In order to define a pin as input or output pin, the right combination of zeros and
ones must be written in TRIS register.

If at the appropriate place in TRIS register a logical "1" is written, then that pin
is an input pin, and if the opposite is true, it's an output pin.

Every port has its proper TRIS register. Thus, port A has TRISA, and port B has
TRISB.
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 PORTB
• PORTB has 8 pins joined to it. The appropriate register for direction
of data is TRISB.

• Setting a bit in TRISB register defines the corresponding port pin as

an input pin, and resetting a bit in TRISB register defines the
corresponding port pin as the output pin.

• TRISB =0x0F; pins 0, 1, 2, and 3 are declared for input, and pins 4, 5, 6,
and 7 for output.

• Each pin on PORTB has a weak internal pull-up resistor (resistor

which defines a line to logic one) which can be activated by resetting
the seventh bit RBPU in OPTION register.

• These 'pull-up' resistors are automatically being turned off when

port pin is configured as an output. When a microcontroller is
started, pull-up's are disabled.
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 PORTA
PORTA has 5 pins joined to it. The corresponding register for data direction is
TRISA.

TRISA =0x1F; pins 0, 1, 2, 3, and 4 are declared to be input, and pins 5, 6,

and 7 to be output pins.

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 The w Register
• PIC16F84 contains an 8-bit arithmetic
logic unit and 8-bit work registers.

• PICs have only one addressable register

called the work register or the w register.

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 Memory Organization
• PIC16F84 has two separate memory blocks, one for data and the
other for program. EEPROM memory and GPR registers in RAM
memory make up a data block, and FLASH memory makes up a
program block.

• Data memory consists of EEPROM and RAM memories.

• EEPROM memory consists of 64 eight bit locations.

• RAM memory for data occupies space on a memory map from

location 0x0C to 0x4F which comes to 68 locations.

• The size of program memory is 1024 locations with 14 bits width

where locations zero and four are reserved for reset and interrupt
vector.

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 The Data Registers
• PIC’s data memory consists of registers, also called file
registers.

• These behave more like conventional variables, and can

be addressed directly and indirectly.

• All data registers are 8-bits.

• Data registers come in two types: general purpose

registers (GPRs) and special function registers (SFRs).

• Locations of RAM memory are also called GPR registers

which can be accessed regardless of which bank is
selected at the moment.

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 SFR registers
Registers which take up first 12
locations in banks 0 and 1 are
registers of specialized function
assigned with certain blocks of
the microcontroller. These are
called Special Function
Registers.

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 The SFRs
• The special function registers are defined by the
device architecture and have reserved names.

• For example, the TMR0 register is part of the

system timer, the STATUS register holds several
processor flags, and the INTCON register is
used in controlling interrupts.

• The SFR are allocated starting at the lowest

RAM address (address 0).

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 Memory Banks
• The PIC instruction format devotes seven bits to the
address field.

• A 7-bit address allows access to only 128 memory

locations.

• Since many PICs of the mid-range family have more

than 128 bytes of data memory, an addressing scheme
based on memory banks must be implemented.

• The number of banks vary according to the amount of

available RAM, always in multiples of 128-bytes.

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• All mid-range PICs have banked memory. Banking is accomplished through
the special bank-select bits in the STATUS register.

• Not all banking bits are implemented in all devices. For example, the
16F84/16F84A contain two memory banks; therefore, bank shifting requires a
single bank-select bit (RP0). In this case the RP1 bit is not implemented.

• In devices with more than two memory banks bank selection is as shown in
Table 8.2.

Figure 8-7 shows how banked memory is accessed in direct addressing. The
illustration refers to a mid-range PIC with four banks, as is the case with the
16F87x.
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 Figure 8-7 Memory Access in Direct Addressing

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• Selecting one of the banks is done via RP0 and RP1 bits in
STATUS register.
Example:

bcf STATUS, RP0

Instruction BCF clears bit RP0 (RP0=0) in STATUS register and thus
sets up bank 0.

bsf STATUS, RP0

Instruction BSF sets the bit RP0 (RP0=1) in STATUS register and thus
sets up bank1.

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 STATUS Register

• The STATUS register is one of

the SFRs in the mid-range PICs.

• The bits in this register reflect the

arithmetic status of the ALU, the
RESET status, and the bits that
select which memory bank is
currently being accessed.

• Because the bank selection bits

are in the STATUS register it must
be present and at the same
relative position in every bank.

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 STATUS Register

•bit 0 C (Carry) Transfer

Bit that is affected by operations of addition, subtraction and shifting.

1= transfer occurred from the highest resulting bit
0=transfer did not occur

•bit 1 DC (Digit Carry) DC Transfer

Bit affected by operations of addition, subtraction and shifting. Unlike C bit, this bit represents
transfer from the fourth resulting place. It is set by addition when occurs carry from bit3 to bit4, or by
subtraction when occurs borrow from bit4 to bit3, or by shifting in both direction.
1=transfer occurred on the fourth bit according to the order of the result
0=transfer did not occur

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• bit 2 Z (Zero bit) Indication of a zero result
This bit is set when the result of an executed arithmetic or logic operation is zero.
1=result equals zero
0=result does not equal zero

• bit 3 PD (Power-down bit)

Bit which is set whenever power supply is brought to a microcontroller as it starts running,
after each regular reset and after execution of instruction CLRWDT. Instruction SLEEP
resets it when microcontroller falls into low consumption/usage regime.
1=after supply has been turned on
0= executing SLEEP instruction

• bit 4 TO Time-out ; Watchdog overflow.

Bit is set after turning on the supply and execution of CLRWDT and SLEEP instructions.
Bit is reset when watchdog gets to the end signaling that something is not right.
1=overflow did not occur
0=overflow did occur

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• bit6:5 RP1:RP0 (Register Bank Select bits)

These two bits are upper part of the address for direct addressing. Since
instructions which address the memory directly have only seven bits, they need one
more bit in order to address all 256 bytes which is how many bytes PIC16F84 has.
RP1 bit is not used, but is left for some future expansions of this microcontroller.

01=first bank
00=zero bank
10= 2nd bank
11= 3rd bank

• bit 7 IRP (Register Bank Select bit)

Bit whose role is to be an eighth bit for indirect addressing of internal RAM.
0=bank 0 and 1 (from 00h to FFh)
1=bank 2 and 3

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 Figure 8-9 16F84A File Register Map

Note that all GPRs are mapped to bank 0. In the 16F84A, this means that user-
defined registers created in bank 0 are accessible no matter which bank is currently
selected.
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• The Figure 8-8 is a map of
the register file in the 16F87x
family.
• General purpose registers do
not start at the same address
offset in each bank. However,
there is a common area that
extends from 0x70 to 0x7f
that is accessible no matter
which bank is selected.
• This 16-byte area are
accessible no matter which
bank is currently selected.
• GPRs created outside this
common area are only
accessible when the
corresponding bank is
selected.
Figure 8-8 16F87x File Register Map
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• The registers in boldface in Figure 8-8 are accessible
from any bank. These registers, such as STATUS and
the indirect addressing registers FSR and INDF, are
bank-independent.

• Also, some registers are mirrored in more than one

bank. For example, the PORTB register is accessible in
bank 0 and in bank 2, and the TRISB register in bank 1
and bank 3. The mirrored registers are designed to
simplify data access and minimize bank changes in
applications.

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 The GPRs
General purpose registers are created and named by the programmer and must be
allocated in the reserved memory space.

In the 16F84A all GPRs are mapped to the same memory area, no matter in which
bank they are defined. The GPR memory space actually extends from 0x0c to 0x4f
(68 bytes).

A different situation exists in the 16F87x PICs, in which only 16 bytes of GPR
space is mirrored in all three banks. This is the memory referred to as the common
area in Figure 8-8.

In the 16F87x the total available GPR space is as follows:

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 Instruction Format
• All members of the mid-range family of PICs
have 14-bit instructions and a set of 35
instructions.

• The format for the instructions follows three

different patterns: byte-oriented, bit-oriented,
and literal and control instructions.

• Figure 8-2 shows the bitmaps for the three

types.

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Figure 8-2 Mid-Range Instruction Formats

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 Instruction Format
• Instructions that reference a file register do so in a 7-bit
field.

• The numerical range of seven bits is 128 values. For this

reason, the mid-range PICs that address more than 128
data memory locations must resort to banking
techniques.

• In this case, a bit or bit field in the STATUS register

serves to select the bank currently addressed.

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 Mid-Range Instruction Set
The mid-range PIC instruction set consists of 35 instructions, divided into three
general groups:
1. Byte-oriented and byte-wise file register operations
2. Bit-oriented and bit-wise file register operations
3. Literal and control instructions
Table 8.1 lists and briefly describes each instruction in the mid-range set.

Alazhar University Dr. Mohammad Aqel 58

GAZA First Semester 2020/2021
Alazhar University Dr. Mohammad Aqel 59
GAZA First Semester 2020/2021