2 Marks

Winter-22 Q.15 State the function of READY and INTR pin of 8086
Ans:
Q.1 State the function of the following pins of 8086 microprocessor. Ready: It is used as acknowledgement from slower I/O device or memory. It is
(i) ALE (ii) DT | R̅ Active high signal, when high; it indicates that the peripheral device is ready to
transfer data.
Q.2 Write an assembly language instruction of 8086 microprocessor to INTR: This is a level triggered interrupt request input, checked during last clock
(i) Divide the content of AX register by 50H. cycle of each instruction to determine the availability of request. If any interrupt
(ii) Rotate the content of BX register by 4-bit towards left. request is occurred, the processor enters the interrupt acknowledge cycle.

Q.3 List directives used for procedure. Q.16 What is role of XCHG instruction in assembly language program? Give
example
Q.4 State any two differences between FAR and NEAR procedure. Ans:
Role of XCHG:
Q.5 Write algorithm to find sum of a series of numbers. This instruction exchanges the contents of a register with the contents of another
register or memory location.
Q.6 What is the use of REP in string related instruction ? Explain. Example:
XCHG AX, BX ; Exchange the word in AX with word in BX.
Q.7 Differentiate between ROL and RCL.
Q.17 List assembly language programming tools.
Summer-22 Ans: 1. Editors
2. Assembler
Q.8 Draw the labelled format of 8086 flag register. 3. Linker
4. Debugger.
Q.9 State any two differences between TEST and AND instructions.
Q.18 Define Macro.Give syntax.
Q.10 State the function of editor and assembler. Ans:
Macro: Small sequence of the codes of the same pattern are repeated frequently at
Q.11 Write any two difference between NEAR and FAR procedure. different places which perform the same operation on the different data of same
data type, such repeated code can be written separately called as Macro.
Q.12 Write an ALP to add two 8 bit numbers. Syntax:
Macro_name MACRO[arg1,arg2,…..argN)
Q.13 Define immediate addressing mode with suitable example. …..
End
Q.14 State the use of DAA instruction in BCD addition.
Q.19 Draw flowchart for multiplication of two 16 bit numbers.
Ans:
 A0: A0 is analogous to BHE for the lower byte of the data bus, pinsD0-D7. A0 bit
is Low during T1 state when a byte is to be transferred on the lower portion of the
bus in memory or I/O operations.

Q.23 How single stepping or tracing is implemented in 8086?

Ans: By setting the Trap Flag (TF) the 8086 goes to single-step mode. In this
mode, after the implementation of every instruction s 8086 generates an internal
interrupt and by writing some interrupt service routine we can show the content of
desired registers and memory locations. So it is useful for debugging the program.
OR
If the trap flag is set, the 8086 will automatically do a type-1 interrupt after each
Q.20 Draw machine language instruction format for Register-to-Register instruction executes. When the 8086 does a type-1 interrupt, it pushes the flag
transfer. register on the stack.
Ans: OR
The instructions to set the trap flag are:
PUSHF; Push flags on stack
MOV BP, SP; Copy SP to BP for use as index
OR WORD PTR[BP+0],0100H; Set TF flag
POPF; Restore flag Register
Q.21 State the use of STC and CMC instruction of 8086.
Ans: Q.24 State the role Debugger in assembly language programming.
STC – This instruction is used to Set Carry Flag. CF1 Ans:
CMC – This instruction is used to Complement Carry Flag. Debugger: Debugger is the program that allows the extension of program in single
CF< ~ CF step mode under the control of the user. The process of locating & correcting errors
using a debugger is known as Debugger.
Q.22 State the function of BHE and A0 pins of 8086. Some examples of debugger are DOS debug command Borland turbo debugger
Ans: BHE: BHE stands for Bus High Enable. It is available at pin 34 and used to TD, Microsoft debugger known as code view cv, etc…
indicate the transfer of data using data bus D8-D15. This signal is low during the
first clock cycle, thereafter it is active.
Q.25 Define Macro & Procedure. Q.26 Write ALP for addition of two 8bit numbers. Assume suitable data.
Ans: Ans:
Macro: A MACRO is group of small instructions that usually performs one task. It .Model small
is a reusable section of a software program. A macro can be defined anywhere in a .Data
program using directive MACRO &ENDM. NUM DB 12H
General Form: .Code
MACRO-name MACRO [ARGUMENT 1,……….ARGUMENT N] START:
----- MOV AX, @DATA
MACRO CODIN GOES HERE MOV DS,AX
ENDM MOV AL, NUM
E.G DISPLAY MACRO 12,13 MOV AH,13H
--------------------- ADD AL,AH
MACRO STATEMENTS MOV AH, 4CH
----------------------- INT 21H
ENDM ENDS
END
Procedure: A procedure is group of instructions that usually performs one task. It
is a reusable section of a software program which is stored in memory once but can Q.27 List any four instructions from the bit manipulation instructions of 8086.
be used as often as necessary. A procedure can be of two types. 1) Near Procedure Ans: Bit Manipulation Instructions
2) Far Procedure These instructions are used to perform operations where data bits are involved, i.e.
operations like logical, shift, etc.

Following is the list of instructions under this group −

Instructions to perform logical operation
 NOT − Used to invert each bit of a byte or word.
 AND − Used for adding each bit in a byte/word with the corresponding
bit in another byte/word.
 OR − Used to multiply each bit in a byte/word with the corresponding
bit in another byte/word.
 XOR − Used to perform Exclusive-OR operation over each bit in a
byte/word with the corresponding bit in another byte/word.
Q.28 State the use of REP in string related instructions. Winter-23
Ans  This is an instruction prefix which can be used in string instructions.
 It causes the instruction to be repeated CX number of times.
 After each execution, the SI and DI registers are incremented/decremented
based on the DF (Direction Flag) in the flag register and CX is decremented i.e.
DF = 1; SI, DI decrements.

E.g. MOV CX, 0023H

CLD
REP MOVSB
The above section of a program will cause the following string operation
ES: [DI] ← DS: [SI]
SI ← SI + I
DI ← DI + I
CX ← CX – 1
to be executed 23H times (as CX = 23H) in auto incrementing mode (as DF is
cleared).

REPZ/REPE (Repeat while zero/Repeat while equal) Summer-23

 It is a conditional repeat instruction prefix.
 It behaves the same as a REP instruction provided the Zero Flag is set
(i.e. ZF = 1).
 It is used with CMPS instruction.
REPNZ/REPNE (Repeat while not zero/Repeat while not equal)
 It is a conditional repeat instruction prefix.
 It behaves the same as a REP instruction provided the Zero Flag is reset
(i.e. ZF = 0).
 It is used with SCAS instruction
4 Marks Summer-22

Winter-22 Q.14 Describe the directives used to define the procedure with suitable example.

Q.1 What do you mean by procedure ? Explain re-centrant and re-entrant Q.15 Write the function of following pins of 8086 :
procedure. (i) BHE
(ii) ALE
Q.2 What is memory segmentation ? Explain it with reference to 8086 (iii) READY
microprocessor. (iv) RESET

Q.3 Describe following assembler directives : Q.16 Describe any four assembler directives with suitable example.
(i) DB (ii) EQU (iii) Segment (iv) Assume
Q.17 Describe DAS instruction with suitable example.
Q.4 What are the functions of CALL and RET instructions ? Describe in brief.
Q.18 Describe memory segmentation in 8086 with suitable diagram.
Q.5 Describe register organization of 8086 microprocessor.
Q.19 Write an ALP to multiply two 16 bit signed numbers.
Q.6 Write an assembly language program to add BCD numbers in an array of 10
numbers. Assume suitable array. Store the result at the end of the array. Q.20 Write an ALP to count odd numbers in the array of 10 numbers.

Q.7 Write a procedure to find factorial of given number. Q.21 Write a MACRO to perform 32 bit by 16 bit division of unsigned numbers.

Q.8 Write an assembly language program for conversion of BCD to Hexe number. Q.22 Describe how 20 bit Physical address is generated in 8086 microprocessor
with suitable example.
Q.9 Draw functional block diagram of 8086 microprocessor.
Q.23 Write an ALP to find largest number in the array.
Q.10 Write an assembly language program to arrange the numbers in ascending
order (Assume suitable data). Q.24 Write an ALP to count number of ‘0’ in 8 bit number.

Q.11 Write an assembly language program to Count No. of 1’s in a 16-bit number. Q.25 Write an ALP to subtract two BCD number using procedure.

Q.12 Write an assembly language program using MACRO to perform following Q.26 Describe re-entrant and recursive procedure with suitable diagram.
operation.
X = (A + B) * (C + D) Q.27 Give the difference between intersegment and intrasegment CALL

Q.13 Describe with suitable example how parameter is passed on the stack in 8086
assembly language procedure.
 Conditional /Status Flags
C-Carry Flag: It is set when carry/borrow is generated out of MSB of result. (i.e
D7 bit for 8-bit operation, D15 bit for a 16 bit operation).
P-Parity Flag: This flag is set to 1 if the lower byte of the result contains even
number of 1’s otherwise it is reset.
AC-Auxiliary Carry Flag: This is set if a carry is generated out of the lower
nibble, (i.e. From D3 to D4 bit)to the higher nibble
Z-Zero Flag: This flag is set if the result is zero after performing ALU operations.
Otherwise it is reset.
S-Sign Flag: This flag is set if the MSB of the result is equal to 1 after performing
ALU operation , otherwise it is reset.
O-Overflow Flag: This flag is set if an overflow occurs, i.e. if the result of a
signed operation is large enough to be accommodated in destination register.
Control Flags
T-Trap Flag: If this flag is set ,the processor enters the single step execution
mode.
I-Interrupt Flag: it is used to mask(disable) or unmask(enable)the INTR
interrupt. When this flag is set,8086 recognizes interrupt INTR. When it is reset
INTR is masked.
D-Direction Flag: It selects either increment or decrement mode for DI &/or
SI register during string instructions.

Q.29 Explain assembly language program development steps.

Ans: 1. Defining the problem: The first step in writing program is to think very
Q.28 Draw flag register of 8086 and explain any four flags. carefully about the problem that the program must solve.
Ans: Flag Register of 8086 2. Algorithm: The formula or sequence of operations to be performed by the
program can be specified as a step in general English is called algorithm.
3. Flowchart: The flowchart is a graphically representation of the program
operation or task.
4. Initialization checklist: Initialization task is to make the checklist of entire
variables, constants, all the registers, flags and programmable ports
5. Choosing instructions: Choose those instructions that make program smaller in
size and more importantly efficient in execution.
6. Converting algorithms to assembly language program: Every step in the
algorithm is converted into program statement using correct and efficient
instructions or group of instructions.
Q.30 Explain logical instructions of 8086.(Any Four) BL = 0000 0011
Ans: Logical instructions. NOT BL gives 1111 1100
1) AND- Logical AND
Syntax: AND destination, source 4) XOR – Logical Exclusive OR
Operation Syntax: XOR destination, source
Destination ←destination AND source Operation: Destination  Destination XOR source
Flags Affected :CF=0,OF=0,PF,SF,ZF Flags Affected: CF=0, OF=0,PF,SF,ZF
This instruction AND’s each bit in a source byte or word with the same number bit This instruction exclusive, OR’s each bit in a source byte or word with the same
in a destination byte or word. The result is put in destination. number bit in a destination byte or word.
Example: AND AX, BX Example(optional)
• AND AL,BL XOR AL,BL
• AL 1111 1100 • AL 1111 1100
• BL 0000 0011 • BL 0000 0011
--------------------- ---------------------
• AL0000 0000 (AND AL,BL) • AL1111 1111 (XOR AL,BL)

2) OR – Logical OR 5)TEST
Syntax: OR destination, source Syntax: TEST Destination, Source
Operation This instruction AND’s the contents of a source byte or word with the contents of
Destination OR source specified destination byte or word and flags are updated, flags are updated as
Flags Affected: CF=0, OF=0, PF, SF, ZF result, but neither operands are changed.
This instruction OR’s each bit in a source byte or word with the corresponding bit Operation performed:
in a destination byte or word. The result is put in a specified destination. Flags  set for result of (destination AND source)
Example : TEST AL, BL ; AND byte in BL with byte in AL, no result, Update PF, SF, ZF.
• OR AL,BL e.g. MOV AL, 00000101
• AL 1111 1100 TEST AL, 1 ; ZF = 0.
• BL 0000 0011 TEST AL, 10b ; ZF = 1
---------------------
• AL1111 1111 Q.31 Write an ALP to add two 16-bit numbers.
Ans: DATA SEGMENT
3) NOT – Logical Invert NUMBER1 DW 6753H
Syntax: NOT destination NUMBER2 DW 5856H
Operation: Destination NOT destination SUM DW 0
Flags Affected: None DATA ENDS
The NOT instruction inverts each bit of the byte or words at the specified CODE SEGMENT
destination. ASSUME CS: CODE, DS: DATA
Example START: MOV AX, DATA
NOT BL MOV DS, AX
MOV AX, NUMBER1 Q.33 Write an ALP to find length of string.
MOV BX, NUMBER2 Ans: Data Segment
ADD AX, BX STRG DB 'GOOD MORNING$'
MOV SUM, AX LEN DB ?
MOV AH, 4CH DATA ENDS
INT 21H CODE SEGMENT
CODE ENDS START:
END START ASSUME CS: CODE, DS : DATA
MOV DX, DATA
Q.32 Draw functional block diagram of 8086 microprocessor. MOV DS,DX
LEA SI, STRG
MOV CL,00H
MOV AL,'$'
NEXT: CMP AL,[SI]
JZ EXIT
ADD CL,01H
INC SI
JMP
NEXT EXIT: MOV LEN,CL
MOV AH,4CH
INT 21H
CODE ENDS

Q.34 Write an assembly language program to solve p= x2+y2 using Macro.(x

and y are 8 bit numbers.
Ans: .MODEL SMALL
PROG MACRO a,b
MOV al,a
MUL al
MOV bl,al
MOV al,b
MUL al
ADD al,bl
ENDM
.DATA
x DB 02H
y DB 03H
p DB DUP()
.CODE Z DB 0
START: DATA ENDS
MOV ax,data CODE SEGMENT
MOV ds,ax ASSUME DS:DATA, CS:CODE
PROG x, y START:
MOV p,al MOV DX,DATA
MOV ah,4Ch MOV DS,DX
Int 21H MOV AX, N
END MOV CL,08
NEXT: ROL AX,01
Q.35 What is pipelining? How it improves the processing speed. JC ONE
Ans:  In 8086, pipelining is the technique of overlapping instruction fetch and INC Z
execution mechanism. ONE: LOOP NEXT
 To speed up program execution, the BIU fetches as many as six instruction bytes HLT
ahead of time from memory. The size of instruction prefetching queue in 8086 is 6 CODE ENDS
bytes. END START
 While executing one instruction other instruction can be fetched. Thus it avoids
the waiting time for execution unit to receive other instruction. Q.37 Write an ALP to find largest number in array of elements 10H, 24H,
 BIU stores the fetched instructions in a 6 level deep FIFO. The BIU can be 02H, 05H, 17H.
fetching instructions bytes while the EU is decoding an instruction or executing an Ans: DATA SEGMENT
instruction which does not require use of the buses. ARRAY DB 10H,24H,02H,05H,17H
 When the EU is ready for its next instruction, it simply reads the instruction LARGEST DB 00H
from the queue in the BIU. DATA ENDS
 This is much faster than sending out an address to the system memory and CODE SEGMENT
waiting for memory to send back the next instruction byte or bytes. START:
 This improves overall speed of the processor. ASSUME CS:CODE,DS:DATA
MOV DX,DATA
MOV DS,DX
MOV CX,04H
MOV SI ,OFFSET
ARRAY MOV AL,[SI]
UP: INC SI
CMP AL,[SI]
JNC NEXT
MOV AL,[SI]
Q.36 Write an ALP to count no.of 0’s in 16 bit number. NEXT: DEC CX
Ans: DATA SEGMENT JNZ UP
N DB 1237H MOV LARGEST,AL
MOV AX,4C00H procedure2 will return the execution to procedure1.Procedure1 will again executed
INT 21H from where it had stopped at the time of calling procrdure2 and the RET
CODE ENDS instruction at the end of this will return the program execution to main program.
END START The flow of program execution for re-entrant procedure is as shown in FIG.

Q.38 Write an ALP for addition of series of 8-bit number using procedure.
Ans: DATA SEGMENT
NUM1 DB 10H,20H,30H,40H,50H
RESULT DB 0H
CARRY DB 0H
DATA ENDS
CODE SEGMENT
ASSUME CS:CODE, DS:DATA
START: MOV DX,DATA
MOV DS, DX
MOV CL,05H
MOV SI, OFFSET NUM1
UP: CALL SUM
INC SI
LOOP UP
MOV AH,4CH
INT 21H
SUM PROC; Procedure to add two 8 bit numbers
MOV AL,[SI]
ADD RESULT, AL
JNC NEXT
INC CARRY
NEXT: RET
SUM ENDP
CODE ENDS
END START Q.40 Explain the concept of pipelining in 8086. State the advantages of
pipelining (any two).
Q.39 Describe re-entrant and recursive procedure with schematic diagram. Ans: Pipelining:
Ans: In some situation it may happen that Procedure 1is called from main program 1. The process of fetching the next instruction when the present instruction is being
Procrdure2 is called from procedure1And procrdure1 is again called from executed is called as pipelining.
procdure2. In this situation program execution flow reenters in the procedure1. 2. Pipelining has become possible due to the use of queue.
These types of procedures are called re enterant procedures. The RET instruction at 3. BIU (Bus Interfacing Unit) fills in the queue until the entire queue is full.
the end of procrdure1 returns to procedure2. The RET instruction at the end of 4. BIU restarts filling in the queue when at least two locations of queue are vacant.
Advantages of pipelining: Q.42 Explain any two assembler directives of 8086.
 The execution unit always reads the next instruction byte from the queue in Ans: 1. DB – The DB directive is used to declare a BYTE -2-BYTE variable – A
BIU. This is faster than sending out an address to the memory and waiting for the BYTE is made up of 8 bits.
next instruction byte to come. Declaration examples:
 More efficient use of processor. Byte1 DB 10h
 Quicker time of execution of large number of instruction. Byte2 DB 255; 0FFh, the max. possible for a BYTE
 In short pipelining eliminates the waiting time of EU and speeds up the CRLF DB 0Dh, 0Ah, 24h ;Carriage Return, terminator BYTE
processing. -The 8086 BIU will not initiate a fetch unless and until there are two 2. DW – The DW directive is used to declare a WORD type variable – A WORD
empty bytes in its queue. 8086 BIU normally obtains two instruction bytes per occupies 16 bits or (2 BYTE).
fetch. Declaration examples:
Word DW 1234h
Q.41 Compare Procedure and Macros. (4 points). Word2 DW 65535; 0FFFFh, (the max. possible for a WORD)
3. DD – The DD directive is used to declare a DWORD – A DWORD double word
is made up of 32 bits =2 Word’s or 4 BYTE.
Declaration examples:
Dword1 DW 12345678h
Dword2 DW 4294967295 ;0FFFFFFFFh.
4. EQU - The EQU directive is used to give name to some value or symbol. Each
time the assembler finds the given names in the program, it will replace the name
with the value or a symbol. The value can be in the range 0 through 65535 and it
can be another Equate declared anywhere above or below.
The following operators can also be used to declare an Equate:
THIS BYTE
THIS WORD
THIS DWORD
A variable – declared with a DB, DW, or DD directive – has an address and has
space reserved at that address for it in the .COM file. But an Equate does not
have an address or space reserved for it in the .COM file.
Example:
A – Byte EQU THIS BYTE
DB 10
A_ word EQU THIS WORD
DW 1000
A_ dword EQU THIS DWORD
DD 4294967295
Buffer Size EQU 1024
Buffer DB 1024 DUP (0)
Buffed_ ptr EQU $ ; actually points to the next byte after the; 1024th byte in ADC: Add with Carry
buffer. This instruction performs the same operation as ADD instruction, but adds the
5. SEGMENT: carry flag to the result.
It is used to indicate the start of a logical segment. It is the name given to the Eg. ADC 0100H
segment. ADC AX, BX
Example: the code segment is used to indicate to the assembler the start of logical ADC AX, [SI]
segment. ADC AX, [5000]
6. PROC: (PROCEDURE) ADC [5000], 0100H
It is used to identify the start of a procedure. It follows a name we give the SUB: Subtract
procedure. After the procedure the term NEAR and FAR is used to specify the The subtract instruction subtracts the source operand from the destination operand
procedure and the result is left in the destination operand.
Example: SMART-DIVIDE PROC FAR identifies the start of procedure named Eg. SUB AX, 0100H
SMART-DIVIDE and tells the assembler that the procedure is far. SUB AX, BX
SUB AX, [5000H]
Q.43 Write classification of instruction set of 8086. Explain any one type out SUB [5000H], 0100H
of them. SBB: Subtract with Borrow
Ans: classification of instruction set of 8086 The subtract with borrow instruction subtracts the source operand and the borrow
 Data Transfer Instructions flag (CF) which may reflect the result of the previous calculations, from the
 Arithmetic Instructions destination operand
 Bit Manipulation Instructions Eg. SBB AX, 0100H
 String Instructions SBB AX, BX
 Program Execution Transfer Instructions (Branch & Loop Instructions) SBB AX, [5000H]
 Processor Control Instructions SBB [5000H], 0100H
 Iteration Control Instructions INC: Increment
 Interrupt Instructions This instruction increases the contents of the specified Register or memory
location by 1. Immediate data cannot be operand of this instruction.
1) Arithmetic Instructions: Eg. INC AX
These instructions are used to perform arithmetic operations like addition, INC [BX]
subtraction, multiplication, division, etc. INC [5000H]
ADD: The add instruction adds the contents of the source operand to the DEC: Decrement
destination operand. The decrement instruction subtracts 1 from the contents of the specified register or
Eg. ADD AX, 0100H memory location.
ADD AX, BX Eg. DEC AX
ADD AX, [SI] DEC [5000H]
ADD AX, [5000H] NEG: Negate
ADD [5000H], 0100H The negate instruction forms 2’s complement of the specified destination in the
ADD 0100H instruction. The destination can be a register or a memory location. This instruction
can be implemented by inverting each bit and adding 1 to it.
Eg. NEG AL DIV: Unsigned division
AL = 0011 0101 35H Replace number in AL with its 2’s complement This instruction is used to divide an unsigned word by a byte or to divide an
AL = 1100 1011 = CBH unsigned double word by a word.
CMP: Compare Eg.
This instruction compares the source operand, which may be a register or an DIV CL ; Word in AX / byte in CL
immediate data or a memory location, with a destination operand that may be a ; Quotient in AL, remainder in AH
register or a memory location DIV CX ; Double word in DX and AX / word
Eg. CMP BX, 0100H ; in CX, and Quotient in AX,
CMP AX, 0100H ; remainder in DX
CMP [5000H], 0100H 2) Processor Control Instructions
CMP BX, [SI] These instructions are used to control the processor action by
CMP BX, CX setting/resetting the flag values.
MUL: Unsigned Multiplication Byte or Word STC: It sets the carry flag to 1.
This instruction multiplies an unsigned byte or word by the contents of AL. CLC: It clears the carry flag to 0.
Eg. CMC: It complements the carry flag.
MUL BH ; (AX) (AL) x (BH) STD: It sets the direction flag to 1. If it is set, string bytes are accessed from higher
MUL CX ; (DX)(AX) (AX) x (CX) memory address to lower memory address.
MUL WORD PTR [SI] ; (DX)(AX) (AX) x ([SI]) CLD: It clears the direction flag to 0. If it is reset, the string bytes are accessed
IMUL: Signed Multiplication from lower memory address to higher memory address.
This instruction multiplies a signed byte in source operand by a signed byte in
AL or a signed word in source operand by a signed word in AX. Q.44 Explain memory segmentation in 8086 and list its advantages.(any two)
Eg. IMUL BH Ans: Memory Segmentation:
IMUL CX  In 8086 available memory space is 1MByte.
IMUL [SI]  This memory is divided into different logical segments and each segment has its
CBW: Convert Signed Byte to Word own base address and size of 64 KB.
This instruction copies the sign of a byte in AL to all the bits in AH. AH is then  It can be addressed by one of the segment registers.
said to be sign extension of AL.  There are four segments.
Eg. CBW
AX= 0000 0000 1001 1000 Convert signed byte in AL signed word in AX.
Result in AX = 1111 1111 1001 1000
CWD: Convert Signed Word to Double Word
This instruction copies the sign of a byte in AL to all the bits in AH. AH is then
said to be sign extension of AL.
Eg. CWD
Convert signed word in AX to signed double word in DX : AX
DX= 1111 1111 1111 1111
Result in AX = 1111 0000 1100 0001
 ;Array Of 16 Bit No.;Assume array of 6 no.s
CODE SEGMENT
ASSUME CS:CODE,DS:DATA
START: MOV AX,DATA
MOV DS,AX
MOV DX,0000H
MOV CX,COUNT
MOV SI, OFFSET ARRAY
NEXT: MOV AX,[SI]
ROR AX,01H
JC NEGATIVE
INC DL
JMP COUNT_IT
NEGATIVE: INC DH
COUNT_IT: INC SI
INC SI
LOOP NEXT
MOV NEG_COUNT,DL
MOV POS_COUNT,DH
MOV AH,4CH
INT 21H
Advantages of Segmentation: CODE ENDS
 The size of address bus of 8086 is 20 and is able to address 1 Mbytes ( ) of DATA SEGMENT
physical memory. ARRAY DW F423H,6523H,B658H,7612H, 2300H,1559H
 The compete 1 Mbytes memory can be divided into 16 segments, each of 64 COUNT DW 06H
Kbytes size. POS_COUNT DB ?
 It allows memory addressing capability to be 1 MB. NEG_COUNT DB ?
 It gives separate space for Data, Code, Stack and Additional Data segment as DATA ENDS
Extra segment size. END START
 The addresses of the segment may be assigned as 0000H to F000H respectively.
 The offset values are from 00000H to FFFFFH Q.46 Write an ALP to find the sum of series. Assume series of 10 numbers.
 Segmentation is used to increase the execution speed of computer system so that Ans:
processor can able to fetch and execute the data from memory easily and fast. ; Assume TEN , 8 bit HEX numbers
CODE SEGMENT
Q.45 Write an ALP to count the number of positive and negative numbers in ASSUME CS:CODE,DS:DATA
array. START: MOV AX,DATA
Ans: MOV DS,AX
;Count Positive No. And Negative No.S In Given LEA SI,DATABLOCK
MOV CL,0AH
UP:MOV AL,[SI]
ADD RESULT_LSB,[SI]
JNC DOWN
INC REULT_MSB
DOWN:INC SI
LOOP UP
CODE ENDS
DATA SEGMENT
DATABLOCK DB 45H,02H,88H,29H,05H,45H,78H, Q.48 Describe mechanism for generation of physical address in 8086 with
95H,62H,30H suitable example.
RESULT_LSB DB 0
RESULT_MSB DB 0
DATA ENDS
END

Q.47 With neat sketches demonstrate the use of re-entrant and recursive
procedure.
Ans: Re-entrant Procedure:
A re-entrant procedure is one in which a single copy of the program code can be Fig.: Mechanism used to calculate physical address in 8086
shared by multiple users during the same period of time. Re-entrance has two key As all registers in 8086 are of 16 bit and the physical address will be in 20 bits. For
aspects: The program code cannot modify itself and the local data for each user this reason the above mechanism is helpful.
must be stored separately. Logical Address is specified as segment: offset
Physical address is obtained by shifting the segment address 4 bits to the left and
adding the offset address.
Thus the physical address of the logical address A4FB:4872 is:
A4FB0
+ 4872
---------------
A9822 OR
• i.e. Calculate physical Address for the given
Recursive procedures: CS= 3525H, IP= 2450H.
An active procedure that is invoked from within itself or from within another
active procedure is a recursive procedure. Such an invocation is called recursion. A
procedure that is invoked recursively must have the RECURSIVE attribute
specified in the PROCEDURE statement.
 ASSUME CS:CODE,DS:DATA,ES:EXTRA
Q.49 Write ALP to count ODD and EVEN numbers in an array. MOV AX,DATA
Ans: ;Count ODD and EVEN No.S In Given ;Array Of 16 Bit No. MOV DS,AX
;Assume array of 10 no.s MOV AX,EXTRA
CODE SEGMENT MOV ES,AX
ASSUME CS:CODE,DS:DATA MOV CX,000AH
START: MOV AX,DATA LEA SI,BLOCK1
MOV DS,AX LEA DI,ES:BLOCK2
MOV DX,0000H CLD
MOV CX,COUNT REPNZ MOVSW
MOV SI, OFFSET ARRAY1 MOV AX,4C00H
NEXT: MOV AX,[SI] INT 21H
ROR AX,01H CODE ENDS
JC ODD_1 DATA SEGMENT
INC DL BLOCK1 DW 1001H,4003H,6005H,2307H,4569H, 6123H, 1865H,
JMP COUNT_IT 2345H,4000H,8888H
ODD_1 : INC DH DATA ENDS
COUNT_IT: INC SI EXTRA SEGMENT
INC SI BLOCK2 DW ?
LOOP NEXT EXTRA ENDS
MOV ODD_COUNT,DH END
MOV EVENCNT,DL
MOV AH,4CH Q.51 Write ALP using procedure to solve equation such as Z= (A+B)*(C+D)
INT 21H Ans: ; Procedure For Addition
CODE ENDS SUM PROC NEAR
DATA SEGMENT ADD AL,BL
ARRAY1 DW F423H, 6523H, B658H, 7612H, 9875H, RET
2300H, 1559H, 1000H, 4357H, 2981H SUM ENDP
COUNT DW 0AH DATA SEGMENT
ODD_COUNT DB ? NUM1 DB 10H
EVENCNT DB ? NUM2 DB 20H
DATA ENDS NUM3 DB 30H
END START NUM4 DB 40H
RESULT DB?
Q.50 Write ALP to perform block transfer operation of 10 numbers. DATA ENDS
Ans: ;Assume block of TEN 16 bit no.s CODE SEGMENT
;Data Block Transfer Using String Instruction ASSUME CS: CODE,DS:DATA
CODE SEGMENT START:MOV AX,DATA
 MOV DS,AX Winter-23
MOV AL,NUM1
MOV BL,NUM2
CALL SUM
MOV CL,AL
MOV AL, NUM3
MOV BL,NUM4
CALL SUM
MUL CL
MOV RESULT,AX
MOV AH,4CH
INT 21H
CODE ENDS
END

Q.52 Write ALP using macro to perform multiplication of two 8 Bit Unsigned
numbers.
Ans: ; Macro For Multiplication
PRODUCT MACRO FIRST,SECOND
MOV AL,FIRST
MOV BL,SECOND
MUL BL
PRODUCT ENDM
DATA SEGMENT
NO1 DB 05H
NO2 DB 04H
MULTIPLE DW ?
DATA ENDS
CODE SEGMENT
ASSUME CS: CODE,DS:DATA
START:MOV AX,DATA
MOV DS,AX
PRODUCT NO1,NO2
MOV MULTIPLE, AX
MOV AH,4CH
INT 21H
CODE ENDS
END
Summer-23 6 Marks

Winter-22

Q.1 Define logical and effective address. Describe physical address generation
process in 8086 microprocessor. Calculate physical address by taking suitable DS,
CS and IP.

Q.2 State the function of following assembly language programing tools :

(i) Assembler (ii) Linker (iii) Debugger

Q.3 Describe different addressing modes of 8086 with one suitable example each.

Q.4 Describe different branching instructions used in 8086 microprocessor in brief.

Q.5 Explain the following instructions of 8086 :

(i) DAA (ii) ADC (iii) XCHG

Q.6 Draw flow chart and write assembly language program to reverse the word in
string.

Summer-22

Q.7 Calculate the physical address if :

(i) CS = 1200H and IP = DE00H
(ii) SS = FF00H and SP = 0123H
(iii) DS = 1F00H and BX = 1A00H for MOV AX, [BX]

Q.8 Describe how an assembly language program is developed and debugging

using program developments tools.

Q.9 State the addressing mode of following instructions :

(i) MOV AX, 3456H
(ii) ADD BX, [2000H]
(iii) DAA
(iv) MOV AX, [Si]
(v) MOV AX, BX
(vi) SUB AX, [BX + SI + 80H]
Q.10 Describe how string instructions are used to compare two strings with
suitable example.

Q.11Write an instruction to perform following operations :

(i) Multiply BL by 88H
(ii) Signed division of AL by BL
(iii) Move 4000H to DS register
(iv) Rotate content of AX register to left 4 times.
(v) Shift the content of BX register to right 3 times. DS=345AH and SI=13DCH
(vi) Load SS with FF00H. Physical adress = DS*10H + SI
= 345AH * 10H + 13DCH
Q.12 Write an ALP to concatenate two strings. = 345A0+13DC
= 3597CH
Q.13 Define logical and effective address. Describe physical address
generation process in 8086. If DS=345AH and SI=13DCH. Calculate physical Q.14 Explain the use of assembler directives. 1) DW 2) EQU 3) ASSUME
address. 4) OFFSET 5) SEGMENT 6) EVEN
Ans: Ans:
A logical address is the address at which an item (memory cell, storage element) DW (DEFINE WORD)
appears to reside from the perspective of an executing application program. A The DW directive is used to tell the assembler to define a variable of type word or
logical address may be different from the physical address due to the operation of to reserve storage locations of type word in memory. The statement MULTIPLIER
an address translator or mapping function. DW 437AH, for example, declares a variable of type word named MULTIPLIER,
and initialized with the value 437AH when the program is loaded into memory to
Effective Address or Offset Address: The offset for a memory operand is called be run.
the operand's effective address or EA. It is an unassigned 16 bit number that
expresses the operand's distance in bytes from the beginning of the segment in EQU (EQUATE)
which it resides. In 8086 we have base registers and index registers. EQU is used to give a name to some value or symbol. Each time the assembler
finds the given name in the program, it replaces the name with the value or symbol
Generation of 20 bit physical address in 8086:- you equated with that name.
1. Segment registers carry 16 bit data, which is also known as base address. Example
2. BIU appends four 0 bits to LSB of the base address. This address becomes 20- Data SEGMENT
bit address. Num1 EQU 50H
3. Any base/pointer or index register carries 16 bit offset. Num2 EQU 66H
4. Offset address is added into 20-bit base address which finally forms 20 bit Data ENDS
physical address of memory location Numeric value 50H and 66H are assigned to Num1 and Num2.
ASSUME Example: REP MOVSB
ASSUME tells the assembler what names have been chosen for Code, Data Extra 2] MOVS/ MOVSB/ MOVSW - Move String byte or word.
and Stack segments. Informs the assembler that the register CS is to be initialized Syntax:
with the address allotted by the loader to the label CODE and DS is similarly MOVS destination, source
initialized with the address of label DATA. MOVSB destination, source
OFFSET MOVSW destination, source
OFFSET is an operator, which tells the assembler to determine the offset or Operation: ES:[DI]<----- DS:[SI]
displacement of a named data item (variable), a procedure from the start of the It copies a byte or word a location in data segment to a location in extra segment.
segment, which contains it. The offset of source is pointed by SI and offset of destination is pointed by DI.CX
Example register contain counter and direction flag (DE) will be set or reset to auto
MOV BX; increment or auto decrement pointers after one move.
OFFSET PRICES; Example
It will determine the offset of the variable PRICES from the start of the segment in LEA SI, Source
which PRICES is defined and will load this value into BX. LEA DI, destination
SEGMENT CLD
The SEGMENT directive is used to indicate the start of a logical segment. MOV CX, 04H
Preceding the SEGMENT directive is the name you want to give the segment. REP MOVSB
For example, the statement CODE SEGMENT indicates to the assembler the start 3] CMPS /CMPSB/CMPSW: Compare string byte or Words.
of a logical segment called CODE. The SEGMENT and ENDS directive are used Syntax:
to “bracket” a logical segment containing code of data CMPS destination, source
EVEN (ALIGN ON EVEN MEMORY ADDRESS) CMPSB destination, source
As an assembler assembles a section of data declaration or instruction statements, CMPSW destination, source
it uses a location counter to keep track of how many bytes it is from the start of a Operation: Flags affected < ----- DS:[SI]- ES:[DI]
segment at any time. The EVEN directive tells the assembler to increment the It compares a byte or word in one string with a byte or word in another string. SI
location counter to the next even address, if it is not already at an even address. A Holds the offset of source and DI holds offset of destination strings. CS contains
NOP instruction will be inserted in the location incremented over. counter and DF=0 or 1 to auto increment or auto decrement pointer after
comparing one byte/word.
Q.15 Describe any four string instructions of 8086 assembly language. Example
Ans: LEA SI, Source
1] REP: LEA DI, destination
REP is a prefix which is written before one of the string instructions. It will cause CLD
During length counter CX to be decremented and the string instruction to be MOV CX, 100
repeated until CX becomes 0. REPE CMPSB
Two more prefix. 4] SCAS/SCASB/SCASW: Scan a string byte or word.
REPE/REPZ: Repeat if Equal /Repeat if Zero. It will cause string instructions to Syntax:
be repeated as long as the compared bytes or words Are equal and CX≠0. SCAS/SCASB/SCASW
REPNE/REPNZ: Repeat if not equal/Repeat if not zero. It repeats the strings Operation: Flags affected < ----- AL/AX-ES: [DI]
instructions as long as compared bytes or words are not equal And CX≠0.
It compares a byte or word in AL/AX with a byte /word pointed by ES: DI. The Example:
string to be scanned must be in the extra segment and pointed by DI. CX contains MOV AX,CX
counter and DF may be 0 or 1.When the match is found in the string execution 3. Direct addressing mode: An instruction in which 16 bit effective address of an
stops and ZF=1 otherwise ZF=0. operand is specified in the instruction, then the addressing mode of such
Example instruction is known as direct addressing mode.
LEA DI, destination Example:
MOV Al, 0DH MOV CL,[2000H]
MOV CX, 80H 4. Register Indirect addressing mode: An instruction in which address of an
CLD operand is specified in pointer register or in index register or in BX, then the
REPNE SCASB addressing mode is known as register indirect addressing mode.
5] LODS/LODSB/LODSW: Example:
Load String byte into AL or Load String word into AX. MOV AX, [BX]
Syntax: 5. Indexed addressing mode: An instruction in which the offset address of an
LODS/LODSB/LODSW operand is stored in index registers (SI or DI) then the addressing mode of such
Operation: AL/AX < ----- DS: [SI] instruction is known as indexed addressing mode. DS is the default segment for SI
IT copies a byte or word from string pointed by SI in data segment into AL or and DI.
AX.CX may contain the counter and DF may be either 0 or 1 For string instructions DS and ES are the default segments for SI and DI resp. this
Example is a special case of register indirect addressing mode.
LEA SI, destination Example:
CLD MOV AX,[SI]
LODSB 6. Based Indexed addressing mode: An instruction in which the address of an
6] STOS/STOSB/STOSW (Store Byte or Word in AL/AX) operand is obtained by adding the content of base register (BX or BP) to the
Syntax STOS/STOSB/STOSW content of an index register (SI or DI) The default segment register may be DS or
Operation: ES:[DI] < ----- AL/AX ES
It copies a byte or word from AL or AX to a memory location pointed by DI in Example:
extra segment CX may contain the counter and DF may either set or reset MOV AX, [BX][SI]
7. Register relative addressing mode: An instruction in which the address of the
Q.16 Describe any 6 addressing modes of 8086 with one example each. operand is obtained by adding the displacement (8-bit or 16 bit) with the contents
Ans: of base registers or index registers (BX, BP, SI, DI). The default segment register is
1. Immediate addressing mode: An instruction in which 8-bit or 16-bit operand DS or ES.
(data) is specified in the instruction, then the addressing mode of such instruction Example:
is known as Immediate addressing mode. MOV AX, 50H[BX]
Example: 8. Relative Based Indexed addressing mode: An instruction in which the address
MOV AX,67D3H of the operand is obtained by adding the displacement (8 bit or 16 bit) with the
2. Register addressing mode: An instruction in which an operand (data) is base registers (BX or BP) and index registers (SI or DI) to the default segment.
specified in general purpose registers, then the addressing mode is known as Example:
register addressing mode. MOV AX, 50H [BX][SI]
Q.17 Select assembly language for each of the following MOV CL,0FH
i) rotate register BL right 4 times LEA DI,REV
ii) multiply AL by 04H ADD DI,0FH
iii) Signed division of AX by BL UP:MOV AL,[SI]
iv) Move 2000h in BX register MOV [DI],AL
v) increment the counter of AX by 1 INC SI
vi) compare AX with BX DEC DI
Ans: LOOP UP
i) MOV CL, 04H MOV AH,4CH
RCL AX, CL1 INT 21H
Or CODE ENDS
MOV CL, 04H END START
ROL AX, CL
Or Flowchart:
MOV CL, 04H
RCR AX, CL1
Or
MOV CL, 04H
ROR AX, CL
ii) MOV BL,04h
MUL BL
iii) IDIV BL
iv) MOV BX,2000h
v) INC AX
vi) CMP AX,BX

Q.18 Write an ALP to reverse a string. Also draw flowchart for same.
Ans:
Program:
DATA SEGMENT
STRB DB 'GOOD MORNING$'
REV DB 0FH DUP(?)
DATA ENDS
CODE SEGMENT
START:ASSUME CS:CODE,DS:DATA
MOV DX,DATA
MOV DS,DX
LEA SI,STRB
Q.19 Draw architectural block diagram of 8086 and describe its register 12. DI – Destination Index – acts as the destination for string movement
organization. instructions
13. IP – Instruction Pointer – contains the offset of the next instruction to be
executed.
14. Flag Register – individual bit positions within register show status of CPU or
results of arithmetic operations.

Q.20 Demonstrate in detail the program development steps in assembly

language programming.
Ans: Program Development steps
1. Defining the problem: The first step in writing program is to think very
carefully about the problem that you want the program to solve.
2. Algorithm: The formula or sequence of operations or task need to perform by
your program can be specified as a step in general English is called algorithm.
3. Flowchart: The flowchart is a graphically representation of the program
operation or task.

Register Organization of 8086

1. AX (Accumulator) – Used to store the result for arithmetic / logical operations
2. BX – Base – used to hold the offset address or data 4. Initialization checklist: Initialization task is to make the checklist of entire
3. CX – acts as a counter for repeating or looping instructions. variables, constants, all the registers, flags and programmable ports.
4. DX – holds the high 16 bits of the product in multiply (also handles divide 5. Choosing instructions: We should choose those instructions that make program
operations) smaller in size and more importantly efficient in execution.
5. CS – Code Segment – holds base address for all executable instructions in a 6. Converting algorithms to assembly language program : Every step in the
program algorithm is converted into program statement using correct and efficient
6. SS - Base address of the stack instructions or group of instructions.
7. DS – Data Segment – default base address for variables
8. ES – Extra Segment – additional base address for memory variables in extra Q.21 Illustrate the use of any three branching instructions.
segment. Ans:
9. BP – Base Pointer – contains an assumed offset from the SS register. BRANCH INSTRUCTIONS
10. SP – Stack Pointer – Contains the offset of the top of the stack. Branch instruction transfers the flow of execution of the program to a new address
11. SI – Source Index – Used in string movement instructions. The source string is specified in the instruction directly or indirectly. When this type of instruction is
pointed to by the SI register.
executed, the CS and IP registers get loaded with new values of CS and IP 6. JNO Label
corresponding to the location to be transferred. Transfer execution control to address ‘Label’, if OF=0.
Unconditional Branch Instructions : 7. JNP Label
1. CALL : Unconditional Call Transfer execution control to address ‘Label’, if PF=0.
The CALL instruction is used to transfer execution to a subprogram or procedure 8. JP Label
by storing return address on stack There are two types of callsNEAR (Inter- Transfer execution control to address ‘Label’, if PF=1.
segment) and FAR(Intra-segment call). Near call refers to a procedure call which is 9. JB Label
in the same code segment as the call instruction and far call refers to a procedure Transfer execution control to address ‘Label’, if CF=1.
call which is in different code segment from that of the call instruction. 10. JNB Label
Syntax: CALL procedure_name Transfer execution control to address ‘Label’, if CF=0.
2. RET: Return from the Procedure. 11. JCXZ Label
At the end of the procedure, the RET instruction must be executed. When it is Transfer execution control to address ‘Label’, if CX=0
executed, the previously stored content of IP and CS along with Flags are retrieved Conditional LOOP Instructions.
into the CS, IP and Flag registers from the stack and execution of the main 1. LOOP Label :
program continues further. Decrease CX, jump to label if CX not zero.
Syntax :RET 2.LOOPE label
3. JMP: Unconditional Jump Decrease CX, jump to label if CX not zero and Equal (ZF = 1).
This instruction unconditionally transfers the control of execution to the specified 3.LOOPZ label
address using an 8-bit or 16-bit displacement. No Flags are affected by this Decrease CX, jump to label if CX not zero and ZF= 1.
instruction. 4.LOOPNE label
Syntax : JMP Label Decrease CX, jump to label if CX not zero and Not Equal (ZF = 0).
4. IRET: Return from ISR 5. LOOPNZ label
When it is executed, the values of IP, CS and Flags are retrieved from the stack to Decrease CX, jump to label if CX not zero and ZF=0
continue the execution of the main program.
Syntax: IRET Q.22 Describe any six addressing modes of 8086 with suitable diagram.
Conditional Branch Instructions Ans: Different addressing modes of 8086 :
When this instruction is executed, execution control is transferred to the address
specified relatively in the instruction
1. JZ/JE Label
Transfer execution control to address ‘Label’, if ZF=1.
2. JNZ/JNE Label
Transfer execution control to address ‘Label’, if ZF=0
3. JS Label
Transfer execution control to address ‘Label’, if SF=1.
4. JNS Label
Transfer execution control to address ‘Label’, if SF=0.
5. JO Label
Transfer execution control to address ‘Label’, if OF=1.
1. Immediate: In this addressing mode, immediate data is a part of instruction, and 7. Based Indexed: In this addressing mode the effective address of the data is
appears in the form of successive byte or bytes. formed by adding the content of a base register (any one of BX or BP) to the
ex. MOV AX, 0050H content of an index register (any one of SI or DI). The default segment register
may be ES or DS.
e.g MOV AX, [BX ] [SI]
8. Relative Based Indexed: The effective address is formed by adding an 8-bit or
16-bit displacement with the sum of contents of any one of the base register (BX or
BP) and any one of the index registers in a default segment.
e.g. MOV AX, 50H [BX] [SI]
2. Direct: In the direct addressing mode, a 16 bit address (offset) is directly 9 .Implied addressing mode:
specified in the instruction as a part of it. No address is required because the address is implied in the instruction itself.
ex. MOV AX ,[1 0 0 0 H] e.g NOP,STC,CLI,CLD,STD

3. Register: In register addressing mode, the data is stored in a register and it is

referred using the particular register. All the registers except IP may be used in this
mode. Q.23 Select an appropriate instruction for each of the following & write :
ex. 1)MOV AX,BX i)Rotate the content of DX to write 2 times without carry
ii)Multiply content of AX by 06H
iii)Load 4000H in SP register
iv)Copy the contents of BX register to CS
4. Register Indirect: In this addressing mode, the address of the memory v)Signed division of BL and AL
location which contains data or operand is determined in an indirect way using vi) Rotate AX register to right through carry 3 times.
offset registers. The offset address of data is in either BX or SI or DI register. Ans:
The default segment register is either DS or ES. i) MOV CL,02H
e.g. MOV AX, [BX ] ROR DX,CL (OR)
5. Indexed: In this addressing mode offset of the operand is stored in one of the ROR DX,03H
index register. DS and ES are the default segments for index registers SI and DI ii) MOV BX,06h
respectively MUL BX
e.g. MOV AX, [SI] iii) MOV SP,4000H
6. Register Relative: In this addressing mode the data is available at an iv) The contents if CS register cannot be modified directly , Hence no
effective address formed by adding an 8-bit or 16-bit displacement with the instructions are used However examiner can give marks if question is attempted.
content of any one of the registers BX, BP, SI and DI in the default either DS or v) IDIV BL
ES segment. vi) MOV CL,03H
e.g. MOV AX, 50H [BX ] RCR AX,CL (OR)
RCR AX,03H
Q.24 Write an ALP to arrange numbers in array in descending order.
Ans: DATA SEGMENT
ARRAY DB 15H,05H,08H,78H,56H
DATA ENDS
CODE SEGMENT
START:ASSUME CS:CODE,DS:DATA
MOV DX,DATA
MOV DS,DX
MOV BL,05H
STEP1: MOV SI,OFFSET ARRAY Summer-23
MOV CL,04H
STEP: MOV AL,[SI]
CMP AL,[SI+1]
JNC DOWN
XCHG AL,[SI+1]
XCHG AL,[SI]
DOWN:ADD SI,1
LOOP STEP
DEC BL
JNZ STEP1
MOV AH,4CH
INT 21H
CODE ENDS
END START

Winter-23