Lecture 4
Lecture 4
Lecture 4
Machine Language
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 1
Nand to Tetris Roadmap: Hardware
abstraction
machine
language
In previous projects we’ve built
developing the computer’s ALU and RAM
an assembler
abstraction
hardware platform
building a
computer abstraction
p2 p3
computer building p1
ALU, RAM abstraction
chips building
elementary d
logic gates gates Nan
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 2
Nand to Tetris Roadmap: Hardware
abstraction
machine p4
language
We will now integrate these
modules into a programmable,
developing general-purpose computer
an assembler
abstraction
p5 hardware platform
building a
computer abstraction
p2 p3
computer building p1
ALU, RAM abstraction
chips building
elementary d
logic gates gates Nan
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 3
Nand to Tetris Roadmap: Hardware
abstraction
hardware platform
building a
computer abstraction
p2 p3
computer building p1
ALU, RAM abstraction
chips building
elementary d
logic gates gates Nan
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 4
Computer systems are flexible and versatile
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 5
Computer systems are flexible and versatile
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 6
Computer systems are flexible and versatile
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 7
Computer systems are flexible and versatile
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 8
Computer architecture
Memory CPU
program
ALU
input output
data
registers
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 9
Computer architecture
Memory CPU
0 0101110011100110 instruction
1 1100000010010001
1110001011111100
instructions 2
... ...
ALU
input output
1100101010010101
1100100101100111 data value
0011001010101011
data ...
registers
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 10
Lecture plan
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 11
Machine Language
Memory CPU
Computer 0 12
1 615
(conceptual definition): 2 8828
3 3 ALU
A processor (CPU) that ... -5
manipulates a set of registers:
• CPU-resident registers
(few, accessed directly, by name) Registers
R1 10
• Memory-resident registers 136 955
(many, accessed by address) 137 20 R2 5
138 -523
... A 137
Machine language
A formalism for accessing and manipulating registers.
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 12
Registers
Registers
Instruction register 136 955
R1 10
137 20 R2 5
Holds an instruction
138 -523
... A 137
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 13
Typical operations
Memory CPU
// R1 ß R1 + R2 0 12
add R1, R2 1 615
2 8828
// R1 ß R1 + 73 3 3 ALU
addi R1, 73 ... -5
// R1 ß R2
mov R1, R2
Registers
// R1 ß Memory[137]
R1 10
load R1, 137 136 955
137 20 R2 5
// if R1>0 goto 15 138 -523
... A 137
jgt R1, 15
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 14
Typical operations
Memory CPU
Which instruction should be 0 1110111100001010
138 0101110010001110
... A 00000010110000
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 15
Typical operations
Branching
• Execute an instruction other than the next one
• Example: Embarking on a new iteration in a loop
... ...
// Adds 1 to R1, repetitively // Adds 1 to R1, repetitively
13 addi R1,1 (LOOP)
addi R1,1
... ...
• Line numbers ... • No line numbers
27 goto 13
goto LOOP
... ... • Physical addresses • Symbolic addresses
...
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 16
Program translation
Translation
Before it can be executed, a symbolic program must be translated into instructions
that the computer can decode and execute.
// R2 ← –R1
movi R2,0
sub R2,R1
CONT:
// Here R2 = abs(R1)
...
Assembly Assembler
(language) (tool)
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 17
Machine Language
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 18
The Hack computer
Data memory Instruction memory
0 0000110011100111 0 0010101010110110
1 1000110000110000 1 1111100100101011
2 0000010011111100 2 0011101001011011
... ...
RAM ROM
address out address out
... ...
(Conceptual, partial view of the
32766 32766
1110011001011001
Hack computer architecture)
32767 0000011100110010 32767
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 19
Memory
Data memory Instruction memory
Loaded with a sequence of
0000110011100111 0010101010110110
0
1 1000110000110000
0
1 1111100100101011
16-bit Hack instructions
2 0000010011111100 2 0011101001011011
... ...
RAM ROM
address out address out
0000111100110010 1001111100011001
... ...
(Conceptual, partial view of the
M
32766 32766
1110011001011001
Hack computer architecture)
32767 0000011100110010 32767
RAM ROM
• Read-write data memory • Read-only instruction memory
• Addressed by the A register • Addressed by the (same) A register
• The selected memory location, RAM[A], • The selected memory location, ROM[A],
is referred to as M contains the current instruction
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 20
Registers
Data memory Instruction memory
0 0
1 1
2 2
... ...
RAM ROM
D: data register
A: address register
M: selected RAM location
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 21
Machine Language
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 22
Hack instructions
Instruction set
• A - instruction (address)
• C - instruction (compute)
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 23
Hack instructions
Instruction set
• A - instruction (address)
• C - instruction (compute)
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 24
Hack instructions
Instruction set
• A - instruction (address)
• C - instruction (compute)
Syntax:
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 25
Hack instructions
Typical instructions:
@ constant (A ← constant)
Examples:
// D ← 2
The game: We show a subset of Hack instructions (top left),
? and practice writing code examples that use these instructions.
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 26
Hack instructions
Typical instructions:
@ constant (A ← constant)
Examples:
// D ← 2 // D ← 1954
Use only the instructions
D=1
D=D+1 ? shown above
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 27
Hack instructions
Typical instructions:
@ constant (A ← constant)
Examples:
// D ← 2 // D ← 1954 // D ← D + 23
Use only the instructions
D=1
D=D+1
@1954
D=A ? shown above
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 28
Hack instructions
Typical instructions:
@ constant (A ← constant)
Examples:
// D ← 2 // D ← 1954 // D ← D + 23
D=1 @1954 @23
D=D+1 D=A D=D+A
Observation
• In all these examples, we used A as a data register:
• The addressing side-effects of A are ignored.
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 29
Hack instructions
Typical instructions:
@ constant (A ← constant)
More examples:
// RAM[100] ← 0 // RAM[100] ← 17
@100 @17
M=0 D=A
@100
M=D
• First pair of instructions:
A is used as a data register
• Second pair of instructions:
A is used as an address register
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 30
Hack instructions
Typical instructions:
@ constant (A ← constant)
More examples:
// RAM[100] ← 0 // RAM[100] ← 17 // RAM[100] ← RAM[200]
@100 @17
M=0 D=A
@100 ?
M=D
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 31
Hack instructions
Typical instructions:
@ constant (A ← constant)
More examples:
// RAM[100] ← 0 // RAM[100] ← 17 // RAM[100] ← RAM[200]
@100 @17 @200
M=0 D=A D=M
@100 @100
M=D M=D
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 32
Hack instructions
Typical instructions:
@ constant (A ← constant)
// RAM[3] ← RAM[3] – 15
?
Use only the instructions
shown above
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 33
Hack instructions
Typical instructions:
@ constant (A ← constant)
?
Use only the instructions
D=A
shown above
@3
M=M–D
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 34
Hack instructions
Typical instructions:
@ constant (A ← constant)
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 35
Hack instructions
Typical instructions:
@ constant (A ← constant)
Add.asm
// Computes: RAM[2] = RAM[0] + RAM[1] + 17
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 36
Hack instructions
Typical instructions:
@ constant (A ← constant)
Add.asm
// Computes: RAM[2] = RAM[0] + RAM[1] + 17
// D = RAM[0]
@0
D=M
// D = D + RAM[1]
@1
D=D+M
// D = D + 17
@17
D=D+A
// RAM[2] = D
@2
M=D
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 37
Hack instructions
Typical instructions:
@ constant (A ← constant)
Add.asm
// Computes: RAM[2] = RAM[0] + RAM[1] + 17
// D = RAM[0]
@0 How can we tell that a given program
D=M
// D = D + RAM[1] actually works?
@1
D=D+M • Testing / simulating
// D = D + 17
@17 • Formal verification
D=D+A
// RAM[2] = D
@2
M=D
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 38
Machine Language
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 39
The CPU emulator
• A Java program that emulates the Hack CPU
• On your PC (nand2tetris/tools)
load/exec controls
screen
code
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 40
The CPU emulator
Binary
Add.asm (example)
0000000000000000
// Computes: RAM[2] = RAM[0] + RAM[1] + 17
1000010010001101
// D = RAM[0] 0000000000000001
@0 1010011001100001
D=M Load into the 0000000000010001
Execute in the
// D = D + RAM[1] CPU emulator 1001111100110011 CPU emulator
@1 0000000000000010
D=D+M 1110010010010011
// D = D + 17
@17
D=D+A When loading a symbolic program
// RAM[2] = D
into our CPU emulator, the emulator
@2
M=D translates it into binary code (using a
built-in assembler).
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 41
The CPU emulator
CPU emulator
demo
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 42
Machine Language
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Loading a program
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Loading a program
Convention:
Address register Data register The first instruction is
A D loaded into address 0,
the next instruction into
address 1, and so on.
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 45
Branching
Unconditional branching
example (pseudocode)
0 instruction
1 instruction
2 instruction
Flow of control:
3 instruction 0,1,2,3,4,
4 goto 7 7,8,9,
5 instruction
2,3,4,
6 instruction
7 instruction 7,8,9,
8 instruction 2,3,4,
9 goto 2 ...
10 instruction
11 ...
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 46
Branching
Conditional branching
example (pseudocode)
0 instruction
1 instruction
Flow of control:
2 instruction
3 instruction 0,1,2,3,4,
4 if (condition) goto 7 if condition is true
5 instruction
7,8,9,...
6 instruction
7 instruction else
8 instruction 5,6,7,8,9,...
9 instruction
... ...
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 47
Branching
Branching in the
Hack language:
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 48
Branching
Branching in the
Hack language:
D can be replaced with any expression that the ALU computes: D+1, M, M-1, etc.
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 49
Branching
Typical instructions:
@ constant (A ← constant)
? D;JGE // if D ≥ 0 jump
D;JLT // if D < 0 jump to the
D;JLE // if D ≤ 0 jump instruction
stored in
D;JEQ // if D = 0 jump ROM[A]
D;JNE // if D ≠ 0 jump
0;JMP // jump
? D;JGE // if D ≥ 0 jump
D;JLT // if D < 0 jump to the
D;JLE // if D ≤ 0 jump instruction
stored in
D;JEQ // if D = 0 jump ROM[A]
D;JNE // if D ≠ 0 jump
0;JMP // jump
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 54
Hack instructions (review)
• A - instruction
• C - instruction
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 55
Variables
Pseudocode (example) Hack assembly
... ... Symbolic programming
i=1 // i = 1 • The code writer is allowed to create and
sum = 0 @i use symbolic variables, as needed
... write M=1
• We assume that there is an agent who
sum = sum + i // sum = 0
knows how to bind these symbols to
@sum
i=i+1 sensible RAM addresses
... M=0
... • This agent is the assembler
// sum = sum + i
@i For example
D=M
@sum
• If the assembler will bind i to 16 and
sum to 17, every instruction @i and
M=D+M
@sum will end up selecting RAM[16]
// i = i + 1
and RAM[17]
@i
M=M+1 • Invisible to the code writer
... • The result: a powerful, low-level,
variables abstraction.
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 56
Variables
Typical instructions:
@ constant A ← constant
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 57
Variables
Typical instructions:
@ constant A ← constant
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 58
Variables
Pre-defined symbols in the Hack language
RAM
symbol value
0 R0
R0 0 As if we have 16 “built-in
1 R1
R1 1 2 R2 variables” named R0…R15
... ...
R2 2 We sometimes call them
15 R15
... ...
16 “virtual registers”
R15 15 17
...
32767
Example:
// Sets R1 to 2 * R0
// Usage: Enter a value in R0
@R0
D=M
@R1
The use of R0, R1, … (instead of physical addresses 0, 1, …)
M=D makes Hack code easier to document, write, and debug.
M=D+M
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 59
Machine Language
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Labels
Example (pseudocode) Hack assembly
i = 1000 // i = 1000
Label declaration in the Hack
LOOP: @1000 assembly language:
if (i = 0) goto CONT D=A
(sym)
i = i - 1 @i
goto LOOP M=D Results in binding sym to the
CONT: write (LOOP) address of the next instruction
... // if (i = 0) goto CONT
@i
D=M In this example:
@CONT
D;JEQ
LOOP is bound to 4
// i = i - 1 CONT is bound to 12
@i
(done by the assembler;
M=M-1
// goto LOOP
The code writer doesn’t care
@LOOP about these numbers)
0;JMP
(CONT)
...
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 61
Machine Language
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 62
Program example 1: Add
Add.asm
// Sets R2 to R0 + R1 + 17
// D = R0
@R0
D=M
// D = D + R1
@R1
D=D+M
// D = D + 17
@17
D=D+A
// R2 = D
@R2
M=D
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 63
Program example 2: Signum
Pseudocode Signum.asm
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Program translation
Pseudocode Signum.asm Memory
// if R0 >= 0 then R1 = 1 // if R0 >= 0 then R1 = 1 0 @0
// else R1 = –1 // else R1 = –1 The assembler 1 D=M
if (R0 ≥ 0) goto POS // if R0 >= 0 goto POS replaces all the
R1 = –1 @R0 symbols with 2 @8
D=M physical addresses
goto END 3 D;JGE
@POS
POS: D;JGE 4 @1
R1 = 1 // R1 = –1
5 M=–1
END: @R1 Assembler /
M=–1 6 @10
// goto END loader
7 0;JMP
@END
0;JMP 8 @1
(POS) (the assembler
9 M=1
// R1 = 1 generates binary
@R1 instructions; 10
M=1 Here we show their
11
(END) symbolic versions,
for readability) 12
13
14
...
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 65
Watch out for loose ends
Pseudocode Signum.asm Memory
// if R0 >= 0 then R1 = 1 // if R0 >= 0 then R1 = 1 0 @0
// else R1 = –1 // else R1 = –1
1 D=M
if (R0 ≥ 0) goto POS // if R0 >= 0 goto POS
R1 = –1 @R0 2 @8
D=M
goto END 3 D;JGE
@POS
POS: D;JGE 4 @1
R1 = 1 // R1 = –1
5 M=–1
END: @R1
M=–1 6 @10
// goto END
7 0;JMP
@END
0;JMP 8 @1
(POS) 9 M=1
// R1 = 1
@R1 10 0111111000111110
M=1 11 1010101001011110
(END)
12 0100100110011011
13 1110010011111111
The memory is 14 0101011100110111
never empty
...
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 66
Watch out for loose ends
Pseudocode Signum.asm Memory
// if R0 >= 0 then R1 = 1 // if R0 >= 0 then R1 = 1 0 @0
// else R1 = –1 // else R1 = –1
1 D=M
if (R0 ≥ 0) goto POS // if R0 >= 0 goto POS
R1 = –1 @R0 2 @8
D=M
goto END 3 D;JGE
@POS
POS: D;JGE 4 @1
R1 = 1 // R1 = –1
5 M=–1
END: @R1
M=–1 Program 6 @10
// goto END execution:
7 0;JMP
@END
0;JMP 8 @1
(POS) 9 M=1
// R1 = 1
@R1 10 0111111000111110
M=1 11 1010101001011110
(END)
12 Malicious
13 Code
14 0101011100110111
...
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 67
Watch out for loose ends
Pseudocode Signum.asm Memory
// if R0 >= 0 then R1 = 1 // if R0 >= 0 then R1 = 1 0 @0
// else R1 = –1 // else R1 = –1
1 D=M
if (R0 ≥ 0) goto POS // if R0 >= 0 goto POS
R1 = –1 @R0 2 @8
D=M
goto END 3 D;JGE
@POS
POS: D;JGE 4 @1
R1 = 1 // R1 = –1
5 M=–1
END: @R1
M=–1 Program 6 @10
// goto END execution:
7 0;JMP
@END
0;JMP 8 @1
(POS) 9 M=1
// R1 = 1
@R1 10 0111111000111110
M=1 11 1010101001011110
(END)
12 Malicious
13 Code
14 0101011100110111
...
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 68
Terminating programs properly
Pseudocode Signum.asm
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Terminating programs properly
Pseudocode Signum.asm
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 70
Terminating programs properly
Pseudocode Signum.asm Memory
// if R0 >= 0 then R1 = 1 // if R0 >= 0 then R1 = 1 0 @0
// else R1 = –1 // else R1 = –1
1 D=M
if (R0 ≥ 0) goto POS // if R0 >= 0 goto POS
R1 = –1 @R0 2 @8
D=M
goto END 3 D;JGE
@POS
POS: D;JGE 4 @1
R1 = 1 // R1 = –1
5 M=–1
END: @R1
M=–1 6 @10
// goto END
7 0;JMP
@END
0;JMP 8 @1
(POS) 9 M=1
// R1 = 1
Best practice @R1 10 @10
M=1 11 0;JMP
Terminate every (END)
assembly program with @END
12 0100100110011011
14 0101011100110111
...
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 71
By the way…
Pseudocode
// if R0 >= 0 then R1 = 1
// else R1 = –1
if (R0 ≥ 0) goto POS
R1 = –1
goto END
POS:
R1 = 1
END:
Better:
// if R0 >= 0 then R1 = 1 Best practice
// else R1 = –1
R1 = -1 Optimize your pseudocode before
if (R0 < 0) goto END writing it in machine language.
R1 = 1
END:
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 72
Program example 3: Max
Pseudocode Max2.asm
// R2 = max(R0,R1) //// You do it
// if (R0 > R1) then R2 = R0
// else R2 = R1
...
write
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 73
Machine Language
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 74
Iterative processing
Example: Compute 1 + 2 + 3 + ... + N
Pseudocode Hack assembly (code continues here)
// Program: Sum1ToN (R0 represents N) // Program: Sum1ToN (R0 represents N) (STOP)
// Computes R1 = 1 + 2 + 3 + ... + R0 // Computes R1 = 1 + 2 + 3 + ... + R0 // R1 = sum
// Usage: put a value >= 1 in R0 // Usage: put a value >= 1 in R0 @sum
i = 1 // i = 1 D=M
@i @R1
sum = 0
M=1 M=D
LOOP: // sum = 0 // infinite loop
if (i > R0) goto STOP @sum (END)
sum = sum + i M=0 @END
(LOOP) 0;JMP
i = i + 1
// if (i > R0) goto STOP
goto LOOP @i
STOP: D=M
R1 = sum @R0
D=D-M
@STOP
D;JGT
// sum = sum + i
@sum
D=M
@i
D=D+M
@sum
M=D
// i = i + 1
@i
M=M+1
// goto LOOP
@LOOP
0;JMP
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 75
Machine Language
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 76
Pointer-based processing
Example 1: Set the register at address addr to –1 RAM
0 1015 R0
Input: R0 holds addr 1 R1
2 R2
... ...
// Sets RAM[R0] to –1 15 R15
// Usage: Put some non-negative value in R0 16
17
@R0 ...
255
A=M
256
M=-1 ...
1012
1013
1014
In Hack, pointer-based access is realized by setting 1015 -1 desired
result
the address register to the address that we want to 1016
...
access, using the instruction:
A=…
example:
addr = 1015
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 77
Pointer-based processing
Example 2: Get the value of the register at address addr RAM
0 1013 R0
Input: R0 holds addr 1 75 R1 desired
2 R2 result
... ...
// Gets R1 = RAM[R0] 15 R15
// Usage: Put some non-negative value in R0 16
17
...
? 255
256
...
1012 512
1013 75
1014 19
1015 -17
1016 256
...
example:
addr = 1013
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 78
Pointer-based processing
Example 2: Get the value of the register at address addr RAM
0 1013 R0
Input: R0 holds addr 1 75 R1 desired
2 R2 result
... ...
// Gets R1 = RAM[R0] 15 R15
// Usage: Put some non-negative value in R0 16
17
@R0 ...
255
A=M
256
D=M ...
1012 512
@R1
1013 75
M=D 1014 19
1015 -17
1016 256
...
example:
addr = 1013
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 79
Pointer-based processing
Example 3: Set the first n words RAM
of the memory block beginning in 0 300 R0 base
address base to –1 1 5 R1 n
2 R2
Inputs: R0 (base) and R1 (n)
... ...
15 R15
16
17
...
255
256
...
300 –1
301 –1
302 –1 desired
303 –1 output
304 –1
305
...
example:
base = 300
n=5
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 80
Pointer-based processing
Example 3: Set the first n words RAM
of the memory block beginning in 0 300 R0 base
address base to –1 1 5 R1 n
2 R2
Inputs: R0 (base) and R1 (n)
... ...
15 R15
16
17
...
255
256
...
300
301
302
303
304
305
...
example:
base = 300
n=5
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 81
Pointer-based processing
Example 3: Set the first n words RAM
of the memory block beginning in 0 300 R0 base
address base to –1 1 5 R1 n
2 R2
Inputs: R0 (base) and R1 (n)
... ...
15 R15
16 0 i
17
...
255
256
...
300
301
302
303
304
305
...
example:
base = 300
n=5
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 82
Pointer-based processing
Example 3: Set the first n words RAM
of the memory block beginning in 0 300 R0 base
address base to –1 1 5 R1 n
2 R2
Inputs: R0 (base) and R1 (n)
... ...
15 R15
16 0 i
17
...
255
256
...
300 –1
301
302
303
304
305
...
example:
base = 300
n=5
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 83
Pointer-based processing
Example 3: Set the first n words RAM
of the memory block beginning in 0 300 R0 base
address base to –1 1 5 R1 n
2 R2
Inputs: R0 (base) and R1 (n)
... ...
15 R15
16 1 i
17
...
255
256
...
300 –1
301
302
303
304
305
...
example:
base = 300
n=5
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 84
Pointer-based processing
Example 3: Set the first n words RAM
of the memory block beginning in 0 300 R0 base
address base to –1 1 5 R1 n
2 R2
Inputs: R0 (base) and R1 (n)
... ...
15 R15
16 1 i
17
...
255
256
...
300 –1
301 –1
302
303
304
305
...
example:
base = 300
n=5
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 85
Pointer-based processing
Example 3: Set the first n words RAM
of the memory block beginning in 0 300 R0 base
address base to –1 1 5 R1 n
2 R2
Inputs: R0 (base) and R1 (n)
... ...
15 R15
16 2 i
17
...
255
256
...
300 –1
301 –1
302
303
304
305
...
example:
base = 300
n=5
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 86
Pointer-based processing
Example 3: Set the first n words RAM
of the memory block beginning in 0 300 R0 base
address base to –1 1 5 R1 n
2 R2
Inputs: R0 (base) and R1 (n)
... ...
15 R15
16 2 i
17
...
255
256
...
300 –1
301 –1
302 –1
303
304
305
...
example:
base = 300
n=5
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 87
Pointer-based processing
Example 3: Set the first n words RAM
of the memory block beginning in 0 300 R0 base
address base to –1 1 5 R1 n
2 R2
Inputs: R0 (base) and R1 (n)
... ...
15 R15
16 3 i
17
...
255
256
...
300 –1
301 –1
302 –1
303
304
305
...
example:
base = 300
n=5
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 88
Pointer-based processing
Example 3: Set the first n words RAM
of the memory block beginning in 0 300 R0 base
address base to –1 1 5 R1 n
2 R2
Inputs: R0 (base) and R1 (n)
... ...
15 R15
16 3 i
17
...
255
256
...
300 –1
301 –1
302 –1
303 –1
304
305
...
example:
base = 300
n=5
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 89
Pointer-based processing
Example 3: Set the first n words RAM
of the memory block beginning in 0 300 R0 base
address base to –1 1 5 R1 n
2 R2
Inputs: R0 (base) and R1 (n)
... ...
15 R15
16 4 i
17
...
255
256
...
300 –1
301 –1
302 –1
303 –1
304
305
...
example:
base = 300
n=5
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 90
Pointer-based processing
Example 3: Set the first n words RAM
of the memory block beginning in 0 300 R0 base
address base to –1 1 5 R1 n
2 R2
Inputs: R0 (base) and R1 (n)
... ...
15 R15
16 4 i
17
...
255
256
...
300 –1
301 –1
302 –1
303 –1
304 –1
305
...
example:
base = 300
n=5
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 91
Pointer-based processing
Example 3: Set the first n words RAM
of the memory block beginning in 0 300 R0 base
address base to –1 1 5 R1 n
2 R2
Inputs: R0 (base) and R1 (n)
... ...
15 R15
16 5 i
17
...
255
256
...
300 –1
301 –1
302 –1
303 –1
304 –1
305
...
example:
base = 300
n=5
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 92
Pointer-based processing
Assembly code
Example 3: Set the first n words RAM
// Program: PointerDemo.asm
of the memory block beginning in 0 300 R0 base
// Starting at the address stored in R0,
address base to –1 // sets the first R1 words to –1
1 5 R1 n
2 R2
Inputs: R0 (base) and R1 (n) // i = 0
... ...
@i
15 R15
Pseudocode M=0
16 5 i
(LOOP)
// Program: PointerDemo.asm // if (i == R1) goto END 17
// Starting at the address stored in R0, @i ...
// sets the first R1 words to –1 D=M 255
i=0 @R1 256
LOOP: D=D-M ...
if (i == R1) goto END @END 300 –1
RAM[R0 + i] = -1 D;JEQ 301 –1
// RAM[R0 + i] = -1 302 –1
i = i+1
@R0 303 –1
goto LOOP D=M 304 –1
END: @i 305
A=D+M ...
M=-1
// i = i + 1
@i example:
M=M+1 base = 300
// goto LOOP
@LOOP n=5
0;JMP
(END)
@END
0;JMP
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 93
Array processing
High-level code (Java example) RAM
... 0 R0
// Variable declarations 1 R1
int[] arr = new int[5]; 2 R2
int sum = 0; ... ...
... 15 R15
16 5034 arr
// Enters some values into the array
17 0 sum
// (code omitted) Memory state just
...
... before executing the 75
// Sums up the array elements for loop: 76
for (int j = 0; j < 5; j++) { ...
sum = sum + arr[j]; 255
} 256
...
...
5034 100
5035 50
5036 200
5037 2
5038 7
5036
...
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 94
Array processing
High-level code (Java example) RAM
... 0 R0
// Variable declarations 1 R1
int[] arr = new int[5]; 2 R2
int sum = 0; ... ...
... 15 R15
16 5034 arr
// Enters some values into the array
17 359 sum
// (code omitted) Memory state just
... 5 j
... after executing the 75
// Sums up the array elements for loop: 76
for (int j = 0; j < 5; j++) { ...
sum = sum + arr[j]; 255
} 256
...
...
5034 100
5035 50
5036 200
5037 2
5038 7
5036
...
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 95
Array processing
High-level code (Java example) Hack assembly RAM
... ... 0 R0
// Variable declarations // sum = sum + arr[j] 1 R1
int[] arr = new int[5]; @arr 2 R2
int sum = 0; D=M ... ...
... @j 15 R15
16 5034 arr
// Enters some values into the array A=D+M
17 359 sum
// (code omitted) D=M ... 5 j
... @sum 75
// Sums up the array elements M=M+D 76
Compiler ... ...
for (int j = 0; j < 5; j++) {
255
sum = sum + arr[j]; // arr[j] = arr[j] + 1
} 256
...
// Increments each array element
? ...
5034
5035
100
50
for (int j = 0; j < 5; j++) { 5036 200
arr[j] = arr[j] + 1 5037 2
} 5038 7
5036
...
...
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 96
Array processing
High-level code (Java example) Hack assembly RAM
... ... 0 R0
// Variable declarations // sum = sum + arr[j] 1 R1
int[] arr = new int[5]; @arr 2 R2
int sum = 0; D=M ... ...
... @j 15 R15
16 5034 arr
// Enters some values into the array A=D+M
17 359 sum
// (code omitted) D=M ... 5 j
... @sum 75
// Sums up the array elements M=M+D 76
Compiler ... ...
for (int j = 0; j < 5; j++) {
255
sum = sum + arr[j]; // arr[j] = arr[j] + 1
} 256
@arr
...
... D=M 5034 100
// Increments each array element @j 5035 50
for (int j = 0; j < 5; j++) { A=D+M 5036 200
arr[j] = arr[j] + 1 M=M+1 5037 2
} ... 5038 7
5036
...
...
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 97
Machine Language
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 98
The A-instruction
Instruction set
• A - instruction
• C - instruction
Syntax: Semantics:
@ xxx • Sets the A register to the xxx
• Side effects:
where xxx is either a constant, or
RAM[A] becomes the selected RAM location
a symbol bound to a constant ROM[A] becomes the selected ROM location
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 99
The C-instruction
Instruction set
• A - instruction
• C - instruction
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 100
The C-instruction
Syntax: dest = comp ; jump “dest =” and “; jump” are optional
where:
0, 1, –1, D, A, !D, !A, –D, –A, D+1, A+1, D–1, A–1, D+A, D–A, A–D, D&A, D|A
comp = M, !M, –M, M+1, M–1, D+M, D–M, M–D, D&M, D|M
Semantics:
Computes the value of comp and stores the result in dest.
If (comp jump 0), branches to execute ROM[A]
Examples:
// Sets the D register to -1
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 101
The C-instruction
Syntax: dest = comp ; jump “dest =” and “; jump” are optional
where:
0, 1, –1, D, A, !D, !A, –D, –A, D+1, A+1, D–1, A–1, D+A, D–A, A–D, D&A, D|A
comp = M, !M, –M, M+1, M–1, D+M, D–M, M–D, D&M, D|M
Semantics:
Computes the value of comp and stores the result in dest.
If (comp jump 0), branches to execute ROM[A]
Examples:
// Sets the D register to -1
D=-1
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 102
The C-instruction
Syntax: dest = comp ; jump “dest =” and “; jump” are optional
where:
0, 1, –1, D, A, !D, !A, –D, –A, D+1, A+1, D–1, A–1, D+A, D–A, A–D, D&A, D|A
comp = M, !M, –M, M+1, M–1, D+M, D–M, M–D, D&M, D|M
Semantics:
Computes the value of comp and stores the result in dest.
If (comp jump 0), branches to execute ROM[A]
Examples:
// Sets D and M to the value of the D register, plus 1
DM=D+1
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 103
The C-instruction
Syntax: dest = comp ; jump “dest =” and “; jump” are optional
where:
0, 1, –1, D, A, !D, !A, –D, –A, D+1, A+1, D–1, A–1, D+A, D–A, A–D, D&A, D|A
comp = M, !M, –M, M+1, M–1, D+M, D–M, M–D, D&M, D|M
Semantics:
Computes the value of comp and stores the result in dest.
If (comp jump 0), branches to execute ROM[A]
Examples:
// If (D-1 = 0) jumps to execute the instruction stored in ROM[56]
@56
D-1;JEQ
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 104
The C-instruction
Syntax: dest = comp ; jump “dest =” and “; jump” are optional
where:
0, 1, –1, D, A, !D, !A, –D, –A, D+1, A+1, D–1, A–1, D+A, D–A, A–D, D&A, D|A
comp = M, !M, –M, M+1, M–1, D+M, D–M, M–D, D&M, D|M
Semantics:
Computes the value of comp and stores the result in dest.
If (comp jump 0), branches to execute ROM[A]
Examples:
// goto LOOP
@LOOP
0;JMP // The 0; prefix is a syntax convention
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 105
Recap: A-instructions and C-instructions
They normally come in pairs:
// RAM[5] = RAM[5] - 1
@5 To set up for a C-instruction that operates on M,
M=M-1
Use an A-instruction to select the target address
It makes no sense that a C-instruction will use the same address to access the data
memory and the instruction memory simultaneously;
Best practice rule
A C-instruction should specify …
• Either M
• Or a jump directive
But not both.
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 106
Machine Language
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 107
The Hack language specification
Symbolic: @ x xx (xxx is a decimal value ranging from 0 to 32767,
A instruction or a symbol bound to such a decimal value)
Binary: 0 v v v v v v v v v v v v v v v (v v ... v = 15-bit value of xxx)
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 109
Input / output
Screen: used to
display outputs
instruc- data Hello,
tions world
ROM CPU RAM
Keyboard: used
to enter inputs
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 110
Bitmaps
RAM
0
...
15
16
...
255
256
...
2047
2048 Hello,
world
...
16383
SCREEN = 16384 screen
... memory
24575 map
24576
...
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 111
Bitmaps
Physical screen
...
...
...
...
...
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 112
Bitmaps
Physical screen
...
...
...
...
...
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 113
Bitmaps
Physical screen
...
...
...
...
...
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 114
Bitmaps
Screen Memory Map Physical screen
16384 0 0000000010101111 0 1 2 3 4 5 6 7 8 ... 511
= 1 0000000000000000 0 ...
SCREEN row 0
... 1 ...
base address
of the screen 31 1000000000000000
memory map 32 0000000001110000
33 0000000000000000
... row 1 refresh ... ...
63 0000000000000000
... ...
8159 0000000010101101 ...
255
8160 0000000000000000
... row 255
8191 0000000000000000
Mapping
The (row, col) pixel in the physical screen is represented by
the (col % 16)th bit in RAM address SCREEN + 32 * row + col /16
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 115
Bitmaps
Screen Memory Map Physical screen
16384 0 0000000010101111 0 1 2 3 4 5 6 7 8 ... 511
= 1 0000000000000000 0 ...
SCREEN row 0
... 1 ...
base address
of the screen 31 1000000000000000
memory map 32 0000000001110000
33 0000000000000000
... row 1 refresh ... ...
63 0000000000000000
... ...
8159 0000000010101101 ...
255
8160 0000000000000000
... row 255
8191 0000000000000000
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 116
Bitmaps
Screen Memory Map Physical screen
16384 0 0000000010101111 0 1 2 3 4 5 6 7 8 ... 511
= 1 0000000000000000 0 ...
SCREEN row 0
... 1 ...
base address
of the screen 31 1000000000000000
memory map 32 0000000001110000
33 0000000000000000
... row 1 refresh ... ...
63 0000000000000000
... ...
8159 0000000010101101 ...
255
8160 0000000000000000
... row 255
8191 0000000000000000
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 117
Bitmaps
Screen Memory Map Physical screen
16384 0 0000000010101111 0 1 2 3 4 5 6 7 8 ... 511
= 1 0000000000000000 0 ...
SCREEN row 0
... 1 ...
base address
of the screen 31 1000000000000000
memory map 32 0000000001110000
33 0000000000000000
... row 1 refresh ... ...
63 0000000000000000
... ...
8159 0000000010101101 ...
255
8160 0000000000000000
... row 255
8191 0000000000000000
?
@SCREEN
M=-1 // –1 = 1111111111111111
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 118
Bitmaps
Screen Memory Map Physical screen
16384 0 0000000010101111 0 1 2 3 4 5 6 7 8 ... 511
= 1 0000000000000000 0 ...
SCREEN row 0
... 1 ...
base address
of the screen 31 1000000000000000
memory map 32 0000000001110000
33 0000000000000000
... row 1 refresh ... ...
63 0000000000000000
... ...
8159 0000000010101101 ...
255
8160 0000000000000000
... row 255
8191 0000000000000000
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 119
Bitmaps
Screen Memory Map Physical screen
16384 0 0000000010101111 0 1 2 3 4 5 6 7 8 ... 511
= 1 0000000000000000 0 ...
SCREEN row 0
... 1 ...
base address
of the screen 31 1000000000000000
memory map 32 0000000001110000
33 0000000000000000
... row 1 refresh ... ...
63 0000000000000000
... ...
8159 0000000010101101 ...
255
8160 0000000000000000
... row 255
8191 0000000000000000
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 120
Bitmaps
Screen Memory Map Physical screen
16384 0 0000000010101111 0 1 2 3 4 5 6 7 8 ... 511
= 1 0000000000000000 0 ...
SCREEN row 0
... 1 ...
base address
of the screen 31 1000000000000000
memory map 32 0000000001110000
33 0000000000000000
... row 1 refresh ... ...
63 0000000000000000
... ...
8159 0000000010101101 ...
255
8160 0000000000000000
... row 255
8191 0000000000000000
Rectangle
Drawing
Simple
graphics
program:
demo
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 121
Bitmap Editor
0000111111100000 = 4064
0001100000110000 = 6192
0001001010010000 = 4752
...
Bitmap editor
The user draws a pixeled image on a 2D grid
The tool generates code that draws the image in the RAM
The generated code can be copy-pasted into the code.
...
0111111011111100 = 32508
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 122
Machine Language
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 123
Input
RAM
High-level input handling (later in the course) 0
...
readInt, readString, ... 15
16
...
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 124
Input
RAM
0
...
15
16
...
255
256
...
2047
2048
...
16383
16384
...
24575
kbd = 24576 keyboard
...
32767
Keyboard memory map
A single 16-bit memory location, dedicated to representing the keyboard.
Base address: KBD = 24576 (predefined symbol)
Reading inputs is affected by probing this register.
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 125
The Hack character set
key code key code key code key code key code
(space) 32 0 48 A 65 a 97 newline 128
! 33 1 49 B 66 b 98 backspace 129
“ 34 … … C … c 99 left arrow 130
# 35 9 57 … … … … up arrow 131
$ 36 Z 90 z 122 right arrow 132
: 58
% 37 down arrow 133
; 59 [ 91 { 123
& 38 home 134
< 60 / 92 | 124
‘ 39 end 135
= 61 ] 93 } 125
( 40 Page up 136
> 62 ^ 94 ~ 126
) 41 Page down 137
? 63 _ 95
* 42 insert 138
@ 64 ` 96
+ 43 delete 139
, 44 esc 140
- 45 f1 141
. 46 (Subset of Unicode) ... ...
/ 47 f12 152
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 126
Memory mapped input
RAM
24576 0000000000000000
=
KBD
base address
of the keyboard
memory map
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 127
Memory mapped input
RAM
24576 0000000000000000
0000000001001011 k
=
KBD
base address
of the keyboard
memory map
code('k') = 75
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 128
Memory mapped input
RAM 4
24576 0000000000000000
0000000000110100
=
KBD
base address
of the keyboard
memory map
code('4') = 52
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 129
Memory mapped input
RAM
24576 0000000000000000
0000000010000011
= é
KBD
base address
of the keyboard
memory map
code('é') = 131
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 130
Memory mapped input
RAM
24576 0000000000000000
0000000000100000
=
KBD space
base address
of the keyboard
memory map
code(' ') = 32
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 131
Memory mapped input
RAM
24576 0000000000000000
=
KBD
base address
of the keyboard
memory map
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 132
Reading inputs
RAM
24576 0000000000000000
0000000001001011 k
=
KBD
base address
of the keyboard
memory map
code('k') = 75
Examples:
// Set D to the character code of // If the currently pressed key is 'q', goto END
// the currently pressed key @KBD
@KBD D=M
D=M @113 // 'q'
D=D-A
@END
D;JEQ
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 133
Machine Language
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 134
Project 4
Objectives
Gain a hands-on taste of:
• Low-level programming
• Assembly language
• The Hack computer
Tasks
• Write a simple algebraic program: Mult
• Write a simple interactive program: Fill
• Get creative: Define and write some program of your own (optional).
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 135
Mult: a program that computes R2 = R0 * R1
code:
Project 4
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 136
Mult: a program that computes R2 = R0 * R1
code:
Project 4
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 137
Mult: a program that computes R2 = R0 * R1
Multiplication algorithm
• Repetitive addition (simple, inefficient)
• Bitwise (clever, efficient)
Either approach is fine for this project.
code:
Project 4
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 138
Fill: a simple interactive program
code:
Project 4
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 139
Fill: a simple interactive program
code:
Project 4
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 140
Fill: a simple interactive program
code:
Project 4
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 141
Fill: a simple interactive program
code:
Project 4
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 142
Fill: a simple interactive program
Etc...
code:
Project 4
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 143
Fill: a simple interactive program
Etc...
code:
Project 4
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 144
Fill: a simple interactive program
Algorithm
• Execute an infinite loop that listens to the keyboard input
• When a key is pressed (any key),
execute code that writes "black" in every pixel
• When no key is pressed, execute code that writes "white" in every pixel
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 145
Task 3: Define and write a program of your own
Any ideas?
It’s your call!
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 146
Program development process
Write / edit the
Prog.asm
program using a
text editor
Translation options
1. Let the CPU emulator translate
into binary code (as seen on the left)
Load the 2. Use the supplied assembler:
program into the
CPU emulator, • Find it on your PC in
and run it nand2tetris/tools
No
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 147
Implementation notes
Well-written low-level code is
• Compact
• Efficient
Tips
• Elegant
• Use symbolic variables and labels
• Self-describing
• Use sensible documentation
• Use sensible variable and label names
• Variables: lower-case
• Labels: upper-case
• Use indentation
• Start by writing pseudocode.
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 148
Nand to Tetris Roadmap: Hardware
abstraction
machine
language
developing
an assembler
abstraction
hardware platform
building a
computer abstraction
p2 p3
computer building p1
ALU, RAM abstraction
chips building
elementary d
logic gates gates Nan
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 149
Nand to Tetris Roadmap: Hardware
abstraction
abstraction
hardware platform
building a
computer abstraction
p2 p3
computer building p1
ALU, RAM abstraction
chips building
elementary d
logic gates gates Nan
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 150
Nand to Tetris Roadmap: Hardware
abstraction
developing
an assembler
abstraction
p5 hardware platform
building a
computer abstraction
p2 p3
computer building p1
ALU, RAM abstraction
chips building
elementary d
logic gates gates Nan
Next lecture:
Build the computer
Nand to Tetris / www.nand2tetris.org / Chapter 4 / Copyright © Noam Nisan and Shimon Schocken Slide 151