1.

Explain following pins of an 8085 microprocessor in brief:

1.ALE 2. INTR 3. READY 4. HLDA 5. X1 and X2

ALE (Address Latch Enable):

 ALE is crucial for interfacing the microprocessor with external memory and I/O
devices.

 It generates a signal to latch the address present on the address bus into
external latch ICs during the beginning of a machine cycle.

INTR (Interrupt Request):

 INTR enables external devices to interrupt the microprocessor's normal

execution flow.

 It allows devices to request the microprocessor's attention for time-sensitive

tasks or events.

READY:

 READY is utilized to synchronize the microprocessor with slower external devices.

 It halts the microprocessor's operation until the external device indicates

readiness for data transfer or processing.

HLDA (Hold Acknowledge):

 HLDA acknowledges a request from slower peripheral devices to gain control of

the system bus temporarily.

 It signals to the requesting device that the microprocessor has acknowledged

the hold request and is ready to enter a hold state.

X1 and X

 X1 and X2 pins are used to connect an external crystal oscillator, determining the
microprocessor's operating frequency.

 The stability and accuracy of the oscillator directly influence the timing and
reliability of the microprocessor's operations.

4. Explain demultiplexing of data and address bus of 8085.

In the Intel 8085 microprocessor, the data bus and the address bus are multiplexed,
meaning they share the same physical lines for transferring data and addresses.
This design choice helps reduce the number of pins required on the microprocessor,
which can simplify system design and reduce costs. However, to interface with external
memory and I/O devices, which typically require separate data and address lines,
demultiplexing of the data and address bus is necessary.
Demultiplexing the Address Bus:

 In the 8085 microprocessor, the address bus consists of 16 lines (A0-A15).

 During the first part of the machine cycle, the microprocessor outputs the lower 8
bits of the address (A0-A7) on the data bus.

 These lower 8 bits are latched by external latch ICs when the ALE (Address Latch
Enable) signal goes high.

 During the second part of the machine cycle, the microprocessor outputs the
upper 8 bits of the address (A8-A15) directly onto the address bus.

 By latching the lower 8 bits first and then directly outputting the upper 8 bits, the
address bus is effectively demultiplexed.
Demultiplexing the Data Bus:

 Similarly, the data bus in the 8085 microprocessor is also multiplexed.

 During the first part of the machine cycle (T1), when the address is being output
onto the address bus, the data bus is used to carry the lower 8 bits of the
address.

 During the second part of the machine cycle (T2 or T3), when the actual data
transfer occurs, the microprocessor places the data onto the data bus.

 External memory or I/O devices then read the data from the data bus during this
part of the cycle.

 By separating the time when the address and data are present on the bus, the
data bus is effectively demultiplexed.
5. What is the ending address of a 2K-bytes memory whose starting address is 3000H?
To find the ending address of a memory block, you add the starting address to the
size of the memory block and subtract 1, since memory addresses typically start from
0.
Given:
Starting address = 3000H
Memory size = 2K bytes
1K byte = 1024 bytes
So, 2K bytes = 2 * 1024 = 2048 bytes
To find the ending address:
Ending address = Starting address + Memory size - 1
Ending address = 3000H + 2048 - 1
Ending address = 3000H + 2047
Ending address = 5047H
Therefore, the ending address of the 2K-bytes memory block starting at address 3000H
is 5047H.

9.Explain arithmetic instructions of 8085.

The Intel 8085 microprocessor, like many other processors, features a set of
instructions specifically designed for arithmetic operations.
These instructions allow the microprocessor to perform various arithmetic operations
such as addition, subtraction, incrementing, decrementing, etc.
Here's an explanation of some of the arithmetic instructions of the 8085
microprocessor:
1. ADD: This instruction is used to add the contents of a specified register or
memory location to the accumulator (ACC). Syntax: ADD <operand>.

 Ex:
 ADD B ; Add the content of register B to the accumulator

 ADD M ; Add the content of memory location pointed by HL register pair to the
accumulator
2. ADI: This instruction is used to add an immediate 8-bit data to the accumulator.

 Syntax: ADI data

 Example: ADI 10H ; Add immediate data 10H to the accumulator

3. SUB: This instruction is used to subtract the contents of a specified register or
memory location from the accumulator.

 Syntax: SUB <operand>.

 Example:

 SUB C ; Subtract the content of register C from the accumulator

 SUB M ; Subtract the content of memory location pointed by HL register

pair from the accumulator
4. SUI: This instruction is used to subtract an immediate 8-bit data from the
accumulator.

 Syntax: SUI data.

 Ex;

 SUI 20H ; Subtract immediate data 20H from the accumulator

5. INR: This instruction is used to increment the contents of a register or a memory

location by 1.

 Syntax: INR <operand>.

 Example:

 INR A ; Increment the content of the accumulator by 1

 INR M ; Increment the content of memory location pointed by HL

register pair by 1
10.difference between rlc and ral instruction.

RLC RAL

The bit that is shifted out from the leftmost The carry flag is rotated into the rightmost
position is placed in both the carry flag (CY)
position (bit 0) of the accumulator, and the previous
and the rightmost position (bit 0) of the
accumulator. 0 is rotated into the carry flag.

 Syntax: RLC. Syntax: RAL

Ex; Ex;
Initial accumulator content: 10101100 Initial accumulator content: 10101100 (CY = 1)
After RLC: 01011001 (CY = 1) After RAL: 01011001 (CY = bit 7)

RLC shifts the leftmost bit into both the while RAL rotates the accumulator leftwards with the
carry flag and the rightmost position of the
carry flag being shifted into the rightmost position
accumulator

16 . What will be the value in accumulator, for the given 8085 program below?
MVI C, 7FH
MVI B, 3EH
MOV A, B
RLC
RLC
ANI 7FH
HLT
Ans;
Ans : A 3EH (0011 1110)B
A  (0111 1100)B
A  (1111 1000)B
A  (0111 1000) B
11. Explain the SIM and RIM instructions of the 8085 microprocessor.

Set Interrupt Mask (SIM) : In 8085 Instruction set, SIM stands for “Set Interrupt
Mask”. It is 1-Byte instruction and it is a multi-purpose instruction
The main uses of SIM instruction are –
 Masking/unmasking of RST7.5, RST6.5, and RST5.5
 Reset to 0 RST7.5 flip-flop.
 Perform serial output of data.

Read Interrupt Mask (RIM) : In 8085 Instruction set, RIM stands for “Read
Interrupt Mask”. It is a 1-Byte multi-purpose instruction.
It is used for the following purposes –
 To check whether RST7.5, RST6.5, and RST5.5 are masked or not.
 To check whether interrupts are enabled or not.
 To check whether RST7.5, RST6.5, or RST5.5 interrupts are pending or
not.
 To perform serial input of data.
12. How many flags are available in an 8085 microprocessor? State the
importance of an auxiliary carry (AC) flag.
The Flag register is a Special Purpose Register.
Depending upon the value of the result after any arithmetic and logical
operation, the flag bits become set (1) or reset (0).
In 8085 microprocessor, the flag register consists of 8 bits and only 5 of them
are useful. The 5 flags are:

The 8085 microprocessor has five flags in its flag register:

Sign (S) flag
Zero (Z) flag
Auxiliary Carry (AC) flag
Parity (P) flag
Carry (CY) flag
The importance of the Auxiliary Carry (AC) flag lies in its role in binary addition. The AC
flag indicates if there is a carry out of the lower nibble (4 bits) during arithmetic
operations, such as addition.

For example, MVI A 2BH (load 2BH in register A) MVI 39H (load 39H in register B) ADD
B (A = A + B) These set of instructions will set the auxiliary carry flag to 1, as on
adding 2B and 39, the addition of lower-order nibbles B and 9 will generate a carry.
13. Define the followings: Machine Cycle, T-state, JC, CMP, RET, SBB, STC.
1. Machine Cycle:
A machine cycle is the basic operation performed by a computer's central processing
unit (CPU). It consists of a series of steps required to fetch, decode, execute, and store
data or instructions. In microprocessors like the 8085, a machine cycle typically
consists of several clock cycles.
2. **T-state**:
T-state, short for Timing state, refers to the basic unit of time in a microprocessor's
operation. Each machine cycle consists of a specific number of T-states. The duration
of a T-state is determined by the system clock frequency. Different instructions may
require different numbers of T-states to execute.
3. **JC**:
In assembly language programming, JC typically stands for "Jump if Carry." It is a
conditional branch instruction that causes the program execution to jump to a specific
memory location if the carry flag (CY) is set.
4. **CMP**:
CMP stands for "Compare." It is an instruction used in assembly language
programming to compare two operands. It performs a subtraction operation between
the specified operands but does not store the result. Instead, it updates the flags based
on the result of the subtraction.
5. **RET**:
RET is a mnemonic for "Return." It is an assembly language instruction used to return
control from a subroutine to the main program. When executed, RET retrieves the return
address from the stack and jumps to that address, resuming execution from where the
subroutine was called.
6. **SBB**:
SBB stands for "Subtract with Borrow." It is an assembly language instruction used to
subtract one operand from another along with the borrow flag (borrowed from a
previous subtraction operation). It is particularly useful in multi-byte subtraction
operations.

7. **STC**:
STC stands for "Set Carry Flag." It is an assembly language instruction used to set the
carry flag (CY) in the flag register of the microprocessor.
14. Point out the valid and invalid instruction. Correct the invalid ones.
MVI AB LDA BD MOV 05 ANI 0BH LDAX B
1. *MVI AB*:
- Invalid instruction. The MVI instruction is used to move an immediate value into a
register or memory location. However, AB is not a valid register or memory location
specifier. Perhaps you meant to move an immediate value into the accumulator and the
B register (MVI A, B).
2. *LDA BD*:
- Invalid instruction. The LDA instruction is used to load the accumulator with the
contents of a memory location. However, BD is not a valid memory location specifier. If
you intended to load the accumulator with the contents of memory location 0xBD, the
correct instruction would be LDA 0xBD.
3. *MOV 05*:
- Invalid instruction. The MOV instruction is used to move data between registers or
between a register and a memory location. Here, 05 doesn't specify a valid source and
destination for the move operation. If you intended to move data from register B to
register C, the correct instruction would be MOV C, B.
4. *ANI 0BH*:
- Valid instruction. The ANI instruction performs a logical AND operation between the
accumulator and an immediate 8-bit data. It is correctly specified here to perform a
logical AND operation between the accumulator and the immediate data 0BH.
5. *LDAX B*:
- Valid instruction. The LDAX instruction is used to load the accumulator with the
contents of a memory location addressed by the BC register pair. So, LDAX B is a valid
instruction which loads the accumulator with the contents of the memory location
addressed by the BC register pair.
Correcting the invalid instructions:
- MVI A, B
- LDA 0xBD
- MOV C, B
18.Write an assembly language program to find the larger number
from given two numbers stored at 2501H = 98H, 2502H = 87H result
store at 2503H.
LXI H, 2501H ; Load HL register pair with the address of the first number
MOV A, M ; Move the value at memory location 2501H to the accumulator
INX H ; Increment HL to point to the next memory location
MOV B, M ; Move the value at memory location 2502H to register B
CMP B ; Compare the contents of the accumulator with the value in register
B
JNC LABEL ; Jump to LABEL if the Carry flag is not set (i.e., if the first
number is greater)
MOV C, A ; Move the larger number (from 2501H) to register C
JMP STORE ; Jump to STORE to store the result
LABEL:
MOV C, B ; Move the larger number (from 2502H) to register C
STORE:
MOV M, C ; Store the larger number from register C to memory location
2503H
HLT ; Halt the program
19. Explain One byte, Two byte, Three byte and write short note on different types of
instruction sets.

In the context of computer architecture and microprocessors, "one byte," "two bytes,"
and "three bytes" refer to the size of instructions.
1. **One Byte Instruction:**

 A one-byte instruction typically refers to instructions that can be encoded in a

single byte of memory.

 These instructions are often simple and perform basic operations such as
moving data between registers, performing arithmetic operations, or
manipulating flags.

 Examples of one-byte instructions in some architectures might include NOP

(no operation), MOV (move data), ADD (addition), SUB (subtraction), etc.
2. **Two Byte Instruction:**

 Two-byte instructions are slightly more complex and require two bytes of
memory to encode.

 These instructions often involve specifying additional information or

operands beyond what can be represented in a single byte.

 Examples could include conditional jump instructions like JZ (Jump if Zero),

JMP (Jump), CALL (Call subroutine), etc.
3. **Three Byte Instruction:**

 Three-byte instructions are even more complex and require three bytes of
memory to encode.

 These instructions typically involve more extensive operations, such as

accessing memory locations with large addresses, performing complex
arithmetic or logic operations, or executing multi-step operations.

 Examples could include instructions for accessing memory operands using

direct addressing modes or performing complex arithmetic operations
involving multiple registers.
Types of Instruction Sets:
1. **Complex Instruction Set Computing (CISC):**

 CISC instruction sets feature a wide variety of instructions, some of which

can perform complex operations in a single instruction.
  These instructions often include memory access, arithmetic operations, and
control flow instructions.

 Examples of CISC architectures include x86 (Intel and AMD processors), DEC
VAX, and IBM z/Architecture.

2. **Reduced Instruction Set Computing (RISC):**

 RISC instruction sets aim for simplicity and efficiency by providing a smaller
set of simple instructions.

 RISC architectures typically include instructions that perform basic

operations, and complex operations are constructed by combining multiple
simple instructions.

 Examples of RISC architectures include ARM, MIPS, and PowerPC.

3. **Complex Instruction Set Computing with Reduced Instruction Set Computing Core
(CISC-RISC Hybrid):**

 Some architectures combine features of both CISC and RISC designs.

 These architectures often have a relatively simple RISC core with additional
complex instructions for performance optimization or backward compatibility.

 An example is the x86-64 architecture, which is based on the x86 CISC

architecture but incorporates RISC-like features for efficiency.
20 Explain the following instructions of the 8085 Microprocessor with suitable example:
INX, LDAX, XTHL, DAA, JC, CMP

1. INX (Increment Register Pair):

- Syntax: INX rp
- Description: This instruction is used to increment the content of a register pair
(rp) by 1.
- Example: Suppose we want to increment the BC register pair. The instruction
would be INX B. This will increment the value stored in BC by 1.
2. LDAX (Load Accumulator Indirect):
- Syntax: LDAX rp
- Description: This instruction loads the accumulator with the contents of the
memory location whose address is stored in the specified register pair (rp).
- Example: If we want to load the accumulator with the contents of memory
address pointed by BC, the instruction would be LDAX B.
3. XTHL (Exchange H and L with Top of Stack):
- Syntax: XTHL
- Description: This instruction exchanges the content of HL register pair with
the content of the top of the stack.
- Example: Let's say the HL register pair contains 2000H and the top of the
stack contains 3000H. After executing XTHL, HL will contain 3000H, and the
top of the stack will contain 2000H.
4. DAA (Decimal Adjust Accumulator):
- Syntax: DAA
- Description: This instruction adjusts the content of the accumulator to form
two four-bit Binary Coded Decimal (BCD) digits.
- Example: If after an addition operation, the accumulator holds a value greater
than 9 or the Auxiliary Carry flag (AC) is set, DAA adjusts the result in the
accumulator to represent the correct BCD value.
5. JC (Jump on Carry):
- Syntax: JC addr
- Description: This instruction performs an unconditional jump to the specified
address if the Carry flag (CY) is set.
- Example: If CY is set, the program execution will jump to the specified
address; otherwise, it will continue with the next instruction.
6. CMP (Compare):
- Syntax: CMP r/M
- Description: This instruction compares the contents of the accumulator with
the contents of the specified register or memory location (r/M) by subtracting
them without changing the accumulator.
- Example: If you want to compare the contents of the accumulator with the
contents of register B, you would use CMP B. The flags are then set based on the
result of the comparison, such as the Zero (Z), Sign (S), Carry (CY), and Parity
(P) flags.