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93 SPIE1803,24 Poly WStack

Profiles and Chemistry Effects in Po/ysilicon and Tungsten Silicide EPROM "Stack' Etching, SPIE Conference p.1803, 1993

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21 views12 pages

93 SPIE1803,24 Poly WStack

Profiles and Chemistry Effects in Po/ysilicon and Tungsten Silicide EPROM "Stack' Etching, SPIE Conference p.1803, 1993

Uploaded by

Daniel Flamm
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Profiles and Chemistry Effects in

Po/ysilicon and Tungsten Silicide EPROM "Stack' Etching

Daniel L. Flamm

Advanced X-Ray Optics Program


Lawrence Livermore National Laboratories, Livermore, CA 94550

Reza Sadjadi and Jeffrey R. Perry


Fairchild Research Center
National Semiconductor Corp., Sunnyvale, CA 95052

ABSTRACT

Specialized EPROM cell architectures lead to a host of new difficulties during


pattern transfer. Results from patterning stacked gate structure multilayers of WSix,
polysilicon, Si02 and Si3N4 with etching chemistries containing HBr and Cl2 are
examined. Strong effects arising from changes in feed composition and wafer
temperature are discussed along with some basic mechanisms involved in these
interactions.
INTRODUCTION

During the fabrication of EPROM transistors, up to seven film layers must be


etched in a single pass through the plasma process chamber. One typical device has
stacked layers of WSix, polysilicon, Si02, Si3Nx, Si02, polysilicon and Si02 over a
crystalline silicon substrate. Each of these films must be patterned with tight
constraints on the profile and critical dimension (CD) control while minimizing
residues from the etch process. For example, a robust WSix over polysilicon etch
process requires selectivities of 1.5:1 and higher in order to clear WSix and polysilicon
stringers and residues from tall vertical steps which are formed by stacked features in
these multilayer films. Endpoint detection and sidewall passivation layers also have a
strong influence on CD and profile control. CD line-width variations as small as
0.05!lm can affect the device performance and cell size. Cell size in turn has a heavy
influence on the overall die size and cost.
Typical feed gas chemistries used to etch WSix and polysilicon contain various
propmtions of C2F6, SF6, HBr and Cl2. Etching properties of these chemistries are
often manipulated by varying wafer temperature, mask material, the ratios of gases and
RF power. We have found that some of these interactions are attributable to the
production of involatile products which passivate film sidewalls and inhibit etching.
We believe other effects are explainable in terms of the redeposition of labile products
from resist erosion to fmm protective sidewalls. The extent of such passivation
depends on wafer temperature and indirectly on RF power.
Two types of 13.56 MHz parallel plate, single-wafer production reactors were used
to study these effects on 6-inch diameter wafers. In the first etcher, which was an

24/ SPIE Vol. 1803 (1992) 0-8194-1001-21931$4.00


undamped (UC) Lam Research Corporation model 4400, wafers were automatically
positioned on a water-cooled lower electrode which was maintained at 2o·c. This
undamped reactor had no specific means to enhance thermal contact between the
cooled electrode and wafer. Resist masks were used for all experiments in UC to
simulate production runs. The second reactor, which was a clamped (CL) Lam
Research Corporation model 4420, had a mechanical fixture to clamp the edges of a
wafer on to the platen. Small flows of helium gas were forced through holes in the
platen under the wafer to increase thermal conduction to and from the wafer. The
platen temperature could be varied between o·c and go·c. Refractory SiNx and Si02
masks were used in the experiments carried out in the CL system to simplify analysis
of the results.
The polysilicon films, prepared from SiH4 by chemical vapor deposition (CVD) in
a BTU Corp. horizontal furnace tube at 625·c, were nominally 2000A thick. The
films were then POC13 doped to achieve a final resistivity of about 55Q/square. The
WSix layers, 2500A thick, were deposited from WF6 and SiH4 in a Genus CVD
system at 38o·c. The silicide was silicon-rich with a stoichiometry of W:Si = 2.6:1.

Polysilicon Etching with HBr/CI2 in an Undamped System

Initial experiments etching polysilicon with HBr/ Cl2 mixtures in UC revealed


several general characteristics. In these runs, pressure was varied from 190 to 360
mTorr, power ranged from 200 to 320 W, and HBr/ Cl2 ratios between 1.0 and 3.5
with a total gas flow of 260 seem. The wafer surface temperatures were measured in
selected experiments by placing commercial adhesive-backed temperature "dots" on
selected areas of the device wafers. The "dots" were shielded from the plasma
environment by covering them with an overlayer of 0.0025-inch thick adhesive backed
"KaptonTM" tape. Although the lower electrode temperature wa:s maintained at 20"C,
measurements revealed that the actual wafer temperature was about 80--9o·c under
these processing conditions. In contrast, similar wafer temperature measurements on
the He-clamp CL reactor showed temperature to be always within about 10· of the
platen temperature, except at high power (-400W).
Increasing the HBr to Cl2 ratio produced higher polysilicon to Si02 etching
selectivity. When the HBr to Cl2 ratio was above 2.5, polysilicon to Si02
selectivities were greater than 400:1. However extended overetching under these
conditions, ih excess of 100%, results in an undercut profile. The detailed shape of
the profile varies with pressure, plate spacing, feed mixture, power and wafer
temperature. With other variables held constant, undercutting increased with the
HBr/Cl2 ratio. Figure 1 shows a (anisotropic) profile obtained with an HBr/ Cl2 ratio
of 1:1 and 200% overetching. Under the same conditions, increasing the overetch time
to 400% causes a severely undercut profile (Figure 2). Figure 3 shows a profile
obtained under the same process conditions as those in Figure 1, but with the HBr/Cl2
ratio increased to 2.5:1. Note that the polysilicon sidewall profile becomes isotropic.
Evidence is that resist erosion supplies sidewall inhibitor species in these HBr/Cl2
UC process recipes. It has been suggested that bromine-based polysilicon etching
tends to be more anisotropic than a chlorine atom-based etch owing to the formation

SPIE Vol. 1803 (1992) I 25


of less volatile SiBrx species which protect feature sidewalls1. However volatility of
SiBr4 (as well as mixed silicon bromo-chloro halides) will increase with surface
temperature, and the isotropic attack of silicon by bromine is strongly activated
2
(Ea - 15.5 kcal / mole) . The silicon chlorides are more volatile than brominated
analogs and spontaneous chemical etching by atomic chlorine is faster than that by
atomic B�·3. Hence while the isotropic profiles can be explained by high wafer
surface temperatures, this effect does not explain why increasing the proportion of HBr
relative to Cl2 gives a more isotropic etch. Previous workers4 have suggested that
bromine additions diminish resist erosion for plasmas in these chemistries. We know
that products of resist mask erosion play an important role in anisotropy because
changing from one resist to another had a marked influence on profile and anisotropy
(most wafers on the UC machine were masked with KTI 825; however when Hunt
6512 was used as a mask, plasma etching conditions unchanged, the profiles became
more anisotropic). Our data confirm (see below) that in the absence of mask effects,
etching in HBr plasmas at these temperatures is more anisotropic than Cl2.

Temperature-Controlled Etching with Inorganic Masks

To better understand the mechanisms operative in halogen-based plasma stack


etching, we deposited WSix/polysilicon multilayers over a thin oxide barrier on 6-inch
silicon wafers and etched through "hard" inorganic silicon nitride or Si02 masks.
Figure 4 shows a cross-sectional view of an unetched test section. The object of these
experiments was to examine profile development as a function of temperature, plasma
composition and the materials exposed to the plasma. Some samples were
anisotropically pre-etched to the polysilicon level before doing these etching
experiments while in other runs we etched the entire silicide/polysilicon bilayer stacks.
To insure that contaminative layers or surface oxide did not delay the onset of etching,
the prepared samples were precleaned with a short BOE dip and "flashed" in an SF6
plasma for several seconds as the first step of each programmed etching experiment.
Etching was carried out at platen temperatures of o·c, 40"C and 80"C in SF6, Cl2 and
HBr plasmas. In each case 52% of a total 290 seem feed flow consisted of equal parts
Ar and He, which was added to stabilize these plasmas and serve as an actinometer
(Ar)5. In addition, a small helium flow (10 seem) was aspirated through the clamped
wafer chuck to maintain heat transfer between the wafer and platen.

As-etched sample profiles were examined in a scanning electron microscope


(SEM). Some samples were then "cleaned" in a 13:2 BOE (buffered oxide etch)
solution and reexamined a second time by SEM. Real-time continuous optical
emission spectra of these etches were recorded with an "outboard" optical multichannel
analyzer along with single wavelength signals from the emission detectors on the
machine. The single channel detectors were set to the manufacturer-recommended
wavelengths: 405nm and 520nm. A detailed examination of these emission data will
be reported elsewhere.

Typical plots of optical emission versus time at 405 nm and 520 nm for etching a
Si3N4 -masked WSix/polysilicon bilayer in a Cl2 plasma are shown in Figure 5. At
point A an SF6 plasma is ignited for several seconds to clean the surface of native

26 I SPIE Vol. 1803 (1992)


oxide or other contaminants. After a short time delay to purge the process chamber, a
Cl2 plasma was "lit" at point B. Optical emission intensity at 520 nm then drifts
downward until the inflection point at C. We believe this marks the "endpoint" at
which the WSix layer first begins to clear. At point D emission intensity starts to fall
dramatically as large areas of polysilicon are etched by the plasma. Then intensity
increases! again as the area of exposed polysilicon decreases until point E, where we
presume substantially all polysilicon has been etched down to the thin oxide
underlayer. There is no intensity change as the oxide layer is slowly eroded until, at
point F, the plasma "punches through" selected areas of the oxide and attacks the
underlying silicon wafer. After the oxide is totally cleared at G emission intensity
remains at a steady state level until the plasma is finally extinguished at point H.

lntially, the reactor was operated at 420W nominal input power (13.56 MHz) with
an interelectrode spacing of 0.8 inch. However the temperature-tape sensors showed
that at this power, the wafer temperature was about 35-40"C higher than the platen
temperature. We found however, that if the power was reduced to 300W, the
temperature rise was only about lO"C. Consequently we conducted subsequent
experiments with 300W input power. Figure 6 shows the wafer temperature increases
measured under a variety of conditions.

As anticipated, etching WSix or polysilicon levels with fluorine atoms from SF6
produced isotropic profiles at all three temperatures; this is symptomatic of purely
chemical etching.

Near endpoint, the polysilicon layers etched with helium-assisted heat transfer in
the chlorine plasmas at platen temperatures of 40"C and 80"C barely showed a
detectable chemical (isotropic) component (Figure 7). However the isotropic
component is easily discernible on wafers that have been etched well beyond endpoint
at 80"C (Figure 8). When an entire silicide/polysilicon bilayer is etched in Cl2 or HBr
at these platen temperatures, the profiles always display an overcut rather than an
undercut. That is to say the base of the etched feature projects outward beyond the
mask edge (Fig. 9).

As discussed below, the overcut profiles are formed by a layer of sidewall inhibitor
comprised of the WSix etching byproduct. However, if the wafer temperature is high
enough, Cl2 bilayer etching becomes partially isotropic (roughly over lOO"C- the
estimated temperature for Lam 4420 (CL) runs when the backside helium flow was
inadvertently shut off). By contrast to the Cl2 polysilicon layer etching, all of the HBr
etching profiles were either anisotropic or overcut.

Etching WSi and WSi /Poly-Si Bilayers


x x
The general behavior of WSix and bilayer etching was unexpected. Some previous
workers also show "negative" undercutting (overcut), but the underlying cause has
been ambiguous (for example ref. 6). Figure 9a shows a micrograph of a bilayer
··
etched in a chlorine plasma with a peak wafer surface temperature of 52"C. As is
often customary, the etched wafer was cleaned by immersion in BOE before making
the micrograph. The origin of this profile is immediately obvious upon examining a

SPIE Vol. 7 803 (1992) I 27


micrograph taken without the BOE clean (Figure 9b). Similarly Figure 10 shows an
HBr-etched bilayer which was examined in the SEM without BOE cleaning. Once
again a visible layer of etching byproduct covers the sidewalls and base of the feature.
Micrographs reveal that the product preferentially accumulates on and near the vertical
walls of etched features. BOE dissolves this product layer and removes evidence of
how the profiles evolved. These HBr-WSix plasma product layers are involatile
enough to persist at the relatively high wafer surface temperatures noted without
helium-assisted cooling.
Another observation is that in the early stages of WSix etching in HBr plasmas
with a hard mask, there is sometimes a just-detectable undercut a few hundred
angstroms below the mask-silicide interface. Thus it seems that there is some
chemical WSix etching (that is etching proceeds under the edges of the mask) until the
product layer thickens to a point where halogen atom access to the sidewalls is
completely blocked. This must happen quickly since the undercut was only barely
detectable.
However purely chemical WSix etching in Cl2 was severe on bilayers which were
heavily overetched above a surface temperature of - 80oC (Figure 11). Curiously,
silicide at the hard mask intelface seems to resist attack. The figure shows chemical
etching begins at silicide sidewall edges well below the mask and at the fresh WSix
interface that is formed as the polysilicon is isotropically etched out below the silicide
layer. In all cases, the chemically-etched silicide interface is rough and irregular while
silicide near the mask boundary is not attacked.

CONCLUSIONS
There are su·ong interactions between mask material, overlying layers, etch
products and etchant chemistry during the patteming of stacked gate structure
multilayers. The low volatility products formed by WSix etching with chlorine and
bromine atoms produce protective sidewall films which influence the shape of
underlying polysilicon sidewall profiles. These etch products can produce a "negative"
undercut in which the etched feature extends well beyond the edges of a mask.
When a WSix layer over polysilicon is removed and cleaned of residue before
polysilicon etching, polysilicon sidewall profiles etched by Cl2 and HBr plasmas above
40°C are partially isotropic. If, on the other hand, WSix and polysilicon layers are
etched together in a one-step process under the same conditions, a "negative" sidewall
taper develops owing to polysilicon sidewall masking by the tungsten halide product.
In the absence of a polymeric resist mask or added sidewall inhibitor, fluorine-atom
generating chemistries exhibit near-isotropic etching in the oo -180°C temperature
range.
Temperature excursions and the detailed composition of resist masking polymer
can alter the etching profile in unexpected ways- for example bromine additions to a
chlorine plasma at high wafer temperatures cause more isotropic profiles by
suppressing formation of sidewall precursors generated by resist erosion. Irregular
fractal-like intelfaces are formed during isotropic etching of virgin CVD WSix surfaces

28 I SPIE Vol. 1803 (1992)


in CI2 and HBr plasmas. The WSix near a hard mask silicon nitride or Si02 interface
is resistant to chemical attack.

The uncontrolled wafer temperature rise in some commercial plasma etchers


without enhanced heat transfer can be nearly wo·c in some process recipes. This has
serious implications for profile and critical dimension control. Although helium­
assisted heat transfer is an effective means to reduce the wafer temperature increase,
there was still about a 3o·c differential between wafer and chuck temperatures at
2
higher power (2.3 W/cm , 420W).

Acknowledgments

We gratefully acknowledge helpful discussions with Kristen Luttinger, Becky


Losee and Larry Anderson. Mr. Bradley Bradford encouraged this work and provided
necessary resources. Mr. William Elicson of the Lam Research Corporation provided
some of the facilities for this project.

REFERENCES

1. M. Nakamura, K. Iizuka and H. Yano, Proc. Dry Process Symposium, pps. 58-
63, (Jap. Inst. of Electr. Engr., Tokyo, 1988).
2. Z. H. Walker and E. A. Ogryzlo, J. Appl. Phys., 69, 2635 (1991).
3. E. A. Ogryzlo, D. L. Flamm, D. E. Ibbotson, J. A. Mucha, J. Appl. Phys., 67,
3 1 15 (1990)
4. K. Reinhardt, R. Hatton, J. Quan-Rizzoto, "Plasma Etching of Tungsten Silicide
and Polysilicon Composite Structures in Fluorine, Chlorine and Bromine
Containing Gases," p. 63, Proc. 15th Annual Tegal Plasma Seminar," (Tegal,
Novato, CA, 1989).
5. D. M. Manos and D. L. Flamm, eds, "Plasma Etching, An Introduction," pps.
144-146,321-323, (Academic Press, San Diego, 1989).
6. J. M. Parks and R. J. Jaccodine, J. Electrochem. Soc., 136, 2973 (1989).

SPIE Vol. 1803 (1992) I 29


WSi

Figure 1. Anisotropic polysilicon level stack etch with


HBr:Cl2 = 1:1 and 200% overetching in an unclamped reactor
2
(1.1W/cm , 260 seem, 275mT). The platen temperature was
20°C and wafer surface temperature was -100°C (see text).

WSi
X

Figure 2. Anisotropic polysilicon level stack etch with


�:
HBr:Cl2= 1 and 400% overetching in an unclamped reactor
(1.1 W/em�, 260 seem, 27 5mT). The platen temperature was
20°C and wafer surface temperature was -100°C (see text).

30 I SPIE Vol. 1803 (1992)


Figure 3. Anisotropic polysilicon level stack etch with
HBr:Cl2=2.5: l and 200% overetching in an undamped reactor
( l .l W/cm2, 260 seem, 275mT). The platen temperature was 20°C
and wafer surface temperature was -1 00°C (see text).

. . . . .·. . . . . . . . . . . .
�:··�:.··�:·�:··�:··�:·�:··�:··�:··�:.··�:.·�:·.�:·�:··�:··�:··�:··�:··�:··�:··�

!.�:.�.�..�i�i!i! !l!l!l!l!l!i! i!�i�.!�.i�.�!.


....a
.. ( Mask ·\
. ........... . .. ........ ....
. . . . .·. . . . . . . . . . . . ·. ·. .·.
:·�:·�:·�:·�:�:·�:·�:·�:·�:·�:·�:·�:·�:·�:�:· �:··�:· �:· �:· �:·
·. . . . . . . . . .·.·..··..·..·..··..·..·
·:.:·.::··::.:··.::··:.:··.::··.::··.:::··..:··.:·:.:·:.:::··.:·.:::::::::::::
· :·
:::::::::::::::::::::::::::::::::::::::::

Si-wafer
Figure 4. Schematic of test structures for temperature
controlled etching experiments.

SPIE Vol. 1803 (1992) I 3 1


E
B F

520nm

.-·-
1 405 nm
I.
.I
. .I
\........ _ ·-·-· I
·-..._._,_.
'·---·
I '·
'-·.J
.

I I I I
0 40 80 120 160 sec

Figure 5. Optical emission versus time during Cl 2 plasma


etching of a WSix/polysilicon/oxide/Si multilayer.

100
0 T chuck = 40°C
L-4400
0 T chuck aooc =

E8 T chuck 20, 40, 80 (


= no Helium)

1
-
(.)
0
-
... L4400
G)
-
as

1-
<l L-4420 L-4420
40


,1:1
20

f ---------
0
- - --- 8.-- --
--- ...... ' B
o �----�----
150 200 250 300 350 400 450

R F Power, Watts
Figure 6. Wafer temperature increase (T
wafer- Tc h k )
under various cond itions and process chemistnes. " L - �.f a" 8
points from undamped reactor, others clamped.

32 I SPIE Vol. 1803 (1992)


Figure 7. Polysilicon level of bilayer etched in 52% Cl2 (balance
Ar/He) at 300 mTorr, 1.6 W/cm2, and 290 seem flow rate in a
clamped reactor with He-assisted heat transfer. Chuck temperature
was 80oC and wafer temperature was ::::9
:: 2°C.

Figure 8. Bilayer etched well past polysilicon endpoint in 52% CI2


(balance Ar/He) at 300 mTolT, 2.3 W/cm2, and 290 seem flow rate in
a clamped reactor with He-assisted heat transfer. Chuck temperature
was 40oC and wafer temperature was ::::8
:: 0°C.

SPIE Vol. 1803 (1992) I 33


pr
Figure 9a. W?_ix/po silicon bilayer etched in a 52% Cl2 (48% Ar/He)
plasma at l.6W/cm and 300 mTorr. Chuck temperature was 40°C,
wafer temperature 52°C. Sample was BOE-cleaned before micrograph.

Fi gure 9b. W?_ix./po� silicon bilayer etched in a 52% et2 (48% Ar/He)
plasma at 1.6w /em and 300 mTorr. Chuck temperaturewas 4(rC,
wafer temperature 52"C. Sample was not cleaned before micrograph.

34 I SPIE Vol. 1803 ( 1992)


Figure 10. WSix /polysilicon bilayer etched in 52% HBr (balance
Ar/He), 2.3W/cm2, 300 mTorr and 290 seem total flow. Chuck
temperature was 4o·c. and the wafer surface was z77"C. The
product layer can be removed by a BOE "dip."

Figure 11. WSixf�olysilicon bilayer etched in 52% Cl2 (balance


Ar/He), 1.6W/cm , 300 mToiT and 290 seem total flow without
helium assisted heat transfer. The chuck temperature was so·c
and wafer surface temperature was more than 135"C. The visible
residue can be removed by a BOE "dip."

SPIE Vol. 7 803 (7 992) I 35

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