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Outline: Junction and MOS Electrostatics (III)

The document summarizes a lecture on the metal-oxide-semiconductor (MOS) structure. It describes the MOS structure in thermal equilibrium, with the gate contact shorted to the bulk contact and no applied voltage. This results in a space charge region near the silicon-silicon dioxide interface due to ionized acceptors. The document also explains MOS electrostatics with an applied gate-to-bulk voltage, showing how this changes the potential and expands the depletion region width in the semiconductor.

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0% found this document useful (0 votes)
82 views17 pages

Outline: Junction and MOS Electrostatics (III)

The document summarizes a lecture on the metal-oxide-semiconductor (MOS) structure. It describes the MOS structure in thermal equilibrium, with the gate contact shorted to the bulk contact and no applied voltage. This results in a space charge region near the silicon-silicon dioxide interface due to ionized acceptors. The document also explains MOS electrostatics with an applied gate-to-bulk voltage, showing how this changes the potential and expands the depletion region width in the semiconductor.

Uploaded by

garu1991
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 17

Lecture 6

PN Junction and MOS Electrostatics(III)

MetalOxideSemiconductor Structure

Outline

1. 2. 3. Introduction to MOS structure Electrostatics of MOS in thermal


equilibrium
Electrostatics of MOS with applied bias

Reading Assignment: Howe and Sodini, Chapter 3, Sections 3.73.8


6.012 Spring 2009 Lecture 6 1

1. Introduction
MetalOxideSemiconductor structure

Metal interconnect to gate

Gate oxide ox = 3.9 o

n+ polysilicon gate 0

p-type s = 11.7 o

x
Metal interconnect to bulk

Figure by MIT OpenCourseWare.

MOS at the heart of the electronics revolution: Digital and analog functions
MetalOxideSemiconductor FieldEffect Transistor (MOSFET) is key element of Complementary Metal OxideSemiconductor (CMOS) circuit family

Memory function
Dynamic Random Access Memory (DRAM)
Static Random Access Memory (SRAM) NonVolatile Random Access Memory (NVRAM)

Imaging
Charge Coupled Device (CCD) and CMOS cameras

Displays
Active Matrix Liquid Crystal Displays (AMLCD)

6.012 Spring 2009

Lecture 6

2. MOS Electrostatics in equilibrium

Idealized 1D structure:

Metal: does not tolerate volume charge


charge can only exist at its surface

Oxide: insulator and does not have volume charge


no free carriers, no dopants

Semiconductor: can have volume charge


Space charge region (SCR)

In thermal equilibrium we assume Gate contact is shorted to Bulk contact. (i. e, VGB = 0V)

6.012 Spring 2009

Lecture 6

For most metals on pSi, equilibrium achieved by electrons flowing from metal to semiconductor and holes from semiconductor to metal:

Remember: nopo=ni2
Fewer holes near Si / SiO2 interface ionized acceptors exposed (volume charge)

6.012 Spring 2009

Lecture 6

Space Charge Density

In semiconductor: spacecharge region close Si /SiO2 interface can use depletion approximation In metal: sheet of charge at metal /SiO2 interface Overall charge neutrality

x = t ox ; tox < x < 0; 0 < x < xdo ; x > xdo ;


6.012 Spring 2009

= QG o (x) = 0 o (x) = qN a o (x) = 0


Lecture 6
5

Electric Field
Integrate Poissons equation

x2

Eo (x2 ) Eo (x1 ) =

(x) dx x

At interface between oxide and semiconductor, there is a change in permittivity change in electric field

ox E ox = s Es

Eox s = 3
Es ox

6.012 Spring 2009

Lecture 6

Start integrating from deep inside semiconductor:

x > xdo ; 0 < x <x do ; t ox < x < 0; x < tox ;

Eo (x) = 0 Eo (x) Eo (x do ) = 1 x

s x

qNa dx =
do

qNa

(x x do )

qNa x do + Eo (x) = s Eo (x = 0 ) =

ox

ox

E(x) = 0

6.012 Spring 2009

Lecture 6

Electrostatic Potential
(with = 0 @ no = po = ni)

kT n ln o q ni

kT p ln o q ni

In QNRs, no and po are known can determine

kT Na ln in pQNR: po = Na p = q ni
in n+gate: no = Nd+ g = n+

Builtin potential:

Na kT ln B = g p = n+ + q ni
6.012 Spring 2009 Lecture 6 8

To obtain o(x), integrate Eo(x); start from deep inside semiconductor bulk:

o (x2 ) o (x1 ) = Eo (x ) dx
x1

x2

B = n p
+

x > xdo ; 0 < x < xdo ;

o (x) = p
x

o (x) o (xdo ) = o (x) = p +


AT x = 0

xdo

qN a

(x xdo ) dx

qN a (x xdo )2 2 s qN a (xdo )2 2 s

o (0) = p +

t ox < x < 0; x < t ox ;

2 qN a xdo qN a xdo o (x) = p + + (x ) 2 s ox o (x) = n+

Almost done .
6.012 Spring 2009 Lecture 6 9

Still do not know xdo need one more equation Potential difference across structure has to add up to B:

qN a x 2 do qNa xdo tox + B = VB,o + Vox,o = 2 s ox


Solve quadratic equation:

2 2 B s ox xdo = t ox 1 + 1 2 ox qs Na t ox 2 2C ox B s = 1+ 1 Cox qs N a
where Cox is the capacitance per unit area of oxide

Cox =

ox
tox
Lecture 6 10

Now problem is completely solved!


6.012 Spring 2009

There are also contact potentials


total potential difference from contact to contact is zero!

6.012 Spring 2009

Lecture 6

11

3. MOS with applied bias VGB


Apply voltage to gate with respect to semiconductor:

Electrostatics of MOS structure affected potential difference across entire structure now 0

How is potential difference accommodated?

6.012 Spring 2009

Lecture 6

12

Potential difference shows up across oxide and SCR


in semiconductor

Oxide is an insulator no current anywhere in structure


In SCR, quasiequilibrium situation prevails New balance between drift and diffusion Electrostatics qualitatively identical to thermal equilibrium (but amount of charge redistribution is different) np = ni2

6.012 Spring 2009

Lecture 6

13

Apply VGB>0: potential difference across structure increases need larger charge dipole SCR expands into semiconductor substrate:

Simple way to remember:


with VGB>0, gate attracts electrons and repels holes.

6.012 Spring 2009 Lecture 6 14

Qualitatively, physics unaffected by application of


VGB >0. Use mathematical formulation in thermal
equilibrium, but:

B B + VGB

For example, to determine xd(VBG):

B + VGB = VB (VGB ) + Vox (VGB )


qN a x 2 (VGB ) qN a xd (VGB )tox d = + 2 s ox
2 2C ox (B + VGB ) s xd (VGB ) = 1 1+ Cox s qNa

qN a x 2 (VGB ) d (0) = s = p + 2 s
s gives n & p concentration at the surface
6.012 Spring 2009 Lecture 6 15

What did we learn today?

Summary of Key Concepts

Charge redistribution in MOS structure in thermal equilibrium


SCR in semiconductor
builtin potential across MOS structure.

In most cases, we can use depletion approximation in semiconductor SCR Application of voltage modulates depletion region width in semiconductor
No current flows

6.012 Spring 2009

Lecture 6

16

MIT OpenCourseWare http://ocw.mit.edu

6.012 Microelectronic Devices and Circuits


Spring 2009

For information about citing these materials or our Terms of Use, visit: http://ocw.mit.edu/terms.

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