Resource Power Manager (RPM - BF) : User Guide
Resource Power Manager (RPM - BF) : User Guide
Resource Power Manager (RPM - BF) : User Guide
BF)
User Guide
80-NA157-15 E
April 17, 2014
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1 Introduction...................................................................................................... 7
1.1 Purpose.......................................................................................................................... 7
1.2 Scope............................................................................................................................. 7
1.3 Conventions .................................................................................................................. 7
1.4 References..................................................................................................................... 7
1.5 Technical assistance ...................................................................................................... 7
1.6 Acronyms ...................................................................................................................... 7
Figures
Figure 2-1 RPM example block diagram ..................................................................................................... 8
Figure 2-2 RPM software topology ........................................................................................................... 11
Figure 4-1 Scheduling with preemption..................................................................................................... 23
Figure 5-1 RPM message RAM partition .................................................................................................. 25
Figure 6-1 Interfaces and dependencies ..................................................................................................... 30
Figure 7-1 RBCPR core with master and sensors ...................................................................................... 31
Figure 7-2 Two-point STEP_QUOT calculation during boot.................................................................... 32
Figure 7-3 STEP_QUOT is the number of QUOT units per PMIC step ................................................... 33
Figure 7-4 CPR measurement/adjustment ................................................................................................. 34
Figure 7-5 CPR voltage switching flow..................................................................................................... 35
Tables
Table 1-1 Reference documents and standards ............................................................................................ 7
Table 2-1 Example RPM messaging masters ............................................................................................ 10
Table 9-1 Software event entry .................................................................................................................. 40
2 1.1 Purpose
3 This document describes the Resource Power Manager (RPM) for chipsets that use the RPM.BF
4 subsystem.
5 1.2 Scope
6 This document is intended for customers who must understand details about RPM.BF.
7 1.3 Conventions
8 Function declarations, function names, type declarations, and code samples appear in a different
9 font, e.g., #include.
10 Code variables appear in angle brackets, e.g., <number>.
11 Shading indicates content that has been added or changed in this revision of the document.
12 1.4 References
13 Reference documents are listed in Table 1-1. Reference documents that are no longer applicable
14 are deleted from this table; therefore, reference numbers may not be sequential.
Qualcomm Technologies
Q1 Application Note: Software Glossary for Customers CL93-V3077-1
16
22 1.6 Acronyms
23 For definitions of terms and abbreviations, see [Q1].
1 The RPM processor has a native Advanced High-performance Bus (AHB) Lite interface and
2 built-in ETM/ITM and DAP support. The processor target frequency is 100 MHz. The Cortex-M3
3 supports a native SWFI instruction, which allows the processor to turn off its own clock when the
4 clock is not needed.
5 The Cortex-M3 processor uses a Harvard architecture, enabling simultaneous instruction fetch
6 with data load/store. It supports thumb2, single-cycle 32-bit multiply, and hardware divide.
7 2.1.2 AHB
8 The RPM AHB is synchronous to the RPM processor. It instantiates an aPU, which is configured
9 to protect the code RAM and mPU. The code RAM and mPU are configured to protect different
10 predecoded address space within the RPM. The RPM AHB has Cortex-M3 as the default master
11 for the bus. The RPM AHB allows byte, half-word, and word accesses for the code and data/log
12 RAM. The RPM AHB allows only word accesses for CSR registers.
17 2.1.8 Timers
18 The RPM instantiates the QTimer with two frames, one for the kernel and one for the user. The
19 QTimer keeps track of real time in every power mode.
20 The RPM also has a WDOG timer running on the SLEEP clock, with a configurable bark and bite
21 expiration.
22 2.1.9 CSR
23 The RPM Control/Status Register (CSR) provides IPC and GPO registers to generate IPC
24 interrupts and general-purpose pulses respectively. The RPM CSR provides a WFI_CONFIG
25 register to generate requests to turn off the RPM bus clocks and CHIP_SLEEP_EN, also known
26 as SW_DONE, to signal the MSM™ Power Manager (MPM) that the MSM is ready for sleep.
27 WDOG timer software interface registers, test bus configuration registers, and other
28 miscellaneous use registers are supported.
RPM
RPM HANDLER
NPA
SLEEP
WDOG SPMI
DRIVERS
5 2.2.1 Kernel
6 The kernel for the RPM supports:
7 Interrupts
8 Intlock, priorities, and configuration
9 Busy waits
10 Timers
11 SWFI
12 Reduced code size
13 The kernel is implemented using DALSYS to the metal, providing the RPM with a lightweight
14 kernel and allowing for easier driver porting.
5 2.2.3 Drivers
6 Drivers for each resource supported by the RPM register with the RPM handler to request
7 notification when requests are received for the resource that the driver controls. Upon receiving
8 this notification, the drivers perform arbitration that must be performed between the new request
9 and previous requests from other masters. Based on the arbitration results, the driver determines
10 how to modify the hardware resource.
11 2.2.3.1 NPA
12 A driver may use the Node Power Architecture (NPA) to represent resources controlled by the
13 driver. NPA is a generic framework that allows nodes to represent resources. Each node has
14 clients and is responsible for aggregating workload requirements on their resources while
15 optimizing power usage. The nodes make up a distributed graph, allowing one node to be a client
16 of another node.
2 See the appropriate software user manual or build and integration documentation for detailed
3 instructions of building the RPM subsystem. Additional information may also be found in the
4 software release notes.
5 NOTE: To build the RPM, install ARMCT 5.01 build 94 on your machine.
2 4.1 Task
3 An RPM task is an instance of the class Task. The class Task is defined in rpm_task.h and
4 rpm_task.cpp and has the following interface:
5 Get task name:
6
25 Get the time the task should start by in order to finish on time:
26
29 Set the time the task should start by in order to finish on time:
30
9 There are two tasks created for each master: one of RPMFWRequestHandler which handles
10 resource requests from the master; and one of RPMFWSetChanger which handles set transitions
11 when the master enters or exits sleep.
12 The task priority is inherited from its master: MPSS has the highest priority, APPS has the
13 intermediate, and LPASS has the lowest priority.
14 4.2 Dispatcher
15 A dispatcher is an object embedded in a task. The dispatcher executes the batches of work
16 associated with the task. The class RPMFWDispatcher is defined in DalRPMFWDispatcher.h and
17 DalRPMFWDispatcher.cpp, which has the following interface:
18 Set up a new batch of work to be executed:
19
27 Perform the dispatching until all tasks are done, run out of time, or be preempted:
28
1 4.3 Scheduler
2 The scheduler is the static instance of the class Sched which implements cooperative multiple
3 tasking. The class Sched is defined in rpm_sched.h and rpm_sched.cpp.
4 The scheduler has three private members:
5 Immediate task list – Tasks with immediate work is kept in this binary heap.
6
7 TaskHeap immediateQ_;
8
9 Scheduled task list – Tasks with scheduled work is added into this sorted list.
10
11 TaskList scheduledQ_;
12
13 Preemption flag – The dispatcher checks this flag periodically to see if it should stop current
14 work prematurely and yield the processor for higher priority task.
15
23 Add a new task to be scheduled, causing the task be added to the immediate or scheduled list
24 and the preemption flag be updated as needed:
25
29 Run the next outstanding task, returning only when there is no immediate work to do:
30
31 void run();
32
A’s
estimated
work B’s estimated work D’s estimated work
time
A’s
estimated
work B’s estimated work D’s estimated work
time
deadline ‘C’
9
1 3. Task C is inserted; based on the deadline, task C now conflicts with task D in the queue, so
2 the execution time for task C is pushed out.
A’s
estimated
work B’s estimated work D’s estimated work
4 Now, task A conflicts with task B, so the execution time for task B is pushed out.
C’s estimated work
A’s
estimated
work
B’s estimated
work
D’s estimated work
1 4. Task D’s original schedule remains unchanged. The rest of the schedule needed
2 modifications. This is called stack up when the problem occurs, and the resolution is called
3 schedule fix up.
A’s
estimated
work
B’s estimated
work
D’s estimated work
WCDMA
GPS
12
1 2. Once the RPM detects a sleep transition on a master, it checks to see if there is an unsent
2 message in message RAM.
WCDMA
GPS
5 3. If there is an unsent message, it schedules the application of that request just before the
6 wake-up of that master.
WCDMA
GPS
1 4. At wake-up, the active set is updated. This allows the active set to be changed ahead of time
2 and to skip double-state changes upon wake-ups.
WCDMA
GPS
28 Therefore, a request to the microvolts key (“uv”) of a regulator might be laid out in memory, e.g.,
29 shown byte-by-byte:
30
31 75 76 00 00 | 04 00 00 00 | e0 c8 10 00
32
33 The pipe symbol (|) separates the fields for visual effect. The first field is the little-endian
34 rendering of 0x7675, which is the transliteration of “uv” as explained above. The second field
35 indicates that the request is a 4-byte data buffer. The final field is the 4-byte data buffer
36 containing a little-endian rendering of the value 1,100,000 µV (or 1.1 V).
22 The magic number 12 above is a hint about how much data will be placed in the stream. This
23 example case uses 12; if you know in advance what your requests will look like, use the
24 following rules to pick a guideline number:
25 8 bytes of overhead per call to kvp_put(), plus however many bytes of data you are “putting,”
26 rounded up to a 4-byte boundary on each put()
27 0 is always an acceptable hint; the kvp object always reallocates a larger buffer as required
28 Next, put the KVP into the buffer:
29
30 unsigned nCXORequirement = 1;
31 unsigned units_Enab = 0x62616e45; // = "Enab" -- the units for CXO
32 kvp_put(cxo_request, units_Enab, sizeof(nCXORequirement),
33 &nCXORequirement);
34
35 Every time you pass a kvp object to an RPM function call, its contents are “consumed.” To reuse
36 the kvp object later on, make sure to take the following cleanup actions:
37 To reuse the buffer to resend the exact same data, call kvp_reset(<your object>).
38 To reuse the buffer to send /different/ data, call kvp_clear(<your object>). Do not forget to
39 use kvp_put() to add new data before sending.
40 Of course, if there is no further required use of the buffer, kvp_destroy(<your object>) can be
41 used to clean it up entirely.
10 6.1.3 Railway
11 Manages the Vdd_Mx, Vdd_Cx, and Vdd_Gfx rails and their dependencies
12 Vdd_Mx must be greater than or equal to Vdd_Cx and Vdd_Gfx at all times
13 Vdd_Mx must never be more than 370 mV higher than any logical rail
14 Provides notifications to registered clients when one of the ‘managed’ rails changes voltage
15 Provides notification to the sleep module regarding whether it is possible to go into Vdd
16 minimization based on the aggregated votes on Vdd_Cx and Vdd_Mx
17 Allows the Core Power Reduction (CPR) driver to override the default corner values with the
18 dynamic values that are recommended by the CPR (Vdd_Cx and Vdd_Gfx)
19 Provides NPA nodes to allow the clock driver to vote on voltages for Vdd_Cx and Vdd_Gfx
20 Allows internal RPM clients to make nonsuppressible requests for voltages on any of the
21 managed rails; these nonsuppressible requests influence whether Vdd minimization can occur
22 6.1.4 SVS
23 Tracks the Vdd_Cx voltage and votes on the RPM CPU clock to be maximum speed that is
24 available at the current Vdd_Cx voltage
25 Can also vote to raise Vdd_Cx in order to boost the CPU frequency should the current
26 scheduler workload make that the sensible thing to do
11 6.1.8 Sleep
12 Sleep code is executed whenever the RPM is idle. The sleep code will put the RPM into halt/Vdd
13 minimization/XO shutdown depending on a number of factors:
14 How long it expects the RPM to be idle
15 The state of the masters; any master being active prevents XO shutdown and Vdd
16 minimization
17 Depending on what railway votes for the sleep target of various rails, Vdd minimization may
18 or may not be possible
rbif rbif_csr
msm bus msm bus
xo IF irq_ctl
hispeed_clk
clk mux
CSRs
action
cgc rbif_decision
timer
loop_en
step_up
step_dn
rbif_clk
target
busy
gcnt
refclk cpr_sense_chain
cpr_master_v2
sys_cpr_sense
snext
sprev snext
sprev
snext
sprev
sys_cpr_sense
sys_cpr_sense sys_cpr_sense
snext sprev snext sprev
cpr_sense_chain
cpr_master_sense_chain
12
2-point
STEP_QUOT
calculation
Adjust VDD
Secondary Boot
Loader
SBL1
Continue
Boot Sequence
10
STEP_QUOT
is the slope
1.05 V
@ 12.5 mV each
8 PMIC steps
Vdd
0.95 V
quot1 quot2
Quot
4 Figure 7-3 STEP_QUOT is the number of QUOT units per PMIC step
5 Division by 8 is used because the two quotients were measured at Vdd points that are eight PMIC
6 steps apart. Each PMIC step is 12.5 mV; quot_1 was measured at 1.05 V and quot_2 at 0.95 V.
7 The STEP_QUOT shows how many QUOT units correspond to one PMIC step.
8 quot1 – quot2 = delta_quot
9 delta_quot / 8 = STEP_QUOT
Receive IRQ
Run Interrupt Service Routine
Clear interrupt
Turbo
Mode
Nominal
Power ON Boot Flow
Mode
SVS
Mode
9 When there is a requirement to switch the core voltage for a mode change, RBCPR callbacks are
10 called before and after the voltage to:
11 Disable the RBCPR block and interrupts
12 Set new Vdd through the software (not RBCPR)
13 Perform two-point STEP_QUOT calculation
14 Configure RBCPR with the new GCNT/TARG pairs
15 Re-enable the block and interrupts
15 Enable CPR
16
1 Example
2
7 do rpm_dump.cmm \\location\to\put\logs
12 do rpm_load_dump.cmm \\location\of\logs
18 do rpm_restore_core.cmm
19 NOTE: This script requires that memory dumps and symbols are loaded before it can be used.
24 do rpm_parse_faults.cmm
25 NOTE: This script requires that memory dumps and symbols are loaded before it can be used.
6 do rpm_m3_unstack.cmms
7
8 Since the core dump generally occurs at the top of the fault handler, running this script
9 immediately after rpm_restore_core.cmm will usually place you at the faulting instruction.
20 This places the RPM external log and the NPA log, which only contains dump information, into
21 the log directory. The RPM external log requires use of a parsing tool to interpret. To run the
22 ROM external log, run the following command from the log directory:
23
27 Additional switches are –r, which print raw (hex sclk value) timestamps.
2 Software events are used to replace RPM log events in RPM.AF. Table 9-1 lists how to add the
3 software event entry.
8 if 'USES_QDSS_SWE' in env:
9 QDSS_IMG = ['QDSS_EN_IMG']
10 events = [['RPM_BOOT_STARTED=192','rpm boot started'],
11 ['RPM_BOOT_FINISHED','rpm boot finished'],
12 ['RPM_BRINGUP_REQ','rpm_bringup_req: (master %d) (core %d)'],
13 ['RPM_BRINGUP_ACK','rpm_bringup_ack: (master %d) (core %d)'],
14 ['RPM_SHUTDOWN_REQ','rpm_shutdown_req: (master %d) (core %d)'],
15 ['RPM_SHUTDOWN_ACK','rpm_shutdown_ack: (master %d) (core %d)'],
16 ['RPM_TRANSITION_QUEUED','rpm_transition_queued: (master %d) (status
17 %d) (deadline: %d)'],
18 ['RPM_MASTER_SET_TRANSITION','rpm_master_set_transition: (master %d)
19 (fromSet %d) (toSet: %d)'],
20 ['RPM_MASTER_SET_TRANSITION_COMPLETE','rpm_set_transition_complete:
21 (master %d)'],
22 ['RPM_LAST=319','rpm last placeholder'],
23 ]
24 env.AddSWEInfo(QDSS_IMG, events)
25
30 #include "swevent.h"
31 ...
32 SWEVENT(RPM_MASTER_SET_TRANSITION_COMPLETE, master_id);
10 class RPMTransitionComplete:
11 __metaclass__ = Parser
12 id = 0xC8
13 def parse(self, data):
14 return 'rpm_master_set_transition_complete (master: %s)' %
15 get_master_name(data[0])
16
31 This sequence invokes three RPM requests and then waits for all three to complete. It is robust to
32 the 0 return cases and guarantees that all of the requests have completed, regardless of set request
33 or redundance.
1 This covers all four interesting combinations of sleep success and next active set usage:
2 1. If there was no next active set request, the last ID is 0; regardless of whether the WFI was
3 successful, we return immediately.
4 If the WFI was not successful, the RPM continues acknowledging the sleep set requests.
5 These acks are processed concurrently with the reason for wakeup so that when sleep
6 does occur next, we should have already reset the RPM status (and, with luck, the sleep
7 set will already be in sync for the next sleep).
8 If the WFI was successful, the acks for all sleep messages will already have been
9 received; the SMD ISR runs once after wakeup to clear out the SMD FIFO. These acks
10 could potentially be processed from sleep context if you save the last sleep msg_id and
11 call churn_queue with the most recent (sleep OR next_active_set) ID. However, if it
12 blocks in sleep context to do this, it can delay processing on whatever wakeup interrupt
13 was received and pass up possible (or, on the Hexagon™, likely) parallelism in
14 processing the wakeup interrupt/sleep acks at the same time.
15 2. If there was a next active set message and the WFI failed:
16 Setting SIG_RI instructs the RPM to process the next active set requests now, rather than
17 waiting for a processor sleep event. (Normally, NAS requests are not touched by the
18 RPM until the master processor goes to sleep.)
19 rpm_churn_queue runs a polling loop waiting for RPM acknowledgement of all next
20 active set requests.
21 3. If there was a next active set message and the WFI succeeded:
22 Setting SIG_RI has no effect on the RPM (all of the outstanding NAS requests will have
23 been handled at the time of the sleep handshake).
24 rpm_churn_queue clears the SMD FIFO of all the existing next active set messages.