COMPUTER ARCHITECTURE & ORGANIZATION functional parts in response to

instructions.
LESSON 1 - CHAPTER 1 – BASIC CONCEPTS AND
COMPUTER EVOLUTION
STRUCTURE
COMPUTER ARCHITECTURE/COMPUTER
ORGANIZATION

IBM SYSTEM/370 ARCHITECTURE

• Introduced in 1970
• Included a number of models.
• Could upgrade to a more expensive, faster model
without having to abandon the original software. FOUR MAIN STRUCTURAL COMPONENTS OF THE
(No need to change OS, upgradable includes COMPUTER
RAM, CPU) 1. CPU – controls the operation of the computer
• New models are introduced with improves and performs its data processing functions.
technology, but retain the same architecture. 2. Main Memory – stores data
• Architecture has survived to this day as the 3. I/O – moves data between the computer and its
architecture of IBM’s mainframe product line. external environment.
STRUCTURE AND FUNCTION 4. System Interconnection- mechanism provides
communication among CPU, main memory, and
• Hierarchical System I/O.
o Set of interrelated subsystems.
Major Structural Components of CPU
• Structure
o The way in which components relate to • Control Unit – controls the operation of
each other. the CPU and hence the computer.
• Function • Arithmetic and Logic Unit (ALU)-
o The operation of individual components performs the computer’s data
as part of the structure processing function.
FUNCTION • Registers- provide storage internal to the
CPU.
1. Data Processing • CPU Interconnection- mechanism that
• Data may take a wide variety of forms provides communication among the
and the range of processing control unit, ALU, and registers.
requirements is broad.
2. Data Storage MULTICORE COMPUTER STRUCTURE
• Short-term
• Long-term • Central Processing Unit (CPU)
3. Data Movement o Fetches and executes instructions.
• Input-output (I/O) – when data are o Consists of ALU, control unit, and
received from or delivered to a device registers.
(peripheral) that is directly connected to o Referred to as processor in a system with
the computer. Ex: Mouse, Keyboard a single processing unit.
• Data Communications – when data are • Core
moved over longer distances, to or from o An individual processing unit on a
a remote device. Ex: LAN processor chip.
4. Control o May be equivalent in functionality to a
• Manages the computer’s resources and CPU on a single-CPU system.
orchestrates the performance of its o Specialized processing units are also
referred to as cores.
 • Processor
o A physical piece of silicon containing one
or more cores.
o A computer component that interprets
and executes instructions.
o Referred to as a multicore processor if it
contains multiple cores.

CACHE MEMORY
• Multiple layers of memory between the
processor and main memory.
• Is smaller and faster than main memory.
• Used to speed up memory access by placing in
the cache data from main memory that is likely
REGISTERS
to be used in the near future.
• A greater performance improvement may be • Memory Buffer Register (MBR)
obtained by using multiple levels of cache, with o Contains a word to be stored in memory
level 1 (L1) closest to the core and additional or sent to the I/O unit
levels (L2, L3, etc.) progressively farther from the o Or used to receive a word from memory
core. or from the I/O unit
• Memory Address Register (MAR)
o Specifies the address in memory of the
word to be written from or read into the
MBR.
• Instruction Register (IR)
o Contains the 8-bit opcode instruction
being executed.
• Instruction Buffer Register (IBR)
o Employed to temporarily hold the right-
hand instruction from a word in meory.
• Program Counter (PC)
o Contains the address of the next
instruction pair to be fetched from
memory.
• Accumulator (AC) and Multiplier Quotient (MQ)
o Employed to temporarily hold operands
and results of ALU operations.

HISTORY OF COMPUTERS
SECOND GENERATION: TRANSISTORS
L1 & L2 - usually inside of the core • Smaller
L3- outside of the core • Cheaper
• Dissipates less heat than a vacuum tube
• Is a solid state device made from silicon
HISTORY OF COMPUTERS • Was invented at Bell Labs in 1947
• It was not until the late 1950’s that fully
FIRST GENERATION: VACUUM TUBES transistorized computers were commercially
available.
• IAS Computer
o John von Neumann
o First publication of the idea was in 1945
for the EDVAC.
o Design began at the Princeton Institute
for Advanced Studies
o Completed in 1952
o Prototype of all subsequent general-
purpose computers.

SECOND GENERATION COMPUTERS

Introduced:
 • More complex arithmetic and logic units and
control units
• The use of high-level programming languages
• Provision of system software which provided the
ability to:
o Load programs
o Move data to peripherals
o Libraries perform common
computations

IBM SYSTEM/360

• Announced in 1964
• Product line was incompatible with older IBM
machines
• Was the success of the decade and cemented
IBM as the overwhelming dominant computer
vendor
• The architecture remains to this day the
architecture of IBM’s mainframe computers
• Was the industry’s first planned family of
computers

HISTORY OF COMPUTERS
THIRD GENERATION: INTEGRATED CIRCUITS

• 1958- the invention of the integrated circuit

• Discrete component
o Single, self-contained transistor
o Manufactured separately, packaged in
their own containers
o IBM System/360 and DEC PDP-8 – the LATER GENERATIONS (4TH 5TH 6TH )
two most important members of the
third generation. • Large Scale Integration (LSI)
• Very Large Scale Integration (VLSI)
• Ultra Large Scale Integration (ULSI)
INTEGRATED CIRCUITS

• Data Storage- Provided by memory cells

• Data Processing- Provided by gates MICROPROCESSORS
• Data Movement- the paths among components • 1971 Intel developed 4004
are used to move data from memory to memory o First chip to contain all of the
and from memory through gates to memory components of a CPU on a single chip
• Control- the paths among components can carry o Birth of microprocessor
control signals • 1972 Intel developed 8008
• A computer consists of gates, memory cells, and o First 8-bit microprocessor
interconnections among these elements • 1974 Intel developed 8080
o First general purpose microprocessor
o Faster, has a richer instruction set, has a
large addressing capability
THE EVOLUTION OF THE INTEL x86 ARCHITECTURE

• Two processor families are the Intel x86 and the

ARM architetures
• Current x86 offerings represent the results of
decades of design effort on complex instruction
set computers (CISCs)
• An alternative approach to processor design is
the reduced instruction set computer (RISC)
• ARM architecture is used in a wide variety of
embedded systems and one of the most
powerful and best-designed RISC-based systems
on the market.
EMBEDDED SYSTEMS

• The use of electronics and software within a

product. Ex: calculator, washing machine,
microwave oven
THE INTERNET OF THINGS (IoT)

• Term refers to the expanding interconnection of

smart devices, ranging from appliances to tiny
sensors.
• Is primarily driven by deeply embedded devices
CLOUD COMPUTING

• “A model for enabling ubiquitous, convenient,

on-demand network access to a shared pool of
configurable computing resources that can be
rapidly provisioned and released with minimal
management effort or service provider
interaction.”
CLOUD NETWORKING

• Refers to the networks and network

management functionality that must be in place
to enable cloud computing
CLOUD STORAGE

• Subset of cloud computing

• Consists of database storage and database
applications hosted remotely on cloud servers
LESSON 2 – CHAPTER 3 – A TOP-VIEW OF COMPUTER
FUNCTION AND INTERCONNECTION

COMPUTER COMPONENTS

• Contemporary computer designs are based on

concepts developed by John von Neumann at
the Institute for Advanced Studies, Princeton
• Referred to as the von Neumann architecture
and is based on three key concepts:
▪ Data and instructions are stored in a
single read-write memory
▪ The contents of this memory are
addressable by location, without
regard to the type of data contained
there
▪ Execution occurs in a sequential
fashion (unless explicitly modified)
from one instruction to the next
• Hardwired Program
▪ The result of the process of
connecting the various components
in the desired configuration
HARDWARE AND SOFTWARE APPROACHES
Software

• A sequence of codes or instructions

• Part of the hardware interprets each instruction
and generates control signals
• Provide a new sequence of codes for each new
program instead of rewiring the hardware
Major components:
• CPU
o Instruction interpreter
o Module of general-purpose arithmetic
and logic functions
• I/O Components
o Input module
▪ Contains basic components for
accepting data and instructions
and converting them into an
internal form of signals usable
by the system
o Output module
▪ Means of reporting results

FETCH CYCLE

• At the beginning of each instruction cycle the

processor fetches an instruction from memory
• The program counter (PC) holds the address of
the instruction to be fetched next
• The processor incrrements the PC aftetr each
instruction fetch so that it will fetch the next
instruction in sequence
• The fetched instruction is loaded into the
instruction register (IR)
• The processor interprets the instruction and
performs the required action
ACTION CATEGORIES

CLASSES OF INTERRUPTS
Program

• Generated by some condition that occurs as a

result of an instruction execution, such as
arithmetic overflow, division by zero, attempt to
execute an illegal machine instruction, or
reference outside a user’s allowed memory
space.
Timer
• Generated by a timer within the processor. This
Program Counter (PC) = Address of instruction allows the operating system to perform certain
Instruction Register (IR) = Instruction being executed functions on a regular basis.
I/O
Accumulator (AC) = Temporary storage • Generated by an I/O controller, to signal normal
completion of an operation, request service from
the processor, or to signal a variety of error
0001 = Load AC from Memory conditions.
Hardware failure
0010 = Store AC to Memory • Generated by a failure such as power failure or
0101 = Add to AC from Memory memory parity error.
 THE INTERCONNECTIN STRUCTURE MUST SUPPORT THE
FOLLOWING TYPES OF TRANSFERS:

BUS INTERCONNECTION
• A communication pathway connecting two or
more devices
• System Bus
o A bus that connects major computer
components (processor, memory, I/O)
DATA BUS

• Data lines that provide a path for moving data

among system modules
• May consist of 32, 64, 128, or more separate lines
• The number of lines is referred to as the width of
the data bus
• The number of lines determines how many bits
can be transferred at a time
• The width of the data bus is a key factor in
determining overall system performance
ADDRESS BUS

• Used to designate the source or destination of

the data on the data bus
• Width determines the maximum possible
memory capacity of the system
• Also used to address I/O ports
CONTROL BUS

• Used to control the access and the use of the

data and address lines
• Because the data and address lines are shared by
all components there must be a means of
controlling their use
• Command signals specify operations to be
performed

I/O FUNCTION
• Peripheral devices Ex: mouse, keyboard
• I/O module can exchange data directly with the POINT-TO-POINT INTERCONNECT
processor. • is a computer architecture in which two or more
• Processor can red data from or write t an I/O computing devices are connected directly to
module
 each other, rather than through a shared bus or
network.

QUICK PATH INTERCONNECT (QPI) QPI ROUTING AND PROTOCOL LAYERS

• Introduced in 2008 Routing Layer

• Multiple direct connections • Used to determine the course that a packet will
• Layered protocol architecture traverse across the available system
• Packetized data transfer interconnects.
• Defined by firmware and describe the possible
paths that a packet can follow
Protocol Layer
• Packet is defined as the unit of transfer
• One key function performed at this level is a
cache coherency protocol which deals with
making sure that main memory values held in
multiple caches are consistent
• A typical data packet payload is a block of data
being sent to or from a cache
PERIPHERAL COMPONENT INTERCONNECT (PCI)
• A popular high bandwidth, processor
independent bus that can function as a
mezzanine or peripheral bus
• Delivers better system performance for high
speed I/O subsystems
• PCI Special Interest Group (SIG)
o Created to develop further and maintain
the compatibility of the PCI
specifications
• PCI Express (PCIe)
o Point-to-point interconnect scheme
intended to replace bus-based schemes
such as PCI
o Key requirements is high capacity to
support the needs of higher data rate I/O
devices, such as Gigabit Ethernet
o Another requirement deals with the
need to support time dependent data
streams
 • This address space enables the TL to
read/write configuration registers associated
with I/O devices
3. I/O
• This address space is used for legacy PCI
devices, with reserved address ranges used
to address legacy I/O devices
4. Message
• This address space is for control signals
related to interrupts, error handling, and
power management

PCIe TRANSACTION LAYER (TL)

• Receives read and write requests from the

software above the TL and creates request
packets for transmission to a destination via the
link layer
• Most transactions use a split transaction
technique
o A request packet is sent out by a source
PCIe device which then waits for a
response called a completion packet
• TL messages and some write transactions are
posted transactions (meaning that no response is
expected)
• TL packet format supports 32-bit memory
addressing and extended 64-bit memory
addressing
THE TL SUPPORTS FOUR ADDRESS SPACES
1. Memory
• The memory space includes system main
memory and PCIe I/O devices.
• Certain ranges of memory addresses map
into I/O devices
2. Configuration
LESSON 3 – CHAPTER 12 – INSTRUCTION SETS: INSTRUCTION REPRESENTATION
CHARACTERISTICS AND FUNCTIONS • Each instruction is represented by a
sequence of bits
• The instruction is divided into fields,
MACHINE INSTRUCTION CHARACTERISTICS corresponding to the constituent
elements of the instruction
• The operation of the processor is determined
by the instructions it executes, referred to as
machine instructions or computer
instructions
• The collections of different instructions that
the processor can execute is referred to as INSTRUCTION REPRESENTATION
the processor’s instruction set • Opcodes are represented by abbreviations called
• Each instruction must contain the mnemonics
information required by the processor for • Ex: ADD, SUB, MUL, DIV, LOAD, STOR
execution • Operands are also represented symbolically
ELEMENTS OF A MACHINE INSTRUCTION • Each symbolic opcode has a fixed binary
representation
• Operation Code (opcode)
o Specifies the operation to be performed INSTRUCTION TYPES
o The operation is specified by a binary • Data Processing
code known as operation code or op o Arithmetic instructions provide
code computational capabilities for
• Source Operand Reference processing numeric data
• The operation may involve one or more o Arithmetic logic (ALU) is used to process
source operands, that is, operands that the data
are inputs for the operation • Data Storage
• Result Operand Reference o Movement of data into or out of register
• The operation may produce a result and or memory locations
• Next Instruction Reference • Data Movement
• This tells the processor where to fetch o I/O instructions are needed to transfer
the next instruction after the execution programs and data into memory and the
of this instruction is complete results of computations back out to the
user
• Control
o Test instructions are used to test the
value of a data word or the status of a
computation
o Branch instructions are used to branch to
a different set f instructions depending
on the decision made

Source and result operands can be in one of four areas:

1. Main or Virtual Memory
• As with next instruction references, the
main or virtual memory address must be
supplied
2. I/O device AC = accumulator (temporary storage)
• The instruction must specify the I/O
module and device for the operation.
3. Processor Register
• A processor contains one or more
registers that may be references by
machine instructions.
4. Immediate
• The value of the operand is contained in
a field in the instruction being executed
 o Internation References Alphabet (IRA) –
most commonly used character code.
▪ Referred toin the US as the
American Standard Code for
Information Interchange (ASCII)
o Another code used to encode characters is
the Extended Binary Coded Decimal
Interchange Code (EBCDIC)
▪ EBCDIC is used on IBM mainframes
• Logical Data
o An n-bit unit consisting of n 1-bit items of
data, each item having the value 0 or 1
o Two advantages to bit-oriented view:
▪ Memory can be used most
efficiently for storing an array of
Boolean or binary data items in
which each item can take on only
the values 1 (true) and 0 (false)
(1) Simplify ng hiwa-hiwalay ▪ To manipulate the bits of a data
(2) Since hindi pwede ioverride add temporary storage or (T) item
o If floating-point operations are
implemented in software, we
need to be able to shift
INSTRUCTION SET DESIGN significant bits in some
operations
o To convert from IRA to packed
decimal, we need to extract the
rightmost 4 bits of each byte

TYPES OF OPERANDS

• Numbers
o All machine languages include numeric data
types
o Number stored in a computer are limited:
▪ Limit to the magnitude of numbers
representable on a machine
▪ In the case of floating-point
numbers, a limit to their precision
o Three Types of Numerical data are common
in computers:
▪ Binary integer or binary fixed point
▪ Binary floating point
▪ Decimal
o Packed decimal
▪ Each decimal digit is represented by
a 4-bit code with two digits stored
per byte
▪ To form numbers 4-bit codes are
strung together, usually in multiples
of 8-bits
• Characters
o A common form of data is text or character
strings
o Textual data in character form cannot be
easily stored or transmitted by data
processing and communications systems
because they are designed for binary data
SINGLE-INSTRUCTION-MULTIPLE-DATA (SIMD) DATA TYPES
• Introduced to the x86 architecture as part of the
extensions of the instruction set to optimize
performance of multimedia applications
• These extensions include MMX (multimedia
extensions) and SSES (streaming SIMD extensions)
• Data types:
o Packed byte and packed byte integer
o Packed word and packed word integer
o Packed doubleword and packed doubleword
integer
o Packed quadword and packed quadword
integer
o Packed single-precision floating-point and
packed double-precision floating-point

DATA TRANSFER

ARITHMETIC
▪ Most machines provide the basic arithmetic
operations of add, subtract, multiply, and divide
▪ These are provided for signed integer (fixed-point)
numbers
▪ Often they are also provided for floating-point and
packed decimal numbers
▪ Other possible operations include a variety of single-
operand instructions:
o Absolute – take the absolute value of the
operand
o Negate – negate the operand
o Increment – add 1 to the operand
o Decrement – subtract 1 from the operand
 • Typically these instructions are reserved for the use of
the operating system
• Examples of system control operations:
o A system control instruction may read or
alter a control register
o An instruction to read or modify a storage
protection key
o Access to process control blocks in a
multiprogramming system

TRANSFER OF CONTROL

• Reasons why transfer-ofcontrol operations are

required:
o It is essential to be able to execute each
instruction more than once
o Virtually all programs involve some decision
making
o It helps if there are mechanisms for breaking
the task up into smaller pieces that can be
worked one at a time
• Most common transfer-of-control operations found in
instruction sets:
o Branch -may condition, pwede mabalik
o Skip – skip talaga
o Procedure call

CONVERSION

• Instruction that change the format or operate on the

format of data
• An example is converting from decimal to binary
• An example of a more complex editing instruction is
the EAS/390 Translate (TR) instruction

INPUT/OUTPUT

• Variety of approaches taken:

o Isolated programmed I/O
o Memory-mapped programmed I/O
o DMA
o Use of an I/O processor
• Many implementations provide only a few I/O
instructions, with the specific actions specified by
parameters, codes, or command words

SYSTEM CONTROL

• Instructions that can be executed only while the

processor is in a certain privileged state or is executing
a program in a special privileged area of memory
X86 OPERATION TYPES

• The x86 provides a complex array of operation types

including a number of specialized instructions
• The intent was to provide tools for the compiler writer
to produce optimized machine language translation of
high-level language programs
• Provides four instructions to support procedure
call/return:
o CALL
o ENTER
o LEAVE
o RETURN
• When a new procedure is called the following must be
performed upon entry to the new procedure:
o Push the return point on the stack
o Push the current frame pointer on the stack
o Copy the stack pointer as the new value of
the frame pointer
o Adjust the stack pointer to allocate a frame

X86 SINGLE-INSTRUCTION, MULTIPLE-DATA (SIMD)

INSTRUCTIONS

• 1996 Intel introduced MMX technology into its

Pentium product line
o MMX is a set of highly optimized instructions
for multimedia tasks
• Video and audio data are typically composed of large
arrays of small data types
• Three new data types are defined in MMX
o Packed byte
o Packed word
o Packed doubleword
• Each data type is 64 bits in length and consists of
multiple smaller data fields, each of which holds a
fixed-point integer