ASE2207 - L1 - Jan2024 - Slide
ASE2207 - L1 - Jan2024 - Slide
INSTRUMENTATION SYSTEMS
Jan 2024
Introduction
Lecturers
2
Module Objectives and Learning Outcomes
• Main objectives
– An introductory level to provide the foundation skills for subsequent modules taught in the ASE
programme
– Enables students to appreciate the relevance and interrelationships of the different modules without
being lost in the details.
– Covers wide variety of fundamental topics ranging from number systems, aircraft networks, software
management control and EMI/EMC.
• Learning outcomes
– To comprehend the importance of digital data presentation, measurement uncertainties and data
conversions (ADC and DAC).
– To interpret binary numbers used for representing how information is stored in computers (as binary
patterns). To design combinatorial and sequential circuits, and how they are used in a various
components of a computer system.
– To understand network in aircraft such as ARINC, fibre optics and electronic display.
– To understand the various life cycle and process for software management control in aircraft systems
– To comprehend various electronic digital aircraft systems (e.g. INS, IRS, GPS, FMS, TCAS, FBW) and
electrostatic and electromagnetic considerations.
3
ASE2207 module outline
• 1. Introduction to Aircraft Digital Electronic
• 2. Number Systems & Data Conversion
• 3. Computer Structure: Logic Circuits, Computer Architecture and
Communications
• 4. ARINC Buses: ARINC 429 and 629
• 5. Fibre Optics and Electronic Displays
• 6. Electrostatic Sensitive Devices
• 7. Software Management Control
• 8. Electronic Digital Aircraft Systems
4
Reference books
Wk 2
Forest L2 DV-AP-SR3M Wed 1330-1530 Number Systems Tut 1
15-Jan
Wk 3 Progressive Quiz 1 [5%] Topic 1-2
Forest L3 DV-AP-SR3M Wed 1330-1530 Computer Structure Tut 1/2
22-Jan Self-paced, due by 26-Jan 2359
Wk 4
Forest L4 DV-AP-SR3M Wed 1330-1530 Computer Structure Tut 2
29-Jan
Wk 5 Draft Group Project Presentation Submission
Forest L5 DV-AP-SR3M Wed 1330-1530 ARINC Buses Lab 1
5-Feb 9-Feb 2359
Wk 6 LYK L6 Group Project Progressive Quiz 2 [5%] Topic 3-4
12-Feb 1300-1800 (Wed) DV-AP-SR2B Consultation Self-paced, due by 16-Feb 2359
Wk 7
19-Feb Recess: 19-23 Feb
Wk 8 LYK L7 0900-1200: DV-AP-LT2C SA 1 [30%] 29-Feb: 1300-1400 [Online]
Fibre Optics/ESD
26-Feb 1330-1530: DV-USC-SR1D DV-AP-SR3P [backup venue]
Wk 9 LYK L8 0900-1200: DV-AP-LT2C Electronic Displays /
4-Mar 1330-1530: DV-USC-SR1D EMC
Wk 10 LYK L9 0900-1200: DV-AP-LT2C Software
11-Mar 1330-1530: DV-USC-SR1D Management
Wk 11 LYK L10 0900-1200: DV-AP-LT2C
Aircraft Systems
18-Mar 1330-1530: DV-USC-SR1D
Wk 12
LYK L11 1500-2000: DV-USC-SR2C Aircraft Systems
25-Mar
SA 2 [30%] 3-Apr: 1600-1700 [Online]
Wk 13 0900-1200: DV-AP-LT2C [Team 1-9 presentation]
DV-USC-SR2C [backup venue]
1-Apr 1330-1530: DV-USC-SR2B [Team 10-12 presentation] Group Project Presentation [30%]
6
Assessments
• Progressive Quiz 1 [5%]: Topic 1-2 [Self-paced, due by 26-Jan 2359]
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Lecture 1 Overview
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Importance of digital circuits in the daily life
Entertainment electronics:
• Energy efficiency
• Function integration,
costs
Communication technology:
• Terabit Internet, Backbone Router
• Broadband Access, net, mobile
communication 9
Evolution of Computing Machines
Types of Computer
• Supercomputer
• Personal computer
• Portable computer (laptop,
tablet, smartphone) Supercomputer http://www.top500.org/
• Embedded computer
Picture
Encoding of
Information
into
Signal
Video
Rosetta Stone, take a look at the video below
https://youtu.be/a2ZUHkXmPis 14
Analog Voltage Levels to Digital Signals
• Digital electronics uses circuits that have two states, which are
represented by two different voltage levels called HIGH and
LOW. The voltages represent numbers in the binary system.
• In binary, a single number is called a bit (for binary digit). A bit
can have the value of either a 0 or a 1, depending on if the
voltage is HIGH or LOW.
15
Timing Diagrams
• A timing diagram is used to show the relationship
between two or more digital waveforms.
Period T
1 0 1 0 1 0 1 0
1010 1010
0110 0110
0001 1110
Time
Positive Negative
+3.3V logic logic
VH(max)
HIGH LOW
(binary 1) (binary 0)
VH(min)
Unacceptable Unacceptable
VL(max)
LOW HIGH
0V (binary 0) (binary 1)
VL(min)
17
Types of Information Representation
• Fiber connection speed at 1Gbps refers to 1 Giga bits per second or 125MB per second.
• 1MB = 1 × 1024 KB = (1 × 1024 × 1024) B or 1,048,576 B
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Types of Information Representation
• In the 8-bit word B7..0, the bits are numbered B0 through B7 from right to left.
B is usually used refers to the entire word. Remember, the right-most LSB
always start with B0.
• In the 16-bit word, the lower 8-bits are called the LOWER ORDER BYTE while
the upper 8-bits are called the HIGHER ORDER BYTE.
• For an n-bit word, there are 2n permutations
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Data Representation in Analog vs Digital
Analog Digital
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Data communication system: Analog and Digital
Step 1 Step 2
21
Analog versus Digital Signals
• Digital systems can process, store, and transmit data more efficiently but only
sample at discrete times (x-axis) and store discrete values (y-axis).
• An analog to digital conversion can be modeled as a 2 steps processes:
- 1. Sampling: Using a sample and Hold circuit
- 2. Quantisation: Using an analog to digital converter (ADC)
• Refer to sampling datafile.xlsx to explore the relationship between sampling
frequency, Nyquist rate, resolution and quantisation noise 22
Signal Representation: Analog – Digital
Analog Digital
Allows for a (potentially) infinite number of Signals limit the number of representable
unique signals, but they are harder to signals, but they are easily remembered and
reproduce reproduced
Good for storing data when reproducibility is
Good for storing data that is highly variable
paramount
but does not need to be reproduced exactly
23
Some definitions on digitisation
Signal:
• A measurable, time variation of a physical
quantity. For example: voltage signal, visual or
Analog and digital signals
audible signal.
Step 1: Sampling:
• A process to convert a continuous-time signal
into a discrete-time signal.
• This deals with the regular interval measurement
on the x-axis (time axis)
Sampling
• The most important theorem is the Nyquist
Theorem: fs > 2 × fmax
Step 2: Quantisation:
• Physical signals (e.g. hourly temperature) that we
see everyday are analog and vary continuously. Quantise
• Quantisation is the process of mapping input
values from a large set (often a continuous set)
to output values in a (discrete) smaller set.
• This deals with the y-axis where the amplitude is
divided into equal steps and each sample have to
take on one of the defined step value. 24
Nyquist rate: Why fs > 2 × fmax?
Signal:
Amp. (V) First sample at T = 0.25s
• A sin wave has a period T = 1s, therefore f = 1Hz. If this is
the maximum frequency, we termed this as fmax = 1Hz +1
Signal re-production:
0 Time (sec)
• In this example, when we increase Ts = 0.125s (fs = 8Hz), it 0.5 1 1.5 2
is evident that the waveform better resemble the sin
wave. However, there is a corresponding increase in
memory requirements. -1
Amp. (V) Ts = 0.125s
+1
Nyquist rate:
• While it is hopefully obvious to you that higher sampling
frequency gives a better signal quality, you will be 0 Time (sec)
0.5 1 1.5 2
wondering what is the lower bound of the sampling
frequency before the original signal is lost?
• Consider the earlier example where fs = 2 × fmax, however -1
if the first sample starts at T = 0s, the result is as follows.
Amp. (V) First sample at T = 0s
• When you try to reconstruct the signal using these
samples, you will notice it is simply a straight line that +1
does not resemble the original signal.
• This shows the lower bound for the sampling frequency
0 Time (sec)
cannot be fs ≠ 2 × fmax, but it has to be fs > 2 × fmax. 0.5 1 1.5 2
-1
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Ts = 0.5s
Quantisation: How many bits?
Quantisation:
• In the earlier example, we only have two levels (+1 and
-1) which can be easily represented by a binary 0 and 1
respectively (or vice-versa).
• Referring to sampling datafile.xlsx, the more levels
created will result in better signal quality.
• However, the trade-off again is the data storage
requirements.
• Given digital system works based on binary number
system where it increases exponentially (2n) with n =
number of bits, the number of levels will be 1, 2, 4 ,8, 16,
32, …
• There is no specific bound on the selection of n although
a reasonable levels of representation is required to give
an acceptable quality of the signal. This is usually
determined by the n-bit ADC that we discussed earlier,
which comes in 8, 10, 12, 16 or 24 bits (256 levels, 1024,
4096, 65536, 16777216)
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Quantisation noise QN
First sample at
Amp. (V)
T = 0.5s
+1
Quantisation:
+0.35
• The difference between an input value and its
quantized value (such as round-off error) is referred Time (sec)
0.5 1 1.5 2
to as quantisation error or quantisation noise (QN).
• Consider the example on the right where there are
-1
only 2 quantisation levels (+1 and -1), upon sampling
QN
the first sample at T = 0.5s, the signal was measured
Amp. (V)
to be +0.35V. However, this sample can only take on First sample at T = 0.5s
either of the level, +1 or -1V. The most logical level it +1
should take on is +1V as this gives 0.65V in error
+0.35
(compared to -1 where the error is 1.35V). +0.33
Time (sec)
• When we increase to 4 levels (+1, +0.33, -0.33, -1) or 0.5 1 1.5 2
-0.33
2-bit, this sample should take on the level at 0.33V as
it gives a lower error of 0.02V instead of 0.65V.
-1
• If you give it a deeper thought, you will realise the
worst case error is when the sample value is in- Binary codes
between 2 levels as taking on either level gives the
same amount of error.
• Consider the figure on the right where you try to map
a signal with a voltage range between 0-2V using a 3-
bit binary code, each step represents 0.25V (voltage 28
range / 2n) Voltage range (V)
Digital audio CD example
• Most signals have higher frequency harmonic and noise. For most ADCs, the sampling and filter
cutoff frequencies are selected to be able to reconstruct the desired signal without including
unnecessary harmonics and noise
• An example of a reasonable sampling rate is in a digital audio CD. For audio CDs, sampling is done at
44.1 kHz because audio frequencies above 20 kHz are not detectable by the human ear.
DRAM
6 Transistors SRAM
Its contents can be read and written to Its contents are not easily changed.
at any time. Once changed, contents can be read but
Contents are normally volatile. not written to.
Two major categories – static or dynamic. Contents are non-volatile (retained after
power-off).
31
RAM (Random Access Memory)
• Random Access Memory (RAM) is a type of volatile memory in which all
addresses are accessible in an equal amount of time and can be selected in any
order for both read or write operations.
• Volatile memory, in contrast to non-volatile memory, is computer memory
that requires power to maintain the stored information; it retains its contents
while powered on but when the power is interrupted, the stored data is quickly
lost.
• Data can be written into or read from any selected address within the RAM in
any sequence. Hence, RAM are Read and Writeable (R/W*) memory
Random-
Access
Memory
(RAM)
33
Read Only Memory (ROM)
• The ROM family is all considered non-volatile, because it retains
data with power removed. It includes various members that can be either
permanent memory or erasable.
• ROMs are used to store data that is never (or rarely) changed such as system
initialization files. ROMs are non-volatile, meaning they retain the data when
power is removed, although some ROMs can be reprogrammed using
specialized equipment (e.g. Flash). One example is the PC BIOS.
34
Memory Hierarchy
• Memories are generally organized in levels of
decreasing speed and cost/bit: E.g. (from Wiki and CPZ-Z)
• A Intel i7 processor has 8
– Registers: Very fast access but limited numbers within CPU. Operates at general purpose registers
CPU clock rate (size: 2-128 registers) in 32-bit mode and 16
registers in 64-bit mode
– Cache Memory: Fast access static RAM close to CPU. Typical access time • Cache Memory
8-35nS (size: kB - MB) • L1 Data Cache 64KB
• L1 Instruction Cache
– Main (Primary) memory: Usually dynamic RAM or ROM (for program 64KB
storage). Typical access time 20-100nS. (size: kB – GB) • L2 Cache 512KB
• L3 Cache 4MB
– Secondary Memory: Not always random access but non-volatile. Maybe • Main Memory
based on magnetic or flash technology. Typical access time 5-20mS. (size: • 8GB
MB - TB) • Secondary Memory
• 1TB
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Transistors
• A transistor is a semiconductor device used to amplify and switch
electronic signals and electrical power.
• Today, some transistors are packaged individually, but many more are found embedded
in integrated circuits.
• Fundamental building block of modern electronic devices,
• Inventors John Bardeen, Walter Brattain, and William Shockley jointly awarded the 1956
Nobel Prize in Physics for their achievement.
36
Development of a Transistor & Integrated Circuits
37
The Fabrication of Integrated Circuit
Video Resource
Package into IC Chip
BBC Horizon: 1977-1978 Now the Chips are Down: https://youtu.be/HW5Fvk8FNOQ
Global Foundries: Sand to Silicon: https://youtu.be/UvluuAIiA50 38
Moore’s Law
https://en.wikipedia.org/wiki/Gordon_Moore
Moore’s Law
• Moore's law is the observation that,
over the history of computing hardware,
the number of transistors in a dense
integrated circuit doubles approximately
every two years.
Challenges
• The Intel 4th Geneation Haswell chip
uses a manufacturing process to place
1.4 billion transistors 22 nanometers
apart.
• Size of a transistor limit by the size of a
single atom (e.g. A single phosphorus
atom, by comparison, is just 0.1
http://www.cringely.com/2013/10/15/breaking-moores-law/ nanometers across) 39
Von Neumann Architecture
• John Von Neumann proposed the stored program concept at
Princeton University in 1945. Von Neumann architecture is a design for a
computer with: CPU, Memory and I/O.
• In general, the address and control busses are unidirectional, while the data
bus is bidirectional
Address bus
Control bus
https://en.wikipedia.org/
Data bus
wiki/John_von_Neumann
• Modern day computer design are based on von Neumann’s stored program concept:
1. Both data and program are stored in the same memory (i.e. RAM)
2. Contents of memory are addressable by location, without regard to data type
3. Execution occurs sequentially (unless explicitly modified)
40
Multicore Processor – Intel i7
41
ARM IP (Intellectual Property) core
Straitstimes on Saturday 29-Oct 2016: http://www.straitstimes.com/opinion/the-44-billion-company-youve-never-heard-of
44
Typical Airplane Computer Systems
• Modern airplanes have a vast quantity of
dedicated airplane computer systems
45
A380 Cockpit
46
Advanced Cockpit (A380)
• Control and
Display
System (CDS)
• Head-Up
Display (HUD)
• Onboard
Information
System (OIS)
47
Advanced Cockpit (A380)
48
Advanced Cockpit (A380)
49
Advanced Cockpit (A380)
50
Advanced Cockpit (A380)
51
Advanced Cockpit (A380)
• Within the A380
cockpit, two types of
workstations are
available:
⁻ Two Onboard
Information
Terminals (OITs),
⁻ An Onboard
Maintenance
Terminal (OMT).
• Two OIT keyboards are accessible from the unfolded sliding tables.
• Three OIT laptops are installed in docking stations located at the rear of the
lateral consoles.
52
B787 Cockpit
53
B787 Cockpit
Display configuration
CMCF Access
54
B787 Cockpit
Multi-function keypads
55
A350 XWB Cockpit
56
A350 XWB Cockpit
57
Group discussion
58
Summary
59
Self-test quiz
(b) two
(c) three
(d) ten
60
Self-test quiz
(b) 2.44mV
(c) 7.8µV
(d) 8192 61
Self-test quiz
(c) period
(c) 2 GHz
(d) 20 GHz
62
Self-test quiz
7. What are the key components inside a central processing unit (CPU)?
(a) Registers
(b) PROM
63
Self-test quiz
9. Given a data file size limit of 200 MB per day, what is the maximum sampling
frequency allowed if each sample requires 15 Bytes?
_______________________
10. Given an 8-bit data in positive logic appears as 1101 0001 in binary,
what is the binary pattern for the same data when it is in negative logic?
_______________________
64