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Spectrerf Workshop: Vco Design Using Spectrerf Mmsim 15.1

This document provides instructions for using SpectreRF in Cadence to measure important parameters for voltage controlled oscillator (VCO) design verification. It introduces VCOs and describes a Hartley oscillator design example. It then outlines seven labs that use SpectreRF simulations to measure the oscillator's output frequency, power, phase noise, jitter, frequency pushing, tuning sensitivity and linearity, power dissipation, frequency pulling, stability, and tuning mode. The labs demonstrate how to set up and run various SpectreRF analyses to evaluate critical VCO performance characteristics.

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0% found this document useful (0 votes)
235 views57 pages

Spectrerf Workshop: Vco Design Using Spectrerf Mmsim 15.1

This document provides instructions for using SpectreRF in Cadence to measure important parameters for voltage controlled oscillator (VCO) design verification. It introduces VCOs and describes a Hartley oscillator design example. It then outlines seven labs that use SpectreRF simulations to measure the oscillator's output frequency, power, phase noise, jitter, frequency pushing, tuning sensitivity and linearity, power dissipation, frequency pulling, stability, and tuning mode. The labs demonstrate how to set up and run various SpectreRF analyses to evaluate critical VCO performance characteristics.

Uploaded by

zx D
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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________________________________________________________________________

SpectreRF Workshop
VCO Design Using SpectreRF

MMSIM 15.1

September 2015

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Contents

VCO Design Using SpectreRF ........................................................................................... 3!


Purpose............................................................................................................................ 3!
Audience ......................................................................................................................... 3!
Overview ......................................................................................................................... 3!
Introduction to VCOs.......................................................................................................... 3!
The Design Example: oscHartley ....................................................................................... 4!
Example Measurements Using SpectreRF.......................................................................... 5!
Lab 1: Output Frequency, Output Power, Phase Noise, and Jitter Measurement (Pnoise
with Shooting or Harmonic Balance Engine) ................................................................. 6!
Lab 2: Frequency Pushing (Swept hb) .......................................................................... 23!
Lab 3: Tuning Sensitivity and Linearity (Swept hb) .................................................... 28!
Lab 4: Power Dissipation (hb) ...................................................................................... 35!
Lab 5: Frequency Pulling (Swept hb) ........................................................................... 40!
Lab 6: Stability Analysis (PSS/Pstb) ............................................................................ 46!
Lab 7: Tuning mode Analysis (hb) ............................................................................... 53!
Conclusions ....................................................................................................................... 57!
References ......................................................................................................................... 57!

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VCO Design Using SpectreRF

Purpose
This workshop illustrates how to use SpectreRF in the Virtuoso Analog Design
Environment to measure parameters that are important in the design verification of
voltage controlled oscillators (VCOs).

Note: The procedures described in this workshop have been kept broad and generic. Your
specific design might require procedures that are slightly different from those described here.

Audience
Users of SpectreRF in the Virtuoso Analog Design Environment.

Overview
This workshop provides you with a basic set of common measurements for VCOs.

Introduction to VCOs
Oscillators generate a reference signal at a particular frequency. In voltage controlled
oscillators (VCOs), the frequency of the output varies in proportion to some control
signal. Oscillators are generally used in RF circuits to generate the local oscillator (LO)
signal for mixers. VCOs are used in both receivers and transmitters.

The noise performance of a mixer is strongly affected by noise on the LO signal. The LO
signal is always passed through a limiter, which is generally built into the mixer to make
it less sensitive to small variations in the amplitude of the LO signal. Oscillators (except
the reference oscillators) are embedded in phase-locked loops to control PLLs frequency
and reduce their phase noise. Reference oscillators are generally fixed-frequency crystal
oscillators and have well controlled frequency and noise.

However, oscillators still produce enough variation in the phase of their output to affect
the performance of the transceiver. Thus, it is important to minimize the phase noise
produced by the oscillator.

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The Design Example: oscHartley


The VCO measurements described in this workshop are calculated using SpectreRF in
the Analog Design Environment. The design investigated is the Hartley oscillator shown
below:

The oscHartley VCO uses the basic Hartley topology and is tunable between 720 MHz
and 1.1 GHz. The oscillation frequency (Fo) is determined by the resonant circuit made
up of inductors (L0, L1) and the C1 capacitor. In this particular VCO, the values of L1
and L2 are fixed whereas the value of C1 is variable.

In this example, the resonant circuit's capacitor C1 serves as a varactor diode. As a result,
the varactor diode's junction capacitance, Cvar , is a function of the applied voltage as
shown in the following equation.

Where

■ V = applied junction voltage (V)


■ C j 0 = junction capacitance (F) for V = 0 V

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■ f = barrier potential (V)
■ γ = junction gradient coefficient

The varactor diode for this VCO has the following values

■ C j 0 =8 pF
■ f = 0.75 V
■ γ = 0.4

Because Cvar is inversely proportional to V, and Fo is inversely proportional to Cvar , the


oscillation frequency is proportional to V. In other words, as you increase V, Cvar
decreases and Fo increases.

Example Measurements Using SpectreRF


To achieve optimal circuit performance, you should measure and evaluate several VCO
characteristics or parameters under varying conditions. As an example, one fundamental
measurement is the plot of VCO output frequency versus tuning voltage. An extension of
this parameter is tuning sensitivity (expressed in Hz/V), which is the differential of the
output frequency versus tuning voltage curve. The slope change (as a function of
frequency) is a critical design parameter.

In practice, both of these parameters should be evaluated under different supply (VCC)
conditions because the output frequency may shift with VCC changes. This DC power
sensitivity is called frequency pushing.

The RF power output is a function of both VCC and output frequency. You should
evaluate the RF power output because an output power level that is too low results in
excessive noise and an output power level that is too high creates distortion and
consumes excess DC power. Moreover, the DC power has the chance to translate VCC
noise into oscillator output modulation and noise.

Many of the parameters you must consider for a complete evaluation are not covered
here. In this workshop, you begin examining the flow by bringing up Cadence Design
Framework II environment for a full view of the reference design:

Action P-1: Move into the ./rfworkshop directory.

Action P-2: Run the virtuoso& tool.

Action P-3: In the CIW window, select Tools — Library Manager….

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Lab 1: Output Frequency, Output Power, Phase Noise, and Jitter
Measurement (Pnoise with Shooting or Harmonic Balance Engine)
Usually you cannot specify an analysis period for an autonomous circuit because you do
not know the precise oscillation period in advance. To that end, you can estimate the
oscillation period and have SpectreRF compute the correct period. The output power of a
VCO is typically expressed in dBm.

Phase noise is random phase variation in the output oscillating signal of the VCO. Close
to the carrier, phase noise is mainly composed of flicker noise. The flicker noise
measured in a VCO is generated only by the active devices, such as the transistor and the
tuning diode. The phase noise is measured at distances from 1 KHz off the carrier to
several megahertz (MHz) off the carrier in a 1-Hz bandwidth. Phase noise is the ratio of
the output power divided by the noise power at a specified value and is expressed in
dBc/Hz. Phase noise is the most significant source of noise in oscillators, which makes it
a crucial measurement.

Jitter is the measure of an uncertainty in the output of the oscillator or fluctuations in the
timing of events. In oscillators and frequency synthesizers, jitter affects sensitivity and
selectivity. In RF systems, jitter causes an increase in the channel separation. SpectreRF
also measures another kind of jitter which is referred as PM jitter. PM jitter lets you
specify a certain voltage level( e.g. when crossing a threshold ) and calculates the noise at
the instant the crossing happens.

Starting with MMSIM15.1, a new algorithm DTS has been introduced aiming at
improving the accuracy of oscillators with shooting Pnoise analysis, this algorithm is set
as default. Alongside that, Pnoise and hbnoise also have a UI update, which is available
in IC617.

Action 1-1: In the Library Manager window, open the schematic view of the design
oscHartley in the library RFworkshop.

To start some oscillator circuits, you apply initial conditions or kick start the oscillator.
However, this is not necessary for most oscillator simulation in SpectreRF. Usually
numerical noise can kick start the oscillation. Therefore, no real initial conditions are
necessary in this Hartley design.

Action 1-2: In the Virtuoso Schematic Editing window, select Launch — ADE L.

Action 1-3: (Optional) Choose Session — Load State and in the Virtuoso Analog
Design Environment window, select Cellview in Load State Option and
load the state “Lab1_Pnoise_shooting”, then skip to Action 1-9.

Action 1-4: In the Analog Design Environment window, select Analyses —


Choose….

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Action 1-5: In the Choosing Analyses window, select pss in the Analysis
field of the window. Set Fundamental Frequency to 1GHz based on
estimation. pss analysis will determine tstab1. Click yes to save the initial
transient results. Enable Oscillator. When activated, the Oscillator option
tells the simulator to run an autonomous circuit and to treat the specified
Fundamental Frequency of 1GHz as an estimate. To set the Oscillator
node and reference node, click the select buttons and choose the nodes
indicated in the oscHartley schematic.

From MMSIM12.1 linear ic method will be used to get Osc Initial Condition in GUI by
default. For linear oscillators such as LC tank and crystal oscillators, the linear option can
shorten the tstab phase which may take very long time to finish in simulation. In this
method, both oscillation frequency and amplitude are estimated based on linear analysis
at the DC solution. No impulsive stimulus or initial conditions are needed. Note that tstab
transient is still performed after linear initialization, though it can be significantly
shortened or skipped. Either way, specifying a non-zero tstab parameter can improve
convergence.

If linear ic failed, the simulator will use tstab method. The user can run a transient
analysis, watch how the oscillation built up and stabilized at stable amplitude. Then, the
user can set tstab to this time point. With this good initial condition, harmonic balance
simulation can converge very quickly.

In case you use hb, the Use the probe-based solution method option specifies that only
the onetier or only the twotier method, but not both, are to be used. By default, Spectre
RF runs onetier. With this onetier method, the frequency and voltage spectrum are
solved simultaneously in one single set of nonlinear equations. The initial guess of
onetier method is generated by running transient analysis or by linear IC, or by the
combination of linear IC and transient analysis.

In most cases, simulation converges well using onetier method. For example, this lab
uses onetier method with default tstab approach to get initial condition. If onetier
method has difficulity to converge, the user can use twotier mthod by clicking the box
“probe-based solution”. With this twotier method the nonlinear equations are split into
two sets: the inner set of nonlinear equations solves the spectrum of node voltage
equations; the outer set of nonlinear equations solves the oscillation frequency. To use
twotier method, a voltage probe must be added at a circuit node in the oscillator. This
probe is used to generate the initial guess and control the two level solving process
mentioned above. It is recommended to add this probe at a node on the tank of the
oscillator core. This probe is specified by four parameters:

Pinnode+ and Pinnode- : These two nodes specify where the voltage probe should be
placed. Default setting of Pinnode- is “0” or “gnd”. If differential nodes exist in the
oscillator core, Pinnode+ and Pinnode- should be set to the differential ones.

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Magnitude: The user can provide an estimate value of the voltage probe. This will speed
up the initial guess generation process. If not provided, a default value will be used.

Harmonic index: The harmonic index of the voltage probe. If no divider in the oscillator,
this parameter should always be set to “1”. Default value is “1”

For oscillator with dividers, the user is not recommended to use twotier method.

Action 1-6 Click Apply in the Choosing Analyses form.

The Periodic Steady State Analysis form looks like this:

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Action 1-7: Click pnoise. In the Periodic Noise Analysis form, set Sweeptype to
relative, and Relative Harmonic to 1. Set Start to 1K and Stop to 10M.
Set the Sweep Type field to logarithmic and Number of Steps to 10.
Note that oscillators don’t have noise figure, so the input source is not
available here, this is one of the many meaningful updates we have made
in IC617. Output here is limited to voltage. Select the Positive and
Negative nodes in the oscillator schematic. Set Input Source to none.

Notice the noise types here. Modulated has been pulled out, its functionalities have been
merged to timeaverage, as a result, there are three noise types now comparing with four
before.

1. Timeaverage: calculated USB, LSB, AM, and PM noise.


• USB: denotes the total noise in the frequencies above the fundamental
frequency.
• LSB: denotes the total noise in the frequencies below the fundamental
frequency
• AM: the noise that varies the amplitude.
• PM: the noise that varies the phase. For oscillators, this is the default choice.
It calculates phase noise as well as jitter.
2. Jitter: only calculates PM jitter for both driven circuits and oscillators. To calculate
oscillator FM jitter, choose timeaverage PM noise.
3. Timedomain: The noise analysis performed at the specified time points.

Select the ALL(AM,PM,USB,LSB) button in Contribution Type.

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The phase noise from 1KHz to 10 MHz, relative to the derived oscillation frequency, is
calculated. Because this analysis is for an autonomous circuit, Sweep type defaults to
relative. For driven circuits, Sweep type defaults to absolute.

For a typical bipolar oscillator, the phase noise is specified at 10 kHz off the carrier. The
sweep limits should include the lowest offset frequency of interest, but at the frequencies

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close to the LO the small signal approximation breaks down and the information at those
frequencies is not valid. That depends on the Q of the oscillator and on the presence of
the flicker noise. Another factor could be the bandwidth of the circuit itself. The highest
limit is usually on the order of f(LO)/2 to f(LO) because we are only interested in the
phase noise around the output harmonic. The bandwidth of the circuit is often the factor
here too. More frequency points are always helpful to increase an accuracy of the jitter
computations. You have to trade off the frequency range, number of points per decade
and the maximum sidebands that are used for folding in Pnoise.

In case of hbonise, the default value of Maximum sideband is the number of harms in
hb. Any number higher than the number of harms will be ignored. If you are using
shooting engine, to account for higher harmonics of the oscillator that also contribute
noise, change this value.

Because the up-converted noise appears at the oscillator output, the Vout node is selected
as the Positive Output Node in this analysis. The noise power of each noise contributor
in the circuit is stored, but the “output node of interest” needs to be specified to tell the
Virtuoso® Spectre® RF software where to sum the noise powers.

Action 1-8: Turn on Enabled. Click OK in the Choosing Analyses form.

The Virtuoso Analog Design Environment window looks like this:

Action 1-9: Choose Simulation — Netlist and Run to start the simulation or click the
Netlist and Run icon in the Virtuoso Analog Design Environment
window.

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The output log file displays the following message:

SpectreRF now enhances noise computation to compute the corner offset-frequency for
oscillators. In this case, the corner frequency of 67.6Hz is calculated.

Action 1-10: In the Virtuoso Analog Design Environment window, choose Results —
Direct Plot — Main Form to plot the Vout transient node voltage.

Action 1-11: In the Direct Plot Form window, choose tstab as the Analysis type and
configure the form as follows:

Action 1-12: Select net Vout on the schematic. The Vout transient node voltage appears
in the waveform window.

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Action 1-13: Close the waveform window.

Action 1-14: In the Virtuoso Analog Design Environment window, choose Results —
Direct Plot — Main Form to plot the calculated oscillation frequency,
output power and output noise.

Action 1-15: In the Direct Plot Form window, choose hb as the Analysis type and
configure the form as follows:

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Action 1-16: Select net Vout on the schematic. The results show the oscillation
frequency is around 1.1G, and output power is around 0 dBm.

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Action 1-17: In the Direct Plot form, change the Plotting Mode to Replace and the
Analysis type to hbnoise. Change the Function to Phase Noise, and click
Plot.

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Now you get the following waveforms:

Action 1-18: In the Direct Plot form, set the Plotting Mode to New Subwindow. Select
pnoise. Select AM. Select dBc. Click Plot.

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Action 1-19: In the Direct Plot form, set the Plotting Mode to Append, select PM and
click Plot. Note you can choose SSB or DSB noise.

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The waveform window updates. You may need to change the axis to log.

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Action 1-20: In the Direct Plot form, select pnoise. Change the Plotting Mode to
Append. Select -20dB/dec Line and select Plot.

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The “-20dB/dec” curve could be placed on the phase noise curve at any frequency. The
slope of -20dB/dec “assistant” lets us distinguish the regions of the 1/f^3, 1/f^2 and 1/f
phase noise PSD. If you prefer, quick manual calculations using simple white noise jitter
approximations could be used after the proper region of 1/f^2 slope is determined [3] The
white noise approximation was used in the first release of the jitter measurements. It
required users to select the point for the approximation of the slope. In later releases of
Direct Plot, the integration is numerical and the selection of the point is no longer
required. Therefore, the slope assistant is for informative purposes only now.

Action 1-21: In the Direct Plot form, select pnoise. Select Jcc (Cycle-to-cycle jitter).
Select Plot. The Plotting Mode is Append. Note that the integration
limits have been set to the entire frequency range specified in the pnoise
Choosing Analyses form.

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The waveform window updates with the jitter calculation.

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Action 1-22: Close the waveform window, the Direct Plot form, and Virtuoso Analog
Design Environment window.

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Lab 2: Frequency Pushing (Swept hb)
Frequency pushing is the variation of the VCO output frequency due to a change in the
power supply (VCC). One way to measure frequency pushing is as follows.

1. Set the supply voltage (VCC) at its nominal setting and compute the VCO
frequency for different tune voltages.

2. Increase the supply voltage by a specific amount, and measure the VCO frequency
for different tune voltages as before.

3. Decrease the supply voltage by the same amount, from the nominal value, and
measure the frequency for different tune voltages as before.

At a given tuning voltage, the frequency change due to a 1 volt supply voltage change
yields the frequency pushing. Frequency pushing may be different at different tuning
voltages.

Action 2-1: If it is not already open, open the schematic view of the design oscHartley
in the library RFworkshop.

Action 2-2: From the oscHartley schematic, start the Virtuoso Analog Design
Environment with the Launch — ADE L command.

Action 2-3: (Optional) Choose Session — Load State, select Cellview in Load State
Option and load the state “Lab2_Frequency_Pushing_hb”, and skip to
Action 2-8.

Action 2-4: In the Virtuoso Analog Design Environment window, choose Analyses —
Choose….

Action 2-5: In the Choosing Analyses window, select hb in the Analysis field.

Action 2-6: Set up a swept hb analysis with a Value = 1.115G; errpreset


=conservative; turn on Oscillator; set Oscillator node = /Vout; and
Reference node = /gnd!; enable Sweep; enter fvcc as Variable Name; set
the Sweep Range Start = 4 and Stop = 6; set Sweep Type = Linear; and
Number of Steps = 10.

The hb Analysis window looks like this:

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Action 2-7: Turn on Enabled, and click OK in the Choosing Analyses form.

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The Virtuoso Analog Design Environment window looks like this:

Action 2-8: In your Analog Design Environment, choose Simulation — Netlist and
Run or click the Netlist and Run icon to start the simulation.

Action 2-9: In the Virtuoso Analog Design Environment window, choose Results —
Direct Plot — Main Form.

Action 2-10: In the Direct Plot Form, select hb, select Harmonic Frequency, and
highlight the 1st harmonic in the Harmonic Frequency section. The form
looks like this:

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Action 2-11: Click Plot. The following plot appears.

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Action 2-12: Close the waveform window. Click Cancel on the Direct Plot form. Close
the Virtuoso Analog Design Environment window.

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Lab 3: Tuning Sensitivity and Linearity (Swept hb)
Tuning sensitivity is defined as the frequency change per unit of tuning voltage. Ideally,
tuning sensitivity would be constant but in practice this is generally not the case. In this
lab, you

1. Compute the VCO frequency for different tuning voltages.

2. Plot VCO frequency measurements against tuning voltage. The slope of this
characteristic is the tuning voltage sensitivity which you can calculate at different
tuning voltages.

The tuning sensitivity is expressed in Hz/V.

Action 3-1: If it is not already open, open the schematic view of the design oscHartley
in the library RFworkshop

Action 3-2: From the oscHartley schematic, start the Virtuoso Analog Design
Environment with the Launch — ADE L command.

Action 3-3: (Optional) Choose Session — Load State, select Cellview in Load State
Option and load the state “Lab3_Sensitivity_Linearity_hb”, and skip to
Action 3-8.

Action 3-4: In the Virtuoso Analog Design Environment window, choose Analyses —
Choose….

Action 3-5: In the Choosing Analyses window, select hb in the Analysis field.

Action 3-6: Set up a swept hb analysis with a Value = 1.115G; errpreset =


conservative. Turn on Oscillator, set Oscillator node = /Vout, and
Reference node = /gnd!. Turn on Sweep, enter V_cntl as Variable Name
(this is the tuning voltage), set the Sweep Range Start = 0 and Stop = 6,
set Sweep Type = Linear, and Number of Steps = 6.

The hb Analysis window looks like this:

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Action 3-7: Turn on Enabled, and click OK in the Choosing Analyses form.

The Virtuoso Analog Design Environment window looks like this:

Action 3-8: In the Analog Design Environment window, choose Simulation — Netlist
and Run or click the Netlist and Run icon to start the simulation.

Action 3-9: In the Virtuoso Analog Design Environment window, choose Results —
Direct Plot — Main Form.

Action 3-10: In the Direct Plot Form, select hb, click Harmonic Frequency, and
highlight the 1st harmonic in the Harmonic Frequency section. The form
looks like this:

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Action 3-11: Click Plot. The following plot appears.

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Action 3-12: In the waveform window, choose Tools — Calculator.

Action 3-13: In the Calculator window, highlight Wave, and select the sensitivity curve
in the waveform window. Choose deriv in the special function field.
Change the plotting mode to Replace.

The calculator window looks like this:

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Action 3-14: Click the icon in the calculator window. The following plot
represents the frequency change per unit volt of tuning voltage.

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Action 3-15: Close the waveform window. Click Cancel on the Direct Plot form. Close
the Virtuoso Analog Design Environment window.

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Lab 4: Power Dissipation (hb)
Power dissipation arises from the following sources:

■ Dynamic power dissipation due to switching current from charging and


discharging parasitic capacitance.

■ Dynamic power dissipation due to short-circuit current when both n-channel and
p-channel transistors are momentarily on at the same time.

■ Static power dissipation due to leakage current and subthreshold current.


VCOs suffer from trade-offs between speed, power dissipation, and noise.
Typically, they drain from 1 to milliwatts, mW, of power.

Action 4-1: If it is not already open, open the schematic view of the design oscHartley
in the library Rfworkshop.

Action 4-2: From the oscHartley schematic, start the Virtuoso Analog Design
Environment with the Launch — ADE L command.

Action 4-3: (Optional) Choose Session — Load State, select Cellview in Load State
Option and load the state “Lab4_Power_Dissipation_hb”, and skip to
Action 4-11.

Action 4-4: In the Virtuoso Analog Design Environment window, choose Analyses —
Choose….

Action 4-5: In the Choosing Analyses window, select pss in the Analysis field.

Action 4-6: Set up an hb analysis with a Value = 1.115G; errpreset = conservative;


turn on Oscillator; set Oscillator node = /Vout; and Reference node =
/gnd!.

The hb Analysis window looks like this:

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Action 4-7: Turn on Enabled and click OK in the Choosing Analyses form.
To obtain the power dissipation, before you run the hb analysis, you must
save data at the VCC terminal through the analog design environment.

Action 4-8: In the Virtuoso Analog Design Environment window, choose

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Outputs — To Be Saved — Select On Schematic.

Action 4-9: In the schematic, select the VCC terminals. The Outputs section of the
analog design environment window must display, I1/vcc! with the Save
column set to yes.

Action 4-10: Press Esc with your cursor in the oscHartley schematic window to end
the selections.

The Virtuoso Analog Design Environment window looks like this:

Action 4-11: In your Analog Design Environment, choose Simulation — Netlist and
Run or click the Netlist and Run icon to start the simulation.

Action 4-12: In the Virtuoso Analog Design Environment window, choose Results —
Direct Plot — Main Form.

Action 4-13: In the Direct Plot Form, select hb, select power, and choose dBm as the
Modifier. The form looks like this:

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Action 4-14: Click the positive terminal of the source on the schematic. The following
plot appears.

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The DC value in the above figure corresponds to power dissipation; that is, at freq = 0.0,
power dissipation is equal to -16.77 dB or 13.23 dBm.

Action 4-15: Close the waveform window. Click Cancel on the Direct Plot form. Close
the Virtuoso Analog Design Environment window. Close the oscHartley
schematic.

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Lab 5: Frequency Pulling (Swept hb)
Frequency pulling is a measure of frequency change due to a non-ideal load. You
measure frequency pulling by noting the frequency change caused by a load having a
nominal 12 dB return loss with all possible phases. You should minimize frequency
pulling, especially in cases where power stages are close to the VCO unit and short pulses
might affect the output frequency.

Action 5-1: In the Library Manager window, open the schematic view of the design
freqpull in the library Rfworkshop.

The following figure shows the modified Hartley Oscillator schematic for frequency pull
calculations.

An instance of a PortAdaptor is connected to the load. The PortAdaptor is set to have the
following properties:

■ Frequency = 1.115 G;
■ Phase of Gamma = theta;
■ Mag of Gamma = 0.2512
■ Reference Resistance = 10K (this value must equal the load).

Frequency pulling is the measurement of frequency change caused by a load having a


nominal 12 dB return loss with all possible phases. The value of Mag of Gamma, 0.2512,
is computed from the return loss value, rl, using the following formula:

rl = −20 Log | Γ |
where г is the reflection coefficient with respect to source impedance.

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Action 5-2: From the freqpull schematic, start the Virtuoso Analog Design
Environment with the Launch — ADE L command.

Action 5-3: (Optional) Choose Session — Load State, select Cellview in Load State
Option and load the “Lab5_Frequency_Pulling_hb” state, and skip to
Action 5-8.

Action 5-4: In the Virtuoso Analog Design Environment window, choose Analyses —
Choose….

Action 5-5: In the Choosing Analyses window, select hb in the Analysis field of the
window.

Action 5-6: Set up a swept hb analysis with the theta parameter varying from 0 to 359
degrees. Set Value = 1.115G; errpreset = conservative; turn on
Oscillator; set Oscillator node = /Vout; and Reference node = /gnd!;
enable Sweep; enter theta as Variable Name; set the Sweep Range Start =
0 and Stop = 359; set Sweep Type = linear; and Number of Steps = 10.

The hb Analysis window looks like this:

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Action 5-7: Turn on Enabled, and click OK in the Choosing Analyses form.

The Virtuoso Analog Design Environment window looks like this:

Action 5-8: In the Analog Design Environment window, choose Simulation — Netlist
and Run or click the Netlist and Run icon to start the simulation.

Action 5-9: In the Virtuoso Analog Design Environment window, choose Results —
Direct Plot — Main Form.

Action 5-10: In the Direct Plot Form, select hb, select Harmonic Frequency, and
highlight the 1st harmonic in the Harmonic Frequency section. The form
looks like this:

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Action 5-11: Click Plot. The following plot appears.

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The peak to peak difference in the displayed frequency in the above figure gives the load
pull.

Action 5-12: Close the waveform window. Click Cancel on the Direct Plot form. Close
the Virtuoso Analog Design Environment window.

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Lab 6: Stability Analysis (PSS/Pstb)
Spectre stability analysis (STB) rapidly evaluates the stability of feedback circuits. As is
true for all small signal analyses, the circuit under analysis must first be linearized about
a DC operating point before STB small signal analysis is performed. After the circuit is
linearized about a DC operating point, STB analysis then calculates the loop gain, gain
margin, and phase margin for the circuit using a subset of Nyquist criteria.

It is also important to evaluate the stability of periodic steady state regimes of nonlinear
circuits such as power amplifiers, injection locked oscillators and dividers. STB analysis
cannot predict the behavior of periodic steady state regimes of nonlinear circuits due to
the nonlinear effects these circuits produce.

Periodic stability analysis (PSTB) performs stability analysis for circuits with a
periodically time-varying operating point, which must first be obtained using a PSS
analysis. Small signal PSTB analysis calculates the loop gain, gain margin, and phase
margin for circuits with a periodically time-varying operating point.

Action 6-1: In the Library Manager window, open the schematic view of the design
oschartley_pstb in the library Rfworkshop.

The following figure shows the modified Hartley Oscillator schematic for stability
analysis.

Notice that in the above schematic, a current probe, IPROB0, is inserted in the feedback
loop.

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The stability evaluation of a periodically varying circuit is a two step process.

First, the small stimulus is ignored and the periodic steady-state response of the circuit to
a possibly large periodic stimulus is computed using PSS analysis. As a normal part of
the PSS analysis, the periodically time-varying representation of the circuit is computed
and saved for later use.

Then, the small stimulus is applied to compute the loop gain of the zero sideband with a
probe component. The local stability can be evaluated using gain margin, phase margin,
or a Nyquist plot of the loop gain. To perform PSTB analysis, you must use a probe
instance and specify it with the probe parameter.

Action 6-2: From the oschartley_pstb schematic, start the Virtuoso Analog Design
Environment with the Launch — ADE L command.

Action 6-3: (Optional) Choose Session — Load State, select Cellview in Load State
Option and load the “Lab6_stability_PSTB” state, and skip to Action 6-
10.

Action 6-4: In the Virtuoso Analog Design Environment window, choose Analyses —
Choose….

Action 6-5: In the Choosing Analyses window, select pss in the Analysis field.

Action 6-6: Set up the PSS analysis. Set Engine= Harmonic Balance; Beat
Frequency = 1.115G; Number of Harmonics = 8; errpreset =
conservative; tstab = 150n; turn on Oscillator; set Oscillator node =
/Vout; and Reference node = /gnd!.

The Periodic Steady State Analysis window looks like this:

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Action 6-7: Turn on Enabled, and click pstb in the Choosing Analyses form.

Action 6-8: In the Periodic Stab Analysis form, set the Start to 1G to and Stop to
1.2G, Sweep Type=Linear, Number of Steps=500, and select /IPRB0 as
Probe Instance.

Action 6-9: Turn on Enabled, and click OK to close the Choosing Analyses form.

Your Virtuoso Analog Design Environment window looks like this:

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Action 6-10: In the Analog Design Environment window, choose Simulation — Netlist
and Run or click the Netlist and Run icon to start the simulation.

Action 6-11: In the Virtuoso Analog Design Environment window, choose Results —
Direct Plot — Main Form.

Action 6-12: In the Direct Plot Form, select pstb, and set up the form as follows:

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Action 6-13: Click Plot.

Action 6-14: In the direct plot form, select Phase as Modifier. Click Plot.

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You get the following plot:

For an ideal oscillator, the loop gain at the oscillating frequency, f0, should be 1, so the
dB20 (loopgain) and the Phase (loopgain) should both be zero at f0 and the phase should
change abruptly at f0. In practice, both dB20 (loopgain) and the Phase (loopgain) should
be close to zero.

For this autonomous circuit, the PSS analysis gives f0 = 1.11494G (check the simulation
log file for details). From the above figure, the PSTB analysis gives dB20 (loopgain) = 0
and Phase (loopgain) = 0.

To setup an STB simulation, you can also get the stability information for this circuit.
The results show that a PSTB analysis gives more accurate stability information for
nonlinear circuits than does a STB analysis. For more details, please refer to Application
Note: Stability Analysis of Linear Periodical Time-Varying Circuit Using SpectreRF
PSTB Analysis.

Action 6-15: Close the waveform window. Click Cancel on the Direct Plot form. Close
the Virtuoso Analog Design Environment window.

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Lab 7: Tuning mode Analysis (hb)
In tuning-mode oscillator analysis we treat the frequency of oscillation as a known
performance target, and we find the value of a circuit parameter to achieve the target
frequency. The circuit parameter is an arbitrary netlist variable or an instance parameter.

Action 7-1: In the Library Manager window, open the schematic view of the design
oscHartley in the library RFworkshop.

Action 7-2: In the Virtuoso Schematic Editing window, select Launch — ADE L.

Action 7-3: (Optional) Choose Session — Load State and in the Virtuoso Analog
Design Environment window, select Cellview in Load State Option and
load the state “Lab7_Tuning_hb”, then skip to Action 7-7.

Action 7-4: In the Analog Design Environment window, select Analyses —


Choose….

Action 7-5: In the Choosing Analysis window, select hb in the Analysis


field of the window. Set the targeted frequency as 1.1GHz and let’s find
the control voltage in order to get this frequency. Enable tuning mode
analysis and set V_cntl as the variable. hb analysis looks as follows:

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Action 7-6: Turn on Enabled. Click OK in the Choosing Analyses form.

The Virtuoso Analog Design Environment window looks like this:

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Action 7-7: Choose Simulation — Netlist and Run to start the simulation or click the
Netlist and Run icon in the Virtuoso Analog Design Environment
window.

Action 7-8: After the simulation finishes, in the Virtuoso Analog Design Environment
window, choose Results — Direct Plot — Main Form.

Action 7-9: In the Direct Plot Form window, choose hb, then choose Tuning
Parameter:

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Action 7-10: Click the Add to Outputs button, the result is shown in ADE window:

From the result, we know that the control voltage should be 5.5V in order to get a
1.1GHz output frequency.

Action 7-11: Close all open windows.

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Conclusions
This workshop describes some of the most useful measurements for VCOs. SpectreRF
measurements such as Frequency Pushing, Frequency Pulling, Tuning Sensitivity, Power
Dissipation, and Linearity are discussed. The new hb analysis is introduced and is used
by some of these measurements.

References
[1] Ken Kundert, "Introduction to RF Simulation and Its Application",
www.designers-guide.com

[2] Ken Kundert, "Predicting the Phase Noise and Jitter of PLL-Based Frequency
Synthesizers", www.designers-guide.com

[3] Ken Kundert, Manolis Terrovitis, "Converting Phase-Noise to Jitter", Cadence


report.

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