Lab 1-DLD
Lab 1-DLD
LAB # 01
AND, OR & NOT LOGIC GATES
Objective
A truth table shows relationship between circuits input combinations and their output. It is
necessary to become familiarize with a logic circuit’s truth table before designing or
troubleshooting the circuit.
Logic levels, 0 and 1, have voltage assignments. For TTL circuits, a logic 0 can be anywhere
from 0 V to +0.8 V, and a logic 1 is in the range of +2.0 V to +5.0.
AND Gate
When any input is 0, the output is 0
When all inputs are 1, the output is 1
OR Gate
When any input is 1, the output is 1
When all inputs are 0, the output is 0
NOT Gate
When the input is 0, the output is 1
When the input is 1, the output is 0
Procedure
Design the circuits with the help of layouts provided for each IC and verify the operation
of given gates. Pin no 7 and pin no 14 of each IC is ground and VCC respectively. Apply d-
ifferent inputs and observe the outputs and then compute the truth tables.
Truth Table
a. AND Gate
A B Y= A.B
0 0
0 1
1 0
1 1
b. OR Gate
A B Y= A+B
0 0
0 1
1 0
1 1
c. NOT Gate
A Y= A’
Questions
1. The output of an OR gate is LOW only when _________
2. The output of an AND gate is _____ whenever any input is LOW.
3. If an OR gate input accidentally shorted to VCC, the output of the gate would always
be______ no matter what level the other input level might be.
Assignment
Draw logic diagram and compute its truth table.
1. (AB+CD)