2002 J.ramirez Angulo The Flipped Voltage Follower A Useful Cell For Low-Voltage Low-Power Circuit Design

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The Flipped Voltage Follower: A useful cell for low-voltage low-power circuit

design.
J.Ramirez-Angulo2, R.G.Carvajal’*,A.Torralba , J. Galan’, A. P. Vega-Leal1, and J. Tombs
Dpto. de lngenieria Electronica, Escuela Superior de lngenieros de Sevilla, SPAIN
Klipsch School of Electrical Engineering, New Mexico State University, Las Cruces, NM, USA

ABSTRACT is able to sink a large current from the load, but it


sourcing capability is limited by the biasing current source
In this paper a new basic cell for low-power andor IB. A drawback of this circuit is that current through
low-voltage operation is identified. It is shown that transistor M1 depends on the output current, so that VsGML
different versions of this cell, called “flip voltage is not constant and, hence, for resistive loads, the small
follower”, have been used in the past for different and large signal voltage gains are less than unity.
applications. New circuits using this cell are also
proposed here

I. INTRODUCTION

As downscaling of CMOS processes, analog circuits


have been forced to operate with continuously decreasing
supply voltages. This process has been mainly driven by
the need to reduce digital power supply consumption in
mixed-mode VLSI systems. Several techniques have been
proposed to reduce supply voltage requirements in
analogue and mixed-signals circuits. Among them:
folding, triode-mode and subthreshold operation of MOS
transistors, floating-gate techniques and current-mode
processing [I].

The market of portable electronic equipment has


pushed industry to produce circuit designs with very low Figure 1. a) Common-drain amplifier (voltage follower)
power consumption and with very low voltage supply. In b) Flipped voltage follower (FVF).
order to accomplish both requirements it is necessary to
develop new design techniques that allow circuits with
very low voltage supply to match the speed specifications The circuit in figure l b is another source follower where
with lower power consumption. the current through transistor M1 is held constant,
independent on the output current. Then, neglecting the
In this paper a new cell called “flipped voltage short-channel effect, VsGMlis held constant, and voltage
follower” is proposed to overcome some of these gains are unity. Unlike the conventional voltage follower,
problems. It is shown that different versions of this cell the circuit in figure Ib is able to source a large amount of
have been used in the past for low-voltage and low-power current, but its sinking capability is limited by the biasing
operation. New applications of this cell are also proposed. current source IB. The large sourcing capability is due to
Finally some conclusions are drawn. the low impedance at the output node
(r,=l/(gmM~gmMZroM2)) which is in the order of 20-100R.
Note that M1 provides shunt feedback and so, some
11. THE FLIPPED VOLTAGE FOLLOWER (FVF) detailed analyses will be necessary to assure stability
when using this cell in a complex circuit. Stability
Let’s consider the common drain amplifier in figure la, analysis of this cell will be provided in a future work. The
commonly used as a, voltage buffer. This circuit is also circuit in figure l b will be called the flipped-voltage-
known as a “voltage follower”, as the output voltage follower or FVF.
follows the input voltage except for one VGS,i.e., V, = Vi
+ VSGMI.Concerning the large-signal behavior, this circuit

0-7803-7448-7/02/$17.00 02002 IEEE 111 - 615


111. APPLICATIONS achieve a high slew-rate with very low quiescent current
consumption.
The FVF has been used over the past years as part of
many circuits. In this paper we will describe some of them
and we will introduce new ones focusing out attention in
low-voltage andor low-power applications.

III.1 Current mirrors.


In [2] the FVF was used as the input stage of a very low
voltage current mirror (figure 2a). The input voltage
required for such current mirror is in the order of VDSsaf,
which can be as small as 0,l V, which is much smaller
than the VGS drop required for the conventional low-
voltage current mirror.

In [3] this current mirror was improved to allow very low


input impedance and very high output impedance under
low voltage operation (figure 2b). The differential
amplifier in this figure can be easily realized in a low-
voltage environment, as its inputs are very close to ground
potential. VlNl (mV)

(b)
Vcntin
Figure 3. a) Pseudo differenti.al amplifier b) DC transfer
lout I characteritic of .[dMIand
I i n n ~ lout I i n R .;^\ic:ut
Using two differential pairs of figure 3a in a cross-
Ada
Vin Vin coupled connection, a class AB linear transconductance
vout=vo vo multiplier was proposed in [6], showing high speed ;and
large current efficiency.

Figure 2: a) Very low input impedance current mirror, b)


Low voltage high precision current mirror.

111.2 Differential pairs and amplifiers.


In [4], a low-voltage pseudo-differential pair was
proposed using the FVF. Combining several of these cells,
a low voltage transconductance amplifier for SC circuits
was also proposed. co"orrMods mlrd cirnaay

Figure 4: Proposed low voltage OTA using FVF.


In [5], a new pseudo-differential pair using the FVF
cell (figure 3a) was used as the input stage of a low- A new application of this multiplier as a linear OTA
power two-stage operational amplifier, showing high for gm-C filters is proposed here. Figure 4 shows the
slew-rate and dc gain with low supply voltage. In figure basic OTA cell with the common mode control circuitry
3a, The FVF is formed by M3, M4 and Ib. Figure 3b on the left side. Current sources at the bottom of the
shows currents IDM1and ID^*, versus the differential input circuit (M8 and M8P) are need.ed to subtract the common-
voltage VI-V2. It can be seen that this circuit is a class AB mode current. This is due to the fact that this cell has class
pseudo-differential amplifier and that the quiescent AB behavior and so, the common-mode current depends
current Ib in M3 can be much lower than the maximum on the transconductance programmed in Va-V,.
values of IDM1 and IDM2. Therefore, this circuit can

111 - 616
The transconductor in figure 4 was simulated with the amplifier whose input stage is the circuit of figure 3a. This
design parameters of Table I, as a function of the input OTA is suitable to work as part of an integrator in SC
signal amplitude (VL-V2),for different values of (Va-vb). circuits not requiring a large dc gain. Output currents of
Figure 5 shows the differential output current and the dc the pseudo-differential amplifier are copied to the
transconductance. It can be shown that a wide transconductor output using low-voltage mirroring
transconductance range can be achieved while techniques. Cascode current mirrors M,,, are used at the
maintaining good linearity in the input range. This circuit output nodes V,, and V,. to improve dc gain. For a
can be used in the design of low-voltage low-power gm-C loading capacitance of IpF, the overall quiescent current
filters and it will be discussed in a future publication. consumption of the transconductor can be as low as 11pA
200u (using Ib=lpA) whilst still achieving a 1ov/ps slew rate.
Figure 7 shows the transient simulation of the differential
output voltage and the output current of a SC integrator
using the proposed cell with CL=l pF, Ib=lpA and a
switching clock of 2MHz. It can be seen that the OTA is
able to operate at that frequency with such a low quiescent
current and providing a high output current.

fL-100u -300m -10Bm l00m 300m

DitTemtisl Input Voltage VI-VZ (V)

b)
Figure 5: Differential currents and transconductance for
Va-Vb in the range (180 mV, 320 mV).

-7
.L.
I
11N ,)U
I ,
73." I,#" lSb. ll."
I ,
11- )I*"

time ( P )
Figure 7:Transient simulation of the differential output
voltage and the output current of the SC integrator using
the OTA of figure 6.

Ib, PA Note that the maximum current at the output branch


VDD, V 1 2 can be ten times higher than the quiescent value I b due to
class AB operation. The maximum current is a function of
Table I. Design Parameters for the proposed linear OTA the aspect ratio of the input transistors M1 and M2, the
bias current source Ib and the selected value for Vb. These
values are also selected to keep input transistors in
L saturation region under quiescent conditions and to allow
low-voltage operation. For common-mode output voltage
control, typical SC circuits can be used to control
transistors MCMVNote that a pseudo-differential amplifier
is suitable to be used in SC applications, as input and
output common-mode voltages are fixed by dedicated
circuiry.

111.3 Output Stages


In [7][8], the FVF was used to build a low-voltage
output stage for operational amplifiers with accurate
Figure 6. Proposed low-voltage low-power quiescent current control. The FVF not only provides the
transconductance amplifier for SC circuits. cell with low-voltage operation but also class AB
behavior, and quiescent and minimum current control.
Another new application of this pseudo-differential
pair is proposed here. Figure 6 shows a transconductance

-
111 617
Another new application proposed here, that exploit
low power consumption and class AB behavior of the
FVF cell is the signal buffering of capacitive loads. The
circuit of figure 8 is a new voltage buffer. It uses two FVF
cells,. MIP-M3,and Mln-Mjnthat have a quiescent current
fixed by the value of Ib. The circuit works as follows:
When the input signal Vi increases, nodes A and B also
follow this variation. This way VsGM3‘increases and
VGsM3N decreases. Current through transistor M3Pis now
greater than the current through M3N and this generates a
positive output current that increases output voltage until
it equals the value of Vi. The same reasoning applies
q----~~-~--~
Y
111

-mL

--
-I,&
L
. “MW?

4.1 .1“
time ( s )
111
I

I.1

when the input voltage goes down. Figure 9: Transient simulation of the output voltage and
Q
current of the buflPer of figure 8.

REFERENCES
“Low-voltagehow-power integrated circuits and
systems: low-voltage mixed-signal circuits,” E.
Sanchez-Sinencio, A. G. Andreou, eds. IEEE Press,

-
New York: 1999.
M D. Pardoen, M.G. DekTauwe, “A rail-to-rail CMOS
vi t
t vo inpputloutput power amplifier,” IEEE Journal of solid-
state circuits, vol25, no 2, April 1990,p501-504.
J. Ramirez-Angulo, R. G . Carvajal and A. Torralba,
“Low supply voltage high-performance CMOS current
mirror with low input and output voltage
requirements,” IEEE Transactions on Circuits and
Systems I1 (accepted for publication).
V. Peluso, P. Vancoreland, A.M. Marques, M.S.J.
*
Figure 8: Low-power buffer for capacitive loads
Steyaert and W. Sansen, “A 900-mV low-power Y,A
A/D converter with 77-dB dynamic range,” IEEE J.
Solid-state Circuits, 1998, SC-33, (12), pp. 188’7-
Figure 9 shows the transient simulation of the buffer 1897.
J. Ramirez-Angulo, R. G . Carvajal and A. Torralb.a,
and the current through transistor M3P for a loading “A new class AB differential input stage for
capacitance of lOpF and Ib=lOuA. It can be seen that, as implementation of IOW-voltagehigh slew rate op-amps
this circuit has class AB behavior, current Ib can be much and linear transconductors,” Proc. of the 1EE:E
lower than the maximum current needed at the output and, International Symposium on Circuits and System!;,
this way, low-power operation is achieved. ISCAS’2001, Sydney, (Australia), vol I, pp.671-674.
J. Ramirez-Angulo, R. G. Carvajal, and J. Martinez-
111.4 Other Applications Heredia ,“1.4Vsupply, wide swing, high frequency
CMOS analogue miltiplier with high current
efficiency“, ,Proc. of the International Symposium 011
The FVF has also been used to build new cells to operate Circuits and Systems, ISCAS’2000, Ginebra, (Suiza).
switched current circuits near 1V or below [9]. In this A. Torralba, R. G. Carvajal, J. Ramirez-Angulo, J.
case the topology of the FVF contributes to improve Tombs and J.A. Galan, “Class AB output stages for
accuracy as in this cell all charge injections are signal low voltage CMOS opamps with accurate quiescent
independent. current control by means of dynamic biasing,”
IV. CONCLUSIONS International Conference on Electronics, circuits and
Systems, ICECS’O1, pp 967-970
A. Torralba, R. G. Carvajal, J. Martinez-Heredia and J.
In this paper a cell called “Flipped Voltage Follower” has Ramirez-Angulo, “Class AB output stage for low
been revisited. It has been shown to be a useful cell with voltage CMOS op-amps with accurate quiescent
many applications in low-power, low-voltage analog current control,” IEE Electronic Letters, vol. 36, no
design. Several new cells that exploit its class AB 21,2000, pp. 1753-1754.
behavior in low-power, low-voltage operation have been Saroj Rout and Edward K.F. Lee, “Design of 1 V
also presented. Switched-Current Cells in !Standard CMOS Process,”
2000 International Symposium on Circuits and
Systems (ISCAS 2000), pp. ]:I 417-420.

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