2002 J.ramirez Angulo The Flipped Voltage Follower A Useful Cell For Low-Voltage Low-Power Circuit Design
2002 J.ramirez Angulo The Flipped Voltage Follower A Useful Cell For Low-Voltage Low-Power Circuit Design
2002 J.ramirez Angulo The Flipped Voltage Follower A Useful Cell For Low-Voltage Low-Power Circuit Design
design.
J.Ramirez-Angulo2, R.G.Carvajal’*,A.Torralba , J. Galan’, A. P. Vega-Leal1, and J. Tombs
Dpto. de lngenieria Electronica, Escuela Superior de lngenieros de Sevilla, SPAIN
Klipsch School of Electrical Engineering, New Mexico State University, Las Cruces, NM, USA
I. INTRODUCTION
(b)
Vcntin
Figure 3. a) Pseudo differenti.al amplifier b) DC transfer
lout I characteritic of .[dMIand
I i n n ~ lout I i n R .;^\ic:ut
Using two differential pairs of figure 3a in a cross-
Ada
Vin Vin coupled connection, a class AB linear transconductance
vout=vo vo multiplier was proposed in [6], showing high speed ;and
large current efficiency.
111 - 616
The transconductor in figure 4 was simulated with the amplifier whose input stage is the circuit of figure 3a. This
design parameters of Table I, as a function of the input OTA is suitable to work as part of an integrator in SC
signal amplitude (VL-V2),for different values of (Va-vb). circuits not requiring a large dc gain. Output currents of
Figure 5 shows the differential output current and the dc the pseudo-differential amplifier are copied to the
transconductance. It can be shown that a wide transconductor output using low-voltage mirroring
transconductance range can be achieved while techniques. Cascode current mirrors M,,, are used at the
maintaining good linearity in the input range. This circuit output nodes V,, and V,. to improve dc gain. For a
can be used in the design of low-voltage low-power gm-C loading capacitance of IpF, the overall quiescent current
filters and it will be discussed in a future publication. consumption of the transconductor can be as low as 11pA
200u (using Ib=lpA) whilst still achieving a 1ov/ps slew rate.
Figure 7 shows the transient simulation of the differential
output voltage and the output current of a SC integrator
using the proposed cell with CL=l pF, Ib=lpA and a
switching clock of 2MHz. It can be seen that the OTA is
able to operate at that frequency with such a low quiescent
current and providing a high output current.
b)
Figure 5: Differential currents and transconductance for
Va-Vb in the range (180 mV, 320 mV).
-7
.L.
I
11N ,)U
I ,
73." I,#" lSb. ll."
I ,
11- )I*"
time ( P )
Figure 7:Transient simulation of the differential output
voltage and the output current of the SC integrator using
the OTA of figure 6.
-
111 617
Another new application proposed here, that exploit
low power consumption and class AB behavior of the
FVF cell is the signal buffering of capacitive loads. The
circuit of figure 8 is a new voltage buffer. It uses two FVF
cells,. MIP-M3,and Mln-Mjnthat have a quiescent current
fixed by the value of Ib. The circuit works as follows:
When the input signal Vi increases, nodes A and B also
follow this variation. This way VsGM3‘increases and
VGsM3N decreases. Current through transistor M3Pis now
greater than the current through M3N and this generates a
positive output current that increases output voltage until
it equals the value of Vi. The same reasoning applies
q----~~-~--~
Y
111
-mL
--
-I,&
L
. “MW?
4.1 .1“
time ( s )
111
I
I.1
when the input voltage goes down. Figure 9: Transient simulation of the output voltage and
Q
current of the buflPer of figure 8.
REFERENCES
“Low-voltagehow-power integrated circuits and
systems: low-voltage mixed-signal circuits,” E.
Sanchez-Sinencio, A. G. Andreou, eds. IEEE Press,
-
New York: 1999.
M D. Pardoen, M.G. DekTauwe, “A rail-to-rail CMOS
vi t
t vo inpputloutput power amplifier,” IEEE Journal of solid-
state circuits, vol25, no 2, April 1990,p501-504.
J. Ramirez-Angulo, R. G . Carvajal and A. Torralba,
“Low supply voltage high-performance CMOS current
mirror with low input and output voltage
requirements,” IEEE Transactions on Circuits and
Systems I1 (accepted for publication).
V. Peluso, P. Vancoreland, A.M. Marques, M.S.J.
*
Figure 8: Low-power buffer for capacitive loads
Steyaert and W. Sansen, “A 900-mV low-power Y,A
A/D converter with 77-dB dynamic range,” IEEE J.
Solid-state Circuits, 1998, SC-33, (12), pp. 188’7-
Figure 9 shows the transient simulation of the buffer 1897.
J. Ramirez-Angulo, R. G . Carvajal and A. Torralb.a,
and the current through transistor M3P for a loading “A new class AB differential input stage for
capacitance of lOpF and Ib=lOuA. It can be seen that, as implementation of IOW-voltagehigh slew rate op-amps
this circuit has class AB behavior, current Ib can be much and linear transconductors,” Proc. of the 1EE:E
lower than the maximum current needed at the output and, International Symposium on Circuits and System!;,
this way, low-power operation is achieved. ISCAS’2001, Sydney, (Australia), vol I, pp.671-674.
J. Ramirez-Angulo, R. G. Carvajal, and J. Martinez-
111.4 Other Applications Heredia ,“1.4Vsupply, wide swing, high frequency
CMOS analogue miltiplier with high current
efficiency“, ,Proc. of the International Symposium 011
The FVF has also been used to build new cells to operate Circuits and Systems, ISCAS’2000, Ginebra, (Suiza).
switched current circuits near 1V or below [9]. In this A. Torralba, R. G. Carvajal, J. Ramirez-Angulo, J.
case the topology of the FVF contributes to improve Tombs and J.A. Galan, “Class AB output stages for
accuracy as in this cell all charge injections are signal low voltage CMOS opamps with accurate quiescent
independent. current control by means of dynamic biasing,”
IV. CONCLUSIONS International Conference on Electronics, circuits and
Systems, ICECS’O1, pp 967-970
A. Torralba, R. G. Carvajal, J. Martinez-Heredia and J.
In this paper a cell called “Flipped Voltage Follower” has Ramirez-Angulo, “Class AB output stage for low
been revisited. It has been shown to be a useful cell with voltage CMOS op-amps with accurate quiescent
many applications in low-power, low-voltage analog current control,” IEE Electronic Letters, vol. 36, no
design. Several new cells that exploit its class AB 21,2000, pp. 1753-1754.
behavior in low-power, low-voltage operation have been Saroj Rout and Edward K.F. Lee, “Design of 1 V
also presented. Switched-Current Cells in !Standard CMOS Process,”
2000 International Symposium on Circuits and
Systems (ISCAS 2000), pp. ]:I 417-420.
111 - 618