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Ams Lab3

This document describes a laboratory experiment on analyzing a CMOS inverter using ADE-XL simulation software. The objectives are to find the trip point of the inverter, understand how calculator functions measure parameters, and analyze how performance is affected by process, voltage, and temperature variations. The experiment involves building testbenches to perform DC and transient analyses of an inverter circuit. Calculator functions are used to measure the trip point and parameters like rise/fall times and delay under different operating conditions.

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vuhuybao07102002
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0% found this document useful (0 votes)
34 views

Ams Lab3

This document describes a laboratory experiment on analyzing a CMOS inverter using ADE-XL simulation software. The objectives are to find the trip point of the inverter, understand how calculator functions measure parameters, and analyze how performance is affected by process, voltage, and temperature variations. The experiment involves building testbenches to perform DC and transient analyses of an inverter circuit. Calculator functions are used to measure the trip point and parameters like rise/fall times and delay under different operating conditions.

Uploaded by

vuhuybao07102002
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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LABORATORY 3 – CMOS INVERTER ANALYSIS WITH ADE-XL

LABORATORY 3
CMOS INVERTER ANALYSIS WITH ADE-XL

OBJECTIVES
No. Objectives Requirements
1 Knowing how to setup ADE-XL ▪ Find the trip-point of the inverter with
simulation environment ADE-XL simulation
2 Understand the calculator functions ▪ Using calculator functions to measure
working some parameters of the inverter with
transient analysis

PREPARATION FOR LAB 3


➢ Reading Appendix 1 and Appendix 2 about ADE-XL setting and using Calculator to measure
the performance parameters of design.

LAB 3 INFORMATION
▪ Consider NMOS nch_lvt device, PMOS pch_lvt device and power supply 𝒗𝒅𝒅 = 𝟏. 𝟐𝑽

EXPERIMENT 1

Objective: Build a testbench to measure the trip-point of the inverter. Setup and simulate design with
ADE-XL environment.

Requirements: Simulate with dc analysis with ADE-XL environment.


Instruction: Assemble the circuit as shown in Figure 1 and Figure 2, setting parameters for power
supplies (using vdc source), with 𝐿𝑛 = 𝐿𝑝 = 60𝑛𝑚, 𝐶𝑙𝑜𝑎𝑑 = 10𝑓𝐹, 𝑣𝑑𝑑 = 1.2𝑉

Figure 1. Schematic of INV

Department of Electronics Page | 1


Analog and Mixed Signal IC Design Laboratory
LABORATORY 3 – CMOS INVERTER ANALYSIS WITH ADE-XL

Figure 2. Testbench dc analysis of INV


Check:
▪ Trip point defines the input voltage that the output changes the state (from 0 to 1 / from
1 to 0).
▪ In switching state working, the inverter needs to balance between the rising and falling
edge of the inverter to ensure stability. So, we need to find the P/N ratio size of PMOS
and NMOS (𝑊𝑁 and 𝑊𝑃 ) to get the balanced state (or balance trip point).
▪ Writing a calculator function to measure the trip-point.
▪ Verify the size of NMOS and PMOS (𝑊𝑁 and 𝑊𝑃 ) to get the balance trip-point.

Figure 3. Example waveform finding the balance trip-point


▪ Using the 𝑊𝑁 and 𝑊𝑃 for Experiment 2 and Experiment 3.

Department of Electronics Page | 2


Analog and Mixed Signal IC Design Laboratory
LABORATORY 3 – CMOS INVERTER ANALYSIS WITH ADE-XL

EXPERIMENT 2

Objective: Consider the variation of trip point with the changing of PVT

Requirements: Simulate dc analysis with ADE-XL enviroment.


Instruction: Assemble the circuit as shown in Figure 2, setting parameters for power supplies (using
vdc source), with 𝐿𝑛 = 𝐿𝑝 = 60𝑛𝑚, 𝐶𝑙𝑜𝑎𝑑 = 10𝑓𝐹, 𝑣𝑑𝑑 = 1.2𝑉, 𝑾𝑵 , 𝑾𝑷 in Experiment 1.
Check:
▪ Setup testbench with 9 PVT corners in Table 1 with ADE-XL.
TTNN FFHL FFHH SSLL SSLH FSLL FSLH SFLL SFLH
vdd 1.2 1.26 1.26 1.08 1.08 1.08 1.08 1.08 1.08
Temp 25 -40 125 -40 125 -40 125 -40 125

Table 1. PVT corner definition


▪ Evaluate the variation of trip-point with the vary of process, voltage and temperature.

Figure 4. Example result of trip-point with PVT variation

EXPERIMENT 3

Objective: Using the Calculator function to measure the performance of inverter.

Requirements: Simulate tran analysis with ADE-XL enviroment.


Instruction:
▪ Assemble the circuit as shown in Figure 5, setting parameters for power supplies (using
vpulse source), with 𝐿𝑛 = 𝐿𝑝 = 60𝑛𝑚, 𝐶𝑙𝑜𝑎𝑑 = 10𝑓𝐹, 𝑣𝑑𝑑 = 1.2𝑉 𝑾𝑵 , 𝑾𝑷 in
Experiment 1.
▪ Set the variable for vpulse source parameter (voltage 1, voltage 2, period, rise time, fall
time, pulse width) in Figure 6.

Department of Electronics Page | 3


Analog and Mixed Signal IC Design Laboratory
LABORATORY 3 – CMOS INVERTER ANALYSIS WITH ADE-XL

Figure 5. Testbench tran analysis of INV

Figure 6. Testbench tran analysis of INV


▪ Define the value of variable in the ADE-XL variable setting
1 1
𝐹 = 10𝑘𝐻𝑧, 𝑇𝑑 = 1𝑛𝑠, 𝑇𝑟𝑓 = , 𝑃𝑢𝑙𝑠𝑒_𝑤𝑖𝑑𝑡ℎ = − 𝑇𝑟𝑓
10 ∗ 𝐹 2∗𝐹
Check:
▪ Plot Input, Output and current at VDD pin of inverter as shown in Figure 7 to check the
function of inverter.

Figure 7. Result waveform of inverter simulation with transient analysis

Department of Electronics Page | 4


Analog and Mixed Signal IC Design Laboratory
LABORATORY 3 – CMOS INVERTER ANALYSIS WITH ADE-XL

▪ Create the calculator function to measure rising time, falling time, duty cycle, delay from
input to output, and current of inverter in Table 2 with the guideline in Figure 8.

Figure 8. Guideline to configure the parameters for measurement functions


▪ Setup testbench with 9 PVT corners in Table 1. Explain the result with the PVT variation.

Figure 9. Example result of measurement parameter with transient analysis


▪ Annotate some measurement parameters
Item Detail
T_rise_avg Rising time from low voltage to high voltage (10%-90%) measured by
risetime function
T_fall_avg Falling time from high voltage to low voltage (90%-10%) measured by
falltime function
DT_H Duty cycle of high voltage measuring by delay function
DT_L Duty cycle of low voltage measuring by delay function
Td_R2F Delay from rising input to falling output measured by delay function
Td_F2R Delay from rising input to falling output measured by delay function
T_rise Rising time from low voltage to high voltage (10%-90%) measured by
delay function
T_fall Falling time from high voltage to low voltage (90%-10%) measured by
delay function
I_static_0 Static current with low voltage input
I_static_1 Static current with high voltage input

Department of Electronics Page | 5


Analog and Mixed Signal IC Design Laboratory
LABORATORY 3 – CMOS INVERTER ANALYSIS WITH ADE-XL

I_dynamic The average dynamic current of the inverter

Table 2.Parameter of inverter performance explanation

Department of Electronics Page | 6


Analog and Mixed Signal IC Design Laboratory

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