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Unit Title: Computer Systems Architecture

Unit No: FW03 12

System Bus

Date: August 2016


Computer Systems Architecture FW03 12 The System Bus

Bus Definition
First, what is a bus? Basically, it is a means of getting data from one place to another,
one device to another device, or one device to multiple devices. The bus includes not
only the actual capability to transfer data between devices, but also all appropriate
signalling information to ensure complete movement of the data from point A to point B.
To avoid loss of data, a bus must include a means of controlling the flow of data
between two devices, in order to insure that both devices are ready to send and/or
receive information

Buses are circuits on the motherboard that connect the CPU to other components.
There are many buses on the motherboard. A bus moves instructions and data around
the system. The speed of a bus is measured in megahertz (MHz). The faster the bus, the
faster data is communicated. The speed of the motherboard is defined by the bus
speed.

System Bus
The system bus is a group of parallel wires, each carrying a signal that helps all major
components of a computer to communicate with each other. The system bus works by
combining the functions of the three main buses: namely, the data, address and control
buses. Each of the three buses has its separate characteristics and responsibilities.

The Address Bus

This carries address information from the


processor to main memory or peripherals. It is
uni-directional. This means the address can
only be transmitted in one direction only -from
the CPU to the memory. The address bus
carries the addressing information used to
describe the memory location to which the data is being sent or from which the data is
being retrieved.

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Computer Systems Architecture FW03 12 The System Bus

The address bus is made up of parallel lines, each capable of carrying 1 bit of
information. The number of lines (wires) in the address bus determines the amount of
memory that can be directly addressed as each line carries one bit of the address.

To understand this, consider first an address bus width of 1-bit. There are 2 distinct
values that a single bit can represent (0 or 1). Thus a bus width of 1-bit can identify 2
unique memory addresses/locations).

If we add another address line to make a bus width of 2-bits, we can now access 4
unique memory addresses.

If we continue to add an additional line we double the amount of memory locations that
can be accessed. Three lines can access 8 unique memory locations.

The number of memory locations that can be accessed via the address bus can be
calculated using the formula 2width of address bus

Thus a system with a 32-bit address bus can directly address 4GB of physical memory
space, while one with 36 bits can address 64GB.

The Data Bus

The data bus is used to transfer data to and from the CPU. It is a bi-directional bus that
transfers data in both directions. In other words data can be transferred from memory
to the CPU and also data can be written back into memory from the CPU once any
calculations, etc have been made.

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Computer Systems Architecture FW03 12 The System Bus

Like the Address Bus the width (number of wires) of the Data Bus is very important. It is
directly related to the largest number that the bus can carry. For example an 8-bit bus
can represent 2 to the power of 8 unique values. This equates to the numbers 0 to 255.
A 16-bit bus can carry the values 0 to 65535 and so on. See the description of binary in
the Address Bus explanation earlier in this handout.

Every bus has a clock speed measured in MHz. A fast bus allows data to be transferred
faster, which makes applications run faster.

The Control Bus

The Control Bus connects directly to the Control Unit of the CPU and carries signals that
control the actions of the computer. The Control Bus is a collection of independent
lines which each has a unique role to play.

Read Line – Sends a signal that initiates a


memory read operation (from memory to
the CPU).

Write Line – Sends a signal that initiates a


memory write operation (from the CPU to
memory)

Clock (or Timing) Line - Dictates the pace of the fetch/execute cycle by acting like a
'pulse'. The pulses are generated at a constant rate/frequency that is measured in Hertz
(Hz). Each pulse causes a machine operation to be carried out so therefore the faster
the clock, the more instructions the CPU can execute per second,
Reset Line - Causes the processor to halt the execution of the currently stored program
and resets the CPU to its base state. This causes all internal registers to be cleared and
reboots the machine. For example it can be used to recover from ‘crashes’.
Interrupt Line - tells the processor that an external event has occurred, such as the
transfer of data from an external device, that causes an interruption to the running of a
program. The processor may ignore this type of interrupt.
Non-Masking Interrupt (NMI) – Similar to the Interrupt Line but caused by an event that
the CPU cannot ignore. It is typically used to signal attention for non-recoverable
hardware errors, for example a low power problem.

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Computer Systems Architecture FW03 12 The System Bus

Further Learning
Use the following websites to learn more about the topics we have covered.

• SQA e-learning website for HN Courses.

http://www.sqa.org.uk/e-learning/CompArch02CD/page_03.htm

• BBC learning guides for Computer Architecture.

http://www.bbc.co.uk/education/guides/zthbgk7/revision/9
http://www.bbc.co.uk/education/guides/zsnbr82/revision/11

• What is a Control Bus?

http://www.wisegeek.com/what-is-a-control-bus.htm

• Video giving an overview of system buses.


https://www.youtube.com/watch?v=Nxehq8B5jAA

© City of Glasgow College August 2016 5

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