GITAM

(Deemed to be University)

Microprocessors and Microcontrollers

EECE3041

By

Dr P.V.Y.Jayasree
Department of EECE
GITAM Institute of Technology(GIT)
Visakhapatnam-530045
Email: [email protected]

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 Contents GITAM
(Deemed to be University)

• Intel family of 8 bit microcontrollers

• Architecture
• Signal description
• Register set of 8051
• Important operational features of 8051
• Program Status Word (PSW).

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Three criteria in Choosing a Microcontroller

1. meeting the computing needs of the task efficiently and

cost effectively
• speed, the amount of ROM and RAM, the number of
I/O ports and timers, size, packaging, power
consumption
• easy to upgrade
• cost per unit
2. availability of software development tools
• assemblers, debuggers, C compilers, emulator,
simulator, technical support
3. wide availability and reliable sources of the
microcontrollers.

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The introduction of microcontrollers and design with them has the

following advantages

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The 8051 Microcontroller (Deemed to be University)

• a Harvard architecture (separate instruction/data

memories)
• single chip microcontroller (µC)
• developed by Intel in 1980 for use in embedded
systems.
• today largely superseded by a vast range of faster
and/or functionally enhanced 8051-compatible
devices manufactured by more than 20 independent
manufacturers.

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 Micro Controller Block Diagram: GITAM
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Block Diagram
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External interrupts
On-chip Timer/Counter

Interrupt ROM for

On-chip Timer 1 Counter
Control program
RAM Inputs
code Timer 0

CPU

Bus 4 I/O Ports Serial

OSC Control Port

P0 P1 P2 P3 TxD RxD
Address/Data

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Comparison of the 8051 Family Members

Feature 8051 8052 8031

ROM (program space in bytes) 4K 8K 0K
RAM (bytes) 128 256 128
Timers 2 3 2
I/O pins 32 32 32
Serial port 1 1 1
Interrupt sources 6 8 6

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Pin Description of the 8051 (Deemed to be University)

P1.0 1 40 Vcc
P1.1 2 39 P0.0(AD0)
P1.2 3 38 P0.1(AD1)
P1.3
P1.4
4
5
8051 37
36
P0.2(AD2)
P0.3(AD3)
P1.5 6 (8031) 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5)
P1.7 8 33 P0.6(AD6)
RESET 9 32 P0.7(AD7)
(RXD)P3.0 10 31 EA/VPP
(TXD)P3.1 11 30 ALE/PROG
(INT0)P3.2 12 29 PSEN
(INT1)P3.3 13 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14)
(T1)P3.5 15 26 P2.5(A13)
(WR)P3.6 16 25 P2.4(A12)
(RD)P3.7 17 24 P2.3(A11)
XTAL2 18 23 P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8)
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（
• Vcc pin 40 ）：
– Vcc provides supply voltage to the chip.
– The voltage source is +5V.
（
• GND pin 20 ）： ground
（
• XTAL1 and XTAL2 pins 19,18 ）：
– These 2 pins provide external clock.

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RESET Value of Some 8051 Registers:

Register Reset Value

PC 0000
ACC 0000
B 0000
PSW 0000
SP 0007
DPTR 0000
RAM are all zero.
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 Register set of 8051 GITAM
(Deemed to be University)

• Registers A and B are used to store operands

• Temporary registers are not user accessible

• 8051 has a family of registers known as Special function

Registers (SFRs). In total 21 (Bit addressable and 8-bit) registers

• Bit addressable – ACC, B, PSW, P0, P1, P2, P3, IP, IE, TCON & SCON
• 8-Bit – SP, DPH, DPL, TMOD, TH0, TL0, TH1, TL1, SBUF & PCON

• The starting 32 bytes of on-chip RAM are used as geneal

purpose registers with addresses from 0000H to 001FH.
– These 32, 8-bit registers are divided into 4 register banks with
each bank 8 registers.
– At a time only one bank can be accessed.
– These banks can be selected using RS1 and RS0 of PSW
register.

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 Register set of 8051 GITAM
(Deemed to be University)
• TH0 and TL0 form a 16-bit counter / timer register of Timer T0.
Similarly TH1 and TL1 form the 16- bit count for the Timer T1.
• The four port latches are represented by P0, P1, P2 and P3.
• Register SP is a Stack Pointer register.
• Register PSW is a flag register and contains status information.
• Register IP can be programmed to control the interrupt priority.
• Register IE can be programmed to enable or disable interrupts.

• TCON is called timer/counter control register

• Some bits of this register are used to on and off timers
• Some bits represent interrupt control flags

• Register TMOD is used for programming the modes of operation of

Timers.
• Register SCON is a serial port mode control register.
• Register SBUF is a serial data buffer for transmit and receive
operations.
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 Register set of 8051 GITAM
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The PCON register is a power control register. This register contains

power down bit and idle bit which activate the power down mode and
idle mode.

The PCON register also contains two general purpose flags and a
double baud rate bit
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 SFR Registers of 8051 GITAM
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 Program Status Word (PSW) GITAM
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