Microprocessor - 8085 Pin Configuration
Microprocessor - 8085 Pin Configuration
Address bus
A15- A8, it carries the most significant 8- bits of memory/IO address.
Data bus
AD7- AD0, it carries the least significant 8- bit address and data bus.
RD − This signal indicates that the selected IO or memory device is to be read and is ready
for accepting data available on the data bus.
WR − This signal indicates that the data on the data bus is to be written into a selected
memory or IO location.
ALE − It is a positive going pulse generated when a new operation is started by the
microprocessor. When the pulse goes high, it indicates address. When the pulse goes down it
indicates data.
IO/M
This signal is used to differentiate between IO and Memory operations, i.e. when it is high indicates
IO operation and when it is low then it indicates memory operation.
S1 & S0
These signals are used to identify the type of current operation.
Power supply
There are 2 power supply signals − VCC & VSS. VCC indicates +5v power supply and VSS indicates
ground signal.
Clock signals
There are 3 clock signals, i.e. X1, X2, CLK OUT.
X1, X2 − A crystal (RC, LC N/W) is connected at these two pins and is used to set frequency
of the internal clock generator. This frequency is internally divided by 2.
CLK OUT − This signal is used as the system clock for devices connected with the
microprocessor.
Interrupts & externally initiated signals
Interrupts are the signals generated by external devices to request the microprocessor to perform a
task. There are 5 interrupt signals, i.e. TRAP, RST 7.5, RST 6.5, RST 5.5, and INTR. We will discuss
interrupts in detail in interrupts section.
RESET IN − This signal is used to reset the microprocessor by setting the program counter to
zero.
RESET OUT − This signal is used to reset all the connected devices when the microprocessor
is reset.
READY − This signal indicates that the device is ready to send or receive data. If READY is
low, then the CPU has to wait for READY to go high.
HOLD − This signal indicates that another master is requesting the use of the address and
data buses.
HLDA (HOLD Acknowledge) − It indicates that the CPU has received the HOLD request and it
will relinquish the bus in the next clock cycle. HLDA is set to low after the HOLD signal is
removed.
SOD (Serial output data line) − The output SOD is set/reset as specified by the SIM
instruction.
SID (Serial input data line) − The data on this line is loaded into accumulator whenever a RIM
instruction is executed.