UNIT III

FAULT ANALYSIS –
BALANCED FAULTS
 FAULT ANALYSIS – BALANCED FAULTS
• Importance of short circuit studies
• Assumptions in short circuit analysis
• Symmetrical short circuit analysis using
Thevenin’s theorem
• Bus Impedance matrix by building algorithm
(without mutual coupling)
• Symmetrical fault analysis through bus
impedance matrix
• Post fault bus voltages
• Fault level
• Current limiting reactors
 IMPORTANCE OF SHORT CIRCUIT
ANALYSIS
 This topic deals with the abnormal system behaviour
under conditions of symmetrical short circuit
(symmetrical three-phase fault)
 Such conditions are caused in the system through:

Insulation failure of equipment

Flashover of lines initiated by a lightning stroke
Through accidental faulty operation
Falling of a tree along a line
Wind and ice loading on the transmission lines
Birds shorting the lines
 Need for short circuit studies:
⚫ The system must be protected against the
flow of heavy short circuit currents (which
can cause permanent damage to major
equipments) by disconnecting the faulty
part of the system by means of circuit
breakers and protective relaying.
⚫ To determine the magnitude of currents
flowing throughout the power system at
various time intervals after a fault occurs
⚫ To select the ratings for fuse, breakers and
switchgear in addition to setting up of
protective relays
 Classification of
faults:
⚫Symmetrical faults:
In symmetrical faults all the three phases
are short circuited to each other (three
phase fault) and to earth (three phase to
ground). Such faults are balanced and
symmetrical – the voltage and current
magnitudes are same in all the phases and
displaced by 120o.
This type of fault is rare, but the severity of
the fault is more, which involves large
currents.
Since it is balanced fault, per phase analysis
is sufficient to find the fault currents.
 Unsymmetrical faults:
⚫ It involves one or two phases
⚫ In such faults, voltages and currents are
unbalanced and each phase to be treated
individually for calculation of fault
quantities.
⚫ The Unsymmetrical faults require special
tools called Symmetrical Components.
Unsymmetrical fault Types:
⚫ Single Line to Ground fault (LG fault)
⚫ Line to Line fault (LL fault)
⚫ Double line to ground faults (LLG fault)
 TRANSIENT ON A TRANSMISSION LINE:
Let us consider the short circuit transient on a
transmission line. Certain simplifying assumptions
are made.
i) The line is fed from constant voltage source
ii) Short circuit takes place when the line is
unloaded
iii) Line capacitance is negligible and the line can be
represented by a lumped RL series circuit

Fig 1
 With the above assumptions the line can be represented
by short circuit model of Fig 1.
The short circuit is assumed to take place at time t = 0.
The parameter α controls the instant on the voltage
wave when short circuit occurs.
It is known from circuit theory that the current after
short circuit is composed of two parts, i.e.
i = is + it
where
is = steady state current

2V
 sin( t    )
|Z|
  1 L 
Z (R   L )
2 2 2 1/ 2
   tan 
 R 
it = transient current [it is such that i(0) = is(0) + it(0) = 0
being an inductive circuit; it decays corresponding to
the time constant L/R].
 is (0) e ( R / L)t
2V
 sin(    ) e ( R / L )t
|Z |
Thus short circuit current is given by
2V 2V
i sin( t     )  sin(    )e ( R / L )t (1)
|Z | |Z |

Symmetrical short DC off-set current

circuit current
 A plot of is, it and i = is + it is shown in Fig 2.

Fig 2
 In power system terminology, the sinusoidal steady
state current is called the symmetrical short circuit
current and the unidirectional transient component is
called the DC off-set current, which causes the total
short circuit current to be unsymmetrical till the
transient decay
The maximum momentary short circuit current imm
corresponds to the first peak. If the decay of transient
current in this short time is neglected,
2V 2V
imm  sin(   ) 
(2)
|Z | |Z|

Since transmission line resistance is small, θ ≃ 900

2V 2V
∴ imm  cos  (3)
|Z| |Z|
 This has the maximum possible value for α = 0, i.e.
short circuit occurring when the voltage wave is going
through zero. Thus

2V
imm (max possible)  2 (4)
|Z|

= twice the maximum of symmetrical

short circuit current (doubling effect)

For the selection of circuit breakers, momentary

short circuit current is taken corresponding to its
maximum possible value (a safe choice )
SHORT CIRCUIT OF A SYNCHRONOUS MACHINE
(ON NO LOAD)

Under steady state short circuit conditions, the

armature reaction of a synchronous generator produces
a demagnetizing flux.
In terms of a circuit this effect is modelled as a
reactance Xa in series with the induced emf. This
reactance when combined with the leakage reactance Xl
of the machine is called synchronous reactance Xd (direct
axis synchronous reactance in the case of salient pole
machines).
Armature resistance being small can be neglected.
The steady state short circuit model of a synchronous
machine is shown in Fig 3(a)

Fig 3
 Let us consider a sudden short circuit (three-phase )
of a synchronous generator, initially operating under
open circuit conditions.
The machine under goes a transient in all the three
phases finally ending up in steady state conditions.
The circuit breaker must interrupt the current much
before steady state conditions are reached.
Immediately upon short circuit, the DC off-set
current appear in all the three phases, each with a
different magnitude since the point on the voltage wave
at which short circuit occurs is different for each phase.
The DC off-set currents are accounted for separately
on empirical basis and therefore for short circuit
studies, we need to concentrate our attention on
symmetrical (sinusoidal) short circuit current only.
 Immediately in the event of short circuit, the
symmetrical short circuit current is limited only by the
leakage reactance of the machine, since the air gap flux
cannot change instantaneously (theorem of constant
flux linkages), to counter the demagnetization of the
armature short circuit current, currents appear in the
field winding as well as in the damper winding in a
direction to help the main flux.
These currents decay in accordance with the winding
time constant. The time constant of the damper
winding, which has low leakage inductance is much less
than that of the filed winding, which has high leakage
inductance.
Thus during the initial part of the short circuit, the
damper and field windings have transformer currents
included in them
 so that in the circuit model their reactances Xf of the
field winding and Xdw of the damper winding appear in
parallel with Xa as shown in Fig 3.
As the damper winding currents are first to die out,
Xdw effectively becomes open-circuited and at a later
stage Xf becomes open circuited.
The machine reactance thus changes from the parallel
combinations of Xa, Xf and Xdw during the initial period
of short circuit to Xa and Xf in parallel in the middle
period of the short circuit and finally to Xa in steady
state.
The reactance presented by the machine in the initial
period of the short circuit i.e.
1
Xl   X d''
(1/ Xa 1/ Xf 1/ Xdw)
 is called the subtransient reactance of the machine,
the effective reactance after the damper winding
currents have died out, i.e.

Xl  ( Xa || Xf )  X d'
is called the transient reactance of the machine. The
reactance under steady state conditions is the
synchronous reactance of the machine.

Obviously X d''  X d'  X d

The machine thus offers a time varying reactance

which changes from Xd’’ to Xd’ and finally Xd.
 If we examine the oscillogram of the short circuit
current of a synchronous machine after the DC off-set
currents have been removed from it, we will find the
current wave shape as given in Fig 4a

Fig 4a
 The envelope of the current wave shape is plotted in
Fig 4b.
The short circuit currents can be divided into three
periods – initial subtransient period when the current is
large as the machine offers subtransient reactance, the
middle transient period where the machine offers
transient reactance and finally the steady state period
when the machine offers synchronous reactance.

Fig 4b
 If the transient envelop is extrapolated backwards in
time, the difference between the transient and
subtransient envelops is the current ∆i’’ (corresponding
to the damper winding current) which decays fast
according to the damper winding time constant .
The difference ∆i’ between the steady state and
transient envelop decays in accordance with the field
time constant.
In terms of the oscillogram, the currents and
reactances discussed above can be written as
oa | Eg | ob | Eg |
| I |  | I '| 
2 Xd 2 Xd '

oc | Eg |
| I ''| 
2 Xd ''
Where
|I| = steady state current (rms)
|I’| = transient current (rms) excluding DC component
|I’’| = subtransient current (rms) excluding DC component
Xd = direct axis synchronous reactance
Xd’ = direct axis transient reactance
Xd’’= direct axis subtransient reactance
|Eg| = per phase no load voltage (rms)
 EX 1: For the radial network shown in Fig 5, a three-
phase fault occurs at F. Determine the fault current
and the line voltage at 11KV bus under fault
conditions.
10MVA G1 G2 10MVA
15% reactance 12.5% reactance

11kV
Transformer No1:
10MVA,10% reactance

Over head line:30km,

Z=(0.27+j0.36)/km

33kV
Transformer No2:
5MVA,8% reactance

3km cable,
6.6kV Z=(0.135+j0.08)/km

F
Fig. 5
Sol: Select a system base of 100MVA
Voltage bases are : 11kV in generators,
33 kV for overhead lines and 6.6 kV for cable
0.15100
Reactance of G1  j  j1.5 pu
10

0.125100
Reactance of G2  j  j1.25 pu
10

0.1100
Reactance of T 1  j  j1.0 pu
10

0.08100
Reactance of T1  j  j1.6 pu
5
 Z(in ohms)  MVABase
Overhead line impedance 
(kVBase)2
30(0.27  j0.36)100

(33)2
= (0.774 + j0.99) pu

3(0.135 j0.08)  100

Cable impedance 
(6.6) 2
= (0.93 + j0.55) pu
j1.5
G1
cable T2 Line T1
F
j1.6
0.93 + j0.55 0.744 + j0.99 j1.0 j1.25
G2

Fig 6
 Circuit model of the system for fault calculations is
shown in Fig 6. Since the system is no load prior to
occurrence of the fault, the voltages of the two
generators are identical (in phase and magnitude) and
are equal to 1 pu. The generator circuit can be replaced
by a single voltage source in series with the parallel
combination of generator reactances

Total Impedance = (j1.5||j1.25) + (j1.0) +

(0.744 + j0.99) + (j1.6) + (0.93 + j0.55)
= 1.674 + j4.82 = 5.1∠70.8o pu
10
ISC =  0.196  70.8∘ pu
5.170.8
 100103
IBase =  8750 A
36.6

ISC = 0.196  8750 = 1715 A

Total impedance between F and 11 kV bus

= (0.93 + j0.55) + (j1.6) + (0.744 + j 0.99) + (j1.0)
= 1.674 + j4.14 = 4.43∠67.8o

Voltage at 11 kV bus = 4.43∠67.8o  0.196 ∠-70.8o

= 0.88 ∠-30 pu = 0.88  11
= 9.68 kV
EX 2: Fig 7 shows a generating station feeding a 132
KV system. Determine the total fault current and fault
current supplied by each alternator for a 3-phase
fault at the receiving end bus. The line is 200 km
long. T1 - 100 MVA,
11/132 KV, X =10%

100 MVA X = 0.2/Phase/km

11 KV, G1
X = 15%
F

50 MVA
11 KV, G2 X = 0.2/Phase/km
X = 10%
T2 - 50 MVA,
11/132 KV, X = 8%

Fig 7
Sol: Take a base of 100 MVA, 11 kV for LV side and
132 kV for HV side.
per unit reactance of G1 = j0.15

100
per unit reactance of G2 = j0.1  j0.2
50
per unit reactance of T1 = j0.1

100
per unit reactance of T 2 = j0.08  j0.16
50
j0.2200100
per unit reactance of each line =  j0.23
132132
The single line reactance diagram is shown in Fig 8a,
This can be reduced to the diagram shown in Fig 8b
and then to Fig 8c.

Fig 8

1001000
Base current for 132 kV side =  437.4 A
3 132
 10
Total fault current =  j3.8095 pu
j0.2625
= 3.8095  437.4 ∠-900 A
= 1666.27 ∠-900 A
Fault level = 3.8095 pu or
3.8095  100 i.e. 380.95 MVA

Fault level for 11 kV

1001000
side of transformers =  5248.8 A
3 11

Total fault current supplied

by the two generators = -j3.8095  5248.8
= 19995∠-900
From Fig 8b,

Fault current supplied by G1

(19995  900 )( j0.36)

  11800.3  90 0 A
( j0.25 j0.36)

Fault current supplied by G2

(19995  900 )( j0.25)

  8194.7  900 A
( j0.25 j0.36)
Or = 19995∠-900 – 11800.3 ∠-900
= 8194.7 ∠-900 A
SHORT CIRCUIT OF A LOADED SYNCHRONOUS MACHINE
In the previous topic it was assumed that the short
circuit of a synchronous machine under no-load
condition.
This topic presents the methods of computing short
circuit current when short circuit occurs under loaded
condition.

Fig 9: Circuit model Fig 10

of a loaded machine
 Fig 9 shows the circuit model of a synchronous
generator operating under steady conditions supplying
a load current Io to the bus at a terminal voltage of Vo, Eg
is the induced emf under load condition and Xd is the
direct axis synchronous reactance of the machine.
When short circuit occurs at the terminals of this
machine, the circuit model to be used for computing
short circuit is given in Fig 10a for subtransient current
and Fig 10b for transient current.
The induced emf to be used in this models are given
by
E V  jI X
''
g
o o ''
d

E V o  jI o X d'
'
g
 The voltage Eg’’ is known as the voltage behind the
subtransient reactance and the voltage Eg’ is known as
the voltage behind the transient reactance.
In fact, if Io is zero (no load case), E g’’ = E g’ = E g, the no
load voltage, in which case the circuit model reduces to
that discussed in previous section.
Synchronous motors have internal emf’s and
reactances similar to that of a generator except that the
current direction is reversed.
During short circuit conditions these can be replaced
by similar circuit models except that the voltage behind
subtransient/transient reactances given by

E V  jI X
''
m
o o ''
d

Em' V o  jI o X d'
 Whenever we are dealing with short circuit of an
interconnected system, the synchronous machines
(generators and motors) are replaced by their
corresponding circuit models having voltage behind
subtransient (transient) reactance in series with
subtransient (transient) reactances. The rest of the
network being passive remains unchanged.
 Ex 3: A Synchronous generator and a synchronous
motor each rated 25MVA, 11KV having 15%
subtransient reactance are connected through
transformers and a line as shown in fig. 11. The
transformers are rated 25 MVA, 11/66 KV and 66/11
KV with leakage reactance of 10% each. The line has a
reactance of 10% on a base of 25 MVA, 66 KV. The
motor is drawing 15 MW at 0.8 power factor leading
and a terminal voltage of 10.6 KV when a symmetrical
three-phase fault occurs at the motor terminals. Find
the subtransient current in the generator, motor and
fault.
Generator Motor

T1 T2
Fig 11
 Sol: All reactances are given on a base of 25 MVA and
appropriate voltages.

Prefault voltage Vo = 10.6/11 = 0.9636∠0o pu

(or Terminal Voltage)

P = VIcos Φ
Load = 15 MW, 0.8 pf leading VI = P/cos Φ
pf = 0.8 = cos Φ,
Load MVA = 15/0.8 = 18.75 MVA Φ = cos-1(0.8)
= 36.9o
Load MVA pu = 18.75/25 = 0.75 pu
0.75
Prefault current Io = 36.9o
0.9636
= 0.7738 ∠36.9o pu
Voltage behind subtransient reactance (generator)
Eg’’ = 0.9636∠0o + j0.45  0.7738 ∠36.9o
= 0.9636 + j0.45(0.6224 + j0.467)
= 0.7536 + j0.28 pu
Voltage behind subtransient reactance (motor)
Em’’ = 0.9636∠0o - j0.15  0.7738 ∠36.9o
= 0.9636 - j0.15(0.6224 + j0.467)
= 1.0336 - j0.0933 pu

Fig 12
 The prefault equivalent circuit is shown in Fig 12.
Under faulted condition,

I g''  0.7536  j0.28  0.6226 j1.6746 pu

j0.45

I m''  1.0336  j0.0933  0.6226 j6.8906 pu

j0.15

If = Ig’’ + Im’’ = - j8.5653 pu

25103
Base current (gen/motor) =  1,312.2A
3 11
Now,
Ig’’ = 1,312.2(0.6226 –j1.6746) = (816.4 - j2,197.4)A
Im’’ = 1,312.2(-0.6226 –j6.8906) = (-816.2 – j9,041.8)A
If = -j11,239 A
SHORT CIRCUIT (SC) CURRENT COMPUTATION THROUGH
THE THEVENIN THEOREM

An alternate method of computing short circuit

current is through the application of the Thevenin
theorem.
This method is faster and easily adopted to
systematic computation for large networks.
Consider a synchronous generator feeding a
synchronous motor over a line.
Fig 13a shows the circuit model of the system under
conditions of steady load. Fault computations are to be
made for a fault at F, at the motor terminals.
As a first step the circuit model is replaced by the one
shown in Fig 13b.
 Fig 13

The synchronous machines are represented by their

transient reactances (or subtransient reactances if
subtransient currents are of interest) in series with
voltages behind transient reactances.
 This change does not disturb the Prefault current Io
and Prefault voltages Vo (at F )
As seen from FG the Thevenin equivalent circuit of
Fig 13b is drawn in fig 13c.
It comprises Prefault voltage Vo in series with the
passive Thevenin impedance network.
It is noticed that the Prefault current Io does not
appear in the passive Thevenin impedance network.
This current could be taken in to account by
superposition after the SC solution is obtained through
use of the Thevenin equivalent.
Consider a fault at F through an impedance Zf.
Fig 13d shows the Thevenin equivalent of the system
feeding an fault impedance.
 We can immediately write o
V
If 
jX Th  Z f
Current caused by fault in generator circuit
'
X dm
I g  I f
'
( X dg  X  X dm
'
)

Current caused by fault in motor circuit

'
X dg X
I m  ' If
(X  X  X )
'
dg dm

Postfault currents and voltages are obtained as

follows by superposition:
I gf  I o  I g
I mf   I o  I m (in the direction of ∆I m)
 Postfault voltage
V V
f o
 ( jX I f
)  V o
 V
Th

Where ∆V = -jXThIf is the voltage of the fault point F’

on the Thevenin passive network (with respect to the
reference bus G) caused by the flow of fault current If.
An observation can be made here. Since the prefault
current flowing out of fault point F is always zero, the
postfault current out of F is independent of load for a
given prefault voltage at F.
The above approach to short circuit computation is
summarized in the following four steps:
Step 1: Obtain steady state solution of loaded system
(load flow study)
 Step 2: Replace reactances of synchronous machines
by their subtransient/transient values. Short circuit all
emf sources. The result is the passive Thevenin
network.
Step 3: Excite the passive network of step 2 at the
fault point by negative of prefault voltage in series with
the fault impedance. Compute voltages and currents at
all points of interest.
Step 4: Post fault current and voltages are obtained
by adding results of step 1 and 3.
The following assumptions can be made in SC
computations leading to considerable computational
simplifications:
Assumptions 1: All prefault voltage magnitudes are 1
pu
 Assumption 2: All prefault currents are zero
The first assumption is quite close to actual
conditions as under normal operation all voltages (pu)
are nearly unity.
The changes in current caused by short circuit are
quite large, of the order of 10-20 pu and are purely
reactive, whereas the prefault load currents are almost
purely real. Hence the total postfault current which is
the result of the two currents can be taken in magnitude
equal to larger component (caused by the fault). This
justifies assumption 2.
 Ex 3 problem can be solved using Thevenin theorem
as follows:
The circuit model of the system for computation of
postfault condition is shown in Fig 14
Vo
I f

( j0.15|| j0.45)
0.9636 j0.60

j0.15 j0.45
= -j8.565 pu
Change in generator current
fed due to fault,
Fig 14
j0.15
I g   j8.565   j2.141pu
j0.60
 Change in motor current due to fault,
j0.45
I m   j8.565   j6.424 pu
j0.60
To these changes we add the prefault current to
obtain the subtransient current in machines. Thus
I g''  I o  I g  (0.623 j1.674) pu
I m''   I o  I m  (0.623 j6.981) pu

Which are same as calculated earlier.

Prefault current Io = 0.7738 ∠36.9o pu
= (0.6224 + j0.467)
 SELECTION OF CIRCUIT BREAKER
Two of the circuit breaker ratings which require the
computation of SC currents are :
Rated momentary current and rated symmetrical
interrupting current
Rated momentary current: Symmetrical SC current is
obtained by using subtransient reactances for
synchronous machines. Momentary current (rms) is
then calculated by multiplying the symmetrical
momentary current by a factor of 1.6 to account for the
presence of DC off-set current.
Symmetrical current to be interrupted: is computed
by using subtransient reactances for synchronous
generator and transient reactances for synchronous
motors.
 The DC off-set value added to obtain the current to
be interrupted is accounted for by multiplying the
symmetrical SC current by a factor as tabulated below:
Circuit Breaker Speed Multiplying Factor
8 cycles or slower 1.0
5 cycles 1.1
3 cycles 1.2
2 cycles 1.4

If SC MVA is more than 500, the above multiplying

factors are increased by 0.1 each. The multiplying factor
for air circuit breakers rated 600 V or lower is 1.25
 The current that a circuit breaker can interrupt is
inversely proportional to the operating voltage over a
certain range,
Amperes at operating voltage =
amperes at rated voltage  (rated voltage/
operating voltages)

Of course, operating voltage cannot exceed the

maximum design value.
Also, no matter how low the voltage is, the rated
interrupting current cannot exceed the rated maximum
interrupting current.
Over this range of voltages, the product of operating
voltage and interrupting current is constant.
 It is therefore logical as well as convenient to express
the circuit breaker rating in terms of SC MVA that can be
interrupted, defined as
Rated interrupting MVA (three phase) capacity
= 3 |V(line)|rated  |I(line)|rated interrupting current
while V(line) is in kV and I(line) is in kA
Instead of computing the SC current to be
interrupted, we compute three-phase SC MVA to be
interrupted, where
SC MVA (3-phase) = 3  prefault line voltage in kV
 SC current in kA
If voltage and current are in per unit values on a
three phase basis
SC MVA (3-phase) = |V|prefault  |I|SC  (MVA)base
 For the selection of circuit breaker for a particular
location, we must find the maximum possible SC MVA to
be interrupted with respect to type and location of fault
and generating capacity connected to the system.
A three-phase fault though rare in generally the one
which gives the highest SC MVA and a circuit breaker
must be capable of interrupting it.
In a simple system the fault location which gives the
highest SC MVA may be obvious but in a large system
various possible locations must be tried out to obtain
the highest SC MVA requiring repeated SC
computations.
 Ex 4: Three 6.6 kV generators A, B and C each of 10%
leakage reactances and MVA ratings 40, 50 and 25,
respectively are interconnected electrically as shown in
Fig 15 by a tie bar through current limiting reactors,
each of 12% reactance based upon the rating of the
machine which it is connected. A three-phase feeder is
supplied from the bus bar of generator A at a line
voltage of 6.6 kV. The feeder has a resistance of 0.06
/phase and an inductive reactance of 0.12 /phase.
Estimate the maximum MVA that can be fed into a
symmetrical short circuit at the far end of the feeder.

Fig 15
Sol: Choose as base 50 MVA and 6.6 kV

(0.06  j0.12) 50

Feeder impedance = 2
 (0.069  j0.138) pu
(6.6)
0.150
Gen A reactance =  0.125 pu
40

Gen B reactance = 0.1 pu

0.150
Gen C reactance =  0.2 pu
25
0.1250
Reactor A reactance =  0.15 pu
40

Reactor B reactance = 0.12 pu

 0.1250
Reactor C reactance =  0.24 pu
25
Assume no load prefault conditions, ie prefault
currents are zero. Post fault currents can then be
calculated by the circuit model of Fig 16a and the
reduced circuit is shown in Fig 16b

Fig 16
Z = (0.069 + j0.138) + j0.125 || (j0.15 + j0.22 || j0.44)
= 0.069 + j0.226 = 0.236∠73o


o I f V o  V o
  1 pu (since V o  1pu)
SC MVA = V
 Z  Z
1
= (MVA) Base
Z
50
=  212 MVA
0.236
 Ex 5: Consider the 4-bus system of Fig 17. Buses 1
and 2 are generator buses and 3 and 4 are load buses.
The generators are rated 11 kV, 100 MVA, with transient
reactance of 10% each. Both the transformers are
11/110 kV, 100 MVA with leakage reactance of 5%. The
reactances of the line to a base of 100 MVA, 110 kV are
indicated in figure. Obtain the short circuit solution for
a three-phase solid fault on bus 4 (load bus). Assume
prefault voltages to be 1 pu and prefault currents to be
zero.

Fig 17
 Sol: Changes in voltages and currents caused by a
short circuit can be calculated from the circuit model of
Fig 18.

Fig 18
 Fault current If is calculated by systematic network
reduction as in Fig 19.

Fig 19
In Fig 19 (b) to (c), delta to star conversion,
j0.1 j0.11
An   j0.03055
j0.1 j0.11 j0.15

j0.11 j0.15
Bn   j0.04583
j0.1 j0.11 j0.15

j0.1 j0.15
Cn   j0.04155
j0.1 j0.11 j0.15
From Fig. 19 (e) we get directly the fault current as

1.0
If    j7.37463 pu
j0.13560
From Fig 19 (d),
j0.19583
I1 I 
f
  j3.83701 pu
j0.37638
j0.18055
I2I 
f
  j3.53762 pu
j0.37638

Let us now compute the voltage changes for buses 1, 2

and 3.
From Fig 19 (b), we have
∆V1 = - (j0.15)(-j3.83701) = -0.57555 pu
∆V2 = - (j0.15)(-3.53762) = - 0.53064 pu
V1f = 1 + ∆V1 = 0.42445pu
Now,
V2f = 1 + ∆V2 = 0.46936 pu
 V1 f V2f
 I13   j0.17964 pu
j0.15  j0.1

∆V3 = -[(j0.15)(-j3.83701)+(j0.15)(j0.17964)]
= - 0.54860 pu
 V3f = 1 – 0.5486 = 0.4514 pu

V4f = 0 (because the fault occurs at bus 4)

The various currents are:

V 1 V 4 0.42445 0
I 14     j4.2445pu
Z 14 j0.1
The various currents are:

V 2 V 4 0.46936 0
I 24     j3.12907 pu
Z 24 j0.15
V 2 V 3 0.46936 0.4514
I 23     j0.1796 pu
Z 23 j0.1

V 1 V 2 0.42445  0.46936
I12    j0.22455 pu
Z 12 j0.2

Short circuit study is complete with the computations of

SC MVA at bus 4.
(SC MVA)4 = 7.37468  100 = 737.463 MVA
ALGORITHM FOR SHORT CIRCUIT STUDIES
In order to apply the four steps of short circuit
computation developed earlier to large systems, it is
necessary to evolve a systematic general algorithm so
that a digital computer can be used.
Consider an n-bus system as shown in Fig 20
operating at steady load.

Fig 20
 Steps involved in short circuit computations are,
Step 1: To obtain the prefault voltages at all buses and
currents in all lines through a load flow study.
Let us indicate the prefault bus voltage vector as
V10 
 0
VBUS 
0  V2  (1)
⁝ 
 
V n0 

Let us assume that the rth bus is faulted through a fault

impedance Zf. The postfault bus voltage vector will be
given by
f
VBUS VBUS
0
 V (2)
Where ∆V is the vector of changes in bus voltages
caused by the fault.
Step 2: we draw the passive Thevenin network of the
system with generators replaced by transient/
subtransient reactances with their emfs shorted Fig 21

Fig 21
Step 3: Now excite the passive Thevenin network with
–Vr0 in series with Zf as in Fig 21. The vector ∆V
comprises the bus voltages of this network.
Now,
∆V = ZBUS . Jf (3)
Where
 Z 11 . . Z 1n 
 . . 
Z BUS   (4)
 . . 
 
 Zn1 . . Znn 

= bus impedance matrix of the passive

Thevenin network
Jf = bus current injection vector
Since the network is injected with current –If only at the
rth bus, we have
 0 
0 
 
. 
 
.
J  f 
f
I   I f 
(5)
 r 
. 
. 
 
0 

Substituting Eq (5) in (3), we have for the rth bus

∆Vr = - Zrr If
Step 4: The voltage at the rth bus under fault is

Vr f Vr0  Vr0 V r0  Z rr I f (6)

However, this voltage must equal
Vrf = Zf If (7)
We have from equation (6) and (7)
Z f I f Vr0  Z rr I f
or 0
V
If  r (8)
Z rr  Z f
At the ith bus, from Eqs. (3) and (5)
∆Vi = - Zir If
Vi f = Vi0 – Zir If, i = 1,2,...n
 (9)
Substituting for If from Eq. (8), we have

Vi f Vi 0  Zir V 0
Z rr  Z f
r
(10)
For i = r in Eq. (10),
f
Z
Vr f  V
0
(11)
Z rr  Z f r

In the above relationship Vi0’s, the prefault bus

voltages are assumed to be known from a load flow
study.
ZBUS matrix of the short-circuit study network of Fig 20
can be obtained by the inversion of its YBUS matrix or
the ZBUS building algorithm.
It should be observed here that the SC study network
of Fig 21 is different from the corresponding load flow
study network by the fact that the shunt branches
corresponding to the generator reactances do not
appear in the load flow study network.
 In formulating the SC study network, the load
impedances are ignored.
Synchronous motors must be included in ZBUS
formulation for the SC study.
Postfault currents in lines are given by
I f Y (V f V f ) (12)
ij ij i j

Fig 22(a) Fig 22(b)

For calculation of postfault generator current, examine
Fig 22 (a) and (b). From load flow study Fig 22 (a)
Prefault generator output = PGi + jQGi

PGi  jQGi
 I Gi0  (13)
Vi 0
EGi' Vi  jX Gi
'
I Gi0 (14)

From the SC study, Vi f is obtained. It then follows from

Fig 22 (b) that
EGi' Vi f
I  f
Gi ' (15)
jX Gi
 Ex 6: Let us consider Example 8, to compute the short
circuit solution using the above algorithm.
Sol: The bus admittance matrix for the network is
formed as follows:
1 1 1 1
Y11       j28.333
j0.15 j0.15 j0.1 j0.2

1
Y12 Y21   j5.0
j0.2

1
Y13 Y31   j6.667
j0.15

1
Y14 Y41   j10.0
j0.1

Fig 23
 1 1 1 1
Y22       j28.333
j0.15 j0.15 j0.1 j0.2

1
Y23 Y32   j10.0
j0.1

1
Y24 Y42   j6.667
j0.15

1 1
Y33     j16.667
j0.15 j0.1

Y34 Y43  0.0

1 1
Y44     j16.667
j0.1 j0.15
  j28.333 j5.0 j6.667 j10.0 
 j5.0  j28.333 j10.0 j6.667 
YBUS  
 j6.667 j10.0  j16.667 j0.0 
 j10.0 
 j6.667 j0.0  j16.667 
By inversion we get ZBUS as

 j0.0903 j0.0597 j0.0719 j0.0780 

 j0.0597 j0.0903 j0.078 j0.0719 
Z BUS  
 j0.0719 j0.078 j0.1356 j0.0743 
 
 j0.0780 j0.0719 j0.0743 j0.1356 
Now, the postfault bus voltages can be obtained using
Eq. (10)

V1 f V10  Z14 V40

Z 44
The prefault condition being no load,
V1 = V2 = V3 = V4 = 1 pu
0 0 0 0
j0.078
V1 f 1.0  1.0  0.4248 pu
j0.1356

V2f V20  Z 24 V40

Z 44
j0.0719
V2 1.0 
f
1.0  0.4698 pu
j0.1356

V3f V30  Z 34 V40

Z 44
j0.0743
V3 1.0 
f
1.0  0.4521 pu
j0.1356
V4f  0.0
Using Eq. 8 we can obtain the fault current as
1.0
If    j7.37463 pu
j0.1356
Short circuit current in lines 1-3, 1-2, 1-4, 2-4 and 2-3,

V1 f V2f 0.4248  0.4698

I 
f
12   j0.225 pu
Z 12 j0.2

V1 f V3 f 0.4248  0.4521

I 
f
13   j0.182 pu
Z 13 j0.15

V1 f V4f 0.4248  0
I 
f
14    j4.248 pu
Z 14 j0.1
 V 2 V 3 0.4698 0.4521
I 
f
23
   j0.177 pu
Z 23 j0.1
V 2 V 4 0.4698 0
I 24f     j3.132 pu
Z 24 j0.15
This is a systematic method and can be easily adopted
on the digital computer for practical networks of large
size.
Further, another important feature of the method is
that having computed ZBUS, we can at once obtain all the
required short circuit data for a fault on any bus.
For example, in this particular system, the fault current
for a fault on bus 1 or (bus 2) will be
1.0 1.0
I 
f
   j11.074197 pu
Z11 (or Z22 ) j0.0903
ZBUS FORMULATION – ZBUS BUILDING ALGORITHM
It is a step-by-step programmable technique which
proceeds branch by branch.
It has the advantage that any modification of the
network does not require complete rebuilding of ZBUS.
Consider that ZBUS has been formulated upto a
certain stage and another branch is now added, Then

ZBUS (old ) Z  b
b  ra
nc
h 
imped
an
ce ZBUS (new)

Upon adding a new branch, one of the following

situations is presented.
1. Zb is added from a new bus to the reference bus (ie
a new branch is added and the dimension of ZBUS goes
up by one). This is type-1 modification.
Type modifications:
new bus

new bus
Zb
old bus
Zb
ref bus
ref bus
type-1 modification
type-2 modification

old bus
old bus
Zb
Zb old bus
ref bus

type-3 modification ref bus

type-4 modification
2. Zb is added from a new bus to an old bus (ie a new
branch is added and the dimension of ZBUS goes up by
one). This is type-2 modification.
3. Zb connects an old bus to the reference branch (ie a
new loop is formed but the dimension of ZBUS does not
change). This is type-3 modification.
4. Zb connects two old buses (ie a new loop is formed
but the dimension of ZBUS does not change). This is type-
4 modification.

Let, i, j – old buses; r – reference bus; k – new bus

 Type – 1 Modification:
Fig 24 shows a passive (linear) n-bus network in
which branch with impedance Zb is added between bus
k and the reference bus, Now

 0
 ZBUS (old ) ⁝ 
ZBUS (new)   
 0
0 0 Zb

Fig 24
 Type – 2 Modification:
Zb is added from new bus k to the old bus j as shown
in Fig 25. It follows from this figure that

 Z1 j 
 
Z2j 
 ZBUS (old )
ZBUS (new)   ⁝ 
 
 Znj 
Zj1 Zj 2 Zjn Zjj  Zb 

Fig 25
 Type – 3 Modification:
Zb connects an old bus j to the reference bus as
shown in Fig 26. Thus

Z 1 j 
1  
ZBUS (new)  ZBUS (old )  ⁝ Zj1 Zjn 
Zjj  Zb 
Znj 

Fig 26
 Type – 4 Modification:
Zb connects two old buses
as in Fig 27.

Fig 27

 Z 1i  Z 1 j 
ZBUS (new)  ZBUS (old ) 
1  ⁝ 
Zb  Zii  Zjj  2Zij  
 Zni  Znj 
(Zi1  Zj1) (Zin  Zjn)
 Ex 7: For the 3-bus network shown in Fig 28 build
ZBUS.

Fig 28

Sol:
Step1: Add branch Zb = 0.25 (from bus 1(new) to
bus r)

ZBUS = [0.25]
 Step 2: Add branch Zb = 0.1 (from bus 2 (new - k) to
bus 1 (old - j)); type -2 modification

 ZBUS (old) Z1 j 
ZBUS   
 Zj1 (Zjj  Zb)

 ZBUS (old ) Z 11  0.25 0.25

ZBUS     0.25 0.35
 Z 11 (Z 11  Zb)  
 Step 3: Add branch Zb = 0.1 (from bus 3 (new - k) to
bus 1 (old - j)); type – 2 modification

 Z1 j 
Z BUS (old )
ZBUS   Z2j 
 
 Zj1 Zj 2 (Zjj  Zb)

 Z 11  0.25 0.25 0.25

 Z BUS (old ) 0.25 0.35 0.25
ZBUS  Z 21   
 
 Z11 Z 12 (Z 11  Zb) 0.25 0.25 0.35
 Step 4: Add branch Zb = 0.25 (from bus 2 (old - j) to ref
bus); type – 3 Modification
Z 1 j 
ZBUS  ZBUS (old ) 
1  ⁝ Zj1 Zjn 
(Zjj  Zb)  
Znj 

 Z 12 
ZBUS  ZBUS (old ) 
1  Z 22 Z 21 Z 22 Z 23
(Z 22  Zb)  
 Z 32 

0.25 0.25 0.25 0.25

 0.35 0.25  1 0.350.25 0.35 0.25
ZBUS  0.25  (0.35  0.25)  
0.25 0.25 0.35 0.25
 0.25 0.25 0.25 0.0625 0.0875 0.0625
 0.35 0.25  
1 0.0875 0.1225 0.0875
ZBUS  0.25  0.6  
0.25 0.25 0.35 0.0625 0.0875 0.0625

0.1458 0.1042 0.1458

 
ZBUS  0.1042 0.1458 0.1042

0.1458 0.1042 0.2458
 Step 5: Add branch Zb = 0.1 (from bus 2 (old - i) to bus
3 (old - j)); Type – 4 Modification
0.1458 0.1042 0.1458
 0.1458 0.1042  1
ZBUS  0.1042  Zb  Zii  Zjj  2Zij
0.1458 0.1042 0.2458
 (Z 1i  Z 1 j ) 
(Z 2i  Z 2 j ) (Zi1  Zj1) (Zi2  Zj 2) (Zi3  Zj3) 
 
 (Z 3i  Z 3 j ) 
0.1458 0.1042 0.1458
  1
ZBUS  0.1042 0.1458 0.1042
 Zb  Z 22  Z 33  2Z 23
0.1458 0.1042 0.2458
 (Z 12  Z 13) 
(Z 22  Z 23)(Z 21  Z 31) (Z 22  Z 32) (Z 23  Z 33)
 
(Z 32  Z 33) 
 0.1458 0.1042 0.1458
  1
ZBUS  0.1042 0.1458 0.1042
 0.1 0.1458  0.2458  2(0.1042)
0.1458 0.1042 0.2458
 0.0416
 0.0146  0.0416 0.0146  0.1416
 
 0.1416
0.1397 0.1103 0.1250
 
ZBUS  0.1103 0.1397 0.1250

0.1250 0.1250 0.1750

Opening of a line (line 3-2): This is equivalent to

connecting an impedance - 0.1 between bus 3 (old - i)
and bus 2 (old - j) i.e. type – 4 Modification.
Ex 8: For the four - bus system given below, formulate
the Z- bus using the Z Bus building algorithm.

Ex 9: For the three-bus system given in the Table

formulate the Z- bus using the Z Bus building
algorithm
S.No From Bus To Bus Impedance (pu)
1 ref 1 j0.2
2 1 2 j0.3
3 2 3 j0.4
4 ref 3 j0.1
5 1 3 j0.3
Ex 10: For the power system network shown in Fig 29
the pu reactances are shown. For a solid 3-phase fault
on bus 3, calculate the following:
a. Fault current
b. Vf1 and Vf2
c. If12, If13, and If23
d. IfG1 and IfG2
Assume pre fault voltages to be 1 pu

Fig 29
Sol: The Thevenin passive network for this system in
Fig 28 with its ZBUS given in Example 7

0.1397 0.1103 0.1250

 0.1397 0.1250 
ZBUS  0.1103 
0.1250 0.1250 0.1750
 a. As per Eq. 8
Vr0
If 
Z rr  Z f
Or
V 30
1
I 
f
   j5.71
Z33 j0.175

b. As per Eq. 10

Vi f Vi 0  Zir V 0
Z rr  Z f r

V1 f  1.0  Z13  1 0.125  0.286

 Z 33  0.175
 V2 f  1 Z23  1 0.125  0.286
 Z 33  0.175
These two voltages are equal because of the symmetry
of the given power network
c. From Eq. 12
I ijf Yij (Vi f V jf )
1
I12f  (0.286  0.286)  0
j0.1
and
1
I I 
f
13
f
23 (0.286  0)   j2.86
j0.1
d. As per Eq. 15
'
EG1 V1 f
f
I G1  '
jX G1  jX T

But E’G1 = 1 pu(prefault no load)

1 0.286
I 
f
  j2.86
j0.2  j0.05
G1

Similarly
IGf 2   j2.86