Essentials
Uploaded by
Kevin MulvihillEssentials
Uploaded by
Kevin MulvihillTM
CONTENTS
Introduction (i) Saturn Overview
Manual Layout (i)
Related Manuals
Definitions
(ii)
(iii) Manual
List of Figures (vi)
List of Tables (vii) (temporary version 1)
Chapter 1 Introduction to Saturn 1
1.1 Highlights 2
Chapter 2 Structure 5 June 6, 1994
2.1 Hardware Specifications 6
2.2 System Configuration 7
Doc. #ST-103-R1-040194
2.3 Description of Each Part 8
Chapter 3 Functions 11
3.1 CPU 12
3.2 SCU 13
3.3 VDP1 16
3.4 VDP2 27
3.5 SCSP 38
3.6 CD-ROM 42
3.7 Other Items 51
Index 53
© 1994 SEGA. All Rights Reserved.
REFERENCES
In translating/creating this document, certain technical words and/or phrases were interpreted with the
assistance of the technical literature listed below.
1. KenKyusha New Japanese-English Dictionary
1974 Edition
2. Nelson’s Japanese-English Character Dictionary
2nd revised version
3. Microsoft Computer Dictionary
4. Japanese-English Computer Terms Dictionary
Nichigai Associates
4th version
Introduction
This manual gives an overview of the hardware for Saturn, Sega’s Multimedia
Home Entertainment Device, which contains a 32-bit RISC (Reduced Instruction Set
Computer) processor. This manual explains the features and functions of Saturn to
those who develop game software.
Manual Layout
This manual consists of the following chapters, supplements, and index.
Chapter 1 Introduction to Saturn
The features of Saturn are explained.
Chapter 2 Structure
The internal structure of Saturn plus hardware specifications
are explained.
Chapter 3 Functions
The main functions of Saturn are explained.
• CPU
The main CPU, sound CPU, I/O controller.
• SCU
Control of each bus (A-bus, B-bus, CPU-bus),
DMA transfer, and matrix calculation (DSP).
• VDP1
Control of drawing and defines draw control.
• VDP2
Control of the scroll screen and display.
• SCSP
Sound control of the PCM/FM sound source.
• CD-ROM
An overview of the CD-ROM and MPEG.
• Miscellaneous
Explains the SMPC.
i
Related Manuals
VDP1
SATURN User's
OVERVIEW Manual
VDP2
User's
Manual
SCU
User's
Manual
SCSP
User's
Manual
SMPC
User's
Manual
ii
Definitions
DSP (Digital Signal Processor)
This high-speed digital processor mainly performs rapid addition and subtraction.
Gouraud Shading
Gouraud is one type of computer algorithm.
This process computes the color of each position (dot, pixel) of each object being
displayed. Places hit by light are bright, and places shadowed are dark.
C3
An error process that corrects errors when data is read from a CD.
Frame Buffer
Frame buffer is RAM that stores pictures to be displayed. The line buffer was lim-
ited to pictures arranged in a horizontal direction, but with the RAM of the TV
screen size, there you are no longer limits in the horizontal direction.
Pixel
A unit that represents a picture element in a drawing.
PCM Sound Generator (Pulse Code Modulation Sound Generator)
A method of storing in memory PCM data created from sound, reading the sound
from memory at the time that the sound is to be played, and outputting the sound.
Interlace
An image output scan system that obtains the screen image of a single frame by
scanning it twice.
iii
MPEG (Motion Picture (image coding) Expert Group)
An international standard of compression for color motion images (including voice)
of television and video. This standard allows the playing of Full Screen, Full Color,
Full Motion, and CD Quality Audio. Besides conforming to the international stan-
dard, it also has original special functions.
Parts
Divides textured and non-textured parts in a drawing done by the draw command.
Perspective
A technique for creating the impression of distance in computer graphics by show-
ing distance objects as small and nearby objects as large.
Sprite
Image patterns that can be rapidly moved and re-drawn. By preparing a number of
sprite patterns and re-drawing them while moving designated coordinates, an
animation effect can be produced in which the game character appears to be mov-
ing.
High Resolution
Both the normal TV and special monitor are able to display at a high resolution, but
the special monitor has a higher resolution.
Texture Mapping
A computer graphics technique that allows a pattern to be placed on an object.
PCM (Pulse Code Modulation)
A method of dividing sound (wave forms) according to a time axis, and converting
the peak values into digital data. Data found by this method is called PCM data.
iv
Effect Data
Expresses the resulting sound obtained when a sound created by the sound genera-
tor is affected by passing through the DSP.
Reverb
As one type of sound field effect, one can produce the atmosphere of a hall, stage
room, steel plate, etc.
PLL (Phase Locked Loop)
Refers to the phase-locked circuit (IC) that follows to the input signal.
IPL (Initial Program Loading)
A list process language. It outputs the designation that loads programs from the
designated I/O device to the processing device.
Clipping
Clipping removes all image data located outside of the designated draw access area.
PAL System (Phase Alternation by Line system)
Developed in West Germany, this is a color television broadcasting standard of 625
scan lines and 25 images per second.
NTSC System (National Television System Committee system)
Recognized by the FCC (Federal Communication Commission) and applied by
Japan, the United States, South Korea,among others; this standard of color television
broadcasting has 525 scan lines and 30 images per second.
v
List of Figures
Chapter 2 Structure
Figure 2.1 System Block Diagram 7
Chapter 3 Functions
Figure 3.1 SCU System Configuration 13
Figure 3.2 VDP1 System Configuration 16
Figure 3.3 Regular Sprites 19
Figure 3.4 Scaled Sprites 19
Figure 3.5 Distorted Sprites 20
Figure 3.6 Polygon, Polyline, Line 21
Figure 3.7 Configuration of the Color Bank Method 22
Figure 3.8 Gouraud Shading 24
Figure 3.9 Mesh Process 24
Figure 3.10 System Clipping 25
Figure 3.11 User Clipping 25
Figure 3.12 VDP2 System Configuration 27
Figure 3.13 Scroll, Priority Functions 29
Figure 3.14 Mosaic Pattern 31
Figure 3.15 Image Modification by Axis Rotation 31
Figure 3.16 Image Modification by Screen Axis 32
Figure 3.17 Cell Format Scroll Screen 33
Figure 3.18 Bit Map Scroll Screen and Data Setting Relationship 33
Figure 3.19 Windows 34
Figure 3.20 Priority Function 34
Figure 3.21 Color Calculation Function 35
Figure 3.22 Insertion of the Line Color Screen 36
Figure 3.23 Shadow Function 36
Figure 3.24 Blur Calculation Function 37
Figure 3.25 SCSP System Configuration 38
Figure 3.26 Tunnel and BGM Reverb 40
Figure 3.27 Tennis Game Example 41
Figure 3.28 CD-ROM System Configuration 42
Figure 3.29 CD-ROM System Data Flow 44
Figure 3.30 Stream Select Function 45
Figure 3.31 Window Function 46
Figure 3.32 Interpolation, Shading, Mosaic Functions 47
Figure 3.33 Chroma Key Function 48
Figure 3.34 SMPC System Configuration 51
vi
List of Tables
Chapter 2 Structure
Table 2.1 Hardware Specifications <Main System> 6
Table 2.2 Hardware Specifications <Subsystem> 6
Chapter 3 Functions
Table 3.1 CPU Specifications 12
Table 3.2 SCU System Specifications 14
Table 3.3 VDP1 System Specifications 17
Table 3.4 Parts Classification 18
Table 3.5 Interlace 21
Table 3.6 Types of Color Operations 23
Table 3.7 VDP2 System Specifications 28
Table 3.8 Scroll Screen Functions 30
Table 3.9 SCSP System Specifications 39
Table 3.10 CD-ROM System Specifications 43
Table 3.11 CD Drive Specifications 43
Table 3.12 Corresponding Standards 50
Table 3.13 SMPC Functions 52
Table 3.14 Saturn Digital PAD Specifications 52
vii
Chapter 1 Introduction to Saturn
Contents
Highlights 2
Saturn Overview Manual 1
1.1 Highlights
• Leading Edge CD-ROM Drive
• High-Speed Micro-Processor
• Large-Capacity Memory
• The main CPU is a 32-bit RISC chip
- SH-2 loader that supports a DSP-type computer.
• Memory
- 32 Mbits (4 Mbytes)
- 4 Mbit (512 Kbyte) CD-ROM
• Powerful Graphics Functions
- Up to 16,777,216 colors
- 24 million pixels/Sec (VDP1)
- Sprite processor that can display polygons
- High performance background processor
2
SEGA SATURN
DUAL CPU MULTI AMUSEMENT PLAYER
SEGA CD ROM / CARTRIDGE
• Improved Sound Functions
- 32 Channel PCM sound generator
- FM sound generator
- Audio-only effect DSP loader
• Leading Edge CD-ROM Drive
- 32-bit RISC chip SH-1 loader
- MPEG (optional)
• Development Language
- C language, Assembly language
Saturn Overview Manual 3
4
Chapter 2 Structure
Contents
2.1 Hardware Specifications 6
2.2 System Configuration 7
2.3 Description of each Part 8
Saturn Overview Manual 5
2.1 Hardware Specifications
Saturn hardware specifications are shown below.
Table 2.1 Hardware Specifications <Main System>
SH-2 X 2
CPU 32-bit RISC Chip 28.6MHz / 26.8
Internal Math Processor
RAM 2MB
CPU BLOCK ROM 512KB
DMA 2 ch
SCU
DSP 14.3 MHz
RTC 1 MHz (accuracy)
SMPC
Employs Peripheral Interface
VDP1 Max. 400,000 pixels, 1/60 sec. transfer
Screen Resolution 320 dot (H) X 224 dot (V)
VDP2
VIDEO BLOCK up to 5 background screens
VDP1: 1 MB
RAM
VDP2: 512 KB
PCM 32 ch, max. 44.1 KHz
SCSP
DSP 22.6 MHz Acoustic effects only
SOUND BLOCK RAM 512KB
MC68EC000
CPU
16-bit CISC 11.3 MHz
Table 2.2 Hardware Specifications <Subsystem>
SH-1
CPU
32-bit RISC Chip 20.0 MHz
RAM 512 KB
RAM 512KB
MPEG AUDIO / VIDEO
Screen Resolution 704 dot (H) X 480 dot (V)
(optional)
30 frame/sec animation, 44.1 KHz 16-bit audio
6
2.2 System Configuration
With a DSP function built-in to the 32-bit RISC chip (SH-2) that is loaded on to the
main CPU, the system configuration has greatly improved the processing perfor-
mance.
CARTRIDGE I/F
< MAIN SYSTEM > < SUBSYSTEM >
CPU BLOCK VIDEO BLOCK
SCU VDP1
CD-ROM
DRIVE
CD OPTIONS
RAM1MB I/F
SH-2 X 2 MPEG
SH-1 VIDEO
VDP2
RAM2MB
RAM2KB
MPEG
RAM512KB VIDEO
SOUND BLOCK ROM64KB
ROM512KB
SCSP MC68EC000
SMPC RAM512KB RAM512KB
RAM512KB
D/A CONVERTER ENCODER
(SOUND)
L R
PAD I/F
AUDIO VIDEO
OUT OUT
Figure 2.1 Block Diagram
Saturn Overview Manual 7
2.3 Description of Each Part
The block diagram in Figure 2.1 is explained below.
Main System
SH-2 (X2)
Control of the entire system is done by the main CPU. With a RISC type high-speed
CPU, there is a noticeable difference in processing performance over conventional
systems. Processing power has been dramatically improved due to a processor
inside that has an arithmetic unit similar to that of a DSP.
MC68EC000
The MC68EC000 carries a 16-bit CPU for sound. Processing speed is much faster
than earlier systems.
RAM/ROM
The RAM has a total of 32 Mbits, with 16 Mbits in the main CPU, 4 Mbits in the
sound CPU, and the remaining 12 Mbits allocated to video. ROM contains the initial
hardware program and cartridge as well as the CD IPL program. It also contains a
CD library.
SMPC (System Manager & Peripheral Control)
SMPC controls reset of the entire system and interfaces with peripheral devices such
as a control pad. Also, with an internal RTC (Real Time Clock) you can get the date
and time. When the power is off the RTC function is backed-up by a battery.
SCU (System Control Unit)
The SCU controls all buses (A-bus, B-bus, CPU-bus) and functions as a co-processor
of the main CPU. Because the DMA controller is loaded internally, character data
can be transferred to V-RAM when the main CPU is operating.
8
VDP1 (Video Display Processor 1)
VDP1 controls sprites (character). The limitation in the number of horizontal sprites
of previous systems has been eliminated, allowing more sprites (characters) to be
displayed. Polygons can also be displayed.
VDP2 (Video Display Processor 2)
VDP2 controls display of the background screen (scroll screen) as well as the display
priority order. This has expanded the number of scroll screens that can be displayed
at the same time to a maximum of five, and enables the screen to be moved up,
down, right, and left and to be rotated.
SCSP (Saturn Custom Sound Processor)
The SCSP controls the sound of the PCM/FM sound generator. It supports the FM
sound generator of conventional systems and can support PCM sound. Tone quality
has improved to CD-D/A (Compact Disc - Digital / Audio) levels.
Cartridge I/F
This is the connector I/F for the cartridge. A maximum of 57 MB area has been
provided.
PAD I/F
This is a control pad connector I/F. Two are planned to be loaded into the main
system.
D/A Converter, Encoder
This changes the digital signal of sounds to an analog signal (D/A converter). In the
case of color, analog RGB is converted to video signals (encoder).
Saturn Overview Manual 9
Subsystem
CPU
The CPU manages mechanical control, error correction (C3), and CD file manage-
ment.
RAM/ROM
RAM is used as CD buffer RAM, MPEG work RAM, and in the data cache for CD
error correction. ROM contains programs such as the CPU CD BIOS.
CD-ROM Drive
Saturn employs a X2 speed CD-ROM drive.
MPEG (optional)
This standard allows the playing of Full Screen, Full Color, Full Motion, and CD
Quality Audio. Up to 72 minutes (30 frames per second) of images and sounds can
be recorded on a single CD. In addition, there are various application capabilities
that not only output the stretched images, but capture them within the system and
enable their processing using MPEG technology.
10
Chapter 3 Functions
Contents
3.1 CPU 12
3.2 SCU 13
3.3 VDP1 16
3.4 VDP2 27
3.5 SCSP 38
3.6 CD-ROM 42
3.7 Other Items 45
Saturn Overview Manual 11
3.1 CPU
The main CPU has a 32-bit RISC chip with built-in DSP function. The sound block
has a 16-bit CPU MC68EC000. The subsystem has a SH-1. The specification of each
CPU is shown in Table 3.1.
Table 3.1 CPU Specifications
• RISC Type Instruction Set
• Internal and External 32-bit buses
SH-2 • Cache 4 Kbyte
• Clock 28.6 MHz / 26.8
• Internal Math Processor
SH-1 • RISC Type Instruction Set
• Internal A/D Converter
• Internal 32-bit bus and External 16-bit bus
• Clock 20 MHz
• Cache 4 Kbyte
• Internal Math Processor
MC68EC000 • Internal 16-bit bus and External 16-bit bus
• CISC Type Instruction Set
• Clock 11.3 MHz
• SMPC (System Manager) is the processor configuration.
See “3.7 Other Items” for more about functions.
12
3.2 SCU
The SCU smoothly executes the interface of more than one processor connected to
CPU-bus, A-bus, and B-bus. Further, inside is a DMA controller, interrupt controller,
and DSP.
System Configuration
The SPMC is connected to the CPU-bus and controls the system reset signal as well
as the control pad.
The A-bus is connected to a device that provides programs such as cartridges and
CDs.
The SCU interrupt controller controls interrupt from A-bus, B-bus, and the SMPC. It
also supports timer interrupt, can cause the screen display to synchronize and inter-
rupt (INT signal) (Figure 3.1).
INT Signal A-Bus
CPU CPU-bus SCU B-Bus
RAM ROM SMPC
Figure 3.1 SCU System Configuration
Saturn Overview Manual 13
System specifications of the SCU are shown in Table 3.2.
Table 3.2 SCU System Specifications
No Item Specification Remarks
1 • 32bit X 32bit → 48bit
• 14 MHz
DSP • Program RAM 32bit X 256word
• DATA RAM 32bit X 64word X 4
• DMA command
2 • CPU 3 ch, DSP 1 ch
DMA • 3 level, stack 1 set
• Able to start by interrupt
• Indirect mode
4 • Timer (2ch) synchronized with screen
Interrupt Control
• Interrupt control from external terminal
5 • A-bus (external bus) bus sizing
A-bus Control • Wait control
• Burst size setting
• Refresh control
6 B-bus Control • B-bus (internal bus) control • VDP1, VDP2, SCSP only
14
Functions
SCU functions are shown below.
• Data transfer within A-bus, B-bus, and CPU-bus
• Matrix calculations by DSP
• SCU internal interrupt control by interrupt controller
• Data transfer within Main CPU, Internal DSP, A-bus, and B-bus
The SCU has a CPU I/F, A-bus I/F, and B-bus I/F and smoothly executes the inter-
face to multiple processors, which are connected through their respective I/F and
buses. This also allows programs in the main CPU to be transferred to the DSP
within the SCU. Also, while data is being transferred between the A-bus and B-bus,
the work area can be accessed using the CPU-bus from the CPU, and process can be
executed using independent buses in parallel.
• Interrupt Control
Interrupt that extends to other processors executes through the SCU. For example,
to display the volume level on screen, a screen display request interrupt from the
SCSP for the SCU occurs. SCU recognizes the interrupt and issues the interrupt
while synchronized with the screen. Interrupt can then be issued with respect to any
point (dot) on the screen.
Internal DSP
SCU has an internal DSP. This has been provided in order to implement processes
difficult to implement when the load to the main CPU has been excessive.
Operating Frequency
The operating frequency of the DSP inside SCU runs at a frequency of 1/2 the main
CPU. See the Main CPU manual concerning the operating frequency of the main
CPU.
Saturn Overview Manual 15
3.3 VDP1
VDP1 controls sprites.
Compared to conventional systems, drawing speed is exceptionally fast, and be-
cause there is no limit in the number of horizontal sprites, more sprites (characters)
can be displayed. Polygons can be displayed as sprite applications.
System Configuration
The VRAM and two frame buffer screens are connected to VDP1 (Figure 3.2). The
VRAM draw command is set through the SCU from the CPU. VDP1 reads draw
commands from the VRAM and writes (draws) draw data to the frame buffer. Infor-
mation controlling draw is set in the system register inside VDP1. Drawn frame
buffer data is displayed in the TV through VDP2 that controls image display.
VRAM
VDP1
CPU SCU System VDP2 TV
Register
Frame Buffer Frame Buffer
Figure 3.2 VDP1 System Configuration
16
Table 3.3 shows the VDP1 system specifications.
Table 3.3 VDP1 System Specifications
No Item Specification Remarks
1 Texture Parts • Regular Sprites Up-down-left-right
Display (normal sprite, horz. 8~504 dot, reverse by all sprites is
possible
vert. 1~255 dot)
• Expand/Contract Sprite
(any size can be designated by vertical
horizontal 1 dot units)
• Distorted Sprite
(can designate any 4 vertices)
2 Non-Texture Parts
• Quadrilateral polygon
You can have a three -
Display sided polygon and
• Polyline polyline if two adjacent
• Line points have the same
coordinates
3 Color Calculation • Semi-transparent associated parts Gouraud shading can be
• Half brightness combined with semi-
transparent or half
• Shadow brightness
• Mesh
• Gouraud Shading
4 Draw Method • Double Frame Buffer Method
(Can enlarge, reduce, rotate, and modify
the entire plane of the frame buffer.
Can designate the delete range and
delete data of frame buffer.
Can set write local coordinates.
Can designate clipping of rectangular
area.)
5 Simultaneous Colors • 16, 64, 128, 256, 32768 colors 16, 64, 128, 256
for high resolution
6 Memory Capacity • VRAM 4 Mbit
(Character Generator, for all types of
tables)
• Frame buffer 2 Mbit X 2 sides
(Both 2 sides can be used as bit map.
One side is displayed.)
Saturn Overview Manual 17
Functions
The main functions of the VDP1 are shown below.
• Draws parts (character line)
• Designates color mode
• Color calculation
• Mesh process
• Designates clipping coordinates and relative coordinates
• Display control of frame buffer
Parts, color mode, and coordinates are controlled by the VRAM command table.
Control of the frame buffer display is done by the system register.
Parts
Parts drawn by VDP1 are divided into texture and non-texture parts depending on
whether or not there is an original picture. Table 3.4 shows part classifications.
Table 3.4 Parts Classification
Classification Parts Name Function Defining Method
Texture Parts Regular sprite Character, up-down, Read direction of 1
left-right reverse vertex
P Rectangular sprite Character, up-down, Read direction of 2
A left-right reverse, vertices, or read
R enlarge-reduce, direction of fixed
T expand-contract are points and width
S possible
Transformed sprite Character, up-down, Read direction of 4
left-right reverse, vertices
enlarge-reduce,
expand-contract,
rotation, twisting are
possible
Non-Texture Parts Polygon Quadrilateral 4 vertices
Inside is painted solid
Polyline Quadrilateral 4 vertices
Line Straight Line Start and End points
18
Texture Parts
Sprites draw character patterns. Character patterns define pixel data as character
pattern tables in VRAM.
Regular Sprites
Normal rectangular sprite.
The pattern of the original picture can be inverted up , down, and left and right.
This can be done in any sprite mode (Figure 3.3).
< Original > < Drawings >
Normal Left-Right Up-down Up-Down
Reverse Reverse Left-Right Reverse
Figure 3.3 Regular Sprites
Scaled Sprites
For sprites that can be enlarged and reduced, it is only possible to zoom in and out
vertically and horizontally (Figure 3.4).
< Original > < Drawings >
Reduce Vert
Normal Reduce
Horz.
Expand Horizontally
and Vertically
Expand Horizontally Expand Vertically
Figure 3.4 Scaled Sprites
Saturn Overview Manual 19
Distorted Sprites
These are sprites that can be distorted. The original picture can be distorted to any
shape by designating four vertices of the character and enlarging, reducing, rotating,
and reversing the picture in any way. If viewed as a polygon, it would be the same
as a texture-mapped polygon.
ORIGINAL
ROTATE
CHANGE SHAPE
PULL AT1 POINT PUSH IN TOWARD CENTER
TWIST
PUSH AT1 POINT
SHIFT ALL POINTS
Figure 3.5 Distorted Sprites
20
Non-Texture Parts
Polygon
This is a four-vertex polygon. It is different with a sprite in that the flat surface
encompassed by the four points is painted over by one color. Sprites have an origi-
nal picture whereas polygons do not.
Polyline
This is a quadrilateral connected by four lines.
Line
This is a line of one color drawn between two points.
POLYGON POLYLINE
LINE
Figure 3.6 Polygon, Polyline, Line
Display
A common TV is used as a display apparatus. NTSC format is the TV standard of
both Japan and the U.S. Europe uses the PAL format.
TV display is done by reading data from lead of the frame buffer for each frame (1
frame per 1/60 sec.).
Normally, one frame is equal to one field, but one frame that is interlaced is treated
as two fields, allowing the vertical resolution to be doubled (one frame per 1/30
sec.). There is single and double interlace, as shown in Table 3.5.
Table 3.5 Interlace
Double Interlace Odd numbered line, a different image is shown by even numbered lines
Single Interlace Odd numbered line, the same image is shown by even numbered lines
Saturn Overview Manual 21
Color Mode Designation
There are three methods of designating color modes for textured parts: the color
bank, RGB code, and color look-up. Non-textured parts have pixel data for color
designation.
Color Bank Method
• Combining color bank with 16, 64, 128, and 256 color palette codes, references
colors stored in the VDP2 color RAM.
• VDP2 color palette is selected by the color bank. Color from the color palette is
selected by the palette code.
• 16, 64, 128, 256 colors can be expressed by 1 character.
• Data written by the color bank method is divided and processed by the VDP2
color operation, priority, color bank, and function bits of the palette code.
MSB LSB
Color Bank Palette Code
Priority
Color Operation
Figure 3.7 Configuration of the Color Bank Method
RGB Code Generation
Color is expressed by five bits of respective RGB (red, green, blue) luminance.
Color Look-up Table
Colors are selected from the 16 colors defined in the color look-up table. One color
with 16 bits can be of either RGB code or color bank code.
22
Color Operation
Gouraud Shading, shadow, half-brightness, and semi-transparent color operations
can be designated by VDP1. Table 3.6 shows the types of color operations.
Table 3.6 Types of Color Operations
TYPE DESCRIPTION
Semi-transparent A foundation at half brightness is added to the original at half
brightness. The result is drawn in the frame buffer.
Half-Brightness An object at half the brightness of the original picture is drawn
in the frame buffer. The foundation cannot be seen because i
is written over and the brightness of the original is reduced to
half.
Shadow The foundation at half-brightness is re-drawn in the frame
buffer. Here, a shadow of the character shape in the original
can be created. The character of the original is used only in th
shape of the shadow and color data is ignored.
Gouraud Shading An object in the original picture to which Gouraud shading is
applied is drawn in the frame buffer.
Gouraud Shading The brightness of an object in the original picture to which
Semi-transparent Gouraud shading is applied is reduced to half, and foundation
at half-brightness is added. The result is drawn in the frame
buffer.
Gouraud Shading The brightness of an object in the original picture to which
Half Brightness Gouraud shading is applied is reduced to half, and the object i
drawn in the frame buffer.
Gouraud Shading
Gouraud shading can be applied to parts drawn by RGB, and interpolates color
between polygon vertices which causes a flat surface to appear curved.
A surface can appear to be curved by giving brightness correction values to the four
vertices of a polygon and applying Gouraud shading within these four vertices.
Gouraud shading can be applied to polylines and lines as well. Figure 3.6 shows an
example of Gouraud shading.
Saturn Overview Manual 23
Figure 3.8 Gouraud Shading
Mesh Process
Mesh can be applied to all parts. A checkered pattern (every other dot) is drawn to
the part in which the mesh is applied.
0 1 2 3 4 5 6 7 8 9
0 "X coordinate value + Y coordinate
1 value" is painted only for even
2 numbered pixels; odd numbered
3 pixels are skipped and not written.
4
5
6 : not painted
7 : painted
8
9
Figure 3.9 Mesh Process
24
Clipping
Clipping allows only the set display area to be drawn and cuts away any excess.
Clipping includes system clipping that sets the system draw area, and user clipping
that enables any setting by the software.
System Clipping
System clipping is always in effect while drawing. and the inside of the set area is
drawn (see Figure 3.10).
(0,0)
System Clipping Area
System clipping can be designatedby
fixing the upper left coordinate (0,0)and
defining the lower right coordinate
Lower Right Coordinate
TV
Figure 3.10 System Clipping
User Clipping
User clipping can be selected by the software. Choose whether to make user clip-
ping effective for each part, or the inside or outside of the user clipping set area of
the effective area.
(0,0)
User Clipping Area
User clipping area can be
designated by selecting the
Upper Left verticies of the upper left and
Coordinate lower right coordinates.
Lower Right Coordinate
TV
Figure 3.11 User Clipping
Saturn Overview Manual 25
Frame Buffer
• The frame buffer is divided into two screens, the display frame buffer and draw
frame buffer. Read/Write access from the SCU to the frame buffer is performed
only for the draw frame buffer. The display frame buffer becomes a back-end
bank and cannot be accessed.
• By reading the frame buffer, the read start coordinate and next dot to be read can
enlarge, reduce, and rotate the entire frame buffer surface by giving X and Y
direction displacement, which designates the location.
26
3.4 VDP2
VDP2 determines priority of display of the scroll screens and the entire screen (in-
cluding sprites). Simultaneous display of scroll screens has been expanded to a
maximum of five screens. A screen can be moved up, down, left, and right, and
rotated. Priority (display priority order) can be programmably set on each character.
System Configuration
VDP2 has VRAM connected to it and color RAM built-in. Image data is defined
from the CPU through the SCU to VRAM and color RAM.
Data defined in VRAM is read according to settings of the register and becomes
image data of each scroll screen. This data, VDP1, as well as image data sent from
the external image circuits determine the display priority order according to the
register setting, then become display image data. Display image data is converted to
display color data and output to the TV (Figure 3.12).
External Image
VDP1 Circuit
(optional)
VDP2
Register TV
CPU SCU
Color
RAM
VRAM
Figure 3.12 VDP2 System Configuration
Saturn Overview Manual 27
Table 3.7 VDP2 System Specifications
No Item Specification Remarks
1 TV Screen • Horizontal Resolution Vertical resolution of 256
Select from 320, 352, 640, 704 pixels pixels and 512 pixels are
for PAL only.
• Vertical Resolution
Select from 224, 240, 256 pixels
(for non-interlace)
Select from 448, 480, 512 pixels
(for Interlace)
2 Character
• Character Size
Bit map format is also
possible.
Select from 1 X 1 cell and 2 X 2 cell
• Number of character colors
Select from 16, 256, 2048, 32768, and
16,770,000 colors.
3 Normal Scroll • Max. no. of simultaneous screens is 4
Screen • Scrolls horizontally and vertically
• Can line scroll
• Scrolls vertical cells
• Reduces to 1/4, enlarges to 256X
• Mosaic function
4 Rotation Scroll • Max. no. of simultaneous screens is 2 Normal scroll screen can
Screen • Can Enlarge, Reduce, Rotate not be displayed when 2
screens are displayed
• Rotation parameter can be switched
inside screen
• Special Screen processing by
coefficient table
5 Windows • Normal window 2 screens
• Sprite window 1 screen
• Line window possible
6 Priority • Priority of each screen is programmable
• Priority can be switched in character
units and dot units
7 Screen Operation • Color operation for up to 4 screens is
possible
• Color operation rate 32 steps
• Color offset function
• Shadow function
28
Functions
VDP2 has a scroll function for controlling the display of the scroll screen, and a
priority function for determining the display priority order (Figure 3.13).
Scroll Functions Magnify and Reduce
Rotation
Line Scroll
Vertical Cell Scroll
Mosaic Process
Window
Priority Functions Determine Priority
Color Operation
Color Offset
Shadow
Figure 3.13 Scroll, Priority Functions
Scroll Functions
Scroll has a scroll screen for displaying pictures and windows for display control.
• Scroll Screen
Scroll screen includes a normal scroll screen that can change the number of
displayable screens, and a rotation scroll screen that can rotate a screen.
Table 3.8 shows the functions of the normal scroll screen and rotation scroll screen,
and number of character colors.
Saturn Overview Manual 29
Table 3.8 Scroll Screen Functions
Function Normal Scroll Screen Rotation Scroll Screen
Screen 0 Screen 1 Screen 2 Screen 3 Screen 0 Screen 1
Enlarge/Reduce
1/4 X ~ 256 X no any factor
Rotation no yes
Line Scroll yes yes no no no
Vertical Cell Scroll yes yes no no no
Mosaic Process yes yes
(only in horizontal)
Displays Bit Map yes yes no no yes no
Character Color Select from Select from Select from Select from Select from Select from
Number
16 16 16 16 16 16
256 256 256 256 256 256
2048 2048 2048 2048
32768 32768 32768 32768
16.77 mil. 16.77 mil. 16.77 mil.
• Enlarge/Reduce Function
Enlarge and reduce the entire screen horizontally and vertically. Reduced display
horizontally limits the number of screens.
• Line Scroll Function
Scroll up, down, right, and left each line as well as enlarge and reduce horizontally.
This creates the feeling of distance, such as the road of a driving game.
• Vertical Scroll Function
Scroll up and down in units of horizontal cells. It can create depth as in a vertical
scroll game.
• Mosaic Function
All scroll screens are divided horizontally and vertically, and the color of upper-left
dots in each area are displayed per dots in that area.
30
The color of the dot in the upper
left corner of each area is used
Horizontal direction in all dots within that area.
Mosaic Size
Vertical direction
Area A Area B
Mosaic Size
Area C Area D
Figure 3.14 Mosaic Pattern
Rotation Function
• Rotation Display
The rotation scroll screen rotates along the coordinate axes (X, Y, Z axes) and the
screen axis vertical to the TV screen. Two surfaces can be displayed at the same
time.
Z axis
X axis
Y axis
X axis Rotation Y axis Rotation Z axis Rotation
Figure 3.15 Image Modification by Axis Rotation
Saturn Overview Manual 31
Figure 3.16 Image Modification by Screen Axis
• Rotation
Rotation calculation is done by the hardware according to designated parameters.
This means that rotation display can be done without straining the CPU load.
Twisted images can be displayed since coordinates can be calculated and different
values applied to each dot.
• Simultaneous Display by Screen Division
The image of two screens can be displayed by showing one screen of the rotation
scroll screen.
Scroll Screen Structure
The two scroll screen formats are the cell format and the bit map format. The cell
format, as in conventional home game devices, displays an arrangement of cells.
The bit map format, as with the personal computer, displays a picture that corre-
sponds to each dot on a screen.
• Cell Format
The cell format scroll screen is a picture pattern consisting of cells (eight horizontal
dots by eight vertical dots), character patterns (an arrangement of cells), pages (an
arrangement of character patterns), planes (an arrangement of pages), and maps (an
arrangement of maps). Figure 3.17 shows the structure of a cell format scroll screen.
32
Character
Cell Pattern Page Plane Map
H8 dots X
V8 dots H1 cell X
V1 cell
or 32 X 32 H1 page X H2 plains X
H2 cells X or V1 page V2plains
V2 cells 64 X 64 or (Normal Scroll Screen)
character H2 pages X or
patterns V1 page H4 plains X
(64X64 cells) or V4plains
H2 pages X (Rotation Scroll Screen)
NOTE: V = vertical
H = horizontal V2 pages
Figure 3.17 Cell Format Scroll Screen
• Bit Map Format
The bit map scroll screen consists of a bit map pattern 512 dots or 1024 dots horizon-
tally and 256 dots or 512 dots vertically in size. Figure 3.18 shows the configuration
of the bit map scroll screen.
Bit Map
1 dot
H 512 X V 256 dots
H 512 X V 512 dots
H 1024 X V 256 dots
NOTE: V = vertical or
H = horizontal H 1024 X V 512 dots
Figure 3.18 Bit Map Scroll Screen and Data Setting Relationship
Windows
Windows are classified into three types depending on the way the area is designated
(coordinate designation).
• Normal Rectangular Window
Designated by two coordinate points: start and end.
• Normal Line Window
Designated by the start and end points of each line coordinate.
• Sprite Window
Designated by sprite character patterns.
Saturn Overview Manual 33
TV Screen TV Screen TV Screen
Inside Inside Inside Window
Window Window
Outside Outside Outside
Window Window Window
Normal Rectangle Window Normal Line Window Sprite Window
Figure 3.19 Windows
Priority Functions
The display priority order of sprites and scroll screens is determined by a 3-bit
priority number. The sprite priority number can set a maximum of eight values; one
of which is designated by character units.
Determining Priority
The scroll screen priority number is designated in normal surface units. (This can be
changed by character units or dot units using special priority function.)
Priority Priority Priority Priority
Number=6 Number=4 Number=2 Number=1
transparent transparent transparent
Top Image Second Image Third Image
Figure 3.20 Priority Function
• Special Priority Function
Priority numbers that correspond to each scroll screen can be changed by character
or dot units. This function the priority of only the area within the scroll screen to be
changed, which causes one scroll screen to appear like as more than one screen.
34
Color Calculation Function
By adding multiple screens of color data, the color calculation function produces an
effect that makes the back screen appear to be seen through the front screen. This is
normally done by two screens, the top image and the second image, but can be done
with up to four screens if the expanded color calculation function is used.
Priority Number = 4 Priority Number = 2
transparent transparent
Back
Screen
Figure 3.21 Color Calculation Function
• Line Color Screen Insert
The line color screen forces the top image part of the designated screen to be inserted
as the second image, and induces color calculation. The pre-inserted second image
becomes the third image in the area of the inserted line color screen, and the third
images drops one to become the fourth image. Figure 3.22 shows insertion of the
line color screen.
Saturn Overview Manual 35
Priority number =6 Priority number =4 Priority number =2 Priority number =1
transparent transparent
transparent
screen the line color screen screen the line color screen
has been inserted into has been inserted into
line color screen
back screen back screen back screen
top image second image third image fourth image
Figure 3.22 Insertion of the Line Color Screen
Shadow Function
The shadow calculation function adds a shadow in the shape of the sprite character
on all screens.
Frame Buffer Data Scroll Screen Output Screen
transparent
+ =
Shadow Sprite Normal Sprite
Figure 3.23 Shadow Function
• Blur-Calculation Function
The blur-calculation function adds the horizontal color data of one designated screen
at a fixed rate, and is able to create an effect of a blurred distant background.
36
Priority number = 6 Priority number = 4 Priority number = 2
transparent transparent
Screen A Screen B Screen C
Screen designated
to be blur-calculated
Top Image Second Image
Screen C
Screen B
Screen C
Screen A
Replaced as a result of
blur-calculation on
screen C
Second Image
Blur-Calculated
Screen C
Screen B
Color Operation
Color Function used in Screen C
Display Image
Blur-Calculated
Screen B Screen C
Screen A
Figure 3.24 Blur-Calculation Function
The sum of color data is forced to be as second image in the area where the top or
second image is the designated screen. The blur-calculated picture can be displayed
by performing color calculation on the second and top images.
Color Offset Function
The color offset function displays and adds (or subtracts) the offset value for the
screen color data, and is used in fade-in and fade-out. Designate whether to use the
color offset function in each screen.
Saturn Overview Manual 37
3.5 SCSP
SCSP is custom sound LSI that unites PCM (FM) sound generation with a sound
only DSP. The goal of the audio function is to provide higher tone quality with all
interfaces for increasing expandability. Capable of creating many sounds, the opera-
tion part provides a performance that rivals that of a synthesizer. The DSP can
create multiple sound fields, such as each type of sound field play as well as the
special effects of 3D sound positioning.
System Configuration
The main CPU, sound CPU, sound memory, and D/A converter are all connected to
the SCSP. In the sound system, these can operate independent of the main processor.
The main CPU transfers the sound (CPU, DSP) program and wave form data to the
SCSP sound memory through the SCU. The sound CPU transfers wave form data to
the register inside the SCSP. SCSP reads delayed data for producing sound memory
wave form data as well as the effect. The audio is mixed and output as sound
through a D/A converter.
SCU
SCSP Sound Memory
(DRAM)
Sound CPU CPU Program
Interface
MC68EC000
PCM(FM) PCM Sound Data
DSP DSP Delayed Data
MIXER
D/A Convertor
Figure 3.25 SCSP System Configuration
38
System Specifications
Table 3.9 shows the SCSP system specifications.
Table 3.9 SCSP System Specifications
No Item Specifications Remarks
1 Sampling Frequency • 44.1 KHz
2 Audio Synthesis System • PCM, FM Format
3 Audio Process Slot Number • 32 slots
4 Wave Form Data Format • 8-bit, 16-bit formats
2'S complement
5 Each function type • Envelope
• Loop Process
• LFO
6 Effect from internal DSP • Reverb, Chorus, etc.
7 Other functions • DMAC ......................... 1ch
• Timer ............................ 3ch
• MIDI ............................. IN/OUT each 1
• External D/A Input ....... Stereo1 system
Functions
The main functions of the SCSP are listed below.
• Frequency control
• Volume control
• FM operation
• LFO (Low Frequency Oscillator) modulation function
• Digital / Audio mixing
• Effect from DSP (reverb)
Saturn Overview Manual 39
Effect
Because the SCSP DSP can create multiple sound fields, it is possible to have differ-
ent settings for BMG sound and game sound.
For example, in a racing game, reverb would be applied to the concert grounds as
BGM while reverb could be applied at the same time in producing an atmosphere
inside a tunnel for the game.
r
rrrr
roa
Reverb applied to
create a tunnel
atmosphere
Effect applied to
BGM (CD voice)
Figure 3.26 Tunnel and BGM Reverb
In the DSP, the effect can be applied to CD audio because the audio signals from the
sound generator, and sound signals from the CD are input. Because the CD output
level can be controlled through the SCSP, the sound signal from the sound generator
and CD can be balanced and therefore the sound from the sound source will still be
audible without being “hidden” by the CD sound. Thus, concealing the CD sound
will not conceal the sound of the sound generator.
40
Sound Position
With a high performance digital mixer, the SCSP can control the positions of all
sounds in real time. As a result, effective sounds can be produced on the screen with
character positions. This process can be done by the DSP as well. In this case, when
the character moves slowly, the sound orientation will move smoothly because more
intricate settings can be made. A sense of depth (distance) can be created by adding
reverb to this positioning.
pachinn
pachinn
A sense of distance can be created by
changing the echo according to the
distance. This includes fixed positions (pan)
also.
Sense
ofdistanc
pachinn
L R
Fixed Position (pan)
Figure 2.27 Tennis Game Example
Besides this, indoors, outdoors, and wide open spaces can be expressed depending
on the type of reverb. Also, the type of reverb can also be set for all conditions, such
as a hall, stage room, steel plate, etc.
Saturn Overview Manual 41
3.6 CD-ROM
The CD-ROM system has its own CPU and buffer RAM, and can operate indepen-
dently of the main system. By setting in advance conditions from the main system,
flexible buffer management that suits the application configuration is attained.
System Configuration
The CD-ROM system operates only by giving commands through CD I/F from the
main system. The sub-CPU interprets commands from the main system, controls the
CD-ROM drive and CD buffer, reads data, and plays video and audio. Audio and
video playing employs the MPEG international video compression standard, and
uses the exclusive “MPEG/Video LSI” as well as “MPEG / Audio LSI.” The system
configuration is shown in Figure 3.28.
The sub-CPU, CD buffer, frame buffer, C/D I/F are connected to the MPEG / Video.
Compressed image data is received from the CD buffer and regeneration image data
is written (drawn) to the frame buffer. Drawn frame buffer data carries out the effect
according to register settings and displays in the display device through VDP2 the
controls screen display; or it is transferred to VDP1 and VDP2 VRAM through CD I/
F and SCU.
MPEG / Audio receive compressed audio data from the CD buffer and outputs
stereo 1ch audio data. This audio data is output through the SCSP as sound.
<CD-ROM System> <Main System>
SCU
CD Buffer CD Drive
Speakers
A-bus B-bus
Audio
SubCPU SCSP
(SH-1) CD I/F
MPEG MPEG Image
Audio Video VDP2
TV
Frame
Buffer
Figure 3.28 CD-ROM System Configuration
42
CD-ROM system specifications are shown in Table 3.10, and CD drive specifications
are shown in Table 3.11.
Table 3.10 CD-ROM System Specifications
No Item Specifications Remarks
1 G/A Register width 16 bit
2 Seek Time 400 msec (1/3 access time, double speed
rotation time)
3 Rotation Speed Normal time: 620~1680 rpm
2X speed: 1240~3360 rpm
4 CD Read Speed Normal speed: 75 sectors/sec = 150KB/sec
2X speed: 150 sectors/sec = 300KB/sec
5 Tray Open & Close Method Top loading
6 Memory Capacity RAM 512KB (for CD buffer) ROM 64KB (for
BIOS) RAM 512KB (for MPEG)
7 Data Transfer Speed Max. 8MB/sec, max. 4MB/sec while MPEG is
in operation
8 LED Flashes according to CD operation status
Table 3.11 CD Drive Specifications
No Item Specifications Remarks
1 CD Play Track/Index designation play
Frame address (in absolute time) designation
play
Play restarts (Cancels pause, controls pick-up
movement)
Repeat play
able to control CD-DA and CD-ROM by
commands of identical format
Scan regeneration
Retrieve subcode
2 Other Corresponds to Multi-session
Corresponds to Emphasis
Decode and error correction corresponding
to CD-ROM XA
(Subheader recognition, ECC process, Read
retry process)
Saturn Overview Manual 43
Functions
The main functions of the CD-ROM system are shown below.
• Stream select
• Parallel processing
• MPEG functions
-Video play
-Pause screen play (high detail, JPEG)
-Window function
-Visual effect function
(mosaic, shading, Chroma key, fade in / fade out)
- play function
-Pause, freeze, frame feed, slow motion
-MPEG buffer function
CD-ROM system first stores data read from the CD-ROM to the CD buffer. The
stored data reads/writes to the main system or MPEG in response to commands
from the main system. Figure 3.29 shows the data flow of the CD-ROM system.
CD-ROM MPEG Buffer MPEG Decoder
Play Decode
Read Write VDP2
CD Read = Read Write
Display
Copy Move CD buffer
(buffer section) MPEG Frame Buffer
Write
Image Data
CD Block
Host
Data transfer Register MPEG Register
Retrieve Write Retrieve
Host
Figure 3.29 CD-ROM System Data Flow
44
Stream Select
Data flow from the CD-ROM is called a stream. A stream has audio data, image
data, and program data. The stream select function selects the classification of data
and sends it to the main system and MPEG (Figure 3.30). Control content of the
stream select function is shown below.
• Stream data accumulates in the CD buffer and is selected in response to the
data classification.
• Data from devices such as a CD-ROM and MPEG decoder are controlled
uniformly.
• Stream select conditions are set by command.
Select Buffer
V→
Video
↓
CD-ROM XA
A→ Main
Audio
System
↓
D A V D A V
V : Video D→
A : Audio Data
D : Data ↓
Figure 3.30 Stream Select Function
Parallel Processing
The CD-ROM system reads streams, it also selects streams and controls the CD drive
independently of the main system. Further, parallel processing can be done since
more than one stream selection mechanism is set.
Saturn Overview Manual 45
MPEG Function
MPEG plays animation with sound added.
Image data is compressed to 1/50 and audio data is compressed to 1/10 before
being played. Therefore, 74 minutes can be recorded on a CD. An exclusive LSI
allows a game with animation (movie) of high image quality to be played without
overloading the CPU.
MPEG / Video Function
Saturn’s MPEG/Video has various special functions that are exclusively customized
for Saturn.
Window Function
As shown in Figure 3.31, this function cuts out part of the image played and displays
it at any size on the TV screen. This function allows the display position of the
MPEG play image and display size to be changed, to select and display one of sev-
eral screens, and zoom in, and zoom out.
MPEG Play Images
Expressions
such as "open
window" are
allowed
Animation (object 1) Animation (object 2)
Image from VDP1, 2
Animation (object 3) Animation (object 4)
Figure 3.31 Window Function
46
The color of the dot in the upper left
corner of each area is used in the
Original Image Mosaic dots of the entire area.
24 bit, full color Mosaic size horizontal direction
Mosaic size
vertical direction
Horizontal Vertical Displays average of right, bottom,
and lower right dots
Interpolation Displays average of 4 corner dots Shading
+ +
+ + + +
4 4
+ +
+ + + +
4 4
Figure 3.32 Interpolation, Shading, Mosaic Functions
Interpolation Function
The MPEG play image is a maximum 352 X 240 dots horizontally, while vertical
interpolation can be displayed at a resolution of a maximum 704 X 480 dots to pro-
vide a smooth display with less flickering.
Shading Function
Displays a color data average of four dots that adjoin horizontally and vertically, and
can produce a distant background shading effect.
Saturn Overview Manual 47
Mosaic Function
The MPEG play image is divided horizontally, vertically, and at a designated size.
The color of the dot in the upper left of each area indicates the color of all dots in
that area. Horizontal and vertical can be independently designated up to a full
screen size.
Fade Function
This is a display function that gives magnification to the coloring signal and screen
brightness, and is used for fade-in and fade-out. Because this isn’t a method of
adding and subtracting offset values, only the brightness can be correctly changed.
Further, by changing the coloring signal, the monochrome display or displayed
color can be deepened.
Chroma Key
As shown in Figure 3.33, this function plays animation that has transparent dots.
The chroma key is a technique of filming an object in front of a blue background,
taking out all parts that are not blue, then placing those parts in a separate picture.
MPEG animated images can be used only on background with the existing MPEG
LSI, but the chroma key function lets Saturn superimpose and display MPEG ani-
mated images on sprite and scrolls.
MPEG Screen Sprite Screen Scroll Screen
Blue Background
TV Screen
Figure 3.33 Chroma Key Function
48
Screen Retrieve Function
Animated images played by MPEG are retrieved to the main system by this func-
tion, and are handled as sprites, used as texture data, and displayed using the VDP1
and VDP2 functions. Furthermore, this function playing of multiple animations.
The amount of MPEG animated data is 50 times the amount of data from a CD, and
because the transfer speed is faster than the transfer speed from a CD buffer, this
function can be used to rewrite texture data at high-speeds.
High Detail Pause Function
This function displays a 704 x 480 dot high detail pause screen. Full color high detail
images cannot be displayed by the main system (full color is up to 352 x 240 dots),
but if the high detail pause function is used, an image with Saturn’s maximum
number of color can be displayed.
Pause Function, Freeze Function
The pause function can pause the animation at any frame, and can run in slow
motion as well as frame by frame.
The freeze function memorizes animation at any frame (image memory) and allows
strobe playback.
Branch Play Function
MPEG accumulates compressed image data in the CD buffer memory and plays
animation during CD seek (track search). As a result, animation will continue play-
ing even when jumping to another animation track. The screen will not pause as
with LD.
In MPEG, the branch playback where branch point cannot be determined is
achieved. Furthermore, loop play, which repeats the same animation, can be done.
Saturn Overview Manual 49
MPEG / Audio Function
Audio data played by MPEG/Audio is sent to the SCSP by the same path as a CD-
DA (Music CD), and can perform various effects.
Variable Compression Rate
The compression rate can be selected in response to the use; you can choose from a
compression of 1/3.5 ~ 1/21. If the 1/21 compression is used, 50 hours of audio can
be recorded on a CD. Even with huge RPG and ADV, all dialogue and narration can
be performed with audio.
On Memory Play Function
MPEG / Audio can compress to 1/3.5 ~ 1/21. When using half of the
4 Mbit of CD buffer memory for MPEG/Audio by using a compression of 1/21, 64
seconds of audio can be played without accessing the CD. As a result, audio play
can be done without waiting. Furthermore, several short dialogues can be con-
nected for long conversations.
Corresponding Standards
Table 3.12 shows the standards that correspond to the CD-ROM system.
Table 3.12 Corresponding Standards
Standard Description
CD-DA The standard name of sound entered on a CD is base on the REDBOOK
international standard. Sampling frequency 44.1 KHz, quantumization bit
16-bit stereo.
CD-G, CDEG Records data such as graphics data in the music CD format area.
Employs 16 color display and CD-DA sound quality.
CD-ROM The standard has been established to enable recording of computer data
with the same physical format as a music CD (CD-DA). Based on YELLOW
BOOK international standard.
CD-ROM XA This is an expanded CD format with a record format that makes possible
interleave recording for concurrent playing of video and audio.
EB CD-ROM software record format that is employed by the Sony Data Discma
(electronic book) (electronic book player).
Photo-CD System that displays photographs through a monitor such as a television.
Up to 100 photographs can be recorded on a CD; the same photograph ca
be enlarged and reduced.
Video CD Records video that has been compressed by MPEG. A maximum of 74
(Karaoke CD) minutes can be recorded on a CD, and a maximum of 2000 high detail pau
pictures can be played.
50
3.7 Other Items
SMPC
SMPC resets the entire Saturn system when the reset button is pressed or the power
turned on. The command from SH-2 turns on or off the peripheral LSI inside of
Saturn, sets and retrieves the calendar and time, and collects data from peripherals.
The clock change command switches between a horizontal resolution of 320 or 352
dots.
Inside Saturn
MC68EC000
Power On Reset Sound Reset
Reset Switch
SMPC System Reset
SCU VDP1 VDP2 SCSP
clock switch
command
reset
RES NMI RES NMI
data
SH-2 SH-2
PLL (master) (slave)
*Switch
PAD
(* Peripheral I/O terminal can be directly controlled from the SH-2 side.)
Figure 3.34 SMPC System Configuration
Saturn Overview Manual 51
Functions
The main functions of SMPC are shown in Table 3.13.
Table 3.13 SMPC Functions
RTC • Sets and retrieves time and date form SH-2
(Real Time Clock) • Battery back-up function
• Automatically revises the date, day of the week,
hour/minutes/seconds.
SM • ON/OFF of Sound CPU
(System Management) • ON/OFF of master SH-2 and slave SH-2
• Controls system reset
• Switches clocks (PLL switch)
• Power ON reset
• When Saturn is ON, Saturn system is reset bypressing the
reset switch.
PC • Automatically collects peripheral data such ascontrol pad
and mouse.
(Peripheral Control)
• Supports Megadrive and Genesis peripherals (3
button, 6 button, 4 player adapter, mouse).
PAD
Table 3.14 shows the digital PAD specifications for Saturn.
Table 3.14 Saturn Digital PAD Specifications
PAD Type Specifications
Saturn Standard PAD Buttons: up, down, left, right, A, B, C, X, Y, Z, L, R, start.
52
INDEX
B
Bit map format 33
Branch play function 49
C
C3 iii
Cartridge I/F 9
CD-ROM 42
CD-ROM drive 10
CD-ROM drive specifications 43
CD-ROM system data flow 44
CD-ROM system configuration 42
CD-ROM system specifications 42
Cell format 32
Cell format scroll screen 33
Chroma key function 48
Clipping v, 25
Color bank method 22
Color calculation function 35
Color look-up table 22
Color offset function 37
Color operation 23
Compression rate variation 50
Configuration of Color bank method 22
Corresponding standards 50
CPU 6, 11
CPU specifications 11
D
D/A converter 10
Determining priority 34
Display (VDP1) 21
Double density interlace 21
DSP iii
E
Effect 40
Effect Data v
Encode 9
F
Fade function 48
Regular sprite 19
Frame buffer 26
Freeze function 49
Functions (CD-ROM) 44
Functions (SCSP) 38
Functions (SCU) 15
Functions (VDP1) 18
Functions (VDP2) 29
Saturn Overview Manual 53
G
Gouraud shading iii, 23, 24
H
Hardware specifications <main system> 6
Hardware specifications <sub system> 6
High detail pause function 49
High Resolution iv
I
Image change by image axis 32
Image change by rotation axis 31
Image change by screen axis 32
Interlace iii, 21
Interpolation function 47
Interpolation, Shading, Mosaic Functions 47
Interrupt control (SUC) 15
IPL v
L
Line 21
Line and texture parts 21
Line color screen insert 35, 36
Line scroll function 30
M
Enlarge/Reduce function (VDP2) 30
Enlarge/Reduce Sprite (VDP1) 19
MC68EC000 8
Mesh process 24
Mosaic function 30, 48
Mosaic pattern 31
MPEG/Audio function 50
MPEG/Video function 46
MPEG functions 46
MPEG iv, 10
N
Normal line window 33
Normal rectangular window 33
O
On memory play function 50
Operating frequency (SCU) 15
54
P
PAD 52
PAD I/F 9
PAL format v
Parallel processing 45
Parts classification 18
Parts iv
Perspective iv
Pause function 49
PCM iv
Pixel iii
PLL v
Polygon 21
Polyline 21
Priority function 34
R
RAM 6, 8
Related manuals ii
Reverb v
RGB code generation 6, 8
Rotation calculation 32
Rotation display 31
Rotation function 31
S
Saturn digital PAD specifications 52
Screen retrieve function 49
Scroll function 29
Scroll screen 29
Scroll screen configuration 32
Scroll screen function 30
Scroll, Priority functions 29
SCSP 9, 38
SCSP system configuration 38
SCSP system specifications 39
SH-2 8
Shading calculation function 36, 37
Shading function 47
Shadow function 36
Simultaneous display by screen division 32
Single density interlace 21
SMPC 8, 12, 51
SMPC functions 52
SMPC system specifications 51
Special priority function 34
Sprite iv
Sprite window 33
Stream select mechanism 45
Stream selection 45
System clipping 25
System configuration (CD-ROM) 42
System configuration (SCSP) 38
Saturn Overview Manual 55
System configuration (VDP2) 27
System configuration 7
System specifications (SCSP) 38
T
Texture mapping iv
Texture part 19
Transformed sprite 20
Tunnel and BGM reverb 40
Types of color calculation 23
U
User clipping 25
V
VDP1 9, 16
VDP1 system configuration 16
VDP1 system specifications 17
VDP2 9, 27
VDP2 system configuration 27
VDP2 system specifications 28
Vertical scroll function 30
W
Window 33, 34
Window function 46
56
TM
Saturn
Introduction
Manual
Doc. # ST-155-062094
Introduction ............................................................................ 1
Purpose of this Manual ..................................................... 1
Who Should Use this Manual ............................................ 1
Other ................................................................................. 1
Configuration of this Manual ............................................. 2
Development Environment ..................................................... 4
Programmer Development Environment ........................... 4
Tool Configuration ............................................................. 5
Installation .............................................................................. 6
Hardware Setup ................................................................ 6
Media ................................................................................ 6
How to Install .................................................................... 6
© 1994 SEGA. All Rights Reserved.
Introduction
Purpose of this Manual
This binder provides information such as using the boot up method, using libraries,
making programs, making CDs, etc., that is required to develop application soft-
ware.
Who Should Use this Manual
This binder is intended for use by programmers who are developing application
software.
Release 1 applied only to SATURN TARGET BIGBOX, while release 2 applied only
to SATURN TARGET MODEL M. When creating the final product, replace the
above with release 3 (final release) because some areas will be different in the
final version.
Other
Updates are provided with the software to provide the user the most up-to-date,
accurate information, manual corrections or when more details are added. Always
read the updates provided with the software. The updates are located in the
“¥SATURN¥xxxxx¥MAN¥” directory.
We have tried to provide a manual that contains the information programmers need
in a concise, easy-to-use format. We would appreciate any comments or suggestions
that you may have. Please share your opinions with us.
Saturn Introduction Manual 1
Configuration of this Manual
1. A PROGRAMMER’S GUIDE
• Software System Guide
Explains the basic knowledge needed to create a program that runs a finished
game or development target box.
• Software Library Guide
To speed up the development of application programs, those programs with
high utilization vlaue have been gathered into libraries. The operating envi-
ronment and methods of use are explained. Software libraries contain func-
tions required to develop games. Of course, an independant program can be
used in place of this one. Most of the software libraries release the source
code. Programming for this game hardware can be learned faster by using
this code. The code can also be customized to make the library fit the charac-
teristics of the game being developed.
• CD Tool Guide
Explains the operating environment for this tool, which is matched to the
debug phase used to debug a CD without actually having to make one.
2. A SOFTWARE SYSTEM GUIDE
• BOOT ROM User’s Manual
Explains BOOT ROM functions and application boot up configurations.
• DISC Format Specifications
Explains specifications that must be followed when creating a game CD.
3. A SOFTWARE LIBRARY GUIDE
• System Library User’s Guide
· System Program
· SMPC I/F
· CD Communication I/F
These libraries must be used whenever the corresponding hardware is used.
• Program Library User’s Guide 1 CD Library
· File System Library
· Stream System Library
· MPEG Library
Based on the purpose, the CD library can differentiate between intelligent
functions and primitive functions. Intelligent functions are designed for easy
use not only in games but various multimedia software as well.
2
• Program Library User’s Guide 2 Graphic Related Library
· VDP1 Library
· VDP2 Library
· Numeric Calculation Library
· DSP I/F Library
In addition to the basic 2D scroll and sprite control functions, numeric
calculations used in 3D object control functions and 3D high-speed processing
programs used in DSP are provided for each level.
• Program Library User’s Guide 3
· Sound I/F Library
· DMA Library
· Cache Library
· Interrupt Control Library
· Memory Control Library
· Timer Library
· Debug Support Library
· Compression/Expansion Library
· DLL Library
We have included many libraries that are helpful when developing applica-
tions. All of these have the source code attached for free customization and
use.
• Sample Program User’s Guide
· Sample Game Program
A collection of actual sample programs are supplied to enable the programmer
to learn game programming faster. These all come with source code to
change or use while creating games.
· Sample Data
Samples of data types that are helpful in creating games are provided. Of
course, these can be freely customized and used in application software.
4. A CD TOOL GUIDE
• Simple CD Simulator
Enables files to be read from memory or a hard disk rather than from a CD and
debugged.
• Virtual CD System
Allows sector data to be read from the virtual CD the same as reading sector
data from an actual CD drive, without actually creating a CD.
• Write Once System
Used to write the CD images tested in virtual CD to a write-once CD.
Saturn Introduction Manual 3
Development Environment
Programmer Development Environment
Program Development Environment
CD Tool
Basic Program TARGET BOX CD Emulation Write Once
Development Tool System
Tool CD BLOCK
VCD Write Once
Programming Software Writer
Tool Library Software
Control
Software
MFCAT CDSIM
Graphics
Data
Converter
Compression
Tool
4
Tool Configuration
• Programming Tools
Hitachi C compiler, assembler, linker, debugger, etc.; and the various other
tools.
• CD Tools/Simple CD Simulator/SIMM System
MFCAT
• CD Tools/Simple CD Simulator/SCSI System
CDSIM
• CD Tools/CD Emulation System
VCD Software (VCDEMU, VCDBUILD, ...)
• CD Tools/Write Once System
Write-once writer control software (scheduled to be supported from release 3).
• Software Tools/Graphic Data Converter System
DXFTO3DT
• Software Tool/ Compression Tool
CMPRUN
• Software Library
System library, program library, sample program.
Saturn Introduction Manual 5
Installation
Hardware Setup
• <PC Version>
Start up the PC and insert the PC version floppy into the floppy drive.
Always read the “README.DOC” that is contained in the FD root directory first.
Installation instructions are contained in this file.
• <SUN Version>
Prepare the tape device.
• <HP Version>
Prepare the DAT.
Media
Release 2 is supplied with the following media.
—————————————————————
PC Version FD
SUN Version 8mm Tape
HP Version DAT
—————————————————————
How to Install
• <PC Version>
In the PC version, installation can be performed per every library and tool.
• Software Library
Insert the floppy into the disk drive and execute the INSTALL command. Installa-
tion will occur in the current directory. All libraries are installed into the current
directory “SATURN”.
If there is no “SATURN” directory, one must be created.
It should appear as follows (if the floppy drive is A drive and the destination drive is
C drive).
C:¥USR>A:INSTALL[RET]
[C:¥USR¥SATURN¥ ....] directory is created.
6
• CD Tools
Insert the floppy into the disk drive and execute the [install] command. It will
install into the current directory. In the example below, the floppy drive is A drive
and the destination drive is C.
C:¥BIN>a:install[RET]
- If installing the virtual CD, indicate the option [-vcd].
C:¥BIN>a:install -vcd[RET]
- When istalling DXFTO3DT, the DXFTO3DT becomes a self-extracting
compressed file. Therefore, change the current directory to the install destina-
tion and execute.
C:¥BIN>a:¥saturn¥segabin¥dxfto3dt[RET]
[DXFTO3DT¥] creates the directory. (Refer to the [README.DOC] directory
configuration.)
• <SUN Version>
Libraries and tools are installed all at once.
1. Change the current directory to the install directory.
2. If the [tar xvf8mm tape special file] is used, everything from the [SATURN]
directory will be created.
(Example)
tar xvf/dev/nrst[RET]
• <HP Version>
Libraries and tools are installed all at once.
1. Insert the cartridge tape into the device.
2. Move the current directory to the directory you want to install into.
(Example:/usr/bin)
3. Execute the following command.
tar xvf/dev/update.src[RET]
4. After loading from tape, items under the [SATURN] directory are created.
Note: The identifier of each version of a file is designated with the time stamp. Please do not
change the time stamp. Always read all of the [README.DOC] and [¥MAN¥] directory
update documents.
Saturn Introduction Manual 7
SEGA OF AMERICA
Introduction to Saturn
Game Development
April 13, 1994
© 1994-95 SEGA. All Rights Reserved.
Contents
Preface........................................................................................................................................................ iii
Organization of this document................................................................................................ iii
For more information................................................................................................................ iii
Conventions................................................................................................................................ iii
Chapter 1: The Saturn System................................................................................................................ 1
System Control Unit (SCU) ...................................................................................................... 3
System Manager and Peripheral Control (SMPC)................................................................ 3
SH-2 CPUs .................................................................................................................................. 4
Cart port...................................................................................................................................... 4
CD-ROM subsystem.................................................................................................................. 4
SH-1 ............................................................................................................................... 4
MPEG decompression chip........................................................................................ 5
Video subsystem........................................................................................................................ 5
VDP 1 ............................................................................................................................ 5
Dual frame buffer........................................................................................................ 6
VDP 2 ............................................................................................................................ 6
Sound subsystem ....................................................................................................................... 7
SCSP .............................................................................................................................. 7
68EC000 ........................................................................................................................ 7
Memory configuration.............................................................................................................. 8
Chapter 2: Overview of VDP 1 .............................................................................................................. 11
Textured and nontextured parts ............................................................................................. 11
The display list ........................................................................................................................... 12
Specifying colors........................................................................................................................ 15
Color calculations ...................................................................................................................... 16
Changing and erasing the frame buffer ................................................................................. 16
Rotating the entire frame buffer.............................................................................................. 17
Chapter 3: Overview of VDP 2 .............................................................................................................. 19
Types of backgrounds............................................................................................................... 19
VRAM and the display interval .............................................................................................. 20
Character patterns and scroll planes ...................................................................................... 22
Scroll plane display ................................................................................................................... 23
Scaling and rotation .................................................................................................... 23
Priority functions ........................................................................................................ 24
Color processing.......................................................................................................... 24
Chapter 4: Developing for Saturn.......................................................................................................... 25
Graphics tools ............................................................................................................................ 25
SCONVERT.................................................................................................................. 25
BRIP............................................................................................................................... 26
SaturnSp_C PhotoShop/Debabelizer module........................................................ 26
SaturnBRIP PhotoShop/Debabelizer module (under development).................. 26
3DS2SAT (under development) ................................................................................ 26
Programming tools.................................................................................................................... 27
CartDev system ........................................................................................................... 28
The Hitachi E7000 ICEs .............................................................................................. 29
Sherry SH-2 simulator ................................................................................................ 30
High-level languages vs. assembler........................................................................................ 30
Preliminary draft. Confidential. Property of Sega of America, Inc. July 20, 1995
Documentation ........................................................................................................................... 30
General Saturn documentation..................................................................................30
Hitachi documentation ............................................................................................... 31
SCU documentation ....................................................................................................31
CD-ROM subsystem documentation........................................................................31
Video subsystem documentation ..............................................................................31
Sound subsystem documentation ............................................................................. 32
Glossary ..................................................................................................................................................... 33
Preface
This document introduces the Saturn system, provides an overview of the video
subsystem, and summarizes some of the resources available to Saturn game
developers. You should read this document before reading any other Saturn
documentation and before attending your first Saturn training session.
All information in this document is preliminary and subject to change.
Organization of this document
This document includes the following chapters:
• Chapter 1, “The Saturn System,” includes a block diagram of the system, a
description of each of the main components, and a memory map.
• Chapter 2, “Overview of VDP 1,” describes the kinds of parts that VDP 1 can
plot, the way VDP 1 uses its VRAM when it plots parts to the frame buffer,
and some of its most important capabilities.
• Chapter 3, “Overview of VDP 2,” describes the kinds of backgrounds VDP 2
can plot, the mechanism it provides for accessing VRAM during the display
interval, and some of the calculations it can perform as it displays each pixel.
• Chapter 4, “Developing for Saturn,” summarizes some of the content tools,
programming tools, and other resources that Sega provides for Saturn
developers.
The document ends with a glossary of key terms.
For more information
For more detailed information about Saturn, see the documents listed under “Saturn
Documentation” in Chapter 4.
Conventions
This document describes memory in terms of kilobytes (KB) and megabytes (MB),
not kilobits (Kbits) and megabits (Mbits). 1 Mbit = 1024 Kbits = 128 KB.
iii
Preliminary draft. Confidential. Property of Sega of America, Inc. July 20, 1995
iv Introduction to Saturn Game Development
Preliminary draft. Confidential. Property of Sega of America, Inc. July 20, 1995
Chapter 1: The Saturn System
Figure 1-1 shows the three buses and major components of the Saturn system,
including the following:
• SH-2 CPUs. The main processor is a 28-MHz Hitachi 32-bit RISC chip
(SH-2) that uses a second SH-2 as a “slave CPU” to speed processing of
calculations such as matrix transformations. Both SH-2s have access to
1.5 MB of synchronous DRAM (labeled Work RAM in Figure 1-1).
• System Control Unit (SCU). Includes a programmable DSP, a DMA, and a
bus controller that transparently translates addresses specified by the SH-2s
into appropriate control signals for the other buses.
• CD-ROM subsystem. Includes a 20-MHz Hitachi SH-1 processor and an
optional MPEG decompression chip, which if present connects directly to the
video and sound subsystems.
• Video subsystem. VDP 1 plots parts (including textured parts) and supports
15-bit color. VDP 2 can plot up to five backgrounds simultaneously and
supports 15-bit or 24-bit color. VDP 1 uses a dual frame buffer that allows it
to plot a new frame while the previously plotted frame is being displayed,
permitting display at 60 frames per second or at slower rates that divide
evenly into 60 frames per second.
• Sound subsystem. Includes a custom SCSP chip that combines a PCM/FM
sound source and sound-exclusive DSP, and a 68EC000 that runs at 11.3 MHz
and can be programmed for 3-D sound and other effects.
You can program both SH-2s, the SCU DSP, the SCSP DSP, and the 68EC000 to
achieve simultaneous processing of different kinds of data. For example, Saturn
can play up to 32 sounds while calculating transformations of 3-D models and
displaying the resulting 2-D sprites in real time.
The sections that follow summarize the capabilities of Saturn’s major components.
1
Preliminary draft. Confidential. Property of Sega of America, Inc. July 20, 1995
"Slave CPU"
SH-2 SH-2
CPU CPU
IPL ROM
Cache Cache
System bus (32-bit, 28 MHz)
CD-ROM
subsystem
Work
SMPC RAM
(1.5 MB) ROM
Cart Port
SH-1
CPU
Bus
DSP Controller
"A" bus (16-bit, 28 MHz) RAM
DMA
(512 KB)
System Control
Unit (SCU)
MPEG
"B" bus
(optional)
(16-bit,
multiplexed,
28 MHz)
Sound subsystem
Frame
buffer 1 SCSP 68EC000
(256 KB) Sound CPU
DSP
VDP 1 VDP 2
RAM
Frame (512 KB)
buffer 2
VRAM (256 KB) VRAM
(512 KB) (512 KB)
Video DAC
subsystem
RGB
encoder
Fig. 1-1 Saturn block diagram
2 Introduction to Saturn Game Development
Preliminary draft. Confidential. Property of Sega of America, Inc. July 20, 1995
System Control Unit (SCU)
The SCU is built around a Harvard-architecture digital signal processor (DSP), a bus
controller, and a direct memory access (DMA) chip. The bus controller translates
addresses specified by the SH-2 CPU on the system bus into appropriate control
signals for the other buses. This allows the SCU to integrate the A bus and B bus
memory and processors into one large SH-2 memory map.
The SCU’s DSP has a small program area in its RAM and some multiplication units.
These can be useful for tasks such as 3-D transformations. For example, you can load
a program into the DSP that performs a coordinate transformation for rotating an
object. When you need to rotate that object, you send the matrix of vertices you want
to multiply through the DMA with a command that runs the program in the DSP for
each vertex. The resulting transformed matrix of vertices ends up wherever the
DMA is sending it, in this case VDP 1’s VRAM.
You must load any program you want to use into the DSP; it doesn’t contain any
hard-wired programs. Sega provides libraries of programs that perform matrix
calculations and other common tasks.
The work RAM on the system bus can also be controlled via the SCU. This allows
DMA between any parts of memory without involving the SH-2 CPU. For example,
you can DMA from work RAM to VDP 1’s VRAM or from the cartridge port ROM
to VDP 2’s RAM. For an overview of the system memory map, see “Memory
Configuration” later in this chapter.
System Manager and Peripheral Control (SMPC)
The SMPC is built around a 4-bit single-chip Hitachi microcontroller that controls a
real-time clock and can reset either the entire system or individual microprocessors
(SH-2, SH-1, 68EC000, and SCSP). The SMPC also controls nonmaskable interrupts
sent to the SH-2 and via the SCU to the 68EC000, SCSP, VDP 1, and VDP 2. This
capability permits the SH-2, for example, to interrupt the 68EC000’s processing to
request that it play a particular sound. The SMPC runs continuously and is powered
by a battery when the system is off.
The SMPC handles all input and output using one of two modes. In direct mode, the
SH-2 CPU can access the peripheral directly. In indirect mode, the SMPC regularly
polls for and buffers the latest information from a variety of peripheral devices,
including the eight-button Saturn controller and other devices that use a 4-bit
parallel protocol, three-line handshake devices, serial devices, and Genesis
controllers like the six-button controller, the mouse, and the Genesis team player.
The Saturn System 3
Preliminary draft. Confidential. Property of Sega of America, Inc. July 20, 1995
When you use the SMPC in indirect mode, you don’t need to provide any I/O driver
routines or poll the peripherals directly. Instead, your program can check SMPC
registers whenever it needs peripheral data, and you can be sure that they contain
the latest data. The SMPC continually polls for data and buffers whatever it finds in
registers.
When you use the SMPC in direct mode, you must provide the appropriate drivers
and poll the devices as necessary.
SH-2 CPUs
The main CPU for the Saturn system is an SH-2 microprocessor with a twin “slave”
SH-2. Both chips run at 28 MHz. Because they are on a single system bus, one has to
wait for the other if they both need to access the work RAM or anything else on the
bus at the same time. However, each SH-2 includes cache RAM that you can
configure either as a 4-KB 4-way write-through unified cache or as a 2-KB 2-way
write-through unified cache plus 2 KB of RAM for use as private work RAM.
The Saturn comes with the main SH-2’s cache RAM configured as a 4-KB 4-way
cache and the slave SH-2’s cache RAM configured as a 2-KB two-way cache with
2 KB of additional RAM.
Cart port
The cartridge port has 32 MB available in the system memory map. You can plug the
CartDev system module directly into the cartridge port and perform debugging and
other tasks via a SCSI connection with a personal computer. For more information
about the CartDev system, see “Programming Tools” in Chapter 4.
CD-ROM subsystem
The CD-ROM subsystem is an independent device with its own SH-1 processor, a
“2x” CD drive that reads data at 300 KB/sec, and a 512-KB data cache. It reads
CD+G, CD Red book (audio CD), CD Yellow book (CD-ROM), and CDX-A formats.
SH-1
The 20-MHz SH-1 microprocessor provides fully independent control of the CD-
ROM subsystem. For example, if you are writing a fast-paced game and you want
the title screen to appear as soon as a player’s character gets killed, you can send
4 Introduction to Saturn Game Development
Preliminary draft. Confidential. Property of Sega of America, Inc. July 20, 1995
commands to SH-1 from SH-2 that queue the title screen data into the data cache so
that it will be ready for immediate display when you need it. This capability avoids
the wait times that occur with most CD drives.
The ROM connected to the SH-1 houses the CD-ROM driver. You can’t access the
SH-1 directly; you can only request, via the driver, that the SH-1 read or write to the
data cache.
MPEG decompression chip
The optional MPEG chip provides standard motion-picture-industry decompression
for both sound and audio. If this chip is available, it pipes decompressed video
directly to VDP 2 and decompressed audio directly to the SCSP without having to
use the buses.
Video subsystem
VDP 1 plots parts to the frame buffer. VDP 2 integrates those parts with the
backgrounds that it plots and displays the resulting image via the RGB encoder.
VDP 1 and VDP 2 work independently of each other and of the SH-2 CPU. For
example, the SH-2 can perform matrix transformations or other processing at the
same time that VDP 1 is plotting the display list to the inactive frame buffer and
VDP 2 is displaying the contents of the active frame buffer and several backgrounds.
This section describes the basic functions of VDP 1 and VDP 2. For more
information, see Chapters 2 and 3.
VDP 1
VDP 1 plots polygons and other shapes called parts independently of the
backgrounds displayed by VDP 2. VDP 1 plots parts in the frame buffer one pixel at
a time according to a list of commands, texture bitmaps, and other information in its
VRAM.
Parts can be either textured or nontextured. A textured part, also called a sprite, is a
polygon with four vertices that’s filled with a bitmapped texture. You can specify
the colors for a textured part’s pixels as 15-bit RGB codes (from a total of 32,768
possible colors), palette offsets (from up to 256 entries) from a base address in
VDP 2’s color RAM, or entries in a 16-color color lookup table (CLUT). A
nontextured part is a polygon (interior filled), a polyline (outline colored, interior
empty), or a line. VDP 1 can apply a single RGB or paletted color to a nontextured
part.
The Saturn System 5
Preliminary draft. Confidential. Property of Sega of America, Inc. July 20, 1995
VDP 1 can enable or disable clipping, meshing, end codes, and see-through pixels
for any part. If you specify the color for a part using RGB values, VDP 1 can also
perform color calculations on the part’s pixels when it plots them to the frame
buffer, including Gouraud shading, shadowing, half luminance, and half
transparency.
Dual frame buffer
A dual frame buffer allows VDP 1 to plot one frame while the previous frame is
being displayed by VDP 2. VDP 2 integrates each frame with the current
backgrounds, taking account of priority settings to determine how to display
overlapping pixels.
The default display rate is 60 frames per second, but you can also manually control
the way individual frames are erased and switched, which in turn determines how
many frames are displayed per second. Display at 60 frames per second makes for
smoother animation and a clearer image, but slower rates allow you to display more
parts in a single frame.
VDP 2
VDP 2 can plot up to five backgrounds based on pattern name tables, character
pattern tables, and other information in its VRAM. It can access four 128-KB banks
of VRAM simultaneously during the four- or eight-cycle display interval after it
displays one pixel and before it displays the next. You have complete control, via
registers, of the way VDP 2 uses the cycles available in the display interval to access
each bank of VRAM.
VDP 2 also includes 4 KB of color RAM that defines color palettes for use by both
VDP 1 and VDP 2. You can use either 15-bit or 24-bit color for palette entries.
Four of the five backgrounds that VDP 2 can display are scroll planes. The picture in
a scroll plane is larger than the TV display area and consists of tiled character
patterns or a single bitmap image with an RGB color assigned to each pixel. Pixels
specified with RGB colors may be 15-bit or 24-bit.
VDP 2 supports two kinds of scroll planes: normal scroll planes and rotation scroll
planes. A normal scroll plane supports vertical and horizontal scrolling and can
rotate around the z axis only. A rotation scroll plane supports two-axis rotation and
scaling as well as vertical and horizontal scrolling. VDP 2 can display four normal
scroll planes, or two normal scroll planes and one rotation scroll plane, or two
rotation scroll planes.
6 Introduction to Saturn Game Development
Preliminary draft. Confidential. Property of Sega of America, Inc. July 20, 1995
The back plane is the same size as the TV display area and is visible only when all
other backgrounds are transparent. The back plane can display a single RGB color or
a different RGB color for each line, but can’t display paletted colors.
Sound subsystem
The Saturn sound subsystem functions as a MIDI-compatible 32-channel sound
source for either frequency modulation (FM) sounds or pulse-code modulation
(PCM) sounds. Musicians can compose music or generate sound effects using
standard MIDI programs on a personal computer. To play those sounds in a game,
you load tone bank data, AIFF files, MIDI sequence data, DSP programs, and
commands into the appropriate parts of the sound memory map and trigger the
commands when necessary. The system can handle 8- or 16-bit samples.
A number of sound tools are available, including sampling and recording tools,
a sound wave editor, and a sound compiler that creates sound banks and patch
banks. These tools are described in the sound documentation listed under
“Documentation” in Chapter 4. Sega also provides a library of general MIDI sounds.
SCSP
The custom SCSP chip has three main parts:a digital oscillator with 32 dual-purpose
(PCM/FM) slots, a sound-exclusive 128-step DSP, and a digital mixer. The SCSP also
acts as a DRAM controller for the 68EC000.
The oscillator feeds up to 32 channels into the DSP and converts the sampling
frequency of each sample to the DSP sampling frequency of 44.1 KHz. You can use
the 128-step program area in the DSP to apply various effects to all 32 channels,
including reverberation, early reflection, echo, pitch shifting, surround sound, voice
canceling, distortion, filters, panning, and parametric EQ. Sega provides tools that
allow you to construct programs for the DSP on a Macintosh and to generate code
you can download to the DSP from your program.
You can funnel output from the 32 slots into 16 input slots for the digital mixer. Each
of the mixer’s slots can accept more than one channel’s output.
68EC000
The 68EC000 is a 16-bit CPU running at 11.3 MHz. Because the 68EC000 shares RAM
on a time-sharing basis with the SCSP, the 68EC000 runs at half this speed when the
SCSP is running at full specification.
The Saturn System 7
Preliminary draft. Confidential. Property of Sega of America, Inc. July 20, 1995
The sound driver provided by Sega for use with the 68EC000 accepts MIDI
commands and, like any MIDI sequencer, takes care of playing the sounds with the
specified instrument, controller information, and so on. In most cases you don’t
need to provide your own sound driver, although you can if you want to.
Memory configuration
The SCU integrates the A bus and B bus memory and processors into one large SH-2
memory map. The SH-2 doesn’t need to process additional instructions to access the
multiplexed B bus. Instead, the SCU translates signals as necessary to provide
transparent access to the entire system. You can access all memory and devices via
the SH-2 memory map.
The SCU uses the 25-bit SH-2 address bus and four SH-2 chip selects to create the
four 32-MB areas shown in Figure 1-2. These four areas represent the entire SH-2
memory map. The IPL ROM occupies a small portion of CS0, the SCU uses CS1 and
CS2, and CS3 is SDRAM.
0x00000000
CS0 IPL ROM
(32 MB)
0x00020000
CS1 SCU
(32 MB)
0x04000000
CS2 SCU
(32 MB)
0x06000000
CS3
SDRAM
(32 MB)
0x08000000
Fig. 1-2 Address space for the Saturn system
Figure 1-3 shows a simple Saturn memory map. Figure 1-2 and Figure 1-3 show
addresses as cache addresses. If you use these addresses, SH-2 looks first in its RAM
cache for the specified address and uses it via the cache. Alternatively, if you use a
cache through address to refer to the same location in the memory map, SH-2 looks
directly in external memory without checking the cache first, even if the cache
controller is turned on.
8 Introduction to Saturn Game Development
Preliminary draft. Confidential. Property of Sega of America, Inc. July 20, 1995
Note: The memory map shown in Figure 1-3 is subject to change. For detailed
memory maps, see the documentation for each component.
0x00000000
IPL ROM
0x00020000
IPL ROM 0x05900000
(shadow)
Work RAM
(System bus)
0x02000000
0x05A00000
Sound
A CS0
(Cart port)
0x05C00000
VDP I VRAM
A bus
0x04000000 0x05C80000
Frame buffers
A CS1
0x05CC0000
0x05000000 0x05D00000
A CS2 VDP1 registers
0x05800000
A CS3 0x05E00000
0x05900000
(Shown at right) VDP 2 VRAM
0x06000000 0x05F00000
Work RAM VDP 2 color RAM
(System bus)
0x07000000 0x05F80000
Work RAM VDP 2 registers
(shadow)
0x05FC0000
SMPC
0x05FE0000
SCU, DMA/DSP
0x08000000 0x06000000
Fig. 1-3 Preliminary Saturn memory map
You can access the 1.5 MB of work RAM on the system bus either via the SCU at
0x5900000 or from the SH-2 at 0x06000000. If you use the SCU address, you can
perform a DMA, for example, from work RAM directly through to VDP 1. In this
case the SCU generates an address for the work RAM, gets the data, puts it in the
work RAM at that address, generates an address for VDP 1, and passes the data
directly to VDP 1. This is faster than having the SH-2 perform the same task.
The Saturn System 9
Preliminary draft. Confidential. Property of Sega of America, Inc. July 20, 1995
10 Introduction to Saturn Game Development
Preliminary draft. Confidential. Property of Sega of America, Inc. July 20, 1995
Chapter 2: Overview of VDP 1
VDP 1 plots parts to the frame buffer on the basis of commands, texture bitmaps,
and other information in its VRAM. While VDP 1 is plotting parts to the inactive
buffer, VDP 2 integrates the active frame buffer with the backgrounds defined by its
VRAM and displays the result. The frame buffers then switch roles and the process
is repeated. Figure 2-1 shows the relationship between VDP 1, the frame buffers, and
VDP 2.
To SCU
"B" bus
Frame
buffer 1
(256 KB)
VDP 1
RGB
VDP 2
Registers encoder
Frame
buffer 2
VRAM (256 KB)
(512 KB)
Fig. 2-1 Configuration of VDP 1
This chapter describes the kinds of parts that VDP 1 can plot, the way VDP 1 uses its
VRAM when it plots parts to the frame buffer, and some of its most important
capabilities. For detailed information about VDP 1, see the VDP 1 Manual.
Textured and nontextured parts
Parts can be either textured or nontextured. A textured part, also called a sprite, is a
polygon with four vertices that’s filled with a texture bitmap. VDP 1 can plot three
kinds of textured parts:
• A normal sprite can be flipped horizontally, vertically, or both.
• A scaled sprite behaves like a standard sprite and can also be magnified or
reduced horizontally, vertically, or both horizontally and vertically.
• A distorted sprite behaves like a standard sprite and can also be rotated and
distorted by specifying the coordinates of four corner points. VDP 1 maps the
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sprite’s bitmapped image within those coordinates. This capability is useful
for displaying 2-D transformations of 3-D objects.
You can specify colors for a sprite as RGB values, color lookup table (CLUT) entries,
or offsets within palettes in VDP 2’s color RAM. If you specify RGB colors for a
sprite, you can also apply Gouraud shading and other color calculations to it.
A nontextured part is a shape to which VDP 1 can apply a single RGB value or a
single palette color. VDP 1 can plot three kinds of nontextured parts:
• A polygon consists of an area specified by four points and filled with a single
color. VDP 1 can apply Gouraud shading and other effects to polygons.
• A polyline is similar to a polygon except that VDP 1 colors and applies
Gouraud shading and other effects to its outline only, not the area it encloses.
• A line is specified by two points, and VDP 1 can color and apply Gouraud
shading and other effects to it.
When you specify Gouraud shading for a part, you must supply RGB color offsets
for each of its vertices. VDP 1 can then interpolate intervening color offsets across all
the part’s pixels. For example, if you specify color offsets for the vertices of a
polygon that’s part of a three-dimensional object, VDP 1 can interpolate the
intervening color offsets across the polygon’s pixels and shade the color smoothly as
if the polygon were reflecting light from a nearby source.
The display list
The first item in VDP 1’s VRAM is the first entry in the display list, a list of
commands that tell VDP 1 what to plot for a single frame. Each command in the
display list is specified by a command table, a 32-byte block that also indicates
which command to execute next and other information VDP requires to execute the
command successfully. For sprites, this information includes coordinates within
which to plot and the address of a sprite bitmap elsewhere in VRAM. Depending on
the command, a command table may also specify the address of a color lookup table
or a Gouraud shading table.
As long as VRAM begins with the display list, you can organize it however you like.
Figure 2-2 shows a simplified example.
12 Introduction to Saturn Game Development
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Display list
(command tables)
Sprite bitmaps
CLUT tables
Gouraud shading tables
Fig. 2-2 Organization of VDP 1’s VRAM
One way to manage VDP 1 is to maintain a shadow of the display list and related
information in the SH-2’s work RAM and replace the relevant parts of VRAM with a
copy of the shadow during the VBL interrupt. VDP 1 then plots the sprites defined
by the revised display list to the inactive frame buffer while VDP 2 is displaying the
contents of the active frame buffer. Both byte access and word access are possible
from the SH-2 or by DMA. All access to VRAM and the frame buffers occurs using
burst transfer.
A command table in VDP 1’s display list can specify one of the following
commands:
• Set User Clipping Coordinates. Defines boundaries for the clipping of sprites
that are plotted after this command. The command for each sprite specifies
whether or not to clip and if so whether to clip inside or outside the currently
defined boundaries.
• Set System Clipping Coordinates. Defines boundaries for the clipping of the
entire frame buffer.
• Set Local Coordinates. Defines local coordinates for sprites that are plotted
after this command.
• Plot Normal Sprite. Plots a normal sprite bitmap in the frame buffer.
• Plot Scaled Sprite. Plots a scaled sprite bitmap in the frame buffer.
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• Plot Distorted Sprite. Plots a distorted sprite bitmap in the frame buffer.
• Plot Polygon. Plots a quadrangle with a colored interior in the frame buffer.
• Plot Polyline. Plots the outline of a quadrangle in the frame buffer.
• Plot Line. Plots a line in the frame buffer.
• End Plotting. Ends plotting of this frame.
You control the order in which VDP 1 processes the command tables in the display
list by specifying a jump mode for each command. Jump modes instruct VDP to
jump (after processing the current table) or skip (without processing the current
table) to the next command table or to another command table elsewhere in the list.
You can also use jump modes to specify another command as a subroutine of the
current one, so that VDP 1 returns, after processing the subroutine, to the original
command table or the one that follows it. Thus, if you want to keep a group of
related commands that plot a particular object in one place in VRAM, you can move
them in and out of the display list by manipulating jump modes.
Commands that plot parts also enable or disable the following modes:
• Clipping. If clipping is enabled, the command table format includes clipping
coordinates and indicates whether clipping specified by a previous clipping
command should be performed inside or outside of the area defined by the
clipping coordinates. If clipping is disabled, VDP 1 ignores any previously
processed Set User Clipping Coordinates command when it processes the
part.
• Meshing. If meshing is enabled, VDP 1 plots every other pixel of a part in a
fine checkerboard pattern that simulates transparency.
• End codes. If end codes are enabled and occur within a row of pixel
descriptors in VRAM, VDP 1 plots only the portion of the scan line that lies
between the end codes. End codes make it possible to display sprites with
nonrectangular shapes much faster than would otherwise be possible.
• See-through pixels. If see-through pixels are enabled, see-through color
codes in the sprite bitmap are not plotted, and sprites and backgrounds
plotted underneath those pixels (that is, with a lower priority) will be visible.
If see-through pixels are disabled, see-through color codes in the sprite
bitmap are plotted like other color codes and make those pixels opaque.
In addition, commands that plot parts specify color modes and color calculations as
described in the next sections.
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Specifying colors
For a nontextured part, VDP 1 applies either a single 15-bit RGB color or colors from
a single palette or CLUT while it plots the part. Any RGB color may be altered by the
color calculations described in the next section while VDP 1 is plotting individual
pixels to the frame buffer.
For a textured part, VDP 1 reads a sprite bitmap from VRAM and writes it to the
frame buffer. Depending on a color mode set in the command table, VDP 1
interprets the sprite bitmap data as 4-bit offsets into a CLUT, 4- to 8-bit offsets into a
color palette, or 16-bit RGB values.
VDP 1 writes a 16-bit pixel descriptor to the frame buffer for each of a sprite’s
pixels. For RGB data, this involves simply copying the pixel data from VRAM. In
this case, the high bit of each pixel descriptor is set to 1, and the remaining 15 bits
specify an RGB value. For CLUT or palette data, VDP combines bits set in the color
control word of the command table with the 4- to 8-bit offsets specified in the
bitmap to obtain the values for all 16 bits. In this case, the high bit of the color
control word (and thus of the pixel descriptors that VDP I plots to the frame buffer)
should be set to 0. Figure 2-3 shows these two basic formats for pixel descriptors.
15 14 13 12 11 10 9 8 7 6 5 4 3 2
RGB descriptor 1 B G R
15 14 13 12 11 10 9 8 7 6 5 4 3 2
Palette or CLUT descriptor 0 Variable format
Fig. 2-3 Sprite pixel descriptors
The bits in a palette descriptor that are copied from the control word can specify the
descriptor’s format and, depending on the format, the pixel’s priority and
information related to color calculation. The bits in a CLUT descriptor specify the
CLUT’s base address, which VDP 1 adds to the 4-bit offset in the sprite bitmap to
locate an entry in that CLUT. The entry in the CLUT can be either a 16-bit RGB
descriptor or a complete palette descriptor. If it is a palette descriptor in a format
that permits priority settings, a CLUT entry may be used to specify the priority of an
individual pixel as well as its color.
The ability to set priorities for individual sprites is a major advantage of using
paletted colors. All sprites whose pixels are defined with RGB values have the same
priority, which is determined by a register set in VDP 2. A sprite whose bitmap is
defined using paletted colors can have its own priority as determined by the color
control word in its command table. If you want to set the priorities for a single
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sprite, for example if you want place the sprite in front of or behind a specific
backgrounds, use paletted colors. Priority has no effect between parts; to place parts
in front of other parts, you must draw them in sequence, backmost part first.
Color calculations
VDP 1 can perform the following color calculations on any part whose pixels are
specified with RGB color:
• Replace. Writes new pixel data over any previously written pixel in the frame
buffer.
• Shadow. Divides the RGB values previously plotted in the frame buffer
under the specified pixels by two and writes the result, producing color half
as bright.
• Half luminance. Divides the RGB values of the new pixel data by two and
writes the result to the frame buffer, producing color half as bright.
• Half transparency (or half translucence). Divides the RGB values previously
plotted in the frame buffer by two, divides the RGB values of the new pixel
data by two, adds the results, and plots the sum, producing a semitransparent
effect.
• Gouraud shading. Calculates color offsets for all of a part’s pixels based on
offsets for each of its vertexes that are specified in a Gouraud shading table in
VRAM. VDP 1 interpolates the intervening color offsets across the part to
produce a smooth gradation.
• Half luminance/Gouraud shading. Combines half luminance and Gouraud
shading.
• Half transparency/Gouraud shading. Combines half transparency and
Gouraud shading.
Changing and erasing the frame buffer
VDP 1’s registers control various aspects of its operation, such as TV mode, interlace
mode, plot trigger mode, fill data for erasing, and the frame buffer change mode.
The frame buffer change mode determines the way VDP 1 changes and erases the
frame buffers, which in turn determines how many frames are displayed per second.
16 Introduction to Saturn Game Development
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When set to the automatic 1-cycle frame buffer change mode, VDP 1 erases each
pixel in the active frame buffer after it is displayed and switches the frame buffers
every 1/60 of a second for a display rate of 60 frames per second. Because the
number of parts that VDP 1 can plot to a single frame is limited by the size and
scaling of each part, the way colors are specified, the color calculations applied, and
other factors, it may sometimes be necessary to plot more than once to the same
frame buffer to display a large number of parts. You can do this by setting the frame
buffer change mode register during the VBL interrupt to one of three manual modes
(valid only for the next frame):
• Erase (manual mode). During the next cycle, VDP 1 erases each pixel in the
active frame buffer after VDP 2 displays it, but doesn’t switch the frame
buffers.
• Change (manual mode). During the next cycle, VDP 1 doesn’t erase pixels in
the active frame buffer after VDP 2 displays them, but does switch the frame
buffers.
• Erase & Change (manual mode). During the next cycle, VDP 1 erases each
pixel in the active frame buffer after VDP 2 displays it, and also switches the
frame buffers.
For example, if you want to plot to each frame buffer twice before displaying the
frame (for display at 30 frames per second), you can set the frame buffer change
mode as follows:
Change mode set
during next VBL Frame buffer 0 Frame buffer 1
Erase Displays Plots
Change Displays and erases Plots
Erase Plots Displays
Change Plots Displays and erases
You can return to displaying 60 frames per second at any time by setting the
automatic 1-cycle mode, which only needs to be set once, or the Erase & Change
manual mode, which needs to be reset for each cycle.
Rotating the entire frame buffer
You can set TV modes for VDP 1 that allow VDP 2 to read the frame buffer
diagonally, in effect rotating the entire frame buffer. Pixels that lie beyond the frame
buffer coordinates are treated as transparent. Clipping areas remain fixed with
respect to the frame buffer, so they are also rotated.
Overview of VDP 1 17
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You can’t rotate the frame buffer with double interlace display or when the TV
mode is set to high resolution or HDTV.
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Chapter 3: Overview of VDP 2
VDP 2 plots up to five backgrounds based on pattern name tables, character
patterns, and other information in its VRAM. VDP 2 also includes 4 KB of color
RAM that defines color data for use by both VDP 1 and VDP 2. Figure 3-1 shows the
configuration of VDP 2.
To SCU
"B" bus
VDP 2
RGB
VDP 1 Registers encoder
Color RAM
VRAM
(512 KB)
Fig. 3-1 Configuration of VDP 2
This chapter describes the kinds of backgrounds VDP 2 can plot, the mechanism it
provides for accessing VRAM during the display interval, and some of the
calculations it can perform as it displays each pixel. For detailed information about
VDP 2, see the VDP 2 User’s Manual.
Types of backgrounds
Four of the five backgrounds that VDP 2 can display at the same time are scroll
planes. The picture in a scroll plane is larger than the TV display area and consists
either of tiled cells or a single bitmap image with an RGB color assigned to each
pixel. A cell for a scroll plane consists of the color data for an 8-by-8-pixel area,
defined either as palette offsets or as RGB colors.
VDP 2 supports two kinds of scroll planes:
• A normal scroll plane supports vertical scrolling of cells, horizontal scrolling
of lines, vertical and horizontal flipping of cells, and line zooming from 256x
to 0.25x normal size.
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• A rotation scroll plane supports two-axis rotation and scaling as well as
vertical scrolling of cells, horizontal scrolling of lines, and vertical and
horizontal flipping of cells. You can also display the contents of two pattern
name tables in different windows within a single rotation scroll plane.
VDP 2 can display the following combinations of normal and rotation scroll planes:
• Up to four normal scroll planes and no rotation scroll planes.
• One or two normal scroll planes and one rotation scroll plane.
• No normal scroll planes and one or two rotation planes.
The back plane is the same size as the TV display area and therefore can’t be
scrolled. It is visible only when all other backgrounds are transparent. The back
plane can display a single RGB color or a different RGB color for each line, but can’t
display paletted colors.
VRAM and the display interval
VDP 2 calculates and displays one pixel at a time based on the contents of the frame
buffer, scroll plane data it reads from VRAM, priority settings for backgrounds and
sprites, any color calculations to be performed, and various settings in its registers.
When the TV screen is in normal mode, VDP 2 has an eight-cycle display interval:
that is, it has eight clock cycles after the display of each pixel to get the scroll plane
data it needs from VRAM to display the next pixel. When the TV screen is in high-
resolution mode, VDP 2 has a four-cycle display interval.
You have complete control over how VDP 2 uses the available cycles in the display
interval. VDP 2’s VRAM consists of two 256-KB banks labeled VRAM-A and
VRAM-B. You can optionally divide each of these into two 128-KB banks, for a
total of four banks, each of which has a corresponding cycle pattern register as
shown in Figure 3-2.
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Cycle pattern
VRAM registers
VRAM-A0
128KB VRAM-A0 VRAM-A1
VRAM-B0
VRAM-B1
128KB VRAM-A1
Each slot (represented here
128KB VRAM-B0
by one square) determines
access to the corresponding
128KB VRAM-B1 bank of VRAM during a
single clock cycle.
Fig. 3-2 Four banks of VDP 2 VRAM and their corresponding cycle pattern registers
VDP 2 can access all four banks simultaneously during each cycle of the display
interval. Four eight-slot cycle pattern registers determine how VDP 2 uses the cycles
it has available. You can set each slot in each register to specify that VDP 2 read a
specific table in the corresponding bank of VRAM, provide read and write access to
that bank from the SH-2 CPU, or not allow access the bank at all during that cycle.
This means, for example, that you can calculate line scrolling for a single scroll plane
without having to calculate it for all scroll planes.
The rules governing the use of cycle pattern registers are described in the VDP 2
User’s Manual. For example, certain kinds of accesses must be performed at or before
specific cycles in the display interval. If you are trying to do something complex,
you may find that you need to use two VRAM banks and split up the accesses across
two different cycle pattern registers. Similarly, because of the additional data and
accesses required for a rotation scroll plane, you need to use two 128-KB banks and
two cycle pattern registers to plot each pixel in the plane.
If you define a scroll plane using character patterns and paletted colors, the data in a
VRAM bank consists, at a minimum, of a pattern name table, a character pattern
table, and character patterns. If you define a scroll plane using RGB colors, the data
in VRAM consists, at a minimum, of the bitmap data. In addition, a bank of VRAM
may also include the following tables, depending on the kind of scroll plane and
what you want to do with it:
• Line scroll table. Specifies coordinates and other information required for
horizontal scrolling of lines.
• Vertical cell scroll table. Specifies coordinates and other information
required for vertical scrolling of cells.
• Rotation parameter table. Specifies parameters for rotation scroll planes,
including where in the pattern name table to begin the upper-left corner or
edge of the rotation plane, matrix parameters that specify the degree of
Overview of VDP 2 21
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rotation, viewpoint coordinates that determine the point from which the
rotation is observed, and center coordinates that determine the point around
which the plane rotates.
• Coefficient table. Specifies k coefficients used to determine the rate at which
VDP II steps through the original pattern name table as it plots each pixel. For
example, if the horizontal coefficient is 0.1, VDP II stretches out each pixel
horizontally to occupy ten times it’s normal width. You can use coefficient
tables to stretch or squeeze the plotting of one or more pixels vertically or
horizontally to produce scaling, bowing, and other effects.
• Line color screen table. Specifies line colors for use in color calculations or to
specify colors for the back screen.
• Line window table. Specifies horizontal start and end coordinates of lines
that make up a window.
Character patterns and scroll planes
You can specify the colors for a single 8-by-8-pixel cell from among 16, 256, 1024, or
2048 palette entries or from 32,768 or 16,777,216 RGB colors. The amount of RAM
required to specify each of a cell’s pixels varies from 4 bits to 32 bits, depending on
the number of colors. Cells are referenced through several levels of indirection from
tables in VRAM that identify character patterns and collections of character patterns
to be displayed as a scroll plane.
A character pattern consists of color data, defined as an entry in a character pattern
table, for a square made of either one or four cells. Each character pattern is
referenced from a pattern name table, which references all the characters for a 32-
by-32- or 64-by-64-character page. References to pages can be grouped in planes,
and references to planes can be grouped in a map that defines a single scroll plane.
You can combine these references in various ways to build up a scroll plane as large
as 8192 by 8192 pixels from just a few character patterns occupying a small portion
of VRAM.
One entry in a pattern name table identifies the address of a character pattern in a
character pattern table. Depending on the way the character pattern’s colors are
specified, the pattern name table may also identify the address of a palette in color
RAM and additional information about horizontal or vertical flipping and priority
and color calculations.
A palette in VDP 2’s color RAM consists of 16, 64, 128, or 256 15- or 24-bit RGB
values. If you use 15-bit color, each palette entry occupies 16 bits and you can
specify a total of 2048 entries. If you use 24-bit color, each palette entry occupies a
22 Introduction to Saturn Game Development
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long word (4 bytes) even though the color data itself takes up only 3 bytes. Thus,
using 24-bit color wastes 1 byte of RAM per palette entry and restricts the total
number of entries to 1024.
Scroll plane display
To display one or more scroll planes, you load data into VRAM, initialize VDP 2’s
registers, and set the cycle pattern registers as necessary during each display
interval. Initialization includes setting the scroll rotation matrix parameters, the
color mode register (for either 15-bit or 24-bit color), and the priority registers and
clearing the color calculation and color offset registers.
To scroll a scroll plane vertically or horizontally, you can set registers that determine
the starting point within the pattern name table for display of the upper-left corner
of the plane on screen. For continuous scrolling, you should reset these values
during each VBL interrupt.
If the pattern name table is larger than you can fit into VDP 2’s VRAM, you can load
the portion that fits and then replace it with another portion that is shifted in the
appropriate direction through the original table.
Scaling and rotation
For each rotation scroll plane, you must provide a table of k coefficients in addition
to a pattern name table and a character pattern table. The coefficient table
determines the rate at which VDP II steps through the original pattern name table as
it plots each pixel, thus allowing for vertical or horizontal scaling and special effects.
Each coefficient is a 4-byte representation of a decimal value and applies to a line,
groups of pixels, or (potentially) a single pixel.
To achieve smooth effects, you should replace the k coefficients each time VDP 2
displays one frame. Because VDP 2 needs continuous access to the k coefficients to
display a rotation scroll plane accurately, you should normally load new k
coefficients during the VBL interrupt, either just before or just after you swap frame
buffers. It’s also possible to load new coefficients during the HBL interrupt.
The way VDP II plots a rotation scroll plane also depends on scroll rotation
parameters set in VDP 2’s registers. These include the following:
• The rotation transformation matrix determines the degree of rotation.
• Perspective point coordinates determine the point from which the rotation is
observed.
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• Rotation center coordinates determine the point around which the scroll
plane rotates.
You can rotate a rotation scroll plane on the x axis, on the x axis and z axis, on the y
axis, or on the y and z axis, but not on the x axis and y axis simultaneously.
Priority functions
VDP 2 determines the priority for the display of any given pixel according to
priority settings for each part that uses paletted colors, a single priority setting for all
parts that use RGB colors, and a single priority setting associated with each
background. For example, if you are displaying a sprite and two backgrounds, one
showing trees in front of a main background showing a landscape, you can set
priority bits for the sprite’s pixels so that Saturn displays the trees in front of the
main background and the sprite between the backgrounds. You can then bring the
sprite to the foreground by changing the priority settings for all its pixels.
You can also make any portion of a scroll plane transparent to any background
underneath it by specifying 0 as the color for those pixels.
Priority has no effect between parts; to place parts in front of other parts, you must
draw them in sequence, backmost part first.
Color processing
VDP 2 can apply several types of color processing:
• Color calculations make it appear that sprites or backgrounds are partially
transparent to each other. The calculations can be performed using up to 32
ratios and make use of the priority settings for the sprite or background pixels
involved. VDP 2 color calculations are useful for making sprites and
backgrounds appear or disappear gradually.
• Color offsets allow you to average, add, or subtract the color values for two
backgrounds. This can be useful for dissolves and related effects.
• Shadowing involves creating a shadow on a sprite or a background with the
aid of a shadow sprite. This works by making the shadow sprite transparent
and dividing the RGB values of the sprite or background below it in half.
24 Introduction to Saturn Game Development
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Chapter 4: Developing for Saturn
This section describes some of the software and hardware tools for Saturn game
development that are currently available or will soon be available. Other tools, not
discussed here, will also be available later in 1994.
Graphics tools
Sega provides several tools for converting image formats to a form you can use in
your program. Three tools are currently available:
• SCONVERT converts a PICT or PCX file to a format you can use to specify a
sprite.
• BRIP converts a PCX file to a format you can use to specify a background.
• SaturnSp_C is a PhotoShop or Debabelizer plug-in module that converts any
file the Macintosh version of PhotoShop can read to a format you can use to
specify a sprite.
Two additional tools are under development:
• SaturnBRIP is a PhotoShop or Debabelizer plug-in module that converts any
file the Macintosh version of PhotoShop can read to a format you can use to
specify a background.
• 3DS2SAT converts a 3-D model created in 3D Studio to a standard Saturn
format called SAT3. You can then extract the information you need from the
SAT3 file for your program.
The sections that follow describe the graphics content tools in more detail.
SCONVERT
The sprite ripper, or SCONVERT, is a PC/MS-DOS command-line utility that reads
a PICT or PCX file and converts it to an array of 15-bit RGB values in the form of a C
header file you can compile directly into your program. The header file defines an
array of 16-bit pixels. When necessary at run time, your program copies the array to
an address in VDP 1’s VRAM so that you can specify it as a sprite bitmap.
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BRIP
The background ripper, or BRIP, is a PC/MS-DOS command-line utility that reads a
PCX file and converts it to a C header file you can compile directly into your
program. In the process, BRIP eliminates duplicate character patterns, including
vertical or horizontal mirror images. The PCX file can specify either paletted colors
or up to 256 RGB values. Unlike SCONVERT, BRIP outputs three arrays: an array of
8-bit character patterns (a character pattern table), an array of references to those
character patterns (a pattern name table), and an array that defines a single palette
used by the character patterns. (BRIP doesn’t yet support back screens or enforce the
nested references to cells, pages, and planes described in Chapter 3.)
SaturnSp_C PhotoShop/Debabelizer module
The SaturnSP_C PhotoShop/Debabelizer module converts any Macintosh
PhotoShop or Debabelizer file to a C header file that you can compile directly into
your program as a sprite bitmap. The file to be converted can specify either RGB
color or paletted color. If the file specifies RGB color, SaturnSP_C outputs an array
of 16-bit RGB color values. If the file specifies paletted color, SaturnSP_C outputs
two arrays: an array of 8-bit indices into the palette and an array that defines a 256-
entry palette.
SaturnBRIP PhotoShop/Debabelizer module (under development)
The SaturnBRIP PhotoShop/Debabelizer module converts a Macintosh PhotoShop
or Debabelizer file to a C header file you can compile directly into your program.
The file to be converted must specify paletted color. SaturnBRIP outputs three
arrays: an array of character patterns (a character pattern table), an array that defines
an array of references to those character patterns (a pattern name table), and an
array that defines the palette used by the character patterns.
3DS2SAT (under development)
To simulate 3-D animation on other game machines, you first create a model with
3-D software tools such as 3D Studio and use that model to export a series of
bitmapped images. You then display the bitmapped images in a series of frames to
create the illusion of movement in three dimensions. Each bitmapped image takes
up a lot of memory and you must be able to predict all potential movements of an
object in order to provide the appropriate bitmaps.
To create 3-D animation on Saturn, you can use 3DS2SAT to convert the entire 3-D
model to the SAT3 format, the standard Saturn file format for 3-D information. For
example, suppose you want to display a rotating cube. The 3-D model consists of six
four-sided polygons, each of which is filled with a bitmapped image. When you
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need to display the object from a particular vantage point, Saturn can calculate
transformations for the vertices of the six polygons in 2-D space, distort the bitmaps
for each polygon accordingly, and display the resulting image on the screen—all at
run time at 30 or 60 frames per second. Thus, instead of limiting potential motion to
preselected views of a 3-D model, you can orient it any way you want and update
each frame at run time.
Each object defined by a SAT3 file includes an array of vertex coordinates for that
object, an array that defines the object’s faces by specifying their vertices, and a
variety of other information such as vertex normals used in Gouraud shading. This
arrangement allows you to perform a matrix transformation on the vertex
coordinates before associating those vertexes with specific faces, thus avoiding
repeated calculations for shared points.
Depending on the nature of the game you are programming, you may not need all
the information provided by the SAT3 file format. For example, if you don’t intend
to apply Gouraud shading to an object, you don’t need to include that information
in your program. In most cases you should create a third file from the SAT3 file that
includes only the information you need for your program.
Programming tools
Sega provides a standard GNU C compiler that has been modified to work with the
SH-2 CPU. GNU supports registerized parameters—that is, it allows you to refer to
up to four registers directly; other parameters are on the stack.
Hitachi provides an assembler, a C compiler, a link editor, and a librarian that you
can use to compile and link assembly and C files. You can also use other third-party
assemblers to compile and link assembly files. Typically, these assemblers provide a
debugger, a linker, and a command-line DOS interface that requires a DOS extender.
If you wish, you can write some parts of your program in C using the GNU compiler
and other parts in assembly language using a third-party assembler, then link both
the GNU C modules and the assembly files and output C files in the COFF file
format.
Whether you program in C, assembler, or both, you can use a variety of software
debuggers with the CartDev to debug your program, as shown in Figure 4-1.
Developing for Saturn 27
Preliminary draft. Confidential. Property of Sega of America, Inc. July 20, 1995
Third-party
assembler
Third-party
linker
GNU
C compiler
Third-party
debugger
CartDev
system
Fig. 4-1 Using GNU with third-party tools and the CartDev system
Alternatively, you can use Hitachi software with an E7000 series in-circuit emulator
(ICE) as a debugging system. Unlike software debuggers used with the CartDev,
ICEs provide a history display and can deal with more esoteric problems such as
interrupts or anything that requires strict tracing of code. In some cases it may be
desirable to use both the CartDev and an ICE at the same time for different
purposes.
To learn about the way the SH-2 handles pipelines and optimize for RISC
architecture, you can load files into the Sherry simulator, an SH-2 simulation
program that runs on a PC.
The sections that follow describe the CartDev, the Hitachi 7000 series ICEs, and the
Sherry simulator in more detail.
CartDev system
The CartDev is a low-cost development system that plugs into Saturn’s cartridge
port. It has its own controller that handles all communication. A SCSI (SCSI 2)
interface permits communication with the CartDev from an IBM PC, a Macintosh, or
other hosts, such as SGI workstations. The CartDev communicates with Saturn
through dual port RAM. It also includes dual-access emulation RAM (RAM that can
be read or written to from either the CartDev or from Saturn) that includes 64 KB of
static RAM, with room for up to 8 MB of optional DRAM.
28 Introduction to Saturn Game Development
Preliminary draft. Confidential. Property of Sega of America, Inc. July 20, 1995
In addition to a SCSI interface, the CartDev provides two RS-232 or RS-485 ports and
one in-and-out high-speed parallel port for an auxiliary interface. Currently, the
auxiliary interface consists of a sound adapter with a digital audio interface and two
sets of in, out, and through MIDI ports that can handle up to 32 voices. Other
auxiliary interfaces may be developed in the future.
The CartDev provides some hardware control (such as resets, NMIs, and interrupts)
and, when used with appropriate debugging software, allows you to set software
breakpoints, single step through code, and read and write to memory.
In addition to using the CartDev system for software debugging tasks, you can use it
to download or upload art or sound files. In general, downloads with the CartDev
are ten or twenty times faster than downloads with the E7000 ICEs. The CartDev has
an open interface that allows third parties to use its communication capabilities for
additional game development tools.
The Hitachi E7000 ICEs
Hitachi currently provides three E7000 series in-circuit emulators (ICEs) that have
similar hardware debugging capabilities and can emulate the SH-2 processor. Each
version of the E7000 ICE knows about all internal workings of the processor on a
cycle-per-cycle basis (including pipelining), and maintains a history of previous
instructions.
These are the E7000 ICEs that are currently available:
• The E7000 includes a floppy drive and emulation RAM, and it has room for
up to 4 MB of expansion RAM. It is controlled through Ethernet or Cheapnet
from a host with telnet capabilities.
• The E7000PC has the same capabilities as an E7000 except that it doesn’t
include a floppy drive and is controlled by a PC via a proprietary parallel
interface card.
• The E7000 Eval Board doesn’t include a floppy drive and has 512 KB of
nonexpandable emulation RAM. It is controlled from a PC through the same
proprietary parallel interface card used with the E7000PC.
You can control any of these ICEs from a personal computer, if necessary at the
same time as the CartDev. The E7000 ICEs can be helpful with low-level problems
such as interrupts or crashes that corrupt the system, or with any problem that you
can’t isolate using a software debugger.
Developing for Saturn 29
Preliminary draft. Confidential. Property of Sega of America, Inc. July 20, 1995
Sherry SH-2 simulator
The Sherry simulator allows you to examine the SH-2’s pipelines. It consists of a
program you can run on a PC without any connection to Saturn or any other
hardware. If you load an S record into the Sherry program, it allows you to set
breakpoints and single step through code using a memory map that emulates the
SH-2 memory map. This is especially valuable for observing clock cycle counts for
pipelined RISC instructions and for learning how new instructions and the ordering
of instructions affect the pipeline.
Sherry has a built-in assembler and debugger and simulates all SH-2 instructions. It
only uses as much of the PC’s memory as your program requires, even if you are
addressing a larger memory space. It doesn’t simulate the cache.
High-level languages vs. assembler
You can use assembly language or high-level languages such as C to write Saturn
programs. Because the SH-2 chips are RISC, assembly-language programming for
Saturn can be more complex than for other game machines. For example, you must
deal with pipelining if you write in assembly language. This means development in
assembly language may take longer than development in a high-level language.
Although the GNU C compiler provided by Sega may produce less efficient code in
some circumstances than an assembler, it takes care of many of the complexities of
RISC programming, such as pipelining, automatically. Hand-crafted assembly code
can be useful in situations where slight performance improvements are significant,
but compiled C code works just as well for many tasks.
Documentation
This section lists the most important documents you will need as you begin writing
programs for Saturn.
General Saturn documentation
Boot ROM Specification, ST-079B
Macintosh Micon Soft Development Specification, ST-066
Programming Tools, ST-80-R1
Saturn File System Library Specification, ST-39-R2
30 Introduction to Saturn Game Development
Preliminary draft. Confidential. Property of Sega of America, Inc. July 20, 1995
Saturn Outline, ST-30-R1
Saturn Stream System, ST-098
Software Library User’s Manual, ST-078
Hitachi documentation
E 7000 Primer
HS 7000 E101SE IBM PC/IF
SH 2 Hitachi Tools
SH 7000 Pipeline Operations
SH 7000 Programming Manual
SH 7030 E7000 GUI User’s Manual
SH 7030 Emulator Model 1 User’s Manual
SH Electrical Characteristics
SH Series C Compiler
SH Cross Assembler User’s Manual
SCU documentation
SCU User’s Manual, ST-097
CD-ROM subsystem documentation
Saturn CD Communication Interface Specification, ST-38-R2
Saturn CD System, ST-40-R1
Virtual CD System User’s Manual, ST-100-R1-A
Video subsystem documentation
VDP 1 Constraint Items, ST-089
VDP 1 Manual, ST-13-R2
VDP 2 User’s Manual, ST-58
Developing for Saturn 31
Preliminary draft. Confidential. Property of Sega of America, Inc. July 20, 1995
Sound subsystem documentation
Saturn Standard MIDI File Converter Specification, ST-66
SCSP User’s Manual, ST-77-R1
SCSP Wave Edit Tool Specification, ST-067
SCSP/DSP Linker Instruction Manual, ST-70-R1
Sound Development Manual Outline, ST-81-R2
Sound Edit Tool Specification, ST-068
Sound Editor User’s Manual, ST-101
Sound Programming Debugger User’s Manual, ST-065-R1
Wave Editor User’s Manual, ST-99
32 Introduction to Saturn Game Development
Preliminary draft. Confidential. Property of Sega of America, Inc. July 20, 1995
Glossary
back plane A background that’s visible only when all other backgrounds are
transparent.
cache address Address accessed via the cache controller.
cache through address Address accessed directly, without checking the cache.
cell Color data for an 8-by-8-pixel area, defined either as palette offsets or as RGB
values.
character pattern A square made of one or four cells.
character pattern table A block in VDP 2’s VRAM that contains the character
patterns for a scroll plane.
clipping Plotting parts only inside or outside a designated region; the area not
plotted is “clipped.”
color control word A word in the command table that specifies either a single color
for a part or information that VDP 1 combines with the offsets specified in a sprite
bitmap to obtain a pixel descriptor.
command table A 32-byte block in VDP 1’s VRAM that specifies a command, a
jump mode, and other information VDP 1 requires to execute the command.
cycle pattern registers Four eight-slot registers that determine how VDP 2 uses the
cycles in the display interval to access its VRAM.
display interval The four- or eight-cycle interval after VDP 2 displays one pixel
and before it displays the next. You have complete control, via the cycle pattern
registers, of the way VDP 2 uses the cycles available in the display interval to access
its VRAM.
display list A list of commands in VRAM that tell VDP 1 what to plot for a single
frame.
distorted sprite A textured part that behaves like a normal sprite and can also be
rotated and distorted by specifying the coordinates of four corner points.
line A nontextured part specified by two points that can be filled with a single
color.
map A group of pages that defines a scroll plane.
Developing for Saturn 33
Preliminary draft. Confidential. Property of Sega of America, Inc. July 20, 1995
meshing Plotting every other pixel of a part to produce a fine checkerboard pattern
that simulates transparency.
nontextured part A part to which VDP 1 can apply a single color.
normal scroll plane A scroll plane that supports horizontal scrolling of lines,
vertical scrolling of cells, vertical and horizontal flipping of cells, and line zooming
from 256x to 0.25x of normal size.
normal sprite A textured part that can be flipped horizontally or vertically.
page A group of character patterns arranged in a 32-by-32-cell or 64-by-64-cell square.
part A textured part or a nontextured part plotted by VDP 1.
pattern name table A table of references to all the characters for a page.
pixel descriptor A 16-bit word that VDP draws to the frame buffer for each pixel. If
the high bit is set to 1, the remaining 15 bits specify an RGB value. If the high bit is
set to 0, the pixel descriptor consists of information from the color control word
combined with an offset in the sprite bitmap, and it specifies either an entry in a
color lookup table or a palette entry in VDP 2’s color RAM.
plane A group of pages in arrangements up to 2 pages square.
polygon A nontextured part specified by four points that can be filled with a
single color.
polyline A nontextured part specified by four points. Its outline (but not the area
it encloses) can be drawn with a single color.
rotation scroll plane A scroll plane that supports two-axis rotation and scaling as
well as horizontal line scrolling, vertical scrolling of cells, and horizontal and vertical
flipping of cells.
scaled sprite A textured part that behaves like a normal sprite and can also be
magnified or reduced horizontally, vertically, or both horizontally and vertically.
scroll plane Background plotted by VDP 2 using either RGB values or palette colors.
sprite See textured part.
textured part A part plotted by VDP 1 that has three or four vertices and is filled
with a bitmapped image; also called a sprite.
34 Introduction to Saturn Game Development
Preliminary draft. Confidential. Property of Sega of America, Inc. July 20, 1995
TM
1.0 Summary 1
1.1 Library Configuration 1
1.2 Overview of Stream System Functions 2
2.0 Definition of Terminology and Abbreviations 3
3.0 Module Configuration 5
4.0 Overview of Stream Access 6
4.1 Streams and Stream Groups 6
4.2 Stream Area 6
4.3 Stream Access Procedure 7
4.4 Resident Stream 10
4.5 Precautions when Adding or Changing
Settings During CD Play 11
5.0 Stream Access Example 12
6.0 Data Specifications 14
6.1 Data Table 14
6.2 Data Details 14
6.2.1 Stream Access Status 14
6.2.2 Transfer Gate Status 14
6.2.3 Transfer Mode 15
6.2.4 Fundamental Data 15
6.2.5 Library Handler 15
6.2.6 Stream Key
6.2.7 Stream Play Area
16
17
External
6.2.8 Sector Information
6.2.9 Error Control
17
17 Specification
6.2.10 Transfer Function 18
6.2.11 Call Function when CD BufferIs Full
6.2.12 Error Function
18
18
Document
7.0 Function Table 19
8.0 Function Details 21
8.1 Initialization 21
8.2 Stream Group 21 Saturn
8.3 Streams 23
8.4 Transfer Setting 26 Stream System
8.5 Read Information Acquisition 29
8.6 Transfer Information Acquisition 30
Doc. #ST-98-031194
8.7 Stream Server Execution 31
8.8 CD Block Operation 34
8.9 Error Handling 36
Precautionary Items Regarding Stream System
Library Ver. 0.1 37
© 1994 SEGA. All Rights Reserved.
History of Modifications
1994-02-21
Access Image Diagram Modification
• StmArea Addition
• StmSct Addition
• StmKey Change
• STM_SetCdbufFull Addition
• STM_OpenResi Addition
• STM_ConnectCdbuf Addition
• STM_MoveCdbuf Addition
• STM_StartTrans Addition
• STM_SetTrFad Addition
• STM_OpenFid Change
• STM_OpenFrange Change
• STM_SetKey Change
• STM_GetInfo Change
• STM_EraseCdbuf Change
• STM_GetSctInfo Change
• STM_GetErrStat Change
• The stream read program modification in accordance with the STM_OpenFid change.
• The transmission function specification change and the corresponding change to the 5. (2)
Transmission Function Example.
• Make it so that the word No. and not the byte No. are used for the data No.
Stream System Review and Other Items of Study
1. Function Access from Remaining CD Buffer Capacity
Add the function STM_SetCdbufFull.
This function allows the registered function to be accessed when the capacity remaining in the CD
buffer is less than the set value.
2. Resident Stream Handling
Add the functions STM_OpenResi and STM_SetTrFad.
Normally, the data that is read into the CD buffer is transmitted to the host area when the play
position reaches the transmission start FAD. Stream data that has been opened by STM_OpenResi,
however, is resident in the CD buffer even after being transmitted to the host area. This stream is
called a resident stream. When the transmission start FAD is reset (STM_SetTrFad) after residence,
data is again transmitted when the play position reaches the set transmission start FAD.
This function can handle the steam as a SIMM file or SCSI file in the same way as a file on a CD is
normally handled. In this case, however, the stream is not resident on the CD buffer, so data is read
from the SIMM or SCSI each time the stream is accessed.
For details, refer to External Specifications, Section 4.4 Resident Stream.
3. Acquiring Actual Data Size After Data Transmission Has Begun
For the transmission function, there is a high possibility that the actual data size acquisition func-
tions (STM_SctToByte and STM_ByteToSct) will be used, so add the function STM_StartTrans.
In addition, delete the transmission address from the transmission function argument and then
make acquisition as the function value of STM_StartTrans. The actual data size acquisition function
is to be used before STM_StartTrans is accessed.
4. Setting and Acquiring the Data No.
For the stream system, the word No. and not the byte No. is to be used for the data number.
5. Function Arguments
Changes were made for functions with many arguments so that performance does not degrade
when a struct is made into an argument.
1.0 Summary
This document is the external specifications for a library that will allow streams
(interleaved files, etc.) on CD to be efficiently read
1.1 Library Configuration
The library configuration for CD-related items is shown in Figure 1.1.
Application
Split Moving screen Play Library
MPEG Stream System File System
Library Library Libaray
Software CD Communications Interface
Hardware CD Block SIMM, SCSI Files
Figure 1.1 CD Related Library Configuration
External Specification Document: 1
Saturn Stream System
1.2 Overview of Stream System Functions
(1) Supports CD-ROM XA Level File Access
• Supports access to mode 2 sector that used a sub header. (Access to mode 1
sector is also possible.)
(2) Supports a Variety of Transfer Methods
• The stream data on CD can be transferred to the main CPU area.
• Registering functions makes it possible to process data while reading stream
data from the CD.
• The stream data read into the CD buffer can be freely manipulated.
(3) Supports Access By File ID
• File access is allowed via the file ID (sequence number in the directory)
using the directory management function similar to the file system.
Application
Stream Selection Conditions Stream Data Acquisition
Transfer Destination Setting
Video1
Buffer 1
Video2
:
Audio1 Stream
CD Audio2 System Buffer 2
:
Multiple Data1
Interleaved Transfer
Data2
Streams : Function
Stream Selection Data Transfer and Conversion Output Destination
(Header, Sub Header) Transfer Control Control
Figure 1.2 Overview Diagram of Stream System
2
2.0Definition of Terminology and Abbreviations
Table 2.1 Terminology Chart
Word Meaning
Stream The flow of logically connected data that has been classified via a
sub header.
Stream Key The key when a stream is read into a CD buffer. The stream key
comes from the frame address range, file number (FN), channel
number (CN), sub mode (SM), and coding information (CI). With
respect to the sub mode (SM) and coding information (CI), the
mask pattern comparison pattern can be specified. In this case the
sector that is
({SM
CI } & mask pattern == comparison pattern)
is the sector that is read.
Stream Group A collection of streams.
End Stream The stream in a stream group that is the last stream to be played.
Loop Start Stream The return stream after a stream group’s end stream has been
played back.
Transfer Start FAD The pick up position for starting the transfer of data read into the
CD buffer to the program buffer, etc.
Transfer Gate The gate when data read into the CD buffer is transferred to the
program buffer, etc. Closing this gate allows stream data to be
accumulated in the CD buffer.
CD Drive
Read
CD Buffer Stream Access
Main CPU Area
Figure 2.1 Stream System Data Flow
External Specification Document: 3
Saturn Stream System
Table 2.2 Abbreviation Chart
Abbreviation Meaning
GFS general file system
STM stream
StmGrpHn stream group handle
StmHn stream handle
TrMode transfer mode
bn buffer number
ci coding information
cn channel number
fad frame address
fid file ID
fn file number
fname file name
loopstm loop stream
plyarea play area
sinfo sector information
sm sub mode
sn sector number
stype sector type
• For other terminology, use the meanings given for the CD communications
interface and the file system.
• For details regarding the directory, refer to File System (GFS) Directory.
4
3.0 Module Configuration
Following is the module configuration as seen from the application.
Application
Branch Movie Screen
Playback Library
File System
MPEG Stream
Library System
File System
Bottom Module
Software CD Communications Interface
Hardware
CD Block SIMM, SCSI Files
shows modules required for use with stream system.
Figure 3.1 Module Configuration Diagram
The file system library and CD communications interface library are necessary to use
the stream system library.
Each library uses the following global symbols. The application program must not
use these symbols.
Table 3.1 Symbol Name for Each Library
Abbreviation Meaning
Stream system ST*_*
File system GF*_*, GP*_*
CD communications CD*_*
interface
External Specification Document: 5
Saturn Stream System
4.0 Overview of StreamAccess
4.1 Streams and Stream Groups
(1) Stream
Sector groups with the same sub headers (FN, CN, SM, CI) and that undergo basi-
cally the same processing are called a stream. These sectors do not need to be physi-
cally contiguous.
(2) Stream Group
Interleaving and recording multiple streams as is done for audio and visual allows
related streams to be synchronized and accessed at the same time. A collection of
such related streams is called a stream group.
4.2 Stream Area
Stream areas are stipulated using the following methods.
(1) Opening the Stream via File
The file ID can be specified to open the stream (STM_OpenFid). In this case, the
stream area is from the start frame address in the file to the end frame address.
The end frame address is actually calculated from the total number of sectors in the
start frame address and file. In the case of interleaved files, the end frame address is
calculated as having been recorded as a defined interleave factor (set interleave).
(2) Opening the Stream by Directly Specifying the Frame Address Area
The user can open the stream by directly specifying the frame address area
(STM_OpenFrange). In this case, the specified area becomes the stream area.
The frame address area specifies the first frame address and physical sector number.
6
4.3 Stream Access Procedure
The following procedure is used to access streams.
Start Corresponding Function
Open Stream Group STM_OpenGrp
Specify Stream Key STM_OpenFid
and Open Stream STM_OpenFrange
Set Transfer Destination STM_SetTrBuf, STM_SetTrFunc
and Transfer Function
Yes
Processing Finished?
Execute User Fixed Processing
Repeatedly Call Up Server Function STM_ExecServer
Close Stream Group STM_CloseGrp
End
Figure 4.1 Stream Access Procedure
External Specification Document: 7
Saturn Stream System
The stream access image is shown below.
Current Play Position
Stream A
Stream B
Stream C
Play Play
(a) Play Start (b) Seek (c) Loop
FAD
(Time)
0
(d) Compression CD Buffer (e) Data Transfer Transfer
Destination
Yes
Buffer Program
DMA, etc.
Block A Buffer
No
(f)
Yes User Transfer
Buffer Registration
Transfer Destination
Block B Function Device
No
(g)
Yes
Buffer User Proprietary
Block C Buffer Management
No
(h) Transfer Gate
Delete
Figure 4.2 Overview of StreamAccess
8
(a) Play Start
Of the streams in the stream group, the start FAD begins playing from stream A,
which is the front most stream.
(b) Seek
When the playing stream has finished, the pickup moves to the start position of the
next stream (stream B) and begins playing.
(c) Loop
When the last stream (stream C) has finished playing, the pickup moves to the start
position of the loop start stream (the default is the front most stream) and begins
playing.
(d) Filter and Buffer Block
Buffer blocks are allotted one-to-one with the streams.
Sector data that meets the stream key conditions is stored in a buffer block. Sector
data that does not meet the key conditions is sent to the next filter.
(e) Data Transfer
When server functions are called up, the transfer start position and current play
position that is set for each stream is compared, and if there is a stream that has
reached the transfer start position, there will be an attemp to transfer data to the
selected transfer area one round at a time.
If the transfer register or DMA come in use during the transfer, the server function
will end at that time, and the next test transfer will start from the next stream.
(f) User Registration Transfer Function
Registering the transfer function allows data to be transferred while it is being pro-
cessed, such as the decompression of compressed data.
(g) User Proprietary Buffer Management
When the transfer area and transfer function are not specified, the application pro-
gram itself can manage the CD buffer data.
(h) Transfer Gate
Closing and opening the transfer gate temporarily stops the stream flow and then
allows it to flow again. When the transfer gate is closed, the stream data is accumu-
lated in the CD buffer.
External Specification Document: 9
Saturn Stream System
4.4 Resident Stream
When relatively short streams need to be transferred repeatedly, they can be opened
as resident streams (STM-OpenResi). Using resident streams allows data to be resi-
dent in the CD buffer without requiring the same data to be repeatedly read from
the CD.
(1) Reading Resident Streams
Files specified in resident streams are only read into the CD buffer once. Data that is
accessed repeatedly by returning to the loop start stream is not read into the CD
buffer. Therefore, during the first stream access, play must be started from before the
resident stream file area.
When the resident stream is opened during stream access and the play position has
passed the resident stream area, care must be taken that the data is not read into the
CD buffer.
Stream Group
Resident Stream A
Stream B
Stream C
First Time
Second Time On
Not Read After First Time
FAD
Figure 4.3 Resident Stream Read
(2) Resident Stream Transfer Start Frame Address
Once a resident stream has been read into the CD buffer, the transfer can be per-
formed using optional timing. This timing is set using the transfer start frame ad-
dress for the resident stream (STM_SetTrFad).
According to the normal stream access, the play position advances, and when it
passes the set transfer start frame address, the stream data that is resident gets
transferred.
10
Also, for resident streams, the stream data is not erased from the CD buffer even
after being transferred to the host area.
(3) Using SIMM Files and SCSI Files (During Debugging)
It is possible to use SIMM files and SCSI files as resident streams only. When the
specified file is a SIMM file or a SCSI file, the data can be read at each access without
being resident in the CD buffer.
4.5 Precautions when Adding or Changing Settings During CD Play
In the stream system, the settings, such as the stream key, can be dynamically
changed during CD play. However, after processing has been assigned to the CD
block the change will be delayed until the setting contents become valid.
For this reason, the following functions must be initiated ten sectors or more before
the target position.
Function Initiated Set Coordinate Position
10 Sectors or More
Stream
FAD
Current Play Position
Figure 4.4 Function Initiation Timing
(1) Functions that Are Delayed Until the Settings Are Valid
Table 4.1 Functions with Corresponding Delays
Stream opened by file ID STM_OpenFid
Stream opened by play area STM_OpenFrange
Resident stream open STM_OpenResi
Stream close STM_Close
Stream key setting STM_SetKey
Filter and CD buffer block connection STM_ConnectCdbuf
External Specification Document: 11
Saturn Stream System
5.0 Stream Access Example
(1) Stream Read
Read the three streams A, B, and C into a_buf, b_buf, and c_buf respectively.
GfsFid a_id, b_id, C_id; /* file ID */
StmGrpHn abc_grp; /* stream group handler */
StmHn a_stm, b_stm, c_stm; /* stream handler */
StmKey key; /* stream key */
Uint16 a_buf[ABUF_SIZE], b_buf[BUFSIZE], c_buf[C_BUFSIZE];
/* transfer area */
GFS_Init(...); /* file system initialization */
STM_Init() /* stream system initialization */
/* file ID acquisition */
a_id = GFS_NameTold(...);
.
.
.
abc_grp = STM_OpenGrp(); /* stream group open */
/* stream key setting /*
STM_Key_CN(&key) = STM_CN_NONE; /* channel No. */
STM_KEY_CICMP(&key) = STM_KEY_CIVAL(&key) = STM_CI_NONE; /* coding INF */
/* stream open by file ID */
STM_KEY,SMCMP(&key) = = STM_SM_VIDEO; /* video */
STM_KEY_SMAVAL(&key) stream
a_stm = STM_OpenFid(abc_grp, a_id, &key); /* stream A */
STM_KEY_SMCMP(&key) = = STM_SM_AUDIO; /* open */
STM_KEY_SMVAL(&key) stream
b_stm = STM_OpenFid(abc_grp, b_id, &key); /* stream B */
STM_KEY_SMCMP(&key) = = STM_SM_DATA; /* data stream */
STM_KEY_SMVAL(&key)
c_stm = STM_OpenFid(abc_grp, c_id, &key); /* stream C */
/* transfer area setting */
STM_SetTrBuf(a_stm, a_buf, A_BUFSIZE);
STM_SetTrBuf(b_stm, b_buf, B_BUFSIZE);
STM_SetTrBuf(c_stm, c_buf, C_BUFSIZE);
STM_SetExecGrp(abc_grp); /* actual group setting */
/* stream access */
while (1) {
if (STM_ExecServer() == STM_EXEC_COMPLETED) {
break; /* stream access end */
}
user(); /* user processing */
}
STM_CloseGrp(abc_grp); /* stream group close */
12
(2) Transfer Function Setting
For program (1), make the following changes when using the function
“decodeFunc” to transfer stream B’s data while it is being decompressed.
(a) Change the underlined STM_SetTrBuf to STM_SetTrFunc.
STM_SetTrFunc(b_stm, decodeFunc, readBuf);
This change makes the decodeFunc operate every time the server function
STM_ExecServer is called.
(b) The “decodeFunc” becomes as shown below:
Uint16readBuf[READBUF_SIZE];
Sint32 decodeFunc(void *obj, StmHn stm, Sint32 nsct)
Sint32 i;
Sint32 read_len; /* Word number transferred by */
sub_func.
Sint32 nword: /* Transfer word number */
Uint16 *src; /* Transfer address */
Sint32 adlt; /* Part of address changed every */
one-word transfer
/* (word */
unit)
Uint16 *buffer; /* Transfer area */
nword = STM_SctToWord(stm, nsct) /* Change from sector number to */
word number.
/* Call STM_SctToWord before */
start transfer.
src = STM_StartTrans(stm, &adlt); /* Start transfer. */
buffer = (Uint16 *)obj; /* The STM_SetTrFunc’s No.3 */
argument crosses over to the obj.
for (i = 0; i < nword; i += read_len) {
buffer += sub_func(src, adlt, buffer, &read_len);
/* Returns decompressed */
word count
src += read_len * adlt;
}
return (nsct); /* Return transfer */
sector count
}
(c) If data transfer has not ended when decodeFunc ends, (-1) must be returned.
(d) Transfer must be done in sector units.
External Specification Document: 13
Saturn Stream System
6.0 Data Specifications
The stream system data specifications are listed below.
6.1 Data Table
The stream system data is shown in Table 6.1.
Table 6.1 Data Table
Data Data Name No.
Stream Access Status StmAcStat 1.0
Transfer Gate Status StmGate 2.0
Transfer Mode StmTrMode 3.0
Fundamental Data 4.0
Library Handler StmGrpHn, StmHn 5.0
Stream Key StmKey 6.0
Stream Play Area StmFrange 7.0
Sector Information StmSct 8.0
Error Control StmErr 9.0
Transfer Function StmTrfunc 10.0
Call Function when CD Buffer Full StmFullfunc 11.0
Error Function StmErrfunc 12.0
6.2 Data Details
6.2.1 Stream Access Status
Title Data Data Name No.
Data Specifications Stream Access Status StmAcStat 1.0
Table 6.2 Stream Access Status
Constant Name Stream Access Status
STM_EXEC_COMPLETED Access completed
STM_EXEC_PAUSE Access pause
STM_EXEC_DOING Accessing
STM_EXEC_WAIT Transfer wait
When the stream cannot be accessed under the following conditions, the constant
becomes STM_EXEC_WAIT.
Table 6.3 Conditions that Becomeransfer
T Wait
Transfer Gate Condition
Opening •When the transfer area is full.
•When the empty area in the CD buffer disappears before
transfer start FAD is reached.
Closing •When the stream read has ended.
•When the CD buffer is full.
6.2.2 Transfer Gate Status
Title Data Data Name No.
Data Specifications Transfer Gate Status StmGate 2.0
14
Table 6.4 Transfer Gate Status
Constant Name Transfer Gate Status
STM_GATE_OPEN Open status
STM_GATE_CLOSE Closed status
• The default is STM_GATE_OPEN.
6.2.3 Transfer Mode
Title Data Data Name No.
Data Specifications Transfer Mode StmTrMode 3.0
T able 6.5 Transfer Mode
Constant Name Transfer Method Load on CPU
STM_TR_SCU SCU DMA If the transfer destination is on B
bus the CPU is working completely
independently.
STM_TR_BDMA0 DMA burst channel 0 CPU is stopped.
STM_TR_BDMA1 DMA burst channel 1 CPU is stopped.
STM_TR_SDMA0 DMA cycle steal channel 0 Lower CPU processing capacity.
STM_TR_SDMA1 DMA cycle steal channel 1 Lower CPU processing capacity.
STM_TR_CPU Software The CPU is occupied but
interruption processing is
possible.
• The default is STM_TR_SCU.
6.2.4 Fundamental Data
Title Data Data Name No.
Data Specifications Fundamental Data 4.0
Table 6.6 Fundamental Data
Type Name Explanation
Uint8 Uncoded 1-byte integer
Sint8 Coded 1-byte integer
Uint16 Uncoded 2-byte integer
Sint16 Coded 2-byte integer
Uint32 Uncoded 4-byte integer
Sint32 Coded 4-byte integer
Bool Logic type. Takes the following values:
False
True
6.2.5 Library Handler
Title Data Data Name No.
Data Specifications Library Handler StmGrpHn, StmHn 5.0
External Specification Document: 15
Saturn Stream System
Table 6.7 Library Handler
Type Name Explanation
StmGrpHn Stream group handler
StmHn Stream handler
6.2.6 Stream Key
Title Data Data Name No.
Data Specifications Stream Key (1/2) StmKey 6.0
(1) Data Definitions
typedef struct {
Sint16 fn; /* File No. */
Sint16 cn; /* Channel No. */
Sint16 smmsk; /* Sum mode mask pattern */
Sint16 smval; /* Sub mode comparison value */
Sint16 cimsk; /* Coding information mask pattern */
Sint16 cival; /* Coding information comparison value */
} StmKey;
(2) Access Macro
#define STM_KEY_FN(stmkey) ((stmkey)->fn)
#define STM_KEY_CN(stmkey) ((stmkey)->cn)
#define STM_KEY_SMMSK(stmkey) ((stmkey)->smmsk)
#define STM_KEY_SMVAL(stmkey) ((stmkey)->smval)
#define STM_KEY_CIMSK(stmkey) ((stmkey)->cimsk)
#define STM-KEY-CIVAL(stmkey) ((stmkey)->cival)
(3) Constant
(a) File No.
STM_FN_NONE No file No. is specified.
(b) Channel No.
STM_CN_NONE No channel No. is specified.
Title Data Data Name No.
Data Specifications Stream Key (2/2) StmKey 6.0
(c) Sub Mode
The sector that is sector sub mode & smmsk == smval is read.
Table 6.8 Constants for Sub Mode Specification
Constant Name Type of Sector Read
STM_SM_AUDIO Audio sector
STM_SM_VIDEO Video sector
STM_SM_DATA Data sector
STM_SM_NONE No specification
(d) Coding Information
The sector that is coding information & cimsk == cival is read.
16
STM_CI_NONE Coding information is not specified.
6.2.7 Stream Play Area
Title Data Data Name No.
Data Specification Stream Play Area StmFrange 7.0
(1) Data Definition
typedef struct {
Sitn32 sfad; /* Play start FAD */
Sitn32 fasnum; /* Play sector No. */
} StmFrange:
(2) Access Macro
#define STM_AREA_SFAD(plyarea) ((plyarea)->sfad)
#define STM_AREA_FASNUM(plyarea) ((plyarea)->fasnum)
(3) Constant
Table 6.9 Constants for Play Area Specification
Constant Name Sector Position
STM_FAD_CDTOP Disk beginning FAD
STM_FAD_CDEND Sector count when read to end of disk
6.2.8 Sector Information
Title Data Data Name No.
Data Specifications Sector Information StmSct 8.0
(1) Data Definition
typedef struct {
Sint32 fad; /* Frame address
Sint32 fn; /* File No. */
Sint32 cn; /* Channel No. */
Uint8 sm; /* Sub mode */
Uint8 ci; /* Coding information */
} StmSct;
(2) Access Macro
#define STM_SCT_FAD(sct) ((sct)->fad)
#define STM_SCT_FN(sct) ((sct)->fn)
#define STM_SCT_CN(sct) ((sct)->cn)
#define STM_SCT_SM(sct) ((sct)->sm)
#define STM_SCT_CI(sct) ((sct)->ci)
6.2.9 Error Control
Title Data Data Name No.
Data Specifications Error Control StmErr 9.0
External Specification Document: 17
Saturn Stream System
(1) Data Definition
typedef struct {
Sint32 code; /* Error code */
Sint32 where; /* Error occurrence location */
StmErrFunc func /* Call function when error occurs. */
Void *obj; /* Call function’s first argument */
} StmErr;
(2) Access Macro
#define STM_ERR_CODE(err) ((err)->code)
#define STM_ERR_WHERE(err) ((err)->where)
#define STM_ERR_FUNC(err) ((err)->func)
#define STM_ERR_OBJ(err) ((err)->obj)
6 . 2 . 1 0 Transfer Function
Title Data Data Name No.
Data Specifications Transfer Function StmTrfunc 10.0
[Format] Sint32 (*StmTrFunc)(void *obj, StmHn stm, Sint32 nsct)
[Input] obj :Registration object
stm :Stream
nsct :Sector No.
[Output] None
6 . 2 . 1 1 Call Function when CD Buffer Is Full
Title Data Data Name No.
Data Specifications Call Function when CD Buffer Is Full StmFullfunc 11.0
[Format] void (*StmFullFunc)(void *obj)
[Input] obj :Registration object
[Output] None
6 . 2 . 1 2 Error Function
Title Data Data Name No.
Data Specifications Error Function StmErrfunc 12.0
[Format] void (*StmErrFunc) (void *obj)
[Input] obj :Registration object
[Output] None
18
7.0 Function Table
A list of the functions found in the stream system is given in Table 7.1.
Table 7.1 Function Table (1)
Function Function Name No.
Initialization 1.0
Stream system initialization STM_Init 1.1
Stream Group 2.0
Stream group open STM_OpenGrp 2.1
Stream group close STM_CloseGrp 2.2
Stream count acquisition STM_GetStmNum 2.3
Stream handler acquisition STM_GetStmHndl 2.4
Call function registration when CD buffer is full STM_SetCdbufFull 2.5
Stream 3.0
Stream open using file ID STM_OpenFid 3.1
Stream open using play area STM_OpenFrange 3.2
Resident stream open STM_OpenResi 3.3
Stream close STM_Close 3.4
Stream key setting STM_SetKey 3.5
Stream information acquisition STM_GetInfo 3.6
Change from sector count to word count STM_SctToWord 3.7
Change from word count to sector count STM_WordToSct 3.8
Transfer Setting 4.0
Transfer area setting STM_SetTrBuf 4.1
Transfer function setting STM_SetTrFunc 4.2
Transfer start in transfer function STM_StartTrans 4.3
Transfer gate open and close STM_SetTrGate 4.4
Setting maximum transfer sector count STM_SetTrPara 4.5
Setting transfer start FAD STM_SetTrFad 4.6
Setting transfer mode STM_SetTrMode 4.7
Transfer area reset STM_ResetTrBuf 4.8
Read Information Acquisition 5.0
CD buffer block’s sector count acquisition STM_GetNumCdbuf 5.1
Read sector information acquisition STM_GetSctInfo 5.2
Transfer Information Acquisition 6.0
Transfer area’s data count acquisition STM_GetLenTrBuf 6.1
Transfer area full check STM_IsTrBufFull 6.2
Stream Server Execution 7.0
Server execution group specification STM_SetExecGrp 7.1
Server execution STM_ExecServer 7.2
Play position setting STM_MovePickup 7.3
Loop start stream specification STM_SetLoop 7.4
Execution status acquisition STM_GetExecStat 7.5
Stream access end check STM_IsComplete 7.6
Stream data transfer STM_ExecTrans 7.7
External Specification Document: 19
Saturn Stream System
Table 7.1 Function Table (2)
Function Function Name No.
CD Block Operation 8.0
Filter and CD buffer block connection STM_ConnectCdbuf 8.1
CD buffer block data move STM_MoveCdbuf 8.2
CD buffer block data erase STM_EraseCdbuf 8.3
Error Handling 9.0
Registration of call function when error occurs STM_SetErrFunc 9.1
Error status acquisition STM_GetErrStat 9.2
20
8.0 Function Details
8.1 Initialization
Title Function Function Name No.
Function Specifications Stream System Initialization STM_Init 1.1
[Format] Bool STM_Init(void)
[Input] None
[Output] None
[Function Value] Initialization can normally be done: TRUE
Initialization cannot normally be done: FALSE
[Function]
Conduct initialization for using the stream system immediately after the
program boot.
[Remarks]
(a) Must be performed immediately after GFS_Init.
8.2 Stream Group
Title Function Function Name No.
Function Specifications Stream Group Open STM_OpenGrp 2.1
[Format] StmGrpHn STM_OpenGrp(void)
[Input] None
[Output] None
[Function Value] Stream group handler
NULL when the stream group could not be opened.
[Function]
Opens the stream group.
Title Function Function Name No.
Function Specifications Stream Group Close STM_CloseGrp 2.2
[Format] void STM_CloseGrp(StmGrpHn grp)
[Input] grp :Stream group handler
[Output] None
[Function Value] None
[Function]
Closes the stream group.
Title Function Function Name No.
Function Specifications Stream No. Acquisition STM_GetStmNum 2.3
[Format] Sint32 STM_GetStmNum(StmGrpHn grp)
[Input] grp :Stream group handler
[Output] None
[Function Value] Number of streams in the stream group.
[Function]
Acquires the number of streams in the specified stream group.
External Specification Document: 21
Saturn Stream System
Title Function Function Name No.
Function Specifications Stream Handler Acquisition STM_GetStmHndl 2.4
[Format StmHn STM_GetStmHndl(StmGrpHn grp, Sint32 nstm)
[Input] grp :Stream group handler
nstm :Play sequence No. (0 <= nstm < STM_GetStmNum)
[Output] None
[Function Value] Specified play sequence stream handler.
NULL when the pertinent stream does not exist.
[Function]
Acquires the handler for the streams in the specified stream group.
[Remarks]
(a) When four streams are in the same stream group as shown below, the play
sequence Nos. will be in the order of streams A, B, C, and D.
Stream Group
Stream A
Stream C
Stream B
Stream D
FAD
Figure 8.1 Stream Play Sequence No.
Title Function Function Name No.
Function Specifications Call Function Registration when CD STM_SetCdbufFull 2.5
Buffer Is Full
[Format] void STM_SetCdbufFull(StmGrpHn grp, Sint32 nsct, StmFullFunc func,
void *obj)
[Input] grp :Stream group handler
nsct :Empty sector count
func :Call function (STM_FL_NULLFUNC when erased)
obj :Registered object
[Output] None
[Function Value] None
[Function]
When the empty areas in the CD buffer fall below the specified value, the called
functions are registered.
[Remarks]
(a) Registered functions have the following format.
void (*StmFullFunc)(void *obj);
(b) Registered objects are turned over to the first argument of the registered
function.
22
8.3 Streams
Title Function Function Name No.
Function Specifications Stream Open Using File ID STM_OpenFid 3.1
[Format] StmHn STM_OpenFid(StmGrpHn grp, Gfsfid, StmKey *key)
[Input] grp :Stream group handler
fid :File ID
key :Stream key
[Output] None
[Function Value] Stream handler (NULL when cannot be opened)
[Function]
Opens the stream using the file ID and registers the stream in the specified
stream group.
[Remarks]
(a) The stream key file No. is not used.
Title Function Function Name No.
Function Specifications Stream Open Using Play Area STM_OpenFrange 3.2
[Format] StmHn STM_OpenFrange(StmGrpHn grp, StmFrange *plyarea, StmKey *key)
[Input] grp :Stream group handler
plyarea :Play area
key :Stream key
[Output] None
[Function Value] Stream handler (NULL when cannot be opened)
[Function]
Opens the stream using the play area and registers the stream in the stream
group.
Title Function Function Name No.
Function Specification Resident Stream Open STM_OpenResi 3.3
[Format] StmHn STM_OpenResi(StmGrpHn grp, GfsFid, StmKey, *Key Sint32 Fad)
[Input] grp :Stream handler
fid :File ID
key :Stream key
fad :Transfer start FAD
[Output] None
[Function Value] Stream handler (NULL when cannot be opened)
[Function]
Opens resident streams.
Title Function Function Name No.
Function Specifications Stream Close STM_Close 3.4
[Format] void STM_Close(StmHn stm)
[Input] stm :Stream handler
[Output] None
[Function Value] None
[Function]
Closes the specified stream.
External Specification Document: 23
Saturn Stream System
Title Function Function Name No.
Function Specifications Stream Key Setting STM_SetKey 3.5
[Format] void STM_SetKey(StmHn stm, StmKey *stmkey)
[Input] stm :Stream handler
stmkey :Stream key
[Output] None
[Function Value] None
[Function]
Sets the stream key for the specified stream.
Title Function Function Name No.
Function Specifications Stream Information Acquisition STM_GetInfo 3.6
[Format] StmGrpHn STM_GetInfo(StmHn stm, GfsFid *fid, StmFrange *plyarea, Sint32
*bn, StmKey *stmkey)
[Input] stm :Stream handler
[Output] fid :File ID (When opened using the play area (-1))
plyarea :Play area
bn :Buffer block No.
stmkey :Stream key
[Function Value Corresponding stream group
[Function]
Acquires specified stream information.
Title Function Function Name No.
Function Specifications Change From Sector count to Sector STM_SctToWord 3.7
Word
[Format] Sint32 STM_SctToWord(StmHn stm, Sint32 nsct)
[Input] stm :Stream handler
nsct :Sector count
[Output] None
[Function Value] The word Nos. corresponding to the specified Sector Nos.
[Function]
Acquires the word Nos. from the specified sector areas starting from the
beginning of the data that is written in the CD buffer block.
[Remarks]
(a) If a value larger than the read data word count is specified, the read sector count
will return.
(b) Valid even if Forms 1 and 2 are mixed together.
24
Title Function Function Name No.
Function Specifications Change From Word No. to Sector No. STM_WordToSct 3.8
[Format] Sint32 STM_WordToSct(StmHn stm, Sint32 nword)
[Input] stm :Stream handler
nword :Word count
[Output] None
[Function Value] Sector count corresponding to the specified word count
[Function]
Acquires the sector count from the specified word areas starting from the
beginning of the data that is written in the CD buffer block.
[Remarks]
(a) If a value larger than the read data word count is specified, the read sector count
will return.
(b) Valid even if Forms 1 and 2 are mixed together.
External Specification Document: 25
Saturn Stream System
8.4 Transfer Setting
Title Function Function Name No.
Function Specifications Transfer Area Setting STM_SetTrBuf 4.1
[Format] void STM_SetTrBuf(StmHn stm, Uint16 *buffer, Sint32 bufsize)
[Input] stm :Stream handler
buffer :Transfer area
bufsize :Size of transfer area (word unit)
[Output] None
[Function Value] None
[Function]
Data transfer area is set in the specified stream.
[Remarks]
(a) The default transfer mode is DMA from SCU.
(b) When the transfer function is set, the transfer function has priority.
Title Function Function Name No.
Function Specifications Transfer Function Setting STM_SetTrFunc 4.2
[Format] void STM_SetTrFunc(StmHn stm, StmTrFunc func, void *obj)
[Input] stm :Stream handler
func :Transfer execution function
obj :Registration object
[Output] None
[Function Value] None
[Function]
Sets the transfer function in the specified stream. (STM_TR_NULLFUNC for
erase)
[Remarks]
(a) The format for the registered function is given below.
Sint32 (*StmTrFunc)(void *obj, StmHn stm, Sint32 nsct);
obj :Registered object
stm :Stream
nsct :Sector count
(b) The transferred sector data is deleted from the CD buffer block.
(c) If data is being transferred at the time of a function end from DMA, etc., (-1) will
be returned.
26
Title Function Function Name No.
Function Specifications Transfer Start In Transfer Function STM_StartTrans 4.3
[Format] Uint16 *STM_StartTrans(StmHn stm, Sint32 *adlt)
[Input] stm :Stream handler
[Output] adlt :The portion of the transfer address that changes with each word
transfer.
[Function Value] Transfer address
[Function]
Begins transfer based on the transfer function.
[Remarks]
(a) When STM_SctToWord and STM_WordToSct are used for the transfer
function, they should be called before this function is executed.
Title Function Function Name No.
Function Specifications Transfer Gate Open and Close STM_SetTrGate 4.4
[Format] void STM_SetTrGate(StmHn stm, Sint32 gate)
[Input] stm :Stream handler
gate :Transfer gate status
[Output] None
[Function Value] None
[Function]
Opens and closes the specified stream’s transfer gate.
Title Function Function Name No.
Function Specifications Setting Maximum Transfer Sector count STM_SetTrPara 4.5
[Format] void STM_SetTrPara(StmHn stm, Sint32 tsct)
[Input] stm :Stream handler
tsct :Maximum transfer sector count (STM_TR_ALL for all read sectors.)
[Output] None
[Function Value] None
[Function]
Sets the maximum sector count that can be transferred at one time from the CD
buffer block to the transfer area.
[Remarks]
(a) The data read into the CD buffer block is divided to a size less than this sector
size and transferred.
(b) The default is one sector.
External Specification Document: 27
Saturn Stream System
Title Function Function Name No.
Function Specifications Setting Transfer Start FAD STM_SetTrFad 4.6
[Format] void STM_SetTrFad(StmHn stm, Sint32 fad)
[Input] stm :Stream handler
fad :Transfer start FAD setting
[Output] None
[Function Value] None
[Function]
Sets the FAD that begins transfer of the data in the CD buffer block.
[Remarks]
(a) The default is the stream beginning FAD.
Title Function Function Name No.
Function Specifications Setting Transfer Mode STM_SetTrMode 4.7
[Format] void STM_SetTrMode(StmHn stm, Sint32 tmode)
[Input] stm :Stream handler
tmode :Transfer mode
[Output] None
[Function Value] None
[Function]
Sets the transfer method from the CD buffer block to the transfer area.
Title Function Function Name No.
Function Specifications Transfer Area Reset STM_ResetTrBuf 4.8
[Format] void STM_ResetTrBuf(StmHn stm)
[Input] stm :Stream handler
[Output] None
[Function Value] None
[Function]
Initializes the transfer destination pointer.
28
8.5 Read Information Acquisition
Title Function Function Name No.
Function Specifications CD Buffer Block’s Sector count STM_GetNumCdbuf 5.1
Acquisition
[Format] Sint32 STM_GetNumCdbuf(StmHn stm)
[Input] stm :Stream handler
[Output] None
[Function Value] The CD buffer block sector count
[Function]
Acquires the sector count that is read into the CD buffer block.
Title Function Function Name No.
Function Specifications Read Sector Information Acquisition STM_GetSctInfo 5.2
[Format] Bool STM_GetSctInfo(StmHn stm, Sint32 sn, StmSct *sinfo)
[Input] stm :Stream handler
sn :Sector No. (The first sector is STM_CDBUF_TOP)
[Output] sinfo :Sector information
[Function Value] TRUE There is a specified sector.
FALSE There is no specified sector.
[Function]
Acquires the sector information that is read into the CD buffer block.
External Specification Document: 29
Saturn Stream System
8.6 Transfer Information Acquisition
Title Function Function Name No.
Function Specifications Transfer Area’s Data count Acquisition STM_GetLenTrBuf 6.1
[Format] Sint32 STM_GetLenTrBuf(StmHn stm)
[Input] stm :Stream handler
[Output] None
[Function Value] Data count (word unit)
[Function]
Acquires the transfer area data count (word).
Title Function Function Name No.
Function Specifications Transfer Area Full Check STM_IsTrBufFull 6.2
[Format] Bool STM_IsTrBufFull(StmHn stm)
[Input] stm :Stream handler
[Output] None
[Function Value] TRUE When the area size is reached.
FALSE When the area size is not reached.
[Function]
Checks whether the transfer area data count has reached the area size.
[Remarks]
(a) The transfer area can be initialized by STM_ResetTrBuf.
30
8.7 Stream Server Execution
Title Function Function Name No.
Function Specifications Server Execution Group Specification STM_SetExecGrp 7.1
[Format] void STM_SetExecGrp(StmGrpHn grp)
[Input] grp :Stream group handler
[Output] None
[Function]
Specifies the stream group that is executed by the stream server.
[Remarks]
(a) When NULL is specified, the stream server is in stop status.
(b) When the stream group is reaccessed, the stop position is read.
Title Function Function Name No.
Function Specifications Server Execution STM_ExecServer 7.2
[Format] Sint32 STM_ExecServer(void)
[Input] None
[Output] None
[Function Value] Stream access status
[Function]
Executes the stream server.
Title Function Function Name No.
Function Specifications Play Position Setting STM_MovePickup 7.3
[Format] void STM_MovePickup(StmHn stm, Sint32 ofs)
[Input] stm :Stream handler
ofs :Offset from the stream beginning (sector unit)
[Output] None
[Function Value] None
[Function]
Sets the play position of the stream group that contains the stream.
[Remarks]
(a) Move destination FAD = stream beginning FAD + offset.
(b) The pickup position is moved by STM_ExecServer.
External Specification Document: 31
Saturn Stream System
Title Function Function Name No.
Function Specifications Loop Start Stream Setting STM_SetLoop 7.4
[Format] void STM_SetLoop(StmGrpHn grp, StmHn loopstm)
[Input] grp :Stream group handler
loopstm :Loop start stream
[Output] None
[Function Value] None
[Function]
Specifies the stream group’s loop start stream.
[Remarks]
(a) Does not loop when NULL is specified.
(b) When the loop start stream is closed, the beginning stream becomes the loop
start stream.
Title Function Function Name No.
Function Specifications Execution Status Acquisition STM_GetExecStat 7.5
[Format] SINT32 STM_GetExecStat(StmGrpHn grp, Sint32 *fad)
[Input] grp :Stream group handler
[Output] fad :FAD during play
[Function Value] Stream access status
[Function]
Acquires the execution status of the specified stream group.
Title Function Function Name No.
Function Specification Stream Access End Check STM_IsComplete 7.6
[Format] Bool STM_IsComplete(StmHn stm)
[Input] stm :Stream handler
[Output] None
[Function Value] When stream access has ended TRUE
When stream access has not ended FALSE
[Function]
Checks whether access for the specified stream has ended.
[Remarks]
(a) The timing of stream access end is given below.
Table 8.1 Stream Access End Timing
Transfer Gate Timing
Closed When the read has ended
Open When the transfer has ended
32
Title Function Function Name No.
Function Specifications Stream Data Transfer STM_ExecTrans 7.7
[Format] Bool STM_ExecTrans(StmHn stm)
[Input] stm :Stream handler
[Output] None
[Function Value] TRUE Transferred
FALSE Could not transfer
[Function]
Transfers the data of the specified stream in the CD buffer block.
[Remarks]
(a) Always FALSE when the transfer gate is closed.
(b) The set transfer mode and maximum transfer sector count are valid.
External Specification Document: 33
Saturn Stream System
8.8 CD Block Operation
Title Function Function Name No.
Function Specification Filter and CD Buffer Block Connection STM_ConnectCdBuf 8.1
[Format] void STM_ConnectCdbuf(StmHn keystm, StmHn bufstm)
[Input] keystm :Connection origin stream handler
bufstm :Connection destination stream handler (STM_CON_NULBUF when
disconnected)
[Output] None
[Function Value] None
[Function]
Connects the filter in the CD block to the buffer block.
[Remarks]
(a) Reads from the filter allocated to the connection origin stream to the CD buffer
block allotted to the connection destination stream.
(b) The same stream handler is specified when returning to the original setting.
(c) Shows connection for when the stream key is set to the OR condition.
A or B
B
Figure 8.2 Connection When Stream Key Is Set to OR Condition
Title Function Function Name No.
Function Specifications CD Buffer Block Data Move STM_MoveCdbuf 8.2
[Format] void STM_MoveCdbuf(StmHn src, Sint32 spos, Sint32 snum, StmHn dst)
[Input] src :Transfer source stream handler
spos :Sector position (the beginning sector is STM_CDBUF_TOP)
snum :Sector number (count) (STM_CDBUF_END when all the way to the
end)
dst :Transfer destination stream handler
[Output] None
[Function Value] None
[Function]
Moves sector data from the buffer block in the CD block to filter.
[Remarks]
(a) Moves sector data from the CD buffer block allotted to the transfer origin
stream to the filter allotted to the transfer destination stream.
34
Figure 8.3 Connection During Sector Data Move
Title Function Function Name No.
Function Specifications CD Buffer Block Data Erase STM_EraseCdbuf 8.3
[Format] void STM_EraseCdbuf(StmHn stm, Sint32 spos, Sint32 snum)
[Input] stm :Stream handler
spos :Sector position (STM_CDBUF_TOP for beginning of sector)
snum :Sector number (count) (STM_CDBUF_END when all the way to the
end)
[Output] None
[Function Value] None
[Function]
Erases sector data in the CD buffer block allotted to the stream.
External Specification Document: 35
Saturn Stream System
8.9 Error Handling
Title Function Function Name No.
Function Specifications Registration of Call Function When STM_SetErrFunc 9.1
Error Occurs
[Format] void STM_SetErrFunc(StmErrFunc func, void *obj)
[Input] func :Call function
obj :Registered object
[Output] None
[Function Value] None
[Function]
Registers the function called when an error occurs.
[Remarks]
(a) The details regarding errors have not been decided yet.
(b) The registered function has the following format:
void (*StmErrFunc)(void *obj);
(c) The registered object is turned over to the registered function’s first argument.
Title Function Function Name No.
Function Specifications Error Status Acquisition STM_GetErrStat 9.2
[Format] StmErr *STM_GetErrStat(void)
[Input] None
[Output] None
[Function Value] Error control structure
[Function]
Acquires error status.
[Remarks]
(a) The details regarding errors have not yet been set.
36
Precautionary Items Regarding Stream System Library Ver. 0.1
(a) The maximum number of stream groups that can be open at the same time is 12.
(b) The number of streams that can be opened at the same time is a maximum of 24,
including the number of files currently open per file system
(c) The handling procedures for errors have not yet been set.
(d) To use the stream system, the file system and CD communication interface must
be linked.
External Specification Document: 37
Saturn Stream System
TM
Sega Saturn
Software Development
Standards
SOA Version 2.0
Doc. # ST-151-R4-020197
© 1995-96 SEGA. All Rights Reserved.
Table of Contents
1. Game Sequence.............................................................................................................1
1.1. Sega Brand Game Sequence .............................................................................1
1.2. Third Party Brand Game Sequence ....................................................................2
2. Peripheral Check
2.1. When Must the Checks Occur?...........................................................................3
2.2. What Must be Checked? .....................................................................................3
2.3. Mandatory Peripheral Compatibility.....................................................................3
2.3.1. Standard Digital Devices..........................................................................4
2.3.2. Multitap ....................................................................................................4
2.3.3. Analog Controllers ..................................................................................5
2.3.4. Steering Controller ...................................................................................6
3. Company Logo Displays .................................................................................................7
3.1. Sega Logo Screen Display Requirements ..........................................................7
3.2. Skipping the Sega Logo Screen .........................................................................7
3.3. Application-Based Sega Logo Screen Display Format Requirements.................8
3.4. Third Party Company Logo Screen Display Format Requirements .....................8
4. Title Screen.....................................................................................................................9
4.1. Screen Display ....................................................................................................9
4.2. Sega Brand Game Title Logo Screen Requirements .........................................9
4.3. Third Party Brand Game Title Logo Screen Requirements .................................9
4.4. Sega Brand Game Title Copyright Display ..........................................................9
4.5. Third Party Brand Game Title Copyright Display ..............................................10
4.6. Proceeding to the Next Screen ........................................................................10
5. Demonstration Sequence .............................................................................................11
5.1. Screen Display .................................................................................................11
5.2. Demonstration Time .........................................................................................11
5.3. Audio During Demonstration .............................................................................11
5.4. Proceeding to the Next Screen .........................................................................11
6. Start/Options Select Screen .........................................................................................12
6.1. Differentiating the Start/Options Screen from the Title Screen
(Game Start Screen) .........................................................................................12
6.2. Limiting Menu Item Selection ............................................................................12
6.3. Proceeding to the Next Screen ........................................................................12
7. Options Screen .............................................................................................................13
7.1. Options .............................................................................................................13
7.2. Standard Options Screen Items ........................................................................13
7.3. Options Screen Controls ..................................................................................14
7.4. Retaining Option Settings..................................................................................14
7.5. Proceeding to the Next Screen .........................................................................14
Sega Saturn Software Development Standards, SOA version 2.0 ii
8. Main Game ...................................................................................................................15
8.1. Screen Display .................................................................................................15
8.1.1. Display Area Limits for On-Screen ........................................................15
8.1.2. Standardization of Terminology .............................................................15
8.1.3. Scores....................................................................................................16
8.1.4. High Scores ...........................................................................................16
8.2. Control Pad and Button Setup...........................................................................16
8.2.1. Basic Control Pad Setup........................................................................16
8.2.2. Basic Button Setup ................................................................................16
8.2.3. Basic Button Setup Examples................................................................17
8.2.4. Sega Saturn Input Peripheral Software Development Standards ..........18
8.3. Pause ................................................................................................................38
8.3.1. Enabling and Disabling Pause ...............................................................38
8.3.2. Screen Display During Pause ................................................................38
8.3.3. Pause Prohibited State ..........................................................................38
8.3.4. Sound During Pause..............................................................................38
8.4. Reset.................................................................................................................39
8.4.1. Reset Implementation Requirement.......................................................39
8.4.2. Reset Method ........................................................................................39
8.5. Game Over Continue ........................................................................................40
8.5.1. Continue Function..................................................................................40
8.5.2. Proceeding to the Next Screen ..............................................................40
8.6. Ending/Game Credits ........................................................................................40
8.6.1. Cancel Disabled.....................................................................................40
8.6.2. Personal Names Used in the Game Credits ..........................................40
8.6.3. Proceeding to the Next Screen .............................................................41
8.6.4. Sega Saturn Game Credits Display Standards......................................41
9. Supplement...................................................................................................................43
9.1. Handling the Open CD Door State ....................................................................43
9.2. Compatible Area Codes (Territory Lockout) ......................................................43
Appendix 1 Sega Saturn Game Content, Trademark and Copyright Standards and Software
Content Library Usage Trademark/License Display Standards .........................44
Appendix 2 Sega Saturn Backup Memory System Standards .............................................46
Appendix 3 Multiple Disc Applications Software Development Standards ...........................59
Sega Saturn Software Development Standards, SOA version 2.0 iii
IMPORTANT
Sections labeled as “Required Compliance Item” are mandatory requirements which will be noted
as A BUGS if not followed.
Sections labeled as “Recommended Compliance Item” are considered as minor bugs which will be
noted as B BUGS.
Sega Saturn Software Development Standards, SOA version 2.0 4
1. Game Sequence
1.1 Sega Brand Game Sequence
A typical sample game sequence for a Sega brand Sega Saturn
application is shown in the figure below.
Power ON
Boot ROM
Start-Up
Sequence
Display Saturn Logo
Security check
Boot Rom-based logo data is
used for the initial Sega
Application license logo display.
Display SEGA license logo
Demo/Title
Loop Peripheral Check The application-based Sega logo is
Sequence not displayed immediately after
the boot ROM-based Sega license
logo.
Was Sega license
Yes
logo displayed?
No
Title Loop
Sequence Application-based Sega Logo
SEGA logo
Timer
Press Press
Game Title Start/Options Options Screen
Start Start
Button Screen Button Select Screen
Timer
Demonstration
Sequence
Timer
Main Game
Press Start Button or Wait for Timer
Figure 1.1 Typical Game Sequence
Required Control Pad checks should be performed frequently during
Compliance Item the Title Loop sequence.
Recommended Do not display the application-based Sega logo immediately
Compliance Item after the “PRODUCED BY or UNDER LICENSE FROM
SEGA ENTERPRISES, LTD.” boot ROM-based Sega trademark
logo screen display that occurs during the boot ROM startup
sequence.
Sega Saturn Software Development Standards, SOA version 2.0 1
1.2 Third Party Brand Game Sequence
A typical sample game sequence for a third party brand Sega Saturn
application is shown in the figure below.
Power ON
Boot ROM
Start-Up
Sequence Display Saturn Logo
Security check
Boot Rom-based logo data is
used for the initial Sega
Application license logo display.
Display SEGA license logo
Demo/Title
Loop
Sequence
Peripheral Check
Title Loop
Sequence
Company Logo
Timer
Press Press
Game Title Start/Options Options Screen
Start Start
Button Screen Button Select Screen
Timer
Demonstration
Sequence
Timer
Main Game
Press Start Button or Wait for Timer
Figure 1.2 Typical Game Sequence
Required Control Pad checks should be performed frequently during
Compliance Item the Title Loop sequence.
Sega Saturn Software Development Standards, SOA version 2.0 2
2. Peripheral Check
Required A check for peripherals (typically a Control Pad) connected to the
Compliance Item Sega Saturn must be performed by the application before the game is
started.
For more detailed information on Sega Saturn input peripheral support
guidelines, please consult Section 8.2.4: Sega Saturn Input Peripheral
Software Development Standards.
2.1 When Must the Checks Occur?
Peripheral checks should be active during the Title Loop
sequence in addition to the start of the game (see Figure 1.1
above).
Required Peripheral check routines must be incorporated throughout
Compliance Item the game to accommodate possible errors that may occur
from (un)intentional peripheral device disconnection.
2.2 What Must be Checked?
Required The absence of a peripheral or a peripheral connected only
Compliance Item at Control Port 2 is equivalent to null controller input state
(i.e., no controller input is sensed. The game cannot be started in
this state).
If an active peripheral is disconnected during the course of an action
or time-oriented game, detect the disconnect as a “null input” state,
followed by a system pause or a warning display. In either case, the
game must not continue while the peripheral is disconnected. The
affected port becomes an unused active port.
Required If the peripheral is reconnected, the user must be able to
Compliance Item resume a normal game session. After the game is placed in
pause mode prior to the disconnection of the peripheral, the
game must resume by pressing the “START” button after
reconnection of the peripheral.
2.3 Mandatory Peripheral Compatibility
Required Compatible peripherals must support transparent recovery
Compliance Item from input peripheral disconnect/reconnect activity during
the game session (prior to or after game start).
Required Support for incompatible peripherals within the game
Compliance Item application is defined as software measures to prevent
Sega Saturn Software Development Standards, SOA version 2.0 3
possible system crashes or operational problems caused by the
connection of that device type to the Sega Saturn. Data output
from incompatible input peripherals must be ignored and a
warning message displayed to instruct the user to connect a
compatible input peripheral.
Required All games must support the 8-Button Control Pad, Virtua
Compliance Item Stick, 6Player, and Mission Stick peripherals as follows:
2.3.1 Standard Digital Devices
• Compatibility
Fully compatible with all games.
• Peripheral Types
8-Button Control Pad, Virtua Stick.
• SMPC Standard Format Type
Saturn Digital Device (see the SMPC User’s Manual for more
information).
• Special Considerations
None.
2.3.2 Multitap
• Compatibility
Fully compatible with all games.
• Peripheral Types
6Player.
• SMPC Standard Format Type
Not applicable (see the SMPC User’s Manual for more information).
The 6Player supports all of the 4 Sega Saturn Standard Format Types
for protocols with a maximum data size of 15 bytes.
Sega Saturn Software Development Standards, SOA version 2.0 4
• Special Considerations
For single player games, the game must support operation from any
one of the 6 peripheral ports when the 6Player is connected to Control
Port 1 (left port when looking at the front of the Sega Saturn). The
use of Control Port 2 for single player games is prohibited.
2.3.3 Analog Controllers
• Compatibility
Fully compatible with all games in digital mode as a minimum (analog
mode is optional).
• Peripheral Types
Mission Stick (and possibly other analog peripherals in the
future).
• SMPC Standard Format Type
Saturn Analog Device (see the SMPC User’s Manual for more
information).
• Special Considerations
The first 2 data bytes of the Saturn Analog Device Format are
identical to the first 2 data bytes of the Saturn Digital Device.
Therefore, the Mission Stick provides virtual compatibility with the
Digital Device format by inserting digital data in the Right, Left,
Down, and Up bits that correspond to movements of the stick. This 2-
axis movement is also represented by the X and Y analog data in
bytes 3 and 4.
Game producers/developers can choose to make their games
fully compatible with all available functions of an analog controller to
enhance game play (e.g., using the X, Y, and Z
analog data from the Mission Stick). Games can also support
additional peripherals that may be available in the future, but
that make use of SMPC Standard Formats. Examples would be:
• 6-Axis Analog Controller, which uses the Saturn Analog Device
Standard Format.
• Mouse, which uses the Saturn Pointing Device Standard Format.
Sega Saturn Software Development Standards, SOA version 2.0 5
2.3.4 Steering Controller
Required All driving games must support the Arcade Racer as described
Compliance Item below in addition to the peripheral requirements already
described:
• Compatibility
Fully compatible in analog mode.
• Peripheral Types
Arcade Racer (and possibly other steering controller peripherals
in the future).
• SMPC Standard Format Type
Saturn Analog Device (see the SMPC User’s Manual for more
information).
• Special Considerations
The digital mode of the Arcade Racer (used for Left and Right) is
not approved for use in any game because of inadequate (slow)
response times. For the Arcade Racer, the Up and Down bits in the
Saturn Analog Device standard format are activated by the “paddles”
on the steering column: Left Paddle = Up, and Right Paddle = Down.
Required The Arcade Racer does not provide buttons that activate the
Compliance Item RTRG and LTRG bits. Therefore, driving games that make use
of the Left and/or Right Flipper buttons on the 8-Button Control
Pad must implement an alternate means of triggering those
functions when an Arcade Racer is connected.
Sega Saturn Software Development Standards, SOA version 2.0 6
3. Company Logo Displays
3.1 Sega Logo Screen Display Requirements
• At Power On:
Required The application must display the “PRODUCED BY or
Compliance Item UNDER LICENSE FROM Sega ENTERPRISES, LTD.” boot
ROM-based Sega trademark logo screen immediately after power
on.
The logo data provided by Sega must be displayed without
modification.
• In the Title Loop Sequence (Sega Brand Titles ONLY):
Required The Sega logo must be displayed according to the format
Compliance Item described in section 3. 3 Screen Display.
Important! However, this does not apply to situations where a licensing
agreement explicitly overrides this logo display requirement. If
this applies, there must be compliance with the logo display
requirements stipulated in the licensing agreement.
• Sega Product Group/Team Logos (Sega Brand Titles
ONLY)
Required Sega product group/team logos (e.g. Sega Sports) must be
Compliance Item displayed immediately after the initial Sega logo display.
• Display of Contract Developer’s Logo (Optional)
Recommended If the display of the contract developer’s logo is required, that
Compliance Item logo may be displayed AFTER the display of the Sega logo in the
Title Loop sequence. The contract developer’s logo should be
displayed AFTER the Sega product group logo.
3.2 Skipping the Sega Logo Screen (Sega Brand
Titles ONLY)
Recommended The screen display sequence shown below should be avoided after
Compliance Item the power is turned on or the RESET switch on the Sega Saturn is
pressed:
1. Boot ROM-based Sega Saturn product logo screen.
2. Boot ROM-based “PRODUCED BY or UNDER LICENSE
FROM...” Sega logo screen.
3. Application-based Sega logo screen.
Sega Saturn Software Development Standards, SOA version 2.0 7
Avoid the display of the application-based Sega logo immediately
after the boot ROM-based “PRODUCED BY or UNDER LICENSE
FROM...” Sega logo screen.
The contract developer’s logo display should also be skipped in
this case.
3.3 Application-Based Sega Logo Screen Display
Format Requirements
(Sega Brand Titles ONLY)
Required The registered trademark “Sega” must be displayed in the
Compliance Item center of the TV screen. The trademark symbol “®” must be
included with the Sega logo for products sold exclusively within
the United States. (Consult a localization specialist for products
destined for countries other than the U.S.)
Since this is a registered trademark, it must be displayed in the
same colors and shape as it is registered. There are no explicit
guidelines governing the display size.
Required The Sega logo must be displayed for approximately 2 seconds
Compliance Item in the official trademark format. If the START Button is
pressed before the final form of the logo is drawn on-screen,
the logo must still be allowed to display in its registered trade-
mark form before proceeding to the next screen.
3.4 Third Party Company Logo Screen Display
Format Requirements
(Third Party Brand Titles ONLY)
A third party developer may display their company logo as desired.
Follow internal company logo style guidelines to standardize the
screen display format. The Sega logo screen display format require-
ments above can be used as an example.
Sega Saturn Software Development Standards, SOA version 2.0 8
4. Title Screen
Required The Title Screen is defined as the “Game Start Screen”. “Post-Game
Compliance Item Start State” is defined as the point after the START Button is pressed
in this screen. “Pre-Game Start State” is defined as any time prior to
the START Button press.
4.1 Screen Display
Required The following three items are minimum display requirements:
Compliance Item
• Title logo
• The words “PRESS START BUTTON” (Do not use the
word “PUSH”.)
• Copyright information
4.2 Sega Brand Game Title Logo Screen
Requirements
Required The game title logo must be displayed in its final form for
Compliance Item approximately 2 seconds. In addition, the trademark
characters “™” must be shown on the upper right hand
corner of the title logo.
Required When handling trademarks owned by other companies,
Compliance Item make sure to consult and confirm the contents of the
applicable licensing agreements and observe their terms.
4.3 Third Party Brand Game Title Logo Screen
Requirements
Required The game title logo must be displayed in its final form for
Compliance Item approximately 2 seconds.
4.4 Sega Brand Game Title Copyright Display
Recommended Copyright information should always be displayed at the bottom
Compliance Item of the game's Title Screen.
Required Copyright information must be displayed as shown below for
Compliance Item original products developed by Sega.
© Sega Enterprises, Ltd., 199X
Sega Saturn Software Development Standards, SOA version 2.0 9
Required Always follow the following display format:
Compliance Item
© Formal Company Name, First Year of Release
There are no guidelines governing font style and color usage.
“First Year of Release” means “first year of sale”.
Recommended The display of copyright information for products other than
Compliance Item original works developed by Sega is typically determined by their
development/licensing agreements. For such products, make sure
to consult the development/licensing agreements for copyright
information display requirements.
4.5 Third Party Brand Game Title Copyright
Display
Recommended Copyright information should always be displayed at the bottom of
Compliance Item the game’s Title Screen as in the following example:
© Sega Enterprises, Ltd., 199X
Required Always follow the following display format:
Compliance Item
© Formal Company Name, First Year of Release
There are no guidelines governing font style and color usage.
“First Year of Release” means “first year of sale”
4.6 Proceeding to the Next Screen
When the START Button on the Control Pad is pressed during
the Title Screen, the Start/Options selection screen is displayed.
Recommended During the Title Screen, the game should not respond to any
Compliance Item controller input with the exception of the START Button (This
may not apply in the case of a game that requires mouse input.)
If the START Button is not pressed, then the game demonstration
is started after the title screen is displayed for a preset time period.
Sega Saturn Software Development Standards, SOA version 2.0 10
5. Demonstration Sequence
5.1 Screen Display
Recommended Display the words “PRESS START BUTTON” and “DEMO “
Compliance Item during the demonstration sequence frequently.
If applicable to the game, display high scores as well as the score
from the previous game during the demonstration sequence to enable
the user to verify scores.
5.2 Demonstration Time
The demonstration should last approximately 30 seconds.
5.3 Audio During Demonstration
Audio should be present during the demonstration.
5.4 Proceeding to the Next Screen
Return to the Title Screen when the START Button is pressed
during the demonstration.
End the demonstration sequence after a preset time period if no
button is pressed and return to the Sega logo screen (for third
party titles, the company logo screen).
Sega Saturn Software Development Standards, SOA version 2.0 11
6. Start/Options Select Screen
The on-screen display of “OPTIONS” occurs during the Post-Game Start
State. The “Main Game State” is defined as the point after the game is
started from the Start/Options Screen.
6.1 Differentiating the Start/Options Screen from
the Title Screen (Game Start Screen)
Recommended The Start/Options selection screen must not be used as the Game
Compliance Item Start Screen (The Start/Options Screen menu items should be
displayed after the START Button is pressed in the Title Screen.).
Other menu items in addition to the Start/Options items may be
included as necessary.
6.2 Limiting Menu Item Selection
Recommended Based on the Control Pad’s or any other input peripheral device’s
Compliance Item connection status and the game start status (e.g., whether Control
Pad 1 or 2’s Start Button was pressed), disable the user’s ability
to select the menu items that cannot be supported under those
conditions.
Example:
• The user must not be able to select a two player game menu
item when a Control Pad is connected only to Control Port 1.
Disabled menu items may be displayed in the menu, but the
selection cursor should not be able to move to that item (The shape,
color, etc., of the menu items should be changed to visually indicate
that they cannot be selected.).
6.3 Proceeding to the Next Screen
Select using the Directional Pad (D-Pad), confirm with the
START Button, and then proceed to the Main Game or Options
screen.
Sega Saturn Software Development Standards, SOA version 2.0 12
7. Options Screen
7.1 Options
Recommended Provide the user with as many game options as possible unless the
Compliance Item options compromise the quality of the game or if the game is a port
from an original that does not provide an “options” feature.
7.2 Standard Options Screen Items
The following are defined to be standard option items:
• LEVEL Sets the difficulty level
• PLAYERS Sets the number of players
• CONTROL Sets game controls
• RAPID FIRE Sets rapid fire/firing speed
• AUDIO Sets sound output
• SOUND TEST Performs a sound test
• EXIT Exits Options Screen
Required Always include a sound output setting to switch between stereo
Compliance Item and mono audio output. (This requirement does not apply to
game applications that only support mono audio output.)
Required Adjustments to the internal Sega Saturn system clock may NOT
Compliance Item be made from within the game application. Adjustments to the
system clock are supported by the internal boot ROM application.
The user must set the system clock in the “Set Clock” menu.
Required The “CONTROL” option should enable the user to set
Compliance Item controller settings for each button.
Sega Saturn Software Development Standards, SOA version 2.0 13
7.3 Options Screen Controls
The standard controls for a typical Options Screen shown below are
as follows:
Up/Down on the D-Pad: Select option item
Left/Right on the D-Pad: Select sub-option item
OPTIONS
LEVEL EASY >NORMAL< HARD
PLAYER 1 2 >3< 4 5
CONROL →
RAPID FIRE >ON< OFF
AUDIO >STEREO< MONO
SOUND TEST BGM 01
SE 001
VOICE “Help me!”
EXIT
7.4 Retaining Option Settings
The settings made in the Options Screen are initialized only when
the power is switched off and by resets.
Reset Condition Settings Initialized?
Power Off Yes
RESET Button Yes
Title Loop Software Reset Yes
(A+B+C+START Button)
Main Game Software No
Reset
(A+B+C+START Button)
Required Option settings must be retained when reset is performed during
Compliance Item the Main Game state by pressing A+B+C+START Buttons.
7.5 Proceeding to the Next Screen
Required After “Exit” is selected and an arbitrary decision button is
Compliance Item pressed or the START Button is pressed at an arbitrary
position, the screen must return immediately to the
Start/Options screen.
Always return back to the Start/Options screen and not to the
Sega logo (company logo) screen or Title Screen.
Sega Saturn Software Development Standards, SOA version 2.0 14
8. Main Game
8.1 Screen Display
8.1.1 Display Area Limits for On-Screen Items
Required Important items such as the game score and the number of
Compliance Item remaining player units (player lives) must not be displayed in
the following areas:
• The two cell area on the left/right sides of the game screen.
• The one cell area on the top/bottom of the game screen.
Note that the above screen dimensions are equivalent to the 40 x 28
cell mode. This requirement takes into account the differences in
the display area of monitors.
8.1.2 Standardization of Terminology
Recommended Sega recommends that the display of scores and high scores be
Compliance Item unified as shown below:
Recommended Do Not use
1 Player Scoring SCORE POINT
2 Player Scoring PLAYER 1 1 UP / 2 UP
PLAYER 2
(or 1P / 2P)
High Score HIGH SCORE HI SCORE
(or TOP)
Table 8.1 Recommended Terms for Scores and High Scores
The display for the number of remaining player units does not
count the play unit in use.
Example:
• When 2 is displayed as the number of lives, it means that there
are 2 lives left in addition to the life that is currently being used.
Accordingly, if the game is over after one life is lost, then “0”
should be displayed.
In order to avoid confusion, the same name should not be used more
than twice within a game (especially for user-interface items).
Example:
• A menu item under the “Tournament Mode” should not be
called “Tournament.”
Sega Saturn Software Development Standards, SOA version 2.0 15
8.1.3 Scores
The initial setting for scores is “0.”
8.1.4 High Scores
High scores are not initialized after a reset. The player should also
be able to see the high scores as well as the score from the previous
game during the demo sequence.
8.2 Control Pad and Button Setup
For more detailed information on Sega Saturn input peripheral
support guidelines, please consult Section 8.2.4: Sega Saturn Input
Peripheral Software Development Standards.
8.2.1 Basic Control Pad Setup
Required The following rules must be observed when assigning operations
Compliance Item to the Control Pad:
• A Control Pad must always be connected to Control Port 1 in
order for the player to start the game.
• Control Port 1 must always be assigned to player 1 functions
and Control Port 2 must always be assigned to player 2
functions (Except when a Control Pad is not connected to
Control Port 2).
• When a 6Player is used, the first port must always be
assigned to player 1. The next port to the right is assigned to
player 2.
8.2.2 Basic Button Setup
Required The following rules must be observed when assigning
Compliance Item operations to the Control Pad buttons:
• Make sure that the “A, B, C” Buttons are all used.
• The START Button (used for the Start and Pause functions)
input must be recognized regardless of input from other
buttons.
• All button presses must have an immediate effect (unless a
delayed response is a wholly intentional aspect of the
game/application design).
Sega Saturn Software Development Standards, SOA version 2.0 16
Recommended • The use of buttons A, B, C must be given priority over the use of
Compliance Item buttons X, Y, L, R.
Recommended • Button C should be given priority over Button A for use as a
Compliance Item “Select Button”. Button B should be used as a “Cancel Button”.
(This takes into consideration the relative accessibility of each
button.)
Recommended As a rule, the Control Pad button usage priority is C>B>A.
Compliance Item Button functions should be assigned based on criteria such as
the frequency of use, the degree of skill required, or the power
of the shot/action.
8.2.3 Basic Button Setup Examples
Although the following should only be used as examples, button
functions should be set up so that they do not differ too much from
other games. In addition, the user should be free to reconfigure button
functions (refer to section 7. Options).
Examples:
Action Racing
L,R Not used L,R Drift
X,Y,Z Not used X,Y,Z Not used (or may mirror
A Special attack A,B,C functions)
B Normal attack A,C Accelerate
C Jump B Brake
Fighting Shooter
L,R Defense, etc. (Typical air-to-air/ ground shooter)
X,Y,Z Weak, medium and L, R Change view
strong punches X,Y,Z Secondary attack (ground
A,B,C Weak, medium and attack)
strong kicks A,B,C Primary attack (air attack)
Role Playing / Adventure
L,R Special function
X,Y,Z Special function (display map, etc.)
A Inspect area, etc.
B Cancel
C Confirm, open window
Sega Saturn Software Development Standards, SOA version 2.0 17
8.2.4 Sega Saturn Input Peripheral Software Development
Standards
This document contains standards for developing Sega Saturn
software applications that support Sega Saturn input peripheral
devices such as the standard Sega Saturn Control Pad, 6Player, and
the Mouse. The basic terms as well as concepts used in this
document are based on the Sega Saturn Software Development
Standards.
Important! Note that the standards contained in this document do not address
current and future Sega Saturn peripherals such as the Backup RAM
Cartridge (available now), Floppy Disk Drive (TBA), and Keyboard
(TBA). The operating procedure of “hot-plugging” peripherals to the
Saturn discussed in this document DO NOT apply to these
peripherals.
In addition to this document, refer to sections 1. Game Sequence, 2.
Peripheral Check, and 8.2 Control Pad and Button Settings in the
Sega Saturn Software Development Standards for more information
regarding Sega Saturn input peripheral support.
Note that the information provided in this document represents only
a minimum set of development guidelines. This document is not
meant to be a comprehensive guide to dealing with all modes of
player interaction with Sega Saturn software applications using Sega
Saturn input peripherals. It is ultimately the responsibility of all
application developers to carefully implement support for
peripherals in their products.
Important! It is crucial that the support for peripherals in the Sega Saturn
application be implemented in a user-friendly manner whenever
possible. More importantly, SOFTWARE MUST NEVER BE
ALLOWED TO CRASH.
As a general rule, users typically focus on the user interface ease-of-
use as an evaluation criteria when purchasing software. The
implementation of an input peripheral user interface can have a
critical impact on the commercial value of a product. Always bear
this factor in mind during the design of a peripheral user interface.
Sega Saturn Software Development Standards, SOA version 2.0 18
Glossary of Terms
Term Explanation
Compatible An input peripheral that can be used for a given application.
Peripheral
Incompatible An input peripheral that cannot be used for (is not compatible with)
Peripheral a given application.
Active Peripheral A compatible peripheral that is used in an actual play (connected
to an active port).
Control Port The two input ports that are equipped on the Sega Saturn. These
input ports are referred to as “Control Port 1” and “Control Port 2”
Port(s) When multiple ports are used with the 6 Player, each port is
assigned a port number. The port is referred to as “Port (n)”
(where “n” is a number).
Valid Port A port to which a compatible peripheral is connected.
Invalid Port A port with no compatible peripheral connected, or a port to which
an incompatible peripheral is connected.
Active Port A port that is used during actual game play. Active ports are
determined from among the valid ports for each game play session.
Inactive Port A port not used during play.
Player Number A number assigned to a player (1P, 2P, etc.). Player numbers
and active ports have a one-to-one correspondence.
System Pause This is a pause caused by the system (application), and typically
accompanied by a warning display.
User Pause This is a pause initiated by the player (by pressing the START
button).
Unused Active Port An active port whose compatible peripheral has been disconnected.
Valid Port Active Port
Port [1] = Player Number 1P A compatible peripheral A port that is
Port [2] = Player Number 2P is connected to this port. used during play.
Port [3] = Player Number 3P
.
.
Invalid Port Inactive Port
. A port not used
A port with no compatible
Port [MAX] = Player Number [MAX]P peripheral connected, or during play.
a port to which an in-
compatible peripheral is
connected.
There is a one-to-one relationship between port and player numbers.
A given port is either a valid port or an invalid port, depending on
whether or not a compatible peripheral is connected it. A valid port
is either an active port or an inactive port, depending on whether or
not that port is being used during game play. See Figure 2.1
Changes in the Control Port State for more information.
Sega Saturn Software Development Standards, SOA version 2.0 19
Standard Peripheral Support
For additional information, see sections 1. Game Sequence and 2.
Peripheral Check in the Sega Saturn Software Development
Standards.
Basic Compatible Peripheral Setup
Observe the following requirements on input peripherals (compatible
peripherals) support that can be used in an application. These
requirements parallel those found in section 8.2.1 Basic Control Pad
Setup of the Sega Saturn Software Development Standards.
Required A Control Pad must always be connected to Control Port 1 in
Compliance Item order for the player to start the game.
Required Control Port 1 must always be assigned to player 1 functions
Compliance Item and Control Port 2 must always be assigned to player 2
functions. (For exceptions, refer to the section on the 6Player
below.)
Peripheral Check
Required Check the status of peripherals as frequently as possible while
Compliance Item the Sega Saturn is turned on to prevent application crashes.
The timing for performing checks may be implemented according
to the following recommended specifications:
Checks Prior to Game Start
• Compatible Peripheral Check (detecting a valid port)
Perform the checks below during the Title Loop sequence in
addition to those during the power on sequence:
Recommended • Check to see if a connected peripheral is a compatible
Compliance Item peripheral The port to which a compatible peripheral is
connected becomes a valid port.
Recommended • If an incompatible peripheral is detected, either treat that
Compliance Item port as a disconnected port, or display a warning message
to prompt the user to reconnect the peripheral.
Required In applications that do not provide mouse support, make
Compliance Item sure that operational problems do not occur when a
mouse is connected to the system.
Sega Saturn Software Development Standards, SOA version 2.0 20
Required In a multiplayer game where players can have different
Compliance Item starting times (e.g., a player can join in a game after the
game has started), perform checks as frequently as
possible during the main game as well as other game
sequences.
Checks During Game Start
• Game Start
Required Always use player 1 controls (the compatible peripheral
Compliance Item connected to Control Port 1) to start a game .
Recommended During a game, player 1 controls should be used for
Compliance Item mode/option setting purposes.
Required In multiplayer games where players can have different
Compliance Item starting times, the game may be started from a peripheral
other than that of player 1.
In a multiplayer game, all players should be allowed to
set up their own user options and modes independently.
• Detecting Active Ports
Recommended Detect the active ports from among the valid ports at game
Compliance Item start (e.g., prompt the player to press the START button to
activate the peripheral).
Required The maximum number of active ports that can be Compliance
Item selected for a game is equal to the maximum number of
players supported by the game.
Checks During the Main Game
• Peripheral (Dis)connect Check
Required When a peripheral is disconnected (or connected) during the
Compliance Item main title loop game sequence for any reason, make sure
that the application can support those operations without
any problems.
• When a Peripheral is Disconnected
Required If an active peripheral is disconnected during the course of
Compliance Item an action or time-oriented game, detect the disconnect as a
“null input” state, followed by a system pause or a warning
display. In either case, the game must not continue while the
peripheral is disconnected. The affected port becomes an
unused active port.
Sega Saturn Software Development Standards, SOA version 2.0 21
Required If the peripheral is reconnected, the user must be able to
Compliance Item resume a normal game session. After the game is placed in
pause mode prior to the disconnection of the peripheral,
the game must resume by pressing the “START” button
after reconnection of the peripheral.
Recommended The disconnection of an incompatible or inactive peripheral is
Compliance Item ignored so that the game can proceed unimpeded.
Important! • About the System Pause
A system pause should be executed under the following
conditions:
Required • When there are limited types of compatible peripherals
Compliance Item supported by the application, the system pause must
occur when the compatible peripheral is disconnected
(e.g., when a mouse is disconnected during the execution
of a mouse-compatible application).
Required • When a 6Player is used, and the 6Player is disconnected.
Compliance Item
Recommended • If absence of user input leads to undesirable results
Compliance Item in the game.
Design the user interface so that the system pause can be cleared
from any active peripheral after the disconnected active
peripheral is reconnected and detected by the application to be
usable again.
Required If a system pause occurs during a normal user pause (for
Compliance Item example, if an active peripheral is disconnected during an
user pause), the user and system pause should be cleared
automatically when the system pause is cleared.
• When a Peripheral is Connected
Required Input should be enabled only if a compatible peripheral
Compliance Item is connected to the unused active port and the pause is
cleared.
Recommended In all other cases, any peripheral connection operation action
Compliance Item does not affect the game.
Required Even if a different peripheral than the previously active
Compliance Item peripheral is connected to the system, input should be re-
enabled (after the pause is cleared), as long as that
peripheral is a compatible peripheral.
Sega Saturn Software Development Standards, SOA version 2.0 22
• Mid-Game Participation
Recommended A compatible peripheral may be connected to an invalid port
Compliance Item during the course of a game that supports mid-game
participation. Even if this occurs during the execution of the
main game, that port may be reassigned as a valid port and an
active port as well. When this occurs, make sure that the
connection of the peripheral does not affect the game in
progress.
Required The detection of the active port for the above cases should
Compliance Item in the following sequence :
1. Design the user interface so that the player must press
the START button on the control pad to join the game in
progress immediately after the peripheral is connected to
the system.
2. At the start of the next game.
Required The application should not allow the selection of more active
Compliance Item ports than the maximum number of players supported by
the game.
Sega Saturn Software Development Standards, SOA version 2.0 23
Control Port States (Summary)
The following figure shows changes in the control port state as a
result of the processes described in the preceding sections.
Demo Loop Main Game Demo Loop
Active Active Active
Port Port
Disconnect
Compatible Connect Valid
Valid Button Peripheral(!) Compatible Port
Press Peripheral
Port
Unused
Compatible Active Port
Peripheral YES
Compatible
Compatible Peripheral
Peripheral Connect/
Control
Connect/ Disconnect
Port Inactive
Disconnect
Inactive Port
Compatible
Connect Disconnect
Peripheral NO
Compatible Compatible
Peripheral Peripheral
Invalid
Invalid Port
Port
Mid-Game Participation
*If a compatible peripheral is connected to
an invalid port, its status may be changed to a
valid port
(inactive port).
! Detected as "null input" or a system pause.
Game Start Game Over
Figure 2.1 Changes in the Control Port State
6Player
Required All Sega Saturn applications MUST be compatible with the 6Player,
Compliance Item regardless of the number of players supported by the application.
What is the 6Player?
6Player is a multi-tap hardware peripheral device that has six control
port inputs. By connecting a 6Player to both Control Port 1 and
Control Port 2, a maximum of 12 input peripherals can be connected
to the Sega Saturn.
Since the connection of a 6Player to another 6Player is not
supported in hardware, there is no need for the software to
support this.
Sega Saturn Software Development Standards, SOA version 2.0 24
6Player Basic Settings
Required Since the use of a 6Player increases the number of ports
Compliance Item and the number of players that can be supported by an
application, an expanded version of the Basic Control Pad
Setup guidelines found in the Sega Saturn Software
Development Standards must be followed:
• A compatible peripheral or a 6Player must be connected to
Sega Saturn’s Control Port 1 in order to start the game.
• A compatible peripheral must be connected to a 6Player
(connected to Control Port 1) in order to start the game.
• A multiplayer application must run correctly regardless of
whether a 6Player is connected to Sega Saturn’s Control
Port 1 or Control Port 2 (see 6Player setup configuration
example below).
• Player numbers must be assigned so that the lower-
numbered ports (left-side ports) are always given assignment
priority according to the 6Player’s state. Make sure that
player numbers are not assigned out of order.
Note Player numbers being “out of order” refers to a case in which
player numbers are not assigned in an ascending order of port
numbers.
As long as the player numbers are not out of order, the
active ports do not need to be in sequence physically (i.e.,
there can be empty ports between occupied ports).
Peripheral Checks When Using the 6Player
This section describes the peripheral checks that are necessary when a
6Player is used. If a topic is not covered in detail here, apply the
guidelines supplied in section 2. Standard Peripheral Support.
Checks Prior to Game Start
See the Compatible Peripheral Check (detecting a valid port)
item in section 2.2.1 Checks Prior to Game Start.
Sega Saturn Software Development Standards, SOA version 2.0 25
Checks During Game Start
• Game Start
Required A game must be started from a peripheral that is connected
Compliance Item to the 6Player’s port with the lowest port number out of the
valid ports.
This port must be a input peripheral connected to
Control Port 1 or a input peripheral connected to a 6Player
port with the lowest port number. The 6Player in this case is
connected to Control Port 1.
Recommended Note that in a multiplayer game, a game can be started by a
Compliance Item player other than player 1. This only applies when a 6Player
Tap is plugged into Port 1 of the Saturn.
• Detecting Active Ports
When a 6Player is used, there may be cases where active
ports must be chosen out of multiple valid ports. Detect the
active port as follows:
Required • From the valid port, assign player numbers in an
Compliance Item ascending order of port numbers to the active ports.
However, only the peripherals that have had their
START buttons pressed at a specific point in the
application are recognized (e.g., in the title screen).
Required Player numbers may be assigned to inactive ports using the
Compliance Item method above. Therefore, the user peripheral interface must
be designed so that the player number assignment is in
sequence with the port numbers. (For example, when a
START button is pressed during the game, a screen is shown
immediately that indicates which player joined the game at
that point.)
Sega Saturn Software Development Standards, SOA version 2.0 26
Note It is recommended that the consumer use Setup Example 1 as
their standard configuration. However, Saturn Software should
be able to handle all three configurations.
Port 1 Port 2
[1]
6Player
[2] Port A Port F [7]
ooo
ooo
[3] Port B Port E [6]
Port C Port D
[4] [5]
Figure 3.1 Multi-Port Setup Example 1 Ports [1] through [7]
Port 1 Port 2
[7]
6Player
[1] Port A Port F [6]
[2] Port B Port E [5]
Port C Port D
[3] [4]
Figure 3.2 Multi-Port Setup Example 2 Ports [1] through [7]
Port 1 Port 2
6Player 6Player
[1] Port A Port F [6] [7] Port A Port F [12]
[2] Port B Port E [5]
[8] Port B Port E [11]
Port C Port D Port C Port D
[3] [4] [9] [10]
Figure 3.3 Multi-Port Setup Example 3 Ports [1] through [12]
Sega Saturn Software Development Standards, SOA version 2.0 27
Checks During the Main Game
• Peripheral Connect/Disconnect Check
Required When the 6Player is disconnected (or connected) or replaced
Compliance Item with another input peripheral (or the reverse) during the
main game sequence for any reason, make sure that the
application will be able to support those operations without
any problems.
The other requirements governing peripheral disconnect checks
described in section 2. Standard Peripheral Support apply.
• When a Peripheral Disconnect Occurs During 6Player Use
Required If an active peripheral or a 6Player configured with an
Compliance Item active peripheral is disconnected during the course of an
action or time-oriented game, detect the disconnect as a
“null input” state, followed by a system pause or warning
display. The port to which those peripherals were connected
to, becomes an unused active port. More than one unused
active port can exist (see Figures 3.4 through 3.6).
Control Port 1 Control Port 2 Control Port 1 Control Port 2
[1] [2] [3] [4] [5] [6] [1] [2] [3] [4] [5] [6]
[7] [7]
1P 2P 3P 4P 1P 2P 3P
Port [7] becomes an unused active
Figure 3.4 When One Peripheral is Disconnected
Sega Saturn Software Development Standards, SOA version 2.0 28
Control Port 1 Control Port 2 Control Port 1 Control Port 2
[7] [8] [9] [10] [11] [12] [7] [8] [9] [10] [11] [12]
[1]-[6]
4P 5P 6P 4P 5P 6P
Ports [1],[3],and [5] become unused active
[1] [2] [3] [4] [5] [6]
1P 2P 3P
Figure 3.5 A Disconnected 6Player Example 1
Control Port 1 Control Port 2 Control Port 1 Control Port 2
[1] [2] [3] [4] [5] [6] [1] [2] [3] [4] [5] [6]
[7]-[12]
1P 2P 3P 1P 2P 3P
Ports [7],[9], and [11] become unused active
ports.
[7] [8] [9] [10] [11] [12]
4P 5P 6P
Figure 3.6 A Disconnected 6Player Example 2
• When a 6Player is Connected
Required If an active peripheral is disconnected and a compatible
Compliance Item peripheral is reconnected to that port, re-enable input from
that peripheral.
Sega Saturn Software Development Standards, SOA version 2.0 29
Recommended If a 6Player that has an active peripheral connected to it is
Compliance Item disconnected and if the 6Player with the exact same active
peripheral port setup is reconnected, re-enable input from that
peripheral.
Recommended If a 6Player with an active peripheral is disconnected and a
Compliance Item different 6Player setup with active peripherals is reconnected,
re-enable input to only compatible peripherals that are
connected to the unused active ports. (See Figure 3.7 for more
details.)
Recommended In all other cases, the connection of the 6Player to the system
Compliance Item does not affect the game.
If the system is paused, wait for the pause to be cleared.
In addition, if a peripheral other than the original active
peripheral is reconnected, re-enable input as long as the
peripheral is a compatible peripheral.
Control Port 1 Control Port 2
Control Port 1 Control Port 2
[1] [2] [3] [4] [5] [6] [1] [2] [3] [4] [5] [6]
[7]-[12]
1P 2P 3P 1P 2P 3P
When ports [7], [9], and [11] are unused active
ports.
[7] [8] [9] [10] [11] [12]
Only port [11] (or 6P), which
has a compatible peripheral
connected, is reenabled for 6P
input. (Ports [7] and [9] remain
as unused active ports.) l*
*"1" = A peripheral connected to
an invalid or inactive port.
Figure 3.7 When a 6Player with a Different Peripheral Configuration
is Connected (Figure 3.6 Continued)
Sega Saturn Software Development Standards, SOA version 2.0 30
• If the 6Player is Replaced
When a 6Player is replaced with another peripheral (and vice
versa), the number of ports may not match. The following
guidelines apply under these conditions:
• Replacing a peripheral with another equipped with fewer
ports.
Example: Replacing a 6Player with a single peripheral.
Recommended The new port is treated as the lowest-numbered port of the
Compliance Item 6Player prior to its replacement (see Figures 3.8 and 3.9).
• Replacing a peripheral with another equipped with more
ports.
Example: Replace a single peripheral with a 6Player.
Recommended Only the lowest-numbered port of the 6Player is enabled out of
Compliance Item the ports that were replaced (see Figure 3.10).
Sega Saturn Software Development Standards, SOA version 2.0 31
Control Port 1 Control Port 2 Control Port 1 Control Port 2
[1] [2] [3] [4] [5] [6] [1] [2] [3] [4] [5] [6]
1P 2P 3P 1P 2P 3P
[7] [8] [9] [10] [11] [12] [7] [8] [9] [10] [11] [12]
4P 5P 6P 4P 5P 6P
Control Port 1 Control Port 2 Control Port 1 Control Port 2
[1] [2] [3] [4] [5] [6] [1] [2] [3] [4] [5] [6]
[7]-[12] [7]-[12]
1P 2P 3P 1P 2P 3P
Ports [7], [9], and [11] are unused active Ports [8], [10], and [12] are unused active
One compatible peripheral is One compatible peripheral is
connected. connected.
Control Port 1 Control Port 2 Control Port 1 Control Port 2
[1] [2] [3] [4] [5] [6] [1] [2] [3] [4] [5] [6]
[7]-[12] [7]-[12]
1P 2P 3P 1P 2P 3P
4P l*
Only port [7] is used. The compatible peripheral, which is assumed to
[9] and [11] are unused active have been connected to port [7], is ignored.
ports. Ports [8], [10] and [12] remain as unused active
ports.
*"l" = A peripheral connected to an invalid or inactive port.
Figure 3.8 Mismatched Port Example 1 Figure 3.9 Mismatched Port Example 2
Sega Saturn Software Development Standards, SOA version 2.0 32
Control Port 1 Control Port 2
[2] [3] [4] [5] [6] [7]
[1]
2P 3P 4P
1P
Control Port 1 Control Port 2
[2] [3] [4] [5] [6] [7]
[1]
2P 3P 4P
Port [1] becomes an unused active
A 6Player with a compatible A 6Player without a compatible peripheral
peripheral connected to its port [1] connected to its port [1] is connected
is connected to Control Port 1. to Control Port 1.
Control Port 1 Control Port 2 Control Port 1 Control Port 2
[2] [3] [4] [5] [6] [7] [2] [3] [4] [5] [6] [7]
2P 3P 4P 2P 3P 4P
[1] [1]
1P
Port [1] reverts to an active port. Port [1] remains an unused active port.
Ports without port number assignments can be treated as invalid
Figure 3.10 Mismatched Port Example 3
Sega Saturn Software Development Standards, SOA version 2.0 33
• Mid-Game Participation
In a multiplayer game where players can enter into the game at
any given time, there is a possibility that additional controllers
that have been connected at that time may cause the player
numbers to go out of sequence.
Basic 6Player setup protocol recognizes that there may be empty
ports between active ports. In addition, the additional connection
of peripherals for mid-game participation is also recognized.
Therefore, there is a possibility that the player numbers may go
out of order depending on how the additional controllers are
connected.
The following guidelines are meant to avoid this problem:
Recommended • Any peripherals that are connected to the LEFT (a side with
Compliance Item a lower port number) of a port assigned with the largest
player number are ignored. That is, the insertion of a
peripheral between 2 pre-assigned player numbers is
prohibited.
Recommended • Any peripherals that are connected to the RIGHT of a port
Compliance Item assigned with the largest player number are recognized. The
addition of player numbers is recognized by the application.
The guidelines above were developed based on the assumption
that most 6Player users will connect peripherals consecutively
from the left side as explained in the 6Player instruction manual.
Saturn Mouse
Required All Sega Saturn applications that support the Saturn Mouse
Compliance Item must also support operations from the standard Sega Saturn
Control Pad, Virtua Stick, Mission Stick (digital mode).
Compatibility of operations with the 6Player is also required.
What is the Saturn Mouse?
The Saturn Mouse is a pointing input peripheral device that outputs
analog X and Y coordinate data. The mouse is equipped with A, B,
and C buttons and a START button.
Sega Saturn Software Development Standards, SOA version 2.0 34
Mouse Button Setup
Basic Mouse Button Setup
When assigning functions to a mouse button, observe the following
guidelines instead of those found in section 8.2.1 Basic Control Pad
Setup of the Sega Saturn Software Development Standards (for more
information, refer to section 8.2 Control Pad and Button Setup
found in section 8. Main Game of the Sega Saturn Software
Development Standards):
Required • Input from buttons A, B, and C must all be supported by the
Compliance Item application.
Required • The START button must operate independently of input
Compliance Item from the other buttons.
Recommended • The use of double-clicking mouse button operations should be
Compliance Item avoided whenever possible (except in the case of applications
ported from other platforms).
Required • For right-handed mouse button operations, the default
Compliance Item button assignment priority is A>B>C. This is the . inverse
of the button assignment priority for the standard Sega
Saturn Control Pad. (This button assignment priority
convention is consistent with that used in current .
graphical user interface systems.)
While the Control Pad and Button Setup guidelines in the Sega
Saturn Software Development Standards mandate that “all button
presses must have an immediate effect”, compliance with this
requirement is not necessary for the mouse. This is due to the need
to support mouse-specific functions such as “click-and-drag”
operations.
Recommended Default Button Setup
The assignment priority for the mouse buttons is A>B>C, which is
the inverse of that of the Control Pad (assuming that the default is
for right-handed operations). Based on this priority, button functions
are assigned according to the following default setup (L= Left, C=
Center, R= Right):
Button A (L): Affirmative/OK/Main function
Button B (C): Negative/Cancel/Supplemental function
Button C (R): Affirmative/Special/Supplemental function
Sega Saturn Software Development Standards, SOA version 2.0 35
Recommended Button Setup Examples
Following are some sample button setups for different game genres:
• Example 1: Real-Time Games
Button A (L): Most frequently used function
Button B (C): Least frequently used function
Button C (R): Special function
• Example 2: Non-Real-Time Games
This setup may be used with games in the strategy, role-playing,
adventure, etc. genre.
Button A (L): OK
Button B (C): Cancel
Button C (R): Special function (e.g. open/close special function
windows)
• Example 3: Non-Real-Time Games
This setup provides compatibility with the standard Sega Saturn
Control Pad.
Button A (L): Open window/OK and close window
Button B (C): Close window/Cancel
Button C (R): Open window/OK and close window
• Example 4: 3D Shooting
Button A (L): Fire
Button B (C): Decelerate
Button C (R): Accelerate
• Example 5: Platform Action
Button A (L): Attack
Button B (C): Jump
Button C (R): Run
• Example 6: Role-Playing
Button A (L): Item select
Button B (C): Attack
Button C (R): Cancel
Sega Saturn Software Development Standards, SOA version 2.0 36
Required Option Items
It is required that all software that supports mouse input must also
support input from a standard Sega Saturn Control Pad, Virtua Stick,
and Mission Stick (digital data). Compatibility of operations with
the 6Player is also required. Add the option item below in the
“Options “ screen of the application (see section 7. Options Screen
in the Sega Saturn Software Development Standards for more
information).
PERIPHERAL [MOUSE/CONTROL PAD]
This option item automatically identifies the connected compatible
peripheral type and displays either its name or icon (the peripheral
itself is not selected by the user).
Only peripheral-specific settings should be selectable in the Options
screen’s CONTROL option item. Ideally, these peripheral settings
should be stored in memory for each peripheral type so that the
application can respond automatically to the (dis)connection of
different peripheral types (refer to the next section for more
information).
(Dis)connection of the Mouse During a Game
Required If the mouse (the active peripheral in this case) is disconnected
Compliance Item during the course of an action or time-oriented game, detect the
disconnect as a “null input” state, followed by a system pause, or
a warning display.
• When a Different Compatible Peripheral is Reconnected
Recommended During a system pause, flash a text message or a icon for the
Compliance Item appropriate compatible peripheral on the screen and notify the
user that the active peripheral will be changed to that
compatible peripheral. The application then waits for the
system pause to be cleared.
When a different input peripheral is reconnected to the system,
use one of the following button setups:
• If a button setup already exists in memory (via the CONTROL
option item) for the reconnected input peripheral, use that setup.
• Prompt the user to setup the peripheral through the display of a
configuration menu.
• In all other cases, use the default setup of each peripheral type.
Sega Saturn Software Development Standards, SOA version 2.0 37
8.3 Pause
Recommended The pause function is generally not applicable to non-action or non-
Compliance Item time oriented based games, and other games that incorporate that
function within its game design. Moreover, the START Button may
be assigned to other functions besides pause depending on the game
design.
8.3.1 Enabling and Disabling Pause
Required Pause must always be enabled and disabled by pressing the
Compliance Item START Button.
Required When two players are playing simultaneously, the enabling and
Compliance Item disabling of pause should be allowed from either Control Pad.
In those cases, controller operations for Control Port 1 and
Control Port 2 should be independent (e.g., if a pause is set from
Control Port 1, then it should be disabled only from Control
Port 1).
8.3.2 Screen Display During Pause
Required During pause, the word “PAUSE” must be displayed on-screen
Compliance Item (to differentiate the pause from a crash).
If independent pause operations are available from either Control Port
1 or Control Port 2 during a two-player game, text such as “PLAYER
1 PAUSE” or “PLAYER 2 PAUSE” should be displayed to determine
which player enabled the pause.
8.3.3 Pause Prohibited State
Required Pauses must be disabled during the following instances:
Compliance Item
• Display of company logos
• During the Title Screen
• Demonstration sequence
• Blank screen
8.3.4 Sound During Pause
Required Sound must be disabled during pause. If the playback of the
Compliance Item background music was stopped by the pause, the music should
continue from the pause point when the pause is disabled.
Sega Saturn Software Development Standards, SOA version 2.0 38
8.4 Reset
Resets on the Sega Saturn include a hardware reset via the pressing of
the RESET Button on the main unit and a software reset via the
simultaneous pressing of the A+B+C+START Buttons on the Control
Pad. The outcome of each reset type is governed by its respective
reset handler code functions.
The hardware reset is defined to be the equivalent of a power off/on
cycle reset. All applications must respond to a hardware reset in the
same manner as a power-on boot cycle.
In contrast, the software reset is defined to provide convenience
features to the user. For example, option settings are retained after a
software reset. Furthermore, the software reset also enables the user
to choose the destination screen after the reset is executed (e.g., Title
Screen, Audio CD Control Screen).
The type of reset discussed and defined in this standard is a software
reset executed by pressing the A+B+C+START Buttons
simultaneously on the Control Pad.
8.4.1 Reset Implementation Requirement
Required A Reset must be executable from any screen, except during
Compliance Item backup memory device operations (i.e., clear, save, remove).
High scores, passwords and options settings must not be cleared
if the reset is executed during the Main Game state.
8.4.2 Reset Method
Required If buttons A+B+C and the START Button on the Control Pad
Compliance Item are pressed at the same time, then a reset is executed (In terms
of button input processing, the reset occurs when the START
Button is pressed while buttons A+B+C are depressed.).
Depending on the state of the application during the reset, the
following actions occur:
When a Reset is Executed Go to the...
During the...
Main Game state Title Screen
Title Loop sequence Audio CD Control Screen
If a reset is executed during the Title Loop sequence (that is, the
screen changes to the Audio CD Control Screen), high score/pass
word/option settings may be initialized.
Sega Saturn Software Development Standards, SOA version 2.0 39
Reference: Multi-Game Compilation Title Resets
In a multi-game compilation title in which multiple game titles
can be played from a single CD-ROM, resets should be
structured in the following manner:
When a Reset is Executed Go to the...
During the...
Main Game state of any given Title Screen of that
game on the compilation game.
Title Loop sequence of any given Title Screen for the
game on the compilation compilation.
Title Loop sequence for the Audio CD Control
compilation Screen
8.5 Game Over/Continue
8.5.1 Continue Function
A “Continue” function should be available to the player as a basic
game feature. The number of “Continues” should be set appropriately
according to the game design requirements.
8.5.2 Proceeding to the Next Screen
Recommended If the Continue function is not selected, then the screen should
Compliance Item return after a preset period of time to the application-based Sega
logo screen (the application-based company logo screen for third
party titles).
A countdown should be performed before the application
displays the Sega logo screen (the company logo screen for third
party titles). The application should provide a feature where the
count can be reduced/sped up by pressing an arbitrary button.
8.6 Ending/Game Credits
8.6.1 Cancel Disabled
Required Do not enable the user to skip/cancel the Ending/Game
Compliance Item Credits sequence.
8.6.2 Personal Names Used in the Game Credits
(Sega Brand Titles ONLY)
Refer to Section 8.6.4: Game Credits Display Standards for more
information.
Sega Saturn Software Development Standards, SOA version 2.0 40
8.6.3 Proceeding to the Next Screen
Required Upon completion of the Ending/Game Credits sequence, the
Compliance Item application-based Sega logo screen (the application-based
company logo screen for third party titles) must be displayed after
a preset time period or any button input.
8.6.4 Sega Saturn Game Credits Display Standards
(Sega Brand Titles ONLY)
The display of development team members’ names in the game
credits should follow these guidelines.
A list of all the staff member names to be used in the credits should
be created by the producer before the beta version of the software is
completed and approved by the Sega legal department.
Display Format of Credits
Fonts
While there are no restrictions on the font style used in the credits,
consistency of the typeface and legibility are important.
Consistency in Project Job Titles
The job titles of development team members should correspond to the
work they actually performed on the game and should not deviate
significantly from that. Common sense should be exercised when
listing titles- titles should not be too eccentric.
Cautions
Obtaining Permission from Individuals
When the names of development team members are included in the
credits, the permission of that individual must be obtained whether it
is his/her actual name or nickname.
Using Nicknames
Nicknames that are offensive or vulgar must not be used. Caution
must also be exercised in using names that may have negative
meanings/connotations in other international markets.
Sega Saturn Software Development Standards, SOA version 2.0 41
External Developers
The external development team members’ real names or nicknames
may be used in the credits, unless this is in violation of the developer’s
internal policies.
Note that the inclusion of the external developer’s company name in
the credits may be required in a specific format as stipulated by the
development contract.
Prohibited Items
The following content must not be included in the credits:
Copyright-Related Terminology
Copyright-related terminology included in the title of an individual.
COPYRIGHT ©, REGISTERED ®, LICENSE, PRESENTED BY,
™, etc.
Confidential Project Information
Length of the project, equipment used, and other confidential
information related to the development of the title.
Unauthorized Images and Sounds
Use of digitized photographs, realistic portraits, or other images of
individuals who have not given their express written consent to have
their likeness placed in the game. Use of unauthorized sounds (e.g.,
digital audio samples) is also prohibited.
Miscellaneous Personal and Corporate Data
Addresses, phone numbers or other information that can be used to
deter mine an individual’s or organization’s whereabouts may not be
included in the Sega Saturn application.
And Others...
The inclusion of any items deemed inappropriate by the Sega legal
department or items that violate the guidelines found in Appendix 1:
Game Content, Trademark and Copyright Standards of the Sega
Saturn Software Development Standards is prohibited.
Sega Saturn Software Development Standards, SOA version 2.0 42
9. Supplement
9.1 Handling the Open CD Door State
Required If the Sega Saturn’s CD Door OPEN button is pressed
Compliance Item during a game and the door opens, then the boot ROM’s
Audio CD Control Screen must be displayed in the same manner
as a reset is handled during the Title Loop sequence. As in the
case of a reset in the Title Loop sequence, high scores, passwords
and option settings may be initialized (This is only applicable to
single CD-ROM disc game titles.).
9.2 Compatible Area Codes (Territory Lockout)
Required All game applications must be coded so that they run only
Compliance Item on Sega Saturn hardware available in the intended sales region
for the software. This hardware territory lockout scheme is
implemented via “Area Codes” set within the game code as
shown below (For more details, consult document number
ST-040, Disc Format Standards Specification Sheet.).
Area Code
Japan NTSC J
Asia NTSC T
(Taiwan, Philippines, republic of Korea)
North/ South American NTSC U
(Canada, Central South America [Brazil], United
States)
East Asia PAL, Europe PAL, Central South America E
PAL
Sega Saturn Software Development Standards, SOA version 2.0 43
Appendix 1:
Sega Saturn Game Content, Trademark
and Copyright Standards
Since Sega Saturn software applications are consumer products used in the
average home, care should be taken to not include any content that may be
offensive to the user as well as content that may infringe upon the legal rights
of a third party. Note that these standards are by no means comprehensive in
its scope. Use the guidelines contained in this document along with
publications from organizations such as the Entertainment Software Rating
Board (ESRB) to judge whether content materials are appropriate for
inclusion in the product.
Important! To prevent the sales of software considered to be excessively violent (or
graphic) in nature to children 13 (or 17) years and younger, Sega requires the
display of ESRB software rating labels on the packages of all Sega Saturn
software applications.
Care must also be taken avoid intentional or unintentional infringement of
intellectual properties, copyrights, trademarks, etc. of third parties in the
content used to develop games (such as graphics, sound, software, and game
design).
1. Avoiding Legal Problems in Application
Content
Take precautions to avoid infringing on the rights of third parties in
game designs, software, graphics, sounds, etc., such as:
• Infringement of third party copyrights, rights to images, property
rights, patents, trademarks, ideas and other rights. Examples of
infringement include the use of manufacturer, product and
character names; images, photographs, likenesses; designs,
markings; songs, digital audio samples, etc. without permission.
• Applicable to Sega brand products ONLY: Do not incorporate
trade-marks, images or pictures of specific products, other
companies’ logos or phrases or words associated with a company
other than Sega without written approval from the Sega legal
department.
• Unfair competitive practices that may have negative impact or
injure third parties. Examples include the use of look-alike
products, look-alike characters, look-alike designs, etc.
• Defamation of character or invasion of privacy of third parties.
Sega Saturn Software Development Standards, SOA version 2.0 44
2. Miscellaneous Trademark/Copyright Issues
2.1 Trademarks and Copyright Considerations in Japan
Important! For more details on the Japanese trademark and copyright usage
restrictions, please consult the Japanese version of the Sega Saturn
Software Development Standards as well as your localization service
provider.
2.2 Prohibited Use of the Acronym RPG
Based on a Sega Enterprises, Ltd. Legal Department memorandum
dated June 29, 1992 and meeting minutes dated July 6, 1992, the
following restrictions were created regarding the use of the term
“RPG”. These restrictions must be observed.
The expression “RPG” must not be used in Japan or in other
countries:
Japan: Registered trademark of Bandai.
US: Registered trademark of IBM.
Europe: Registered trademark of other third
parties. Similar registered trademarks
also exist.
Within Japan, the expression “Role Playing Game” in Japanese kana
characters can only be used as a generic noun within sentences such
as “This is a role playing game.”
The expression “Role Playing Game” in English may also not be used
in Japan.
In Japan, variations on the term “RPG” in Japanese kana characters
are recommended if the use of the term is required.
Sega Saturn Software Development Standards, SOA version 2.0 45
Appendix 2:
Sega Saturn Backup Memory System
Standards
This Standard was developed in order to standardize the basic functions of the
Sega Saturn backup memory system as well as the terminology used by the
system. The object of this Standard is to provide the user with a logical and
friendly interface for dealing with the backup memory system. The contents of
this document is applicable to titles that support the backup memory system.
1. Standardization of Backup System Terms
The terms used in game screens and user’s manuals should conform
to the standard terms shown below in order to maintain consistency
among Sega Saturn applications.
Hardware Terms
backup memory backup memory is the generic name used to describe the backup RAM
contained internally in the Sega Saturn as well as in the Sega Saturn Backup
Memory Cartridge (sold separately).
System Memory System Memory refers to the on-board internal backup memory contained in
the Sega Saturn.
Cartridge Memory Cartridge Memory refers to the memory contained in the Sega Saturn Backup
Memory Cartridge.
External Device A storage device connected to an expansion port is referred to as an External
Device in the boot ROM. An external device may be future Sega Saturn
hardware peripherals such as a floppy disk drive (TBA) or a hard disk drive
(TBA).
Hardware Function Terms
Audio CD This refers to the main CD user interface contained in the boot ROM.
Control Screen While it may commonly be referred to as the Multiplayer, control panel, and
BIOS screen, the use of Audio CD Control Screen is preferable.
Memory Manager Memory Manager is the backup RAM utility contained in the boot ROM.
file file refers to the backup data handled by the Memory Manager. The word
item may also be used.
name name refers to the file names handled by the Memory Manager. The words file
name may also be used.
Sega Saturn Software Development Standards, SOA version 2.0 46
size size refers to the file size managed by the Memory Manager.
memory available memory available refers to the total amount of backup memory that is
available to the application.
Software Function Terms
clear clear refers to the Memory Manager function that clears all backup memory
data.
Note: The term “initialize” is not used unless the Sega Saturn’s System
Memory requires initialization. When this operation is necessary, use the
phrase “Clear all data (initialize)”.
load load refers to the loading of backup data from backup memory.
save save refers to the saving of backup data to backup memory.
copy copy refers to the copying of backup data from one backup memory type
to another.
remove remove refers to the deletion of backup data from backup memory. delete
is also acceptable.
overwrite overwrite existing item refers to a backup memory operation that will
existing item save one backup data over existing backup data.
change name change name is a Memory Manager function that changes the name of a
backup memory file.
select memory select memory is a Memory Manager function that enables switching between
backup memory types such as the System Memory, Cartridge Memory, and
External Device.
comment A comment is information added to a backup file name that describes its
contents (10 or fewer alphanumeric or Japanese kana characters in length).
time data time data is the time stamp data of a backup memory file created by the Sega
Saturn’s internal clock.
Sega Saturn Software Development Standards, SOA version 2.0 47
2. Standard Backup System Implementation
The basic backup operating system flowchart is shown in Figure
A2.1. The processes, functions and messages shown in the chart
below must be implemented in all applications that support backup
functions.
Initialize Memory
Initialization
check Fail
Pass
Fail
Check for Data
Pass
Available Fail Available Fail
Memory Check Memory Check
Pass
Display Warning Display Warning
Message Message
Disable Backup Functions
Load
Game Start
During the Game
Save Game Support
Comment Support
Time Stamp Support
System/Cartridge/
External Memory
Device select support
Figure A2.1 Standard Backup System Flowchart
Important! This operational flowchart may differ depending on the application.
Sega Saturn Software Development Standards, SOA version 2.0 48
2.1 Initialization Check
Required The following processes must occur during the initialization
Compliance Item check:
• Check initialization status of the System Memory and
Cartridge Memory (if present) as well as any other external
backup memory devices (if connected).
• Do not allow the game to start if the available backup memory
is not initialized.
The initialization of the System Memory and Cartridge Memory
must always be checked without fail prior to the start of the main
game.
If either one is not initialized, the user must be notified about the
memory status and instructed to perform initialization directly
from the game application or from the Sega Saturn’s boot ROM-
based Memory Manager screen The game must not be started if
either memory device remains uninitialized.
The Backup RAM BIOS calls must be used when accessing the
backup RAM. The System Memory, Cartridge Memory and External
Device must not be formatted using a backup library function other
than SEGASATURN_BACKUP_FORMAT .
2.2 Check for Data and Available Memory
Required The following checks must occur:
Compliance Item
• Check for data.
• Check available memory.
Before the main game starts, check for data that can be used
by the application as well as the remaining memory space of the
System Memory and Cartridge Memory. If the application’s
data does not exist or there is insufficient amount of memory
left to save data, then display the appropriate warning message
(see section 2.8 Warning Messages).
2.3 Load
Required This process must occur during the load operation:
Compliance Item
• Check for damaged data and load errors.
Always check for damaged data when reading data. If the
data is unusable, then notify the user by displaying that
file name in a different name format that indicates its
damaged status.
Sega Saturn Software Development Standards, SOA version 2.0 49
2.4 Save
Required During the save operation, the following operations must be
Compliance Item performed:
• Check for write errors.
• Check for available memory.
• Set file names.
• Set data size.
Check for the available memory status when saving data.
If there is insufficient memory, then notify the user. Check
whether the backup data was saved correctly or not.
Note that the application’s file name must be authorized and
registered with Sega in order to avoid file name conflicts among
existing game applications.
Example:
Phantasy Star X (data required in three locations):
First Location: PS_SCENE_01
Second Location: PS_SCENE_02
Third Location: PS_SCENE_03
Shared file name 3 character file extension.
consisting of 8
characters.
Do not use generic file names such as GM_DATA_000. The
characters that can be used in file names are limited to numbers,
upper-case Roman characters, and the underscore character (_).
However, note that a number cannot be used as the first character in
the file name.
Required File names must always be 11 characters in length. If there are
Compliance Item fewer than 11 characters, use the underscore character to pad
the name out to 11 characters. The “space” character is not
allowed.
Required When multiple save files are required in a game, the first eight
Compliance Item consisting of three characters (the underscore character and 2
numbers) are allowed to change.
Up to 99 save locations are allowed per game title. The file
extension begins at _01 and ends at _99.
The legal ASCII characters that are allowed in file names and
comments are shown in the following table.
Sega Saturn Software Development Standards, SOA version 2.0 50
Table A2.1 Valid ASCII Characters in File Names and Comments
All of the characters in Table A2.1 above may be used in
comments. The shaded characters (the numbers 0~9, the capital
letters A~Z, and the underline character “_”) can be used in file
names. When the file size is displayed, use the equation below to
calculate it. Values generated by the equation are rounded up to the
nearest whole number. Use the term block as the unit of measurement
for the file size.
Size (blocks)= [(number of bytes used) + 32] / 64
Important! The size of each file must not exceed 256K bytes in size if the copy
function in the Memory Manager is used. The copy function in the
boot ROM-based Memory Manager only supports file sizes under
256K bytes. If the file size exceeds 256K bytes, then the copy
function must be supported within the application itself.
2.5 Comments
The user may be allowed to change the contents of the comments as
necessary. The incorporation of the is feature into a Sega Saturn
application is at the discretion of the application developer.
Sega Saturn Software Development Standards, SOA version 2.0 51
Comments can be written in Roman alphanumeric and Japanese kana
characters. Comments can be up to 10 characters in length. While
there are no set guidelines on the content of comments, enter the game
title entered in Roman alphanumeric characters as a default.
2.6 Time Stamp Support
Required Time stamp support must be implemented in the following
Compliance Item manner:
• Time stamp data cannot be modified by the user.
• Display files in chronological order beginning with the
file that has the most recent save date.
• Time data must always be written in the file.
2.7 Selection of System Memory, Cartridge Memory, and
External Backup Memory Devices
Required All Sega Saturn memory types must be supported. The backup
Compliance Item memory data must be directly accessible from both the System
Memory, Cartridge Memory, and External Backup Memory
Devices.
There are no guidelines on where this function must be located in the
operating system flowchart shown above.
2.8 Warning Messages
The warning message types described below must be included to
cover the functions described in sections 2.1 through 2.5 above.
Sample messages are provided on the following pages.
• “Initialization check” warning at startup.
• ‘No new saves permitted after game start” warning at startup.
• “Save disabled” warning at startup.
• “Current save not permitted” warning when save/copy is
attempted during the game.
• “Load, save, copy, delete or initialization failure” warning
after each function is executed.
• “Damaged file” warning during execution of the load function.
• “Application’s backup file size requirement” warning displayed
Sega Saturn Software Development Standards, SOA version 2.0 52
if new file saves are disabled after game start or new file saves
are disabled during the game.
• “Do not turn off power during execution of save function”
warning.
3. Sample Operational Sequences and Warning
Messages
The following examples show the operational sequence of each
backup memory function as well as the display of warning messages.
The following examples should be used as a reference to make the
backup system in a Sega Saturn application as user friendly as
possible.
Initialization Check
Initialize Backup
Memory
Is Backup Memory Display Warning Initialize Backup Yes
Initialized? No Message 1 Memory?
Yes No
Go to Memory
Manager Screen
Does data for this No
game already exist in
memory?
Yes
Is there enough No Is there enough No
backup memory to backup memory to
save game data? save game data?
Yes Yes
Display Warning Disable Game Display Warning
Message 2 Continue Function Message 3
Disable backup No Go to Memory
functions? Manager Screen
Yes
Disable Backup
Functions
Game Start
Figure A2.2 Initialization Sequence
Sega Saturn Software Development Standards, SOA version 2.0 53
3.1 Check for Memory Initialization Status, Data, and
Available Memory
• Warning Messages 1
Required When the Sega Saturn’s System Memory or Cartridge
Compliance Item Memory is not initialized, the game must never be started while in
this state. After the warning, instruct the user to perform
initialization directly from the application or from the boot ROM-
based Memory Manager. Following are sample warning messages
(words in parentheses should be used depending on the memory
device type used):
• The System Memory (Cartridge Memory/External
Device) is not ready for use.
• Do you want to clear all files in System Memory
(Cartridge Memory/External Device)? Are you
sure? Yes No
• Cleared all files in System Memory (Cartridge
Memory/ External Device).
• Failed to clear all files in System Memory
(Cartridge Memory/External Device).
• Please clear all files using Sega Saturn’s
Memory Manager.
• To access the Memory Manager, go to the System
Settings screen by holding down the R or L
button while pressing the POWER or RESET button.
Select the Memory Manager option from that
screen.
• Warning Messages 2
Required The following warning messages are given to the user when
Compliance Item there is insufficient memory available for saving games (the
only way new files can be written to the system is by deleting
existing files or by overwriting/updating them). The user must
also be notified of the amount of memory required by the
game’s save file.
• There is insufficient memory to save a new file.
If the game is started under these conditions, a
new file cannot be saved unless a existing file
is deleted.
• An additional *** blocks of free memory is
required to save a game.
• Restart the game after deleting files or copying
them to the Cartridge Memory using the Sega
Sega Saturn Software Development Standards, SOA version 2.0 54
Saturn’s Memory Manager. To access the Memory
Manager, go to the System Settings screen by
holding down the R or L button while pressing
the POWER or RESET button. Select the Memory
Manager option from that screen.
• Disabling the Continue Option
Required The continue option in a Sega Saturn application must be
Compliance Item disabled if there are no saved game files present for the game.
Moreover, the player should not be given access to saved game
selection screen (game load screen) until data is saved to backup
memory.
• Warning Messages 3
Required The following warning messages are displayed when 1) there are
Compliance Item no saved game files for that game, and 2) there is insufficient
memory to save game data. In essence, the save game function
cannot be used in this case. However, the user must always be
given the option to play the game with the save game function
disabled. The user must also be notified of the amount of
memory required to save the game’s backup data file.
• Games may not be saved under these conditions.
Do you still wish to start the game? Yes No
• An additional *** blocks of free memory is
required to save a game.
• Restart the game after deleting files or copying
them to the Cartridge Memory using Sega Saturn’s
Memory Manager.
• To access the Memory Manager, go to the
System Settings screen by holding down the R
or L button while pressing the POWER or RESET
button. Select the Memory Manager option from
that screen.
Sega Saturn Software Development Standards, SOA version 2.0 55
User Selects
Backup Memory
Feature
User Selects
Backup Data
Display Warning
Load Data
Message 4
Is the backup Invalid
data valid?
Valid
Game Start
Figure A2.3 Backup Data Load Sequence
3.2 Loading and Saving Backup Data
• Warning Messages 4
Required The following warning messages are displayed when an
Compliance Item error occurs during the loading of data (errors do not
typically occur under real world conditions). The messages below
notify the user that the load failed and the data file is unusable.
• The file could not be loaded properly.
• Failed to load the file.
• The game cannot be started with this file.
• This file cannot be used.
Required Avoid using the term “damaged” in these messages.
Compliance Item
Sega Saturn Software Development Standards, SOA version 2.0 56
User Selects
Backup Memory
Feature
User Selects Save
Location Display Warning
Message 5
Is memory No
available?
Yes
Display Warning
Message 6
Save Data
Was save No
operation succesful?
Yes
Continue or Quit
Game
Figure A2.4 Backup Data Save Sequence
• Warning Messages 5
Required The warning messages below are displayed when
Compliance Item errors occur during saves. The messages are used if there is
insufficient memory left to save data or if there is a write error
(errors do not typically occur under real world conditions). If
there is insufficient memory left in the system, the user must also
be notified of the amount of memory required by the game’s
backup data file.
• An additional *** blocks of free memory is
required to save a game.
Sega Saturn Software Development Standards, SOA version 2.0 57
• Restart the game after deleting files or
copying them to the Cartridge Memory or
External Memory Device using Sega Saturn’s
Memory Manager.
• To access the Memory Manager, go to the
System Settings screen by holding down the R
or L button while pressing the POWER or
RESET button. Select the Memory Manager
option from that screen.
• The file could not be saved successfully. Try
again.
• Warning Message 6
Required This is a message that warns the user not to turn off the power
Compliance Item to the Sega Saturn while saving data. This warning should be
displayed when necessary and appropriate during the game. A
similar warning should also be included in the instruction manual
of the application.
• Saving game file. The file may not be saved
properly if the Sega Saturn’s power is
turned off.
Sega Saturn Software Development Standards, SOA version 2.0 58
Appendix 3:
Multiple Disc Applications Software
Development Standards
The multiple disc applications in this document suggests that 2 discs or more
are required to fully play a game; furthermore, because of the story line, these
discs are interdependent. The multiplicity (of discs) does not apply if a game
can be played on discs independently. Simply stated, this document is written
for 2 discs. Applications designed for 3 discs or more can be explained in the
same way.
This document describes the following expressions:
• Multiple discs are referred to as <disc 1>, <disc 2>, and so on. They may
also be referred to as <disc A>, <disc B>, and so on. Make sure there is
right correlation with the application CD label.
• Messages shown in <> are examples. Use them to avoid misleading users.
• The expression "launched" is used with [disc X]. This means "when
playing a game, the first disc inserted is <disc X> and currently this disc
is in the tray."
1. Basic Design
1.1 Specification Conditions
The following are specification conditions imposed on the 2nd and
subsequent discs:
Necessary conditions
• Discs must be launched from the multiplayer screen.
(-> Discs must be passed through the CD check; i.e., the security
check.)
• Backup RAM must be used between discs to save data.
(-> This is the only way to pass data to the 2nd and subsequent
discs.)
Note: As an exception, data may be passed to the 2nd and subsequent
discs using a password. In this case, backup RAM may not be used.
Sega Saturn Software Development Standards, SOA version 2.0 59
Sufficient conditions
• <Title screen>, a soft reset jump destination, must exist on each
disc.
(-> This prevents frequent disc switching.)
• <Sega logo> and <Title screen> must exist on each disc.
(-> It is desirable that trademark/copyright displays (or data) exist
on each disc.)
Soft reset means resetting through the Control Pad
<A+B+C+START buttons>.
From the backup system conditions:
• Console RAM/Cartridge RAM selection must be allowed.
• Save Data selection must be allowed (in systems handling
multiple data)
1.2 Title Sequence
Required In title sequences for the 2nd and subsequent discs, at a
Compliance Item minimum, the following are required:
• CD check
• <License Sega logo> display
• Pad check
• Application <Sega logo> display
* Note: Skip immediately after the <license Sega logo>
display.
• <Title screen>
* Title logo, <PRESS START BUTTON> display, and (C)
notation.
The following included in normal sequences do not need to be
included:
• Demonstration
• <Start/Options Select Screen>
• <Options>
When a game is over, continued, or cleared, make sure to return to the
application <Sega logo> of each disc.
When abbreviating the demonstration, titles do not need to be looped.
Options are determined by each application. However, when settings
seem likely to be changed frequently during play on disc 2, inclusion
is required.
Sega Saturn Software Development Standards, SOA version 2.0 60
When Options are not included, some specs may not have the
<Start/Options Select Screen>.
2. Switching Discs
2.1 Required compliance items and basic
procedures
2.1.1 Required compliance items
Required The following items require strict compliance when switching
Compliance Item discs 1 and 2:
• Make sure to switch discs through the multiplayer screen
within the console boot ROM (processing and screen display).
• Make sure to save the score and Options settings when
switching discs (i.e., save the settings in the backup RAM).
2.1.2 Basic procedures
Required The following items require strict compliance when switching
Compliance Item discs 1 and 2:
1. Display message on the game screen to prompt switching
discs. Switch discs. Press the console Open button and go to the
multiplayer screen. After switching discs 1 and 2, close the
console CD door and restart the game. (User removes disc 1 =
Press the console Open button.)
2. Move the processing over to the multiplayer screen.
(User sets disc 2 = Close the console CD door.)
3. Perform CD check on the inserted disc.
4. Display necessary information (license Sega logo).
5. If everything is normal, move quickly to the application.
• Steps to save necessary data to the backup RAM have been
abbreviated.
2.2 Switching from disc 1 to disc 2
1) Ending Disc 1 Play
When ending the disc 1 main game and moving to disc 2, switch
discs following <Basic procedures when switching discs>.
In moving from disc 1, and starting disc 2, it is desirable to avoid
displaying items related to the main game (Sega logo, title screens,
etc.) as much as possible, and move smoothly to the game (for
Sega Saturn Software Development Standards, SOA version 2.0 61
conflicts regarding 1. Basic design and 2> Title sequence, refer to
Recommended specs in 5.).
2) Continuous Start from the Disc 2 Content with Respect to Disc 1
Regardless of the launch from disc 1, when starting the game from
disc 2 through continuous start, before switching discs, a screen
display must prompt the start from disc 2.
(The user selects Continue from Title within disc 1.)
1. Reading Continue information from the backup RAM.
(The user selects and determines saved data from the disc 2
content.)
2. A display on the game screen prompts Start from disc 2.
<Starts from disc 2>
2.3 Switching from disc 2 to disc 1
As shown in <Basic design>, in the case of Game Over, Continue,
and Game Clear, make sure to return to the disc 2 application start
point (Sega logo). As we shall discuss later, also in the case of
Control Pad <A+B+C+START button>, return to <Title Screen> on
disc 2. As a result, moving from disc 2 to disc 1 is a case that only
occurs when regardless of a launch from disc 2, there is no saved data
to start from the disc 2 content, or the launch occurs from disc 2, but
the game data (saved data) started from the disc 1 content is selected
by the user. Further explanation will follow in 4> Incorrect disc
switching.
• When there is a game link in switching from disc 2 to disc 1,
make sure to switch discs in compliance with 2> Switching from
disc 1 to disc 2 and 1) Ending disc 1 play.
2.4 Incorrect disc switching
Since the multiplayer screen is called into the process, other
applications discs cannot be switched incorrectly. Therefore, incorrect
disc switching can only be determined and the user can be notified in
the following 1) and 2) cases:
1) The launch is from disc 2, but there is no save data.
When disc 2 is inserted while there is no game data (saved data)
used per application, or when regardless of a launch from disc 2,
there is no game data (saved data) started from the disc 2 content,
display the following warning message to prompt the user to
switch discs.
Sega Saturn Software Development Standards, SOA version 2.0 62
<This is disc 2. There is no game data to start from this disc.
Reinsert disc 1.>
• The case is excluded when regardless of a launch from disc 1,
there is no game data (saved data) started from the disc 1
content (this is because disc 1 includes a function to allow start
from the start).
• After disc 2, each application determines whether the function
to allow start form the start should be included.
2) When regardless of a launch from disc 2, the disc 1 game file is
selected by the user Compliance of 2. Disc switching and 2>
Switching from disc 1 to disc 2 with 2).
3. Reset
The title sequence exists on both discs 1 and 2; therefore, note that the reset
jump destination is partially modified.
3.1 Reset through the console Reset button
All cases: similar to the normal case. The same handling as
OFF -> ON.
3.2 Reset through Control Pad <A+B+C+START
button>
Jump destinations:
<Disc 1> Start loop -> As normal (<Multiplayer screen>)
<Disc 1> During main game -> As normal (<Disc 1> <Title>)
<Disc 2> Title <loop> -> As normal (<Multiplayer screen>)
<Disc 2> During main game -> <Disc 2> <Title screen>
• Disc switching processing (during the message display for disc
switching) is considered to be in progress during the main game;
therefore, jump to each disc title as it is entered.
• When resetting during the main game, make sure to maintain the
score, Options, and other settings.
Sega Saturn Software Development Standards, SOA version 2.0 63
3.3 Reset through CD door Open
All cases: similar to the normal case. Jump to the console boot ROM
<multiplayer screen>.
4. Save function
4.1 Saving game data when switching discs
To pass game status over several discs, excluding special cases such
as passwords, the only way is to use the backup RAM to save status.
Therefore, all multi-disc applications using the backup RAM must
include specifications to ensure saving game data when switching
discs.
1) Autosave
In applications where game data are saved frequently through
autosave, game data are saved automatically immediately before
inserting a disc. Also, at certain limited points, when the
application calls for autosave, those points must be saved at the
end of play.
2) Arbitrary save
In applications where the user saves data arbitrarily, game data
must be saved immediately before a disc is inserted.
4.2 When there is no backup RAM space available
As shown in <Basic design>, in dual-disc applications, the backup
RAM must be used. In the case of a single-disc application, even if
there were no game data and available space (Save function cannot
be used), the user still must be able to play the game (appendix 1:
see <Backup Software Development Standards>). In dual-disc
applications, when there are no game data and available space (Save
function cannot be used), the disc 2 game cannot be launched
effectively. Therefore, before starting the disc 1 main game, ensure
the following warning message:
Starting the game in the current state does not
allow full play. Do you still wish to start the
game? Yes No
In applications using the save function for reasons other than moving
to a second disc, ensure the following warning message:
Starting the game in the current state does not
allow saving data. Also, you cannot play the game
in full. Do you still wish to start the game?
Yes No
Sega Saturn Software Development Standards, SOA version 2.0 64
However, when a halfway play (disc 1 play only) ends at a highly
inappropriate location (when it might be mistaken with a fatal bug),
the game play should not be forced with the above message. In that
case, display a message to prompt clearing other applications game
data and display the amount of space required, and do not allow the
game to start. (Message: Appendix 1: <Backup Software Production
Standards>)
5. Recommended specs to link games
smoothly
So far, by creating specs that complied with standards, after ending
the disc 1 game and moving to disc 2, the following screens were
processed:
1) <Disc 1> <Disc switching message>
2) Console boot ROM <Multiplayer screen>
3) <Disc 2> <License Sega logo screen>
4) <Disc 2> <Title screen>
5) <Disc 2> <Game data select screen>
During the story line, for the user, these screens are distractions to the
flow of the game. Therefore, we recommend the following specs to
minimize these procedures:
• After <disk 1> is finished playing, create <transition state data>
to <disc 2> within the save data.
• When the application confirms <transition state data> within the
backup RAM, read this data with the highest priority (ignoring
other game data).
• When switching discs through <transition state data>, at a
minimum, take the following steps:
(<normal data> game file on <disc 1>.)
(Rewrite <normal data> temporarily to <transition state data>.)
1) <Disc switching message> on <disc 1>.
2) Main console boot ROM <multiplayer screen>
3) <License Sega logo screen>
(<transition state data> recognition>)
4) Immediate return to the application (game play)
(Rewrite <Transition state data> to <Normal data> starting from
<disc 2>.)
Sega Saturn Software Development Standards, SOA version 2.0 65
• <Disc 2> <Title screen> <Game data select screen> can be
skipped.
However, pay attention to the following:
Caution! <transition state data> is special state data; it normally do not
exist.
• After <disc 2> is inserted correctly, make sure to rewrite to
<normal data> starting from <disc 2> as soon as possible.
• Make sure to take appropriate measures when incorrectly
there are more than 2 <transition state data>.(i.e., set
priorities through time stamp, set select screens, etc.)
• In checking the backup capacity at the start of a game, also
make sure to consider securing the <transition state data> size
(make sure to void cases where in a transition state, an
insufficient size prevents you from moving to the next disc.)
• When using these specs, the user must be very careful not to
turn off power while leaving <transition state data> behind
(when the <disc 1> play is ended, care must be taken so that
when the power is turned off, the flow transition is not
adversely affected.
Sega Saturn Software Development Standards, SOA version 2.0 66
TM
Sample Game
Program
User's Manual
Doc. # ST-159-R1-092994
© 1994-95 SEGA. All Rights Reserved.
Sample Game Program
User’s Manual
1. Introduction ............................................................... 3
2 Overview ................................................................... 4
3. Game Sequence ....................................................... 5
4. Basic Function Program ......................................... 10
5. Action Control ......................................................... 12
6. Directory Structure, File Name,
Function Name, Variable Name.............................. 18
7. Compile/Execute Procedure ................................... 19
8. SIMM/VCD Compatibility ........................................ 20
Sample Game Program User's Manual 1
(This page is blank in the original Japanese document.)
2
1. Introduction
To develop a game, responsible people are needed for planning, programming,
designing, sound development, etc. The following three items are among the first
things a programmer must keep in mind:
1) Characteristics of the game machine hardware.
2) Development environment of the game machine.
3) Game programming basics
This manual concentrates on explaining “(3) Game Programming Basics,” using
sample programs. To aid in understanding this manual, it would be beneficial to
play several games on a MEGA Drive or other game machine. Also, it would help to
read the coding regulations from the sample program list.
The program must be changed since part of it does not satisfy the game creation
standard. For instance, the program performs input of the controller by the through
mode, but this should be changed because the SMPC command must be used.
Sample Game Program User's Manual 3
2. Overview
This sample program is located in the SEGAGAME directory. The sample program
structure is shown in Figure 1; however, this manual breaks it up into the following
classifications.
Game Sequence
These are display, Sega logo display, title display and program select in Figure 1.
These are common for most games.
Basic Function Program
The basic function programs are the sprite samples and scroll sample shown in
Figure 1.
Action Control
This is the 2D shooting game and a game demo is shown in Figure 1. The manual
explains how to create the action game in this section. The program that expresses
the action including the player (own machine), enemy (other machine), (collision
check), background scroll, etc., is also covered. This action is controlled by the
action control program.
Figure 1 Program Structure
4
3. Game Sequence
Figure 2 shows the game sequence in flow chart form. This flow is controlled within
the program by status flags called game mode variables.
Figure 2 Game Sequence Flow
Sample Game Program User's Manual 5
The game sequence uses C language main function and appears like the following.
Uint32 SMMA_MainMode; /* Game Mode Variable */
Uint32 SMMA_Mainlevel; /* Level in the Game Mode */
void main(void)
{
SMMA_IniSystem(); /* System Initialization */
SMVl_SprCmdStart();
SMVl_SprCmdEnd();
SCL_DisplayFrame();
SMMA_MainMode = LOGO_MODE;
SMMA_Mainlevel = 0;
for(;;) { /* Infinite Loop */
switch(SMMA_MainMode){
case LOGO_MODE: /* At Sega Logo State */
SMLO_SegaLogo(); /* Display Sega Logo */
break;
case TITLE_MODE: /* At Title State */
SMTI_Title(); /* Display Title */
break;
case SELECT_MODE: /* At Program Select State */
SMSL_Select(); /* Execute Program Select */
break;
}
}
}
Depending on the game mode variables in the main function, different subroutine
functions are called up and used repeatedly. The game mode variable determines
the following operation states. Because the game mode variable is defined as an
external variable, the status can be changed from any of the subroutines. The
LOGO_MODE is held as the initialization value, so start the system at the SEGA
Logo display. The contents of the various subroutine processes are shown below.
6
SMMA_IniSystem() Initialize
Initializes the system as shown in Figure 3. Initialize the hardware, etc. within the
system initialization process.
Figure 3 System Initialization Flow
SMLO_SegaLogo() Sega Logo Display
The Sega logo is displayed as shown in Figure 4. Because the game mode variables
go to TITLE_MODE before returning, the title is displayed without further conditions.
Figure 4 Sega Logo Display Flow
Sample Game Program User's Manual 7
SMTI_Title() Title Display
The title is displayed as shown in Figure 5. After the START button is pressed, move
to program select.
Figure 5 Title Display Flow
8
SMSL_ModeSel() Execute Program Select
The program select screen is displayed as shown in Figure 6. Use the D-pad to
select, and C button to execute the sample program, game program, etc.
After the program ends, the game mode variables are set to SELECT_MODE before
return so the Program Select is executed unconditionally. When EXIT is selected, the
game mode variable is set to LOGO_MODE, and returned, so the transition occurs
to the Sega Logo display unconditionally.
Figure 6 Demo Execution
The following items are in the Program Select Menu.
1. SCROLL SAMPLE
2. SPRITE SAMPLE
3. WINDOW SAMPLE
4. GAME SAMPLE
5. EASY SOUND TEST
6. <EXIT>
Sample Game Program User's Manual 9
4. Basic Function Program
The basic function program is executed by selecting as scroll sample, sprite sample,
window sample, or game sample from the game sequence program select. At first, a
selection screen similar to the program selector screen appears. Use the D-pad to
select, and the C button to execute.
The scroll sample, sprite sample and window sample menus have the items shown
below. Each item in these menus is configured to allow a simple program to be
created.Refer to the source code for the contents of each program.
Scroll Sample
1. BITMAP SCROLL
Draws points, lines and boxes. (Uses NBG0, bitmap format, RGB32768-color mode.)
2. NORMAL SCROLL
Scrolls up, down, left, and right. (Uses NBG0, cell format, 256-color mode.)
3. LINE SCROLL
Scrolls while shaking in vertical and horizontal directions. (Uses NBG0, cell
format, 256-color mode.)
4. MULTI SCROLL
Displays several layers simultaneously by giving a priority to the scroll. (Uses
NBG0~3, each surface is cell format, 16-color mode.)
5. LINE COLOR SAMPLE
Calculates the color for each line, lowering the translucency rate as it gets closer
to the center of the screen.
6. ROTATE SCROLL
Rotates scroll at an angle horizontally and vertically. (Uses RBG0, cell format,
256-color mode.)
7. <EXIT>
Sprite Sample
1. POLYGON TEST
2. POLYLINE TEST
3. TEXTURE TEST
Rotates, enlarges and reduces polygons, polylines, and textures. (Changes the
content of the sprite structure.)
4. HENKEI TEST
Scales the peripheral of the sprite. (Defines 4 points and transforms the inside
texture.)
5. LINE TEST
Moves lines in the screen while changing colors. (Sets the position of 4 points
and the move speed and varies the texture within.)
6. SHADOW TEST
Displays the sprite or polygon as a shadow. (Displays a normal or MSB shadow
while the sprite automatically calculates color while fading in and fading out.)
10
7. SPRITE TEST
Rotates, enlarges and reduces the texture while moving it around.
8. SHADING TEST
Adds different shades to each of 3 cubes. (Adds “no shading,” “flat shading”
and “Gouraud shading.”)
9. 3D TEST
Rotates, enlarges and reduces a polygon.
10. <EXIT>
Window Sample
1. NORMAL BOX WINDOW
Displays a rectangular window.
2. NORMAL LINE WINDOW
Displays a line window.
3. SPRITE WINDOW
Displays a texture form window.
4. 3WINDOW SAMPLE
Displays all windows.
5. <EXIT>
Game Sample
2D Shooting Game.
Sample Game Program User's Manual 11
5. Action Control
What is Action
A method called action is used in the 2D shooting game included in the sample
games to provide quasi-multitasking. Action is a function that processes the action
and player, enemy, shots, and background scroll in 1 cycle.
This function is registered individually (makeaction) and the registered functions are
run at the same time in a loop (actionloop) and executed to realize quasi-
multitasking. This sample is supplied in smp_task.c and smp_tash.h and is used in
most of the sample programs.
Action Control Makeup
Action control controls action from a single source using action structures. The basic
action structure (ACTWK) is composed of the flag being used (id), level, mode,
status, and function executable address (pcbuff) and an area that can be freely set.
Other than id and pcbuff, any of these can be used freely. Also, if additional infor-
mation needs to be stored, it can then be added using a macro that is described later
as a member. (See Figure 7.)
The 2D shooting game declares an exclusive action structure called GAMEACT.
In order to manage several actions, the elements that make up ACTWK are defined
in an array so that information can be saved for each action. This controls multiple
actions. The maximum size of this array is set by ACTWKMAX. In other words,
only a maximum number of ACTWKMAX can be registered.
There are two types of actions registered, those that are not used and have no condi-
tions, and those that are registered in specified areas in the array. Actions that are
registered are called up by the actionloop. The actionloop at this time passes the
pointer to that action as an argument so that during the action, action information
can be operated.
12
Figure 7 Basic Structure and Exclusive Structure
Explanation of theAction Control Function and Macro
The functions supplied in smp_task.c and smp_task.h are explained here.
[Function]
void *SMTA_MakeAction(void) *execadd)
This function searches for unused actions (id=0) and registers the executable address
to the pcbuff. It then changes the action to active (id=1). In this function, the action
number within the array is undefined. This causes problems when action informa-
tion is compared. Shot and player collision (hit determination) is one example. If
the order needs to be controlled, use the following function.
Sample Game Program User's Manual 13
void *SMTA_MakeActionX(void *execadd, Uint8 start, Uint8 count)
Searches for unused actions from the start of the array for the count number, regis-
tering any unused actions along the way. In other words, the range is specified and
the action is set. This function can be used in situations like shot actions where the
same action is set in multiplicity. If the range in the array that holds the action is
known, collisions can be easily secured.
void *SMTA_SetAction(void *execadd, Uint8 start)
Forces the action to be set in the start of the string. It is set whether or not the action
is in use. It can be used in player action, and so on, that will only be set once.
void SMTA_ActionLoop(void)
Searches, in order, from the beginning of the array to the end, executing all of the
active actions. The pointer to the action structure is passed to the action as an argu-
ment.
[Macro]
SMTA_DefActWk( actname, member)
Declares an exclusive action structure. This entails using a free set member. Refer to
the program below for an example. This macro does nothing more than declare the
structure by governing the action structure information uses.
SMTA_CheckAction(ACTWK *ptr)
This macro has a true (1) value when an action was registered and a false (0) when it
did not. Refer to the example below for the usage.
[Example]
ACTWK *ptr;
ptr = SMTA_MakeActionX(ShotAct, 0, 8);
if (SMTA_CheckAction(ptr))
/* Register OK */
else
/* Register Failed */
SMTA_KillAction(ACTWK *ptr)
This macro changes the action to inactive by writing a 0 to the id, and normally is
described during action, and by self set action to non-action. That action will not
execute in the next actionloop.
[Example]
void PlayerAct(ACTWK *ix)
{
if (Deadflag)
SMTA_KillAction(ix);
}
14
Example of Action Control
Shows an actual example of use.
/*
* Variable definition
*/
Uint8 Mainlevel;
Uint8 Gameover;
SMTA_DefActWk(GAMEACT,
SPRITE sprite; /* SPRITE DISPLAY */
Sint16 wreg[4]; /* Universal use register
Sint16 wcnt[4]; /* Universal use counter */
Uint8 colino; /* collision table index */
Uint8 coliatr; /* collision attribute */
Uint8 coliflg; /* collision flag */
Uint8 atp; /* kougeki ryoku */
Sint16 hp; /* hit point */
); /* Declares exclusive action structure GAMEACT */
/*
*
*/
void GameMain(void);
void PlayerAct(GAMEACT *);
void EnemyAct(GAMEACT *);
void ScrollAct(GAMEACT *);
/* ####[Action Example
void GameMain(void)
{
enum {
INIT, MAIN,
};
Mainlevel = INIT;
Gameover = 0; /* Game end flag */
for(;;) {
intWait(); /* Wait for V blank */
switch(Mainlevel) {
case INIT;
InitVdp(); /* Initialize VDP */
SMTA_ActWkInit() /* Initialize action work
SMTA_MakeAction(PlayerAct);
/* Set player action */
SMTA_MakeAction(EnemyAct);
/* Set enemy action */
SMTA_MakeAction(ScrollAct);
/* Set background action */
Mainlevel++;
case MAIN:
SMTA_ActionLoop();
if (Gameover) Mainlevel++;
break;
case EXIT;
return;
}
}
}
Sample Game Program User's Manual 15
/* ####[ Player Action ] #### */
void PlayerAct(GAMEACT *ix) /* (ACTWK *) >> (GAMEACT *) to cast *)
{
enum {
INIT, MAIN,
};
switch(ix->level) {
case INIT:
/* Initialize player coordinates, etc. */
ix->level++;
case MAIN:
/* Move player
/* Collision judgment
break;
}
}
16
Using V Blank
The game main processing structure is similar to the game sequencing structure.
Included in that is the intWait function. The intWait function includes the screen V
blank. There are two main reasons why the action loop is after V blank wait:
1) Reduces Flicker
By executing the action after the V blank hold, the next object on the frame will
have a new area to be displayed. If an object were to move between screen
displays, the scanning line position and moving direction would cause poor
display. Figure 8 shows this condition. (a) is displayed correctly because “move-
ment” occurs during V blank, but (b) and (c) have movement during scanning
causing two objects to be displayed at the same time, or nothing at all to be
displayed.
Figure 8 Relation of Scanning Lines and Objects
2) Timing
Correct interval timing is required to get the character or background to move at
a fixed (constant) speed. V blank can be handled at intervals of 1/60 of a second.
Therefore, even if variation occurs by an amount equal to the processing of a
single action loop, the motion speed can be kept constant (at a fixed speed).
However, if the action loop cannot be completely processed during 1 frame, it
cannot be used as an accurate timer.
Sample Game Program User's Manual 17
6. Directory Structure, File Name, Function Name, Variable Name
Figure 9 shows directory structure.
saturn
saturn
segalib
segalib
segasmp
segasmp
segadat
segadat
segabin
segabin Main Processing
segagame Main Processing
segagame
game2d
game2d
scroll
scroll
sprite
sprite
window
window
sound
sound
cgdata
cgdata
Figure 9 Directory Structure
All file names start with “smp_ ”. Also, external variables and external functions
start with “SM??_”. See the table below for specific examples.
Filename Function, Variable Contents
Prefix
smp_main.c SMMA_ Main processing
smp_logo.c SMLO_ Display logo
smp_slct.c SMSL_ Display select
smp_titl.c SMTI_ Display title
smp_task.c SMTA_ Action control
scroll/smp_sc10.c SMSC_ Scroll sample
sprite/smp_spr.c SMSP_ Sprite sample
window/sm_wind.c SMWI_ Window sample
sound/smp_snd.c SMSN_ Sound sample
18
7. Compile/Execute Procedure
Compiling Procedure
PC Version
Execute smpmk.bat in the saturn/segagame directory.
C:/saturn/segagame>smpmk.bat [ENTER]
WS Version
Make smp.mk in the segagame directory.
saturn/segagame% make -f
Execute Procedure
PC Version
Execute the following commands from the debugger command line.
Command Comment
rs [ENTER] Reset the ICE.
g [ENTER] Execute the BOOT ROM. If it won’t
boot up, reset the target.
l ;r:smp.abs [ENTER] Load the sample program.
g 06010000 [ENTER] Execute the sample program.
WS Version
Execute the following commands from the debugger command line.
Command Comment
rs [ENTER] Reset the ICE.
g [ENTER] Execute the BOOT ROM. If it won’t
boot up, reset the target.
ftp WS name or IP address [ENTER]
User name [ENTER]
Password [ENTER]
ll ;r:smp.abs [ENTER] Loads the sample program.
g 06010000 [ENTER] Executes the sample program.
Sample Game Program User's Manual 19
8. SIMM/VCD Compatibility
With normal software, data is not loaded (read) at the same time into work memory
when it is executed, but is broken into modules which are read into memory each
time it is required. The blocks that are resident in the work memory are only for
initializing, reading, and executing each module. That resident block is called a
kernel.
Actual game software is stored in a CD-ROM or cartridge ROM, and after (launch-
ing) reset, is in a form to be partitioned and loaded. This is emulated by SIMM or
VCD. Using a sample program as an example, modularization will be explained.
An image of the work memory when the sample program is partitioned into mod-
ules is shown in Figure 10. Also, a listing of the kernels and modules in the sample
are shown below.
Kernel
smp_krnl.bin
Modules
logo.bin
titl.bin
wind.bin
scrl.bin
gm2d.bin
sprt.bin
d214.bin
These programs are found in the segagam1 directory. Here, the rof2bin is used
during “make” to convert the kernel and module abs format file to a bin format.
Also, mfcat is used to convert each bin file to a SIMM file.
20
06000000 System
06002000 IP.BIN
06010000 Kernel
(Initialization, Main Menu)
is resident
06080000 Module
(One of Logo,
Title,
Sprite,
Scroll,
Window,
and Game)
enters as
nonresident.
Figure 10 Sample Program Memory Image
Executing Procedure ia
V SIMM File
1. Program Make
WS Version make -f smp.mk[ENTER]
PC Version smpmk.bat[ENTER]
This will make a smp.lod that can be executed in a SIMM.
2. Program Loadin and Execution
1 04020000;m:smp.lod[ENTER]
rs[ENTER]
g [ENTER]
After a brief display of the Sega logo, the sample game is executed.
Sample Game Program User's Manual 21
VCD Executing Procedure
1. Program Make
WS Version make -f smp.mk[ENTER]
PC Version smpmk.bat[ENTER]
Here, the program module *.bin is made. smplod is also made here, but is
not required.
2. Building the Program CD-ROM Image and VCD Startup
Create the CD image by copying the btsmpfs.scr and btsmpfs.pre located in the
vcd directory, and the *.bin file which is a PC program for the VCD, and by
executing the following commands in the vcd directory.
vcdpre btsmpfs.pre [ENTER]
vcdbuild btsmpfs.pre [ENTER]
Start the VCD by moving the programming box switch to the VCD side and
executing the following commands.
chev us [ENTER]
vcdemu btsmpfs [ENTER]
Press any key at the first message and verify that SEEK2 is displayed in the
command column.
3. Program Execution
rs [ENTER]
g [ENTER]
The sample game will start after the Sega logo is momentarily displayed.
In both SIMM and VCD, rs and g start the boot ROM and execute read IP.BIN from
SIMM or VCD. The sample is executed by reading the kernel from IP.BIN.
Procedure for the Module Partition
For partitioning to the kernel and module, symbol information is required by each
side (mutually), and thus some steps are needed to be taken. To create the common
information ABS file, use the method shown in Figure 11. The tool used to extract
the symbols from the map file differ depending on the development environment
being used, as shown below.
1. PC Version
SYMADD.EXE Map File Name [ENTER]
2. WS Version
awk -f kiri.awk Map File Name [ENTER]
22
Figure 11 Module Partition Procedure
Sample Game Program User's Manual 23
INDEX
Action ....................................................................................... 12
Action Control ..................................................................... 4, 12
Basic Function Program ........................................................... 4
Compile Procedure ................................................................. 19
Execute Procedure .................................................................. 19
Game Sample........................................................................... 11
Game Sequence ......................................................................... 4
Module Classification ............................................................ 22
Scroll Sample ........................................................................... 10
SMLO_SegaLogo() Sega Logo Display .................................. 7
SMMA_IniSystem() Initialize.................................................. 7
SMSL_ModeSel() Execute Program Select ............................ 9
SMTI_Title- Title Display ......................................................... 8
Sprite Sample........................................................................... 10
V BLANK ................................................................................. 17
Window Sample ...................................................................... 11
24
TM
Sample Data
User's Manual
Doc. # ST-160-R1-092994
© 1994 SEGA. All Rights Reserved.
Sample Data User's Manual
CONTENTS
Introduction .......... 3
Font File ................. 4
Sample Data User's Manual 1
(This page was blank in the original Japanese document.)
2
Introduction
“Sample data” is data that is collected so that both application software and sample
programs can use it.
This version provides the font library.
Sample Data User's Manual 3
Font File
These are bit mapped fonts that are used to display characters on the game machine.
The fonts supplied include an 8 X 16 dot, a 1 byte code font and a 16 X 16 dot 2 byte
code kanji font.
• Font Specifications
- 1 byte code Font 8 X 16 dot ASCII Font
Symbol Font
Katakana font
- 2 byte code Font 16 X 16 dot JIS 1 STANDARD KANJI Font
JIS 2 STANDARD KANJI Font
• Table of Fonts Provided
Font Font File Comments
ASCII + Symbol ASCII.FON Code table 1
ASCII + KATAKANA Font KANA.FON Code table 2
JIS 1,2 STD KANJI Font KANJI.FON
• Font Format
- ASCII.FON, KANA.FON
Font data is in 16 byte units starting at the start of the file.
Character Code 00h 01h 02h FFh
Font Data 16 byte 16 byte 16 byte 16 byte
Equation to calculate the font position:
Font Position = Character code x 16
- KANJI.FON
These are JIS 1 and 2 STD KANJI Fonts. Font data is in 32 byte units from
the start of the file.
JIS Code 2121h 2122h 2123h 7e7eh
Font Data 32 byte 32 byte 32 byte 32 byte
Equation to calculate the font position from the JIS code:
Font Position=(JH-21h) x (7eh-21h+1)+(JL-21h)
JH: JIS CODE Upper bytes
JL: JIS CODE Lower bytes
4
• Font Code Table
Code tables for ASCII.FON and KANA.FON are shown in Tables 1 and 2.
Table 1 Code table 1 (ASCII.FON)
Table 2 Code table 2 (KANA.FON)
Sample Data User's Manual 5
Font Data List
• ASCII, FON, KANA.FON
The 1 byte code font is expressed by 8 bits X 16 and the significant address from
the top is allocated.
Offset 1 byte
Address
00h
01h
02h
0fh
• KANJI.FON
The 2 byte code font is expressed by 16 bits X 16 and the significant address from
the top is allocated in the order of left to right.
1 byte 1 byte
Offset +0 +1
Address
00h
02h
04h
1fh
6
TM
Disc Format Standards
Specification Sheet
Ver. 1.0
Doc. # ST-040-R4-051795
© 1995 SEGA. All Rights Reserved.
REFERENCES
In translating/creating this document, certain technical words and/or phrases were interpreted
with the assistance of the technical literature listed below.
1. KenKyusha New Japanese-English Dictionary
1974 Edition
2. Nelson’s Japanese-English Character Dictionary
2nd revised version
3. Microsoft Computer Dictionary
4. Japanese-English Computer Terms Dictionary
Nichigai Associates
4th version
TABLE OF CONTENTS
Introduction ...................................................... 2
1.0 Disc Format Overview ............................. 3
2.0 Physical Disc Format .............................. 5
3.0 Logical Disc Format .............................. 14
4.0 Boot System .......................................... 24
Appendix Various Sample Code Listings ...... 33
Disc Format Standards Specification Sheet 1
Introduction
This standard specification defines how SEGA SATURN application software is
organized on a CD. CD's that do not follow this standard specification will not be
recognized as a SEGA SATURN Game-CD. All application software that operate
with the SEGA SATURN must conform to this standard specification.
The contents of this specification document provides the necessary information for a
programmer to develop SEGA SATURN application software. While standards for
the basic physical CD format and the copy protection settings must always be ad-
hered to, compliance with these standards are done automatically through the use of
disc mastering software and hardware specified by SEGA as well as the manufactur-
ing processes implemented at SEGA certified disc manufacturers. Therefore, the
details of these processes will not be discussed in this document. Accordingly, major
problems may surface if non-SEGA approved CD mastering tools are used. Please
use SEGA-approved CD mastering tools whenever possible. Please also note that
the mass production of SEGA SATURN discs is impossible at non-SEGA certified
CD manufacturing sites.
! Be sure to use a CD tool specified by SEGA.
Because the CD tool must be approved, please inquire with SEGA before using a CD tool
other than those designated by SEGA.
2
1.0 Disc Format Overview
1.1 Features
The physical format of the SEGA SATURN Game-CD for this game device conforms
to the Semi CD-ROM XA standard for this game. As a result, an interleave record
that has always been dependent on the application can be recognized as the system,
and images and sound can be played concurrently.
“Semi CD-ROM XA” : CD-ROM XA with Model 1 track
1.2 Disc Size and Record iTme
Only a 12 cm CD can be produced. To avoid potential problems, the start time of the
read out area is restricted to the following ranges.
• Start LSN (#0) time: 00:02:00
• End LSN (~#283499) time: ~63:01:74
• Read out area start time: ~63:04:00
The maximum recording time is 63 minutes. Multisession cannot be used.
1.3 Linear Speed and T
rack Pitch
To increase the track jump precision and seek speed, the Game-CD linear speed and
track pitch are set to the following fixed values.
• Linear speed: 1.25 m/sec
• Track pitch: 1.6 µm
1.4 Disc Format
The disc format conforms to the following standards.
• Physical format : Sony and Philips CD standards “Red Book” and
“Yellow Book”, as well as “CD-ROM XA.”
• Logical format : ISO9660
• MPEG format : ISO11172
1.5 Track Layout
The inner circumference is the CD-ROM area and the outer circumference is the CD-
DA area.
1.6 Sector Structure
In addition to the conventional Mode 1, there are Mode 2 Form 1 and Mode 2 Form 2
that have subheaders. Various interleaving records that use file numbers or channel
numbers are allowed.
Disc Format Standards Specification Sheet 3
1.7 ISO9660 Conformity
The contents of logical sector numbers 0 to 15 are not specified in the ISO9660 stan-
dard. A boot program or protection information can be utilized to enable the CD
producer to startup the system. Game-CD startup is enabled by defining this area in
the disc format. A startup cartridge is not required. Logical sector numbers starting
from 16 conform to ISO9660.
4
2.0 Physical Disc Format
The physical format conforms to the CD-ROM standard (Yellow Book) and CD-
ROM XA standard. Items within these standards that are particularly restricted by
SEGA, as well as those required for application development, are described in this
section.
2.1 Area Divisions Within a Disc and Organization of Each Area
A disc is divided and organized starting from the innermost track, in the following
order:
1. Lead-in area
2. Program area
3. Lead-out area
TOC information is written in the lead-in area in compliance with the CD-ROM XA
standard.
Information Area
Inside Lead-in Information Area Lead-out Outside
Disc Lead-in Program Lead-out
Area
Area ProgramArea
Area Area
Area
CD-ROM
CD-ROM CD-ROM XA
CD-ROM XA CD-DA
CD-DA
Area
Area Area
Area Area
Area
1 track 0 to 97 track over 1 track
Track 1 Tracks 0 to 97 over Track 1
2 tracl to 99 track
Tracks 2 to 99
Figure 2.1 Organization ofAreas within the Disc
!! Only 1 track is required for CD-ROM area (Mode 1).
At least 1 track is required for the CD-DA area.
Disc Format Standards Specification Sheet 5
2.2 Program Area Track Layout
The disc is configured with a CD-ROM XA track that continues after one CD-ROM
track; the CD-DA track continues afterwards. As a result, the program area is di-
vided and arranged in the following order.
• CD-ROM area (Mode 1 track)
• CD-ROM XA area (Mode 2 Form 1 and Form 2 tracks)
• CD-DA area
This prevents the sudden play of the CD-ROM track while playing the CD-DA track
on an audio CD player. Also, if this disc is set to the CD-ROM drive that corresponds
to Mode 1 track only, the Mode 1 track is placed at the start to prevent any trouble.
Therefore, each track must be arranged in the order listed above.
Do not alternate the arrangement of CD-ROM tracks and CD-DA tracks. Also, do
not arrange CD-ROM areas and CD-DA areas in reverse order.
• Track number
The CD-ROM area track number is 01. The CD-ROM XA area track number can
be set from 02 to 98 consecutively. The CD-DA area track number is from 02
when there is no CD-ROM XA area. When there is a CD-ROM XA area, it can be
set from the next track number continuously up to 99. Do not arrange track
numbers discontinuously. One track must be at least four seconds.
!! Except for the pause area, the pre gap, and post gap areas, 1 track requires 4 seconds or more.
• Pauses between tracks
According to the “Yellow Book,” a two second pause (silent interval) must be
placed before and after a CD-ROM track, before and after a CD ROM XA area,
before each CD-DA track, and after the final CD-DA track. This is so that the end
of the prior song is not played while seeking with an audio CD player.
• CD-DA tracks
Data of at least one song must be placed in the CD-DA area. When CD-DA data
is not required, a warning message like “This CD is a Game-CD. Please play this
disc on a dedicated game machine” should be entered. When the audio CD player is
turned on, it’ll display what CD it is. This message is not required when there is
data for at least one song. The user may also play the CD to listen to songs only.
6
Recording Range of the Program
Area
ABS TIME LSN FAD
Start frame 00:00:00 - 0
Start sector 00:02:00 0 150
End sector 63:01:74 283499 283647
End frame 63:03:74 - 283799
Lead-out area start time 63:04:00
• “Start frame, start sector” must be at the times shown above.
Values for “End sector, end frame, lead-out area start time” must be at or
smaller than the times shown above or at values that are smaller.
Track image diagram when data track is maximized (audio track is minimized)
Lead-in
Lead-in Lead-out
Lead-out
TNO
TNO
00 00 01 01 02 02 AA AA
X X
00 00 01 01 00 00
01 01 01 01
A/D
A/D Data Data Audio Audio
Data Data Audio Audio
TIME
TIME
63:04:00
00:02:00
(start sector)
00:02 63:00:00 63:04:00
(first sector) 62:58:0063:00:00
00:00:00 62:56:00 62:58:00
00:00:00 (post62:56:00
gap start)
(post gap start)
Figure 2.4 Track image when data track is maximized
• The usable data sector is from the start sector up to 1 sector before the post gap
begins (about 566 MB.) 9 MB of data sectors are used up for every 1 minute
increase of the audio track usage time.
Disc Format Standards Specification Sheet 7
2.3 Disc Position Indicator Key
In addition to the absolute time (Atime) and logical sector number (LSN), the frame
address (FAD) is incorporated in order to specify a position on the disc.
• Logical Sector Number (LSN)
Numbers are continuously assigned in sector (frame) units, with the absolute
time 00:02:00 as 0.
• Frame Address (FAD)
Numbers are continuously assigned in sector (frame) units, with the absolute
time 00:00:00 as 0, and corresponds with the absolute time at a ration of 1 to 1.
The logical sector number and frame address have the following relationship.
logical sector number = frame address – 150
The frame address acts as a key for accessing the CD block.
8
Figure 2.4 shows the relationship between the access key and track structure in order
to explain the meaning of the frame address.
Inside Disc Information Area
Inside Disc Information Area
Lead-in Lead-out
Area Lead-in AreaLead-out
Q code Program Area
Area Area
Q code Program Area
Data Data Data Audio Audio
Contr. Data Data Data Audio Audio
Contr.
TNO 00 01 02 03 AA
TNO 00 01 02 03 AA
Index 00 01 00 01 00 01
Index 00 01 00 01 00 01
2 ≥2
sec. 2
sec. sec. ≥2
Time sec.
Time
Point = A0 Point = A0
PSET = 00PSET = 00
ATime (note)
ATime (see (note)
note)
Mode Mode 01 01 02
Header Header
(Min, Sec,(Min, Sec,
Frame) Frame)
Logica lSector
LogiNumber
LogicSector cSector
Number Number
(LSN) (LSN)
Frame Frame
Address Address
(FAD) (FAD)
Must have No tracks More than 1 song
Must have No tracks
1 track required,More than 1 song
required
1 track required, required
multiple tracks
multiplepossible
tracks
possible
Note: With the CD-ROM XA standard, PSEC=20H when POINT=A0H; however,
with the Semi CD-ROM XA standard, PSEC=00H.
Figure 2.4 General Game-CD Structure
Disc Format Standards Specification Sheet 9
2.4 Sector Structure
Figure 2.5 shows the physical format of the CD-ROM and CD-ROM XA. Game-CD
uses three types of sectors: Mode 1, Mode 2 Form 1, and Mode 2 Form 2.
2352 bytes
2340 bytes
2336 bytes
12 4 2048 288 bytes
CD-ROM Sector
Synchro- Header User
UserData
Date EDC/ECC etc.
ECD/ECC
Mode 1 nization
12 4 8 2048 280 bytes
CA-ROM XA
CD-ROM Sector Sub-
Synchro- Header header User Date
User Data EDC/ECCetc.
ECD/ECC etc.
Mode 2 Form 1 nization
12 4 8 2324 4 bytes
CD-ROM XA Sector Sub- EDC
User ECD
Synchro- Header header User Data
Date etc.
etc.
Mode 2 Form 2 nization
Header Subheader
Recurring 4 byes
MIN SEC FRAME MODE FN CN SM CI
FN CN SM CI
1 byte * FN:
CN:
FileNumber
File Number
CN: Channel
ChannelNumber
SM: Sub Mode
Number
SM: Sub Mode
CI: Coding Information
CI: Coding Information
Figure 2.5 CD-ROM and CD-ROM XA Sector Format
!! Mode 2 format without form specification cannot be used.
10
2.4.1 Header Field
The header field is composed of the sector address (absolute time) and mode byte.
The configuration of the header field is shown in Table 2.2.
A deviation may occur between the ATIME value of the subcode Q channel and
sector address inside the header. Therefore, the header value, not the subcode Q
channel, should be used when specifying a sector.
Table 2.2 Header Field Layout
Sector Byte # Value
12 minute
13 second
14 frame
15 mode
2.4.2 Subheader Field
A subheader has 8 bytes. Each byte of the file number, channel number, submode,
and coding information (total of 4 bytes) is written twice for data reliability.
(1) File Number
A file number is used to identify sectors belonging to one file which can be
interleaved with another file and recorded. The file number of each sector of a
logical file has the same value at this time. The file number is used for selecting
sectors belonging to identical files, as well as eliminating other files.
A list of restrictions according to file number values is shown below.
Table 2.3 File Number Restrictions
File No. Explanation
0 Used in the following files or areas:
• Files continuously being recorded on disc.
• Directory
• Other (Path Table, Volume Descriptor)
Cannot interleave with other files
1 to 255 Could be interleaved or continuous (is not clear if interleaved
with other files or not.)
Disc Format Standards Specification Sheet 11
(2) Channel Number
The channel number is used to identify sectors belonging to one channel within
a file.
Channel 1
(Picture)
Channel 2 Sector
(Japanese) J1 J2 J3 J4 J5
Interleave
Channel 3
(English) E1 E2 E3 E4 E5
Sector
J1 E1 J2 E2 J3 E3 J4 E4 J5 E5
Channel Number 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3
Figure 2.6 Sector Interleave by Channel Number
(3) Submode
Submodes are used in synchronization, ending files or records, and for sector
assignments in the system. The submode byte configuration is listed in Table 2.4.
Table 2.4 Submode Bit Configuration
Bit No. Bit Name Abbreviated
Value
7 End of File (EOF) 0
6 Real Time Sector (RT) 0
5 Form (F) 0
4 Trigger (T) 0
3 Data (D) 1
2 Audio (A) 0
1 Video (V) 0
0 End of Record (EOR) 0
End of File (EOF): Only the last sector of a file is set to 1.
Other sectors are set to 0.
Real Time Sector (RT): When this bit is 1, processing must be done
without interrupting the actual time process of
CD-ROM XA.
Form (F): Indicates recording has been performed per Form-1
at 0 and Form-2 at 1.
Trigger (T): Used for synchronization in applications
with various coding information.
12
Data (D): Set to 1 for sector data related to the program.
When this bit is 1, the Form bit must be 0.
Audio (A): The audio sector is set to 1.
When this bit is 1, the Form bit is also set to 1.
Video (V): The video sector is set for 1.
End of Record (EOR): 1 is set when the last sector of a logical record is
reached.
When bits 1, 2, and 3 (Video, Audio, Data) are used simultaneously, only one
can be set to 1. In addition, either bit 1, 2, or 3 must be set to 1 for all sectors,
excluding the empty sector.
(4) Coding Information
The coding information byte defines the details of the sector data type. This is not
defined in GAME-CD.
Disc Format Standards Specification Sheet 13
3.0 Logical Disc Format
3.1 Overview
The CD-ROM area and CD-ROM XA area are comprised of a system area and a data
area. To describe the disc volume/file structure, a volume descriptor set, directory,
and path table are recorded at the start of the data area (Figure 3.1).
The system area, volume descriptor set, root directory, and path table must be re-
corded on the Mode 1 track.
LSN 0 16
FAD 150 166
ATIME 00:02:00 00:02:16
Mode 1 Mode 2
Data Area
System File File
Area
Volume
Volume Root
BOOT Descriptor Path File File File
System Descriptor Directory Table 1 2 1
Set
Set
Record to
Record to Mode Track 1
Mode Track 2
Figure 3.1 Overview of CD-ROM and CD-ROM XA
Areas
14
3.2 Volume / File Structure
• Overview
The volume/file structure conforms to the ISO9660. Information is added to the
directory record system area.
• Abbreviations Express Types of Data
The following abbreviations are used for the volume/file structure.
Table 3.1 Abbreviations of Data ypes
T
Abbrev. Name Description
N Numeric Value 8 bit binary number
NL Least Significant Byte First LSBF notation 16/32 bit binary numeric
value Ex: recorded as hexadecimal 1234
→ 34 12
NM Most Significant Byte First MSBF notation 16/32 bit binary numeric
value. Ex: recorded as hexadecimal 1234
→ 12 34
NB Both-type orders LSBF notation + MSBF notation
Ex: recorded as hexadecimal 1234 → 34
12 12 34
ND Any digit from ZERO-NINE Numeric value in decimal notation
A A-characters ASCII character string (20-22/25-3F/41-
5A/5F)
D D-characters Directory character string (30-3F/41-
5A/5F)
DS D-characters, SEPARATOR 1, D-characters + ". ; " (2E/3B)
SEPARATOR 2
DE Directory Entry Directory Entry Format
A1 A1-characters A-characters + Kanji
D1 D1-characters D-characters + Kanji
D1S D1-characters, SEPARATOR 1, D1-characters + ". ; " (2E/3B)
SEPARATOR 2
00 Zero fill Not used. Fill the reserve areas, etc., with
(00)
Disc Format Standards Specification Sheet 15
Volume Path Directory Block
Descriptor
Volume Table
Path (Directory
Directory BlockFile)
Descriptor Table (Directory File)
1 Route direct. Route direct.
f1
Self
Root Self
1 Route direct. Route direct.
f1
Directory
Self Self
Patent
• Path Table 2 Patent
Parent
=
Patent Self
Sub = Self
Parent
Patent
••Path Table
Path Table Address2 = Self
D==irectory
Self
Self = Self
• Path Table Address f1
3
3 f1
f2 f2
Path
PathTable
TableRecord
Record f2 f2
Sub-
Sub-
directory
n directory
n
Patent
Parent
Directory Number
Directory Number
Patent
f3 f3
• •Directory
DirectoryBlock
Block Addres
Address s
f 3f 3
• Parent Directory Number er
• Parent Directory Numb
• •Directory
DirectoryName
Name Sub-
Sub-
directory
directory
Sub-
Sub-
directory
directory
Patent
Parent
Patent
• File
• File StartStart Sector
Sector Address
Address
• Directory
• DirectorRecord
y Record • File SizeSize
• File
• File Name
• File Name
• System
• System Info.Info.
when in Mode
when 2 2
in Mode
(File(File
Number,
Number, Form Info.,Info.,
Form etc.)etc.)
Figure 3.2 CD-ROM (ISO9660) Data Configuration for File Management
• Volume Descriptor: Arranged from the start of the data area. Fixed length
by type.
• Path Table: Set of Path Table Records.
Path Table size and address are recorded in the volume
descriptor.
• Path Table Record: Corresponds to one directory (root, sub).
The record position is the directory number (1 to n).
Directory information is described in the directory block.
• Directory Block: Set of Directory Records.
A directory block is considered as one file (directory file.)
The size of the directory block is recorded in the directory
record file size of the block start (size of own directory file.)
• Directory Record: Corresponds to one file (including directory.)
16
3.2.1 Volume Descriptor Set
The volume descriptor set is a group of volume descriptors recorded in a sector from
logical sector number 16. The following are the five types of volume descriptors.
The volume section descriptors are not used.
Volume
Volume Descriptor
Descriptor Type
Type
Standard
Standard Identifier
Identifier
Volume
Volume Descriptor
Descriptor Version
Version Number
Number
1 2 77 88
CD001
CD001 Differsaccording
Differs accordingto to type
type of of descriptor
descriptor
88 39394040 7171
72 72 2048
2048
Boot
BootSytem
Sytem Boot
Boot Not
Without
Without
Boot Record 00 CD001
00 CD001 Identifier
Identifier Identifier
Identifier Description
Defined
Definition
Primary Volume
Descriptor
Boot Record 01 CD001
01 CD001 See
SeeTable
Table3.3
3.3
Supplementary
Volume
Primary Volume 02 CD001 See Table 3.4
Descriptor
Descriptor 02 CD001 See Table 3.4
Volume Section
Supplementary 03 CD001 Not used
used in
in Saturn
SATURN Game
Game DiskDisk
Descriptor
Volume 03 CD001 Not used in Saturn Game Disk
Descriptor
Volume Descriptor
Valume
SetDescriptor
Terminals FF CD001 00
Set Terminals FF CD001 00
Figure 3.3 Volume Descriptors
1. Boot Record
Table 3.2 Boot Record Configurations
Byte Position Type Field Name Description
1 N Volume Descriptor Type Volume descriptor type
2- 6 Standard Identifier "CD001"
7 N Volume Descriptor Version Version number
8 - 39 A Boot System Identifier Boot system identifier
40 - 71 A Boot Identifier Boot identifer
71 - 2048 Boot System Use Not defined
! In a normal Game-CD, the primary volume descriptor and volume descriptor set
! terminal are each recorded by 1 sector. These two sectors must be recorded.
!! The supplementary volume descriptor and boot record should be used after usage method
is well understood.
Disc Format Standards Specification Sheet 17
2. Primary Volume Descriptor
A volume descriptor set contains one primary volume descriptor, which
describes volume attributes, root directory position, positions of path tables set,
and others. Table 3.3 lists the details of a primary volume descriptor structure .
Table 3.3 Primary Volume Descriptor Structure
Byte Position Type Field Name Description
1 N Volume Descriptor Type Volume Descriptor Type = 01
2~6 Standard Identifier “CD001”
7 N Volume Descriptor Version Number
8 00 Unused Field
9~40 A System Identifier System using LSN 0~15
41~72 D Volume Identifier Volume Name
73~80 00 Unused Field
81~88 NB Volume Space Size
89~120 00 Unused Field
121~124 NB Volume Set Size Volume no. = 1 when in multi-
volume
125~128 NB Volume Sequence Number Ordinal number of volume logical
block length when in mulit-
volume
129~132 NB Logical Block Size
133~140 NB Path Table Size Bite number of total path table
141~144 NL Occurrence of LSBF listed Path Table position
Type L Path Table location
145~148 NL Optional Occurrence of Spare
Type L Path Table location
149~152 NM Occurrence of MSBF listed Path Table position
Type M Path Table location
153~156 NM Optional Occurrence of Spare
Type M Path Table location
157~190 DE Directory Record for Root Directory
191~318 D Volume Set Identifier General name when in multi-
volume
319~446 A Publisher Identifier
447~574 A Data Preparer Identifier Data Editor Identifier
575~702 A Application Identifier Identification related to data
usage method
703~739 DS Copyright File Identifier Abstract file name
740~776 DS Abstract File Identifier
777~813 DS Bibliographic File Identifier Number of book
814~830 ND Volume Creation Date and Time
831~847 ND Volume Modification Date & Time
848~864 ND Volume Expiration Date & Time
865~881 ND Volume Effective Date & Time
882 N File Structure Version Number of file configuration
883 00 Reserved for future standardization
884~1395 Application Use Conforms to CD-ROM XA
specification
1396~2048 Reserved for future standardization
The areas below are defined as disc labels with the CD-ROM XA standard.
Table 3.4 CD-ROM XA Disc Labels
Byte Position Type Field Name Remarks
1025 - 1032 Identifying Signature "CD-XA001"
1033 - 1034 CD-ROM XA Flags Reserved area
1035 - 1042 D Startup Directory Start up directory name
1043 - 1050 00 Reserved Reserved area
18
3. Supplementary Volume Descriptor
A volume descriptor set contains any number of supplementary volume descrip-
tors. The supplementary volume descriptor describes volume attributes, root
directory position, positions of path table set, and others. When using Japanese,
identifiers such as the volume name and publisher identifier are recorded in the
supplementary volume descriptor. Table 3.5 lists the details of a supplementary
volume descriptor.
Table 3.5 Supplementary V
olume Descriptor Structure
Byte Position Type Field Name Description
1 N Volume Descriptor Type
2~6 Standard Identifier “CD001”
7 N Volume Descriptor Version Number of version
8 Volume Flag
9~40 A1 System Identifier Using LSN 0~15
41~72 D1 Volume Identifier Volume name
73~80 00 Unused Field
81~88 NB Volume Space Size The number of sectors for total
volume.
89~120 00 Unused Field
121~124 NB Volume Set Size Volume = 1, when multi-volume
125~128 NB Volume Sequence Number Volume ordinal number when
multi-volume.
129~132 NB Logical Block Size Logical block length
133~140 NB Path Table Size Total number of path table bytes
141~144 NL Occurrence of LSBF listed Path Table position
Type L Path Table location
145~148 NL Optional Occurrence of
Type L Path Table location
149~152 NM Location of Occurrence of MSBF listed Path Table position
Type M Path Table location
153~156 NM Location of Optional Occurrence of Spare
Type M Path Table location
157~190 DE Directory Record for Root Directory
191~318 D1 Volume Set Identifier General name when multi-
volume
319~446 A1 Publisher Identifier
447~574 A1 Data Preparer Identifier Data editor identifier
575~702 A1 Application Identifier Identification related to the data
usage method.
703~739 D1S Copyright File Identifier Copyright File Name
740~776 D1S Abstract File Identifier Extra at (Summary) file name
777~813 D1S Bibliographic File Identifier
814~830 ND Volume Creation Date and Time
831~847 ND Volume Modification Date & Time
848~864 ND Volume Expiration Date & Time
865~881 ND Volume Effective Date & Time
882 N File Structure Version Number Number of version
883 00 Reserved for future standardization
884~1395 Application Use Not prescribed
1396~2048 Reserved for future standardization
Disc Format Standards Specification Sheet 19
3.2.2 Directory
The directory is recorded as one file composed of a number of directory records. Each
directory record is identified exclusively within the same directory through file identi-
fication.
File identification displays the filename or directory name and stores them as follows.
88characters
charactersor
orless
less
33 charcters
charactersororless,
less,can
canbebeabbreviated
abbreviated
1
1~~ 32767
32767 (Always
(normallyset
settoto1)1)
File Identification
File Identification File Name
File Name .Extension
Extension ; Version
Version Number
Number
Delimiter Charactor: 2
Delimiter Character 2
Delimiter Character 1 1
Delimiter Charactor:
Directory Name 8 characters or less
Directory Name-----8 (In
characters
the root or less
dictionary, 1 byte = $00H)
(In the root dictionary, 1 byte=00H)
• Directory Record Structure
Table 3.6 Directory Records
Byte Position Type Field Name
1 N Length of Directory Record
2 N Extended Attribute Record Length
3 - 10 NB Location of Extent (LSN)
11 - 18 NB Data Length
19 - 25 N Recording Date and Time
26 File Flags
27 N File Unit Size
28 N Interleave Gap Size
29 - 32 NB Volume Sequence Number
33 N Length of File Indicator
34 - (33+ D1S File Identifier:
LEN_FI) • File Name, Extension, Version Number
• Directory Name
34+LEN_FI 00 Padding Field
System Use
20
• Format of Recorded Date and Time
Table 3.7 Format of Recording Date andime
T
Relative Type Field Name
Byte
Position
1 N Number of years since 1900.
2 N Month of the year from 1 to 12.
3 N Day of the month from 1 to 31.
4 N Hour of the day from 0 to 23.
5 N Minute of the hour from 0 to 59.
6 N Second of the minute from 0 to 59.
7 N Offset from Greenwich Mean Time in
number of 15 minute intervals from
-48 (west) to +52 (east).
• File Flag
Table 3.8 File Flag
Bit Field Name Remarks
Position
0 Existence
1 Directory
2 Associated File (=0)
3 Record (extend attribute record
structure file)
4 Protection File (=0)
5 Reserved
6 Reserved
7 Multi-Extent File (=0)
• File Identification
Filename or directory name is stored according to the value of the File
Flag Directory bit (bit 1).
Directory bit = 0: Specifies identification information for file.
Table 3.9 File Identification
Directory
bit value Format Explanation
0 File name. Extension; Version number File name: 8 characters or less
Example: aaaaaaaa.bbb; Extension: 3 characters or less (can be omitted)
xxxxxx Version number: Normally set to 1
1 Directory name: 8 characters or less
Directory name In the root directory, 1 byte is 00H.
The length of the file identification is an even number; 1 byte (00H) is filled in.
Disc Format Standards Specification Sheet 21
• System Information
Extensions for ISO9660 Standard are shown in the tables below.
Table 3.10 System Information
Byte
Position Type Field Name Remarks
1- 4 NM Owner ID (or Group ID)
5- 6 Attributes Attribute bit
7 Signature byte 1 "X" ($58)
8 Signature byte 2 "A" ($41)
9 N File Number
10 - 14 00 Reserved Reserved Area
• Attribute bits
Table 3.11 Attribute bits
Bit
Position Field Name Description
0 Owner Read
1 Reserved
2 Owner execute
3 Reserved
4 Group read
5 Reserved
6 Group execute
7 Reserved
8 World read
9 Reserved
10 World execute
11 File contains Form 1 sectors Includes Form 1 sector
12 File contains Form 2 sectors Includes Form 2 sector
13 File contains interleaved sector Includes interleave sector
14 CD-DA file CD-DA file
15 Directory Directory file
3.2 (3) Path Table
A path table record is recorded for each directory except for modification of a root
directory. Path table records are assigned numbers starting from 1, and the first
record represents the root directory The table below details the Path Table Record.
Table 3.12 Path Table Records
Byte
Position Type Field Name Remarks
1 N Length of Directory Identifier Length of Directory Name
2 N Extended Attribute Record Length
3– 6 N Location of Extent LSN of start extent
7– 8 N Parent Directory Number Parent Directory Entry
Number
9 – (8+ D1 Directory Identifier Directory Name
LEN_DI)
9+LEN_DI 00 Padding Field Only when Directory Name is
an odd number.
22
3.3 User File
The user file is arranged in the data area. A single file is not necessarily organized
continuously, as it is generally interleaved. The Mode 2 sector mixes Form 1 and
Form 2 , and all sectors are converted to 2048 bytes. For convenience, the Mode 1
sector is handled in form as a Form 1 sector with a 0 subheader. Form 2 sector data
must be in 2324 byte units, fractional bytes are not permitted.
3.4 Other Items
1. Directory Structure
The SEGA SATURN Game-CD supports a sub-directory structure as well.
2. Multi-Volume
Not supported.
Disc Format Standards Specification Sheet 23
4.0 Boot System
This material provides rules that must be followed when application software uses
the boot system. CDs that do not follow these standards are not recognized as a
SATURN Game-CD. All application software run by the SATURN must follow these
standards.
This material is an extract of the disc format standard specification, and only par-
ticularly important information is listed. Be sure to read the contents of the disc
Format Standard Specification as well.
24
4.1 System Area
The system area is placed at the beginning of the CD-ROM. System information
used during application start-up is written in the system area.
The system information and the initial program must be placed continuously within
the system area as the IP. The IP consists of the boot code and application initial
program (AIP). The boot code includes ID data, such as the game name, and secu-
rity code. Code such as the initial program is contained in the AIP.
Table 4.1 IP Structure
Structure Size Remarks
System ID 100H Game title, product no., version, etc.
IP Boot Code Security Code D00H Security code
Area Code Group 20H ~ 100H Area code group
Application Initial Program 20 ~ 71E0H Initial program, file system, etc.
4.2 System ID
This data is placed at the start of the system area.
0 1 2 3 4 5 6 7 8 9 A B C D E F
00H Hardware Identifier
10H Maker ID
20H Product Number Version
30H Release date Device information
40H Compatible area symbols Space
50H Compatible peripherals
60H Game Title
70H
80H
90H
A0H
B0H
C0H
D0H Reserved
E0H IP Size Reserved Stack-M Stack-S
F0H 1st Read Address 1st Read Size Reserved Reserved
Figure 4.1 System ID Structure
Disc Format Standards Specification Sheet 25
4.3 Description of the System ID
Basic Information
Usable Characters
All of the characters that can be used within the System ID are ASCII code English
alphanumeric characters. However, “./-:” can be used depending on the item.
All upper case and lower case characters can be used if nothing is specified.
Entering Data
• Characters are left justified unless otherwise specified. No space is inserted at
the beginning.
• All empty areas are filled in with the ASCII "space" character code 20H unless
otherwise specified.
Expression definition: “ ∆” and/or spaces in the following descriptors are con-
sidered to be ASCII code 20H.
Other Rules
RESERVED areas must be filled in with 00H.
Description of Each Item
Hardware Identifier (Start address: 00H)
Definition: Unique ID for hardware.
Usable characters: Only upper case English characters.
Number of characters: 16 characters
Entry rules: “SEGA∆SEGASATURN∆” must be entered.
Maker ID (Start address: 10H)
Definition: Enter the maker ID specified by SEGA.
Usable characters: English alphanumeric characters only.
Number of characters: 16 characters.
Entry rules:
For SEGA brand: Fixed at 16 characters of “SEGA∆ENTERPRISES”
For 3rd party brand: “SEGA∆TP∆KAISHA-A” 16 characters
Unique company code given to all third parties is entered in
KAISHA-A.
Example: “SEGA∆TP∆T-999∆∆∆”
Standard: The underlined part above is entered as
left justified, the remainder is filled in with
spaces and must be 16 characters in total.
Product Number (Start address: 20H)
Definition: Enter the SEGA specified product number.
Usable characters: English alphanumeric characters only.
Number of characters: 10 characters.
Entry rules: A blank area is filled in with spaces.
Entry example: SEGA brand title: “GS-9099∆∆∆”
Third party title: “T-99901G∆∆”
26
Version (Start address: 2AH)
Definition: Enter the application version.
Usable characters: Upper case “V”, numbers, and “.” (period).
Number of characters: 6 characters
Entry rules: Must start with “V” followed by a 1 digit number, followed
by a “.”, and 3 digit numbers.
The final release is V1.000
Entry example: For a sample disc: “V0.801”
For a master disc: “V1.000”
Release Date (Start address: 30H)
Definition: Enter the creation date of the master disc (write-once disc)
Usable characters: Only numbers.
Number of characters: 8 characters
Entry rules: Must enter all 4 digits of the year; 2 digits of both the month
and date.
Entry sample: “19940912” (September 12, 1994)
Device Information (Start address: 38H)
Definition: Enter device information. For a CD, enter the page number
and the set number it belongs to.
Usable characters: English alphanumeric characters as well as “/” and “-”
Number of characters: 8 characters
Entry rules: A blank area is filled in with a space.
Entry sample: CD set of 1, 1st CD: “CD-1/1∆∆”
CD set of 3, 2nd CD: “CD-2/3∆∆”
Compatible Area Symbol (Start address: 40H)
Definition: Enter the area symbol of the region where the application is
to operate.
Usable characters: Only the upper case English alphabets specified below in the
character list.
Number of characters: 10 characters
Entry rules: May enter multiple characters. Area symbols are entered
closely, without spaces and commas in between. A blank
area is filled in with a space.
Enter:
• List of Area Symbols
Japan “J”
Asia NTSC (Taiwan, Philippines, Korea) “T”
North America (U. S., Canada, Central
South America (Brazil)) “U”
Europe PAL, East Asia PAL,
Central South America PAL “E”
Disc Format Standards Specification Sheet 27
Entry sample: For applications that run in Japan, Taiwan, Philippines, and
Korea (do not run in other regions): “JT∆∆∆∆∆∆∆∆”
Note: The area code that corresponds with the region entered here must be entered in the area
code group. (See “4.5 Area Code”)
Supplement: Hardware has "area symbols" information that differ
according to the sales region. The application starts
only when the “area symbol,” “area symbol within the
corresponding area symbol,” and “area code” match.
Compatible Peripheral (Start address: 50H)
Definition: Enter information of fully compatible input peripherals.
Usable characters: English alphanumeric characters only.
Number of characters: 16 characters
Entry rules: May enter multiple characters. Characters are not required
to be in order. Characters are entered closely, with no spaces
and commas inserted in between. A blank area is filled in
with a space.
• List of Characters
Control Pad “J”
Analog Controller “A”
Mouse “M”
Keyboard “K”
Steering Controller “S”
Multitap “T”
Entry sample: For applications that support the standard joy pad and
mouse: “JM∆∆∆∆∆∆∆∆∆∆∆∆∆∆”
Supplement: Plans to increase characters as the peripherals increase.
See section 2.3 Peripheral Compatibility in the SEGA SATURN Software Development
Standards document (ST-151-R3) for more details.
Game Title (Start address: 60H)
Definition: Enter the title of the game.
Usable characters: The game title uses English alphanumeric characters only.
A space can be inserted in the game title. “/-:” can be
used as a delimiter between titles when more than one title is
listed.
Number of characters: 112 characters
Entry rules: Titles can be multiple listed when names differ by sales area.
There are no detailed rules for multiple entries, but all
entries allow titles to be distinguished easily by looking at
the information part. A blank area is filled in with a space.
Entry sample: When there are multiple titles:
1) “TITLE1/TITLE2/TITLE3∆∆∆∆”
2) “J:TITLE1∆∆U:TITLE2∆∆∆∆∆∆”
28
IP SIZE (Start address: E0H)
Definition: Specifies the size (byte number) of the Initial Program (IP).
Size: 4 bytes.
Rules: AIP is placed immediately after the boot code, creating a
single file, and the size of the file is specified. Parameters
must be all long-word aligned (multiples of 4H).
Range: 1000 ~ 8000H
STACK-M (Start address: E8H)
Definition: Master-SH2 stack pointer address.
Default (0 specified) 6001000H ~ 6001FFFH becomes the stack area.
Rules: Parameters are all long-word aligned (multiples of 4H).
STACK-S (Start address: ECH)
Definition: Slave-SH2 stack pointer address.
Default (0 specified) 6000D00H ~ 6000FFFH becomes the stack area.
Rules: Parameters are all long-word aligned (multiples of 4H).
1st READ ADDRESS (Start address: F0H)
Definition: Transfer destination address of files transferred to the
WORK-RAM by the boot system while the SEGA logo is
being displayed.
Rules: Transfer is not performed when 0H.
The file identifier [2] file is transferred when the data is
transfered from a CD. Parameters must all be aligned in
long-word (multiples of 4H).
Range: Larger than (60020000H+IP SIZE), smaller than (6100000-4)
Supplement: See item “4.7 Application Initial Program and 1st READ
FILE.”
1st READ SIZE (Start address: F4H)
Definition: Ignored for CDs.
Rules: Parameters are all long-word aligned (multiples of 4H).
Disc Format Standards Specification Sheet 29
4.4 Security Code
The security code is placed immediately after the SYSTEM ID. Because the code is
provided in object code form from SEGA, IT MUST BE USED AS-IS WITHOUT
MODIFICATION. Content of the security code includes data, and programs dis-
playing the SEGA license information. Because an application that does not have
the correct security code is not recognized as a SEGA SATURN CD, the game will
not launch.
The filename of the security code found in the SEGA SATURN software Library is
underlined below.
\SATURN\SEGALIB\LIB\SYS_SEC.OBJ
4.5 Area Codes
Area codes are placed immediately after the security code. The code is provided in
object code form from SEGA, and it must be used without modification. There are
eight types of area codes for each of the hardware sales areas, but area codes corre-
sponding to the SYSTEM ID “compatible area symbols” must be entered. The entry
order for “compatible area symbols” and “area codes” do not have to match when
there are multiple listings.
The sizes of the various area codes are the same, enabling them to be easily changed.
A common disc can be created by linking multiple area codes. (See samples in the
appendix.)
An area code supplied filename within the directory after the software library disc is
installed is underlined below.
\SATURN\SEGALIB\LIB\SYS_ARE?.OBJ ; ? is the same character as the
compatible area
; 4 types exist
The relationship of the corresponding area symbol with the hardware sales region
and area codes are as follows.
Table 4.3 Area Code andArea Symbol Relation
Area Hardware Sales Region Area Code Filename
J Japan SYS_AREJ.OBJ
T Asia NTSC Region SYS_ARET.OBJ
U North America SYS_AREU.OBJ
E Europe PAL, East Asia PAL, SYS_AREE.OBJ
Central South America PAL
30
4.6 Application Initial Program
This program is executed immediately after the area code is executed by placing it
after the area code group. The program then advances under the control of the
application.
4.7 Application Initial Program and 1st Read File
Both are systems in which the boot ROM automatically transfers files from the CD-
ROM. By using this at the time of startup, a specified file can be transferred without
programming by application.
1st Read File
While the SEGA logo license is displayed (while executing the security code), the file
read by the boot system (file identifier [2]) is called the 1st Read File. Display of the
SEGA logo license continues until reading of the 1st Read File has ended. Conse-
quently, the display time of the SEGA logo license screen increases as the size of the
transfer file increases. The minimum display time is 2 seconds; the maximum is 3.5
seconds.
When the 1st Read Address is set, the 1st Read File is read but not executed. This
may not be specified, but to use time during SEGA Logo License display effectively,
its use is recommended.
Application Initial Program
By placing the file system within the program, access to the CD can be easily
achieved thereafter in file units. By skillfully using both, an efficient application can
be created.
TV Screen BOOT-ROM Process
Power ON
SYSTEM ID Chcek
I
SEGA SATURN Security Code Check
SEGA SATURN Logo I
Logo Display Process Area Code Check
I
IP Load
AIPLoading
AIP loaded
is being AIP
loaded
Security Code Reads the file of file
SEGA Logo Execution identifier [2], transfers to
I the transfer destination
Lincense of the SYSTEM ID
Area Code
Execution 1st Read Address
Application Application Initial Program Execution
Figure 4.1 Overview from when the power is turned on
Disc Format Standards Specification Sheet 31
4.8 IP Creation Method
• SYS_ID.SRC
This is an assembler source program for SYSTEM ID creation.
Change according to the application. (See “4.3 SYSTEM ID Description")
Be sure to place at the start of the program.
The file below is a sample source program:
\SATURN\SEGASMP\SYS\SYS_ID.SRC
• SYS_SEC.OBJ
Security code object file. (See “4.4 Security Code”)
Link and build as is.
• SYS_ARE?.OBJ
Area code object file. (See “4.5 Area Code”)
Link and build as is.
The files above are linked in the order of SYS_ID.OBJ, SYS_SEC.OBJ,
SYS_ARE?.OBJ . . ., to create SYS_IP.BIN. Please place this file in the CD
system area.
IP Placement
The IP size can be created within a range of the minimum sector and the maximum
16 sectors. If the required IP size is 8 sectors or less, multiple IPs can be recorded in
order to improve reliability. Make sure that each IP is at the starting sector bound-
ary. This increases the chances of startup even if a failure occurs when reading the
first sector.
32
APPENDIX Various Sample Code Listings
;=======================================================================
; smp_id0.src — System ID for SEGA (Ver. 1994-11-11)
;=======================================================================
.SECTION SYSID, CODE, ALIGN=4
;
.SDATA “SEGA SEGASATURN “ ;00: hardware identifier (cannot change)
.SDATA “SEGA ENTERPRISES “ ;10: maker ID
.SDATA “999999999 V1.000 “ ;20: product number, version
.SDATA “19941122CD-1/1 “ ;30: release date, device information
.SDATA “JTUE “ ;40: compatible area symbol
.SDATA “J “ ;50: compatible peripheral
.SDATA “GAME TITLE “ ;60: game title
.SDATA “ “ ;70:
.SDATA “ “ ;80:
.SDATA “ “ ;90:
.SDATA “ “ ;A0:
.SDATA “ “ ;B0:
.SDATA “ “ ;C0:
.DATA.L H’00000000, H’00000000, H’00000000, H’00000000 ;D0:
.DATA.L H’00001000, H’00000000, H’00000000, H’00000000 ;E0:
.DATA.L H’06010000, H’00000000, H’00000000, H’00000000 ;F0:
;
.END
;======== End of file ==============================================
Disc Format Standards Specification Sheet 33
;=======================================================================
; smp_id1.src — System ID for 3rd Party (Ver. 1994-11-11)
;=======================================================================
.SECTION SYSID, CODE, ALIGN=4
;
.SDATA “SEGA SEGASATURN “ ;00: hardware identifier (cannot change)
.SDATA “SEGA TP KAISHA-A “ ;10: maker ID
.SDATA “999999999 V1.000 “ ;20: product number, version
.SDATA “19941122CD-1/1 “ ;30: release date, device information
.SDATA “JTUE “ ;40: compatible area symbol
.SDATA “J “ ;50: compatible peripheral
.SDATA “GAME TITLE “ ;60: game title
.SDATA “ “ ;70:
.SDATA “ “ ;80:
.SDATA “ “ ;90:
.SDATA “ “ ;A0:
.SDATA “ “ ;B0:
.SDATA “ “ ;C0:
.DATA.L H’00000000, H’00000000, H’00000000, H’00000000 ;D0:
.DATA.L H’00001000, H’00000000, H’00000000, H’00000000 ;E0:
.DATA.L H’06010000, H’00000000, H’00000000, H’00000000 ;F0:
;
.END
;======== End of file ==============================================
;=======================================================================
; smpsys. lnk — SH Linkage Subcommand File for IP (Ver. 1994-11-11)
;=======================================================================
Input sys_id.obj
Input .. \ .. \segalib\lib\sys_sec.obj
Input .. \ .. \segalib\lib\sys_arej.obj
Input .. \ .. \segalib\lib\sys_aret.obj
Input .. \ .. \segalib\lib\sys_areu.obj
Input .. \ .. \segalib\lib\sys_aree.obj
Input .. \ .. \segalib\lib\sys_init.obj
Input smpsys.obj
STart SYSID (06002000)
Output
Print sys_ip.map
EXIT
;======== End of file ==============================================
34
;=======================================================================
; sample0.scr — CD-ROM (Ver. 1994-11-11)
;Note: CD-ROM (MODE1 + CD-DA) Disc Sample Script.
; Use Ver. 3.10 or later for versions VCDPRE and VCDBUILD.
; R: Required
; O:
; NC: No change, cannot change parameters (Please use without changing)
; CP: Can change parameters
;
; A command name heads the beginning of each line. Please use unchanged.
;=======================================================================
Define dirsmpdisc .\sample\ ; O CP
Disc sample0. DSK ;R CP
Session CDROM ;R NC
LeadIn MODE1 ;R NC
EndLeadIn ;R --
;
SystemArea [dirsmpdisc]sys_ip.bin ;R CP
;
Track MODE1 ;R NC
Volume ISO9660 sample0.PVD ;R CP
PrimaryVolume 00:02:16 ;R NC
SystemIdentifier “SEGA SEGASATURN” ;R NC
VolumeIdentifier “SAMPLE_GAME_TITLE” ;R CP
VolumeSetIdentifier “SAMPLE_GAME_TITLE” ;R CP
PublisherIdentifier “SEGA ENTERPRISES, LTD.” ;R CP
DataPreparerIdentifier “SEGA ENTERPRISES, LTD.” ;R CP
CopyrightFileIdentifier “SMP_CPY.TXT” ;R CP
AbstractFileIdentifier “SMP_ABS.TXT” ;R CP
BibliographicFileIdentifier “SMP_BIB.TXT” ;R CP
VolumeCreationDate 22/11/1994 00:01:02:00:36 ; O CP
VolumeModificationDate 22/11/1994 00:01:02:00:36 ; O CP
EndPrimaryVolume ;R --
EndVolume ;R --
;
File SMP_CPY.TXT ;R CP
FileSource [dirsmpdisc] smp_cpy.txt ;R CP
EndFileSource ;R --
EndFile ;R --
File SMP_ABS.TXT ;R CP
FileSource [dirsmpdisc]smp_abs.txt ;R CP
EndFileSource ;R --
EndFile ;R --
File SMP_BIB.TXT ;R CP
FileSource [dirsmpdisc]smp_bib.txt ;R CP
EndFileSource ;R --
Disc Format Standards Specification Sheet 35
EndFile ;R --
;
File FILE0.BIN ; O CP
FileSource [dirsmpdisc] file0.bin ; O CP
EndFileSource ; O --
EndFile ; O --
;
; File ~ EndFile ; O CP
;
PostGap 150 ;R NC
EndTrack ;R --
;
Track CDDA ;R NC
Pause 150 ;R NC
FileSource [dirsmpdisc] sound0.da ;R CP
EndFileSource ;R --
EndTrack ;R --
;
; Track ~ EndTrack ; O CP
;
LeadOut CDDA ;R NC
Empty 500 ;R NC
EndLeadOut ;R --
EndSession ;R --
EndDisc ;R --
;======== End of file ==============================================
36
;=======================================================================
; sample1.scr — CD-ROM XA (Ver. 1994-11-11)
;Note: CD-ROM XA (MODE1 + MODE2 + CD-DA) Disc Sample Script.
; Use Ver. 3.10 or later for versions VCDPRE and VCDBUILD.
; R: Required
; O:
; NC: No change, cannot change parameters (Please user without changing)
; CP: Can change parameters
;
; A command name heads the beginning of each line. Please use unchanged.
;=======================================================================
Define dirsmpdisc .\sample\ ; O CP
Disc sample1. DSK ;R CP
Session SEMIXA ;R NC
LeadIn MODE1 ;R NC
EndLeadIn ;R --
;
SystemArea [dirsmpdisc]sys_ip.bin ;R CP
;
Track MODE1 ;R NC
Volume ISO9660 sample1.PVD ;R CP
PrimaryVolume 00:02:16 ;R NC
SystemIdentifier “SEGA SEGASATURN” ;R NC
VolumeIdentifier “SAMPLE_GAME_TITLE” ;R CP
VolumeSetIdentifier “SAMPLE_GAME_TITLE” ;R CP
PublisherIdentifier “SEGA ENTERPRISES, LTD.” ;R CP
DataPreparerIdentifier “SEGA ENTERPRISES, LTD.” ;R CP
CopyrightFileIdentifier “SMP_CPY.TXT” ;R CP
AbstractFileIdentifier “SMP_ABS.TXT” ;R CP
BibliographicFileIdentifier “SMP_BIB.TXT” ;R CP
VolumeCreationDate 22/11/1994 00:01:02:00:36 ; O CP
VolumeModificationDate 22/11/1994 00:01:02:00:36 ; O CP
EndPrimaryVolume ;R --
EndVolume ;R --
;
File SMP_CPY.TXT ;R CP
FileSource [dirsmpdisc] smp_cpy.txt ;R CP
EndFileSource ;R --
EndFile ;R --
File SMP_ABS.TXT ;R CP
FileSource [dirsmpdisc]smp_abs.txt ;R CP
EndFileSource ;R --
EndFile ;R --
File SMP_BIB.TXT ;R CP
FileSource [dirsmpdisc]smp_bib.txt ;R CP
EndFileSource ;R --
EndFile ;R --
Disc Format Standards Specification Sheet 37
;
File FILE0.BIN ; O CP
FileSource [dirsmpdisc] file0.bin ; O CP
EndFileSource ; O --
EndFile ; O --
;
; File ~ EndFile ; O CP
;
PostGap 75 ;R NC
EndTrack ;R --
;
Track MODE2 ;R NC
PreGap 150 ;R NC
Extent ;R --
FileInterleave 1 3 ; O CP
File INTFILE0.BIN ; O CP
FileSource [dirsmpdisc] intfile0.bin ; O CP
EndFileSource ; O --
EndFile ; O --
EndFileInterleave ; O --
FileInterleave 1 3 ; O CP
File INTFILE1.BIN ; O CP
FileSource [dirsmpdisc] intfile1.bin ; O CP
EndFileSource ; O --
EndFile ; O --
EndFileInterleave ; O --
FileInterleave 1 3 ; O CP
File INTFILE2.BIN ; O CP
FileSource [dirsmpdisc] intfile2.bin ; O CP
EndFileSource ; O --
EndFile ; O --
EndFileInterleave ; O --
FileInterleave 1 3 ; O CP
File INTFILE3.BIN ; O CP
FileSource [dirsmpdisc] intfile3.bin ; O CP
EndFileSource ; O --
EndFile ; O --
EndFileInterleave ; O --
EndExtent ;R --
PostGap 150 ;R NC
EndTrack ;R --
;
Track CDDA ;R NC
Pause 150 ;R NC
FileSource [dirsmpdisc] sound0.da ;R CP
EndFileSource ;R --
EndTrack ;R --
38
;
; Track ~ EndTrack ; O CP
;
LeadOut CDDA ;R NC
Empty 500 ;R NC
EndLeadOut ;R --
EndSession ;R --
EndDisc ;R --
;======== End of file ==============================================
Disc Format Standards Specification Sheet 39
TM
Tone Editor
User's Manual
Addendum:
File Formats
Doc. # ST-235-030795
© 1995 SEGA. All Rights Reserved.
Tone Editor User's ManualAddendum:
File Formats
This supplement describes the SCSP file format on the Macintosh that contains
detailed information, and the SCSPBIN file format that only includes data trans-
ferred to the 68000's sound memory and the Macintosh file resource data.
SCSP Format
The SCSP format is as follows.
First, SCSP is entered as an ID in 4 bytes of ASCII code, after which the total number
of bytes of the MixerChunk and VoiceChunk is contained as a 4 byte long word. Next,
VOCE is entered in 4 bytes of ASCII code as Type. The MixerChunk and VoiceChunk
data follow.
48
MixerChunk
This data is equivalent to the 16 channels of the mixer, and becomes the MixerChunk
data with the header data. MIXR takes up 4 bytes in ASCII code for the header ID,
after which the number of mixer data bytes is entered in 4 bytes. It can have mul-
tiple mixers.
Mixer
Bits 0~4 are pan data and 5~7 are send/return data. This configuration is the same
as the SCSP register, and is equivalent to 100017H if slot 0.
Tone Editor User's Manual Addendum: 49
File Formats
VoiceChunk
The VoiceChunk data is composed of the layer data that contains voice parameter
data as well as PCM data. The VoiceChunk data is completed with the addition of
the header data.
VOCE takes up 4 bytes in ASCII code as the header ID. The total number of bytes for
the voice data, layer data and wave data (PCM data) are then entered in
4 bytes, after which the number of voices (number of voice patches) is entered.
50
Voice
PlayMode, bend range
This is voice data. The 16 bytes of ASCII code is used for the VoiceName data at the
beginning, and the data below follows.
• Play Mode: Specifies the poly, mono, legato, portamento, legato &
portamento play back mode.
• Bend Range: Specifies the pitch bend range up to 14 steps (0~$D).
• Portamento time: Specifies the time in 128 steps (0~$7F.)
• NumberOfLayers: Number of layers used in this voice.
• VolBias: Specifies the volume of the layer within the voice. It can be
specified as signed data.
• LayerName: Name of the layer that is being used.
• WaveNumber: The wave number used in this layer is entered here.
• WaveSize: The wave size used in this layer is entered here.
Tone Editor User's Manual Addendum: 51
File Formats
Wave
SamplingRate
• WaveName: The source AIFF file name incorporating this waveform
• SamplingRate: Sampling rate of this wavform.
• Bit: The bit resolution of this waveform (8 bits or 16 bits).
• PCM data: PCM data.
VLChunk
52
PEG Chunk
PLFO Chunk
Tone Editor User's Manual Addendum: 53
File Formats
SCSPBIN Format
The SCSPBIN format is as follows.
•Mixer top of fset: The offset address of mixer data start location.
• VL top offset: The offset address of velocity level conversion data start location.
• PEG top offset: The offset address of PEG data start location.
• PLFO top offset: The offset address of PLFO data start location.
• Voice offset: The offset address of each Voice data.
• Mixer data: Mixer data
• VL data: Velocity level conversion data
• PEG data: Pitch envelope data
• PLFO data: Pitch LFO data
• Voice data: Voice data
• Wave data: Wave data
54
Mixer Data 0
1 byte each, for
a total of 18 bytes
VL Data 0
1 byte each
PEG Data 0
1 byte each
PLFO Data 0
1 byte each
Tone Editor User's Manual Addendum: 55
File Formats
Voice Data 0
Number of layers- 1
*1: Layer Data
Base note
Wave Data 0
VL Conversion
Approximation value: This is the approximation value table number used for
velocity data. It is determined by calculating the velocity
points 0~3 and the velocity levels 0~3.
56
Calculation Method
The relationship between the velocity point and velocity level data is as shown be-
low. The curve of the levels is drawn as shown above for velocities 0~127. The D6-
D3 that is closest to one of the slope values out of these four curves is determined
from the table on the following page and entered in the Approximation Value Table.
The slope value is determined as follows.
Approximation value 0:
Velocity level 0
———————————————————————
Velocity point 0
Approximation value 1:
Velocity level 1 - Velocity level 0
———————————————————————
Velocity point 1 - Velocity point 0
Approximation value 2:
Velocity level 2 - Velocity level 1
———————————————————————
Velocity point 2 - Velocity point 1
Approximation value 3:
127 - Velocity level 2
———————————————————————
127 - Velocity point 2
Tone Editor User's Manual Addendum: 57
File Formats
Approximation aVlue Table
The bit relationship of the Approximation Value Table is as follows.
The following two tables are referred to when determining the D6-D3 value of the
Approximation Value Table.
The approximation values include ±∞, 1, 0 and the values indicated in the above
table. Determine a value that is closest to the actual slope in absolute difference
terms. The resulting D0-2 and D6-3 values are set as the approximation value.
58
PEG Related
OL: OFFSET LEVEL
AL: ATTACK LEVEL
DL: DECAY LEVEL
SL: SUSTAIN LEVEL
RL: RELEASE LEVEL
DT: DELAY TIME
AT: ATTACK TIME
DT: DELAY TIME
ST: SUSTAIN TIME
RT: RELEASE TIME
DLY:
This is the table number of the time table for the PEG delay time. The time table
contains the number of counts per time unit. The number of counts is first deter-
mined from the delay time input in the Tone Editor. That value is then compared
with the count values contained in the Time Table. A difference of the two values are
taken. The number of counts in the Time Table that produces the smallest difference
in absolute terms is determined and its Time Table number is set here.
Number of counts = delay time (msec. unit time)
OL:
This is the offset level from the key on note when the key is activated. (OFFSET
LEVEL)
AR:
This is the level change range per unit time.
=ATTACKLEVEL/AT
AT:
This is the time table number that is used for the attack level time. The time table
contains the number of counts per time unit. The number of counts is determined
first from the ATTACK TIME input in the Tone Editor. Then the closest number of
counts is obtained from a time table by the absolute difference of the two count
values.
The resulting value is set here.
Number of counts=ATTACK TIME/2 (msec)
Tone Editor User's Manual Addendum: 59
File Formats
DR:
This is the level change range per time unit.
=DECAYLEVEL/DT
DT:
This is the time table number that is used for the decay level time. The time table
contains the number of counts per time unit. The number of counts is determined
first from the DECAY time input in the Tone Editor. Then the closest number of
counts is obtained from a time table by the absolute difference of the two count
values. The resulting value is set here.
Number of counts=DECAY TIME(msec)
SR:
This is the level change range per time unit.
=SUSTAIN LEVEL/ST
ST:
This is the time table number that is used for the sustain level time. The time table
contains the number of counts per time unit. The number of counts is determined
first from the SUSTAIN time input in the Tone Editor. Then the closest number of
counts is obtained from a time table by the absolute difference of the two count
values. The resulting value is set here.
Number of counts=SUSTAIN TIME(msec)
RR:
This is the level change range per time unit.
=RELEASE LEVEL/RT
RT:
This is the time table number that is used for the release level time. The time table
contains the number of counts per time unit. The number of counts is determined
first from the RELEASE time input in the Tone Editor. Then the closest number of
counts is obtained from a time table by the absolute difference of the two count
values. The resulting value is set here.
Number of counts=RELEASE TIME(msec)
Delay:
This is the time table number that is used for the PLFO delay time. The time table
contains the number of counts per time unit. The number of counts is determined
first from the PLFO DELAY time input in the Tone Editor. Then the closest number
of counts is obtained from a time table by the absolute difference of the two count
values. The resulting value is set here.
Count value=PLFO DELAY TIME(msec unit time)
FRQ:
This is increment/decrement range per unit time of a PLFO triangle wave.
=DEPTH LEVEL/FRQ TIME (msec unit time)
FDR: This is the change range of the fade-in amplitude per unit time.
=DEPTH LEVEL/FADE TIME*2 (msec unit time)
FDT:
This is the time table number that is used for the fade-in time. The time table con-
tains the number of counts per time unit. The number of counts is determined first
from the PLFO FADE time input in the Tone Editor. Then the closest number of
counts is obtained from a time table by the absolute difference of the two count
values. The resulting value is set here.
Count value = PLFO FADE TIME (msec unit time)
60
TM
Boot ROM
User's Manual
Doc. # ST-079B-R3-011895
© 1995 SEGA. All Rights Reserved.
REFERENCES
In translating/creating this document, certain technical words and/or phrases were interpreted
with the assistance of the technical literature listed below.
1. KenKyusha New Japanese-English Dictionary
1974 Edition
2. Nelson’s Japanese-English Character Dictionary
2nd revised version
3. Microsoft Computer Dictionary
4. Japanese-English Computer Terms Dictionary
Nichigai Associates
4th version
Boot ROM
User’s Manual
Boot ROM User's Manual 1
TABLE OF CONTENTS
1.0 Introduction ................................................................................................... 3
2.0 Boot ROM Process Flow .............................................................................. 4
Process Flow ................................................................................................ 4
Precautions ................................................................................................... 5
Differences in the Product Version and Target Box Version .......................... 5
3.0 Boot ROM Functions .................................................................................... 6
SEGA SATURN Logo Display ...................................................................... 6
Game Startup ............................................................................................... 7
Service Program Information ........................................................................ 8
Executing the Multiplayer .............................................................................. 8
Changing System Settings ......................................................................... 11
4.0 Troubleshooting .......................................................................................... 12
Message Displays ...................................................................................... 12
Problems .................................................................................................... 12
5.0 Glossary ..................................................................................................... 14
2
1.0 Introduction
This manual explains the functionality of the SEGA SATURN boot ROM. Because the
boot ROM is incorporated in the SEGA SATURN hardware itself, it starts up auto-
matically when the unit is powered on or is reset.
After the SATURN's power is turned on or the reset button is pressed, the boot ROM
plays a role in determining its operation. Its main functions include displaying the
SEGA SATURN logo, booting up games, providing low-level services for applica-
tions, and executing the Multiplayer (also called the Audio CD Control Panel) that
plays various types of CDs.
Before the game begins, the boot ROM checks for a SEGA SATURN game disc and
determines if it is a standard SEGA SATURN game disc. See the DISC Format Stan-
dard Specifications (ST-040) document for more details on the standard SEGA SAT-
URN game disc format.
Refer to the System Program User’s Guide and the Backup Library User’s Manual in the
SATURN System Library User's Guide (ST-162-R1) for information on using the service
programs.
This manual supports the non-Japanese version of the SEGA SATURN boot ROM
(used in SEGA SATURN for North America NTSC, European PAL, Asian NTSC
countries other than Japan, etc.). Therefore, please be aware that certain boot ROM
functions described in this manual will operate differently on SEGA SATURN units
equipped with Japanese boot ROMs.
Boot ROM User's Manual 3
2.0 Boot ROM Process Flow
Process Flow
The game starts if the SEGA SATURN game disc is recognized while the SEGA
SATURN logo is displayed. The Multiplayer is executed if the SEGA SATURN game
disc is not recognized.
Power ON
or RESET
N
SMPC RESET?
Y
Set date and time
N Pressing
L and R buttons?
Y
System
Save datasettings
control
scr
screen
een
N Pressing
A button?
Game Y
cartridge?
N
SEGA SATURN logo
animation display
Y
GAME CD?
Multiplayer
GAME-CD GAME cartridge
starts starts
Figure 1. Overview of the boot ROM Process Flow
4
Precautions
• When a CD has not been inserted or if the CD door is open, the Multiplayer will
display the following:
• “Drive empty”
• “Drive door open”
• A game cartridge has priority of execution over the SATURN application CD-
ROM if one is inserted. To boot up the SEGA SATURN game disc, turn off the
power and remove the cartridge.
Differences in the Product Version and Target Box Version
• In addition to the functionalities of the boot ROM in the mass production version
of the SEGA SATURN, the target box version has functions for checking SCSI
devices and SIMM memory for debug support before starting the game. After
the SCSI devices and SIMM memory are checked and a file named IP.BIN is
found, startup of the game is continued. See the Simple CD Simulator User's
Manual (ST-161-R1) for more details.
• With the target box version, the game can be started from the write-once CD
without using the System Disc.
Boot ROM User's Manual 5
3.0 Boot ROM Functions
SEGA SATURN Logo Display
Hardware and initialization checks are performed before the SEGA SATURN logo is
displayed, while a SEGA SATURN game disc check is performed while the logo is
being displayed. The game starts if the disc is recognized as a SEGA SATURN game
disc. The Multiplayer is executed if the SEGA SATURN game disc is not recognized.
After resetting the SMPC, the SEGA SATURN logo is displayed after the Set Clock
screen appears. Press the RESET button while pressing the A button to skip the logo
animation and to go directly to the Multiplayer. Press the RESET button while
pressing LEFT or RIGHT on the Control Pad to skip the logo animation and to go
directly to the System Settings screen. Press any button to skip the logo animation
and to go directly to the game.
Precautions Concerning the Memory Manager Screen
• Because initialization is done automatically when first using the SEGA
SATURN's internal backup RAM, select “Clear” to delete all data or when data
cannot be loaded.
• The following messages indicate that the SEGA SATURN’s backup RAM has
failed. For more information, please call SEGA Developer Technical Support in
your area.
• “Not cleared!”
• “Not removed!”
• Do not turn off the power while initializing, deleting, or copying backup
memory. Data may be destroyed if the power is turned off during those opera-
tions. Perform initialization of backup memory if data cannot be loaded.
• Delete Screen (as described in the SEGA SATURN instruction manual.)
No.: Data number.
Name: Data name on the backup RAM. An abbreviation of the game's name
is written automatically.
! These functions below are not handled by the boot ROM. Please handle them separately
within each application.
Comment: Comments for backup data.
Memory used: Amount of memory used by all data in backup RAM.
Memory available: Amount of available memory in backup RAM.
The data above can be scrolled through by pressing up or down on the D-Pad.
6
Game Startup
In order to prevent unauthorized and illegal production and sale of game software,
the SEGA SATURN game disc is checked to see whether it has a boot code before the
game begins. Be sure to insert the boot code in the designated location of the SEGA
SATURN game disc. The game will not start if the boot code cannot be recognized.
The content and preparation of the boot code are explained in the DISC Format
Standard Specifications (ST-040) document.
Starting the Game(as explained in the SEGA SATURN Instructional Manual)
1. Turn on the television.
2. Set the television to external video input mode.
3. Press the OPEN button to open the CD door.
4. Place the SEGA SATURN game disc label side up into the SEGA SATURN CD
unit.
5. Close the CD door.
6. The game automatically begins when the power button is pressed.
Quitting the Game(as explained in the SEGA SATURN Instructional Manual)
1. During the game or after the game has ended, press the RESET button while
pressing the A button. The Multiplayer screen will appear after the SEGA logo.
2. Press the OPEN button to open the CD door
3. Turn off the SEGA SATURN power.
4. Unplug the power cable from the outlet.
Returning to the Title Screen of the Game
To return to the title screen during a game, press the A, B, and C button along with
the START button.
! This function is not handled by the boot ROM. Include this feature within each application.
Boot ROM User's Manual 7
Service Program Information
System Programs
The services below can be used by the application. These service programs must be
used when performing these tasks.
• Setting up and referencing the interrupt processing routine.
• Setting, referencing, and modifying the SCU Interrupt mask status.
• Simple semaphoring.
• System clock change
• SCU interrupt routine priority change.
• CD Multiplayer execution.
• Power-on memory initialization.
For more information, see the System Program User’s Manual of the SATURN System
Library User’s Guide (ST-162-R1).
Backup Library
A search and read/write functions to a backup memory device are provided by the
Backup Library. This library must be used when accessing the internal backup
RAM. (Currently, the library must also be used to access external backup RAM
devices. Additional libraries will be distributed by SEGA for accessing external
memory devices that may be released in the future.)
For more information see the Backup Library User’s Manual of the SATURN System
Library User’s Guide (ST-162-R1).
Executing the Multiplayer
When the Multiplayer is started, user-interface function buttons are displayed on the
screen. Operation of the Multiplayer is done with a SEGA SATURN input periph-
eral, such as the standard SEGA SATURN Control Pad.
How to Operate the Control Pad
The functions of each button on the Control Pad are explained below. The X, Y, Z,
LEFT, and RIGHT buttons are used to control the playback of music CDs.
• D-Pad: Highlight and Move cursor
• Start button: Start the game
• A button: Select
• B button: Cancel
• C button: Select
• X button: Repeat one song
• Y button: Stop
• Z button: Play / Pause
• LEFT: Skip backward (song skip & search)
• RIGHT: Skip forward (song skip & search)
Note: To skip one song, briefly press LEFT or RIGHT on the Control Pad. To perform a search,
press and hold down LEFT or RIGHT on the Control Pad.
8
Buttons for Basic Controls
1 2 3
4 5 6
7 8 9
1. Multi-Button
The Saturn button (the button icon resembles the planet Saturn) is displayed
when a SEGA SATURN CD is inserted.
2. System Settings
The System Settings screen for managing global system functions is displayed
when this button is pressed.
3. Hide Controls button
Pressing this button replaces the Multiplayer control panel with the background
screen (screen saver). (CD+G graphics are displayed instead of the background
screen if a CD+G disc is being played.)
4. Skip Backward button (song skip & search)
Skips a song in the reverse direction when pressed briefly. Scans through a song
backwards when pressed and held.
5. Play / Pause button
6. Skip Forward button (song skip & search)
Skips a song in the forward directions when pressed briefly. Scans through a
song forwards when pressed and held.
7. Repeat button
Cycles through Repeat One Song, Repeat All Songs, and Cancel Repeat settings.
8. Stop button
9. Advanced Controls button
Switches between the Basic Controls and the Advanced Controls user interfaces.
Boot ROM User's Manual 9
Buttons forAdvanced Controls
1 2 3
4 5 6
7 8 9
1. Adjust Vocals button
2. Program Sequence button
3. Adjust Surround Effect button
4. Scan Intros button
When this button is set, all songs are successively played from the start for 10
seconds.
5. Show Time button
This button switches the time display of the Multiplayer screen.
6. Shuffle Tracks button
When this button is set, songs on the CD are played in a different sequence.
7. Clear All Settings button
Cancels all functions set by the operation buttons.
8. Repeat A-B button
9. Basic Controls button
Note: The following button pairs may not be used simultaneously: Program Sequence/Tracks,
Repeat A-B/Scan Intros, Adjust Surround/Adjust Vocals. The settings of one button will
always override those made with the other button in the pair.
Mute Vocals
The Mute Vocals (voice cancellation) feature reduces the audio volume of vocals by
decreasing the center channel volume of a stereo recording. This feature will not
eliminate vocals completely. Because the audio volume of the entire song is de-
creased, voice cancellation is not recommended for songs recorded in mono. Even if
a recording is in stereo, the voice cancellation effect is generally not effective on folk
music, spoken word performances, classical music, duets, songs with strong chorus
or echo effects, and songs in which the singer's voice is not positioned in the center
channel of the stereo audio mix.
10
Changing System Settings
It is possible to change System Settings on the SEGA SATURN such as the internal
clock and the Multiplayer's language display.
Date and Time Settings
Menu items on the Set Clock screen can be selected by pressing LEFT or RIGHT on
the Control Pad, and changed by pressing UP or DOWN on the D-Pad. To change
the time and date and return to the System Settings screen, select “Exit” and press
the C button.
! The application may utilize the clock data set by the user, but the application itself must not
change the settings. Only the user may change the clock settings from the Set Clock menu
screen.
Language Settings
The display language on the Multiplayer screen can be selected from the following
six languages: English, German, French, Spanish, Italian, and Japanese.
! For applications that support multilingual operation, the default language used by the applica-
tions is determined from the language selected by the user in the Set Language menu screen.
When there is a function that lets the user change the language setting within an application,
settings must be changed so that the setting will be reflected in the Multiplayer's System
Settings.
Help Window Settings
Selects whether or not to display help windows in the Multiplayer screen.
! Help window settings may not be referred to and changed from the application.
Audio Output Settings
Enables switching between stereo and mono audio output of music CDs, CD+G and
CD+EG discs.
! The default audio output setting for applications that must be selected from the user Audio
Output setting. When there is a function in which the user may change the audio output
setting within the application, the user setting must be reflected in the Multiplayer's Audio
Output System setting as well.
Sound Effects Settings
Turns the sound effects ON/OFF in the Multiplayer screen.
! The sound effect setting cannot be referred to and changed from the application.
Boot ROM User's Manual 11
4.0 Troubleshooting
Message Displays
• “Game disc unsuitable for this system”
This message appears if a non-SEGA SATURN CD is inserted in the SEGA
SATURN. Be sure to check the type of CD being used. (The disc may still be
used as an audio CD if audio data is present.)
This message may be displayed if the data side of the CD (side on which the
game name is not printed) is dirty. In such cases, use a soft, dry cloth to remove
dirt from the data side of the disc.
• “Disc unsuitable for this system”
This message is displayed if the inserted CD has no music data. Be sure to
check the type of CD being used.
• “Drive empty”
This message is displayed when a CD has not been inserted, the CD is damaged,
the CD is inserted upside down, or the type of CD inserted cannot be recognized
by the SEGA SATURN. In cases like these, check the type of CD being used.
• “Game cartridge unsuitable for this system”
Displayed when a non-SEGA SATURN cartridge is inserted in the SEGA
SATURN. Be sure to check the type of cartridge being used.
Troubleshooting Tips
• The Multiplayer screen does not appear
.
Make sure the game cartridge is not plugged into the cartridge slot.
• The SEGA SATURN CD game won’t start.
Is the disc upside down?
Is the disc dirty?
Are there scratches on the disc?
• CD, CD+G, CD+EG audio output is in mono.
Is the Audio Output setting on mono (when using the SEGA SATURN stereo
AV cable or SEGA SATURN S-video cable)?
• The set clock screen always appears when the power is turned on. Data saved in the
SEGA SATURN's internal backup RAM is gone.
Was the lithium battery installed properly?
Is the lithium battery dead?
• The power LED does not turn on immediately after the power button is pressed.
The power LED may take 1 or 2 seconds to turn on. This is normal for the
SEGA SATURN.
12
• The SEGA SATURN game disc will not start up.
Be sure to include the boot code in the designated location of the SEGA SATURN
game disc. If the boot code cannot be recognized, the game will not start up. See
the Disc Format Standard Specifications (ST-040) document for more details.
• The SEGA SATURN game disc starts up, but does not operate with the mass-production
SEGA SATURN.
The problem is one of the following:
1) The boot code has not been included on the disc..
2) A System Disc is not being used.
The game will not operate if the maker ID is not correctly entered on the disc.
For more information, see the Disc Format Standard Specifications (ST-040)
document.
! If there is something wrong with the operation of the SEGA SATURN (besides what is listed
above), press the RESET button or turn the power button off and on. If this does not help,
remove the battery cover and press the master reset switch. (If this is done while game data is
being saved, the data may be lost instead of being saved.)
The function of the target box POWER ON RESET switch is somewhat different than a
normal power on/off cycle. If the POWER ON RESET switch does not work properly,
press the power button off and on.
The target box master reset switch is the SMPC RESET switch.
! If the system still does not run normally after the operations above are performed, remove
the power cable from the electrical outlet and contact SEGA Developer Technical Support for
assistance.
Boot ROM User's Manual 13
5.0 Glossary
Term Meaning
CD-DA This format is used to describe a typical commercially available
music CD with pre-recorded digital audio data.
CD+G This CD format standard uses subcode data on the disc to display
text and graphics on a TV that is synced to music. Karaoke CD
systems that are capable of displaying, simple graphics and lyrics
on the TV screen use this CD+G format. The graphics resolution
supported by the CD+G format is 288H x 192V pixels. Up to 16
colors from a palette of 4096 colors may be used simultaneously.
CD+EG This format is an improvement over the CD+G format. Two
separate 256-color screen areas may be displayed simultaneously.
In addition, special video effects, such as cuts between 2 frames
and screen fade-in, are possible with this format.
14
TM
SATURN
Virtual CD System
User's Manual
Doc. # ST-129-R2-093094
© 1994-95 SEGA. All Rights Reserved.
REFERENCES
In translating/creating this document, certain technical words and/or phrases were interpreted
with the assistance of the technical literature listed below.
1. KenKyusha New Japanese-English Dictionary
1974 Edition
2. Nelson’s Japanese-English Character Dictionary
2nd revised version
3. Microsoft Computer Dictionary
4. Japanese-English Computer Terms Dictionary
Nichigai Associates
4th version
SATURN
Virtual CD System
User’s Manual
Introduction .......................................................................................................3
Overview of CD Emulation System Configuration and Functions ..................... 3
About this Manual ............................................................................................. 4
Section I: VCD I/F Board...................................................................... 5
1.0 Main Functions ......................................................................................... 5
2.0 Data Transfer Speed ................................................................................ 5
3.0 Setting the Jumper Pins ........................................................................... 6
4.0 Installation and Setup for PC-Compatibles .............................................. 7
5.0 Execution Using Sample Data ................................................................. 8
6.0 Switching Between the Virtual CD and the CD Drive .............................12
Section II: CD Emulation Software ...................................................... 13
1.0 Overview of CD Emulation .....................................................................14
1.1 Summary of the Virtual CD Emulator ...............................................14
1.2 Work Flow Summary ........................................................................16
2.0 The CD Emulation Process Explained ...................................................19
2.1 Running a Simulation Using MS-DOS Files .....................................21
2.2 When Creating Disc Images ............................................................22
2.3 Updating Part of a CD Image ...........................................................23
3.0 Creating Data .........................................................................................24
3.1 Determining Disk Configuration .......................................................24
3.2 Script Command Reference .............................................................36
4.0 Emulator Displays ..................................................................................51
4.1 Log Window .....................................................................................52
4.2 Menu Screen Functions ...................................................................53
5.0 Resource Notes ......................................................................................56
5.1 Directory Structure ...........................................................................56
5.2 Release Program .............................................................................56
5.3 Sample Data ....................................................................................67
Index................................................................................................. 70
SATURN Virtual CD System User's Manual 1
(This page was blank in the original Japanese document.)
2
Introduction
Overview of CD Emulation System Configuration and Functions
The CD-ROM emulation system configuration is shown in Figure 1.
CD-ROM Emulation System
Virtual CD Target Box
CD Block
Main System
Board
VCD I/F CD System
Board
PC
Compatible
CD Drive
Figure 1 System Configuration
CD Emulation System
The CD emulation system consists of the Virtual CD system and a SEGA SATURN
target box. This system enables the emulation and testing of CD-ROM software
operations and verifies the operation of write-once disks that have been created.
Virtual CD (VCD)
After receiving commands from the CD Block, the VCD reads data from MS-DOS
files on the local hard disk or on a network and performs emulation. Hardware
consists of a PC-compatible computer and a VCD Interface (I/F) board. CD Emula-
tion on the PC completes the VCD system.
CD Block
The CD Block is located between the Virtual CD and the main system board and
contains the hardware and firmware that receives input from the target box, trans-
mits commands to the PC and handles data back from the PC.
VCD I/F Board
The VCD I/F Board is installed in the PC’s expansion slot and acts as the interface
between the CD Block and the PC itself.
SATURN Virtual CD System User's Manual 3
About this Manual
This manual consists of two sections. The first explains the VCD system setup; the
second explains the CD emulation software.
The VCD system setup section explains how to install the VCD Interface board in a
PC compatible computer. The CD emulation software section describes the proce-
dures required for emulation work.
A basic knowledge of PC compatible computers is required to install the VCD I/F
Board in a PC compatible. A basic knowledge of MS-DOS and CD-ROM specifica-
tions are required to run the CD emulation software.
4
Section I: VCD I/F Board Main Functions
The VCD I/F Board (RT-V1A) is an ISA expansion board for PC-compatible ma-
chines that handles transfers of commands and messages between PC-compatible
computers and the CD Block (RT-V1B) within a target box, sends CD-ROM data
from PC-compatible machines to the CD Block, and transfers CDDA data and other
types of CD-ROM data.
1.0 Main Functions
• Communicating with the CD Block
Receives commands from the CD Block, performs the appropriate processing,
and returns status data to the CD Block.
• Communicating with PC-compatibles
Fetches commands required by the PC-compatible from commands in the CD
Block and sends them. The PC in turn returns the data required by these com-
mands.
• Receiving Data from the PC
When a Play command is sent to the PC, the PC prepares CD-ROM data, CDDA
data or, if necessary, R~W subcode data. The VCD I/F Board receives this data
via the on-board DMA controller.
• Sending data to the CD Block
Scramble processing is preformed on the data from the PC, and the data is then
converted into serial data. This serial data is sent to the CD Block.
2.0 Data Transfer Speed
Two transfer speeds, normal speed and double speed, can be set for CD-ROM data
transfers. The transfer speed is set by commands sent from the CD Block.
SATURN Virtual CD System User's Manual 5
3.0 Setting the Jumper Pins
The VCD I/F Board has four jumper pins:
• ISA-IRQ setting (J3) • ISA-DMA setting (J4)
• I/O address setting (J5) • Diag setting (J6)
If the IRQ, DMA, and I/O address settings above conflict with those already set on
your PC, the Virtual CD may not start or the PC may hang up.
Be sure to fully understand each PC setting before changing the VDP I/F board
settings, and then change the board settings only if the default settings would cause
problems—for example, if the settings conflicted with those of the SCSI board DMA
channel. In such a case, the system configuration parameters would also need to be
modified. However, if the board is installed with default settings set at the factory,
the system configuration parameters do not need to be changed. For more informa-
tion on system startup procedures, see section 5.1, Preparing to Start.
1) ISA-IRQ Setting (J3)
Interrupt request numbers for the PC are selected via jumper pin settings. The de-
fault is set to IRQ10.
Pin 1-2 IRQ4(00)
Pin 3-4 IRQ3(01)
Pin 5-6 IRQ10(02)
Pin 7-8 IRQ11(03)
Pin 9-10 IRQ12(04)
Pin 11-12 IRQ15(05)
2) ISA-DMA Setting (J4)
The DREQ and DACK signal numbers for transfers between the PC and DMA are
also selected via jumper pin settings. The default is set to DREQ5/DACK5.
Pin 1-2 & 3-4 DREQ5/DACK5(00)
Pin 5-6 & 7-8 DREQ6/DACK6(01)
Pin 9-10 & 11-12 DREQ7/DACK7(02)
3) I/O Address Setting (J5)
The I/O address of the VCD I/F Board is selected in a simular manner. The default
is set to 340H.
Pin 1-2 & Pin 3-4 & Pin 5-6 340H(00)
Pin 3-4 & Pin 5-6 350H(01)
Pin 1-2 & Pin 5-6 3E0H(02)
Pin 5-6 300H(03)
Pin 1-2 & Pin 3-4 310H(04)
Pin 3-4 320H(05)
Pin 1-2 330H(06)
Open 370H(07)
(J6) Diag setting function of (J6) is used at the factory during manufacturing. This
is left open.
6
4.0 Installation and Setup for PC-Compatibles
1) Items Required for Installation
One PC-compatible computer for the Virtual CD system with the following recom-
mended specifications is required:
• 486/33 MHz or greater,
• Memory: 8 MB or greater,
• Expansion Slot: ISA bus 3 slots or more (minimum),
• Video memory: 512 KB or greater,
• FDD: 3.5" X 1,
• SCSI board: Adaptec AHA-154xCF,
• HDD (1.2 GB or greater): DEC. DSP3210/DSP3107L
Note: XMS memory must be used in order to process a large number of files. Be sure to
specify HIMEM.SYS in CONFIG.SYS.
• VCD I/F card (RT-V1A)
• VCD I/F cable
• SEGA SATURN Programming Box
• SH-2 ICE
2) Setup
Unpack the VCD I/F card (RT-V1A) and insert it in the expansion slot of the PC-
compatible.
Connect the VCD I/F Board connector and the Virtual CD I/F connector of the
SEGA SATURN Programming Box with the accessory VCD I/F cable. Set up the
Programming Box and ICE according to the instructions contained in each
equipment's instruction manual.
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5.0 Execution Using Sample Data
This chapter describes how to check the operation of the Virtual CD Emulator that
has been set up. The following conventions are used:
• “[RET]” means to enter a return on the line.
• ∆ means to insert a space.
Step 0-a
Install the VCD I/F Board in a PC before proceeding. Check the settings on the
following jumpers and write them down for later reference:
• IRQ jumper setting (J3)
• DMA jumper setting (J4)
• I/O jumper setting (J5)
When there is already a VCD I/F Board installed in the system, Step 0-b is per-
formed. In such cases, Step 1 from the environment settings may not be necessary.
Read the explanation of Step 1.
Step 0-b
Turn on the power to the PC-compatible and wait for MS-DOS to boot. When MS-
DOS boots up, the MS-DOS prompt will appear. Go on to the next step after MS-
DOS starts up.
5.1 Preparing for Startup
For Users of Japanese DOS/V Only
The operation of the VCD software cannot be performed in Japanese MS-DOS mode,
so set DOS to English mode. U.S. MS-DOS users can skip to the VCDIO setting step.
Please type in the following command:
Step 1
C:\>CHEV∆US[ENTER]
After the command is entered, the screen clears and a prompt will appear at the top
of the screen.
Next, set the system configuration parameter VCDIO. If the VCD emulator has
already been used on the PC, this variable may be set automatically when MS-DOS
boots up, so check to see whether it has already been set up. If the environment
variable is already set, stop this procedure and go to step 3.
The value of the environment variable VCDIO must reflect the setting of the VCD I/
F Board, as explained earlier in section 3.0, Setting the Jumper Pins. This example sets
the default value of the VCD I/F Board.
8
Type the following MS-DOS command:
Step 2
C:\>SET∆VCDIO=020000[ENTER]
The Virtual CD Emulator will not operate normally if the PC configuration conflicts
with the VCD I/F Board. Depending on the situation, the PC-compatible may hang
up.
The value of the environment variable changes when a jumper setting value other
than the default is used. However, the default setting may need to be changed on
the PC. For example, do the following to set the interrupt number to 01, the DMA
transfer channel number to 02, and the VCD I/F Board I/O address to 03.
C:\>SET∆VCDIO=010203[ENTER]
Next, install the sample program that accompanies the Virtual CD Emulator on the
PC compatible.
Step 3
First, a directory is created.
C:\>MD∆MYDIR[ENTER]
C:\>CD∆MYDIR[ENTER]
The files in Disk 1 are copied into the directory.
C:MYDIR>COPY∆A:*.*[ENTER]
Sound data is generated using the sample data generator utility VCDMKDAT.
C:MYDIR>VCDMKDAT[ENTER]
The two sound data files used in the following check are created in the MYDIR
directory.
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5.2 Start and Quit
Once the Virtual CD Emulator starts, enter the following commands:
Step 4
C:MYDIR>VCDEMU∆JVC[ENTER]
The Virtual CD Emulator is launched and the screen is displayed.
Specified disk image files, CD structure data files, script files, and log data file
names are displayed on the screen. “No Log File” is displayed when no log data file
is specified. The Virtual CD Emulator at this point waits for key input for user
confirmation of the message. Pressing a key allows you to proceed to the next step.
Step 5
Press ENTER or ESC.
The program begins reading the files needed for execution. If read correctly the
following is displayed.
[Result] Open New File = ****.dat
All Data has been Read
PAUSE2
“Direct” should be seen in the display of the dialog box operation mode in the upper
right of the screen, meaning that the “Direct DOS File Access” operating mode is in
effect. Work is done on the target box from this point.
Step 6
Launch the SATURN program from the ICE.
• Insert Disk 1 into Drive A of the PC that controls the ICE.
• Halt the ICE by pressing CTRL-C, and reset with the following commands:
:rs[ENTER]
:g[ENTER]
• Wait a moment after the SEGA SATURN logo display is finished.
:ctrl-C
• Load the program.
:<A:JVC1.INI[ENTER]
• Run the program.
:g∆6002000
Step 7
Check to make sure that the program starts normally, and that "VIRTUAL CD
CHECK PROGRAM" is displayed on the SATURN's screen.
Step 8
Operate the pad according to the instructions displayed on the screen and make sure
that the CDDA playback demo finishes properly.
10
How to Quit
Step 9
Press the SPACE key. “Menu” in the top bar is highlighted.
"Menu" and "Help" can be highlighted by entering the LEFT or RIGHT cursor keys.
Highlight the "Menu" item.
Step 10
Press ENTER or the cursor DOWN key.
Step 11
Use the DOWN key to highlight “Exit” in the menu (last item).
Step 12
Press the ENTER key to Quit the Virtual CD Emulator.
SATURN Virtual CD System User's Manual 11
6.0 Switching Between irtual
V CD and CD Drive
To make it possible to switch between the Virtual CD and the CD drive, a switch like
the one shown in Figure 1 has been placed between the CD Block and the CD drive.
When operating this switch, the CD trays of both the Virtual CD and the CD drive
must be in the open CD tray state. Use the Virtual CD Emulator menu item to set the
Virtual CD in the open CD tray state.
• Press the SPACE key.
• Make sure that “Menu” in the menu bar is highlighted. The menu appears when ENTER or the
DOWN cursor key is pressed.
• Set the Virtual CD to the "Open CD Tray" state by selecting the “Open CD Tray” and pressing
ENTER or SPACE.
If the switch is used without performing this operation, the track information stored
in the target machine will be inconsistent with that of the CD drive (VCD).
12
Section II: CD Emulation Software
This section describes how to use the CD emulation software, which is the applica-
tion software that operates on a PC-compatible computer.
This section provides a simple explanation of the CD emulation system and de-
scribes the role of the CD emulation application software that runs on PC-compat-
ible computers.
Chapter 1 describes the general work flow of the emulation operation. Chapter 2
gives more detailed information on using emulation with three different types of
emulation models, each of which is described separately. Chapter 3 explains how to
use a script to place data on a CD. Finally, chapter 4 describes the contents of the
Virtual CD emulation screen.
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1.0 Overview of CD Emulation
1.1 Summary of VCD Emulator Functions
The VCD emulator is an MS-DOS program that runs on PC-compatible computers.
By communicating with the VCD I/F Board inserted into the expansion slot of a PC
compatible, the emulator receives CD access instructions sent from the target box,
accesses MS-DOS files according to the instructions, and emulates access to the CD
drive.
The following list summarizes the VCD emulator functions:
• MS-DOS file data Virtual CD playback emulation
• Game-CD disk image production
• Game-CD disk image Virtual CD playback emulation
• Disk image partial update playback emulation
• TOC file production for write-once CD creation
• Error simulation
• History log display of communications between the VCD emulator and CD Block
- Commands and status received
- Process result (error) message
- Selection of communication content display (error only, all)
• Display of TOC data
• Display of relational data
- File location relationship of the CD disk image and the MS-DOS files used to create the image.
MS-DOS files can be accessed in three formats: as collections of data files before
they become CD images; as files containing unaltered CD images; and as partially
revised CD images and data files.
Collections of Data Files Before they Become a CD Image
The data from these MS-DOS files (hereafter called data files) are used to create CD
images. The VCD emulator examines the file according to the access position of the
CD access command received from the VCD I/F Board, edits the data to emulate a
CD image, and sends the result to the VCD I/F Board. This process allows the target
box to receive the data in the same form as it would be input from the CD drive. This
is called “Direct DOS File Access” emulation mode. This emulation can be started
with simple preprocessing as long as the data for creating the CD image has already
been prepared. However, because the data is sent as it is being edited, it cannot be
played back with the same timing as that of the data input from the actual CD drive.
Therefore, the MPEG playback and channel interleave (described later) that requires
complex disc access cannot be supported in this emulation mode.
14
Files that Contain Unaltered CD Images
CDs have a variety of format standards. Data edited in formats and lengths that
meet those standards are saved as “CD Image Files”. The VCD emulator sends these
CD image files directly to the VCD I/F Board. In order to do this, the CD image
must be created before the emulation is started. This is called "Real-Time" emulation
mode.
In this emulation mode, actual complex sector placement (arrangement), such as
channel interleave is performed prior to the start of emulation; therefore, there are
no functional restrictions as those previously referred to in “Direct DOS File Access.”
CD Images and Data Files Used for Partial Updates
This emulation mode uses a single updated data file, and enables an emulation test
using the original CD image file. This is called the "Partial CD Image Update" emu-
lation mode. The VCD emulator determines the type of emulation to run based on
which files are present when it is started, and on the parameters of the VCD emula-
tor startup command options. File extensions are used to determine whether the
necessary files exist to run an emulation. The body section is specified by the param-
eters of the VCD emulator startup line options.
The CD emulation software consists of four programs: the VCD emulation program
and three preprocessing programs.
• VCDEMU.EXE is the program that performs VCD emulation.
• VCDPRE.EXEis the program that performs preprocessing before direct DOS emulation is performed.
• VCDBUILD.EXEis the program that performs preprocessing before real-time emulation is performed.
• VCDUTL.EXE is the program that performs preprocessing before partial CD image update emulation
is performed.
SATURN Virtual CD System User's Manual 15
1.2 Work Flow Summary
This section gives a broad overview of how the VCD emulator works. Before starting
the VCD emulator, read Chapter 1 of its manual, and connect the cables.
The following VCD I/F Board settings must be completed before the VCD emulator
can be run.
• Jumper numbers that select the interrupt numbers (J3)
• Jumper numbers that select the channel numbers for DMA transfers (J4)
• Jumper numbers that select the VCD I/F Board I/O addresses (J5)
Partial
Update
Content and Program Content and Program
Development Revision
Create
CD Configuration Game Program
Data File Execution Emulation
Configuration CD File Location
Setting Data Record
Create Create
CD Image File WOCD
Figure 2 Work Flow Summary
Figure 2 shows the work flow in summary form. The following chapters explain
these stages in detail, with examples.
Configuration Settings
This operation sets the VCD I/F Board settings into the configuration parameter
VCDIO. The VCD emulation program and the VCD I/F Board settings must be
compatible. The required settings are the numbers of three jumpers on the VCD I/F
Board. When these values conflict, the VCD emulator cannot interface correctly with
the VCD I/F Board. These settings are determined when the board is installed in a
PC, so if the values are inserted as configuration parameters in AUTOEXEC.BAT, the
parameters will be set automatically whenever the PC is turned on.
16
Developing Content and Programs
Image data and programs placed on the CD must be prepared in MS-DOS file for-
mat.
• About the CDDA file format
• MS-DOS file format binary file
• Data within the VCD PC-compatible machine must be arranged in Intel format (Little Endian),
as shown in Figure 3 below. When data is in Motorola format (Big Endian), a byte swap must be
implemented in advance.
(INTEL Format)
D7 D0 D15 D8
LSB MSB
Lch 1 Rch 1 Lch 2 Rch 2 Lch 3 Rch N
HDD 512 512 512
Byte
Figure 3 CDDA File Format
CD Configuration Data
Specifies how MS-DOS files such as multimedia content and programs will be lo-
cated on the CD. A format that allows the CD configuration to be scripted is input
according to a preset format using a text editor. These files are called script files, and
their contents are called scripts. These script files describe CD configuration data.
Section 3.0 describes how they are created.
Creating CD Configuration Information Files
Runs the VCDPRE.EXEprogram when a simulation uses direct DOS file access. When
a script file is input into VCDPRE.EXE, it calculates the relationship between the MS-
DOS files and CD access location (values in minutes, seconds, and frames), and
creates lookup table files. The files generated by VCDPRE.EXEare read and used by
the VCD emulator.
Creating the CD Image File
Run the VCDBUILD.EXEprogram when the system is in real-time emulation mode.
When a script file is input into VCDBUILD.EXE, the CD image and TOC data are cre-
ated in a file. These files created by VCDBUILD.EXEare read and used by the VCD
emulator.
SATURN Virtual CD System User's Manual 17
Starting the VCD Emulator
After creating CD configuration files or the CD image file, start the VCD emulator.
The user will be able to tell the mode in which the emulation will be performed
based on which program (VCDPRE.EXE or VCDBUILD.EXE) was launched to create the
emulation files. After the VCD starts, the operation takes place mainly on the target
box. The VCD emulator checks only the playback status and messages.
Update Operation
If the emulation results indicate that the disc content or code require updates, use
the appropriate CD tool to revise them. When a revision changes the size of the
content or program files, the CD configuration must also be revised using
VCDPRE.EXEor VCDBUILD.EXE. Even if there are no changes in size, the CD image
must be modified when real time emulation is executed. Verification of the new disc
image can be performed with the direct DOS file access emulation mode. Emulation
is performed by starting up the Virtual CD Emulator.
Partial Update
Run the VCDUTL.EXEprogram. Partial CD Image Update and Real Time Emulation
modes can be selected as execution options.
18
2.0 The CD Emulation Process Explained
This chapter explains the three CD emulation modes. The process is virtually the
same for each model, except that the files required to run the emulations differ.
These files are created by emulation preprocessing programs. Preprocessing pro-
grams are provided for each of the emulation types.
Direct DOS File Access
This CD emulation model uses a set of pre-CD image data files and CD configura-
tion data files. A preprocessing program that creates the CD configuration data file
from the script file is provided. See section 2.1 for more details.
Real Time Simulation
The actual CD image file is used for this emulation method. A preprocessing pro-
gram that creates the CD image file from the script file is provided. See section 2.2
for more details.
Partial CD Image Update
This model requires CD image files, MS-DOS files for the revised portions, and
update data files. A preprocessing program that creates the updated information file
is provided. The parameters for running the emulation differ from those of the other
models. See section 2.3 for more details.
Figure 4 gives an overview of the emulation process.
SATURN Virtual CD System User's Manual 19
Create, Revise Data
Create Startup File
Script
RTI
RTI File
Preprocessing (Including TOC
(Including TOC Data,
Data,
(VCDPRE.EXE) Relational
CorrelationTable,
Table,Interleave
Interleave
Data
Data
Emulation
(Direct DOS File
Access)
Script Preprocessing CD Image File
(VCDBUILD.EXE)
Real-Time Emulation
Partial DOS File Update
and Modification
Update Preprocessing Update Data File
Data (VCDUTL.EXE)
Emulation
(Partial CD Image
Update)
Update Preprocessing Partially Updated CD
Data (VCDUTL.EXE) Image File
Real-Time Emulation
Final CD Image File Creation
Key to flowchart:
Input File:
Output file production process by user input:
Preprocessing output file: Filename
Figure 4 Operation Procedure Overview
20
2.1 Running a Simulation Using MS-DOS Files
This section describes the operating procedures for using the Direct DOS File Access
mode.
Step 0- Delete existing .DSK files.
Direct DOS File Access mode emulation cannot take place with DSK files. The DSK file
indicates that real time emulation was run previously, resulting in the creation of the
DSK file. Before proceeding, delete all unnecessary DSK files.
Example 0 C:\>DEL∆TSTGAME.DSK[ENTER]
Step 1- Define the project name.
This is used as the file name of the MS-DOS file. It must follow standard MS-DOS
file name specifications.
Example 1 TSTGAME
TSTGAME is used as the file name example in this chapter.
Step 2- Create the script file.
With Chapter 3 as your guide, create the script file using a text editor. The file name
of the script file must be the project name with an SCR extension, as follows.
Example 2 TSTGAME.SCR
Step 3- Create the launch file (parameter file) for the preprocessing program (VCDPRE.EXE).
Use a text editor to create the launch file.
Example 3 The following are examples of launch files.
C:\>TYPE∆TSTGAME.PRM[ENTER]
SCR∆TSTGAME.SCR [ENTER]
RTI∆TSTGAME.RTI [ENTER]
Step 4- Start the preprocessing program VCDPRE.EXE.
Entering the command as shown in the example will start the preprocessing pro-
gram (VCDPRE.EXE) and create the file required for emulation.
Example 4 C:\>VCDPRE.∆TSTGAME.PRM[ENTER]
Result 4 As specified by the launch file CD configuration
information file TSTGAME.RTI is created.
Step 5- Change system to English mode (for users with Japanese DOS/V systems only).
The VCD emulator does not work in Japanese mode, so change the display to En-
glish mode. Enter the following command:
Example 5 C:\>CHEV∆US[ENTER]
Result 5 If the machine is in U.S. mode, the screen flashes and a
prompt appears at the top of the screen.
SATURN Virtual CD System User's Manual 21
Step 6- Launch the VCD emulator (VCDEMU.EXE).
Enter the command shown in the example. The VCD emulator will start and run
direct DOS access.
Example 6 C:\>VCDEMU∆TSTGAME[ENTER]
Result 6 The VCD emulator start up screen is displayed.
The VCD emulator is running.
Step 7- Start the operation from the target box.
Commands received from the target box, data transfer status, error messages, and so
on are displayed on the VCD emulator screen. See Chapter 4 for more details.
2.2 When Creating Disc Images
This section describes the process for “Real-Time Emulation”. If direct DOS file
access has previously been run, start with step 4 below. If not, perform steps 1 to 3
from the previous section.
Step 4- Start-up preprocessing program (VCDBUILD.EXE).
Inputting the command as shown in the example will start the preprocessing pro-
gram (VCDBUILD.EXE) and create the file required for emulation.
Example 4 C:\>VCDBUILD∆TSTGAME.PRM
Result 4 Specified by the start up file, the disc configuration information
file TSTGAME.RTI and the disc image file TSTGAME.DSK are
created.
To run the emulation, execute steps 5 to 7 from the previous section.
22
2.3 Updating Part of a CD Image
This section describes the process for “partial CD image update”. This emulation
mode can be used when a real-time emulation has been run previously. First, com-
plete the preprocessing for real-time emulation and create a file with the extension
DSK. Execute steps 1 through 4 from the previous section.
Step 5- Launch the preprocessing program (VCDUTL.EXE) with the -f option.
Entering the command as shown in the example will start up the preprocessing
program VCDUTL.EXEand create the file required for emulation. If the preprocessing
was executed without using the -f option, only a file for real-time emulation is
created (revised). If this applies, perform the required steps for real time emulation
as described in step 5 onwards.
Example 5 C:\>VCDUTL.∆TSTGAME.SCR∆ISOFILE.DDD∆
DOSAUDIO.D01DOSAUDIO.D02∆-f∆DOSAUDIO.PAT[ENTER]
In this example the DOS file called DOSAUDIO.D01 (in the ISO9660 file called
ISO1FILE.DDD included in the CD image created by TSTGAME.SCR) is replaced with the
DOS file called DOSAUDIO.D02.
Result 5 An update data file called DOSAUDIO.PAT is created.
There are no rules regarding the names for update data files.
Step 6- Change to English mode (applicable to users running DOS/V).
Step 7- Launch the VCD emulator (VCDEMU.EXE) with the -u option.
Enter the command shown in the example, start the VCD emulator, and run a partial
CD image update.
Example 7 C:\>VCDEMU∆TSTGAME∆-u∆DOSAUDIO.PAT[ENTER]
Result 7 The VCD emulator start up screen is displayed. The VCD
emulator has started.
Step 8- Start the operation from the target box.
SATURN Virtual CD System User's Manual 23
3.0 Creating Data
This section describes how to use a script to arrange data on a CD.
DOS files containing scripts are called script files. Script files are referenced and
processed by the preprocessing programs (VCDPRE.EXE, VCDBUILD.EXE, and
VCDUTL.EXE) as well as the VCD emulator. Scripts are collections of lines described
in alphanumeric characters. Lines are composed of keywords with zero or more
parameters. Different keywords require different parameters. When keywords have
multiple parameters, the parameters have a set order. Moreover, the sequence of
lines cannot be arranged arbitrarily in the script; they have a set position pre-deter-
mined by the keyword.
Section 3.1 explains how to use commands to configure the disc image. Section 3.2
describes the line format and explains where they are placed within the script.
Tables 1 through 5 list the keywords and their parameters.
3.1 Determining Disk Configuration
How to UseDefine
Define A B ; B character string is defined as A.
If this is used, A should be enclosed by [ ].
File [A] ; This becomes File B.
File A ; Remains File A.
Define is received no matter which line of the script it is described in, and
this becomes effective with respect to the script beyond the defined location.
How to UseInclude
Include “a.scr” ; include “a.scr” in this location.
Include is processed no matter which line of the script it is described in.
However, Include becomes effective up to two hierarchies (from within the
file performing Include until the place where Include is performed).
24
Comments
Characters that follow a semicolon (;) to the end of the line become comments.
Except at the start of a line, the semicolon must be preceded by a blank character in
order to differentiate it from a semicolon used to designate the version number of an
ISO9600 file name.
Blank characters:
• Space code (0x20)
• Horizontal tab code (0x09)
• Vertical tab code (0x0b)
• Home feed (0x0c)
• Line feed (0x0a)
Example:
; This is a comment. A blank character is not required when at the
start of the line.
File A ; This is also a comment. A blank character is inserted between A
and ;.
File A; Comments are not recognized if a blank character is not inserted
between A and ;.
The following is an explanation of selected command parameters that are used to
configure the disc image.
• Relative positions in a session
The positions on the disk are expressed by “Relative Positions in Session.” The relative positions in
a session are divided by a colon (:) between the minute, second, and frame values and show the
time as 00:00:00 immediately after the end of the LeadIn. In actual disc images, the position is
changed to an appropriate address that corresponds to the session position.
• Relative position in a file
The position in a file, is specified as the relative position from the beginning of the file. The format
is minutes:seconds:frame. In other words, the file begins at 00:00:00.
• Identifier
Several identifiers are specified in the volume descriptor set definition. In the primary volume
descriptor, the representation can be in alphabet (uppercase), numeric, and underscore characters.
In the supplementary volume descriptor, Kanji character codes can be used. When Kanji character
codes are used, the user and the developer must decide on a code system in advance.
• Date
The format for the date is expressed as date "DD", month "MM", and year "YY" (DD/MM/YY),
which is then followed by a space that separates the date from the time, the format of which is
hh:mm:ss:cc:gg. Here "hh" is hour, "mm" is minute, "ss" is second, "cc" is 100th of a second, and
"gg" is the difference from Greenwich Mean Time. In the case of Japan, the time difference is 9
hours; therefore, gg is 36.
SATURN Virtual CD System User's Manual 25
• (ISO9660) File Name
The ISO9660 file name consists of a file name and a version number separated by a semicolon. The
file name is comprised of a name and a file extension, which are separated by a period. Arabic
numerals are used (for the supplementary volume descriptor, Kanji characters may also be used) for
the name and file extension. The number of characters must be limited to 8 or fewer for the name, and
3 or less for the file extension. The body does not necessarily require an extension; however, a file
cannot be specified if it lacks both a name and an extension (that is, with only a period).
Version numbers range from 1 through 32767. When the version number is omitted, the default value is 1.
• (ISO9660) Directory Names
Alphanumeric and kanji characters can be used in directory names, which can be 8 characters or
less (equivalent to 8 English numerals).
Defining the Entire Disk
The configuration of a disk as a whole is defined by placing lines between
the two lines <Disk line> and <EndDisk line>. A single script file defines only a single
disk. The optional <CatalogNo line> is used to add the disc catalog number. A file name
is specified so that the disc image is output as a <Disk line> parameter. A file with this
file name is output as an MS-DOS file. Disks can have multiple sessions, with as few as
one.
Defining Sessions
Sessions are defined between a <Session line> and an <EndSession line>. The <Session
line> specifies the disc type. The disc image of the session section can be output as an MS-
DOS file by specifying the file name. The file name may be omitted.
There are four valid disc types handled by the VCD system:
• CDROM (includes CDDA tracks)
• CDI (for CD-i)
• ROMXA (for CD-ROM XA)*
• SEMIXA
* When creating a CD-ROMXA that includes a MODE1 track, use SEMIXA as the session definition.
However, as listed in page 7 of the DISC Format Standard Specifications (ST-040-R4-051795) (see note),
the disk is created so that when POINT=A0h, then PSEC=00H for the Saturn game disc.
Sessions begin with a lead-in area followed immediately by a system area, volume de-
scriptor set, multiple tracks, and a lead-out at the end. When no lead-in is defined, the
track definition is not valid.
Up to 99 tracks can be defined, each of which is numbered. The first track is track 1,
with the track numbers increasing by 1 in the defined order thereafter. While there are
several types of tracks, the CDDA track must be defined in the last track group.
26
Volume Definition
The lead-in and 2-second gap are followed immediately by the system area and the
volume descriptor set portion. See the DISC Format Standard Specifications (ST-040-
R4-051795).
<SystemArea line> defines the system area. The content of the file specified as the
parameter of this line is copied to the system area. When the file length is less than
16 sectors, the remainder is filled in with 0x00. When the file is too long to fit, an
error results.
The volume descriptor set includes the following types of volume descriptors. See
page 15 of the DISC Format Standard Specifications (ST-040-R4-051795).
• Primary Volume Descriptor (PVD)
• Supplementary Volume Descriptor (SVD)
• Boot Record (BTR)
• Volume Partition Descriptor (VPD)
• Volume Descriptor Terminator (VDT)
There must be at least one PVD, which is always defined. The other volume descrip-
tors are defined as necessary. There may be multiple primary volume descriptors.
However, when several PVDs are present, the latter PVD becomes valid.
A line is provided for defining each of the volume descriptors except the last (VDT),
which is generated even when it is not specified. Therefore, there is no line that
defines this volume descriptor. The end of the volume descriptor set definition is
denoted by <EndVolume line>.
• Line for defining PVD
The PVD is defined in the section between <PrimaryVolume line> and
<EndPrimaryVolume line>.
• Line for defining SVD
The SVD is defined in the section between <SupplementaryVolume line> and
<EndSupplementaryVolume line>.
• Line for defining BTR
The BTR is defined in the section between <BootRecord line> and
<EndBootRecord line>.
• VPD is not used with the Saturn game disc.
The parameters PrimaryVolume, SupplementaryVolume, and BootRecord are specified
by their relative positions within the sessions on the disk. There are lines corre-
sponding to each of the volume descriptor fields. The keywords of the lines indicate
fields, and the parameters indicate their values.
• SystemIdentifier (PVD, SVD), BootSystemIdentifier (BRT)
Specifies the system identifier names of the volume descriptor via parameters.
• VolumeIdentifier (PVD, SVD)
Specifies the volume identifier names via parameters.
• LogicalBlockSize (PVD, SVD)
Specifies the logical block size of the volume as a parameter. The logical block sizes permitted are
512, 1024, and 2048.
SATURN Virtual CD System User's Manual 27
• EscapeSequence(SVD)
Shows the set of characters described within the subvolume descriptor and characters described
within the directory record and path table. Only SHIFT-JIS is valid.
• LPath (PVD, SVD)
Specifies that the LPath descriptor be written. Only one LPath is permitted for each volume
descriptor.
• MPath (PVD, SVD)
Specifies that the MPath descriptor be written. Only one MPath is permitted for each volume
descriptor.
• OptionalLPath (PVD, SVD)
Specified when the optional LPath table is used.
• OptionalMPath (PVD, SVD)
Specified when the optional MPath table is used.
• VolumeSetIdentifier (PVD, SVD)
Specifies the volume set identifier as a parameter.
• PublisherIdentifier (PVD, SVD)
Specifies the publisher identifier as a character string with a parameter. The contents of the
publisher identifier can also be specified as a file on the disk. In that case, write the script to place
the file containing the publisher identifier in the root directory, and specify as the parameter the
file name beginning with the underline character.
• DataPreparerIdentifier (PVD, SVD)
Specifies the data preparer (editor) identifier as a character string with a parameter. The contents
of the data preparer identifier can also be specified as a file on the disk. In that case, write the
script to place the file containing the data preparer identifier in the root directory, and specify as
the parameter the file name beginning with the underline character.
• ApplicationIdentifier (PVD, SVD)
Specifies the application identifier as a character string with a parameter. The contents of the
application identifier can also be specified as a file on the disk. In that case, write the script to place
the file containing the application identifier in the root directory, and specify as the parameter the
file name beginning with the underline character.
• CopyrightFileIdentifier (PVD, SVD)
Specifies the copyright message as a file on disk. This file must be a file within the root directory.
The file name is specified as a parameter
• AbstractFileIdentifier (PVD, SVD)
Specifies the summary information as a file on disk. This file must exist within the root directory.
The file name is specified as a parameter.
• BibliographicFileIdentifier (PVD, SVD)
Specifies the bibliographic information as a file on disk. This file must be within the root directory.
The file name is specified as a parameter.
28
• VolumeCreationDate (PVD, SVD)
Specifies the date of volume creation. When this line is not specified, the current date and time are
used.
• VolumeModificationDate (PVD, SVD)
Specifies the last date of volume modification. When this line is not specified, the current date and
time are used.
• VolumeExpirationDate (PVD, SVD)
Specifies the date of volume expiration. When this line is not specified, a special date notation of
“no expiration date” is used.
• VolumeEffectiveDate (PVD, SVD)
Specifies the date on which the volume is to become effective. When this line is not specified, the
data in the volume becomes effective immediately.
• ApplicationUse (PVD, SVD)
This line specifies the application use field. The data file in which the contents of the application use
field are stored is specified to the parameter. When the file is shorter than the field, it is filled out
with 0x00. If it is longer, an error results.
• BootSystemIdentifier (BRT)
Specifies the boot system identifier of the boot record as a character string with a parameter.
• BootIndentifier (BRT)
Specifies the boot identifier of a boot record as a character string with a parameter.
Track Definitions
Tracks are defined between <Track line> and <EndTrack line>. Each group from the
<Track line> and ending with <EndTrack line> represents a single track. The Track
line parameter specifies the type of track. There are four track types:
• CDDA : Audio tracks
• MODE0 : Mode 0 data tracks
• MODE1 : Mode 1 data tracks
• MODE2 : Mode 2 data tracks
The following lines are used for creating track definitions:
• Pause
Specifies the number of blocks to pause at the start of a track. When this line is absent, there is no
pause and playback begins immediately. The normal pause is about 2 seconds, or 150 blocks.
• Empty
Null blocks (blocks filled in with 0x00) equal to the number of blocks specified in the parameter of
this line is played back. This is used when defining lead-in or lead-out.
• Preemphasis
This line is used to specify whether to turn the preemphasis bit of the Q subcode channel ON. If the
parameter value is TRUE, the bit is turned ON; if the value is FALSE, the bit is OFF. If this line is not
specified, the default is preemphasis bit OFF.
SATURN Virtual CD System User's Manual 29
• Channels
This line is used to specify whether the track will have two channels or four. This line is valid only
with CDDA track types. The instruction is reflected in the Q subcode data. If this line is not
specified, the default is 2.
• Copy
This line is used to specify the copy-protection status of the audio data of a given track type. If the
parameter value is TRUE, digital copying is permitted. If this line is not specified for tracks that
require specification, the default is FALSE.
• Directory Definition
Defines the CDDA track as the final track. Directories can be used to give data tracks a
hierarchical structure using directories.
Directory Definition
Directories are defined between <Directory line> and <EndDirectory line>. Each
group from <Directory line> to <EndDirectory line> represents a single directory.
A hierarchical directory structure can be defined by placing sets of <Directory line>
and <EndDirectory line> within the outer set of <Directory line> and <EndDirectory
line>. The Directory line parameter specifies the directory name.
Directory files can be of two types:
• Interleaved files.
• Non-interleaved files.
There are three types of non-file interleaved files:
• Simple files
• Files that are channel-interleaved files.
• MPEG files
Interleaved files are created from files that are non-interleaved.
The following lines specify the characteristics of the directory itself:
• Attributes
Specifies the directory attributes with a parameter. An attribute may be either HIDDEN or NOHIDDEN.
If this line is not specified, the default is NOHIDDEN.
• MinLength
Specifies the minimum number of bytes for the directory.
• RecordingDate
Specifies the directory recording date. If this line is not specified, the CD image creation date is used.
Defining Interleave Files
Interleaved files are defined between <Extent line> and <EndExtent line>. Specify
the interleaved file disk location by using the relative location within the session per
the Extent line parameter. When the specified area overlaps another file, a warning
message is displayed and processing stops. If this parameter specification is omitted
(that is, no relative position is specified), a warning message is displayed.
30
Interleaved files are defined between <FileInterleaveFile line> and
<EndFileInterleaveFile line>. Information for the interleave (unit size and gap
size) is specified in the FileInterleave parameters. Unit sizes and gap sizes differ
depending on the files interleaved. A single file that is not interleaved is selected
between <FileInterleaveFile line> and <EndFileInterleaveFile line>.
Defining Files
Files are defined between a <File line> and an <EndFile line>. The ISO9660 file
name is specified per <File line> parameter. The actual file contents are specified as
file source, MPEG file, or channel interleave file. Multiple files can be specified if
they are of the same type. When an ISO9660 file uses one data file as the input
source, only <File line> and <EndFile line> need to be used to specify file names
if the names are the same.
File definition uses the following lines:
• BeginTimeS (simple files, channel-interleaved files)
Specifies the starting position of the disc location where the file is placed as the relative position
within a session. When the specified area overlaps another file, a warning message is displayed.
If this line is not specified—that is, no time is specified—the disk image is created in order and
placed after the final sector on the disk image where the file definition script is described.
• EndTimeS (simple files, channel-interleaved files)
Specifies the ending position of the area within the disc where the file is placed as the relative
position within a session. When the specified area overlaps another file, a warning message is
displayed. If this line is not specified, the default placement is the same as the specified
BeginTimeS value or the BeginTimeS default value.
• Attributes (simple file, channel-interleaved files)
Specifies the file attributes. The following are the attributes:
HIDDEN/NOHIDDEN
RECORD/NOTRECORD
Set one attribute from the pair to the parameter. When this line is not specified,
NOHIDDEN∆NOTRECORD becomes the default.
• RecordingDate (simple file, channel-interleaved files)
Specifies the file recording date. When this line is not specified, the date of CD image creation is
used.
• MinLength (simple file, channel-interleaved files)
Specifies the minimum number of bytes for the file area. Regardless of the actual size of the file,
the disk-area size specified by this line is reserved as the minimum for this file. It can be
set so that file and track positions remain unchanged even when the file is updated later and its
size increased as a result.
• Trigger (simple file, channel-interleaved files)
Specifies the length of time that the trigger is applied in relative time from the start of the file.
• Eors (simple file, channel-interleaved files)
Specifies the length of time that the EOR (End Of Record) is applied in relative time from the start
of the file. The line is effective only on files with MODE2 tracks.
• Pack (File interleave file, channel interleave file)
In file interleave and channel interleave, the remainder of long files are packed into short files.
SATURN Virtual CD System User's Manual 31
• SectorRate
The number of sectors transferred in 1 second (75 or 150). The default is 150 (sectors/sec).
• FileNo (file interleaved file)
Specifies the file number.
• BeginTimeE (file interleaved file)
Files in the file-interleave are laid out in relative positions from the beginning position shown by
Extent.
• EndTimeE (file interleaved file)
Files in the file interleave are laid out in relative positions from the end position shown by
Extent.
• SameName
Shows the directory name and file name used in the directory record and in the path table identi-
fied by the subvolume descriptor.
Defining Channel-Interleaved Files
Channel-interleaved files are defined as pairs of <Channel line> and <EndChannel
line>. One channel is defined between <Channel line> and <EndChannel line>.
The channel number is selected in the channel line parameter. The channel data
defined between <Channel line> and <EndChannel line> is also defined as either a
file source group or MPEG source line. It cannot be defined as both.
The priority when arranging each channel in a sector follows the order of the com-
mands recorded in the scripted file. The arrangement of the channels in a file can be
stated explicitly. To interleave a channel that follows immediately after a previously
defined channel, specify explicitly at the beginning of the channel. To do this, specify
a “+” in the BeginTimeF line in the FileSource definition line or the MpegMultiplex
definition line. To interleave a channel before that channel, so that is follows a
previously defined channel, make an explicit specification at the end of the channel.
To do this, specify a “-” in the EndTimeF line parameter of the FileSource definition
line or the MpegSource definition line.
Defining MPEG Files
MPEG files are defined between <MpegMultiplex line> and <EndMpegMultiplex
line>. This definition allows multiple MPEG-compressed data (audio, video, data),
to add the system layers, perform multiplex, and create ISO11172 streams. The
ISO11172 streams are arranged on disk as ISO9660 files. The ISO11172 stream in the
MpegMultiplex line parameter specifies the MS-DOS file to be output. When it is
not necessary to create an MS-DOS file, this parameter is not specified.
Each MPEG data that makes up the MPEG file is defined between <MpegStream
line> and <EndMpeg Stream line>. The data file and data type stored by the MPEG-
compressed data are specified in the MpegStream line parameter.
32
Specify one of the following three data types for the file:
Audio
Indicates that there is audio data.
Video
Indicates that there is video data.
Data
Indicates that there is data.
The following line is specified between <MpegStream line> and <EndMpegStream
line>:
• BitRate
Specifies the data bit rate in bps units.
The following commands can be used as the MPEG file definition:
• BeginTimeF
The start position in an ISO9660 file is specified by the relative position from the beginning of the
file. When the “+” symbol and not the relative position is specified in the parameter, the start
position continues at the end of the previously defined file source.
• EndTimeF
The end position in an ISO9660 file is specified by the relative position from the beginning of the
file. When the “-” symbol and not the relative position is speci fied in the parameter, the start
position continues at the beginning of the previously defined file source.
• AutoEOR
Shows the recording of EOR (EndofRecord) to the sector subheader that stores the final file source
bytes. This command is valid only in MODE2-type tracks.
• RealTime
Shows that this file source is a real-time file.
Defining File Sources
A file source is an MS-DOS file that stores the data that is the source for configuring
ISO9660 files. The file source is defined between <FileSource line> and
<EndFileSource line>. The FileSource line parameter becomes the data file name.
The following line specifies the data file’s characteristics. All of the following com-
mands can be omitted.
• SourceType
Specify one of the following types to the parameter:
— MONO_A
Data is ADPCM at mono_level A.
— MONO_B
Data is ADPCM at mono_level B.
— MONO_C
Data is ADPCM at mono_level C.
— STEREO_A
Data is ADPCM at stereo_level A.
— STEREO_B
Data is ADPCM at stereo_level B.
SATURN Virtual CD System User's Manual 33
— STEREO_C
Data is ADPCM at stereo_level C.
— CDDA
Used when data is CDDA to record in an ISO9660 file system.
— VIDEO
Shows that the file data is video.
— ISO11172
Specifies that the file data is an ISO11172 stream.
• SubHeader
Indicates that a subheader has already been added to the file data. When this line is not specified,
it means that no subheader has been added.
• Offset
Specifies the part of the MS-DOS file that is to be input as the file source. The first argument
specifies the MS-DOS file read start position. The second argument specifies the read size. The
start position and size are in byte units.
• BitRate
Specifies the data bit rate.
• UnitSize
Specifies the unit size in sector units. When this line is not specified, it means that interleave is not
performed.
• GapSize
Specifies the gap size in sector units. When this line is specified without specifying the
UnitSize line, a warning message is displayed.
• BeginTimeF
Specifies the start position within the ISO9660 file in a relative location from the start of the file.
When the “+” symbol is specified in the parameter instead of the relative position, it is continued
in front of the previously defined file source.
• EndTimeF
Specifies the end position within the ISO9660 file in a relative location from the start of the file.
When the “-” symbol is specified in the parameter instead of the relative position, it is continued
in front of the previously defined file source.
• DataType
When the track that arranges this source data is MODE 2, specify the form. The parameter will
specify one of the following. When the specification is omitted, FORM1 will be used.
- FORM1 (for form 1 of mode 2)
- FORM2 (for form 2 of mode 2)
• Reallocation
Indicates that when another file is already specified in the location where the file source is to be
placed, the previously specified file is avoided and the source file is placed somewhere else. For
file sources that do not have this line, the file will be placed in an overlapped fashion
over the previous file.
• AutoEOR
Indicates that EOR (EndOfRecord) is recorded in the subheader of the sector that stores the final
byte of the file source. AutoEor is valid only within MODE 2-type tracks.
• CodingInformation
Shows that coding information is described in BCD.
• RealTime
Indicates that this file source is a real-time file.
34
3.2 Script Command Reference
Format Definitions of Lines
Backus Naur (BNF) notation is used for the formal format definitions of the follow-
ing lines. The areas enclosed by < > are nonterminal symbols, showing that the left
side of ::= is replaced with that of the right side. In addition, this replacement is
performed recursively.
The following notation rules are observed:
• Enclosing in [] denotes a termination symbol.
• [CR] indicates a return code.
• [SPACE] indicates a space.
• [TAB] indicates a tab code.
• <keyword> indicates an annexed table.
• The limitations of the keyword and parameter set are given in annexed tables.
• Keywords are case sensitive.
• The limits for the number of columns and characters are specified separately.
• The units used for numbers are described separately.
• Information regarding other limitations is described separately.
• Refer to specification JIS X 0606 for the definitions for <a 1 character> and <d 1
character>. Kanji characters can also be used. Generally, every command has the following
configuration: <line>::=<keyword><parameter list>[CR].
Tokens such as keywords and parameters are separated by one or more blank
spaces, which have the following meanings.
• Space code (0x20)
• Horizontal tab code (0x09)
• Vertical tab code (0x0b)
• Home feed (0x0c)
• Line feed (0x0a)
Each line consists of one line by the line feed code (0x0d).
The definition of each line is shown below.
• Words not enclosed by < > refer to reserved words or the operator input by the user.
• [CR] indicates the line feed code (0x0d).
• [SPACE] indicates a blank space (0x20).
• See standard specification JIS X 0606" for a definition of <a 1 character> and <d 1
character>.
SATURN Virtual CD System User's Manual 35
Restrictions include:
<d 1 characters>::=<shift JIS characters>
<a 1 characters>::=<shift JIS characters>
Other restrictions are explained separately.
<Disc line>::= Disc<output file name>[CR]
<EndDisc line>::= EndDisc [CR]
<LeadIn line>::= LeadIn <track type> [CR]
<EndLeadIn line>::= EndLeadIn [CR]
<Session line>::= Session <Disc type> <Output file name>opt [CR]
<EndSession line>::= EndSession [CR]
<LeadOut line>::= LeadOut <track type> [CR]
<EndLeadOut line>::= EndLeadOut [CR]
<CatalogNo line>::= CatalogNo <numeric string> [CR]
<Track line>::= Track <track type> [CR]
<EndTrack line>::= EndTrack [CR]
<Volume line>::= Volume <volume type> <output file name> [CR]
<EndVolume line>::= EndVolume [CR]
<SystemArea line>::= SystemArea <MS-DOS file name> [CR]
<Primary Volume line>::= Primary Volume <relative time> [CR]
<EndPrimary Volume line>::= EndPrimary Volume [CR]
<Supplementary Volume line>::= Supplementary Volume <relative time> [CR]
<EndSupplementary Volume line>::= EndSupplementary Volume [CR]
<BootRecord line>::= BootRecord <relative time> [CR]
<EndBootRecord line>::= EndBootRecord [CR]
<Pause line>::= Pause <number of blocks> [CR]
<PreGap line>::= PreGap <number of blocks> [CR]
<PostGap line>::= PostGap <number of blocks> [CR]
<Empty line>::= Empty <number of blocks> [CR]
<Directory line>::= Directory <directory name> [CR]
<EndDirectory line>::= EndDirectory [CR]
<Preemphasis line>::= Preemphasis <switch> [CR]
<Channels line>::= Channels <channel count> [CR]
<Copy line>::= Copy <switch> [CR]
<Attributes line>::= Attributes <attribute> [CR]
<MinLength line>::= MinLength <number of bytes>|MinLength <number
of sectors> [CR]
• Number of bytes is valid when defined by Directory - EndDirectory.
• Number of sectors is valid when defined by File - EndFile.
<RecordingDate line>::= RecordingDate <date> [CR]
<Extent line>::= Extent <relative time> [CR]
<EndExtent line>::= EndExtent [CR]
<FileInterleave line>::= FileInterleave <unit size> <gap size> [CR]
<EndFileInterleave line>::= EndFileInterleave [CR]
<File line>::= File <ISO9660 file name> <output file name>opt [CR]
36
<EndFile line>::= EndFile [CR]
<BeginTimeE line>::= BeginTimeE <relative time> | BeginTimeE + [CR]
<EndTimeE line>::= EndTimeE <relative time> | EndTimeE - [CR]
<BeginTimeS line>::= BeginTimeS <relative time> [CR]
<EndTimeS line>::= EndTimeS <relative time> [CR]
<SourceType line>::= SourceType <file source type> [CR]
<FileSource line>::= FileSource <input file name> [CR]
<EndFileSource line>::= EndSourceType [CR]
<SubSource line>::= SubSource <subsource file name> [CR]
<SubEmpty line>::= SubEmpty <number of blocks > [CR]
<BeginTimeF line>::= BeginTimeF <relative time> [CR] | BeginTimeF + [CR]
<EndTimeF line>::= EndTimeF <relative time> [CR] | EndTimeF - [CR]
<MpegMultiplex line>::= MpegMultiplex <output file name>opt [CR]
<EndMpegMultiplex line>::= EndMpegMultiplex [CR]
<Trigger line>::= Trigger <location inside file> [CR]
<Eors line>::= Eors <location inside file> [CR]
<MpegStream line>::= MpegStream <source file name> <data type> [CR]
<EndMpegStream line>::= EndMpegStream [CR]
<FileNo line>::= FileNo <file number > [CR]
<Channel line>::= Channel <channel number > [CR]
<EndChannel line>::= EndChannel [CR]
<SectorRate line>::= SectorRate <sector rate> [CR]
<UnitSize line>::= UnitSize <unit size> [CR]
<GapSize line>::= GapSize <gap size> [CR]
<Pack line>::= Pack [CR]
<BitRate line>::= BitRate <bit rate> <sequence number>opt [CR]
<SubHeader line>::= SubHeader [CR]
<Offset line>::= Offset <input position> <input length> [CR]
<DataType line>::= DataType <mode 2 form> [CR]
<Reallocation line>::= Reallocation [CR]
<AutoEOR line>::= AutoEOR [CR]
<CodingInformation line>::= Coding Information <coding information> [CR]
<RealTime line>::= RealTime [CR]
<SameName line>::= SameName <D + identifier> [CR]
• <d1 character string> can also be used with <D + indentifier >
<SystemIdentifier line>::= SystemIdentifier <A identifier> [CR]
<VolumeIdentifier line>::= VolumeIdentifier <D identifier> [CR]
<LogicalBlockSize line>::= LogicalBlockSize <block size> [CR]
<LPath line>::= LPath [CR]
<MPath line>::= MPath [CR]
<OptionalLPath line>::= OptionalLPath [CR]
<OptionalMPath line>::= OptionalMPath [CR]
<VolumeSetIdentifier line>::= VolumeSetIdentifier <D identifier> [CR]
<PublisherIdentifier line>::= PublisherIdentifier <A identifier> [CR]
<DataPreparerIdentifier line>::= DataPreparerIdentifier <A identifier> [CR]
<ApplicationIdentifier line>::= ApplicationIdentifier <A identifier> [CR]
<CopyrightFileIdentifier line>::= CopyrightFileIdentifier <D + identifier> [CR]
SATURN Virtual CD System User's Manual 37
<AbstractFileIdentifier line>::= AbstractFileIdentifier <D + identifier> [CR]
<BibliographicFileIdentifier line>::= BibliographicFileIdentifier
<D + identifier> [CR]
<VolumeCreationDate line>::= VolumeCreationDate <date> [CR]
<VolumeModificationDate line>::= VolumeModificationDate <date> [CR]
<VolumeExpirationDate line>::= VolumeExpirationDate <date> [CR]
<VolumeEffectiveDate line>::= VolumeEffectiveDate <date> [CR]
<ApplicationUse line>::= Application Use <MS-DOS file name> [CR]
<EscapeSequnces line>::= EscapeSequences <kanji code> [CR]
<BootSystemIdentifier line>::= BootSystemIdentifier <A identifier> [CR]
<BootIdentifier line>::= BootIdentifier <A identifier> [CR]
<SysOwnerID line>::= SysOwnerID <numeric string> [CR]
<SysReadAttributes line>::= SysReadAttributes <owner attribute><group
attribute><world attribute> [CR]
<SysExecuteAttributes line>::= SysExecuteAttributes <owner attribute><group
attributes><world attributes> [CR]
<Macro Definition>::= Define <macro definition character string><character
string> [CR] “<character string> “[CR]
<Macro Definition Character String> ::= <start character><trailing character
string>
<Trailing Character String> ::= <trailing character><trailing character string>
<Start Character> ::= <Roman characters> _
<Trailing Character> ::= <trailing character> <trailing character>
• <Character strings> can describe any character (Includes SHIFT-JIS kanji. Except for control codes)
• When you want to insert [SPACE] in a character string, enclose the character string by “ “.
<Include> ::= Include<MS-DOS file> [CR]
<Location within file> ::= <relative time>
<Relative Time> ::= <minute>:<second>:<frame>
<Date> ::= <day>/<month>/<year>/<hour>:< minute>:<second>:<milliseconds>:
<Greenwich time offset>
<Minute> ::= <numeric string>
<Second> ::= <numeric string>
<Frame> ::= <numeric string>
<Millisecond> ::= <numeric string>
<Time> ::= <numeric string>
<Day> ::= <numeric string>
<Month> ::= <numeric string>
<Year> ::= <numeric string>
<Greenwich offset> ::= <numeric string> - <numeric string>
From here on the left side shows one token. Separator characters cannot be inserted between each
parameter.
<Output frequency> ::= <numeric string>
<Number of bytes> ::= <numeric string>
38
<Unit size> ::= <numeric string>
<Gap size> ::= <numeric string>
<Channel number> ::= <numeric string>
<Number of blocks> ::= <numeric string>
<Number of sectors> ::= <numeric string>
<Input position> ::= <numeric string>
<Input length> ::= <numeric string>
<Catalog number> ::= <numeric string>
<File number> ::= <number string>
<Sequence number> ::= <number string>
<Coding information> ::= <number string>
<Version number> ::= <number string>
<Bit rate> ::= <number string> . <number string>
<Directory name> ::= <d character string> <d 1 character string>
<ISO9660 file name> ::= <file name> <file name> ; <version number>
<File name> ::= <file name body> . <file name extension> <file name body>
<File name extension>
<File name body> ::= <d character string> <d 1 character string>
<File name extension> ::= <d character string> <d 1 character string>
<Output file name> ::= <MS-DOS file>
<Input file name> ::= <MS-DOS file>
<Source file name> ::= <MS-DOS file>
<Subsource file name> ::= <MS-DOS file>
<MS-DOS file> ::= “<drive name>opt <MS-DOS full path name>” <drive name>opt
<MS-DOS full path name>
<Drive name> ::= <drive> :
<MS-DOS full path name> ::= <MS-DOS directory>opt \ <MS-DOS file name>
<MS-DOS file name>
<MS-DOS directory> ::= <MS-DOS directory name> \ <MS-DOS directory>
<MS-DOS directory name> ::= . .. <MS-DOS file name>
<MS-DOS file name> ::= <MS-DOS file name body> . <MS-DOS file name extension>
<MS-DOS file name body>
<MS-DOS file name body> ::= <d’character string> <d 1 character string>
<MS-DOS file name extension> ::= <d’character string> <d 1 character string>
<Drive> ::= <Roman character>
<Disc type> ::= CDROM CDI ROMXA SEMIXA
• When disc type is CDDA, define as CDROM.
• Define as SEMIXA when the disc format is CDROMXA with MODE1 tracks.
<Track type> ::= CDDA MODE0 MODE1 MODE2
<Volume Type> ::= ISO9660
<File Source Type> ::= MONO_A MONO_B MONO_C STEREO_A
STEREO_B STEREO_C CDDA ISO11172 VIDEO DATA
<Data Type> ::= AUDIO VIDEO DATA
<Mode 2 Form> ::= FORM1 FORM2
SATURN Virtual CD System User's Manual 39
<Switch> ::= TRUE FALSE
<Number of channels> ::= 2 4
<Attribute> ::= HIDDEN NOHIDDEN RECORD NOTRECORD
<Block Size> ::= 512 1024 2048
<Selector Rate> ::= 75 150
<Kanji Code> ::= SHIFTJIS
<Owner Attribute> ::= OWNER NOTOWNER
<Group Attribute> ::= GROUP NOTGROUP
<World Attribute> ::= WORLD NOTWORLD
<A Identifier> ::= “<a 1 character string>” “<a character string>”
• An a 1 character string can be used in the SupplementaryVolume descriptor. In other cases,
only the a character string can be used.
<D Identifier> ::= “<d 1 character string>” “<d character string>
• d 1 character string can be used in the SupplementaryVolume descriptor. In other cases, only
the d character string can be used.
<D + Identifier> ::= “<d 1 character string>” “<d + character string>
• d 1 character string can be used in the SupplementaryVolume descriptor. In other cases, only
the d + character string can be used.
<Numeric String> ::= <Numeric String> <Number> <Numeric String>
<d Character String> ::= <d character> <d character> <d character string>
<d 1 Character String> ::= <d 1 character> <d 1 character> <d 1 character
string>
<a Character String> ::= <a character> <a character> <a character string>
<a 1 Character String> ::= <a 1 character> <a 1 character> <a 1 character
string>
<d + Character String> ::= <d + character> <d + character> <d character
string>
<d + Character> ::= <d character> ; .
<Roman characters> ::= A B C D E F G H I J K L
M N O P Q R S T U V W X Y Z a b c d e
f g h i j k l m n o p q r s t u v w
x y z
<Numbers> ::= 0 1 2 3 4 5 6 7 8 9
<d characters> ::= <Numbers> A B C D E F G H I J K
L M N O P Q R S T U V W X Y Z _
<d’ characters> ::= <d characters> a b c d e f g h i
j k l m n o p q r s t u v w x y z - ^
$ ~ ! # % & { } @ ‘ ( )
<a characters> ::= <d characters> [SPACE] ! “ % & ‘ ( ) * +
– . / : ; < = > ?
40
Script Syntax
The syntax of the input script is indicated below.
• Items enclosed by < > denote nonterminal symbols.
• means "or". < . . >opt indicates that < . . > can be omitted.
• xxxxxxx indicates areas where the script locations and definitions were changed from the old
specifications.
<Script> ::= <disc>
<Disc> ::= <Disc line> <Disc Definition> <EndDisc line>
<Disc Definition> ::= <CatalogNo line>opt <Session Group>
<Session Group> ::= <Session> <Session> <Session Group>
<Session> ::= <Session line> <Session definition> <EndSession line>
<Session Definition> ::= <Leadin> <System Area Definition>opt <Volume
Descriptor Track> <Track Group> <Leadout>
<LeadIn> ::= <LeadIn line> <Empty line>opt <PostGap line>opt <EndLeadIn
line>
<System Area Definition> ::= <SystemArea line>
<LeadOut> ::= <LeadOut line> <Empty line>opt <EndLeadOut line>
<Track Group> ::= <Data Track Group>opt <CDDA Track Group>opt
<Data Track Group> ::= <Track> <Track> <Data Track Group>
<Track> ::= <Track line> <PreGap line>opt <Directory Group> <PostGap>opt
<EndTrack line>
<CDDA Track Group> ::= <CDDA Track> <CDDA Track> <CDDA Track Group>
<CDDA Track > ::= <Track> <CDDA Track Definition> <EndTrack line>
<CDDA Track Definition > ::= <CDDA Track Definition Group>opt <File Source Group>
<CDDA Track Definition Group>opt <Directory Group>
<CDDA Track Definition Group> ::= <CDDA track Definition line> <CDDA
Track Definition line ><CDDA Track Definition Group>
<CDDA Track Definition line> ::= <Pause line> <Preemphasis line>
<Channels line> <Copy line>
<Directory Group> ::= <Directory line> <Directory Attributes>opt
<Directory Group>
<EndDirectory line> ::= <Directory Group>opt <Directory Group>opt
<File Group> <Directory Group>opt
<Directory Attributes> ::= <Directory Attribute line> <Directory At-
tribute line> <Directory Attribute>
<Directory Attribute line> ::= <Attributes line> <MinLength line>
<RecordingDate line>
<SameName line> <SysOwnerID line> <SysReadAttributes line>
<SysExecuteAttributes line>
• SameName is valid when SupplementaryVolume is defined.
<File Group> ::= <File line> <File line> <File group>
<File line> ::= <File> <Extended File>
• When the track is CDDA, only the file is valid.
<File> ::= <File line> <File Definition>opt <File Format Definition>
<EndFile line>
SATURN Virtual CD System User's Manual 41
<File Definition> ::= <File definition line> <File definition line>
<File Definition>
<File Definition line> ::= <BeginTimeS line> <EndTimeS line> <At-
tributes line>
<RecordingDate line> <MinLength line> <Trigger line> <Eors line>
<Pack line> <SectorRate Command
line> <FileNo line> <BeginTimeE line> <EndTimeE
line> <SameName line> <SysOwnerID line> <SysReadAttributes line>
<SysExecute Attributes line>
• When the track is CDDA, Attributes, RecordingDate, MinLength, SameName only are valid.
• SameName is valid when SupplementaryVolume is defined.
<File Format Definition> ::= <File Source Group> <MPEG Source Command
line> <Channel Group>
• When the track is CDDA, <File Source Group> only is valid.
<File Source Group> ::= <File Source> <File Source> <File Source Group>
<File Source> ::= <FileSource line> <File Source Definition>opt
<EndFileSource line>
<File Source Definition> ::= <File Source Definition line>
<File Source Definition line> <File Source Definition>
<File Source Definition line> ::= <SubHeader line>
<Offset line>
<BitRate line> <UnitSize line>
<GapSize line> <RealTime line> <BeginTimeF line> <EndTimeF line>
<DataType line> <AutoEOR line> <CodingInformation line>
<SourceType line>
<SubSource line> <SubEmpty line>
• When the track is CDDA, SubSource and SubEmpty only are valid.
• When the track is not CDDA, items other than SubSource and SubEmpty are valid.
<MPEG Source line> ::= <MpegMultiplex line> <MPEG Source Definition>opt
<MPEG stream> <EndMpegMultiplex line>
<MPEG Source Definition> ::= <MPEG Source Definition line>
<MPEG Source Definition line> <MPEG Source Definition>
<MPEG Source Definition line> ::= <BeginTimeF line>
<EndTimeF line> <AutoEOR line> <RealTime line>
<MPEG Stream> ::= <MpegStream line> <BitRate line> <EndMpegStream line>
<MpegStream line> <BitRate line> <EndMpegStream line> <MPEG Stream>
<Channel Group> ::= <Channel> <Channel> <Channel Group>
<Channel> ::= <Channel line> <Reallocation line>opt <Channel Definition>
<EndChannel line>
<Channel Definition> ::= <File Source Group> <MPEG Source line>
<Extension File> ::= <Extent line> < Extension File Definition> <EndExtent
line>
42
<Extension File Definition> ::= <File Interleave Definition> <File
Interleave Definition> <Extension File Definition>
<File Interleave Definition> ::= <FileInterleave line> <File> <EndFileInterleave
line>
<Volume Descripter Track> ::= <Track line> <PreGap line>opt <Volume>
<Directory Group>opt <PostGap line>opt <EndTrack line>
<Volume> ::= <Volume line> <PVD> <Volume Group>opt <EndVolume line>
<Volume Group> ::= <Volume Set> <Volume Set> <Volume Group>
<Volume Set> ::= <PVD> <SVD> <Boot Record>
<PVD> ::= <PrimaryVolume line> <PVD Definition>opt <EndPrimaryVolume line>
<SVD> ::= <SupplementaryVolume line> <SVD Definition>opt <EndSupplementaryVolume
line>
<Boot Record> ::= <BootRecord line> <Boot Record Definition>opt <EndBootRecord
line>
<PVD Definition> ::= <PVD Definition line> <PVD Definition line> <PVD Defini
tion>
<SVD Definition> ::= <SVD Definition line> <SVD Definition line> <SVD Defi-
nition>
<Boot Record Definition> ::= <Boot record Definition line> <Boot Record Defi
nition line> <Boot Record Definition>
<PVD Definition line> ::= <SystemIdentifier line> <VolumeIdentifier line>
<LogicalBlockSize line> <LPath line> <MPath line> <OptionalLPath line>
<OptionalMPath line> <VolumeSetIdentifier line> <PublisherIdentifier
line> <DataPreparerIdentifier line> <ApplicationIdentifier line>
<CopyrightFileIdentifier line> <AbstractFileIdentifer line>
<BibliographicFileIdentifier line> <VolumeCreationDate line>
<VolumeModificationDate line> <VolumeExpirationDate line>
<VolumeEffectiveDate line> <ApplicationUse line>
<SVD Definition line> ::= <SystemIdentifier line> <VolumeIdentifier line>
<LogicalBlockSize line>
<EscapeSequence line> <LPath line> <MPath line> <OptionalLPath line>
<OptionalMPath line>
<VolumeSetIdentifier line> <PublisherIdentifier line>
<DataPreparerIdentifier line> <ApplicationIdentifier line>
<CopyrightFileIdentifier line> <AbstractFileIdentifier line>
<BibliographicFileIdentifier line> <VolumeCreationDate line>
<VolumeModificationDate line>
<VolumeExpirationDate line> <VolumeEffectiveDate line> <Application
Use line><Boot Record Definition line> ::= <BootSystemIdentifier line>
<BootIdentifier>
SATURN Virtual CD System User's Manual 43
• The same command can be written more than one time, but for commands such as
the ones within each block (x x ~ End x x), the command written last becomes
valid (attributes are excluded.)
Example: UnitSize 100
UnitSize 10
In this case, UnitSize 10 is valid.
• When attributes are defined repeatedly, they are valid based on the following
priority:
HIDDEN > NOHIDDEN, RECORD > NOTRECORD
Consequently, use the following example to define both HIDDEN and RECORD.
Example: Attribute HIDDEN
Attribute RECORD
Consequently, the attribute does not become NOHIDDEN even if the attribute NOHIDDEN
is added after this.
• SourceType line is valid when the track type is mode 2.
• BitRate line and UnitSize line, as well as the GapSize line, are in an exclusive
relationship; the command defined last has priority.
• Even if the SubHeader line is defined, when new subheader information is created
by another command, that subheader takes on higher priority and overwrites the
subheader defined.
44
Script keywords are listed in the following tables.
Table 1 List of Script Commands (1)
Keyword Parameter Description
Define Variable is defined for a given value (macro definition).
Variable name Macro defined character string.
Value Character string to be defined.
Include Inputs script file and replaces it with this command line.
File name Name of other file that describes the script.
Disc Start of disk definition
File name Name of file that outputs the disk image
CatalogNo Specifies the disk catalog number.
Catalog ASCII numeric character string of 13 digits or less.
number
EndDisc End of disk definition.
Session Start of session.
Disk type CDROM, CDI, ROMXA , or SEMIXA.
[File name] Name of file that outputs the disk image (can be omitted).
EndSession End of session.
LeadIn Start of lead-in area definition for applicable session.
Track type CDDA, Mode 0, Mode 1, or Mode 2.
EndLeadIn End of lead-in area definition of applicable session.
Start of volume descriptor set definition.
Volume Start of volume descriptor set definition.
Volume type ISO9660 only is valid.
File name Name of output file of volume descriptor set.
EndVolume End of volume descriptor set definition.
LeadOut Start of LeadOut area definition for applicable session.
Track type CDDA, Mode 0, Mode 1, or Mode 2.
EndLeadOut End of LeadOut area definition for applicable session.
Track Start of track definition.
Track type CDDA, Mode 0, Mode 1, and Mode 2 differentiation.
EndTrack End of track definition.
SystemArea Defines system area of the ISO9660 volume.
File name Specifies MS-DOS filename of system area data.
PrimaryVolume Start of primary volume descriptor.
Relative Position on disk that the primary volume descriptor is
position recorded.
SATURN Virtual CD System User's Manual 45
Table 2 List of Script Keywords (2)
Keyword Parameter Description
EndPrimaryVolume End of primary volume descriptor.
Supplementary Start of supplementary volume descriptor.
Volume Relative Position on disk where the supplementary volume descriptor is
position recorded.
EndSupplementary End of supplementary volume descriptor.
Volume
BootRecord Start of boot record.
Relative Position on disk where the boot record is recorded.
position
EndBootRecord End of boot record.
Pause No. of blocks Specifies the number of blocks paused at the beginning of the
CDDA track that is recorded.
PreGap No. of blocks Specifies the number of PreGap data blocks recorded at
the beginning of the Mode 1 and Mode 2 tracks.
PostGap No. of blocks Specifies the number of PostGap data blocks recorded at
the end of the Mode 1 and Mode 2 tracks.
Empty No. of blocks Indicates the output of LeadIn and LeadOut null data (0x00).
Directory Directory Start of directory definition.
name
EndDirectory End of directory definition.
Preemphasis Switch Specifies the preemphasis bit value of the Q subcode channel.
Either TRUE or FALSE used for CDDA.
Channels No. of Number of channels specification. Either 2 or 4 used for CD DA.
channels
Copy Switch Copy-protection specification. Either TRUE or FALSE used for
CDDA.
Attributes Attribute Directory record attribute specification.
MinLength Byte count or Specifies the minimum number of bytes / number of sectors of
sector count the directory record.
RecordingDate Date Recording date of directory record.
Extent Start of file interleave definition.
Relative Position on disk in which interleave results are placed.
position
EndExtent End of file interleave definition.
FileInterleave Start of file specification that interleaves file.
Unit size UnitValue of the same file placed in succession in number of sectors.
Gap size Number of sectors occupied by other files.
EndFileInterleave End of specification of a file that interleaves files.
File Start of the file definition.
File name ISO9660 file name.
[output file] File name that outputs the result of file definition.
46
Table 3 List of Script Keywords (3)
Keyword Parameter Description
EndFile End file definition.
BeginTimeE Relative Position Relative time from the time that extent starts at the start
position on the disk in which files are placed within EXTENT.
EndTimeE Relative position Relative time from the time that extent starts at the end position
on the disk in which files are place within EXTENT.
BeginTimeS Relative position Relative time from the time that the session starts at the start
position on the disk in which a file or channel interleave is
placed.
EndTimeS Relative position Relative time from the time that the session starts at the end
position on the disk in which a file or channel interleave is
placed.
SourceType File source type File source data type.
One out of MONO_A, MONO_B, MONO_C, STEREO_A,
STEREO_B, STEREO_C, CDDA, ISO11172, VIDEO, DATA
FileSource Input file name Specification of the MS-DOS file that becomes the ISO9660
file.
EndFileSource End of specification of the MS-DOS file that becomes the
ISO9660 file.
SubSource Input file name Specification of the MS-DOS file in which subcode data is
entered.
SubEmpty Block count Output specification of null data to the subcode area.
BeginTimeF Relative position File source placement start position.
EndTimeF Relative position File source placement end position.
MpegMultiplex Start of ISO11172 stream definition.
[Output file File that outputs multiplex results.
name]
EndMpegMultiplex End of ISO11172 stream definition.
Trigger Position within Specifies the trigger position.
the file
Eors Position within Specifies the EOR (End of Record) position.
the file
MpegStream Start of MPEG stream definition.
Source filename Specifies the EOR (End of Record) position.
Data type Either AUDIO, VIDEO, or DATA.
EndMpegStream End of MPEG stream definition.
FileNo File number File interleaved file ID number.
Channel Channel number Start of channel definition.
EndChannel End of channel definition.
SectorRate Sector rate Specifies the number of sectors transferred in a 1 second
period using interleave. Either 75 or 150. Default is 150.
UnitSize Unit size Unit (number of sectors) that places the same channel
continuously during channel interleave.
GapSize Gap size Number of sectors occupied by different channels during
channel interleave.
Pack Specifies pack operation after channel interleave.
SATURN Virtual CD System User's Manual 47
Table 4 List of Script Keywords (4)
Keyword Parameter Description
BitRate Bit rate Bit rate of MPEG data.
[Sequence no.] The order of MPEG data that is specified. Default is 0.
SubHeader Subheader already added to file data.
Offset Specifies the part of the input file to be input.
Input position Read start position within the file.
Input length Read size.
DataType Mode 2 form Specifies form for Mode 2, either FORM 1 or FORM 2.
Reallocation When another file has been specified in the position where this
file is to be placed, the pre-specified file is avoided as the
placement is performed.
AutoEOR Records EOR (End Of Record) in subheader of sector that
stores the final byte of the file.
CodingInformation Coding Coding information is described by BCD.
information
RealTime File source is a real-time file.
SameName D + Identifier Indicates the directory name/filename identified by the
subvolume identifier.
SystemIdentifier Identifier Defines the system identifier.
VolumeIdentifier Identifier Defines the volume identifier.
LogicalBlockSize Defines the logical block size of the volume.
Size Any of these values: 512, 1024, 2048.
LPath LPath identifier write specification.
MPath MPath identifier write specification.
OptionalLPath Optional LPath table write specification.
OptionalMPath Optional MPath table write specification.
VolumeSetIdentifier Identifier Definition of the volume set identifier.
PublisherIdentifier Identifier Specifies the publisher identifier.
DataPreparer Identifier Specifies the data preparer identifier.
Identifier
ApplicationIdentifier Identifier Specifies the application identifier.
CopyrightField Filename Specifies the root level file of the primary volume, including the
Identifier copyright message.
AbstractFiled Filename Specifies the root level file of the primary volume, including
Identifier summary information.
BibliographicFile Filename Specifies the root level file of the primary volume, including
Identifier bibliographic information.
VolumeCreationDate Date Specifies the creation date.
VolumeModification Date Specifies the revised date of the last volume.
Date
48
Table 5 List of Script Keywords (5)
Keyword Parameter Description
VolumeExpirationDate Date Volume expiration date.
VolumeEffective Date Date Specifies the volume issue date.
ApplicationUse Filename Specifies MS-DOS files of data used for the application use
field.
ExcapeSequences Kanji code Specifies characters used by the subvolume identifier,
directory record, and path table. SHIFTJIS only is effective.
BootSystemIdentifier Identifier Specifies the boot system identifier of the boot record.
BootIdentifier Identifier Specifies the boot identifier of the boot record.
SysOwnerID Numeric string Specifies the owner ID to be recorded in directory system
information.
SysReadAttributes Specifies whether to permit reading of each user class
recorded in directory system information.
Owner attributes Either OWNER or NOTOWNER.
Group attributes Either GROUP or NOTGROUP.
World attributes Either WORLD or NOTWORLD.
SysExecuteAttributes Specifies whether to permit execution of each user class
recorded in directory system information.
Owner attributes Either OWNER or NOTOWNER.
Group attributes Either GROUP or NOTGROUP.
World attributes Either WORLD or NOTWORLD.
SATURN Virtual CD System User's Manual 49
4.0 Emulator Displays
The VCD emulator screen is composed of the six sections shown in Figure 5.
Top Bar
Menu ■ No Log File ■ Help
Command Atime FAD Message Status:PREFD Information .
Mode Window
***** ***** ***** CD-ROM Simulator ***** ***** *****
Log Window
= Toc Table Loaded =
= Rel Table Loaded = Mode : DIRECT
VIEW : ALLWAYS
N0P 00:00:00 000000..................... 00000 Disc : SINGLE
= Start II =
Jumper Window
*Int Add:0000:0000
GETBUF 00:00:00 000000c:80 Nop:000 0ut:0000000
I//0 Base ; 00
Intrrpt : 02
DMA Chnl: 00
Buffer Window
Buffer :00/75
Bottom Bar
[Space]=Menu [ESC]=Help 0001/0009
Figure 5. VCD Emulator Screen Display
Top Bar
The top bar has two pull-down menus, Menu and Help (Help is not installed yet).
The center of the bar displays the name of the log information file specified during
VCD emulator launch. When no log information file is specified, “No Log File” is
displayed. Under it, a bar indicates the display position of the information within
the log window. This bar is usually purple, but turns yellow in Log View mode.
Bottom Bar
In the right corner, the bottom bar displays the number of the current display’s log
information line relative to the total number of log information lines.
Log Window
This window is divided into bands of blue and light blue. A scroll bar on the right
side of the screen indicates the position of the current log information display per
total items of log information.
50
Mode Window
The mode window displays the following three modes.
• VCD emulator mode
Direct: Direct DOS file access
Realtime: Real-time emulation
• Screen Display Mode
Always: Mode that displays all log information
Error: Mode that displays error information only (not implemented at this
time)
Logview: Mode for viewing log information
• CD Speed
Single: Single speed
Double: Double speed
Jumper Window
This window displays jumper settings. This window is the middle window out of the
three located on the right side of the screen.
Buffer Window
This window displays the usage level of the buffers set up by the application. This
window is the lowest window of the three on the right side of the screen.
4.1 Log Window
The log window displays messages in two formats:
• Command display
• Other messages
Command Display
In command display, messages are divided into data fields. The meaning of each field
is as follows, in order from left to right. The field headings are displayed on the row
directly under the top bar.
Command Atime FAD(10) Rtc Nop Out PREFD
Play 00:02:00 96 0x80 00230 0000 01000
Stop 00:00:00 00 0x80 00015 0010 11000
Pause 00:00:00 00 0x80 00030 0010 11000
Play 2 00:10:05 2F3 0x80 00224 0000 01000
• Command
Displays the command name. The number displayed after a command name
indicates whether the drive speed is single or double. A “2”shows that a double
speed command has been received.
SATURN Virtual CD System User's Manual 51
• Atime (Absolute Time)
When a command is received that has an access position as its parameter, that
parameter value is displayed. The format is mm:ss:ff, where mm is minutes, ss is
seconds, and ff is frames. For commands that do not have an access position, the
parameter 00:00:00 is displayed.
• FAD (Frame address)
Displays the absolute time in terms of frames, either in decimal or hexadecimal
numbers (default setting is in decimal format). For example, when the absolute
time displayed is 00:02:15, this field is displayed as 165 (75 x 2 + 15). "FAD (10)"
denotes the display of data in decimal format.
• Message
Displays the number of NOP commands and the number of data transfer frames.
The number of NOP commands is determined by counting the number of NOP
commands issued between other commands. The value shown in the current line
indicates the number of NOPs received since the last command and the current
command. The number of frames is determined by counting the frames trans-
ferred to the VCD interface board from the receipt of the command that initiated
the data transfer to the current command acknowledged by the system. Accord-
ingly, this value is greater than the numbers (default setting is in decimal format)
received by the target box.
• Status
This shows the status of the VCD interface board when it receives a command.
Otherwise, “StatusPREFD" is displayed. It is a sequence of five 0s or 1s in
varying combinations depending on system status. Their meaning, from left, is
as follows.
• 1 indicates Play. This digit is always 0. It is not set by the VCD interface board.
• 1 indicates Ready. This digit is 1 if the system is normal.
• 1 indicates Error. It means that some kind of error has occurred.
• 1 indicates DiskEnd (Finish). It is always 0. It is not set by the VCD interface board.
• 1 indicates DmaEnd. It is used during playback to indicate the end of data transfer.
Other Messages
Other messages, such as error messages, are not assigned to fields.
4.2 Menu Screen Functions
Menu in the top bar is highlighted when the SPACE bar is pressed. Menu and Help can be
selected with the LEFT and RIGHT cursor. If ENTER or the DOWN cursor is pressed,
the content of the selected menu appears.
52
Menu
Log Indication
View: Always
Log Indication Error Only
FAD Form
Information FAD Form
Decimal
Hexadecimal
Open CD Tray
Close CD Tray
Exit Information
TOC Information
REL Information
FILE Information
The menu item is selected by highlighting the item using the UP and DOWN cursor
keys. The selected item can then be executed by pressing the ENTER or SPACE key.
View
• Log Indication
This mode is used to see log information. When this menu item is selected, the
color of the top bar changes from purple to yellow. You are in LogView mode
when the color of the top bar is yellow.
By pressing the UP and DOWN cursor keys or the PAGE UP and PAGE
DOWN keys, it is possible to trace up to a maximum of 500 lines of log data
from the last displayed log data.
• Always
This mode displays all log data. When selected, the View display in the mode window
changes to Always.
• Error Only
When this mode is selected, only error information is reported. Selecting this mode
changes the View display in the mode window to Error.
• FAD Form
Selects the frame address display format of the log window.
• Decimal
Displays in decimal.
• Hexadecimal
Displays in hexadecimal.
Information
• TOC Indication
This mode displays TOC data. When selected, the TOC information window
opens in the center of the screen.
SATURN Virtual CD System User's Manual 53
TOC Information
>>>>> Disk ID = CD-ROM Version = 1
[ Tr 01 BeginTime=00:02:00
[ Cont=c Control=4
[ Tr O2 BeginTime=00:02:34
[ Cont=c Control=4
[ Tr O3 BeginTime=00:02:35
[ Cont=4 Control=4
>>>>> Lead Out = 00:02:26
EOF
Use the UP/DOWN cursor keys or the PAGE UP/PAGE DOWN keys to review
the TOC data. Press the ENTER or ESC key to exit this mode.
• REL Information
This mode displays relational table data. When this menu item is selected,
the relational table data window opens in the center of the screen.
REL Information
>>>>> TrNo 00 --- ISO9660 Files:1
IsoFile=handa.pvd
[ DosFile=handa.pvd
[ Lsn=0
>>>>> TrNo 01 --- ISO9660 Files:1
IsoFile=¥stage¥1vvv.rtf
[ DosFile=test10.dat
[ Lsn=22
>>>>> TrNo 02 --- ISO9660 Files:3
Use the UP/DOWN cursor keys or the PAGE UP/PAGE DOWN keys to
review the relational table data. Press the ENTER or ESC key to exit this
mode.
• FILE Information
This mode displays file information on the currently selected file. When this
function is selected, the File Information window is opened in the center of
the screen.
54
File Information
DSK File : sonic.dsk
RTI File : sonic.rti
SCR File : sonic.scr
Log File : No Log File
Use the UP/DOWN cursor keys or the PAGE UP/PAGE DOWN keys to review
the relational table data. Press the ENTER or ESC key to exit this mode.
Open CD Tray
This function executes the "open CD tray" function of the CD drive on the VCD system.
Close CD Tray
This function executes the "close CD tray" function of the CD drive on the VCD system.
Exit
Quits out of the Virtual CD Emulator. After this menu item is selected, pressing any
key will terminate the program.
5.0 Resource Notes
This chapter gives an overview of the Virtual CD system software components and
their specifications.
5.1 Directory Structure
The VCD system's software is distributed with the following file directory structure.
A:\SATURN\SEGABIN\VCD\ VCDEMU.EXE VCD Emulator
VCDBUILD.EXE Preprocessing program for generating the disk image
VCDPRE.EXE Preprocessing program for direct DOS access mode
VCDUTL.EXE Preprocessing program for partial update of the disk image
VCDMKTOC.EXE Program for generating the TOCInfo for Write Once
JVC.SCR Sample script
JVC.PRE Sample startup file
SATURN Virtual CD System User's Manual 55
5.2 Release Program
VCDEMU.EXE
Command: VCDEMU
Command name: VCD Emulator
Function: Performs virtual CD emulation. This software is capable of forcing error
conditions during emulation.
Format: VCDEMU body of file name [-f RTI file name] [-l log file
name] [-j jumper setting position] [-u revise informa-
tion file]
Description: When all option settings are omitted, the following data files with separate
file extensions are used:
.scr Script file
.dsk Disc image file
.rti Default disc image data file
Note that the log data file is not created.
When the -f option is used, the file name for the disc image data file will be
the name specified with the option.
When the -l option is used, the log data file is created with the specified
name.
The -j option is used to set up the VCD interface board's jumper numbers.
The values are the same as the VCDIO configuration parameters.
It is possible to intentionally simulate data transfer errors during the transfer of
MODE1 and MODE2 data by hitting the "S" key on the keyboard.
Example: VCDEMU TSTGAME
VCDEMU Error Messages
The error messages displayed by the Virtual CD emulator are explained below. Two
asterisks (**) denote numbers and four asterisks (****) denote a text string. Error
messages are displayed in red characters on-screen.
Cannot allocate read buffer
Unable to allocate a buffer for reading data files.
Cannot find RTI file ****
Unable to find the specified RTI file.
Cannot find the beginning of TOC info.
Unable to find the keyword within a specified RTI file that marks the start
of TOC information.
56
Cannot find the beginning of REL info.
Unable to find the keyword within a specified RTI file that marks the start
of the relational data table.
Cannot allocate memory for ISO9660 file info.
Unable to allocate memory for storing ISO9660 file information.
Cannot allocate memory for DOS file info.
Unable to allocate memory for storing DOS file information.
Illegal relation table
Error in the relational data table.
Cannot open log file = ****
Unable to open the specified log file.
Cannot find DOS file in track **
Unable to find DOS file that matches the specified addresses in track**.
No File at this LSA **
Unable to find DOS file that matches the specified absolute time.
File <****> cannot be opened
The DOS file **** could not be opened.
Illegal offset
An address was specified that exceeds the size of the disc image file during
real-time emulation.
Not read
Failed to read data from the DOS file.
Cannot read data from disk image file
Unable to properly read data from the disk image file.
TOC is not loaded
An attempt was made to display the TOC data without it being loaded.
REL table is not loaded
An attempt was made to display the relational data table without it being
loaded.
VCDPRE.EXE
Command: VCDPRE
Command name: Creates a disc configuration data file
Function: Creates disc configuration data file required for direct DOS file access mode
CD emulation.
Format: VCDPRE startupfile [/i /d /f /c /l]
Description: A script file and a disc configuration data file are specified for the startup
file. The script is input from the specified script file and a disc configuration
data file that describes the configuration of the disc is then output. The
resulting disc configuration data is verified and error messages are output if
necessary. File names are assigned to the startup file by specifying the file
name after the keyword and a space.
SATURN Virtual CD System User's Manual 57
SCR Script file name
RTI Disc configuration data file name
Options
/i Display ISO9660 processing
/d Display input DOS file processing
/f Display file interleave placement table
/c Display channel interleave placement table
/l Large file processing switch. XMS memory is used when /l is
added.
Example: VCDPRE TSTGAME.PRE
The content of the startup file VCDPRE.PRM is as follows:
—
SCR TSTGAME.SCR
RTI TSTGAME.RTI
—
VCDPRE Error Messages
The following is an explanation of error messages and troubleshooting tips.
(Note: **** refers to character strings, ** refers to numbers.)
Common Errors
The following are common text handling and command syntax errors.
String length error
The character string is too long. The maximum permissible number of charac-
ters on 1 line is 255 bytes.
Out of memory space
Unable to allocate memory. Available memory can only be expanded by
deinstalling drivers and other miscellaneous software.
Illegal character
An illegal character code is contained in the character string.
Syntax error
A syntax error.
Cannot open File ****
The file **** cannot be opened. Check to make sure that a file by that name
actually exists.
Illegal token
A syntax error. The cause of the error may be a mistake in the reserved word
at the start of the line.
Illegal parameter **
A syntax error. The source of the error may be an incorrect format of the nth
parameter in a line identified by the number **.
Illegal nesting of Include
Too many Include nests. Only 2 levels of Include are allowed.
58
Block Errors
The following errors occur when the relationship between the Block and EndBlock
statements are incorrect. The generation of this error may mean that any following
blocks may be offset. Accordingly, similar errors will occur later on. Errors of this
type may be completely resolved if the error at the beginning is corrected (i.e., fol-
lowing errors that result from the initial errors will be corrected).
Illegal nesting of Block
Too many block nests.
Illegal definition of Endblock
Too many EndBlock definitions.
Expected ****
There is no block declaration that is implied by ****. Either **** is not declared,
or there may be an unnecessary End****.
Illegal definition in **** block
This command can be defined only within the **** block.
Illegal nesting of Directory
Directory nesting is too deep. Only 8 directory levels are allowed.
**** block is not closed
**** block is not closed. **** may be unnecessary.
Parameter Errors
These errors occur when the spelling of the parameter character is incorrect or
the legal value range for the parameter is exceeded.
Illegal MS-DOS file name ****
The character string **** contain illegal characters or syntax for MS-DOS
file names.
Illegal ISO file name ****
The character string **** contain illegal characters or syntax for ISO9660 file
names.
Illegal Directory name ****
The character string **** contain illegal characters or syntax for ISO9660
directory names.
Illegal Disc type ****
The disc type **** is incorrect.
Illegal Track type ****
The track type **** is incorrect.
Illegal Offset ****
The relative position specification is incorrect.
Illegal Stream type ****
The stream type is incorrect.
Illegal Volume type ****
Error in volume type.
Illegal location of Primary Volume Descriptor
The relative time of the primary volume must be 00:02:16 or greater.
Illegal Catalog number
A character other than a number is written in the catalog number.
SATURN Virtual CD System User's Manual 59
Illegal Switch ****
The switch handles TRUE or FALSE only.
Illegal Attribute ****
The attribute definition **** in incorrect.
Illegal Date or Time
The legal range for either the date or time value has been exceeded.
Illegal File No
The FileNo is not a value between 1 to 255.
Illegal Source type ****
The source type**** is incorrect.
Illegal Data type ****
The data type**** is incorrect.
Illegal Coding Information
The coding information is not a value between 0 to 255.
Illegal character in Identifier ****
The identifier **** contains an illegal character.
Illegal Escape Sequence ****
The escape sequence **** is incorrect.
Illegal Unit size
The unit size is 0. 0 cannot be set in the unit size.
Illegal Channel count
Either 2 or 4 can be set for the channel count.
Illegal Channel number
The channel number must be a value of 0 to 255.
Illegal MinLength
The MinLength value cannot be 0.
Illegal SectorRate
Only 75 or 150 can be set for the SectorRate.
Illegal BitRate
0 cannot be set for the bit rate value.
Illegal Logical Block size
Only 512, 1024, or 2048 can be specified for the LogicalBlockSize.
Attribute Errors
These errors are produced by syntactically correct statements that typically contain
setup errors.
**** is already defined
The item **** is already defined..
CDDA cannot be defined in the first track
A CDDA track cannot be specified as track 1.
Illegal command in the CDDA track
This command cannot be defined within the CDDA track. Be sure to check the
track type.
This command can be defined in the CDDA track only
This command can be defined only within the CDDA track. Be sure to check
the track type.
60
BeginTime and EndTime cannot be defined in a block
BeginTimeX and EndTimeX cannot be defined within the same block.
Filesource type error in an ISO-file
An incorrect file source type is defined within one ISO file.
Filesource type error in a Channel
An incorrect file source type is defined within one channel.
Definition error of BeginTimeE and EndTimeE
BeginTimeE and EndTimeE can be defined only within the extent block.
Definition error of **** in a Channel block
**** can be defined only with a channel block.
Illegal BeginTimeS
BeginTimeS must be a value that is greater than 00:02:16.
Illegal ExtentTime
ExtentTime must be a value that is greater than 00:02:17.
SameName can be used when the Supplementary Volume is defined
SameName is effective when the Supplementary Volume is defined.
Primary Volume is not defined
No primary volume is defined. At least one Primary Volume must be defined.
LeadIn is not defined
LeadIn is not defined before track definition.
Illegal LeadOut tracktype
The LeadOut track type is not the same as the final track. The LeadOut track
type must be the same as the final track type.
MpegMultiplex can be defined once in a block
MpegMultiplex can be defined only once in a block.
Disc is not defined
The disc is not defined.
BitRate is not defined
The BitRate is not defined.
**** is not defined
The **** block is not defined.
Illegal track number
Too many tracks. Only a maximum of 99 tracks is allowed.
Any track is not defined before LeadOut area is start
A track has not been defined before LeadOut.
Filesource definition error in the CDDA track
The file source and file definition are mixed in the CDDA track.
Illegal track type on DiscType “CDROM”
When the disk type is a CD-ROM, Mode 2 cannot be used for the track type.
This command can be used in the MODE 2 track only
This command is legal only in a Mode 2 track.
Illegal track type in LeadIn area
Only Mode 1 can be specified for the LeadIn track type.
Illegal track type in first track
Only Mode 1 can be specified for track 1 track type.
SATURN Virtual CD System User's Manual 61
Channel number is already defined
The channel number has been already defined.
Expected CloseBracket
The open bracket "[" within a macro definition is not closed with a close bracket "]".
Macro **** is not defined
The macro name **** is not defined.
All FileNos are not defined
All file numbers are not defined.
FileNo error
An identical file number is defined in the file interleave.
Too many ISOFiles
There are too many ISO file definitions in the file interleave.
ISOFile definition error
There are multiple ISO file definitions within one file interleave.
VCDBUILD.EXE
Command: VCDBUILD
Command name: Creates a CD image file.
Function: Generates and outputs the CD image to the file defined in the
script file.
Format: VCDBUILD startupfile [/i /d /f /c /l]
Description: The script file and disk configuration data files are specified in the startup file.
The script is input from the specified script file and a disc configuration data file
and a CD image are output.
Options:
/i Display ISO9660 processing
/d Display input DOS file processing
/f Display file interleave placement table
/c Display channel interleave placement table
/l Large file processing switch. XMS memory is used when
/l is added.
Example: VCDBUILD TSTGAME.SCR
• Startup Messages
PreProcess for VCDEMU <VCDPRE> Ver n.nn Released at dd-mmm-yyyy
Copyright (c) 1994 Victor Company of Japan <JVC>
script file = xxxxxxxxxx
rti file = xxxxxxxxxx
vds, path table and directory records output to xxxxxxxxxx
62
• VCDBUILD Error Messages
General Error Messages
———:nnn xxxxxxxxxx
———: open error: xxxxxxxxxx
———: write error: xxxxxxxxxx
———: read error: xxxxxxxxxx
———: read error: too big SYSTEM AREA
———: over limit of directory hierarchy: xxxxxxxxxx
———: Same Directory : xxxxxxxxxx
———: Overlapped Sector, check Unitsize and Gapsize: xxxxxxxxxx
———: Over specified File or Extent Space: xxxxxxxxxx
———: Not Specified Base End Time for EndTime {E,F} [-]): xxxxxxxxxx
———: Relocation Channel Overlapped to Same Channel: xxxxxxxxxx
———: Move Location: xxxxxxxxxx
———: Isofile or CDDA track Has No Source, Delete This Area: xxxxxxxxxx
———: Track Has No Isofile, Delete the Track: xxxxxxxxxx
———: Less Memory for This Program: xxxxxxxxxx
———: Some Fatal: xxxxxxxxxx
———: Internal Error (maybe BUG): xxxxxxxxxx
Option /i Related Error Messages
nnnnnn: write System Area
nnnnnn: write Primary Volume Descriptor
nnnnnn: Boot Record
nnnnnn: Volume Partition Descriptor
nnnnnn: write Volume Description Terminator
nnnnnn: write MPath Table
nnnnnn: write LPath Table
nnnnnn: write Directory Records for Directory <root>
nnnnnn: write Directory Records for Directory xxxxxxxxxx
nnnnnn: Extent Begin
nnnnnn: ISO-file xxxxxxxxxx Begin
Option /d Related Error Messages
nnnnnn: source dos-file xxxxxxxxxx
nnnnnn: Open Subsource file
nnnnnn: LeadOut Begin
Option /f Related Error Messages
———: Disposition pattern for File Interleave
nnnn]nnn:nnn:nnn:nnn:nnn:nnn:nnn:nnn:nnn:nnn:nnn:nnn:nnn:nnn:nnn:nnn:
:
nnnn]nnn:GAP:nnn:nnn:nnn:GAP:nnn:nnn:nnn:GAP:nnn:nnn:nnn:GAP:DMY:DMY:
SATURN Virtual CD System User's Manual 63
Option /c Related Error Messages
———: Disposition pattern for Channel Interleave
nnnn]nnn:nnn:nnn:nnn:nnn:nnn:nnn:nnn:nnn:nnn:nnn:nnn:nnn:nnn:nnn:nnn:
:
nnnn]nnn:GAP:nnn:nnn:nnn:GAP:nnn:nnn:nnn:GAP:nnn:nnn:nnn:GAP:DMY:DMY:
VCDUTL.EXE
Command: VCDUTL
Command name: Performs partial update of CD image.
Function: Updates files in the CD image generated by VCDBUILD.
(1) An ISO file in the CD image is replaced with a specified DOS file, and the
CD image is updated. The ISO file can either be file interleaved or
channel interleaved. This enables faster emulation without the need for
rebuilding the entire disc image.
(2) An ISO file in the CD image is replaced with a specified DOS file, and
while the CD image remains unchanged, the updated disc data is created.
The ISO file can be file interleaved, but channel interleaved file is not
updated. Only the updated part is emulated under direct DOS file access
mode.
Note: In the case of (1), the replacement DOS file must be the same size or smaller
than the DOS file that is replaced. If the size of the new file is larger than the
old file, an error message is displayed and the image is not updated. In
addition, any DOS files (with the exception of MPEG and CDDA files) can be
updated.
There are no particular restrictions for item (2).
Format: VCDUTL projectfilename, ISOfilename, oldDOSfilename,
newDOSfilename [-f updatedatafilename]
Description: • projectfilename:
Project file used when creating the CD image.
• ISOfilename:
File name from the CD image to be updated.
• oldDOSfilename:
File name from the ISO files to be updated.
• newDOSfilename:
Name of the file that replaces the old DOS file.
• updatedatafilename:
Rather than updating the entire CD image, an update data file is gener-
ated. This file contains the updated information that is used by the VCD emula-
tor.
64
Example:
VCDUTL∆TSTGAME∆ISO1FILE.DDD∆DOSAUDIO.D01∆DOSAUDIO.D02
∆[-f∆DOSAUDIO.PAT][ENTER]
VCDUTL Runs VCDUTL.
TSTGAME Project name used to create the CD image
that is being updated.
ISO1FILE.DDD ISO file name that contains the DOS file to
be updated.
DOSAUDIO.D01 The name of the DOS file to be updated.
DOSAUDIO.D02 Replacement DOS file name.
Options
-f Option
Name of the update data file used to replace the DOSAUDIO.PAT DOS file (can be a
user specified file name).
When this option is specified, the CD image itself will not be updated. This
update data file will be used during emulation.
If this option is not used, the CD image itself will be updated without the update
data file being output.
There are two methods for editing multiple DOS files for one CD image:
(1) Commands are executed repeatedly with the -f option.
(2) Commands are executed repeatedly with the -f option without
changing the update date file name.
Note that the CD image remains in an unchanged state with method (2).
Check Items
When the -f option is used, an error will occur if the ISO file containing the speci-
fied update DOS target file is channel-interleaved. After the error occurs, the com-
mand will terminate without any further processing.
When the -f option is not used, an error will occur if the DOS file size is unsuitable.
VCDUTL Error Messages
Cannot open CD image file.
The target CD image file does not exist or could not be opened. Check to see
whether the CD image file exists.
Cannot find iso file [test].
The ISO file “test” could not be found among the CD image files.
Refer back to the script file and enter the existing ISO file name.
SATURN Virtual CD System User's Manual 65
Cannot find DOS file [test].
The target update file "test" could not be found among the RTI files. Check the
script file and enter the existing DOS file name.
Cannot find Project file [test].
The project file “test” does not exist or failed to be opened. Specify a valid file
name.
Cannot find RTI file [test].
The RTI file named “test” does not exist or failed to be opened.
Confirm whether the RTI file noted within the project file exists.
DOS file [test] is channel interleaved.
When an attempt to create the update data file is made by the -f option, VCDUTL
detects the file "test" as being channel interleaved. Since the channel interleaved
file cannot undergo direct DOS mode emulation, this file cannot be specified.
New DOS file [test] open error.
The source update DOS file does not exist or failed to open. Specify the correct
source DOS file.
New DOS file size [a byte] is larger than old DOS [b byte].
The size of the replacement DOS file is larger than the size of the DOS file to be
replaced. Specify a DOS file that is less than or equal in size to the update target
DOS file.
VCDMKTOC.EXE
Command: VCDMKTOC
Command Name: Creates TOC data file required by the CD writer.
Function: Extracts the TOC information necessary to create a write once CD from the
final RTI file. The data is converted and output to the file format recognized
by the writer's operating system.
Format: VCDMKTOC mainRTIfilename
Description: Input file = mainRTIfilename.RTI
Output file = mainRTIfilename.TOC
Example: VCDMKTOC∆TSTGAME
66
5.3 Sample Data
File Configuration
• JVC.SCR Sample script
• JVC.PRM PRE/BUILD startup parameter file
• PAT_1.DAT 10 KByte increment data
• PAT_10.DAT 130 KByte increment data
• JVC.RTI PRE/BUILD output data file
• JVC.PVD PRE output data file
• JVC1.ABS Ver. 1.02 Sample program for Model-S
SEGA SATURN Programming Box
• JVC1.INI Sample execution command file
• SYSTBL.TSK
• SDDRV.TSK Sound initialization file
• NEWMAP.BIN
• VCDMKDAT.EXE Creates two sound data files in the
current directory. Each file has a data
size of approximately 1.4 MBytes.
See the chapter on setup at the beginning of this manual for
installation and execution instructions.
Check Items
Make sure to check the following:
• CD-ROM file name
• CD-ROM data reads
• CDDA output
The CD-ROM test results are normal when COMPLETE is
displayed next to each item. The CDDA is normal if a sine
wave (440 Hz, -10dB) and square wave (440 Hz, -10 dB) are
played back correctly.
Basic Operation Method
The operations are performed via the A and B buttons of the control pad. The A
button executes the selected test item. Use the A button also to proceed to the next
item. Press the B button to skip the test item. The START button always returns the
system to the startup screen.
SATURN Virtual CD System User's Manual 67
CD-ROM DIRECTORY CHECK
VCD CHECK PROGRAM
VER 1.0
[A] EXEC [B] SKIP [A] EXEC [B] SKIP
[Opening Screen] [1. CD-ROM Directory Read]
Startup Screen
Press the A button to move to the first test item.
1. CD-ROM Directory Read
The ISO9660 format directory is displayed. Only the first 8 entries of the root
directory (actually 6 entries since 8 entries include self and parent) are displayed.
Directory attributes are also displayed.
Display of OK indicates a legal file name and size. COMPLETE is displayed at
the bottom of the screen to indicate that the check has ended. If an error is de-
tected, an error message is displayed.
CD-ROM DIRECTORY CHECK CD-ROM DIRECTORY CHECK
ROOT DIRECTORY (FIRST 6 ENTRIES ONLY) ROOT DIRECTORY (FIRST 6 ENTRIES ONLY)
NAME SIZE ATTR NAME SIZE ATTR
. 2048 DIR
. 2048 DIR .. 2048 DIR
.. 2048 DIR BADFILE.DAT 10
ABCDEFGI.DAT 10740 DADDIR 2048 DIR
D10 1300000 DATA.DAT 1000000
README.DAT 323
FILENAME 0K FILE NAME NG
FILE SIZE 0K FILE SIZE --
COMPLETE [A]NEXT NG [A]NEXT
[2. CD-ROM Data Read] [3. CDDA Play]
2. CD-ROM Data Read
Since the contents of ABCDEFG1.DAT and D10 are known, a check is performed
by reading and comparing data. When finished, COMPLETE is displayed at
the bottom of the screen to indicate that the read has been completed. The
program then waits for button A to be pressed.
68
3. CDDA Play
Plays sound using track 2 and 3 data. Audio is played back automatically.
Play track 3
Play track 4
Play tracks 3 and 4, repeat 3 times
Pause track 4
Resume play on track 4 after pause is cleared
TNO, ATIME, and status are always displayed on the screen.
COMPLETE is displayed at the bottom of the screen to indicate that the test has
ended. The program then waits for button A to be pressed.
SATURN Virtual CD System User's Manual 69
INDEX
Absolute Time ........................................ 52 Script ........................................................ 42
Bottom Bar .............................................. 51 Script Command List ........................... 46
Buffer Window ....................................... 52 Session Definition ................................. 26
CD Block ................................................... 3 Status ...................................................... 53
CD Configuration Information Files ... 17 TOC Indication ...................................... 54
CD Emulation System ............................. 3 Top Bar ................................................... 51
CD Image File .................................... 15,17 Track Definitions ................................... 29
CD Image Update .................................. 15 Update Operation ................................. 18
Channel Interrupt File definition ........ 32 VCD (Virtual CD) ................................... 3
Close CD Tray......................................... 55 VCDBUILD.EXE ................................... 62
Command ............................................... 52 VCDEMU.EXE ...................................... 56
Data Files ................................................. 15 VCDMKTOC.EXE ................................. 66
Date .......................................................... 25 VCDPRE.EXE ........................................ 58
Defining entire disk ............................... 26 VCDUTL.EXE ........................................ 64
Direct DOS File Access .......................... 14 VCD I/F Board ........................................ 3
Directory Definition .............................. 30
Exit ........................................................... 55
FAD Form................................................ 54
FILE Information ................................... 55
File Definition ......................................... 31
File Interleave File Definition............... 31
File Source Definition ............................ 34
Frame Address ....................................... 52
I/O Address.............................................. 6
Identifier .................................................. 25
ISA-DMA .................................................. 6
ISA-IRQ ..................................................... 6
ISO9660 File name ................................. 25
Jumper Window ..................................... 52
Line Definition ....................................... 36
Log Indication ........................................ 53
Log Window ........................................... 51
Messages ................................................. 51
Mode Window........................................ 51
Open CD Tray......................................... 55
Real Time Emulation ............................. 15
REL Information .................................... 55
Relative position in a file ...................... 25
Relative position in a session ............... 25
70
TM
Virtual CD System
Supplementary
Manual
Ver. 1.0
Doc. # ST-129-R2-SP1-061995
© 1995 SEGA. All Rights Reserved.
Virtual CD System
Supplementary Manual er.
V 1.0
1.0 Supplementary Information on the Emulator
.................................................... 3
1.1 New Options for VCDEMU.EXE............................................................................ 3
1.2 The Number of Tracks and Indexes that Can Be Emulated ................................ 4
1.3 Scan Play Function .............................................................................................. 4
2.0 Supplementary Description of Scripts
.............................................................. 5
2.1 Cancellation of VCDPRE.EXE Restrictions ........................................................... 5
2.2 Restrictions and Other Notes .............................................................................. 5
2.3 Example of a Script Statement ............................................................................ 8
2.4 The Effects of the Pack Line on Channel-Interleaving......................................... 13
2.5 Specifying Relative Time ..................................................................................... 14
2.6 The Relationship Between Sector Rates and Bit Rates ...................................... 16
3.0 Supplementary Description of the Updateool
T VCDUTL.EXE............................ 17
3.1 Introduction .......................................................................................................... 17
3.2 Revisions to the Main Manual ............................................................................. 17
3.3 Example of Executing a Partial Update ............................................................... 18
4.0 Byte Swap Tool SWAP.EXE............................................................................... 20
4.1 Introduction .......................................................................................................... 20
4.2 Usage .................................................................................................................. 20
5.0 Script Keywords.............................................................................................. 21
Index ...................................................................................................................................... 26
Virtual CD System Supplementary Manual Ver. 1.0 1
(There is no page 2 in the original Japanese document.)
2
1.0 Supplementary Information on the Emulator
1.1 New Options for VCDEMU.EXE
The new options included in VCDEMU.EXEand their uses are discussed below.
-ib:
Sets the size of the input buffer. An integer between 2 and 8 can be specified. For
example, the following sets a size of 8 KB (4 KB x 2):
-ib 2
The default size is 32 KB (specified by a value of 8).
-vb:
Specifies the size of the transfer buffer. An integer between 14 and 37 can be speci-
fied. This option specifies the number of buffers that are each equivalent to 1 sector
in size. For example, when the following is specified,
-vb 14
14 transfer buffers are allocated. The default is 37 transfer buffers. However, fewer
buffers may be allocated depending upon the available memory in the system.
After startup, the input buffer size and the number of transfer buffers allocated are
displayed on the lower right area of the screen as follows.
Buffer: 02/07
The numerator indicates the input buffer size (in 4 KB units) and the denominator
the number of transfer buffers. The number displayed for transfer buffers is an
integer value divided by 2.
Virtual CD System Supplementary Manual Ver. 1.0 3
1.2 The Number of T racks and Indexes that Can Be Emulated
When there are an unusually large number of tracks or indexes within a track, the
two options described earlier (-ib and -vb) can be used to conserve memory and
ensure successful emulations. This is done by decreasing the amount of buffering or
adjusting the balance between the input buffer and transfer buffer.
The appropriate settings will vary depending upon the amount of free space avail-
able in the conventional memory of the PC compatible being used, the length of the
file name, and so on. The table below is an example of settings when 585 KB of free
space is available in conventional memory.
Total No. of Indexes -ib Setting -vb Setting
2000 Setting not required Setting not required
3000 Setting not required Setting not required
4000 Setting not required Setting not required
4500 4 Setting not required
5000 2 14
If the above options are not set at startup, the program can emulate approximately
4,000 tracks and indexes (i.e., the total number of tracks x number of indexes). With
the minimum setting of -ib 2 -vb 14, the total number is about 5,000. When the
default settings are used, approximately 40 indexes per each track with a maximum
of 99 tracks can be emulated, or a disc image with up to 50 indexes can be emulated
when the buffer setting is at a minimum.
The disc builder program VCDBUILD.EXEon the Virtual CD can create disc images for
approximately 10,000 tracks·indexes (maximum 99 tracks x 99 indexes). However,
the number of tracks·indexes that can be emulated using the emulation program
VCDEMU.EXEis limited to approximately 5,000.
1.3 Scan Play Function
CD-DA tracks can be played back in fast forward or in reverse while in real-time
emulation mode. Playback can be controlled from the SEGA SATURN's Audio CD
control screen. Take note that normal scan play is not possible in the direct DOS
access mode.
4
2.0 Supplementary Description of Scripts
2.1 Cancellation ofVCDPRE.EXE Restrictions
(1) The keywords in a script statement are no longer case sensitive. For example,
Disc can now be DISC, disc, diSc and so on. Parameter statements, however,
remain case sensitive and therefore the disc type CDROM or SEMIXA must be
specified in upper case in the Session lines.
(2) All keywords may now be used.
(3) PVD and SVD do not need to be defined since data is automatically added by the
system for the two keywords LPath and MPath.
(4) The relative position parameter defined in the Extent line may be omitted.
(5) An empty line need not be specified in the LeadIn definition . The lead-in area
is not output to the disc image that is created.
2.2 Restrictions and Other Notes
(1) The disc types that can be defined in a Session line are now limited to CDROM
and SEMIXA; CDI and ROMXA cannot be defined.
(2) The only track type definable in a LeadIn line is now MODE1.
(3) The track type that can be defined in a LeadOut line is limited to that used in the
final track. Therefore, if the final track is a CD-DA track, the lead-out area must
also be a CD-DA track.
(4) Specify a empty line in the LeadOut definition. When omitted, the size of the
lead-out area output to the disc image becomes 0. While the emulator will
function with a lead-out area of 0, a size of 300 or more blocks is recommended to
ensure proper operation.
(5) Specify a PostGap line as needed at the end of the data track. If omitted, the
post gap size becomes 0.
(6) For the ISO9660 file name + version number defined in a File line:
• When the version number is omitted after the semicolon in
filename.extension;versionnumber , a version number of ;1 is added as the
default.
• When ;0 is stated as the version number, ;0 is omitted and the file name is
set without a version number.
Virtual CD System Supplementary Manual Ver. 1.0 5
(7) Channel-interleaving between MPEG files and multi-DOS files is achieved by a
two pass method. This method involves building an ISO11172 stream by multi-
plexing the MPEG video stream and MPEG audio stream, and then using this
ISO11172 stream as a source file to channel-interleave again with the multi-DOS
file.
Steps for Execution
1) Multiplex the MPEG video stream and MPEG audio stream to create a script (script 1) that
outputs the ISO11172 stream as a DOS file.
2) Run VCDBUILDusing script 1.
3) Create a script (script 2) that channel-interleaves the resulting ISO11172 stream and the
multi-DOS file.
4) Run VCDBUILDusing script 2.
(8) When an ISO file includes a MpegMultiplex line, a SectorRate line must be
defined immediately after the File line.
(9) Any positive integer value between 1 and 65535 can either be specified for the
sector rate parameter defined in the SectorRate line or omitted. When omitted,
the parameter becomes 150.
<SectorRateLine>::= SectorRate<sector rate>[CR] | SectorRate [CR]
(10) The bit rate defined in the BitRate line has a decimal point. When the rate is an
integer, append a “.0” to the integer.
(11) The new file source types AUDIO and MPEG_VIDEO can be defined in the
SourceType line.
When storing audio data other than ADPCM in the 2324 byte user data area in
the form 2 sector, state AUDIO as the file source type. When using a FileSource
command to define an MPEG video stream, state MPEG_VIDEO as the file source
type. This statement identifies the file source as an MPEG video stream and
adds 16 words of “0” data immediately after the sequence_end_code stated at
the end of the MPEG video stream. This statement is necessary to properly
replay an MPEG video stream on the SEGA SATURN.
FileSource Input filename
SourceType MPEG_VIDEO
EndFileSource
In addition, when the MPEG video stream is defined using the MpegStream
command, specifying the parameter VIDEO will perform the equivalent process.
MpegStream Source filename VIDEO
6
(12) Use the CodingInformation command to set subheader coding information. The
Virtual CD system cannot set the coding information by identifying the file
source. However, if VIDEO is specified as the data type in the MpegStream line
during MpegMultiplex, the coding information is set to 0FH. When AUDIO is
specified, 7FH is set.
No particular coding information is defined for a game CD. There also are no
settings defined for AUDIO and MPEG_VIDEO (described in item 11). Please refer to
section 4.3.2.4 in the specification document CD-ROM XA II.4. for the settings
when the AUDIO sector source is ADPCM or the VIDEO sector source is ASM or
EVM.
(13) The MpegFlush command has been added as a new command keyword. An
MpegFlush line adds 16 KB of “0” data immediately prior to the
sequence_end_code recorded at the end of the MPEG video stream.
<MpegFlush line> ::= MpegFlush [CR]
<File source definition line>::=<SubHeader line>|<Offset
line>|<BitRate line>|<UnitSize line>|<GapSize line>|<RealTime
line>|<BeginTimeF line>|<EndTimeF line>|<DataType line>|<AutoEOR
line>|<CodingInformation line>|<SourceType line>|<SubSource
line>|<SubEmpty line>|<MpegFlush line>
(14) When the type of the data specified in the MpegStream line in the MPEG stream
definition is DATA, FORM1/FORM2 must be specified in a DataType line.
<MPEG stream>::=<MpegStream line> <BitRate line> <DataType line>
<MpegFlush line> <EndMpegStream line>|<MpegStream line> <BitRate
line> <DataType line><MpegFlush line> <EndMpegStream line> <MPEG
stream>
(15) Relative positions specified as minute:second:frame can also be specified by
FAD.
<relative position>::=<minute>:<second>:<frame>|<FAD>
<FAD>::=<numerical string>
(16) A hyphen “-” can also be used in addition to a forward slash “/” as a delimiter
when specifying VCDPRE.EXE and VCDBUILD.EXEoptions. New options have
also been added.
Format:
VCDPRE Startupfile [/i /c /d /f /a]
or
VCDPRE Startupfile [-i -c -d -f -a]
Added Option:
/a or -a Specifies options i, c, d and f as a batch
Format:
VCDBUILD Startupfile [/i /c /d /f /a /n /s]
or
VCDBUILD Startupfile [-i -c -d -f -a -n -s]
Added Options:
/n or -n ECC not generated
/s or -s Execution history not displayed
Virtual CD System Supplementary Manual Ver. 1.0 7
2.3 Example of a Script Statement
The following examples show how to configure a disc by using a script. Previously
released manuals describe the correct syntax of output file names used in param-
eters. When this example refers to “output file name”, for example, it simply means
that an output file is specified.
Items in angle brackets (< >) followed by opt indicate items that may be omitted. If
items appear in brackets ({ | }) separated by |, then one of the items must be cho-
sen. Everything after a semicolon (;) is a comment.
(1) Sample Script for a CD-ROM (MODE1 + CD-DA) Disc
Disc output filename
Session CDROM <output filename>opt
LeadIn MODE1
EndLeadIn
;
<SystemArea MSDOS filename>opt
;
Track MODE1
Volume ISO9660 output filename
PrimaryVolume 0:2:16
<PVD definition line>opt ;......(1)
EndPrimaryVolume
<SupplementaryVolume relative time>opt
<SVD definition line>opt ;......(2)
<EndSupplementaryVolume>opt
<BootRecord relative time>opt
<Boot record definition line>opt ;......(3)
<EndBootRecord>opt
EndVolume
;
File ISO9660 filename <output filename>opt
<file definition line>opt ;......(4)
FileSource input filename
<file source definition line>opt ;......(5)
EndFileSource
EndFile
;
; File ~ EndFile
;
PostGap 75
EndTrack
;
Track CDDA
Pause 150
FileSource input filename
<file source definition line>opt ;......(5)
EndFileSource
EndTrack
;
; Track ~ EndTrack
;
;
LeadOut CDDA
Empty 300
EndLeadOut
EndSession
EndDisc
8
(2) Sample Script for a CD-ROM XA (MODE1+MODE2+CD-DA) Disc
Disc output filename
Session SEMIXA <output filename>opt
LeadIn MODE1
EndLeadIn
;
<SystemArea MSDOS filename>opt
;
Track MODE1
Volume ISO9660 output filename
PrimaryVolume 0:2:16
<PVD definition line>opt ;......(1)
EndPrimaryVolume
<SupplementaryVolume relative time>opt
<SVD definition line>opt ;......(2)
<EndSupplementaryVolume>opt
<BootRecord relative time>opt
<Boot record definition line>opt ;......(3)
<EndBootRecord>opt
EndVolume
;
FileISO9660 filename <output filename>opt
<file definition line>opt ;......(4)
FileSource Input filename
<file source definition line>opt ;......(5)
EndFileSource
EndFile
;
; File ~ EndFile
;
PostGap 75
EndTrack
;
Track MODE2
PreGap 150
File ISO9660 filename <output filename>opt
;Example of channel-interleaving using SectorRate line
SectorRate <positive integer>opt ; Required when defining MPEG
Channel channel number
MpegMultiplex <output filename>opt
<RealTime>opt ; When DATA is specified in MpegStream line
MpegStream Source filename {AUDIO|VIDEO|DATA}
BitRate Bit rate <sequence number>opt
<DataType {FORM1|FORM2}>opt ; When DATA is specified in
<MpegFlush>opt MpegStream line
EndMpegStream
MpegStream source filename {AUDIO|VIDEO|DATA}
:
EndMpegStream
EndMpegMultiplex
Endchannel
Channel channel number
MpegMultiplex <output filename>opt
<RealTime>opt ; When DATA is specified in MpegStream line
MpegStream Source filename {AUDIO|VIDEO|DATA}
BitRate Bit rate <sequence number>opt
<DataType {FORM1|FORM2}>opt ; When DATA is specified in
<MpegFlush>opt MpegStream line
EndMpegStream
Virtual CD System Supplementary Manual Ver. 1.0 9
EndMpegMultiplex
EndChannel
EndFile
File ISO9660 filename
:Example of channel-interleaving using UnitSize line, GapSize line
Channel channel number
FileSource input filename
UnitSize unit size
GapSize gap size
:
EndFileSource
EndChannel
Channel channel number
FileSource input filename
UnitSize unit size
GapSize gap size
:
EndFileSource
EndChannel
EndFile
Extent
FileInterleave unit size gap size
File ISO9660 filename
FileSource input filename
EndFileSource
EndFile
EndFileInterleave
FileInterleave unit size gap size
File ISO9660 filename
FileSource input filename
EndFileSource
EndFile
EndFileInterleave
EndExtent
Directory directory name
<Directory attribute definition>opt
Directory directory name
File ISO9660 filename
FileSource input filename
EndFileSource
EndFile
EndDirectory
EndDirectory
PostGap 75
EndTrack
;
Track CDDA
Pause 150
FileSource input filename
<file source definition line>opt ;......(5)
EndFileSource
EndTrack
;
; Track ~ EndTrack
;
LeadOut CDDA
Empty 300
EndLeadOut
EndSession
EndDisc
10
(1) PVD Definition Line
<SystemIdentifier A identifier>opt
<VolumeIdentifier D identifier>opt
<LogicalBlockSize Number of blocks>opt
<OptionalLPath>opt
<OptionalMPath>opt
<VolumeSetIdentifier D identifier>opt
<PublisherIdentifier A identifier>opt
<DataPreparerIdentifier A identifier>opt
<ApplicationIdentifier A identifier>opt
<CopyrightFileIdentifier D+ identifier>opt
<AbstractFileIdentifier D+ identifier>opt
<BibliographicFileIdentifier D+ identifier>opt
<VolumeCreationDate Date>opt
<VolumeModificationDate Date>opt
<VolumeExpirationDate Date>opt
<VolumeEffectiveDate Date>opt
<ApplicationUse MS-DOS filename>opt
(2) SVD Definition Lines
<SystemIdentifier A identifier>opt
<VolumeIdentifier D identifier>opt
<LogicalBlockSize Number of blocks>opt
<EscapeSequences Kanji code>opt
<OptionalLPath>opt
<OptionalMPath>opt
<VolumeSetIdentifier D identifier>opt
<PublisherIdentifier A identifier>opt
<DataPreparerIdentifier A identifier>opt
<ApplicationIdentifier A identifier>opt
<CopyrightFileIdentifier D+ identifier>opt
<AbstractFileIdentifier D+ identifier>opt
<BibliographicFileIdentifier D+ identifier>opt
<VolumeCreationDate Date>opt
<VolumeModificationDate Date>opt
<VolumeExpirationDate Date>opt
<VolumeEffectiveDate Date>opt
<ApplicationUse MS-DOS filename>opt
(3) Boot Record Definition Lines
<BootSystemIdentifier A identifier>opt
<BootIdentifier A identifier>opt
Virtual CD System Supplementary Manual Ver. 1.0 11
(4) File Definition Lines
<BeginTimeS relative time>opt
<EndTimeS relative time>opt
<Attributes {HIDDEN|NOHIDDEN}{RECORD|NOTRECORD}>opt
<RecordingDate Date>opt
<MinLength {No. of bytes|No. of sectors}>opt
<Trigger relative time>opt
<Eors relative time>opt
<Pack>opt
<SectorRate {Positive integer}>opt
<FileNo File No.>opt ;1∼255
<BeginTimeE {relative time|+}>opt
<EndTimeE {relative time|-}>opt
<SameName Directory name filename>opt
<SysOwnerID Numeric string>opt
<SysReadAttributes {OWNER|NOTOWNER}{GROUP|
NOTGROUP}{WORLD|NOTWORLD}>opt
<SysExecuteAttributes {OWNER|NOTOWNER}{GROUP|
NOTGROUP}{WORLD|NOTWORLD}> opt
(5) File Source Definition Lines
<SubHeader>opt
<Offset input position Input length>opt
<BitRate Bit rate<sequence no.>opt >opt
<UnitSize Unit size>opt
<GapSize Gap size>opt
<RealTime>opt
<BeginTimeF {relative time|+}>opt
<EndTimeF {relative time|-}>opt
<DataType {FORM1|FORM2}>opt
<AutoEOR>opt
<CodingInformation Coding information>opt
<SourceType {MONO_A|MONO_B|MONO_C|STEREO_A|
STEREO_B|STEREO_C|CDDA|AUDIO|
ISO11172|MPEG_VIDEO|VIDEO| DATA}>opt
;Valid only when MODE2 is
specified in the Track line
<SubSource Filename>opt
<SubEmpty Number of blocks>opt
12
2.4 The Effects of the Pack Line on Channel-Interleaving
When channel-interleaving is used, each sector within the same ISO file can be
identified by a channel number. Use the BeginTimeF line, EndTimeF line, Realloca-
tion line, UnitSize line, GapSize line and Pack line to control the positioning of the
channels. The effects of the Pack line are described below.
The Pack line is used to increase the efficiency of disc space usage. Dummy data may
be generated in the beginning, middle or end of the ISO file depending upon the
specifications of the BeginTimeF, UnitSize and GapSize lines. The Pack line can be
specified to generate an ISO file without these dummy data areas.
(1) When a Pack line is not specified
The following describes how channels are positioned when a Pack line is not
specified. The example shows how channels are positioned when specifications
are as follows (with no Pack line).
• Channel 1 file source definition:
- BeginTimeF 00:00:05
- UnitSize 2
- GapSize 3
• Channel 2 file source definition:
- BeginTimeF 00:00:07
- UnitSize 2
- GapSize 3
The following results when the file sizes are 8 sectors.
Example: XXXXX1122X1122X1122X1122
X: dummy (gap) sector
numbers: channel numbers
(2) When a Pack line is specified
When a Pack line is specified in the above example, the following results:
Example: 1122112211221122
An ISO file that was 24 sectors when a Pack line was not specified is thus com-
pressed into 16 sectors when a Pack line is specified. Note, however, that the
following problems will occur.
• The file will no longer start at the time specified in the BeginTimeF line.
• The file will end before the time specified in the EndTimeF line.
• When a MinLength line is specified in the file definition line, the file area will become that
specified size.
Virtual CD System Supplementary Manual Ver. 1.0 13
(3) To Fill in Gaps
When a Pack line is specified, the BeginTimeF and EndTimeF line specifications
are ignored. However, there may be occasions when the gaps produced by the
absence of a Pack line specification may be used intentionally. In such cases, use
the channel that specifies the Reallocation line. The example below shows a
channel that specifies a Reallocation line (channel number 3, 7 sectors of data)
that was added to the previous example where a Pack line was not specified.
• In the channel 3 file source definitions:
- BeginTimeF 00:00:01
- UnitSize 1
- GapSize 0
Example: X33331122311223112231122
2.5 Specifying Relative T ime
Positions on a disc can be specified in scripts using three types of relative positions.
• Relative session time • Relative extent time • Relative file time
Each has a beginning (BeginTime) and ending (EndTime) specification. The relation-
ships of the specified position and the actual position where data is located are shown
below.
(1) When BeginTime is specified
BeginTime
(2) When EndTime is specified
EndTime
*The start position is set so that the file ends at EndTime.
(3) When BeginTime, UnitSize and GapSize are specified
BeginTime
Gap Gap
Unit
14
(4) When EndTime, UnitSize and GapSize are specified
EndTime
Gap
Unit
*The file ends at EndTime.
(5) Relative Session Time (BeginTimeS, EndTimeS)
This specifies the position of ISO files that are not file-interleaved. This specifi-
cation is ignored if included in the definition of a file-interleaved ISO file. The
specified time starts the session at 00:00:00 and is expressed as
(minutes:seconds:frames).
(6) Relative Extent Time (BeginTimeE, EndTimeE)
This specifies the position of file-interleaved ISO files. It is used to indicate the
positional relationship between files that are interleaved. An error results if it is
specified anywhere other than the expansion file defined in the Extent line. The
specified time starts the extent at 00:00:00 and is expressed as
(minutes:seconds:frames). To specify a position within a session, specify the
positions of all interleaved files in the parameter of the Extent line.
(7) Relative File Time (BeginTimeF , EndTimeF)
This specifies the position of the file source within the ISO file. An error results
if it is specified anywhere other than in a file source definition. The specified
time starts the file at 00:00:00 and is expressed as (minutes:seconds:frames).
When defining a channel-interleaved ISO file, the position of the channel
within the ISO file can be determined by specifying BeginTimeF or EndTimeF in
the file source definition that configures the channel. This defines the relative
positions between channels. The start of the file source that configures the
channel becomes the starting position for the channel, and the end of the file
source becomes the end position of the channel.
Virtual CD System Supplementary Manual Ver. 1.0 15
2.6 The Relationship Between Sector Rates and Bit Rates
While the sector rate is defined by <SectorRate> in the file definition line and the bit
rate is defined in the <BitRate> of the MPEG stream. Their relationship was not
explained in the previous versions of the manual. The relationship between the two
is discussed below.
Any integer value can be defined as the sector rate, but there are two typical values:
75 sectors/second and 150 sectors/second. The bit rates that can be defined for these
two values (CD rate) are as follows.
• CD rate (75) = 75 x 2324 x 8 = 1,394,400 (bps)
• CD rate (150) = 150 x 2324 x 8 = 2,788,800 (bps)
This bit rate is the maximum value of the sum of bit rates that can be stated between
<File> and <EndFile>. If this bit rate sum is exceeded, the stream cannot be multi-
plexed.
When the disc format is based on CD-ROM XA, the data length per sector that can
be used in MPEG multiplexing differs from the type of data as follows:
• MPEG video 2296 bytes
• MPEG audio 2279 bytes
• Data (FORM1) 2048 bytes
• Data (FORM2) 2324 bytes
Accordingly, the following conversion is required between the bit rate defined in
the keyword <BitRate> and the CD rate. If the current MPEG video bit rate is
BR(MV), then the MPEG audio bit rate is BR(MA), the data (FORM1) bit rate is BR(F1)
and the data (FORM2) bit rate is BR(F2). The relationship is as follows when the
four streams are multiplexed.
BR(MV) × 2324 BR(MA) × 2324 BR(F1) × 2324 BR(F2) × 2324
CD rate ≥ + + +
2296 2279 2048 2324
=
BR(MV) BR(MA) BR(F1)
+ + × 2324 + BR(F2)
2296 2279 2048
This relationship must always be maintained when the data is multiplexed. It is
verified during execution and an error is returned if the relationship does not hold.
Note also that a maximum of 10 streams can be MPEG multiplexed.
16
3.0 Supplementary Description of the Updateool
T VCDUTL.EXE
3.1 Introduction
This software modifies (updates) sections of existing CD images as DOS files. Partial modi
fication of an existing CD image is best accomplished by using the disc builder software to
rebuild the CD image, though it is a time-consuming and inefficient process. This software
is intended to quickly modify CD images without having to return to the disc rebuild
process.
3.2 Revisions to the Main Manual
Some parts of the explanation given on page 23 of the main manual are incorrect.
The underlined portions below are the revisions.
Example 5 C:/>VCDUTL∆TSTGAME∆ISOFILE.DDD∆DOSFILE.D01∆
DOSFILE.D02∆-f∆TSTGAME.PAT[ENTER]
In this example the DOS file called DOSFILE.D01 (in the ISO9660 file called ISO1FILE.DDD
included in the CD image created by TSTGAME) is replaced with the DOS file called
DOSFILE.D02.
Result 5 An update data file called TSTGAME.PAT is created.
:
:
Example 7 C:/>VCDEMU∆TSTGAME∆-u∆TSTGAME.PAT[ENTER]
:
The underlined portions of the text below from page 65 in the main manual have also
been revised.
Example:
VCDUTL∆TSTGAME∆ISO1FILE.DDD∆DOSFILE.D01∆DOSFILE.D02
∆[f∆TSTGAME.PAT][ENTER]
VCDUTL Runs VCDUTL.
TSTGAME Project name used to create the CD image that is being updated
ISO1FILE.DDD ISO file name that contains the DOS file to be updated.
DOSFILE.D01 The name of the DOS file to be updated.
DOSFILE.D02 Replacment DOS file name.
Options
-f Option
TSTGAME.PAT is the name of the update data file (may be user specified) for DOS file
replacement.
When this option is specified, the CD image itself will not be updated. This update data
file will be used during emulation.
Virtual CD System Supplementary Manual Ver. 1.0 17
If this option is not used, the CD image itself will be updated without the update data
file being output.
:
:
3.3 Example of Executing a Partial Update
(1) Sample Script
;
;
Disc “.¥test1.dsk”
Session SEMIXA
LeadIn MODE1
EndLeadIn
Track MODE1
Volume ISO9660 test1.pvd ;Not an ISO filename
PrimaryVolume 0:02:16
EndPrimaryVolume
EndVolume
PostGap 75
EndTrack
Track MODE1
PreGap 150
File ISOF_1.DAT;1 ;ISO filename
FileSource “pat_7.dat”
EndFileSource ↓
EndFile This DOS file is replaced
PostGap 75 with pat_1.dat
EndTrack
Track CDDA
Pause 150
File CDDA1.DAT;1 ;ISO filename
FileSource “sound1.dat”
EndFileSource ↓
EndFile This DOS file is CDDA, therefore, it
EndTrack cannot be updated by VCDUTL.EXE Ver. 1.0.
LeadOut CDDA
Empty 300
EndLeadOut
EndSession
EndDisc
18
(2) Executing Partial Updates
To replace the DOS file pat_7.dat in the ISO file (ISOF1.DAT;1) that comprises the
disc image (test1.dsk) of project file test1 with DOS file pat_1.dat, enter the fol-
lowing. Note that the ISO file name must be specified in upper-case English.
Correct: VCDUTL test1 ISOF1_1.DAT;1 pat_7.dat pat_1.dat
Incorrect: VCDUTL test1 TEST1.PVD pat_7.dat pat_1.dat
Note: VCDUTL.EXEdoes not directly update the volume descriptor set (test1.pvd).
When this results in a pat_1.dat file size that is equal to or smaller than pat_7.dat,
the pat_7.dat section of the disc image is replaced by pat_1.dat. To execute real-
time mode emulation, enter:
VCDEMU test1
When the -f option is added, the update data file is created without updating the
disc image.
VCDUTL test1 ISOF1_1.DAT;1 pat_7.dat pat_1.dat -f test1.pat
The update information file test1.pat is created as a result. To run emulation, add
the -u option and startup the VCD emulator. To execute a direct DOS access mode
emulation, enter:
VCDEMU
When,
VCDEMU test1
is entered alone, note that the pre-existing disc image test1.dsk will be used in the
real-time mode emulation.
Virtual CD System Supplementary Manual Ver. 1.0 19
4.0 Byte Swap Tool SWAP.EXE
4.1 Introduction
This software is a tool for converting data between Motorola and Intel endian for-
mats. The CD-DA data file accepted by the Virtual CD system must be in Intel's little
endian format. When the CD-DA data file is in Motorola's big endian format, con-
vert it using this tool.
4.2 Usage
Command: SWAP
Command name: Performs byte swap
Function: Converts the byte order of the specified DOS file and creates a new DOS file.
Format: SWAP [-option] Oldfilename Newfilename
Description: Oldfilename: the name of the DOS file to be byte-swapped.
Newfilename: the DOS file created as a result of the byte-swap
-option: option settings
-v: displays the usage method
20
5.0 Script Keywords
Table 1: Script Keywords (1)
Keyword Parameter Description
AbstractFileIdentifier Filename Specifies the root level file of the primary volume that
includes the abstract information.
ApplicationUse Filename Specifies MS-DOS file for the application use field data.
ApplicationIdentifier Identifier Specifies application identifier.
Attributes Attributes Specifies the directory record attributes.
AutoEOR Records EOR (End Of Record) in Subheader of sector
that contains the final byte of the file. Added
automatically to MPEG source definitions, so no
declaration is required.
BeginTimeE Relative Start position on disc where a file is located within
position extent; the relative time from the start of the extent.
BeginTimeF Relative Position where to start placing file source.
position
BeginTimeS Relative Start position on disc where a file or channel-interleaved
position file is located; the relative time from the start of the
session.
BibliographicFile Filename Specifies the root level file of the primary volume that
Identifier includes the bibliographic information.
BitRate Bit rate MPEG data bit rate
[sequence Specifies the bit nth in MPEG data; default is 0.
#]
BootIdentifier Identifier Specifies boot identifier of boot record.
BootRecord Start of boot record.
Relative Position on disc where boot record is recorded.
position
BootSystemIdentifier Identifier Specifies boot system identifier of boot record.
CatalogNo Specifies the disc catalog number.
Catalog # ASCII numeric character string of 13 digits or fewer.
Channel Channel # Start of channel definition, 0∼250.
Channels # of Specifies the number of channels, either 2 or 4, used for
channels CD-DA.
CodingInformation Coding States the coding information in BCD.
information
Copy Switch Specifies copy protection, either TRUE or FALSE, used
for CD-DA.
CopyrightFileIdentifier Filename Specifies the root level file of primary volume that
includes the copyright message.
DataPreparerIdentifier Identifier Specifies data preparer identifier.
DataType Mode 2 Specifies form for mode 2 (FORM1 or FORM2)
form
Define Defines variable for a given value (macro definition).
Variable Macro definition character string.
name
Value Character string to be defined.
Virtual CD System Supplementary Manual Ver. 1.0 21
Table 2: Script Keywords (2)
Keyword Parameter Description
Directory Directory Start of directory definition.
name
Disc Start of disc definition.
Filename Name of file that outputs the disc image.
Empty # of blocks Indicates the output of null data (0x00) for lead-in and
lead-out.
EndBootRecord End of boot record.
EndChannel End of channel definition.
EndDirectory End of directory definition.
EndDisc End of disc definition.
EndExtent End of file-interleave definition.
EndFile End of file definition.
EndFileInterleave End of specification of files to be interleaved.
EndFileSource End of specification of MS-DOS files contained in an
ISO9660 file.
EndLeadIn End of lead-in area definition for the session.
EndLeadOut End of lead-out area definition for the session.
EndMpegMultiplex End of ISO11172 stream definition.
EndMpegStream End of MPEG stream definition.
EndPrimaryVolume End of primary volume descriptor.
EndSession End of session.
EndSupplementary End of supplementary volume descriptor.
Volume
EndTimeE Relative End position on disc where file is located within extent;
position the relative time from the start of the extent.
EndTimeF Relative End position of file source.
position
EndTimeS Relative End position on disc where file or channel-interleaved
position file is located; the relative time from the end of the
session.
EndTrack End of track definition.
EndVolume End of volume descriptor set definition.
Eors Position in Specifies EOR (End Of Record) position.
file
EscapeSequences Kanji code Specifications of characters used in supplementary
volume descriptor, directory code, and path table. Only
SHIFT-JIS is valid.
22
Table 3: Script Keywords (3)
Keyword Parameter Description
Extent Start of file-interleave definition.
[Relative Position on the disc where interleave results are placed.
position]
File Start of file definition.
Filename ISO9660 file name.
[Output file] Name of file that outputs file definition results.
FileInterleave Start of the specification of the interleave file.
Unit size Unit in which to consecutively place the same files
(number of sectors).
Gap size Sectors occupied by different types of files
FileSource Input Specification of MS-DOS files used as source to
filename construct an ISO9660 file.
FileNo File # ID number of interleaved files, 1∼ 255.
GapSize Gap size Specifies the number of sectors occupied by different
types of files during channel interleave.
Include Inputs script file and replaces it with this command line.
Filename Name of another file that has a script declaration.
LeadIn Lead-in area definition for the session.
Track type MODE1
LeadOut Lead-out area definition for the session.
Track type CDDA
LogicalBlockSize Defines logical block size of volume.
Size 512, 1024 or 2048
MinLength # of bytes or Specifies the minimum number of bytes or sectors of the
sectors directory record.
MpegFlush Add 16 KB of "0" data to MPEG video stream.
MpegMultiplex Starts definition of ISO11172 stream.
[Output File that outputs the results of multiplexing.
filename]
MpegStream Starts definition of MPEG stream.
Source MPEG compressed data, MS-DOS file.
filename
Data type AUDIO, VIDEO or DATA
Offset Specifies the section of an input file to be input.
Input position Specifies the read start position within the file
Input length Read size
OptionalLPath Executes write out of optional LPath table.
OptionalMPath Executes write out of optional MPath table.
Virtual CD System Supplementary Manual Ver. 1.0 23
Table 4 Script Keywords (4)
Keyword Parameter Description
Pack Specifies packing after channel-interleaving.
Pause # of blocks Specifies the number of blocks paused at the beginning
of the CD-DA track.
PostGap # of blocks Specifies the number of blocks of PostGap information
recorded at the end of MODE1 and MODE2 tracks.
Preemphasis Switch Specifies the preemphasis bit value of the Q subcode
channel, either TRUE or FALSE, used with CD-DA.
PreGap # of blocks Specifies the number of blocks of PreGap data recorded
at the beginning of MODE1 and MODE2 tracks.
Primary Volume Start of primary volume descriptor.
Relative Position on disc where primary volume descriptor is
position recorded.
PublisherIdentifier Identifier Specifies publisher identifier.
Reallocation When there is already another file specified in the
location where the file is to be located, the previously
specified file is avoided and reallocation occurs.
RealTime Indicates that file source is a real-time file. In MPEG
source definitions, no declaration is needed when the
data type specified in the MpegStream line is AUDIO or
VIDEO since files are automatically real-time files.
RecordingDate Date Date on which directory record was created.
SameName D+ identifier Indicates the directory name and filename identified in
the supplementary volume descriptor.
SectorRate [Sector rate] Specifies the number of sectors transferred per second
during channel-interleaving may be a positive integer
between 1 and 65535. The default value is 150.
Session Start of session
Disc type CDROM or SEMIXA
[Filename] Name of file that outputs the disc image (can be
omitted).
SourceType File source Data type of file source. MONO_A, MONO_B, MONO_C,
type STEREO_A, STEREO_B, STEREO_C, AUDIO, CDDA,
ISO11172, MPEG_VIDEO, VIDEO, or DATA
SubEmpty # of blocks Directs output of null data to subcode area
SubHeader Subheader already added to file data
SubSource Input Specifies MS-DOS file where subcode is placed.
filename
SupplementaryVolume Start of supplementary volume descriptor.
Relative Position on disc where supplementary volume descriptor
position is to be recorded.
24
Table 5: Script Keywords (5)
Keyword Parameter Description
SysExecuteAttributes Specifies whether each user class recorded in the
directory system information has execution
authorization.
Owner OWNER or NOTOWNER
attribute
Group GROUP or NOTGROUP
attribute
World WORLD or NOTWORLD
attribute
SysOwnerID Number Specifies the owner ID recorded in the directory system
string information.
SysReadAttributes Specifies whether each user class recorded in the
directory system information has read authorization.
Owner OWNER or NOTOWNER
attribute
Group GROUP or NOTGROUP
attribute
World WORLD or NOTWORLD
attribute
SystemArea Defines the system area of the ISO9660 volume.
Filename Specifies the MS-DOS data file for the system area.
SystemIdentifier Identifier Defines system identifier name.
name
Track Start of track definition.
Track type CDDA, MODE0, MODE1 or MODE2
Trigger Position in Specifies where trigger is applied.
file
UnitSize Unit size Specifies size of unit in which the same channel is
placed consecutively (number of sectors) in channel-
interleaving.
Volume Start of volume descriptor set definition.
Volume type Only valid for ISO9660
Filename Name of output file of volume descriptor set.
VolumeCreationDate Date Specifies the creation date.
VolumeEffectiveDate Date Specifies the effective date of the volume.
VolumeExpirationDate Date Expiration date of the volume.
VolumeIdentifier Identifier Defines volume identifier .
VolumeModificationDate Date Specifies the date of the most recent volume
modification.
VolumeSetIdentifier Identifier Defines volume set identifier.
Virtual CD System Supplementary Manual Ver. 1.0 25
Index
BitRate ......................................................................................................................... 6, 16
Case sensitivity .................................................................................................................. 5
Channel numbers ............................................................................................................. 13
Channel-interleaving .............................................................................................. 6, 13, 24
Disc builder program .......................................................................................................... 4
Fast-forward scan replay.................................................................................................... 4
File source types ................................................................................................................ 6
Indexes, number of ............................................................................................................ 4
ISO9660 file name ..................................................................................... 5, 17, 22, 23, 25
MpegFlush command ......................................................................................................... 7
New options ....................................................................................................................... 3
Pack line..................................................................................................................... 13, 14
Relative Extent time ......................................................................................................... 15
Relative File time .............................................................................................................. 15
Relative position parameters .............................................................................................. 5
Relative Session time ....................................................................................................... 15
Reverse scan replay .......................................................................................................... 4
Scripts .......................................................................................................................... 8, 14
Sector rate .................................................................................................................. 16, 24
Sector rate parameters ...................................................................................................... 6
SWAP ............................................................................................................................... 20
Tracks, number of .............................................................................................................. 4
Unsupported keywords ...................................................................................................... 5
Version numbers ................................................................................................................ 5
26
TM
Virtual CD System
(Release 3)
Limitations
Doc. # ST-182-081294
© 1994 SEGA. All Rights Reserved.
Introduction
To accompany the upgrade of the main software of the virtual CD system currently
being used, the firmware on the virtual CD interface board needs to be replaced to
enable the use of the new main software. To this end, SEGA has included new
firmware (Ver 3.1) contained in EPROM with this notice. Please follow the instruc-
tions below to replace the ROM on the CD interface board.
When using the new main software, make sure that the new firmware (ver 3.1) has
been installed. If the new software is used with old firmware, the system will not
operate correctly, or may not operate at all. Also, please make sure to return the old
ROM as quickly as possible.
ROM Replacement Procedure
1. If the board is installed in the computer, first shut off the computer power.
2. Remove the 50P interface cable from the virtual CD interface board.
3. Remove the cover of the computer, then loosen and remove the screws that fix
the virtual CD interface board in place.
4. Carefully remove the board from the expansion slot and place the board on a
desk or table covered with an anti-static sheet. Locate the ROM labeled MEM1
as shown on the diagram below and use a screwdriver or similar tool to pry up
and remove the EPROM from the IC socket. Be careful not to bend the legs.
Replace this IC
MEM1
Mark
Part Surface
Connector
CPU
Edge Connector
5. Install the new Ver.3.1 EP-ROM, sent with this notice, into the same location by
pressing it into the IC socket; make sure the direction of the new IC is correct
and confirm that it has been correctly installed.
6. Reverse the above procedures to reinstall the board back into the computer.
7. Install the main software and verify the operation of the new software by fol-
lowing the procedures in the operation manuals.
Virtual CD System (Rel. 3) Limitations 1
August 8, 1994
SEGA of America
Technical Support
FAX: 415-802-3963
Virtual CD System (Release 3)
The virtual CD software has been upgraded. We are sending the upgrade along
with sample CD programs. This upgrade requires the replacement of the virtual CD
board ROM for the new software to function. Refer to the procedure for replacing
the ROM as shown on the previous page.
Items Supplied
· Virtual CD System and Sample Program
Vol 1/3 · · · 1
2/3 · · · 1
3/3 · · · 1
· Virtual CD System and Sample Program Installation method
· Virtual CD System (Release 3) Restrictions
End
2
Virtual CD System (Release 3) Limitations
VCDEMU
1. The file interleave function in direct DOS file access is not supported.
2. The channel interleave function in direct DOS file access is not supported.
(Is scheduled to be in the final specification.)
3. Scan FWD/REV is not supported.
4. Multi-index is not supported.
VCDPRE, VCDBUILD
1. The following keywords are removed from the limitations list: Pause, PreGap,
PostGap. Refer to Virtual CD Software release 2 documentation for other
limitations. (In the CD tool and software library supporting documentation.)
2. Always use the File command and the EndFile command in the CDDA track.
Currently CDDA must be defined as a ISO9660 file.
Other
1. Some script lines are scheduled to be changed for the next release.
2. VCDUTL is not included.
Virtual CD System (Rel. 3) Limitations 3
Virtual CD System (Release 3) Installation
1. Install the executable programs
Install the following files into the development machine.
[Disk#1] ¥saturn¥segabin¥vcd¥jvc.abs
¥saturn¥segabin¥vcd¥jvc.ini
¥saturn¥segabin¥vcd¥sddrv.tsk
¥saturn¥segabin¥vcd¥systbl.tsk
¥saturn¥segabin¥vcd¥newmap.bin
2. Install the Virtual CD Software
Install the following files into the virtual CD development machine.
[Disk#1] ¥saturn¥segabin¥vcd¥vcdbuild.exe
¥saturn¥segabin¥vcd¥vcdemu.exe
¥saturn¥segabin¥vcd¥vcdmktoc.exe
¥saturn¥segabin¥vcd¥vcdpre.exe
3. Install the Source Data for CD Image Creation
Install the following files into the virtual CD development machine.
[Disk#1] ¥saturn¥segabin¥vcd¥jvc.scr
¥saturn¥segabin¥vcd¥jvc.rti
¥saturn¥segabin¥vcd¥jvc.pvd
¥saturn¥segabin¥vcd¥jvc.prm
¥saturn¥segabin¥vcd¥pat_1.dat
¥saturn¥segabin¥vcd¥pat_10.dat
[Disk#2] snd8_1.dat
[Disk#3] snd8_3.dat
4. Create the CD Disk Image
Create the CD disk image in the CD development machine.
a. Create a working file of the preprocessing program, then create the following
files.
C:¥>type jvc.pre(RET) Create a file with these contents.
scr jvc.scr
rti jvc.rti
b. Startup the preprocessing program
C:¥>vcdpre jvc.pre(RET)
c. Create the CD Disk Image File
C:¥>vcdbuild jvc.pre(RET)
A file called jvc.dsk is created.
5. Start the Virtual CD Emulator
Start the virtual CD emulator in the CD development machine.
C:¥>chev us /f(RET)
C:¥>vcdemu jvc(RET)
The virtual CD emulator will start.
4
6. Reading the Program
Start the program development machine and Model M and execute the follow-
ing:
:[BOOT ROM Initialization]
:<jvc.ini(RET)
:g 6002000(RET)
For more information on virtual CD, refer to the Virtual CD System User’s
Manual.
Virtual CD System (Rel. 3) Limitations 5
TM
WRITE-ONCE
CD-R System
User's Manual
Doc. # ST-201-B-092994
© 1994 SEGA. All Rights Reserved.
WRITE-ONCE CD-R System
User’s Manual
Introduction ............................................................................................................................. 3
Installation ............................................................................................................................... 4
Hardware Installation ..................................................................................................... 4
Software Installation ........................................................................................................ 4
Command Reference ............................................................................................................. 5
The CD Writer Command ............................................................................................... 5
The TOC File Generator Command .............................................................................. 6
Troubleshooting ..................................................................................................................... 7
Image File Errors .............................................................................................................. 7
Image File Format Errors ................................................................................................ 7
IRSC Length Errors .......................................................................................................... 7
Cue Sheet Errors ............................................................................................................... 7
Errors Generated by the Relationship between the Host
Machine and CD-R Recording Unit .............................................................................. 8
CD-R Image Transmission Error ............................................................................. 8
CD-R Recording Unit Setting Errors ...................................................................... 8
Errors Returned by CD-R Recording Unit ............................................................ 8
WRITE-ONCE CD-R System User's Manual 1
(This page was blank in the original Japanese document.)
2
Introduction
Segacdw is a program that records a CD image file created on a virtual CD system
(command VCDBUILD) on a CD-R disc using a CD-R recording unit. This com-
mand is invoked from the system command prompt.
WRITE-ONCE CD-R System User's Manual 3
Installation
Hardware Installation
Connect the YAMAHA CDE/CDR100 CD-R recording unit (CDE100 is the model
name for CDR100 with the system case) to the host machine using the SCSI interface.
See the CDR100 manual for details and how to connect the recording unit.
Setting CDR100 SCSI ID to 5, eliminates the necessity of setting the SCSI ID to the
command segacdw argument each time.
Software Installation
Copy the segacdw execution file from the floppy disk distribution medium to the
hard disk of your host machine. Set the PATH if necessary.
4
Command Reference
The CD Writer Command
Command name:
segacdw
Syntax:
segacdw [-i #] [-s #] [-t] image_prefix
Description:
This command writes to a CD image file a CD-R using YAMAHA’s CDR100
CD-R recording unit. The command is invoked from the system command
prompt.
Arguments:
The name of the CD image file is specified to the image_prefix image_prefix.
The name of CD image file is the prefix of files which have the .dsk, the .emu
and the .toc file name extensions. These files must all be in the same direc-
tory. The CD image files created with the Virtual CD System should have the
file name extension .dsk. Use the file name extension .emu for the CD image
files created with the C-Trac Builder.
Options:
-i Specifies the distination to be transmitted the CD image files by the
SCSI ID 0 to 7. In other word, specify SCSI ID of CDR 100. The default
is 5.
-s Specifies the writing speed. Specify any one out of the values 1
(normal speed), 2 (double speed) and 4 (quadruple speed). The default
is 4, which writes at quadruple speed.
-t Write with CDR100 test mode. The actual CD-R is not written on it.
Examples:
To record a CD image file consisting of test.dsk and test.toc onto a CD-R,
specify as follows.
C> segacdw test
The following is the test to record at double speed on a recording unit with a
SCSI ID of 6.
C> segacdw -i 6 -s 2 -t test
WRITE-ONCE CD-R System User's Manual 5
The TOC File Generator Command
Command name:
gentoc
Syntax:
gentoc [-v] image_prefix
Description:
This command generates a TOC file from a CD image file created using C-
Trac Builder for MEGA-CD/SEGA-CD. The command is invoked from the
system prompt.
Arguments:
The name of the CD image file is specified at an image_prefix image_prefix.
The CD image file name is the prefix of a file which has the an .emu file name
extension.
Options:
-v Displays such information as the contents of the Cue sheet.
Example:
To generate TOC file test.toc from test.emu, specify as follows.
C> gentoc test
6
Troubleshooting
The following sections describe the measures against the error message display.
Image File Errors
The error messages described in this section will be displayed when there are prob-
lems with the CD image. Make sure the .dsk file or the .emu file is in the same
directory as the .toc file. Make sure the files are created correctly using the Virtual
CD System. If the error still remains, you will have to create the CD image again.
Image File Format Errors
The following error message displays indicate that the format of the CD image to be
recorded is incorrect.
• Bad data form
• unknown data form in line
• Error Data Length
The following error message display indicates either the mode of the CD-ROM to be
created is incorrect or a CD image format is not supported by segacdw.
• Unknown data mode
ISRC Length Errors
The following error message display indicates that there is a problem with the
length of the ISRC stored in the CD image. Check the original data and regenerate
the CD image.
• ISRC length error in line.
Cue Sheet Errors
The following error message display indicates that there are problems with the Cue
sheet. Recreate the .dsk file and .toc file using the Virtual CD System.
• Cue Sheet intermediate conversion failed
• Cue Sheet parsing failed
• Cue Sheet conversion failed
• Cue sheet size error
• Cue sheet too large
• Empty cue sheet
• No track definitions in cue sheet
• Can’t find lead-out in cue sheet
• Nocore for cue sheet
The following error message indicates that there is not a Cue Sheet generated or
there is not a file that contains the Cue Sheet not in the same directory as the image
file.
• No cue sheet
WRITE-ONCE CD-R System User's Manual 7
Errors Generated by the Relationship Between the Host Machine and CD-R
Recording Unit
CD Image Transmission Error
The following error message indicates that the I/O speed of the host hard disk
cannot keep the same the writing speed as of its CD-R writing unit. Specify the
correct speed using option-s.
• Buffer Under Run
CD-R Recording Unit Setting Errors
The following error message is displayed when an incorrect writing speed was
specified. Specify the correct writing speed using the option-s.
• Error:Bad speed value
The following error message is displayed when the CDR100 firmware version of the
is old and cannot create CD discs for SEGA Saturn. Change to the correct version of
the CDR100 firmware.
• Firmware upgrade of CD recorder is needed to use this software.
Errors Returned by CD-R Recording Unit
The following error messages are returned by the CD-R recording unit.
• Unknown sense key
• Unknown additional sense code
• Field Replaceable Unit failed
• Number of Errors
• Error Number [%d] at Logical Block Address
• No Additional Sense
• Caddy out
• Drive Not Ready
• Communication Failure
• Track Following Error
• Unrecoverd Read Error
• Positioning Error
• Recovered Read Data With Retries
• Recovered Read With ECC Correction
• Parameter List Length Error
• Invalid Command
• Invalid Block Address
• Illegal Field in Command Descriptor
• Invalid LUN
• Invalid Field Parameter List
• Medium Changed
• Power-on Reset or Bus Reset Occurred
8
• Command Sequence Error
• Medium Format Corrupted
• Write Data Error with CU
• Monitor Atip Error
• Invalid Bits in Identify Message
• Diagostic Failure
• Power-On or Self Test Failure
• Internal Controller Error
• SCSI Parity Error
• Write Operation in Progress
• Medium(Caddy) Load or Eject Failed
• Unable to Read TOC, PMA or Subcode
• Operator Medium Removal Request
• End Of User Area encountered on this Track
• Illegal Mode for this Track
• Illegal Track
• Command Currently Not Valid
• Medium Removal Is Prevented
• Stopped on Non-data block
• Invalid Start Address
• Attempt to cross track-boundary
• Illegal Medium
• Application Code Conflict
• Ilegal block-size for command
• Block-size Conflict
• Request for Fixation Failed
• End Of Medium Reached
• Illegal Track Number
• Data Track Length Error
• Buffer Under Run
• Illegal Track Mode
• Optimum Power Calibration Error
• Calibration Area Almost Full
• Current Program Area Empty
• No EFM at search address
• Link Area Encountered
• Calibration Area Full
• Dummy blocks added
• Block size format conflict
• Current Command Aborted
• BARCODE READING ERROR
• Recovery Needed
• Can’t Recover from track
• Can’t Recover from Program Memory Area
• Can’t Recover from Lead-in Area
• Can’t Recover from Lead-out Area
• Laser Current Over
WRITE-ONCE CD-R System User's Manual 9
TM
Program Library
User's Guide 1
CD Library
Doc. # ST-136-R2-093094
© 1994 SEGA. All Rights Reserved.
REFERENCES
In translating/creating this document, certain technical words and/or phrases were interpreted
with the assistance of the technical literature listed below.
1. Dictionary of Science and Engineering, 350,000 words, 3rd Edition
Inter Press
Tokyo, Japan
1990
2. Computer Dictionary
Kyoritsu Publishing Co., LTD.
Tokyo, Japan
1978
3. IBM Dictionary of Computing
McGraw-Hill, Inc.
New York, New York
1994
(This page was blank in the original Japanese document.)
ii
CONTENTS
1.0 Outline ....................................................................................................................................... 1
1.1 Features ......................................................................................................................... 1
1.2 Summary of Functions .................................................................................................... 2
1.3 Module Configuration ..................................................................................................... 4
2.0 Basics .......................................................................................................................................... 5
2.1 Glossary ......................................................................................................................... 5
2.2 Notation .......................................................................................................................... 6
2.3 Name Restrictions .......................................................................................................... 6
2.4 Access Macros ............................................................................................................... 6
3.0 Directory Operations .................................................................................................................... 7
3.1 Initialization ..................................................................................................................... 7
3.2 File Identifiers ................................................................................................................. 8
3.3 Sub-Directory Operations ............................................................................................... 9
3.4 Conversion Between File Names and File Identifiers ................................................... 11
3.5 CD Block File System ................................................................................................... 12
4.0 File Access ................................................................................................................................ 13
4.1 Access Models ............................................................................................................. 13
4.2 Access Pointers ............................................................................................................ 13
4.3 Parameters Controlled for Each File ............................................................................. 14
5.0 Access Modes ........................................................................................................................... 15
5.1 Return-Upon-Completion Access ................................................................................. 15
5.2 Immediate-Return Access............................................................................................. 15
6.0 Other Functions ......................................................................................................................... 19
6.1 Development Support Functions .................................................................................. 19
6.2 Error Processing Functions .......................................................................................... 21
6.3 Multiprocessing ............................................................................................................. 21
7.0 Data Specifications .................................................................................................................... 23
7.1 Basic Data .................................................................................................................... 24
7.2 Constants ..................................................................................................................... 25
7.3 Data Types ................................................................................................................... 29
iii
8.0 Function Specifications .............................................................................................................. 32
8.1 Directory Control ........................................................................................................... 33
8.2 File Operations ............................................................................................................. 35
8.3 Return-Upon-Completion Read .................................................................................... 37
8.4 Immediate-Return Read ............................................................................................... 38
8.5 Read Parameter Settings ............................................................................................. 41
8.6 Other............................................................................................................................. 42
Appendix A Utilization of Development Support Functions .................................................................... 43
A.1 Procedure for Using Memory Files ............................................................................... 43
A.2 Procedure for Using DOS Files .................................................................................... 43
A.3 Precautions ................................................................................................................... 44
Appendix B Error Processing Methods .................................................................................................. 45
Appendix C ............................................................................................................................................. 48
C.1 Additional Explanation .................................................................................................. 48
C.2 Changes from the Previous Version ............................................................................. 48
iv
(This page was blank in the original Japanese document.)
v
1.0 Outline
Below is an explanation of the libraries for accessing files on a CD.
1.1 Features
This library has the following features.
Compatible CD ROMs
· Capable of accessing ISO9660 level files.
· This library does not cover access that utilizes CD ROM XA sub-header
information.
Data Buffering
· Access is performed that assumes a CD block buffer control mechanism.
· In addition to simply reading files, pre-reads using the buffer are possible.
File Identifiers
· Access is based on file identifiers (order in directory).
· Eliminate a drop in speed caused by searching directories.
· Access by file name is possible by using a function that converts from the file
name to a file identifier.
Development Support Functions
· Memory files and DOS files can be accessed as a development support function.
· In the case of small amounts of data, files on a CD can be interchanged with
memory files.
· DOS files on an IBM PC can be accessed in the same way as memory files via the
SCSI interface. Even data too large to load into SIMM can be replaced by CD
files.
· Two types of libraries are provided: one for building into the product and one
that includes development support functions.
User's Guide 1 CD Library 1
1.2 Summary of Functions
The functions of the file system library are summarized below, and are categorized
into the following six types.
Directory Operations
Library initialization, directory information reads, current directory settings and
other functions are provided.
Function Function performed
GFS_Init Initializes the library and mounts CDs
GFS_LoadDir Reads directory information
GFS_SetDir Sets the current directory
GFS_NameToId Converts a file name to a file identifier
GFS_IdToName Converts a file identifier to a file name
File Operations
Opens, closes, seeks and performs the other common operations on files listed be-
low.
Function Action
GFS_Open Opens a file
GFS_Close Closes a file
GFS_Seek Moves the access pointer
GFS_Tell Gets an access pointer
GFS_IsEof Checks if an access pointer is at the end of a file
GFS_ByteToSct Converts the unit from byte to sector
GFS_GetFileSize Gets the file size
GFS_GetFileInfo Gets file information
Return-Upon-Completion Read
Reads data from files. Control does not return from the function until the reading of
data is complete.
Function Action
GFS_Fread Reads data from opened files
GFS_Load Specifies a file identifier and then reads data
2
Immediate-Return Read
Reads data from files by means of a request function and a server function. The
request issued by the request function is processed by the server function one pro-
cessing unit at a time. The server function must be recalled repeatedly. By inserting
application processing into the server function call loop, execution of the application
can be continued until completion of the data read.
Function Action
GFS_NwFread Issues a data read request
GFS_NwCdRead Issues a read request to the CD buffer
GFS_NwIsComplete Checks if read processing is complete
GFS_NwStop Stops read processing
GFS_NwGetStat Gets the access status
GFS_NwExecOne A server function for one file
GFS_NwExecServer A server function for multiple files
Read Parameter Setting
Sets the various parameters for the return-upon-completion and immediate-return
functions. Determines how the CD buffer is to be used, the transfer mode (DMA,
CPU, etc.) and the transfer unit.
Function Function performed
GFS_SetGmode Sets the mode for fetching from the CD buffer
GFS_SetTmode Sets the transfer mode
GFS_SetReadPara Sets the unit for reading to the CD buffer
GFS_SetTransPara Sets the unit for transferring from the CD buffer
Other
CD pickup control, registration of error processing functions, and getting the error
status are provided. The error processing function is called when an error occurs.
Function Function performed
GFS_CdMovePickup Moves the CD pickup
GFS_SetErrFunc Registers the error processing function
GFS_GetErrStat Gets the error status
User's Guide 1 CD Library 3
1.3 Module Configuration
The positioning of this library with respect to the hardware and other software is
shown below in Figure 1.1. The area enclosed in the dotted line is the module in-
cluded in the library for debugging.
Application
File System
CD Communiation
I/F Library SCSI Driver
SIMM
SCSI I/F
Hardware CD Block IBM PC
HD
Debugging Module
Figure 1.1 Module Configuration
In order to use this library, it is necessary to link the following libraries at the same
time.
· SHCNPIC.LIB Library not compatible with position-independent code for
SH7600
· SEGA_CDC.LIB CD communications interface library
· SEGA_DMA.LIB DMA library
· SEGA_CSH.LIB Cache library
4
2.0 Basics
2.1 Glossary
The terms used to explain the file system library are defined in Table 2.1.
Table 2.1 Glossary
Term Meaning
CD buffer A buffer that stores data read from the CD in sector units. It has a 200-
sector capacity.
DOS file Files on an IBM PC that can be accessed via a SCSI interface. These can
be used in a debugger library.
Memory file A file located on SIMM. These files can be used in the debugger library.
Access pointer Position at which a file is accessed (unit: sector).
Current directory The directory referred to when opening files.
Debug file General designation for DOS files and memory files.
Buffer partition One part of a CD buffer divided up into several logical parts. One buffer
partition is dedicated to each file that is opened.
File identifier A sequential number in a directory for identifying files. The values used
range from 0 to (number of directory records - 1). Where, 0 indicates the
current directory and 1 indicates the parent directory.
Frame address (FAD) Number continuously assigned in frame units assuming the absolute
time on the CD is 00:00:00. This number has a 1-to-1 correspondence to
the absolute time. The CD is accessed using the frame address as a key,
not the absolute time.
Main process The series of processes that is begun when the CPU is reset. This term
refers to interrupt processing.
Interrupt process Processing that is started by an interrupt. This term refers to the main
process.
User's Guide 1 CD Library 5
2.2 Notation
The notation used in explaining the file system is explained below.
Grouping of names
“ABC_-” indicates several names beginning with ABC_. For example, ABC_X, ABC_Y
and ABC_Z.
Symbol Specification
“!MMM/SSS” indicates the symbol SSS defined by MMM. It is also a notation used
with E7000 commands.
Hexadecimal Notation
Numbers with an “H” affixed to them at the end are hexadecimal numbers.
2.3 Name Restrictions
In file system libraries, the following names are used for functions, variables, types,
and macros.
Functions and variables GF- or gf-
Type s Gf-
Macros GF-
In the applications that use these libraries, be careful not to use designations that
conflict with these naming conventions.
2.4 Access Macros
In CD libraries that include file system libraries, members of the structure are refer-
enced using a structure called an access macro. Access macros are capable of getting
and setting the values of members. Using access macros has the following advantages.
· Member access format is uniform.
· Parts accessing specific structure members can be easily extracted.
6
3.0 Directory Operations
3.1 Initialization
Before using this library, GFS_Init must be executed. GFS_Init performs the following
processing:
· Initialization of library work area
· Mount processing
Initialization
Sets the work area used by the library and initializes it. The application must provide the
work area and the directory information storage area.
Since the size of the area changes with the number of files opened at the same time, it
should be obtained using the following macro. The statement open_max is the maximum
number of files that can be opened at once.
GFS_WORK_SIZE(open_max)
Mount Processing
The root directory is read from the CD ROM and this is made the current directory. It also
initializes the CD block and erases all the sector data in the CD buffer. Since the file system
only holds the top address of the directory information storage area, the application must
not change the contents of the area.
The directory information control structure is initialized and GFS_Init called as shown
below.
#define OPEN_MAX 20 /*maximum number of files to be opened at
the same time */
#define MAX_DIR 10 /*maximum number of directories */
Uint32 work[GFS_WORK_SIZE(OPEN_MAX)/4]; */
GfsDirTbl dirtb1; /*directory information control structure
GfsDirId dir[MAX_DIR]; /*directory information storage area */
GFS_DIRTBL_TYPE(&dirtbl) = GFS_DIR_ID; /*directory information storage area type
GFS_DIRTBL_NDIR(&dirtbl) = MAX_DIR; /*maximum number of elements in directory
information */
/*storage area */
GFS_DIRTBL_DIRID(&dirtble) = dir; /*address of directory information storage*/
/*area */
GFS_Init(OPEN_MAX, work, &dirtbl);
GFS_Init must be called again when the CD ROM is changed.
User's Guide 1 CD Library 7
3.2 File Identifiers
In this library, files that are accessed are specified by file identifiers. If the file name
is used to access a file, then the file name is converted to a file identifier. The file
identifier is valid for the current directory.
Example: Accessing FILE2.DAT below.
Parent
0 Self
Current directory FILE1.DAT 1 Parent
FILE1.DAT
FILE2.DAT 2
FILE3.DAT 3
4 FILE2.DAT
File identifier
Program Example FILE3.DAT
gfs = GFS_Open (3) ;
/*
* file access is performed here
*/
GFS_Close(gfs)
Figure 3.1 Access Using File Identifiers
8
3.3 Sub-Directory Operations
In order to access files in a sub-directory, it is necessary to set the current directory
information by calling the following functions.
· Read directory information (GFS_LoadDir)
· Set current directory (GFS_SetDir)
A method in which the directory information is read in advance and CD ROM
access is lost when the file is opened is allowed.
Read Directory Information (GFS_LoadDir)
This specifies the sub-directory file and reads and saves the directory information.
The following two types of directory information save areas can be selected.
(a) GFS_DIR_ID
· Does not save the file name. Files can only be accessed by means of a file
identifier.
(b) GFS_DIR_NAME
· Saves the file name and therefore an area larger than (a) above is required.
· Access by file name is allowed.
Current Directory Setting (GFS_SetDir)
The directory information area read by GFS_LoadDir is used as the current directory.
Root Directory
[Logical structure of CD ROM]
0
1
2
Directory 3
information area Sub-directories
0 File
Directory 1
Set current
information
directory 2
Read
3
GFS_SetDir GFS_LoadDir
0
Directory 1
information
2
Read
3
GFS_LoadDir
Figure 3.2 Setting Directory Information
User's Guide 1 CD Library 9
The following procedure must be followed to access files in a sub-directory.
Read directory information
↓
Set current directory
↓
Open file
↓
Access file
↓
Close file
Two examples of this procedure are shown below.
Example: Accessing a file in a directory other than the root directory
An example of a procedure program for accessing a file in a sub-directory is shown
below. Here, the file to be accessed is in the directory specified by dir_fid in the current
directory.
#define MAX_DIR 10 /*maximum number of directories */
GfsDirTbl dirtbl; /*Directory information storage area */
GfsDirId dirid[MAX_DIR]; /*Directory information storage area */
Sint32 dir_fid; /*enters directory file identifier */
Sint32 fid; /*enters accessed file identifier */
GfsHn gfs; /*file handler of accessed file */
GFS_DIRTBL_TYPE(&dirtbl) = GFS_DIR_ID;
GFS_DIRTBL_NDIR(&dirtbl) = MAX_DIR;
GFS_DIRTBL_DIRID(&dirtbl) = dirid;
GFS_LoadDir(dir_fid, &dirtbl); /*reads directory information */
GFS_SetDir(&dirtbl); /*sets current directory */
/*sets identifier of file accessed in fid */
gfs = GFS_Open(fid);
/*
*file access performed here
*/
GFS_Close(gfs)
10
Example: Simultaneous access of multiple files in different directories
In order to access files in different directories, the target files must be opened while
switching the current directory. An example is shown in which two files in the two sub-
directories directly below the current directory are accessed simultaneously. This file
identifiers of the two sub-directories with the files to be accessed are respectively
specified by dir_fidl and dir_fid2.
#define MAX_DIR 10
GfsDirTbl curdir;
GfsDirTbl dirtbl1, dirtbl2;
GfsDirId dirid1[MAX_DIR];
GfsDirId dirid2[MAX_DIR];
Sint32 dir_fid2, dir_fid2;
Sint32 fid1, fid2;
GfsHn gfs1, gfs2
/*loads directory information of current directory dir_fidl */
GFS_DIRTBL_TYPE(&dirtbl1) = GFS_DIR_ID;
GFS_DIRTBL_NDIR(&dirtbl1) = MAX_DIR;
GFS_DIRTBL_DIRID(&dirtbl1) = dirid1;
GFS_LoadDir(dir_gfsl, &dirtbll);
/*loads directory information of current directory dir_fid2 */
GFS_DIRTBL_TYPE(&dirtbl2) = GFS_DIR_ID;
GFS_DIRTBL_NDIR(&dirtbl2) = MAX_DIR;
GFS_DIRTBL_DIRID(&dirtbl2) = dirid2;
GFS_LoadDir(dir_gfs2, &dirtbl2);
/*opens the file fid1 of the directory dir_fid1 */
GFS_SetDir(&dirtbl1);
gfs1 = GFS_Open(fid1);
/*opens the file fid2 of the directory dir_fid2 */
GFS_SetDir(&dirtbl2);
gfs2 = GFS_Open(fid2);
/*
*file access is performed here
*/
GFS_Close(gfs1);
GFS_Close(gfs2);
3.4 Conversion Between File Names and File Identifiers
When directory information containing file names is set to the current directory,
functions for converting between file names and file identifiers can be used.
If directory information not containing a file name is set to the current directory, an
error results if these functions are called. An example defining a function that uses
this function to open a file by its file name is shown below.
Example: /*opens file specified by file name */
GfsHn OpenByName(Uint8 *fname)
{
Sint32 fid = GFS_NameToId(fname);
if (fid < 0) {
return NULL;
}
return GFS_Open(fid);
}
User's Guide 1 CD Library 11
3.5 CD Block File System
Directories can be controlled using the CD block file system (file system built into
the CD block; CDBFS below).
The processes for initialization, reading directory information and setting the current
directory using the CDBFS are shown below.
Initialization
In order to utilize the functions of the CDBFS, NULL must be specified for the
pointer to the directory control structure and GFS_Init must be called. Upon comple-
tion of processing by GFS_Init, the root directory is set by the CDBFS.
Reading Directory Information
In order to read sub-directory information, NULL is specified for the pointer to the
directory control structure and GFS_LoadDir is called to indicate that the storage
destination of the directory information is in the CD block.
Setting Current Directory
In order to set the directory information set in the CD block to the current directory,
NULL is specified for the pointer to the directory control structure and GFS_SetDir
is called.
Even if settings that use the CDBFS are performed, directory control can be partially
performed with this library. In that case, always be aware of which directory control
function being utilized. The advantages and disadvantages of using the CDBFS are
listed in Table 3.1.
Table 3.1 Advantages and Disadvantages of Using CDBFS
Advantages Disadvantages
· Uses small amount of host memory. · The CD ROM is accessed each time a file in a
different directory is accessed.
· The amount of CD buffer that can be used by
applications is reduced by one sector.
· File names cannot be used.
The functions GFS_Init and GFS_LoadDir, which read directory information, return
the number of directories read as the function value. When the CDBFS is used, that
number becomes the number of directories the CDBFS is holding.
An error results if a file name is used when the current directory of the CDBFS is set.
12
4.0 File Access
4.1 Access Models
A diagram of a file access model is shown in Figure 4.1.
GFS_NwCdRead GFS_Fread
GFS_NwFread
CD ROM CD Buffer Host Area
Read Fetch
CD Block
Figure 4.1 Access Function Model
Transferring data from the CD ROM to the CD buffer is called “reading”, and trans-
ferring data from the CD buffer to the host area is called “fetching”.
By utilizing GFS_Fread and GFS_NwFread, an application can transfer data from the
CD ROM without being aware of read processing. To control read processing from
the application, use GFS_NwCdRead.
4.2 Access Pointer
Since the access pointer is updated by reading, it moves in sector units. Movement
of the access pointer when the following expression is executed to read 5000 bytes to
the host area buffer is shown in Figure 4.2. After execution, the access pointer moves
from AP1 to AP2.
GFS_FREAD(gfs, 3, buf, 5000);
1 sector
AP1 AP2
Parts read to host area
Figure 4.2 Movement of access pointer
User's Guide 1 CD Library 13
Sizes of sectors for each type of file are shown in Table 4.1
Table 4.1 Sector Lengths for Each Type of File
File type Sector length (bytes)
CD ROM mode 1 2048
CD ROM mode 2 form 1 only 2048
CD ROM mode 2 form 2 only 2324
Includes CD ROM mode 2 Undefined
DOS file 2048
Memory file 2048
While reading is performed in sector units, fetching is performed in 4-byte units.
4.3 Parameters Controlled for Each File
Of the parameters controlled by the library for each file opened, an application can
change up to five. These parameters are shown in Table 4.2.
Table 4.2 Parameters for Each File
Parameter Description Function changed Initial value
Access pointer Offset of file at which GFS_Seek 0
reading is started (unit:
sector)
Fetch mode Specifies whether sector GFS_SetGmode GFS_GMODE_ERASE
data in CD buffer is erased
or left after fetching
Transfer mode Specifies device that GFS_SetTmode GFS_TMODE_CPU
performs fetching
Read parameter Maximum number of GFS_SetReadPara GFS_RPARA_DFL
sectors transferred in one
read
Fetch parameter Number of sectors GFS_SetTransPara 1
transferred in one fetch
The opened file occupies one filter, which is a CD block resource, and one buffer
partition at a time.
14
5.0 Access Modes
The two access modes provided by this library are described below.
· Return-upon-completion access
Control is not returned to the application until completion of access.
· Immediate-return access
Control is returned as soon as an access request is received.
5.1 Return-Upon-Completion Access
Return-upon-completion access is similar to the file access function in the standard
C library. An example return-upon-completion access program is shown below.
Example:
#define BUF_SIZE 2048
GfsHn gfs;
Sint32 fid;
Sint32 nsct = 1;
Uint32 buf[BUF_SIZE]
gfs = GFS_Open(fid);
GFS_Fread(gfs, nsct, buf, BUF_SIZE); /*nsct sectors read to buf */
GFS_Close(gfs);
5.2 Immediate-Return Access
Immediate-return access is performed by using a request function and a server
function. The request function executes only request acceptance and immediately
returns. Actual access is performed by repeatedly calling the server function while
monitoring the completion status. The application can also be processed in the call
loop of the server function.
A file handle that has issued a request cannot issue another request until processing
of the first one is completed.
User's Guide 1 CD Library 15
Immediate-Return Access for Single Files
The server function for single file access is GFS_NwExecOne. An example of a
program that accesses one file using immediate-return access is shown below. In this
example, the request function is GFS_NwFread.
Example:
#define BUF_SIZE 2048*2
GfsHn gfs; /*file handler */
Sint32 nsct = 2; /*number of read sectors */
Sint32 stat; /*server status */
Uint32 buf[BUF_SIZE/4] /*read area */
gfs = GFS_Open(fid); /*opens file */
/*request function */
GFS_NwFread(gfs, nsct, buf, BUF_SIZE); /*reads nsct sectors into buf */
/*returns control immediately */
for (;;) {
/*server function */
stat = GFS_NwExecOne(GFS); /*executes read */
if (stat == GFS_SVR_COMPLETED) {/*read complete? */
break;
}
user(); /*optional user process */
}
GFS_Close(gfs); /*closes file */
16
Immediate-ReturnAccess for Multiple Files
The server function for continuous access of multiple files is GFS_NwExecServer.
The request function is used in common with access of single files.
The application issues a request for access of multiple files. Following this, access is
executed sequentially by periodically passing control to the server. Access is per-
formed one at a time in the order of the requests.
Here is an example of a program that performs user processing while reading three
files.
Example:
/*number of sectors read from each file */
#define NSCT1 1
#define NSCT2 2
#define NSCT3 3
/*size of data storage area of each file (unit: byte) */
#define BSIZE1 2048*NSCT1
#define BSIZE2 2048*NSCT2
#define BSIZE3 2048*NSCT3
Sint32 fid1, fid2, fid3; /*file identifier of each file */
GfsHn gfsl, gfs2, gfs3; /*file handle of each file */
Uint32 buf1[BSIZE1/4]; /*data storage area of each file
Uint32 buf2[BSIZE2/4];
Uint32 buf3[BSIZE3/4];
GfsHn now_gfs; /*file handle during access */
Sint32 stat; /*server status */
gfsl = GFS_Open(fid1); /*opens file */
gfs2 = GFS_Open(fid2);
gfs3 = GFS_open(fid3);
GFS_NwFread(gfs1, NSCT1, buf1, BSIZE1); /*starts read operation */
GFS_NwFread(gfs2, NSCT2, buf2, BSIZE2);
GFS_NwFread(gfs3, NSCT3, buf3, BSIZE3);
for (;;) {
stat = GFS_NwExecServer(&now_gfs); /*executes read */
if (stat == GFS_SVR_COMPLETED { /*is there work to execute?
break;
}
user();
}
GFS_Close(gfs1);
GFS_Close(gfs2);
GFS_Close(gfs3);
User's Guide 1 CD Library 17
Pre-loading to CD Buffer
If pre-reading to the CD buffer is specified by GFS_NwCdRead when a large file is
continuously loaded a little at a time, then full advantage can be taken of the read
speed of the CD.
In the program example shown below, a 1000 sector file is continuously read 10
sectors at a time. GFS_NwCdRead specifies to look ahead 1000 sector pre-reads, and
therefore the 1000 sectors of the target file are continuously played and stored in the
buffer. Since data is fetched from the buffer at the same time this processing is per-
formed, the buffer does not get full and playback is not interrupted.
If this processing is performed without pre-reading, then playback of the CD is
interrupted every 10 sectors and time is wasted.
An example of a program that pre-reads to the CD buffer is shown.
Example:
#define SECT_SIZE 2048
#define FILE_ SIZE 10000*SECT_SIZE
#define RD_UNIT 10
Uint8 *rd_bp, *proc_bp; /*read buffer and processing buffer */
Uint32 buf1[RD_UNIT*SECT_SIZE/4]; /*data storage area 1 */
Uint32 buf2[RD_UNIT*SECT_SIZE/4]; /*data storage area 2 */
GfsHn gfs;
Sint32 i, stat, nbyte;
gfs = GFS_Open(fid);
GFS_NwCdRead(gfs, FILE_SIZE); /*pre-read specification for CD buffer */
GFS_SetTransPara(gfs, RD_UNIT); /*maximum RD_UNIT sector fetched once */
for (i = 0; i < FILE_SIZE / RD_UNIT; ++I) {
/*read and processing buffer settings
if (i & 1) {
rd_bp = buf1;
proc_bp = buf2;
} else {
rd_bp = buf2;
proc_bp = buf1;
}
/*executes fetch from CD buffer
GFS_NwFread(gfs, RD_UNIT, rd-bp, RD_UNIT * SECT_SIZE);
do {
if (i > 0) {
user_process(proc_bp);
} else {
user_process0();
}
GFS_NwExecOne(gfs);
GFS_NwGetStat(gfs, &stat, &nbyte);
} while (nbyte < RD_UNIT * SECT_SIZE);
}
18
6.0 Other Functions
6.1 Development Support Functions
The file system provides a function to access memory files and DOS files to support
debugging. This function makes it possible to access files that have not been prepared
on the CD ROM yet or files that have been changed since the CD ROM was made in
the same way files on the CD ROM are accessed. However, this function cannot be
used together with the CDBFS.
The mechanism that facilitates access of debugging files in the same way as files on
the CD ROM lies in the directory information read process.
When directory information is read from the CD ROM, directory information is also
read form the debugger file. The information in the debugger file is processed either
in place of or in addition to the information in the CD ROM file.
After reading directory information from a directory, the following processing is
performed.
1) Substitution
The directory information from a debugger file of the same name as the CD ROM
file is set to the directory information area in place of the corresponding CD ROM
file.
2) Addition
A debugger file for which substitution was not performed is added to the directory
information storage area.
In the substitution of the debugger file, the memory file takes precedence over the
DOS file. An example in which these processes are performed is shown below.
Figure 6.1 shows the file configuration.
CD ROM DOS SIMM
DIR1 FILE1 FILE1
.
FILE4 SIMMFILE
..
DOS_FILE
FILE1
FILE2
FILE3
DIR2 .
..
FILE4
FILE5
FILE6
Figure 6.1 File Configuration Example
User's Guide 1 CD Library 19
The results of obtaining the directory information of DIR1 with this file configura-
tion are shown in Table 6.1 and the results of obtaining the directory information of
DIR2 are shown in Table 6.2
Table 6.1 Directory Information of DIR1
Directory information CD ROM DOS SIMM
obtained
. .
.. ..
FILE1 FILE1 FILE1 FILE1
FILE2 FILE2
FILE3 FILE3
FILE4 FILE4
DOS_FILE DOS_FILE
SIMMFILE SIMMFILE
The files with lines through them indicate that they have been replaced.
Table 6.1 Directory Information of DIR2
Directory information CD ROM DOS SIMM
obtained
. .
.. ..
FILE4 FILE4 FILE4
FILE5 FILE5
FILE6 FILE6
FILE1 FILE1 FILE1
DOS_FILE DOS_FILE
SIMMFILE SIMMFILE
The files with lines through them indicate that they have been replaced.
As shown in the examples above, substitution and addition by a debugger file can
be performed on all directories of a CD ROM.
20
6.2 Error Processing Functions
By registering error processing functions, it is possible to specify that an error pro-
cessing function be called in the event an error should occur during execution of a
library function. Error processing functions are not registered in the initial state.
When an error does occur, the error processing function is executed using the fol-
lowing call format.
void *(func)(void *obj, Sint32 err); /*error processing function */
void *obj; /*pointer to registered object */
Sint32 err_code; /*generated error code */
(*func)(obj, err_code); /*calls error processing function */
When control returns from the error processing function, the library function returns
control to the application using the error code as the function value.
6.3 Multiple Processing
This is the processing required when the functions of this library are used (multiple
processing) for both the main processing and the interrupt processing.
When an example is made to execute the functions of this library simultaneously for
main processing and interrupt processing, the function value called last becomes
error code GFS_ERR_BUSY. In that case, the following measures must be taken
depending on whether this occurs during main processing or interrupt processing.
During Main Processing
Wait until the called function stops returning GFS_ERR_BUSY or postpone calling of
this library function until the next opportunity.
During Interrupt Processing
Postpone calling of this library function until the next opportunity.
User's Guide 1 CD Library 21
(This page was blank in the original Japanese document.)
22
7.0 Data Specifications
A list of file system data is shown in Table 7.1.
Table 7.1 Data Table
Data Data Name No.
Basic data 1.0
Constants 2.0
File attribute GFS_ATR_- 2.1
Access status GFS_NWSTAT_- 2.2
Access Server status GFS_SVR_- 2.3
Seek mode GFS_SEEK_- 2.4
Get (fetch) mode GFS_GMODE_- 2.5
Transfer mode GFS_TRANS_- 2.6
Error code GFS_ERR_- 2.7
Other 2.8
Data types 3.0
File handle GfsHn 3.1
Directory information control GfsDirTbl 3.2
Directory information with no file name GfsDirId 3.3
Directory information with file name GfsDirName 3.4
Error processing function GfsErrFunc 3.5
Error status GfsErrStat 3.6
User's Guide 1 CD Library 23
7.1 Basic Data
Title Data Data Name No.
Data specification Basic data 1.0
1) Basic Data Types
A table of the basic data structure is shown below.
Type name Explanation
Uint8 1-byte integer without sign
Sint8 1-byte integer with sign
Uint16 2-byte integer without sign
Sint16 2-byte integer with sign
Uint32 4-byte integer without sign
Sint32 4-byte integer with sign
Boo1 logic type 4-byte integer
2) Logical Constants
These are used as logical (Boo1) values.
Constant name Value Explanation
FALSE 0 False logical value
TRUE 1 True logical value
3) NULL Pointer
Constant name Value Explanation
NULL (void *)0 Null pointer
24
7.2 Constants
Title Data Data Name No.
Data specification File attribute GFS_ATR_- 2.1
The constants shown below indicate the presence or absence of their respective
attributes. These constants are used for attributes in directory information read by
GFS_Init and GFS_LoadDir and for attributes output by GFS_GetFileInfo.
The bits not shown here are undefined.
Bit 7 6 5 4 3 2 1 0
GFS_ATR_END_TBL 1: End of directory information table
GFS_ATR_FORM1 1: Includes FORM1 sectors
GFS_ATR_FORM2 1: Includes FORM2 sectors
GFS_ATR_INTLV 1: Includes interleave sectors
GFS_ATR_DIR 1: Directory file
Title Data Data Name No.
Data specification Access status GFS_NWSTAT_- 2.2
The constants shown below indicate the access status of the server. Therefore, output
using GFS_NwGetStat.
Constant name Explanation
GFS_NWSTAT_NOACT No action
GFS_NWSTAT_FREAD GFS_NwFread is being executed
GFS_NWSTAT_CDREAD GFS_NwCdRead is being executed
User's Guide 1 CD Library 25
Title Data Data Name No.
Data specification Access Server status GFS_SVR_- 2.3
The constants shown below are functions of GFS_NwExecOne and GFS_NwExecServer.
Their execution status is shown.
Constant name Explanation
GFS_SVR_COMPLETED Processing complete
GFS_SVR_BUSY Processing in progress
GFS_SVR_CDPAUSE Temporary pause because CD buffer full
GFS_SVR_ERROR Error has occurred during access
Title Data Data Name No.
Data specification Seek mode GFS_SEEK_- 2.4
The constants below indicate the reference when moving an access pointer. These are
used as arguments for GFS_Seek.
Constant name Explanation
GFS_SEEK_SET Top of file
GFS_SEEK_CUR Current position
GFS_SEEK END End of file
Title Data Data Name No.
Data specification Fetch mode GFS_GMODE_- 2.5
The constants below indicate the method by which data are fetched from the CD ROM
buffer. These are used as arguments for GFS_SetGmode.
Constant name Explanation
GFS_GMODE_ERASE Delete from buffer after transferring
GFS_GMODE_RESIDENT Leave in CD buffer after transferring
26
Title Data Data Name No.
Data specification Transfer mode GFS_TRANS_- 2.6
The constants below indicate the device that executes transfer from the CD buffer. These
are used as arguments of GFS_SetTmode.
Constant name Explanation
GFS_TMODE_SCU DMA transfer by SCU
GFS_TMODE_SDMA0 DMA cycle steal transfer channel 0
GFS_TMODE_SDMA1 DMA cycle steal transfer channel channel 1
GFS_TMODE_CPU Software transfer
User's Guide 1 CD Library 27
Title Data Data Name No.
Data specification Error codes GFS_ERR_- 2.7
The value of GFS_ERR_OK is "0". Other error codes have negative values.
Constant name Explanation
GFS_ERR_OK Normal end
GFS_ERR_CDRD CD read error
GFS_ERR_CDNODISC No CD is set in the player
GFS_ERR_CDROM A non-CD ROM disc is set in the player
GFS_ERR_DIRTBL Contents of directory control table are incorrect
GFS_ERR_OPENMAX The value for the maximum number of opens is
incorrect
GFS_ERR_DIR The specified file is not a directory
GFS_ERR_CDBFS CD block file system error
GFS_ERR_NONAME File names cannot be used in the current directory
GFS_ERR_NEXIST File name does not exist
GFS_ERR_FID Incorrect file identifier
GFS_ERR_HNDL File handle is incorrect
GFS_ERR_SEEK Seek position is incorrect
GFS_ERR_ORG Reference position is incorrect
GFS_ERR_NUM Byte number is negative
GFS_ERR_OFS Incorrect offset
GFS_ERR_FBUSY Processing of specified file handle not complete
GFS_ERR_PARA Incorrect mode
GFS_ERR_BUSY Library function is being executed
GFS_ERR_NOHNDL No open file handle
GFS_ERR_PUINUSE Pickup is being used
GFS_ERR_ALIGN Data read area is not in 4-byte boundary
GFS_ERR_TMOUT Internal processing time out
GFS_ERR_CDOPEN Tray is open
GFS_ERR_BFUL Read stopped because buffer is full
Title Data Data Name No.
Data specification Other 2.8
Other constants used in this library are shown below.
Constant name Explanation
GFS_RPARA_DFL Initial value of read parameter
GFS_BUFSIZ_INF Specifies read regardless of the size of the read area
in GFS_Load
28
7.3 Data Types
Title Data Data Name No.
Data specification File handle GfsHn 3.1
Holds information regarding file access for each file. The information is generated by
GFS_Open. Most functions that access files reference this data.
Title Data Data Name No.
Data specification Directory information control GfsDirTbl 3.2
Directory information control structures can control directory information without file
names and directory information with files names. The following constants specify
which is controlled.
Constant name Explanation
GFS_DIR_ID Does not have file name information
GFS_DIR_NAME Has file name information
These are data types for controlling directory information. The directory information
table classification and its size and substance are held.
GfsDirTbl *dirtbl
Access macro Type Explanation
GFS_DIRTBL_TYPE(dirtbl) Sint32 Directory information table classification
GFS_DIRTBL_NDIR(dirtbl) Sint32 Maximum number of elements in directory
information table
GFS_DIRTBL_DIRID(dirtbl) GfsDirId * Pointer to directory information table with
no file names
GFS_DIR_NAME(dirtbl) GfsDirName * Pointer to directory information table with
file names
(a) When directory information with no file names is used
GfsDirTbl dirtbl;
GfsDirId dir_id[MAX_DIR_ID]
GFS_DIRTBL_TYPE(&dirtbl) = GFS_DIR_ID; /*specifies directory information with no */
/*file name
GFS_DIRTBL_NDIR(&dirtbl) = MAX_DIR_ID; /*maximum number of elements
GFS_DIRTBL_DIRID(&dirtbl) = dir_id;
/*name
(b) When directory information with file names is used
GfsDirTbl dirtbl;
GfsDirName dir_name[MAX_DIR_NAME]
GFS_DIRTBL_TYPE(&dirtbl) = GFS_DIR_NAME; /*specifies directory information with */
/*file name */
GFS_DIRTBL_NDIR(&dirtbl) = MAX_DIR_NAME; /*maximum number of elements */
GFS_DIRTBL_DIRNAME(&dirtbl) = dir_name; /*directory information table with file
/*name */
User's Guide 1 CD Library 29
Title Data Data Name No.
Data specification Directory information without file names GfsDirId 3.3
These are directory information structures with no file names. GFS_DIR_ID is used to
specify the type of directory information table (GFS_DIRTBL_TYPE).
GfsDirId *dir
Access macro Type Explanation
GFS_DIR_FAD(dir) Sint32 Top FAD of file
GFS_DIR_SIZE(dir) Sint32 Size of file (unit: byte)
GFS_DIR_FN(dir) Uint8 File number
GFS_DIR_ATR(dir) Uint8 File attribute
GFS_DIR_UNIT(dir) Uint8 Unit size of file (unit: sector)
GFS_DIR_GAP(dir) Uint8 Gap size of file (unit: sector)
Title Data Data Name No.
Data specification Directory information with file names GfsDirName 3.4
These are directory information structures which include file names. GFS_DIR_NAME
is used to specify the type of directory information table (GFS_DIRTBL_TYPE).
GfsDirId *dir
Access macro Type Explanation
GFS_DIR_FAD(dir) Sint32 Top FAD of file
GFS_DIR_SIZE(dir) Sint32 Size of file (unit: byte)
GFS_DIR_FN(dir) Uint8 File number
GFS_DIR_ATR(dir) Uint8 File attribute
GFS_DIR_UNIT(dir) Uint8 Unit size of file (unit: sector)
GFS_DIR_GAP(dir) Uint8 Gap size of file (unit: sector)
GFS_DIR_FNAME(dir) Uint8[] File name *1
*1: The area size is 12 bytes. When the file name length is 12 bytes, the character string
does not end with '¥0.'
30
Title Data Data Name No.
Data specification Error processing function GfsErrFunc 3.5
These are functions set with GFS_SetErrFunc.
Syntax: void (*GfsErrFunc) (void *obj, Sint32 ec)
Input: obj : Object required for error processing
ec : Error code
Output: none
Title Data Data Name No.
Data specification Erro status GfsErrStat 3.6
Data output by GFS_GetErrStat.
GfsErrStat *stat
Access macro Type Explanation
GFS_ERR_FUNC(err) GFSErrFunc Pointer to error processing function
GFS_ERR_OBJ(err) void * First argument of error processing function
GFS_ERR_CODE(err) Sint32 Error code
User's Guide 1 CD Library 31
8.0 Function Specifications
A list of file system library functions is shown in Table 8.1.
Table 8.1 File System Library Function Table
Action Function Name No.
Directory operations
Initialization of file system GFS_Init 1.1
Read directory information GFS_LoadDir 1.2
Set current directory GFS_SetDir 1.3
Convert from file names to file identifiers GFS_ToId 1.4
Convert from identifiers to file names GFS_IdToName 1.5
File operations
Open file GFS_Open 2.1
Close file GFS_Close 2.2
Move access pointer GFS_Seek 2.3
Get access pointer GFS_Tell 2.4
Check file end GFS_IsEof 2.5
Convert from byte length to sector length GFS_ByteToSct 2.6
Get file size GFS_GetFileSize 2.7
Get file information GFS_GetFileInfo 2.8
Return-Upon-Completion Loading
File batch read GFS_Load 3.1
Read data GFS_Fread 3.2
Immediate-Return Reading
Start reading data GFS_Load 4.1
Start pre-read to CD buffer GFS_NwCdRead 4.2
Check completion of access operation GFS_NwIsComplete 4.3
Stop access operation GFS_NwStop 4.4
Get current access status GFS_NwGetStat 4.5
Execute access in file units GFS_NwExecOne 4.6
Execute multiple file access operation GFS_NwExecServer 4.7
Read Parameter Settings
Get (fetch) mode setting (resident/destructive) GFS_SetGmode 5.1
Transfer mode setting (software, DMA, etc.) GFS_SetTmode 5.2
Amount read to CD buffer setting GFS_SetReadPara 5.3
Amount transferred from CD buffer setting GFS_SetTransPara 5.4
Other
Move the CD pickup GFS_CdMovePickup 6.1
Error processing function settings GFS_SetErrFunc 6.2
Get error status GFS_GetErrStat 6.3
32
8.1 Directory Control
Title Function Function Name No.
Function specification Initialize file system: mount GFS_Init 1.1
Syntax Sint32 GFS_Init(Sint32 open_max, void *work, GfsDirTbl *dirtbl)
Input open_max : maximum number of files that can be opened at one
time (1 to 24)
work : work area for library
dirtbl : directory information control structure
Output dirtbl : directory information control structure (directory
information storage area)
Function value Number of directories read. A negative error code is returned when an error occurs.
Function Initializes the file system and mounts CD ROM's. The directory control function is
specified by dirtbl.
dirtbl Directory control functions used
Directory control structure Directory control by this library
NULL Directory control of CD block file system
Note: Work must be positioned in 4-byte boundaries. The CD block initialization flag,
standby time, ECC time and number of retries do not change.
Title Function Function Name No.
Function specification Read directory information GFS_LoadDir 1.2
Syntax Sint32 GFS_LoadDir(Sint32 fid, GfsDirTbl *dirtbl)
Input fid : directory file identifier
dirtbl : directory information control structure
Output dirtbl : directory information control structure (directory
information storage area)
Function value Number of directories read. A negative error code is returned when an error occurs.
Function Reads directory information from the specified directory file. The storage destination
of the directory information will change according to the specification by dirtbl.
dirtbl Directory information storage area
Directory control structure Directory information storage area of dirtbl
NULL File control information area in CD block
When NULL is specified for dirtbl, an error will result if use of the CD block file
system is not declared with GFS_Init.
However, it is always possible to pass a pointer to an appropriate directory
information control structure other than NULL to dirtbl.
User's Guide 1 CD Library 33
Title Function Function Name No.
Function specification Set current directory GFS_SetDir 1.3
Syntax Sint32 GFS_SetDir(GfsDirTbl *dirtbl)
Input dirtbl : directory information control structure
Output none
Function value Error code
Function Sets the specified directory information to the current directory. The directory
information used by the dirtbl specification changes.
dirtbl Directory information used
Directory control structure Contents of dirtbl
NULL File control information in CD block
When NULL is specified for dirtbl, an error will result if use of the CD block file
system is not declared with GFS_Init.
However, it is always possible to pass a pointer to an appropriate directory
information control structure other than NULL to dirtbl.
Title Function Function Name No.
Function specification Convert from name to file identifier GFS_NameToId 1.4
Syntax Sint32 GFS_NameToId(Uint8 *fname)
Input fname : file name
Output none
Function value File identifier. A negative error code is returned when an error occurs.
Function Returns a file identifier corresponding to the file name.
Title Function Function Name No.
Function specification Convert from identifier to file name GFS_IdToName 1.5
Syntax const Uint8 *GFS_IdToName(Sint32 fid)
Input fname : file identifier
Output none
Function value Pointer to file name. NULL when an error occurs.
Function Returns a pointer to the file name corresponding to the file identifier. This point
specifies the conversion table area used by this library.
34
8.2 File Operations
Title Function Function Name No.
Function specification Open file GFS_Open 2.1
Syntax GfsHn GFS_Open(Sint32 fid)
Input fid file identifier
Output none
Function value File handler. NULL is returned in the case of an error.
Function Opens the specified file and returns the file handler.
Title Function Function Name No.
Function specification Close file GFS_Close 2.2
Syntax void GFS_Close(GfsHn gfs)
Input gfs : file handle
Output none
Function value none
Function Closes the specified file handle.
Title Function Function Name No.
Function specification Move access pointer GFS_Seek 2.3
Syntax Sint32 GFS_Seek(GfsHn gfs, Sint32 off, Sint32 org)
Input gfs : file handle
off : amount access point is moved (unit: sector)
org : reference for moving (seek mode: GFS_SEEK_-)
Output none
Function value Position of access point after moving. A negative error code is returned if there is an
error.
Function The access pointer is moved to a position off sectors from org. If movement to a
position past the file end is specified, the access pointer is moved on the assumption
that the file exists up to that position.
Title Function Function Name No.
Function specification Get access pointer GFS_Tell 2.4
Syntax Sint32 GFS_Tell(GfsHn gfs)
Input gfs : file handle
Output none
Function value Position of access pointer. A negative error code is returned if there is an error.
Function Gets the position of the access pointer.
User's Guide 1 CD Library 35
Title Function Function Name No.
Function specification Check file end GFS_IsEof 2.5
Syntax Bool GFS_IsEof(GfsHn gfs)
Input gfs : file handle
Output none
Function value file end flag
Function Checks whether or not the access pointer has reached the end of a file. The function
values have the following meanings.
TRUE: reached file end
FALSE: has not reached file end
If an incorrect file handle is entered, then it is considered that the file end has been
reached.
Title Function Function Name No.
Function specification Convert from byte size to sector length GFS_ByteToSct 2.6
Syntax Sint32 GFS_ByteToSct(GfsHn gfs, Sint32 nbyte)
Input gfs : file handle
nbyte : number of bytes
Output none
Function value Number of sectors; returns a negative error code when an error occurs.
Function Converts the unit from byte to sector (nsct). The length nsct of the sector unit is
obtained by the following equation.
nbyte + sector length of file - 1
nsct =
file sector length
In cases in which the sector length is not defined (Form1 and Form2 are mixed), then
"0" is returned.
Title Function Function Name No.
Function specification Get file size GFS_GetFileSize 2.7
Syntax void GFS_GetFileSize(GfsHn gfs, Sint32 *sctsize, Sint32 *nsct,
Sint32 *lastsize)
Input gfs : file handle
Output sctsize : number of sectors
nsct : number of sectors (does not include last sector)
Function value none
Function Gets information for seeking the file size. If NULL is specified for sctsize, nsct and
lastsize, the output of the information can be suppressed. The file size is obtained by
the following equation.
fsize = sctsize * (nsct - 1) + lastsize:
Note: When lastsize for the file of form2 is 2048 bytes, then it must be processed as the last
sector having 2324 bytes of data.
36
Title Function Function Name No.
Function specification Get file information GFS_GetFileInfo 2.8
Syntax void GFS_GetFileInfo(GfsHn gfs, Sint32 *fid, Sint32 *fn,
Sint32 *fsize, Sint32 *atr )
Input gfs : file handle
Output fid : file identifier
fn : file number
fsize : file size (unit: byte)
atr : attribute
Function value none
Function Gets file information. If NULL is specified for fid, fn, fsize and atr, the output of the
information can be suppressed. The file size is recorded in the directory information,
and therefore the size of one sector is calculated as 2048 bytes.
8.3 Return-Upon-Completion Read
Title Function Function Name No.
Function specification Batch load a file GFS_Load 3.1
Syntax Sint32 GFS_Load(Sint32 fid, Sint32 off, void *buf, Sint32 bsize)
Input fid : file identifier
off : offset (unit: sector)
bsize : top limit of number of data to be loaded (unit: byte)
Output buf : data load area
Function value Number of loaded data (unit: byte); negative error code is returned in case of error.
Function Specifies file identifier and loads data from file. Open and close are performed within
the function.
If the file size is less than bsize, then data is loaded up to the end of the file. When
GFS_BUFSIZ_INF is specified for bsize, then data from the specified position up to
the end of the file is loaded
Note: Buf must be located at 4-byte boundaries.
The default values for the fetch mode, transfer mode, load parameters and fetch
parameters are used.
User's Guide 1 CD Library 37
Title Function Function Name No.
Function specification Load data GFS_Fread 3.2
Syntax Sint32 GFS_Fread(GfsHn gfs, Sint32 nsct, void *buf, Sint32 bsize)
Input gfs : file handle
nsct : number of sector loaded
bsize : top limit of number of data to be loaded (unit: byte)
Output buf : data load area
Function value Number of bytes actually loaded.
Function Specifies an opened file handle and loads data from the file.
Loads nsct sectors of data from the access pointer. Of the data loaded, the data up to
the maximum bsize byte are written to buf.
The access pointer advances nsct sectors.
Note: There are restrictions on the address boundaries of buf depending on the transfer
mode.
· GFS_TMODE_SCU : no restriction
· Other than above : locate at 4-byte boundaries
Even if the access pointer is outside the file range specified by the file handle, it
undergoes read processing as part of the file. Even if the number of sectors specified
straddles the file end, the specified number of sectors undergo read processing.
Regardless of the value specified by GFS_SetReadPara, the default value is used for
the read parameter.
8.4 Immediate-Return Read
Title Function Function Name No.
Function specification Start data loading GFS_NwFread 4.1
Syntax Sint32 GFS_NwFread(GfsHn gfs, Sint32 nsct, void *buf, Sint32 bsize)
Input fid : file handle
nsct : number of sectors loaded
bsize : size of load area (unit: number of bytes)
Output buf : data load area
Function value error code
Function Issues a request for data load in response to a server function. Upon completion of
the requested access operation, the access pointer advances nsct sectors.
Note: The same precaution as noted for GFS_Fread applies to the address boundary of buf.
Even if the access pointer is outside the file range specified by the file handle, it
undergoes read processing as part of the file. Even if the number of sectors specified
straddles the file end, the specified number of sectors undergo read processing.
38
Title Function Function Name No.
Function specification Start pre-read to CD buffer GFS_NwCdRead 4.2
Syntax Sint32 GFS_NwCDread(GfsHn gfs, Sint32 nsct)
Input gfs : file handle
nsct : number of sectors loaded
Output none
Function value error code
Function Issues requests to server function for pre-reads to the CD buffer. Completion of the
requested read operation does not cause the access pointer to change.
If the following conditions are not met, the access operation for the specified file
handle is not terminated.
· The nsct sector data are transferred to the host area by the GFS_Fread function or
the GFS_NwFread function.
· The access operation is stopped by the GFS_NwStop function.
Note: Perform the following operation to find out whether transfer to the host area by the
GFS_NwFread function after the start of a pre-read has been completed.
· Use GFS_NwGetStat to get the number of bytes transferred.
· Check if the number of bytes transferred is equal to the target number of bytes.
(If equal to the target number of bytes, then transfer is complete.)
If a pre-read is performed by the GFS_NwRead function, please take note that
completion of the GFS_NwFread function cannot be checked by the
GFS_NwIsCompleted function.
Title Function Function Name No.
Function specification Check completion of access operation GFS_NwIsComplete 4.3
Syntax Bool GFS_NwIsComplete(GfsHn gfs)
Input gfs : file handle
Output none
Function value status of access operation
Function Check whether the access operation of the server function is complete. The function
values have the following meanings.
TRUE : access complete
FALSE : operation in progress
Title Function Function Name No.
Function specification Stop access operation GFS_NwStop 4.4
Syntax Sint32 GFS_NwStop(GfsHn gfs)
Input gfs : file handle
Output none
Function value Stop Point access pointer. Negative error code if an error occurs.
Function Stops the access operation of a server function. GFS_NwExecServer continues the
access operation on the next file.
User's Guide 1 CD Library 39
Title Function Function Name No.
Function specification Get current access status GFS_NwGetStat 4.5
Syntax void GFS_NwGetStat(GfsHn gfs, Sint32 *stat, Sint32 *ndata)
Input gfs : file handle
Output stat : current access status
ndata : number of data
Function value none
Function Used to get the access status of a server function. The meaning of data for each access
status is shown in the table below.
Access status Processing Meaning of data number
GFS_NWSTAT_NOACT None No meaning
GFS_NWSTAT-FREAD Read from CD to Number of bytes read into host
host area area
GFS_NWSTAT_CDREAD Pre-read to CD Number of sectors read to CD
buffer buffer
Title Function Function Name No.
Function specification Execute access operation in file units GFS_NwExecOne 4.6
Syntax Sint32 GFS_NwExecOne(GfsHn gfs)
Input gfs : file handle
Output none
Function value execution status (GFS_EXEC_-)
Function This is an access server function for single files. It performs the following access to
the file handle in accordance with the access operation called immediately prior to it.
· GFS_NwFread: reads to CD buffer and transfers to host.
· GFS_NwCdRead: reads to CD buffer.
Title Function Function Name No.
Function specification Execute access operation for multiple files GFS_NwExecServer 4.7
Syntax Sint32 GFS_NwExecServer(GfsHn *now_gfs)
Input none
Output now_gfs : file handle to be executed
Function value access server status (GFS_SVR_-)
Function This is an access server function for multiple files. It performs the actual access
(GFS_NwExecOne function) in the order in which requests were issued.
Upon completion of the access operation for one file, processing moves to the next
file.
40
8.5 Read Parameter Settings
Title Function Function Name No.
Function specification Set get (fetch) mode (resident/destructive) GFS_SetGmode 5.1
Syntax Sint32 GFS_SetGmode(GfsHn gfs, Sint32 gmode)
Input gfs : file handle
gmode : get (fetch) mode (GFS_GMODE_-)
Output none
Function value Get (fetch) mode before setting. Negative error code in the case of an error.
Function Sets the get (fetch) mode.
Title Function Function Name No.
Function specification Set transfer mode (software/DMA, etc.) GFS_SetTmode 5.2
Syntax Sint32 GFS_SetTmode(GfsHn gfs, Sint32 gmode)
Input gfs : file handle
tmode : transfer mode (GFS_TMODE_-)
Output none
Function value Transfer mode before setting; a negative error code in the case of an error.
Function Sets the method of transfer from the CD buffer.
Title Function Function Name No.
Function specification Set amount read to CD buffer GFS_SetReadPara 5.3
Syntax Sint32 GFS_SetReadPara(GfsHn gfs, Sint32 cdrsize)
Input gfs : file handle
cdrsize : maximum amount read at one time to CD buffer
(unit: sector)
Output none
Function value Read amount before setting; a negative error code in the case of an error.
Function Sets the maximum value for the amount read at one time to the CD buffer.
Title Function Function Name No.
Function specification Set amount transferred from CD buffer GFS_SetTransPara 5.4
Syntax Sint32 GFS_SetTransPara(GfsHn gfs, Sint32 tsize)
Input gfs : file handle
tsize : amount transferred at one time to a specified area
(unit: sector)
Output none
Function value Transfer amount before setting. Negative error code in the case of an error.
Function Sets the amount of data transferred to the destination area in one get (fetch)
operation.
User's Guide 1 CD Library 41
8.6 Other
Title Function Function Name No.
Function specification Move CD pickup GFS_CdMovePickup 6.1
Syntax Sint32 GFS_CdMovePickup(GfsHn gfs)
Input gfs : file handle
Output none
Function value Error code
Function Moves the CD pickup to the position of the access pointer. This is used to shorten
pickup seek time when reading from the CD with the GFS_Fread, GFS_NwFread or
GFS_NwCdRead functions.
Title Function Function Name No.
Function specification Set error processing function GFS_SetErrFunc 6.2
Syntax void GFS_SetErrFunc(void (*func)(GfsErrFunc func), void *obj)
Input func : function called when error occurs
obj : first argument of func function
Output none
Function value none
Function Records the function called when an error occurs. When NULL is set to func, then no
error processing function is registered.
Title Function Function Name No.
Function specification Get error status GFS_GetErrStat 6.3
Syntax void GFS_GetErrStat(GfsErrStat *stat)
Input none
Output stat : error
Function value none
Function Gets the error status of the library function executed last.
42
AppendixA Utilization of Development Support Functions
A.1 Procedure for Using Memory Files
The following operations must be followed in the order shown here to use memory
files.
• Write file data
Make a file that will become the memory file and convert it to a memory file. Use
the MFCAT.EXE application to convert it to a memory file.
• Load memory file
Set the memory file in the memory area. This is done using the ICE command.
This must be done each time the contents of the memory area are destroyed.
• Load the target program
Load the program file being developed to the target.
• Declare use of the memory file
Before executing GFS_Init, the top address in memory is set to !gfsd_mmc/
GFMC_base. By doing this, the SIMM directory information is obtained with
GFS_Init. Since the initial value of !gfsd_mmc/GFMC_base is “0”, the SIMM
directory information is not referenced in this state.
GFMC_base is defined as follows:
Sint8 *GFMC_base = 0;
Refer to the CD Tool Manual regarding MFCAT.EXE.
A.2 Procedure for Using DOS Files
The following operations must be followed in the order shown here to use a DOS
file.
• Write corresponding table file
Make a file that becomes the DOS file and make a corresponding table file for the
filenames on the CD ROM and the file names in DOS.
• Boot
Confirm that the DIP switches are set to allow use of SCSI and boot the target.
• Load the target program
After confirming that the IBM PC has recognized the target as a SCSI device,
break the target and load the target program.
• Execute CDSIM.EXE
Execute CDSIM.EXE on the IBM PC.
See the CD Tool Manual regarding corresponding table files and CDSIM.EXE.
User's Guide 1 CD Library 43
A.3 Precautions
The precautions that should be taken when using the development support tools are
listed below.
• When the CD ROM is not used
In order to prevent differences in programs between when they are all CD ROM
files and when they are all debugger files, information for the parent directory
and the current directory is added even when the CD ROM is not used. This
directory information which is automatically added is set as files on the CD ROM.
• Temporarily restricting access
Normally, when both memory files and DOS files are accessed, the DIP switches
of the target are set so that the SCSI is not used in order to temporarily stop DOS
file access, and the computer is rebooted. In order to access only DOS files,
however, “0" is set in !gfsd_mmc/GFMC_base.
• File name access recommended
During use of debugger files, the file identifier may change due to a change in the
file structure. Therefore, the use of access by file name is recommended.
• Debugger file directory information
Debugger file directory information is set as follows:
FAD : file identifier in debugger file
File number :0
Gap size :0
Unit size :0
44
Appendix B Error Processing Methods
The causes and remedies of the following error codes is shown below.
GFS_ERR_CDRD
Cause: Read error in CD block.
Remedy: Check CD ROM hardware and CD ROM media.
GFS_ERR_CDNODISC
Cause: The CD ROM is not set in place.
Remedy: Reset the CD ROM in place.
GFS_ERR_CDROM
Cause: A disc that is not a CD ROM has been inserted.
Remedy: Insert a disc that is a CD ROM.
GFS_ERR_DIRTBL
Cause: The contents of the directory control structure are not correct.
Remedy: Check whether a value or a correct value has been set in each mem-
ber of the directory control structure and whether that value is
correct before calling GFS_Init and GFS_LoadDir.
GFS_ERR_OPENMAX
Cause: The value for the maximum number of open files is incorrect.
Remedy: Check if the specification for the maximum number of files opened
by calling GFS_Init exceeds the range of 1 to 24.
GFS_ERR_DIR
Cause: The specified file is not a directory.
Remedy: Check correspondence between file identifiers and files.
GFS_ERR_CDBFS
Cause: An attempt to use the CD block file system was made even though
there was no use declaration.
Remedy: If the CD block file system is to be used, then specify NULL for the
directory control area address and call GFS_Init.
If the CD block file system is not going to be used, do not specify
NULL for GFS_LoadDir and GFS_SetDir.
GFS_ERR_NONAME
Cause: File names cannot be handled by the current directory.
Remedy: Specify a directory control area in which GFS_DIR_NAME has been
set to GFS_DIRTBL_TYPE and call GFS_Init or GFS_LoadDir.
GFS_ERR_NEXIST
Cause: The specified file name does not exist.
Remedy: Check if the current directory setting or the file name specification
is incorrect.
User's Guide 1 CD Library 45
GFS_ERR_FID
Cause: The file identifier specification is incorrect.
Remedy: Check if the specified file identifier has exceeded the range of
GFS_DIR_NDIR of the directory control structure set in the current
directory.
GFS_ERR_HNDL
Cause: File handle is incorrect.
Remedy: Check if the function value is set of GFS_Open in the variable in
which the file handle is stored, or that the contents of the variable
have not been destroyed.
GFS_ERR_SEEK
Cause: The seek location is incorrect.
Remedy: Check the seek position calculated from the reference position and
the offset.
GFS_ERR_ORG
Cause: The reference position of GFS_Seek is incorrect.
Remedy: Check to be sure the reference position is at one of GFS_SEEK_SET,
GFS_SEEK_CUR or GFS_SEEK_END.
GFS_ERR_NUM
Cause: A negative number of bytes was specified.
Remedy: Check the number of bytes specified by GFS_ByteToSct.
GFS_ERR_OFS
Cause: The offset is incorrect.
Remedy: Check the read start sector position specified by GFS_Load.
GFS_ERR_FBUSY
Cause: Processing of specified file handle remains to be performed.
Remedy: Correct the program so that it accesses again after completing
access of the target file, or reconsider the file structure.
GFS_ERR_PARA
Cause: Incorrect mode.
Remedy: Make sure that correct arguments are given to GFS_SetGMode,
GFS_SetTmode, GFS_SetReadPara and GFS_SetTransPara.
GFS_ERR_BUSY
Cause: Multiplex processing was attempted.
Remedy: Refer to “6.3 Multiple Processing”.
46
GFS_ERR_NOHNDL
Cause: No open file handles.
Remedy: Either increase the specification for the maximum number of files
that can be opened at the same time by GFS_Init or reduce the
number of files opened at the same time.
GFS_ERR_PUINUSE
Cause: GFS_CdMovePickup was called while the pickup was in use.
Remedy: Call GFS_CdMovePickup in a state in which file access is not being
performed.
GFS_ERR_ALIGN
Cause: The read destination of a file is not located at a word boundary.
Remedy: Position the read area at a word boundary.
GFS_ERR_TMOUT
Cause: A response was not received from the CD block in the prescribed
time period.
Remedy: Something may be wrong with the hardware.
GFS_ERR_CDOPEN
Cause: The tray on the CD drive is open.
Remedy: Close the tray and then continue.
GFS_ERR_BFUL
Cause: The CD buffer becomes full and reading is stopped when the fetch
mode is GFS_GMODE_RESIDENT.
Remedy: Adjust the order of access and the amount read to prevent the CD
buffer from becoming full , when the fetch mode is
GFS_GMODE_RESIDENT.
User's Guide 1 CD Library 47
Appendix C
This is an addition to the main part of the manual.
C.1 Additional Explanation
DOS File Parameters
The initial value of the fetch parameters for DOS files is “1”. Since only one sector can
be transferred at a time, settings other than “1” for the fetch parameters are invalid.
C.2 Changes from the Previous Version
1) Changes in CD Pre-read Processing
• Change in how GFS_NwCdRead is used
Even if GFS_NwExecOne is not called after calling GFS_NwCdRead, pre-read
from the CD is enabled.
When look ahead from the CD is used, either all of the specified number of
sectors is transferred to the host, or it is not terminated until access is stopped
(GFS_NwIsComplete does not return TRUE).
• Access Complete Check (Important)
Since GFS_NwCdRead is not terminated until either data transfer ends or
access is stopped (except access of CDDA files), do not wait for termination.
As is shown in the example in the old manual, an endless loop will result if
waiting for termination of GFS_NwExecOne, so use caution.
If GFS_NwFread does not perform pre-read with NwCdRead, then termina-
tion can be checked using the same procedure as in the previous version. If
pre-read from the CD is being used, then use GFS_NwGetStat to check for
termination while also monitoring the number of bytes transferred. An
example is shown below.
GfsHn gfs;
Sint32 fid, stat, nbyte;
Uint32 buf[10*2048/4];
gfs = GFS_Open(fid);
GFS_NwRead(gfs, 100)
for (i = 0, i < 10; ++i) {
GFSNwFread(gfs, 10, buf, 10*2048);
while (GFS_NwExecOne (gfs) != GFS_SVR_COMPLETE) {
GFS_NwGetStat(gfs, &stat, &nbyte);
/*checks whether number of bytes specified by GFS_NwFread has been read */
if (nbyte >= 10*2048) {
break;
}
user(); /*application processing
}
}
48
2) Addition of CDDA File Processing Function
A CDDA file processing function has been added. When a CDDA file is read, the
music track specified by that file is played. However, in order to output sound,
SCSP must be set by the application. CDDA files and regular files have the
following differences.
• Control of files
The only controls the file system performs on CDDA files are playback and
playback range. The playback mode is an omitted value (no repeat, moves
pickup).
• Pre-read
Since the data from CDDA files does not enter the CD buffer, when they are
accessed, pre-read processing and normal access are equivalent.
• Parameters relating to file operation
The fetch mode, transfer mode, read parameters and fetch parameters cannot
be changed for CDDA files. An error is returned when the following functions
are called for CDDA files.
GFS_SetGmode
GFS_SetTmode
GFS_SetReadPara
GFS_SetTransPara
3) File attributes
The following changes were made to make the values of file attributes output by
GFS_GetFileInfo conform with the CD-ROM XA standard.
GFS_ATR_DIR 0x80
GFS_ATR_CDDA 0x40
GFS_ATR_INTLV 0x20
GFS_ATR_FORM2 0x10
GFS_ATR_FORM1 0x80
GFS_ATR_END_TBL 0x01
GFS_ATR_CDD was added because of the addition of CDDA file processing
functions. Its bit are “1” in the CDDA files. Other constant names and meanings
are unchanged.
4) Function values of GFS_Init and GFS_LoadDir
When NULL is specified for the pointer to the directory information control
structure of an argument, the number of directories being held by the CD block
file system is returned as a function value.
User's Guide 1 CD Library 49
5) Addition of error codes
The following error codes were added.
• GFS_ERR_BFUL
This error code is generated if the CD buffer becomes full while a resident
mode (GFS_GMODE_RESIDENT) file is being read. Adjust the order of
access, etc., to prevent a buffer full condition during resident mode file access.
• GFS_ERR_FATAL
This error code serves notice that the CD drive is in a fatal condition. When the
file system detects this condition, CD playback is stopped (seek home position)
and recovery from the error condition is attempted. If this error condition is
detected, try processing again.
6) Recognition of tray open condition
A “1” value for the DCHG bit (bit 5) of the interrupt factor register (HIRQREQ)
of the CD block is also treated as a tray open condition.
7) Precautions when using SCU-DMA
When the transfer mode is GFS_TMODE_SCU, the file system library uses a SCU
level 0DMA end interrupt (vector number 4B). Upon completion of transfer, the
interrupt vector and interrupt mask used are restored to their original state.
8) Debug file-related items
• GFMC_base
The variable GFMC_base which sets the top address of the SIMM file is de
fined in both sega_gfs.lib and segadgfs.lib.
GFMC_base in sega-gfs.lib exists only to establish compatibility with
segadgfs.lib. It does not affect the operation of the file system.
• File identifiers
We eliminated the function that automatically added “.” and “..” (current
directory and parent directory) when a CD file is not used. Because of this, file
identifiers agree at the time of boot up.
50
TM
CD
Development Tool
Description File
Doc. # ST-211-110494
© 1994 SEGA. All Rights Reserved.
**************************************************************************************
•readme.doc type : CD development tool description file
•File code name : MANBINCD.DOC
•Target driver code name : BINCD
•Target driver name : CD development tools
•Version :
•Programmer :
•Programmed date : 10/25/94
•Other message : None
**************************************************************************************
1. CD Development Tools
Be sure to use the current (or a later) distribution version of the CD development tools.
Install these tools into the directory equivalent to the software library
<SATURN¥SEGABIN¥BINCD>.
2. VCDEMU.EXE (Version 1.72)
2.1 Modification from version 1.5x to version 1.70
Version 1.70 implements multi-index and scan replay. (Scan play is possible only in
real-time emulation mode.)
2.2 Modification from Version 1.70 to Version 1.71
The bug fix in opening and closing the CD tray.
2.3 Modification from Version 1.71 to Version 1.72
Version 1.72 corrects the problem that caused the wrong file to be obtained during
file retrieval in direct DOS mode. This version also corrects the problem that caused
line number at a the bottom right of the screeen to be displayed with a minus symbol.
2.4 Limitations
The current version does not support the file interleaving at the direct DOS-file access.
2.5 Caution
To operate VCDEMU.EXE Version 1.7x or later, replace the ROM on the virtual CD
board with Version 3.2.
3. VCDPRE.EXE, VCDBUILD.EXE (Version 3.03)
3.1 Modifications from version 2.11 to Version 2.16
• Always set the directory record at the beginning of the sector when the number of
files is large and the directory file extends over multiple sectors.
• The processing stops when a duplicate file name is detected.
• The problem that occurred during directory configuration was corrected.
• The processing speed increased to two to six times faster.
3.2 Modifications from version 2.16 to version 3.02
• Version 3.02 became the DOS extender (DOS/4G) version and is able to check the
operation of up to about 10,000 files (in computers equipped with 8 megabytes of
memory).
CD Development Tool Description File 1
• The error in the directory record position was corrected.
• The shift in the TOC position of the audio data in the CDDA track was corrected.
3.3 Modification from Version 3.02 to Version 3.03
• The problem in the directory pass table was corrrected.
3.4 Modification from Version 3.03 to Version 3.04
• Version 3.04 corrects the file position problem that occurred when the directory was
defined after track specification.
3.5 Caution
In version 3.xx (2.xx) , the syntax of the script file is different from the syntax used in
versions 1.xx. Users of version 1.xx must change the script file. For details, refer to
the script description example.
4. VCDUTL.EXE (Version 1.00)
VCDUTL.EXE is the tool that updates some of the image files.
5. VCDMKTOC.EXE (Version 1.23)
VCDMKTOC.EXE is the tool that generates a TOC information file for write-once CDs.
(This tool was upgraded with corresponding to the upgrading and debugging of the
VCDPRE.EXE and VCDBUILD.EXE version.)
6. SWAP.EXE (Version 1.00)
SWAP.EXE is an endian conversion program for CD-DA data.
7. SEGACDW.EXE (Version 1.00, Release 1.00)
SEGACDW.EXE is CD writer commands.
8. Script Description Examples (EXSAMPLE.SCR, JVC.SCR, BRTMPFS.SCR)
This is an example of the new script file for VCDPRE version 2.xx. Refer to this
example during script modification.
The script files (JVC.SCR and BTSMPFS.SCR) that were provided in the software
library were changed.
Other: Replacement of EPROM (version 3.2) in virtual CD interface board
This revision corrects the problem that prevented CD-DA data on the virtual
CD from being played in multiplayer mode.
****************************** end of file ******************************
Translator’s Notes
1. In 3.1, the following item is listed twice:
• The tool was modified so that processing stops when a duplicate file name is
detected.
2
TM
SEGA SATURN
Master CD-ROM
Release Form
Doc. # ST-242-R2-010496
© 1995 SEGA. All Rights Reserved.
SEGA SATURN
Master CD-ROM Release Form
CD-ROM Release Date
Month: Day: Year:
Company Name of
Developer:
Title: 1st α β Final
CD-
ROM
ver. Enter version:
Supported Peripherals
Suffix Virtua Fighting
Product Number 6-Player Stunner
number Stick
Mission
T- SATURN Mouse
Stick
Arcade
M- SATURN Control Pad Racer
Starts
NA File Name
from
Back System/Backup Ends
Up at
Cartridge
RAM
Backup Cartridge Number Number Total number of
of files of blocks ____ blocks per file
only ____ blocks
Yamaha 3D Audio No Yes If Yes, describe location of use:
QSound No Yes
Cinepak No Yes
TrueMotion No Yes
On external Describe display location:
Invision Yes product packaging
Sound Library Invision
Logo
No Display Ending
Other
Compatible Areas (check all supported areas) Number of Players Gameplay
J (Japan) T (Asia NTSC: Taiwan, Philippines, Republic of Korea) 1 Player Simultaneous
U (North America (Canada, Central South America [Brazil], E (East Asia PAL, Europe PAL,
United States) Central South America PAL)
n Players vs. Mode
Alternating
Pause
Sales Region Specification Case Type
Japan Asia NTSC North America Central and South America Normal Single
Korea East Asia PAL Europe PAL Central and South America PAL Other Multi
Audio Used In Game Specify Number of CD's: _____
Other:
CD-DA PCM
SEGA Saturn Master CD-ROM Release Form 3
Disc Writer and Media YAMAHA CD EXPERT CDE100 (multi-session compatible)
Configurations used
SEGA Private Media CDM12PS71 (SATURN logo)
(circle all used)
SEGA SATURN CD-R 1.25m/s (SEGA logo)
SEGACDW.EXE (provided by SEGA)
List below if systems other than those listed above were used. Please note that disc writers and media configurations other than those specified
by SEGA will not be approved.
Disc writer used
Disc Media used
Disc writing software
used
The system above has been approved
by SEGA Y N
Checklists for Attached Documents
(Release Form, SATURN
TOC Sheet CD-ROM Release Program Checklist,SATURN
Form Game Quality Checklist)
Comments
SEGA Saturn Master CD-ROM Release Form 4
How to Use The Checklists
• Circle either YES, NO, or N/A to answer the items in these checklists.
• With the exception of the questions that are preceded by the H mark, ALL of the
answers in the forms must generally be answered YES.
• In the case that you give an answer other than YES, make sure to explain the
answer clearly in the spaces provided so that SEGA can verify it. Please note that
your submission will be rejected if we cannot verify your answers.
EXAMPLES
CORRECT EXAMPLE- VERIFICATION POSSIBLE
a. A bus request is made to the Z80 before the DMA-related registers are set.
YES NO N/A
Reason Check where applicable:
: Conforms to condition 1 in section 2 of Technical Bulletin #26.
Conforms to condition 2 in section 2 of Technical Bulletin #26.
Other:
The Z80 is not used.
INCORRECT EXAMPLE- VERIFICATION IMPOSSIBLE
a. A bus request is made to the Z80 before the DMA-related registers are set.
YES NO N/A
Reason Check where applicable:
: Conforms to condition 1 in section 2 of Technical Bulletin #26.
Conforms to condition 2 in section 2 of Technical Bulletin #26.
Other:
Used only when necessary.
• In this example above, YES, NO, or N/A are not circled.
• The answer "Used only when necessary." is unclear, since the respondent does
not specify when the bus request is made. Thus, it is impossible to verify this
answer.
SEGA Saturn Master CD-ROM Release Form 5
Important- Please Read!
• While we have tried to make these checklists cover as many areas as possible, the
checklist items contained here are by no means comprehensive. Please make
sure that your product follows all programming and software quality guidelines
contained in your SEGA SATURN development manuals.
SEGA Saturn Master CD-ROM Release Form 6
SEGA SATURN Program Checklist
I. General Disc Issues
1. The linear speed of the CD-ROM media used is 1.25 m/sec.
YES NO N/A
Reason:
2. CD drive usage is kept within 33% of its duty ratio in 10 minutes of use.
YES NO N/A
Reason:
3. Pre-emphasis is not used regardless of SCSP usage (circle "Yes" if pre-emphasis
not used).
YES NO N/A
Reason:
4. Read retry is always executed if there is a read error.
YES NO N/A
Reason:
II. VDP2
The SEGA SATURN Software Library (SATURN Basic Library) is used.
YES NO
If you've answered No to this question, skip the next question.
A modified Software Library is used.
YES NO
1. The color data is stored in Color RAM after the Color RAM Mode bit
(CRMD0~1) is set.
YES NO N/A
Reason:
SEGA Saturn Master CD-ROM Release Form 7
2. The SCU DMA is used.
YES NO
If you've answered No to this question, then enter N/A in item a.
a. The SCU-DMA is not used to read the VDP2.
YES NO N/A
Reason:
3. If the horizontal resolution bit HRESO0 changes from 0 to 1, it is done during
the H blank interval.
YES NO N/A
Reason:
III. SMPC
The SEGA SATURN Software Library (SATURN Basic Library) is used.
YES NO
If you've answered No, skip the next question.
A modified Software Library is used.
YES NO
1. The SH2 direct mode is not used.
YES NO N/A
Reason:
2. Commands are always issued according to the SMPC command protocol (ex.
checking and setting the SF register).
YES NO N/A
Reason:
SEGA Saturn Master CD-ROM Release Form 8
3. The SH2 does not clear SF to 0 directly.
YES NO N/A
Reason:
4. The SH2 does not read IREG or COMREG.
YES NO N/A
Reason:
5. When writing to the backup memory, the Reset button is disabled by the Reset
button disable command.
YES NO N/A
Reason:
6. After the SF register is set, the program does not wait for it to be cleared
without a command code being written to the COMREG.
YES NO N/A
Reason:
7. Access from the SH2 is executed by byte access.
YES NO N/A
Reason:
8. When the interrupt back (IntBack) command is used, SMPC interrupts are
not disabled.
YES NO N/A
Reason:
9. When a peripheral device is disconnected from the SATURN Control Port or if
the Port goes into an UNKNOWN state (without the SEGA SATURN 6Player
connected to the SATURN), the SATURN does not check for peripheral data.
YES NO N/A
Reason:
10. Software branching of the game application does not occur when the B or C
buttons are pressed during the boot sequence of the game.
YES NO N/A
Reason:
11. The SMPC supports the SEGA SATURN 6Player.
YES NO
If you've answered No, then enter N/A in item a.
SEGA Saturn Master CD-ROM Release Form 9
a. Through mode is not used.
YES NO N/A
Reason:
IV. SCU
The SEGA SATURN Software Library (SATURN Basic Library) is used.
YES NO
If you've answered No, skip the next question.
A modified Software Library is used.
YES NO
1. A SCU DMA write does not occur to the A-Bus.
YES NO N/A
Reason:
2. A SCU DMA read does not occur to the VDP2.
YES NO N/A
Reason:
3. Write access to the VDP1 registers is done in word units.
YES NO N/A
Reason:
4. A SCU DMA to the work RAM-L is not used.
YES NO N/A
Reason:
5. Access to SCU registers is always done using a cache-through address.
YES NO N/A
Reason:
6. Reads and writes are not executed in unused address areas (ex. 25FE00ACh).
YES NO N/A
Reason:
7. No writes are made to the interrupt status register (25FE00A4h).
YES NO N/A
Reason:
SEGA Saturn Master CD-ROM Release Form 10
8. During a DMA between the A-Bus and B-Bus, the CPU does not access either
bus.
YES NO N/A
Reason:
9. The A-Bus Previous Read bit is not set.
YES NO N/A
Reason:
10. Writes are executed to the A-Bus set register after a dummy read is executed
during a non-access period.
YES NO N/A
Reason:
11. There is no access to the DMA status register.
YES NO N/A
Reason:
12. There is no access to the DMA Stop control register.
YES NO N/A
Reason:
13. The DMA transfer register is not read.
YES NO N/A
Reason:
14. When the read address update bit is "1," the read address add value bit is also
set to "1."
YES NO N/A
Reason:
15. When the write address update bit is "1," the write address add value bit is set
according to the appropriate bus region.
YES NO N/A
Reason:
16. No more than 3 DMA channels are used simultaneously.
YES NO N/A
Reason:
SEGA Saturn Master CD-ROM Release Form 11
17. The DMA data transfer size is taken into consideration in case another DMA is
triggered during a DMA execution.
YES NO N/A
Reason:
18. The DMA mode, address update, activation source selection register, and DMA
set register are not modified during the execution of that level's DMA.
YES NO N/A
Reason:
19. When using the indirect DMA mode, the illegal DMA interrupt status bit is not
referenced.
YES NO N/A
Reason:
20. When the DSP is activated, the program termination interrupt flag of the DSP
program control port (25FE0080h) is always set to "0."
YES NO N/A
Reason:
21. When executing a DSP DMA, the address add value for transfers from the B-
bus to the DSP data RAM is always set to 010b.
YES NO N/A
Reason:
22. A usable value within range is set in the timer 0 compare register.
YES NO N/A
Reason:
23. Data larger than the count number of 1 line is not set in the timer 1 set data
register.
YES NO N/A
Reason:
24. The A-Bus refresh output enable bit is not modified.
YES NO N/A
Reason:
SEGA Saturn Master CD-ROM Release Form 12
SEGA SATURN Game Quality Checklist
I. Game Operation
1. Compatible area code message display and hardware operation check.
a. This software is compatible with SEGA SATURN hardware of the target sales
region.
YES NO N/A
Reason:
2. Verification with Japanese hardware.
SUPPORTED UNSUPPORTED
If you've answered Unsupported, then circle N/A in items a through c.
a. Functions normally with the Japanese SATURN.
YES NO N/A
Reason:
b. Functions normally with the Japanese V-SATURN.
YES NO N/A
Reason:
c. Functions normally with the Japanese Hi-SATURN.
YES NO N/A
Reason:
3. Verification with US hardware.
SUPPORTED UNSUPPORTED
If you've answered Unsupported, then circle N/A in items a.
a. Functions normally with the US SATURN.
YES NO N/A
Reason:
4. Verification with PAL hardware.
SUPPORTED UNSUPPORTED
If you've answered Unsupported, then circle N/A in items a through c.
a. Functions normally with the PAL SATURN.
YES NO N/A
Reason:
SEGA Saturn Master CD-ROM Release Form 13
b. The quality of graphics animation are equivalent to the NTSC version.
YES NO N/A
Reason:
c. Game speed is appropriate.
YES NO N/A
Reason:
5. Verification with NTSC hardware for Asian countries other than Japan.
SUPPORTED UNSUPPORTED
If you've answered Unsupported, then circle N/A in items a.
a. Functions normally with a NTSC SATURN for Asian countries other than
Japan.
YES NO N/A
Reason:
II. General Game Quality
1. No video noise is present on-screen.
(Ex. Lines at the bottom edge of the screen, random pixels appearing at the top
of the screen due to color change/redraw errors.)
YES NO N/A
Reason:
2. No color glitches are visible.
(Ex. Screen redraws and color changes are done at the bottom of the screen
where they should not be visible normally. Are these operations visible as
strange lines?)
YES NO N/A
Reason:
3. All important information (such as scores) are displayed with a margin of 1 cell
from the top/bottom sides of the screen and 2 cells from the right/left sides of
the screen.
YES NO N/A
Reason:
4. No character glitches or excessive polygon dropouts are visible.
(Ex. Do graphic objects "break up" during play?)
YES NO N/A
Reason:
SEGA Saturn Master CD-ROM Release Form 14
5. All messages are displayed correctly (No spelling errors, text formatting
problems, illegible fonts, etc.).
YES NO N/A
Reason:
6. The SATURN transfers control to the game application correctly from the
Audio CD Control Screen. The disc access time is appropriate.
YES NO N/A
Reason:
7. No glitches occur during playback of video sequences. (Ex. Does the video skip
or stutter?)
YES NO N/A
Reason:
III. Sound
1. There are no sound glitches or problems with sound volume levels. (Ex. Is a
sound too loud compared with other sounds?)
YES NO N/A
Reason:
2. The sound/music speed is correct.
YES NO N/A
Reason:
3. The switching of stereo/mono audio playback during the game and the Audio
CD Control Screen is effective.
YES NO N/A
Reason:
IV. Backup Memory
Does this game use backup RAM?
BACKUP RAM UNSUPPORTED
If you've answered Unsupported, then circle N/A for all of the items below.
a. All 11 characters are used for the backup file name. (Only numbers, capitalized
alphabet, and underscore "_" characters may be used. Spaces are not acceptable.
Note that the first character of the name cannot be a number. If there is an
insufficient number of characters to fill the 11 character requirement, insert the
underscore character "_" to fill the spaces.)
YES NO N/A
Reason:
SEGA Saturn Master CD-ROM Release Form 15
b. If there is insufficient memory space to save backup game data during boot-up,
a warning message is displayed to alert the player.
YES NO N/A
Reason:
c. When the game detects damaged backup game data, a message that instructs
the player to erase the damaged data is displayed.
YES NO N/A
Reason:
d. The save procedure does not damage existing backup game data for other
games.
YES NO N/A
Reason:
e. Both the System and Cartridge Memory can be accessed directly.
YES NO N/A
Reason:
f. Saved backup data can be loaded correctly by the game (there are no problems
continuing from a saved game).
YES NO N/A
Reason:
g. All backup data files can be copied/deleted without any problems.
YES NO N/A
Reason:
h. The game can be loaded/saved by using only the System RAM.
YES NO N/A
Reason:
SEGA Saturn Master CD-ROM Release Form 16
V. Control Pad
1. Standard 8 Button SEGA SATURN Control Pad
a. The Control Pad operates correctly. The button set-up/operations follow SEGA
SATURN Software Development Standards.
YES NO N/A
Reason:
b. No problems occur when the Control Pad is connected/disconnected during
play.
YES NO N/A
Reason:
c. There is an immediate response to all button input.
YES NO N/A
Reason:
d. No problems occur when a defective pad (i.e. A modified pad that allows 4
direction keys to be pressed simultaneously) is used.
YES NO N/A
Reason:
e. No problems occur when the Start button is pressed repeatedly.
YES NO N/A
Reason:
f. When a Control Pad is connected directly to Control Port 2 only, all pad button
input from that Control Pad is ignored.
YES NO N/A
Reason:
g. The Start button operates independently of the A, B, C, X, Y, and Z buttons
(except for a soft reset). (i.e. The game does not require the use of any button
combinations that include the Start button except for a soft reset.)
YES NO N/A
Reason:
h. No problems occur when there is rapid and repeated button input. (Especially
when the Start button is pressed repeatedly).
YES NO N/A
Reason:
SEGA Saturn Master CD-ROM Release Form 17
2. Virtua Stick
a. The Virtua Stick operates correctly. The button set-up/operations follow SEGA
SATURN Software Development Standards.
YES NO N/A
Reason:
b. No problems occur when the Virtua Stick is connected/disconnected during
play.
YES NO N/A
Reason:
c. There is an immediate response to all button input.
YES NO N/A
Reason:
d. No problems occur when the Start button is pressed repeatedly.
YES NO N/A
Reason:
e. When a Virtua Stick is connected to Control Port 2 only, all input from that
controller is ignored.
YES NO N/A
Reason:
f. The Start button operates independently of the A, B, C, X, Y, and Z buttons
(except for a soft reset). (i.e. The game does not require the use of any button
combinations that include the Start button except for a soft reset.)
YES NO N/A
Reason:
g. No problems occur when there is rapid and repeated button input (Especially
when the Start button is pressed repeatedly).
YES NO N/A
Reason:
SEGA Saturn Master CD-ROM Release Form 18
3. 6Player (Multitap)
a. There are no problems in game play when a compatible peripheral is connected
to the SATURN through a 6Player (This applies even if the software does not
support a multi-player option.)
YES NO N/A
Reason:
b. The game does not crash when a peripheral (such as a Control Pad) is
connected/disconnected from the 6Player.
YES NO N/A
Reason:
c. Multi-player game play is possible when the 6Player is connected to either
Control Port 1 or 2.
YES NO N/A
Reason:
d. The pause enable/disable functions during multi-player game play have been
implemented according to SEGA SATURN Software Development Standards.
YES NO N/A
Reason:
4. SATURN Mouse (Shuttle Mouse)
a. Does this game support the SATURN Mouse?
YES NO
If you've answered No, then circle N/A in items c. through d. below.
b. The game does not crash or glitch when used with the SATURN Mouse. (This
applies even if the software does not support the SATURN Mouse.)
YES NO N/A
Reason:
c. The SATURN Mouse operates correctly when connected to either Control Port
1 or Control Port 2 by itself.
YES NO N/A
Reason:
SEGA Saturn Master CD-ROM Release Form 19
d. The SATURN Mouse is set up correctly. The button set-up/operations follow
SEGA SATURN Software Development Standards.
YES NO N/A
Reason:
5. (Enter supported peripheral name here, if applicable.)
a. This peripheral operates correctly. The button set-up/operations follow SEGA
SATURN Software Development Standards.
YES NO N/A
Reason:
6. (Enter supported peripheral name here, if applicable.)
a. This peripheral operates correctly. The button set-up/operations follow SEGA
SATURN Software Development Standards.
YES NO N/A
Reason:
7. (Enter supported peripheral name here, if applicable.)
a. This peripheral operates correctly. The button set-up/operations follow SEGA
SATURN Software Development Standards.
YES NO N/A
Reason:
8. (Enter supported peripheral name here, if applicable.)
a. This peripheral operates correctly. The button set-up/operations follow SEGA
SATURN Software Development Standards.
YES NO N/A
Reason:
SEGA Saturn Master CD-ROM Release Form 20
VI. Pause•Reset
1. Pause (by Start button)
a. Is there a pause function available in this game?
YES NO OTHER
If you've answered No or Other, then circle N/A in items b. through f. below.
b. Sound is stopped during the pause.
YES NO N/A
Reason:
c. After the pause is cleared, sound continues from the pause point (The point
before the disc access lamp goes into standby status display.)
YES NO N/A
Reason:
d. The word "PAUSE" is displayed on-screen during the pause.
YES NO N/A
Reason:
e. The pause feature is disabled during the SEGA logo, title screen, demo, ending,
and blank screens.
YES NO N/A
Reason:
f. Only the Start button is used to disable pause.
YES NO N/A
Reason:
SEGA Saturn Master CD-ROM Release Form 21
2. Reset
a. When the Reset button on the SATURN is pressed, the system reboots from
the SATURN logo.
YES NO N/A
Reason:
b. No problems occur when the Reset button on the SATURN is pressed
repeatedly.
YES NO N/A
Reason:
c. Normal reset occurs when the Reset button on the SATURN and other buttons
on the Control Pad are pressed simultaneously.
YES NO N/A
Reason:
d. When a software reset is executed (by pressing the Start + A + B + C buttons)
during play, the game is restarted (the title screen of the game is displayed).
YES NO N/A
Reason:
e. When a software reset is executed (by pressing the Start + A + B + C buttons)
during the title sequence, the game goes to the Audio CD Control Screen.
YES NO N/A
Reason:
f. Settings such as those found in the options screen remain intact when a
software reset is executed (Applicable only when the reset occurs DURING
game play).
YES NO N/A
Reason:
g. If the CD door is opened at any time during play, the game goes to the Audio
CD Control Screen. (Also applicable during the loading of data as well as video
playback.)
YES NO N/A
Reason:
SEGA Saturn Master CD-ROM Release Form 22
VII. Scoring
1. Is there a score display?
YES NO
If you've answered No, then circle N/A in items b. through d. below.
2. The high score calculations are correct.
YES NO N/A
Reason:
3. The high scores are retained in memory after a software reset during game
play.
YES NO N/A
Reason:
4. Score display and score calculations are correct.
YES NO N/A
Reason:
VIII. Miscellaneous
1. For SEGA SATURN software sold in the United States, the trademark
information of the SEGA logo is correct (The SEGA logo displayed with ® must
be displayed in its final trademarked form for approximately 2 seconds.).
YES NO N/A
Reason:
2. After the conclusion of the ending sequence, the game returns to the SEGA
logo screen by button input or after a preset time period.
YES NO N/A
Reason:
3. The ending sequence and the game credits cannot be canceled by button input
(If it cannot be canceled, circle YES; if it can be cancelled, circle NO.).
YES NO N/A
Reason:
4. The game screen display sequence is correct (SEGA logo → title screen → demo
→ game → SEGA logo.)
YES NO N/A
Reason:
SEGA Saturn Master CD-ROM Release Form 23
5. The logo for the game displayed in the title screen is displayed with ™.
YES NO N/A
Reason:
6. All copyright information is displayed correctly on the title screen.
YES NO N/A
Reason:
7. The game exhibits no problems when aged over 5 hours (After power-on, the
game is left running by itself with no player interaction.).
YES NO N/A
Reason:
8. There are no scratches longer than 1mm on the recording side of the master
disc.
YES NO N/A
Reason:
9. There are no dropouts on the disc's recording surface.
YES NO N/A
Reason:
10. There are no disc errors when the disc is verified with a CD error checker.
YES NO N/A
Reason:
11. The master disc is recorded on SEGA-approved disc media. (Ex. YAMAHA 4X
CD-R disc with SEGA SATURN logo.)
YES NO
12. Are there any hidden command functions that display screens containing
messages such as copyright notices?
YES NO
13. No content problems are present in the game credits (The contents of the game
credits follow the guidelines contained in the SEGA SATURN Software
Development Standards.)
YES NO N/A
Reason:
SEGA Saturn Master CD-ROM Release Form 24
TM
MPEG
Stream Build
Precautions
Doc. # ST-129-R2-SP2-082495
© 1995 SEGA. All Rights Reserved.
MPEG Stream Build Precautions
The following are precautions to be taken when building an MPEG stream.
Precautions:
When a disc builder is used to build an MPEG stream file, dummy data (empty
sectors) is filled in the file equivalent in size to the difference between the sector rate
and bit rate. This creates the following problems:
(a) The resulting file size is larger than necessary.
(b) Pre-reads to the CD buffer become ineffective.
Select the smallest sector rate permitted by the range given below to delete empty
sectors. In other words, the sector rate should be the smallest possible value, but
larger than the total bit rate.
sector rate ≥ sum of all bit rates
Please refer to section 2.6, The Relationship between Sector Rates and Bit Rates on page
16 of the Virtual CD System Supplementary Manual (ST-129-R2-SP1-061995) for infor-
mation on how to calculate the sector rate.
Furthermore, the Virtual CD System Supplementary Manual only gives an equation
that yields values in bit units (CD rate). Use the following equation to determine the
sector rate value.
sector rate ≥ [BR(NV)/2296+BR(NA)/2279+BR(F1)/2048+BR(F2)/2324]/8
MPEG Stream Build Precautions 1
TM
Branching
Playback Library
User's Manual
Doc. # ST-136-D-R2-082495
© 1995 SEGA. All Rights Reserved.
1. Overview
The Branching Playback Library (BPL) enables seamless reading of data streams, based
on a pre-defined scenario. This allows the system to branch between streams smoothly
during reads.
The BPL, however, manages only the data streams that are necessary for branching.
Use a decode-only library such as MPEG and Cinepak in conjunction with BPL to play
back data such as audio and video.
1.1 Organization of the Library
Figure 1.1 shows the organization of CD-related libraries.
Application
Cinepak Branching
Library Playback
MPEG (CPK) File System
Library (BPL)
Library (GFS)
(MPG)
Stream System (STM)
CD Communication Interface (CDC)
Software
Hardware SIMM,
CD Block
SCSI File
Figure 1.1 Organization of CD-related libraries
The Branching Playback Library requires each of the following libraries: Stream Sys-
tem, File System, and CD Communication Interface.
4
1.2 Summary of Branching Playback Library Functions
1. Setting the Branch Destination (Scenario) Information
This function sets destination stream candidates as destination (scenario) information.
2. Pre-reading the Streams Necessary for Branching
The BPL manages the opening/closing of streams to smoothly branch between streams.
By pre-reading an open stream (a branching destination stream candidate) into the CD
buffer, the stream can be fetched without interruption when the branch destination is
determined.
3. Destination Selection Function
The BPL selects the actual destination from the destination candidates.
4. Destination Stream Notification Function
Based on the selected destination, the BPL notifies the application of the next stream to
be played.
Set initialization and destination information
Select a Application
destination
BPL
Stream handle
STM_Open, STM_Close Create, EntryNext
Stream System Decoder (Cinepak, MPEG, etc.)
Figure 1.2 Stream system overview diagram
Branching Playback Library User's Manual 5
2. Basic Items
2.1 Definitions
Table 2.1 Terminology
Term Meaning
Branch stream Equivalent to a file on a CD. The BPL reads a stream
based on a scenario that is set for a branch stream.
Different types of stream data (e.g., audio, video) can
be fetched by performing channel-interleaving within a
branch stream (normally, interleaving by means of a
subheader).
Branch stream ID This ID identifies the branch stream. Given this ID, the
read file, stream key, or destination information can be
set or fetched.
Branch number This number specifies the branch destination.
Equivalent to the event types such as input from a
control pad.
Table 2.2 List of abbreviations
Abbreviation Meaning Description
BPL branch play branching playback
bstm branch stream branch stream
bstmid branch stream ID branch stream ID
brno branch No. branch No.
bstmmax branch stream max Total number of branch
streams
brmax branch max Total number of branches
Other terms that appear in this manual are based on the CD Communication Interface,
the File System, and the Stream System Libraries.
2.2 Restrictions on Names
The BPL uses the following function, variable, type, and macro names:
Function/variable name: BP~ and bp~
Type name: Bp~
Macro name: BP~
The libraries required by the BPL use the following global symbols:
Table 2.3 Symbol names and libraries
Library Name Symbol
Stream System ST~, st~, St~
File System GF~, gf~, Gf~
CD Communication Interface CD~, cd~, Cd~
These symbols must not be used by the application program.
6
3. How the BPLWorks
3.1 Flow of Processing
The BPL reads a stream according to a given scenario and notifies the application of the
stream handle that must be decoded.
Figure 3.1 shows the flow of main processing events.
Initialization (BPL_Init) Specifies a work area
A
p
Sets branch stream infor- p
mation and destination l
Sets a scenario i
information.
(BPL_SetStmInfo c
BPL_SetBranchInfo) a
t
i
Selects a destination o
(BPL_SelectBranch) n
BPL server execution
(BPL_ExecServer) Fetches a branch stream
(BPL_GetCurStm
BPL_GetNextStm)
Figure 3.1 Flow of processing
Branching Playback Library User's Manual 7
3.2 Scenario
A scenario is information that indicates how branching playback is to be performed as a
function of time (the order in which streams are to be played).
Branched streams are specified in file units. Audio and video data can be fetched by
channel-interleaving within a file.
Branch Number
bstm6 bstm16
0
bstm2 bstm7
bstm8
bstm1 1 bstm9 bstm17 bstm19
bstm3 bstm10
2 bstm11
bstm12 bstm18
bstm4
bstm13
3 bstm14
bstm5 bstm15
Figure 3.2 Stream-branching
(a) This scenario specifies bstm1 as the branch stream to be read first. The BPL then
starts reading bstm1.
(b) The application fetches the branch stream that is currently being read and sets it in
the decoder.
(c) After reading bstm1, the BPL begins reading branch candidates (branch streams
that may be fetched next) bstm2, bstm3, bstm4, and bstm5. Effective use of the CD
buffer and smoother branching is made possible by pre-reading branch candidate
streams.
(d) The application fetches events such as input from a control pad and selects the
destination for branching. If branch numbers 0~3 are assigned to branches bstm2,
bstm3, bstm4, and bstm5, and if 1 is specified, reading of bstm2, bstm4 and bstm5,
which is no longer needed, is canceled. If necessary, the application fetches the
destination stream and sets it in the decoder.
(e) After fetching bstm1, the BPL begins fetching bstm3.
If the application specifies the execution of branching to the Branch Play Server,
the BPL begins reading bstm9, bstm10, and bstm11, as in (c).
8
3.3 Changing Branching Playback States
Table 3.1 shows branching playback states. Figure 3.1 shows a branching playback
state transition diagram.
Table 3.1 Branching playback states
State Description
End of branching Branching playback ended.
playback The stream group and the streams that were opened by the
BPL (the current stream and candidate streams ) are all
closed.
Wait for a Branch candidates were pre-read, but a destination has not
destination been selected.
selection All streams among the branch candidates are subject to pre-
reading. Only the current stream can be accessed. Destination
streams cannot be accessed.
Determine A destination was selected from the branch candidates.
destination Only the selected destination is pre-read.
Both the current stream and the destination stream can be
accessed.
No destination There are no branch candidates or destinations for the current
stream. The last stream is being played.
The server function can get the branching playback status.
Initialize branching
playback
Reset branching
BPL_Reset function playback
BPL_Init function
Stop branching
ON/OFF Branching playback playback
BPL_SetStart function
complete
(BPL_SVR_COMPLETED) specifies BPL_BR_NONE
Executable in all states
BPL_SetStart function
ON
ON
OFF OFF
Wait for the selection No destination
(BPL_SVR_WAITSEL) No candidates (BPL_SVR_NOBRN)
BPL_SelBranch function
ON
OFF
Destination selected
(BPL_SVR_SELECT)
The selected destination was BPL_BR_NONE.
(See the BPL_SetBranchInfo function.)
• ON/OFF: Branch execution switch for the Branching Playback Server function BPL_ExecServer.
If ON is specified in a destination selection wait or no destination state, then branching
playback is terminated.
If ON is specified in the selected selected state, then branch streams are changed.
Figure 3.3 BP state transition diagram
Branching Playback Library User's Manual 9
3.4 Executing Branching (Branch Stream-Switching)
(1) Executing branching
When branching is performed in the destination selected state (by turning on the
branch execution switch of the Branching Playback Server), branch streams are
switched as follows:
(a) The current stream, A, is closed.
(The BPL stops reading A and deletes any data that remains in the CD buffer.)
(b) The destination stream, B, becomes the current stream.
(c) The destination stream becomes undefined.
Table 3.2 Switching branch streams by executing branching
Branch Stream Before After Branching (after switching)
Branching
Current stream (obtained by the A B
BPL_GetCurStm function) (A is closed)
Destination stream (obtained by B Undefined until the next destination is
the BPL_GetNextStm function) selected and determined by the
BPL_SelectBranch function
The selection of a destination always precedes the execution of branching (switching).
However, the selection and switching operations are generally performed asynchronously.
(2) Opening and closing a stream
The BPL opens both the current stream and branch candidate streams. The BPL
employs the following opening and closing procedures:
(a) Starting playback stream specified by the BPL_SetStart function is opened first as the
current stream.
(b) When the reading of the current stream begins, branch candidate streams are opened.
(c) When a destination is selected, all other branch candidates are closed, and only the destina-
tion is pre-read.
(d) When branching is executed, the current stream is closed.
The destination stream becomes the current stream, and steps(b)~(d) are repeated.
(e) When branching playback is completed, the stream group is closed.
(3) Timing for branch stream-switching
Table 3.3 shows the timing types for branch stream-switching.
Table 3.3 Timing for branch stream-switching
Timing Description
Natural Switches to destination stream B upon completion of decoding
switching stream A.
Forced switching Force switch to destination stream B regardless of whether
stream A is being decoded.
Branching must not be executed until the decoder finishes processing the current stream;
even when a destination is determined (to prevent truncation of the stream data that is
being decoded).
Regardless of whether normal or forced switching is performed, switching processes for
the decoder should be executed first. The branch execution switch should be turned on
only after switching is complete.
10
4. Organization of Files on Disc
The total amount of streams that can be pre-read is limited by the capacity of the CD
buffer (a maximum of 200 sectors). Therefore, streams that exceed the limit and can not
be pre-read may result in branching delays.
1. Non-interleaved branch candidates
Suppose that A’s branch candidates are B and C and that files are positioned on disc as
shown in Figure 4.1. Then, only file B can be pre-read.
There will be no problems if the pre-read data of A is sufficient to seek/branch to B or
C. However, if both B and C need to be pre-read in order to enable delayed branch
selection timing, branching to C in this example cannot be performed without delay.
Stream branching Position of files on disk
A B
A B C
C
200 or more sectors
Figure 4.1 Non-interleaved candidate branches (C cannot be pre-read)
2. Interleaved branch candidates
As shown in Figure 4.2, one method of enabling branches to B and C without delay after
A is played is to interleave B and C immediately after A.
Stream branching Organization of files on disk
A B (b1+b2+b3...)
A b1 c1 b2 c2 b3 c3 ......
C (c1+c2+c3...)
B and C are interleaved
Note: Two branch candidate files exist: B and C.
Figure 4.2 Interleaved branch candidates (all of B and C)
3. Partially interleaved branch candidates
As shown in Figure 4.3, it is also possible to split B into B1 and B2, and C into C1 and C2
and to interleave only B1 and C1.
Branching Playback Library User's Manual 11
In this case, it is sufficient to interleave only parts of B and C (B1 and C1). This
technique allows a seek to B2 and C2 and enables highly independent operation.
However, the technique requires the division of files.
Stream branching Position of files on disk
A B1 -- B2
A B1, C1 B2 C2
C1 -- C2
B1 and C1 are interleaved
Note: Four branch candidate files exist: B1, B2, C1, and C2.
Figure 4.3 Partially-interleaved branch candidates (parts of B and C)
12
5. Basic Examples
5.1 Scenario Processing
Figure 5.1 shows an example of a branching playback scenario.
Branch number
Button A 0 BSTM2.MPG
BSTM1.MPG
Button B 1 BSTM3.MPG
Button A is pressed while BSTM1.MPG is being played →BSTM2.MPG is played after BSTM1.MPG.
Button B is pressed while BSTM1.MPG is being played →BSTM3.MPG is played after BSTM1.MPG.
Figure 5.1 Example of a branching playback scenario
The following is a sample program that sets this scenario.
#define BSTM_MAX 3 /* Total number of branch streams(BSTM1.MPG,
BSTM2.MPG, BSTM3.MPG) */
#define BRANCH_MAX 2 /* Total number of branches (number of arrows in
Figure 5.1) */
#define KEY_MAX 2 /* Total number of stream key types */
#define A_BTN 0 /* Branch number assigned to button A */
#define B_BTN 1 /* Branch number assigned to button B */
#define BR_NUM 2 /* Number of branches per stream */
#define BSTM1_ID 0 /* Branch stream ID of BSTM1.MPG */
#define BSTM2_ID 1 /* Branch stream ID of BSTM2.MPG */
#define BSTM3_ID 2 /* Branch stream ID of BSTM3.MPG */
/* Work area for the BPL */
Sint32 work_bpl[BPL_WORK_SIZE(BSTM_MAX, BRANCH_MAX, KEY_MAX)/sizeof(Sint32)];
void setScenario(void)
{
StmKey key[KEY_MAX]; /* Area for setting a stream key */
Sint32 brtbl[BR_NUM]; /* Area for setting a destination */
Sint32 fid; /* File ID */
/* Initialization of branching playback */
BPL_Init(BSTM_MAX, BRANCH_MAX, KEY_MAX, work_bpl);
/* Setting branch stream information */
STM_KEY_CN(key + 0) = STM_KEY_CIMSK(key + 0) = STM_KEY_NONE;
STM_KEY_CN(key + 1) = STM_KEY_CIMSK(key + 1) = STM_KEY_NONE;
STM_KEY_SMMSK(key + 0) = STM_KEY_SMVAL(key + 0) = STM_SM_VIDEO;
STM_KEY_SMMSK(key + 1) = STM_KEY_SMVAL(key + 1) = STM_SM_AUDIO;
fid = GFS_NameToId(“BSTM1.MPG”);
BPL_SetStmInfo(BSTM1_ID, fid, KEY_MAX, key);
fid = GFS_NameToId(“BSTM2.MPG”);
Branching Playback Library User's Manual 13
BPL_SetstmInfo(BSTM2_ID, fid, KEY_MAX, key);
fid = GFS_NameTold("BSTM3.MPG");
BPL_SetStmInfo(BSTM3_ID, fid, KEY_MAX, key);
/* Set destination information */
brtbl[A_BTN] = BSTM2_ID; /* Branch to BSTM2.MPG
if button A is pressed */
brtbl[B_BTN] = BSTM3_ID; /* Branch to BSTM3.MPG
if button B is pressed */
BPL_SetBranchInfo(BSTM1_ID, BR_NUM, brtbl); /* Set the destination for
BSTM1.MPG */
}
14
5.2 Branching Playback Processing
The following is an example of a branching playback program. (Refer to Section 5.1 for
the scenario.)
Sint32 work_gfs[GFS_WORK_SIZE(BSTM_MAX*KEY_MAX)/sizeof(Sint32)];
Sint32 work_stm[STM_WORK_SIZE(GRP_MAX, BSTM_MAX*KEY_MAX)/sizeof(Sint32)];
Sint32 brno; /* Branch number */
StmHn stmtbl[KEY_MAX]; /* Stream handle table */
Sint32 bpl_stat; /* Branching playback status */
Sint32 decode_stat; /* Decoder operation status */
DecodeHn dc_hn = NULL; /* Decoder handle */
Bool chgsw = OFF; /* Branch execution switch */
Bool endflag = FALSE;
Sint32 ret;
/* Initialization of the libraries */
GFS_Init(···); /* Initialize the File System */
STM_Init(···); /* Initialize the Stream System */
initDecoder(); /* Initialize the decoder */
setScenario(); /* Set a scenario (see 5.1) */
/* Branching playback */
BPL_SetStart(BSTM1_ID); /* Specify a stream to begin playback*/
BPL_GetCurStm(KEY_MAX, stmtbl); /* Fetch the first branch stream */
dc_hn = createDecodeHn(stmtbl); /* Create a decoder handle */
while (endflag == FALSE) {
bpl_stat = BPL_ExecServer(chgsw); /* Execute the Branching Playback
Server */
chgsw = OFF;
STM_ExecServer(); /* Execute the stream server */
decode_stat = execDecoder(dc_hn); /* Execute the server function of
the decoder */
switch (bpl_stat) {
case BPL_SVR_COMPLETED: /* Branching playback complete status */
endflag = TRUE;
break;
case BPL_SVR_WAITSEL: /* Destination selection wait
state */
/* Get pad input (0:button A, 1:button B, negative: no input */
brno = getPadEvent();
if (brno >= 0) {
BPL_SelectBranch(brno); /* Select a destination */
}
break;
case BPL_SVR_SELECT: /* Destination determined state */
case BPL_SVR_NOBRN: /* No-destination state */
if (decode_stat != COMPLETED) { /* Decoding completion check */
break;
}
Branching Playback Library User's Manual 15
chgsw = ON; /* Branch execution switch on */
ret = BPL_GetNextStm(KEY_MAX, stmtbl); /* Get a destination stream */
if (ret >= 0) { /* If there is a destination */
destoroyDecodeHn(dc_hn); /* Clear the decoder handle */
dc_hn = createDecodeHn(stmtbl); /* Create a decoder handle */
}
break;
}
}
destoroyDecodeHn(dc_hn); /* Clear the decoder handle */
The BPL automatically opens and closes a stream by using the Stream System. For a
description of the decoder, refer to the applicable library manuals.
16
6. Data Specifications
6.1 Basic Data
Title Data Data Name No.
Data specifications Basic data 1.0
1. Basic Data Types
Type Descripton
Uint8 Unsigned 1-byte integer
Sint8 Signed 1-byte integer
Uint16 Unsigned 2-byte integer
Sint16 Signed 2-byte integer
Uint32 Unsigned 4-byte integer
Sint32 Signed 4-byte integer
Bool Boolean 4-byte integer (logical constants are used as Boolean)
2. Logical Constants
Logical constants are used as Boolean values:
Constant Value Description
FALSE 0 Represents the FALSE logical value.
TRUE 1 Represents the TRUE logical value.
OFF 0 Represents the switch off (FALSE) state.
ON 1 Represents the switch on (TRUE) state.
6.2 Constants
Title Data Data Name No.
Data specifications Constant 2.0
1. Error Codes
The value of BPL_ERR_OK is 0. Other error codes take negative values.
Constant Description
BPL_ERR_OK Normal termination
BPL_ERR_KYOVRFLW Too many stream keys
BPL_ERR_BROVRFLW Too many destination settings
BPL_ERR_BSTMID Illegal branch stream ID
BPL_ERR_BRNO Illegal branch number
BPL_ERR_BRSPC Destination already specified
BPL_ERR_NOKEY No corresponding stream key set
BPL_ERR_OPNSTM Stream open failure
2. Other
Constant Value Description
BPL_STMKEY_MAX 6 Number of stream keys that can be set to a branch
stream.
Branching Playback Library User's Manual 17
7. Function Specifications
Table 7.1 shows a list of BPL functions.
Table 7.1 List of functions (1)
Function Function Name No.
Scenario processing 1.0
Initialize branching playback BPL_Init 1.1
Reset branching playback BPL_Reset 1.2
Set branch stream information BPL_SetStmInfo 1.3
Get branch stream information BPL_GetStmInfo 1.4
Set destination information BPL_SetBranchInfo 1.5
Get destination information BPL_GetBranchInfo 1.6
Branching playback-processing 2.0
Set playback start stream BPL_SetStart 2.1
Execute Branching Playback Server BPL_ExecServer 2.2
Select destination BPL_SelectBranch 2.3
Get current stream BPL_GetCurStm 2.4
Get destination stream BPL_GetNextStm 2.5
Get stream group BPL_GetStmGrp 2.6
18
7.1 Scenario Processing
Title Data Data Name No.
Data specifications Initialize branching playback BPL_Init 1.1
[Format] Sint32 BPL_Init(Sint32 bstmmax, Sint32 brmax, Sint32
keymax, void *work)
[Input] bstmmax: Total number of branch streams
brmax: Total number of branches
keymax: Total number of stream key types
work: Work area
[Output] None
[Function value] Error code
[Function] Initializes the work area for the BPL. Clears previously set scenario information.
Execute this function before the BPL is used.
[Remarks] (a) Determine the size of the work area from the BPL_WORK_SIZE (bstmmax,
brmax, keymax) byte.
Allocate work areas at 4-byte boundaries.
Example: Uint32 work[BPL_WORK_SIZE(bstmmax, brmax,
keymax)/sizeof(Uint32)];
(b) When stream keys of different types are assigned to different branch
streams, the sum of the types is the value of keymax.
Example: If key1 (3 types of keys) is assigned to bstm1, and key2
(4 types of keys) is assigned to bstm2, then keymax,
which is the sum of key1 and key2, will be 7.
If key1 is assigned to both bstm1 and bstm2, then
keymax, which is key1, will be 3.
(c) The BPL_Init function does not close the stream group that is currently
used. To force an initialization of the BPL while it is being used, execute the
BPL_Reset function.
Title Data Data Name No.
Data specifications Reset branching playback BPL_Reset 1.2
[Format] Sint32 BPL_Reset(void)
[Input] None
[Output] None
[Function value] Error code
[Function] Suspends access to a branch stream and resets the branching playback (closes the
stream group currently being used by the BPL and initializes all information).
Branching Playback Library User's Manual 19
Title Data Data Name No.
Function Set branch stream information BPL_SetStmInfo 1.3
specifications
[Format] Sint32 BPL_SetStmInfo(Sint32 bstmid, Sint32 fid, Sint32
nkey, StmKey *keytbl)
[Input] bstmid: Branch stream ID (0≤bstmid<bstmmax)
fid: File ID
nkey: Number of stream keys (nkey≤BPL_STMKEY_MAX)
keytbl: Stream key table
[Output] None
[Function value] Error code
[Function] Assigns branch stream information (information on the individual streams that
are actually read) to a branch stream.
[Remarks] (a) By assigning multiple stream keys to a file, the function can read channel
interleaved-data.
(b) The maximum number of stream keys that can be assigned to a branch
stream is BPL_STMKEY_MAX.
The BPL_Init function specifies the total number of stream key types that
can be used in all streams.
Title Data Data Name No.
Function Get branch stream information BPL_GetStmInfo 1.4
specifications
[Format] Sint32 BPL_GetStmInfo(Sint32 bstmid, Sint32 *fid, Sint32
*nkey, StmKey *keytbl)
[Input] bstmid: Branch stream ID
[Output] fid: File ID
nkey: Number of stream keys (nkey ≤BPL_STMKEY_MAX)
keytbl: Stream key table
[Function value] Number of destinations that are already set (an error code results if this number
is negative)
[Function] Gets the branch stream information that is assigned to a branch stream.
Refer to the destination information-setting function (BPL_SetBranchInfo) for
the number of destinations.
20
Title Data Data Name No.
Function Set destination information BPL_SetBranchInfo 1.5
specifications
[Format] Sint32 BPL_SetBranchInfo(Sint32 bstmid, Sint32 nbranch,
Sint32 *brtbl)
[Input] bstmid: Branch stream ID
nbranch: Number of destinations
brtbl: Branch table
[Output] None
[Function value] Error code
[Function] Assigns destination information (candidate destinations) to a branch stream.
[Remarks] (a) Assigns the branch stream IDs of branch candidates to the branch table.
To indicate that there are no destinations, specify BPL_BR_NONE as a branch table
element.
brtbl[0] = BSTMID_A;
brtbl[1] = BPL_BR_NONE; /* No destinations (the end of BP) */
brtbl[2] = BSTMID_B;
nbranch = 3;
A destination is specified using the BPL_SelectBranch function and a
branch number (a position in the branch table).
In this example, the branch processing produces the following results,
depending on the destination that is selected:
Selected Branch Processing
Destination (when the branch execution switch of the server function is on)
Branch number 0 Branches to branch stream ID BSTMID_A.
Branch number 1 Terminates the branching playback process goes into the no
destination state immediately after this branch number is
selected.
Branch number 2 Branches to branch stream ID BSTMID_B.
Other (BPL_SelectBranch returns the BPL_ERR_BRNO error and
invalidates the selection.)
(b) The number of streams must satisfy the following conditions:
X +Y≤Z
X: The number of stream keys that are set in bstmid
Y: Total number of destination stream keys
Z: Maximum number of streams that can be opened simultaneously (specified
using the STM_Init function)
Title Data Data Name No.
Function Get destination information BPL_GetBranchInfo 1.6
specifications
[Format] Sint32 BPL_GetBranchInfo(Sint32 bstmid,
Sint32 *nbranch, Sint32 *brtbl, Sint32 nelem)
[Input] bstmid: Branch stream ID
nelem: Number of branch table elements
[Output] nbranch: Number of destinations (0 if no branch candidates)
brtbl: Branch table (a maximum of nelem branch candidates are stored from the
beginning of the table)
[Function value] Error code
[Function] Gets the destination information that is assigned to a branch stream.
Branching Playback Library User's Manual 21
7.2 Branching Playback Processing
Title Data Data Name No.
Function Set playback start stream BPL_SetStart 2.1
specifications
[Format] Sint32 BPL_SetStart(Sint32 bstmid)
[Input] bstmid : Branch stream ID (BPL_BR_NONE: stops branching playback)
[Output] None
[Function value] Error code
[Function] Specify a playback start stream (the branch stream at the beginning of a scenario).
To stop branching playback, specify BPL_BR_NONE as the branch stream ID.
Title Data Data Name No.
Function Execute Branching Playback BPL_ExecServer 2.2
specifications Server
[Format] Sint32 BPL_ExecServer(Bool chgsw)
[Input] chgsw : Branch execution switch (ON: branch, OFF: do not branch)
[Output] None
[Function value] Branching playback status
[Function] Executes the Branching Playback Server. When the branch execution switch is
ON, performs branching (switches branch streams).
(1) Branching playback state
Constant Description
BPL_SVR_COMPLETED Branching playback completed.
BPL_SVR_WAITSEL Wait for the selection of a destination.
BPL_SVR_SELECT Destination selected.
BPL_SVR_NOBRN No destinations.
For branching playback states, see Section 3.3, Changing Branching Playback States.
Title Data Data Name No.
Function Select destination BPL_SelectBranch 2.3
specifications
[Format] Sint32 BPL_SelectBranch(Sint32 brno)
[Input] brno : Branch number
[Output] None
[Function value] Error code
[Function] Selects a destination according to a specified branch number.
[Remarks] (a) Specifying the switch “ON” during the execution of the BPL_ExecServer
function results in branching (the current stream is switched with the
selected destination).
(b) A destination must be selected even when there is only one branch candi-
date.
22
Title Data Data Name No.
Function Get current stream BPL_GetCurStm 2.4
specifications
[Format] Sint32 BPL_GetCurStm(Sint32 nelem, StmHn *stmtbl)
[Input] nelem: Number of elements in the stream handle table (nelem
≤BPL_STMKEY_MAX)
[Output] stmtbl: Stream handle table
[Function value] Branch stream ID (Negative ID=no corresponding branch streams)
[Function] Gets the current stream (branch stream ID and the stream handle) that is subject
to read access.
[Remarks] (a) Stream handles that correspond to stream keys are set in the stream handle
table.
Title Data Data Name No.
Function Get destination stream BPL_GetNextStm 2.5
specifications
[Format] Sint32 BPL_GetNextStm(Sint32 nelem, StmHn *stmtbl)
[Input] nelem: Number of elements in the stream handle table (nelem
≤BPL_STMKEY_MAX)
[Output] stmtbl: Stream handle table
[Function value] Branch stream ID (Negative ID=no corresponding branch streams)
[Function] Gets a destination stream (branch stream ID and the stream handle).
[Remarks] (a) Stream handles that correspond to stream keys are set in the stream handle
table.
(b) The function value remains negative until a destination is selected (until
the BPL_SelectBranch function is executed).
Title Data Data Name No.
Function Get stream group BPL_GetStmGrp 2.6
specifications
[Format] StmGrpHn BPL_GetStmGrp(void)
[Input] None
[Output] None
[Function value] Stream group handle
[Function] Gets the handle of the stream group that is used by the BPL.
[Remarks] (a) When activated, the BPL opens one stream group.
When the branching playback process is terminated, the stream group
handle becomes NULL.
Branching Playback Library User's Manual 23
TM
SMPC
User's Manual
Doc. # ST-169-R1-072694
© 1994 SEGA. All Rights Reserved.
Introduction
Explanation of Terminology
The terminology used in this manual is explained below.
SMPC (System Manager & Peripheral Control)
Controls peripheral equipment interfaces, such as SATURN system reset control, control PAD,
etc.
The SMPC also has RTC (Real Time Clock) functions that can be backed up with a battery,
making it possible to set and acquire calendar time.
SCSP (Saturn Custom Sound Processor)
Sound source LSI for multi-function games that integrate PCM sound source and sound DSP.
DSP (Digital Signal Processor)
High-speed calculation circuit used primarily for calculations (multiplication and addition).
VDP1 (Video Display Processor 1)
The LSI that controls the drawing of sprites and polygons. VRAM and a frame buffer are
connected to the VDP1. These use the draw commands transferred to the VRAM from the CPU
and execute drawing in the frame buffer. Then the draw data from the frame buffer is trans-
ferred to the VDP2 and displayed on a display device at the request from the VDP2.
VDP2 (Video Display Processor 2)
Contains scroll screen control functions and priority functions.
PLL (Phase Locked Loop)
All of the clock types (CPU, system control, image draw/display, sound, etc., clock generator)
of the SATURN system.
i
SCU (System Control Unit)
Contains a CPU I/F, A-Bus I/F, and B-Bus I/F controller and smoothly transfers data between
the various buses. The SCU also contains an internal DMA controller, interrupt controller, and
DSP to perform DMA control, interrupt control, and high-speed calculation processing.
Main CPU
Contains a 32-bit RISC CPU SH-2 that controls the entire system.
MC68EC000
A sound control CPU with a SCSP that has SCSP control functions.
V-BLANK-IN
One of the three types of blanking interrupts. V-BLANK-IN shows the screen display end
timing.
V-BLANK-OUT
One of the three types of blanking interrupts. V-BLANK-OUT shows the screen display start
timing.
H-BLANK-IN
One of the three types of blanking interrupts. H-BLANK-IN shows the display end timing of
one line.
Peripheral
Peripheral equipment connected to SATURN, such as control PAD, mouse, and keyboard.
ii
Symbols Used in this Manual
The following symbols are used in this manual.
Binary
Shown by a “B” placed at the end. For example, 100B. When only 1 bit is used, however, the
“B” is abbreviated.
Hexadecimal
Shown by an “H” at the end. For example, 00H or FF H.
Units
Shows that 1 KB is 1,024 bytes. Thus, 1 MB is 1,048,576 bytes.
MSB and LSB
In the structure of bytes and words, the left is the Most Significant Bit (MSB) and the right is
the Least Significant Bit (LSB).
Undefined Bit
Undefined bits in the sound source register or DSP register are shown by “—.”
(R)
Signifies a read dedicated register.
(W)
Signifies a write dedicated register.
(R/W)
Signifies a register in which both reading and writing are possible.
BCD
Binary Coded Decimal.
iii
Table of Contents
Introduction ............................................................................................................................... (i)
Explanation of Terminology ................................................................................................ (i)
Symbols Used in this Manual ............................................................................................ (iii)
Table of Contents .................................................................................................................... (iv)
List of Figures .................................................................................................................... (v)
List of Tables .................................................................................................................... (vi)
Section 1 Overview ................................................................................................................... 1
1.1 System Configuration ................................................................................................... 2
1.2 SH-2 Interface .............................................................................................................. 5
Section 2 SMPC Commands ................................................................................................... 11
2.1 SMPC Command List ................................................................................................ 12
2.2 Command Issue ......................................................................................................... 13
2.3 Resetable System Management Commands ............................................................ 21
2.4 Non-Resetable System Management Commands..................................................... 35
2.5 RTC Commands ........................................................................................................ 45
Section 3 Peripheral Control .................................................................................................. 47
3.1 Peripheral Control Mode ............................................................................................ 48
3.2 SATURN Peripheral Standard Formats ..................................................................... 76
3.3 Support Peripheral Data Format in SMPC Control Mode ...........................................81
3.4 Support Peripheral Data Format in SH-2 Direct Mode................................................86
Index ........................................................................................................................................ 104
iv
List of Figures
Section 1 Overview
Figure 1.1 SMPC System Configuration ........................................................................ 2
Figure 1.2 Standard Digital PAD for SATURN ................................................................ 4
Figure 1.3 SH-2 Interface Register Address Map........................................................... 5
Figure 1.4 Parallel I/O Register Address Map ................................................................ 7
Section 2 SMPC Commands
Figure 2.1 Type A Command Flow ............................................................................... 14
Figure 2.2 Type B Command Flow ............................................................................... 14
Figure 2.3 Type C Command Flow ............................................................................... 15
Figure 2.4 Type D Command Flow ............................................................................... 16
Figure 2.5 INTBACK Command Issue Timing .............................................................. 18
Figure 2.6 INTBACK Command Issue Timing After SYSRES,
CKCHG320, CKCHG352 Command Execution ...........................................18
Figure 2.7 Issue of Other Commands .......................................................................... 19
Section 3 Peripheral Control
Figure 3.1 SMPC Control Mode Block Diagram ........................................................... 48
Figure 3.2 SMPC Control Mode Setting Example ........................................................ 49
Figure 3.3 All Peripheral Data Acquisition Sequence ................................................... 51
Figure 3.4 Peripheral Data Acquisition Cancel Sequence Due to Break Request ........ 52
Figure 3.5 Overview of Peripheral Data Collection Time Optimization.......................... 55
Figure 3.6 IREG0 (During INTBACK Command Execution) ......................................... 58
Figure 3.7 IREG0 (During Continue and Break Requests) ...........................................58
Figure 3.8 IREG1.......................................................................................................... 59
Figure 3.9 IREG2.......................................................................................................... 60
Figure 3.10 Result Parameter Standard Configuration Acquired
Using INTBACK Command ......................................................................... 62
Figure 3.11 Result Parameter Configuration when
One Port Is 0 Byte Mode ............................................................................. 63
Figure 3.12 Peripheral Data Configuration ..................................................................... 65
Figure 3.13 Peripheral Control Status ............................................................................ 66
Figure 3.14 Port Status Configuration ........................................................................... 67
Figure 3.15 SATURN Peripheral ID Configuration ......................................................... 69
Figure 3.16 Peripheral Data Configuration 1 .................................................................. 70
Figure 3.17 Peripheral Data Configuration 2 .................................................................. 71
Figure 3.18 Peripheral Data Configuration 3 .................................................................. 71
Figure 3.19 SATURN Peripheral ID when Tap Unconnected ..........................................73
Figure 3.20 SATURN Peripheral ID when Tap Unknown ............................................... 73
Figure 3.21 SH-2 Direct Mode Block Diagram ............................................................... 74
Figure 3.22 SH-2 Direct Mode Setting Example ............................................................ 75
v
List of Tables
Section 1 Overview
Table 1.1 Initialization Status During Power On ............................................................. 3
Table 1.2 SMPC Functions ............................................................................................. 3
Table 1.3 DDR Functions ............................................................................................... 7
Table 1.4 IOSEL Functions ............................................................................................ 8
Table 1.5 EXLE Functions .............................................................................................. 9
Section 2 SMPC Commands
Table 2.1 Resetable System Management Commands ................................................12
Table 2.2 Non-Resetable System Management Commands ........................................12
Table 2.3 RTC Commands ........................................................................................... 12
Table 2.4 Command Issue Types ................................................................................. 13
Table 2.5 SH-2 Command Issue Limitations ................................................................ 20
Section 3 Peripheral Control
Table 3.1 Parallel I/O Register Default Values During Power On..................................49
Table 3.2 Continue and Break Issue Conditions .......................................................... 50
Table 3.3 Example Acquisition Command Parameter Setting
When Only Peripheral Data Is Required ...................................................... 54
Table 3.4 Command Parameter Setting Conditions and
Peripheral Data Configuration ...................................................................... 64
Table 3.5 Relation Between the Number of Connections and Peripherals ...................67
Table 3.6 Relation Between Connected Peripherals and Multitap ID ...........................68
Table 3.7 Multitap ID and Number of Connections....................................................... 68
Table 3.8 Combinations of Peripheral Data Size and Port Mode ..................................70
Table 3.9 Combinations of Peripheral Data Size and Port Mode ..................................73
Table 3.10 SATURN Digital Device Standard Format .................................................... 76
Table 3.11 SATURN Analog Device Standard Format ................................................... 77
Table 3.12 SATURN Pointing Device Standard Format ................................................. 78
Table 3.13 SATURN Keyboard Device Standard Format ................................................79
Table 3.14 Mega Drive 3-Button PAD Data Format in SMPC Control Mode...................81
Table 3.15 Mega Drive 6-Button PAD Data Format in SMPC Control Mode...................81
Table 3.16 SATURN Mouse Data Format in SMPC Control Mode .................................82
Table 3.17 SEGA Tap Port Status in SMPC Control Mode .............................................82
Table 3.18 SATURN Standard PAD Data Format in SMPC Control Mode .....................82
Table 3.19 SATURN Analog Joystick Data Format in SMPC Control Mode ...................83
Table 3.20 SATURN Keyboard Data Format in SMPC Control Mode .............................83
Table 3.21 SATURN 6P Multitap Port Status ................................................................. 85
Table 3.22 Relationship Between Port Bit Number and Port Bit Name ...........................86
Table 3.23 Port Direction Register Setting Value During Mega Drive
Peripheral ID Acquisition .............................................................................. 87
Table 3.24 Mega Drive Peripheral ID for Each Peripheral ..............................................88
Table 3.25 Mega Drive 3-Button PAD Data Format for SH-2 Direct Mode ......................90
Table 3.26 Mega Drive 6-Button PAD Data Format for SH-2 Direct Mode ......................90
Table 3.27 Data Format During SATURN Mouse Power On Reset for
SH-2 Direct Mode ......................................................................................... 91
Table 3.28 Data Format During SATURN Mouse Reset for SH-2 Direct Mode .............. 92
vi
Table 3.29 Data Format During SATURN Mouse Data Request for SH-2 Direct Mode ....... 93
Table 3.30 Data Format During SEGA Tap Power On Reset for SH-2 Direct Mode ............ 94
Table 3.31 Data Format During SEGA Tap Data Request for SH-2 Direct Mode ................ 95
Table 3.32 Connected Peripherals and ID ........................................................................... 95
Table 3.33 Mega Drive 3-Button PAD Data Format During Connection to SEGA Tap ......... 96
Table 3.34 Mega Drive 6-Button PAD Data Format During Connection to SEGA Tap ......... 96
Table 3.35 SEGA Mouse Data Format During Connection to SEGA Tap ............................ 96
Table 3.36 SATURN Standard PAD Data Format for SH-2 Direct Mode ............................. 97
Table 3.37 SATURN Analog Joystick Data Format for SH-2 Direct Mode ........................... 98
Table 3.38 SATURN Keyboard Data Format for SH-2 Direct Mode ................................... 100
Table 3.39 SATURN 6P Multitap Data Format for SH-2 Direct Mode ................................ 103
vii
Section 1 Overview
Section 1 Contents
1.1 System Configuration.................................... 2
Functions ....................................................... 3
PAD ................................................................ 4
1.2 SH-2 Interface ............................................... 5
SH-2 Interface Registers ............................... 5
Parallel I/O Registers .................................... 7
SMPC User's Manual 1
1.1 System Configuration
The SMPC manages SATURN system reset control when the power is turned on and
NMI requests to the master SH-2 when the reset button is pushed. In addition,
commands from SH-2 turn each LSI on and off, sets and acquires calendar time, and
collects data from peripherals. Also, the clock change command switches the hori-
zontal resolution to and from 320 dots and 352 dots.
Control Address Data SMPC
Bus Bus Bus
CDRES To CD Block
Address SH I/F
Buffer
IOSEL
MSHRES
MSHNMI
RES SSHRES
Data
SSHNMI
MSH-2 Buffer
SNDRES
NMI
SYSRES
4-bit CPU
DOTSEL
Core
I/O I/O
RES Peripheral Peripheral
SSH-2
NMI
VDP1 PLL
RES
VDP2
RES
SCSP
RES
MC68EC000
SCU RES
Figure 1.1 SMPC System Configuration
2
The SMPC has two sets of 7-bit parallel I/O ports. Access to I/O ports is controlled
by the SMPC’s internal firmware and there are two access methods that can be se-
lected: the SMPC control mode which outputs collected data to the SMPC output
register (OREG), and the SH-2 direct mode which has direct access from the SH-2.
For details regarding the SMPC control mode and SH-2 direct mode, refer to Section 3.
During power on, the SATURN internal units are initialized as shown in Table 1.1.
Table 1.1 Initialization Status During Power On
Status Description
Sound CPU OFF Status A reset enters the sound CPU. Output by a power on
vector by the SNDON command.
VDP1, VDP2, SCU, SCSP A status where access from the SH-2 is possible.
ON Status
Slave SH OFF Status A reset enters the slave SH-2. Output by a power on
vector by the SSHON command.
DOT SEL OFF Status The PLL oscillation frequency is in the 320 mode
(NTSC: 26.8741 MHz, PAL: 26.6875 MHz) and the
VDP1, VDP2 and SH-2 are run at this frequency.
Changed to run in 352 mode (NTSC: 28.6364 MHz,
PAL: 28.4375 MHz) by the CKCHG352 command.
CD Block ON Status A status where access from the SH-2 is possible.
Functions
The SMPC has three major functions: Real Time Clock (RTC), System Manager (SM),
and Peripheral Control (PC).
The SMPC’s main functions are shown in Table 1.2.
Table 1.2 SMPC Functions
RTC • Time setting and acquisition from SH-2.
(Real Time Clock) • Automatic update of date, day, time
(Battery backup is possible when main power off)
SM • Sound CPU on and off
(System Management) • Master SH-2 and slave SH-2 on and off
• System reset control
• Clock switching (PLL switching)
• Power on reset
• NMI request to master SH-2 when front panel
button is pushed down.
PC • Can support peripheral with SATURN peripheral
(Peripheral Control) interface specifications.
• Automatic collection of peripheral data from control
PAD, mouse, etc.
• Also supports Mega Drive peripherals (3-button, 6-
button, SEGA tap) (a conversion adapter is
required, however)
SMPC User's Manual 3
PAD
The SATURN digital standard PAD has up, down, left, right, A, B, C, X, Y, Z, L, R,
and Start buttons.
Figure 1.2 Standard Digital PAD for SATURN
4
1.2 SH-2 Interface
SH-2 Interface Registers
The SH-2 interface registers are registers that are used to receive commands, com-
mand parameters, and status display from the SH-2 and to output result parameters.
Figure 1.3 shows the SH-2 interface register address map.
b it7 b it0
2010001FH COMREG W
R : Read Only
b it7 b it0 W : Write Only
20100061H R R/W: Read/Write
SR
b it0
20100063H SF R/W
b it7 b it0
20100001H IREG0
20100003H IREG1
20100005H IREG2
20100007H IREG3 W
20100009H IREG4
2010000BH IREG5
2010000DH IREG6
b it7 b it0 b it7 b it0
20100021H OREG0 20100041H OREG16
20100023H OREG1 20100043H OREG17
20100025H OREG2 20100045H OREG18
20100027H OREG3 20100047H OREG19
20100029H OREG4 20100049H OREG20
2010002BH OREG5 2010004BH OREG21
2010002DH OREG6 2010004DH OREG22
2010002FH OREG7 2010004FH OREG23
R R
20100031H OREG8 20100051H OREG24
20100033H OREG9 20100053H OREG25
20100035H OREG10 20100055H OREG26
20100037H OREG11 20100057H OREG27
20100039H OREG12 20100059H OREG28
2010003BH OREG13 2010005BH OREG29
2010003DH OREG14 2010005DH OREG30
2010003FH OREG15 2010005FH OREG31
Only byte access is possible for all registers.
Figure 1.3 SH-2 Interface Register Address Map
SMPC User's Manual 5
The details on SH-2 interface registers are as follows:
COMREG (W): COMmand REGister
This is an 8-bit register used to receive commands from the SH-2. At the same time a
command is written, the SMPC interprets and executes the command. The SMPC
has resetable system management commands, non-resetable system management
commands, and RTC commands. Use byte access from the SH-2.
SR (R): Status REGister
This 8-bit register is used to display the status after SMPC command execution. A
read from the SH-2 can be done at any time regardless of the command being issued.
For peripheral control, each peripheral control status is shown. Use byte access from
the SH-2.
SF (R/W): Status Flag
This flag controls command issue. Flag set is performed by the SH-2 before com-
mand issue and the flag is reset by the SMPC when the command is ended. When
from the SH-2, only set is possible, and when setting, write to 01H. During read, all
bits except bit0 are undefined. Using this flag makes it possible to control the dual
issue of commands.
IREG0~IREG6 (W): Input REGister 0~6
These 8-bit registers are used to receive command parameters from the SH-2. The
SMPC has 7 IREG registers. Use byte access from the SH-2.
OREG0~OREG31 (R): Output REGister 0~31
These 8-bit registers are used to used to output result parameter and peripheral data
to the SH-2. The SMPC has 32 OREG which are used when reading the cartridge
code, area code, peripheral data, current time, etc. Use byte access from the SH-2.
6
Parallel I/O Registers
These registers are used to control the peripheral interface inside the SMPC.
Figure 1.4 shows parallel I/O register address map. Write-only registers cannot be
read, so caution regarding this is required.
b it6 b it0 b it6 b it0
20100075H PDR1 R/W 20100077H PDR2 R/W
20100079H DDR1 W 2010007BH DDR2 W
b it1 b it0
2010007DH IOSEL2 IOSEL1 W W : Write Only
2010007FH EXLE2 EXLE1 W R/W: Read/Write
Only byte access is allowed to all the registers.
Figure 1.4 Parallel I/O Register Address Map
DDR1 (W): Data Direction Register 1
This is a 7-bit register used for setting, in bit units, the peripheral port 1 (P1) I/O
direction. “0” is written to set for input and “1” is written to set for output. Please
use byte access from the SH-2.
DDR2 (W): Data Direction Register 2
This is a 7-bit register used for setting, in bit units, the peripheral port 2 (P2) I/O
direction. “0” is written to set for input and “1” is written to set for output. Please
use byte access from the SH-2.
Table 1.3 DDR Functions
Bit Function
0 Input Setting (Initial Value)
1 Output Setting
PDR1 (R or W): Port Data Register 1
The PDR1 is a 7-bit register that is used to store peripheral port 1 (P1) data. Whether
all the PDR1 bits are at the input port or the output port is determined by DDR1
setting. The port terminal status that is set to output can be changed by writing data
in this register. The port terminal status that is set to input can be changed by read-
ing this register. Also, for ports set to output, the value written in to the PDR1 is read
out rather than the terminal status. Please use byte access from the SH-2.
SMPC User's Manual 7
PDR2 (R or W): Port Data Register 2
The PDR2 is a 7-bit register that is used to store peripheral port 2 (P2) data. Whether
all the PDR2 bits are at the input port or the output port is determined by DDR2
setting. The port terminal status that is set to output can be changed by writing data
in this register. The port terminal status that is set to input can be changed by read-
ing this register. Also, for ports set to output, the value written in to the PDR2 is read
out rather than the terminal status. Please use byte access from the SH-2.
IOSEL1 (W): I/O SELect 1
The peripheral port 1 (P1) is set to SMPC control mode or SH-2 direct mode. Writing
“0” specifies the SMPC control mode and writing “1” specifies the SH-2 direct mode.
Use byte access from the SH-2.
IOSEL2 (W): I/O SELect 2
The peripheral port 2 (P2) is set to SMPC control mode or SH-2 direct mode. Writing
“0” specifies the SMPC control mode and writing “1” specifies the SH-2 direct mode.
Use byte access from the SH-2.
Table 1.4 IOSEL Functions
Bit Function
0 Sets to SMPC control mode (Initial Value)
1 Sets to SH-2 direct mode
For details regarding each mode, refer to Section 3.
EXLE1 (W): EXternal Latch Enable 1
The peripheral port 1 (P1) bit 6 is a setting bit that is used for PAD interrupt and
VDP2 external latch input. It is disabled by writing “0,” and the peripheral port 1 bit
6 is normally set as an I/O port. It is enabled by writing “1,” which allows the pe-
ripheral port 1 bit 6 to be used for PAD interrupt input or VDP2 external latch input.
Use byte access from the SH-2.
8
EXLE2 (W): EXternal Latch Enable 2
The peripheral port 2 (P2) bit 6 is a setting bit that is used for PAD interrupt and
VDP2 external latch input. It is disabled by writing “0,” and the peripheral port 1 bit
6 is normally set as an I/O port. It is enabled by writing “1,” which allows the pe-
ripheral port 1 bit 6 to be used for PAD interrupt input or VDP2 external latch input.
Use byte access from the SH-2.
Table 1.5 EXLE Functions
Bit Function
0 Disable (Initial Value)
1 Enable
EXLE is multiplexed in I/O port bit 6. Therefore, when using EXLE, the DDR1 and
DDR2 bit 6 must be set to input. (Refer to VDP2 external latch functions and SCU
PAD Interrupt.)
SMPC User's Manual 9
(This page is blank in the original Japanese document.)
10
Chapter 2 SMPC Commands
Section 2 Contents
2.1 SMPC Command List .............................................. 12
2.2 Command Issue ....................................................... 13
Command Issue Method.......................................... 13
Command Issue Timing ........................................... 17
Command Issue Limitations .................................... 19
2.3 Resetable System Management Commands ........... 21
2.4 Non-Resetable System Management Commands ... 35
2.5 RTC Commands ...................................................... 45
SMPC User's Manual 11
2.1 SMPC Command List
SMPC commands are divided into three types; resetable system management com-
mands, non-resetable system management commands, and RTC commands. Each of
these commands is shown below.
Table 2.1 Resetable System Management Commands
Execution Time
Command Command SMPC
sec
No Command Name SR IREG OREG
Abbreviation Code Interrupt
min max
1 Master SH-2 ON MSHON 00 H Unused Unused Unused 31 30µ
2 Slave SH-2 ON SSHON 02 H Unused Unused Unused 31 30µ
3 Slave SH-2 OFF SSHOFF 03 H Unused Unused Unused 31 30µ
4 Sound ON SNDON 06 H Unused Unused Unused 31 30µ
5 Sound OFF SNDOFF 07 H Unused Unused Unused 31 30µ
6 CD ON CDON 08 H Unused Unused Unused 31 40µ
7 CD OFF CDOFF 09 H Unused Unused Unused 31 40µ
8 Reset Entire System SYSRES 0D H Unused Unused Unused 31 100m+ α
9 Clock Change 352 Mode CKCHG352 0E H Unused Unused Unused 31 100m+ α
10 Clock Change 320 Mode CKCHG320 0F H Unused Unused Unused 31 100m+ α
11 NMI Request NMIREQ 18 H Unused Unused Unused 31 30µ
12 Reset Enable RESENAB 19 H Unused Unused Unused 31 30µ
13 Reset Disable RESDISA 1A H Unused Unused Unused 31 30µ
Table 2.2 Non-Resetable System Management Commands
Execution Time
Command SMPC sec
No Command Name Command Code Interrupt SR IREG OREG
Abbreviation min max
1 Interrupt Back INTBACK 10H Used Used 0~2 0~31 320m
2 SMPC Memory Setting SETSMEM 17H Unused Unused 0~3 31 40 µ
Table 2.3 RTC Commands
Execution Time
Command Name Command Command SMPC
sec
No Code Interrupt SR IREG OREG
Abbreviation
min max
1 Time Setting SETTIME 16H Unused Unused 0~6 31 70 µ
12
2.2 Command Issue
For commands to the SMPC, to issue commands when the command parameter is
required after setting the SMPC status flag (SF) to “1,” set the command parameter,
and write the command code in the SMPC command register.
When the SMPC command is issued, be careful of dual command issue. Prevention
of dual issue of commands to the SMPC can be done using the SMPC status flag.
When this flag is “1,” the SMPC is busy. When executing the command, verify that
the status flag is “0” and then execute the command after setting “1.” The SMPC
resets the status flag to “0” when the command is completed.
Command Execution Method
SMPC commands are classified by issue procedure and result parameter acquisition
method according to the type of command execution contents, command parameter,
and result parameter. These types and corresponding commands are shown in Table
2.4, and example issue methods for each type are shown in Figures 2.1 through 2.5.
(1) Type A This command resets the master SH-2 after command issue or changes to
exception processing, such as NMI.
(2) Type B This command does not require the command parameter to be reset and
the result parameter is not returned (except for OREG31, however).
(3) Type C This command requires the command parameter to be reset and the result
parameter is not returned (except for OREG31, however).
(4) Type D This command requires the command parameter to be reset and the result
parameter is returned, and also requires a SMPC interrupt at the time the
result parameter is ready.
Table 2.4 Command Issue Types
Type Command
A MSHON, SYSRES, NMIREQ, CKCHG352, CKCHG320
B SSHON, SSHOFF, SNDON, SNDOFF, CDON, CDOFF, RESENAB, RESDISA
C SETTIME, SETSMEM
D INTBACK
SMPC User's Manual 13
START
Waits for SF to be Reset
Sets SF
Reads Command Code in
COMREG
Endless Loop
Waiting for
exception
handling.
Figure 2.1 Type A Command Flow
START
Waits for SF to be Reset
Sets SF
Reads Command Code in
COMREG
END
Figure 2.2 Type B Command Flow
14
START
Waits for SF to be Reset
Resets SF
Sets the Command Parameter
in IREG
Writes Command Code in
COMREG
END
Figure 2.3 Type C Command Flow
SMPC User's Manual 15
START
Waits for SF to be Reset
Set SF
Sets the Command Parameter
in IREG
Writes Command Code in
COMREG
END
SMPC Interrupt Processing
START
Clear Interrupt Flag
Look at SR and Receive
OREG Result Parameter
Depending on Peripheral Status,
Issue Continue or Break to SMPC
(Refer to Chapter 3 for Details)
Interrupt Processing END
Figure 2.4 Type D Command Flow
Note: A routine similar to the SMPC interrupt routine can be executed by masking the
SMPC routine (SMPC interrupt is not used) and conducting polling after the SMPC
interrupt flag or SF clear is conducted.
16
Command Issue Timing
The SMPC uses the V-BLANK-IN interrupt to execute internal tasks. At this time,
issuing commands for 300 ms from V-BLANK-IN is prohibited.
Also, the INTBACK command that is used to acquire the SMPC statuses and periph-
eral data has stricter issue timing than other commands. For details regarding the
INTBACK command, refer to 2.4 “Non-Resetable System Management Commands”
or Section 3 “Peripheral Control.”
• Items Common to Command Issue Timing
As mentioned above, issuing commands for 300 µs from V-BLANK-IN is
prohibited.
• INTBACK Command
The INTBACK command begins collecting peripheral data at V-BLANK-OUT. To
begin collecting peripheral data at V-BLANK-OUT, the INTBACK command must
be issued in the period prior to V-BLANK-OUT after 300 µs following V-BLANK-
IN..
Figure 2.5 shows the INTBACK command execution timing.
The INTBACK command is used in the following three ways.
1) To acquire only the SMPC status.
2) To collect peripheral data after acquiring the SMPC status.
3) To acquire only peripheral data.
When executing (2) “To collect peripheral data after acquiring the SMPC status,” a
SMPC interrupt is generated at the time the SMPC status is OREG and a request
for result parameter acquisition is made to the SH-2. The SMPC begins collecting
peripheral data after the SH-2 makes a continue request.
Here, even though a continue request has been issued after SMPC status acquisi-
tion, it is still necessary to issue an INTBACK command and request continue to
begin collecting peripheral data at V-BLANK-OUT.
SMPC status acquisition ends approximately 300 µs after INTBACK command
issue, and a SMPC interrupt request is sent to the SMPC.
SMPC User's Manual 17
300 µ S
: INTBACK Command Issue Period
V-BLANK
V-BLANK-IN V-BLANK-OUT
During V-BLANK
Figure 2.5 INTBACK Command Issue Timing
• INTBACK Command Issue Timing after SYSRES, CKCHG320, CKCHG352 Command Execution
The command execution time for the above commands requires 100 msec or more.
When an INTBACK command is issued after one of these commands is executed,
wait to execute them until the next V-BLANK-IN. Figure 2.6 shows the INTBACK
command issue timing after the SYSRES, CKCHG320, and CKCHG352 commands
are executed.
The SYSRES, CKCHG320, and CKCHG352 commands must be issued 300 µs after
V-BLANK-IN and before the next V-BLANK-IN.
: INTBACK Command Issue Period
SYSRES, CKCHG320,
CKCHG352 Commands Command End
100 msec or More
V-BLANK
V-BLANK-IN
Figure 2.6 INTBACK Command Issue Timing After SYSRES, CKCHG320, and
CKCHG352 Command Execution.
• Issue Timing for Other Commands
When an INTBACK command is not issued in the same frame after one of the other
commands is executed, the command must be issued 300 µs after V-BLANK-IN and
before the next V-BLANK-IN. When an INTBACK command is issued in the same
frame as one of the other commands that is issued 300 µs after V-BLANK-IN and
before the next V-BLANK-IN, issue the INTBACK command before V-BLANK-OUT.
Figure 2.7 shows the issue timing of other commands.
18
Other Command Issue in Frame that Does Not Issue INTBACK Command
300 µs
: Other Command Issue Period
V-BLANK
Other Command Issue in Frame that Issues INTBACK Command
: Other Command Issue Period
300 µs
: INTBACK Command Issue Period
V-BLANK
V-BLANK-IN
Figure 2.7 Issue of Other Commands
Command Issue Limitations
Following is an explanation of limitations when issuing commands.
• When conducting command issue processing for the SMPC, a maximum effort
shall be made to conduct single tasks. If multiple issues are being processed,
problems, such asdual command issue, could occur, which could cause the SMPC
error or a deadlock to occur.
When multiple tasks have to be executed, and when a command must be issued
to the SMPC, always perform these executions by adding exclusion controls that
do not generate dual command issue between tasks to the above described com
mand issue methods.
• When commands are issued sequentially, always verify the status flag to make
sure commands are not dually issued and only issue the next command after the
previous command issue has finished.
• Perform real-time clock count up once every second. Also, conduct a detection of
the SMPC’s internal reset button immediately after V-BLANK-IN. If a command is
issued while this processing is being conducted, this processing time will be
added to the command processing time, so be careful because this will change the
command processing time.
• SMPC commands can be issued from either the master or slave SH-2, but there are
commands for which issue is limited, such as when system operation is stopped.
Table 2.5 shows the SH-2 command issue limitations.
SMPC User's Manual 19
Table 2.5 SH-2 Command Issue Limitations
No. Command Name Command Command Execution Command Execution
Abbreviation from Master SH-2 from Slave SH-2
1 Master SH-2 ON MSHON O O
2 Slave SH-2 ON SSHON O X
3 Slave SH-2 OFF SSHOFF O X
4 Sound ON SNDON O O
5 Sound OFF SNDOFF O O
6 CD ON CDON O O
7 CD OFF CDOFF O O
8 System Overall Reset SYSRES O O
9 Clock Change 352 CKCHG352 O X
10 Clock Change 320 CKCHG320 O X
11 NMI Request NMIREQ O O
12 Reset Enable RESENAB O O
13 Reset Disable RESDISA O O
14 Interrupt Back INTBACK O X
15 SMPC Memory Setting SETSMEM O O
16 Time Setting SETTIME O O
20
2.3 Resetable System Management Commands
The details for the resetable system management commands are given in table
format. The way to view the command tables and precaution items are given below.
In addition, a status flag is used for each command to control the dual issue of com-
mands.
SMPC Interrupt
The word “generation” means that a SMPC interrupt is generated by the SH-2 via
the SCU when the command ends. In addition, the interrupt can be enabled or
disabled by so setting the SCU.
IREG, OREG
• Shows the details of the IREG and OREG used by commands.
• A command parameter is a parameter that is set in IREG before the command is
issued.
• A result parameter is a parameter that is set in OREG before the command is
executed.
• Result parameter OREG31 is set when the SMPC begins command processing.
The command code is output to OREG31. Also using it as a status flag (SF) makes
it possible to determine:
Which command is executing (SF=1)
Which command has finished (SF=0)
Execution Time
Shows the execution time calculated from the number of SMPC internal firmware
steps. When there is a collision with an internal task, such as an RTC increment, the
command execution time is changed, so the minimum and maximum range values
are given.
SMPC User's Manual 21
Command
NO. 1 MSHON Master SH-2 ON Code 00 H
SMPC Generation Execution max min
IREG Unused OREG 31
Interrupt Not Possible Time XXX 30 µsec
Function Turns on master SH-2.
Description
Command None
Parameter
Result
Parameter bit7 bit0
OREG31 2010005F H 0 0 0 0 0 0 0 0
Remarks
22
Command
NO. 2 SSHON Slave SH-2 ON Code 02 H
SMPC Generation Execution max min
IREG Unused OREG 31
Interrupt Not Possible Time XXX 30 µsec
Function Turns on slave SH-2.
Description
Command None
Parameter
Result
Parameter bit7 bit0
OREG31 2010005F H 0 0 0 0 0 0 1 0
Remarks
SMPC User's Manual 23
Command
NO. 3 SSHOFF Slave SH-2 OFF Code 03 H
SMPC Generation Execution max min
IREG Unused OREG 31
Interrupt Not Possible Time XXX 30 µsec
Function Turns off slave SH-2.
Description
Command None
Parameter
Result
Parameter bit7 bit0
OREG31 2010005F H 0 0 0 0 0 0 1 1
Remarks
24
Command
NO. 4 SNDON Sound ON Code 06 H
SMPC Generation Execution max min
Interrupt Not Possible IREG Unused OREG 31 Time XXX 30 µsec
Function Turns on the sound CPU (MC68EC000).
Description
Command None
Parameter
Result
Parameter bit7 bit0
OREG31 2010005F H 0 0 0 0 0 1 1 0
Remarks
SMPC User's Manual 25
Command
NO. 5 SNDOFF Sound OFF Code 07 H
SMPC Generation Execution max min
Interrupt Not Possible IREG Unused OREG 31 Time XXX 30 µsec
Function Turns off the sound CPU (MC68EC000).
Description
Command None
Parameter
Result
Parameter bit7 bit0
OREG31 2010005F H 0 0 0 0 0 1 1 1
Remarks Even if the sound CPU is turned off using this command, the sound memory
contents (4M DRAM) will be preserved.
26
Command
NO. 6 CDON CD ON Code 08 H
SMPC Generation Execution max min
Interrupt IREG Unused OREG 31 Time XXX 40 µsec
Not Possible
Function Turns on CD.
Description
Command None
Parameter
Result
Parameter bit7 bit0
OREG31 2010005F H 0 0 0 0 1 0 0 0
Remarks
SMPC User's Manual 27
Command
NO. 7 CDOFF CD OFF Code 09 H
SMPC Generation Execution max min
Interrupt Not Possible IREG Unused OREG 31 Time XXX 40 µsec
Function Turns off CD.
Description
Command None
Parameter
Result
Parameter bit7 bit0
OREG31 2010005F H 0 0 0 0 1 0 0 1
Remarks The execution of this command will cause the CD buffer (DRAM) value not to
be retained.
28
Command
NO. 8 SYSRES Entire System Reset Code 0D H
SMPC
Interrupt
Generation
Not Possible IREG Unused OREG 31
Execution
Time
100 msec + α
Function Resets the entire SATURN system.
Description
Command None
Parameter
Result
Parameter bit7 bit0
OREG31 2010005F H 0 0 0 0 1 1 0 1
Remarks Execution of this command resets (initializes) all functions, causes the SH-2 to run the
power on vecter, and starts up the boot ROM.
None of the memory, except for 256 Kbit battery backup RAM, will be retained.
SMPC User's Manual 29
Command
NO. 9 CKCHG352 Clock Change 352 Mode Code 0EH
SMPC
Interrupt
Generation
Not Possible
IREG Unused OREG 31
Execution
Time
100 msec + α
Function Switch the SATURN system clock from 320 mode to 352 mode.
Description
Command None
Parameter
Result
Parameter bit7 bit0
OREG31 2010005F H 0 0 0 0 1 1 1 0
Remarks Issuing this command from an application is prohibited. Call the clock change
routine in the SATURN boot ROM. When clock change routine is called, all LSI
will become as follows.
• VDP1, VDP2, SCU, SCSP: Default value during power on.
• Master SH-2: Return from boot ROM clock change routine.
• Slave SH-2: OFF
• CD block: Retained
• Work RAM: Retained
• VRAM: Not retained
30
Command
NO. 10 CKCHG320 Clock Change 320 Mode Code 0FH
SMPC
Interrupt
Generation
Not Possible IREG Unused OREG 31
Execution
Time
100 msec + α
Function Switch the SATURN system clock from 352 mode to 320 mode.
Description
Command None
Parameter
Result
Parameter bit7 bit0
OREG31 2010005F H 0 0 0 0 1 1 1 1
Remarks Issuing this command from an application is prohibited. Call the clock change
routine in the SATURN boot ROM. When clock change routine is called, all LSI
will become as follows.
• VDP1, VDP2, SCU, SCSP: Default value during power on.
• Master SH-2: Return from boot ROM clock change routine.
• Slave SH-2: OFF
• CD block: Retained
• Work RAM: Retained
• VRAM: Not retained
SMPC User's Manual 31
Command
NO. 11 NMIREQ NMI Request Code 18 H
SMPC Generation Execution max min
Interrupt Not Possible IREG Unused OREG 31 Time XXX 30 µsec
Function Sends NMI request to master SH-2.
Description
Command None
Parameter
Result
Parameter bit7 bit0
OREG31 2010005F H 0 0 0 1 1 0 0 0
Remarks NMI is requested unconditionally even if disabled by the RESDISA command.
32
Command
NO. 12 RESENAB Reset Enable Code 19 H
SMPC Generation Execution max min
IREG Unused OREG 31
Interrupt Not Possible Time XXX 30 µ sec
Function This is a command to enable NMI generation.
Description
In SATURN, NMI is generated when the main unit panel reset button is
pushed. When power is on, the default is set disabled.
Command None
Parameter
Result
Parameter bit7 bit0
OREG31 2010005F H 0 0 0 1 1 0 0 1
Remarks NMI is generated when the reset button is pushed during the 3VINT period to
prevent chattering.
SMPC User's Manual 33
Command
NO. 13 RESDISA Reset Disable Code 1AH
SMPC Generation Execution max min
IREG Unused OREG 31
Interrupt Not Possible Time XXX 30 µ sec
Function This is a command to disable NMI generation.
Description In SATURN, generates NMI when main unit panel reset button is pushed.
The defaut is "disabled" when the power is turned on.
Command None
Parameter
Result
Parameter bit7 bit0
OREG31 2010005F H 0 0 0 1 1 0 1 0
Remarks The reset switch is only shown by the SR (status register) RESB bit (bit4) and
does not output an NMI to the master SH-2. The RESB bit shows the button
status at V-BLANK-IN.
34
2.4 Non-Resetable System Management Commands
The details for the non-resetable system management commands are given in table
format.
The way to view the command tables and precaution items are given below. Also, a
status flag is used for each command to control dual command issue.
SMPC Interrupt
The word “generation” means that a SMPC interrupt is generated by the SH-2 via
the SCU when the command ends. In addition, the interrupt can be enabled or
disabled by setting the SCU.
IREG, OREG
• Shows the details of the IREG and OREG used by commands.
• A command parameter is a parameter that is set in IREG before the command is
issued.
• A result parameter is a parameter that is set in OREG before the command is
executed.
• Result parameter OREG31 is set when the SMPC begins command processing.
The command code is output to OREG31. Also using it as a status flag (SF) makes
it possible to determine:
Which command is executing (SF=1)
Which command has finished (SF=0)
Execution Time
Shows the execution time calculated from the number of SMPC internal firmware
steps. When there is a collision with an internal task, such as a RTC increment, the
command execution time is changed, so the minimum and maximum range values
are given.
SMPC User's Manual 35
Command
NO. 1 INTBACK Interrupt Back (SMPC Status Acquisition) Code 10 H
SMPC Execution max min
Interrupt Generation IREG 0~2 OREG 0 ~31 Time 320 msec XXX
Function Acquires the SMPC status and peripheral data. Here status acquisition will be
Description
explained. The acquisition of peripheral data will be explained in Section 3.
Command Here, the INTBACK command's command parameter during peripheral
Parameter data acquisition is also displayed.
Refer to command parameter on the next page.
The command parameter setting method during SMPC status acquisition is
explained next after result parameter.
Result The result parameter is explained after the command parameter.
Parameter Here, the result parameter, which is limited by the SMPC status
acquisition is displayed.
Remarks
36
Command Parameter
bit7 bit0
IREG0 20100001 H SMPC Status Acquisition Switch (00H or 01 H)
Initial Value: Not Specified Write Only
IREG0: SMPC Status Acquisition Switch Setting Value
IREG0 Setting Explanation
Value
00H Does not return data for time, cartridge code, area
code, terminal status, SMEM, or reset button mode.
01H Returns data for time, cartridge code, area code,
terminal status, SMEM, or reset button mode.
When using the INTBACK command, be sure one of the above setting values has
been set.
IREG0 is also used to control peripherals. Refer to Section 3 for details regarding
peripheral control.
bit7 bit4 bit3 bit0
IREG1 20100003H P2MD1 P2MD0 P1MD1 P1MD0 PEN 0 OPE 0
Unde. Unde. Unde. Unde. Unde. Unde. Unde. Unde.
W W W W W --- W ---
Bit7, 6: Port 2 Mode
Bit7 Bit 6
Explanation
P2MD1 P2MD0
0 0 15-Byte Mode
0 1 255-Byte Mode
1 0 SEGA RESERVED (Setting Restricted)
1 1 0-Byte Mode
Bit5, 4: Port 1 Mode
Bit5 Bit 4
Explanation
P1MD1 P1MD0
0 0 15-Byte Mode
0 1 255-Byte Mode
1 0 SEGA RESERVED (Setting Restricted)
1 1 0-Byte Mode
SMPC User's Manual 37
Bit3: Peripheral Data Enable
Bit3
Explanation
PEN
0 Peripheral Data Not Returned
1 Peripheral Data Returned
Bit1: Acquisition Time Optimization
Bit1
Explanation
OPE
0 Peripheral Data Acquisition Time Optimized
1 Peripheral Data Acquisition Time not Optimized
bit7 bit0
IREG2 F0H
20100005H
Initial Value: Not Specified Write Only
When executing the INTBACK command, be sure to set F0H in IREG2.
38
Result Parameter
bit7 bit4 bit3 bit0
SR 20100061H 0 1 PDE RESB --- --- --- ---
•PDE 0: No remaining peripheral data.
1: Remaining peripheral data.
•RESB 0: Reset button off.
1: Reset button on.
Read can be performed without regard for the INTBACK command.
bit7 bit4 bit3 bit0
OREG0 20100021H STE RESD --- --- --- --- --- ---
•STE 0: Not SETTIME after SMPC cold reset Note 1
1: SETTIME is done after SMPC cold reset Note 1
•RESD 0: Reset enable
1: Reset disable (default)
Note 1: SMPC cold reset is generated under the following conditions.
(1) When the reset switch inside the SATURN backside battery box is pressed.
(2) When the main power is on while a battery is not installed or is dead.
(3) When a battery is installed while the power is off.
bit7 bit0
OREG1 20100023H Year 1000s Place Year 100s Place (BCD)
OREG2 20100025H Year 10s Place Year 1s Place (BCD)
OREG3 20100027H Day Note 2 Month (Hexadecimal) Note 3
Note 2: Day
0H: Sun 1H: Mon 2H: Tue 3 H: Wed 4H: Thur 5H: Fri 6H: Sat
Note 3: Month
1H: Jan 2 H: Feb 3H: Mar 4 H: Apr 5H: May 6 H: Jun
7H: July 8H: Aug 9 H: Sep AH: Oct BH: Nov CH: Dec
bit7 bit0
OREG4 20100029H Days 10s Place Days 1s Place (BCD)
OREG5 2010002B H Hrs. 10s Place Hrs. 1s Place (BCD)
OREG6 2010002DH Min. 10s Place Min. 1s Place (BCD)
OREG7 2010002F H Sec. 10s Place Sec. 1s Place (BCD)
OREG8 20100031H 0 0 0 0 0 0 CTG1 CTG0
•CTG1: Cartridge Code 1
•CTG0: Cartridge Code 0
SMPC User's Manual 39
bit7 bit0
OREG9
bit7 Area Code (00H~0FH) bit0
20100033H
OREG9 Area Code (00H~0FH)
20100033H
Area Code
Code
Area Code Area Major Country Names, Etc.
Code0H Use Prohibited
Area Major Country Names, Etc.
0H1H Japan Area
Use Prohibited Japan
1H Asia NTSC
2H Japan Area area Taiwan,
Japan Philippines
3H SEGA
Asia RESERVED
sia NTSC Area Taiwan, Philip
Phili pines
2H
North RESERVED
4H SEGA America area U.S.A., Canada, Mexico
3H
5H North
Central/S. America NTSC area
America Area U.S.A., Canada,BrazilMexico
4H
South Korea
Korea areaAmerica NTSC Area Brazil
6H Central/S.
5H
7H Korea
SEGAArea
RESERVED
South Korea
6H
SEGARESERVED
8H SEGA RESERVED
7H SEGARESERVED
RESERVED
9H SEGA
8H
AH SEGA
Asia PAL area
RESERVED East Asia, China, Middle East
9H SEGA
BH Asia RESERVED
PAL Area East Asia, China, Middle East
AH EuropeRESERVED
CH SEGA PAL area, etc. Europe, Australia, South Africa
BH Central/S.
DH Europe PAL Amercia PALEurope,
Area, etc. area Australia, South Africa
CHEH Central/S. America PAL Area
SEGA RESERVED
DH Use Prohibited
FH SEGA RESERVED
E Use Prohibited
H
FH
OREG10 System Status 1
20100035H bit7 bit0
System
OREG10Status 1 (Status of Control Signals Output System
by SMPCStatus
0: OFF
1 1 :ON)
•b7 0B •b6 DOTSEL Signal Note •b5 1B
20100035H
•b4 1B •b3 MSHNMI Signal •b2 1B
System Status 1Signal
•b1 SYSRES (Status
•b0ofSNDRES
Control Signals
Signal Output by SMPC 0: OFF 1 :ON)
•b7 0B •b6The
Note: DOTSEL
DOTSEL Signal
signalNote •b5 1B shown in the screen mode (horizontal resolution).
is currently
•b40:1B •b31:MSHNMI
320 352 Signal •b2 1B
•b1 SYSRES Signal •b0 SNDRES Signal
Note: The DOTSEL signal is currently shown in the screen mode (horizontal resolution).
0: 320 1: 352
bit7 bit0
OREG11 System Status 2
20100037H
bit7 bit0
System Status 2 (Status of Control Signals Output by SMPC 0: OFF 1 :ON)
OREG11
•b7 RESERVED •b6 CDRES Signal •b5 RESERVED System Status 2
20100037H
•b4 RESERVED •b3 RESERVED •b2 RESERVED
•b1 RESERVED
System •b0 RESERVED
Status 2 (Status of Control Signals Output by SMPC 0: OFF 1 :ON)
•b7 RESERVED •b6 CDRES Signal •b5 RESERVED
•b4 RESERVED •b3 RESERVED •b2 RESERVED
•b1 RESERVED •b0 RESERVED
40
bit7 bit0
OREG12 20100039H SMEM 1 Saved Data
OREG13 2010003BH SMEM 2 Saved Data
OREG14 2010003D H SMEM 3 Saved Data
OREG15 2010003F H SMEM 4 Saved Data
bit7 bit0
OREG31 2010005FH 0 0 0 0 0 0 0 0
With peripheral data, however, the command code (OREG31) could be overwritten.
SMPC User's Manual 41
How to Use INTBACK Command when Acquiring SMPC Status
There are three ways the INTBACK command can be used.
1) Acquire only SMPC status.
2) Acquire peripheral data after acquiring SMPC status.
3) Acquire only peripheral data.
This section primarily explains how to acquire SMPC status. Here, acquiring status
using methods 1) and 2) are explained. For an explanation regarding peripheral data
acquisition, refer to Section 3.
Method for Acquiring Only SMPC Status
When acquiring status only, set the command parameter as shown below, and
execute the INTBACK command.
Setting
IREG Description
Value
All data for time, cartridge code, area code, terminal
IREG0 01H status, SMEM, and reset button mode is returned.
IREG1 00H Terminal 2 mode (P2MD1, P2MD0)=00B 15-byte mode
Terminal 1 mode (P1MD1, P1MD0)=00B 15-byte mode
Peripheral data enable (PEN)=0B Peripheral data not
returned
Acquisition time optimization (OPE)=0B Performs
peripheral acquisition time optimization.
IREG2 F0H Set F0H without conditions.
This setting can clear the SF, ends the INTBACK command, and acquires the
result data. Also, when the command ends, a SMPC interrupt request is sent.
The execution time is from minimum TBD to maximum TBD.
42
Method for Acquiring Peripheral Data After Acquiring SMPC Status
When acquiring peripheral data after acquiring SMPC status acquisition, set the command
parameter as shown below and issue the INTBACK command. The IREG1 setting value can be
set to the value desired for the application.
Setting Description
IREG
Value
All data for time, cartridge code, area code, terminal
IREG0 01H status, SMEM, and reset button mode is returned.
IREG1 08H Terminal 2 mode (P2MD1, P2MD0)=00B 15-byte mode
Terminal 1 mode (P1MD1, P1MD0)=00B 15-byte mode
Peripheral data enable (PEN)=1B Peripheral data
returned
Acquisition time optimization (OPE)=0B Performs
peripheral acquisition time optimization.
IREG2 F0H Set F0H without conditions.
This setting executes the SMPC command and requests a SMPC interrupt when
the result parameter is set. When the SMPC interrupt is requested, the SF is
changed to busy "1." The execution time from command issue to result
parameter setting completion is minimum TBD to maximum TBD. After the result
parameter for the status is acquired, the value of the IREG0 bit7 is changed, then
the SMPC understands this as continue and continues acquiring peripheral data.
This method is effective for use with applications that acquire all status types for
each frame and that acquire peripheral data.
SMPC User's Manual 43
Command
NO. 2 SETSMEM SMPC Memory Setting Code 17 H
SMPC Generation Execution max min
Interrupt Possible
IREG 0 ~3 OREG 31 Time XXX 40 µsec
Function The SMPC has a 4-byte battery backupable memory (SMEM)
Description This command sets data to the SMEM.
Command
Parameter bit7 bit0
IREG0 20100001H Setting Data to SMEM1
IREG1 20100003H Setting Data to SMEM2
IREG2 20100005H Setting Data to SMEM3
IREG3 20100007H Setting Data to SMEM4
bit7 bit0
Result OREG31 2010005F H 0 0 0 1 0 1 1 1
Parameter
Remarks • The SMEM contents are cleared to 0 when the SMPC is cold reset.
A SMPC cold reset is generated under the following conditions.
(1) When the reset switch in the SATURN backside battery box is pushed.
(2) When the main power is turned on while no battery is installed or when
the battery is dead.
(3) Cleared to 0 when a battery is installed while the power is off. Becomes 0
after the main power is first turned on.
• With the SETSMEM command, 4 bytes can be set at the same time. When
the contents are updated, use the INTBACK command to read, modify, or
write the currently saved data.
• If the power is turned off when the SETSMEM command is issued:
(1) All data is updated when the SETSMEM command internal processing is
executed first by the power off sequence.
(2) When the power off sequence is executed first, the data before the
command was issued is saved.
44
2.5 RTC Commands
The details for the RTC commands are given in table format. The way to view the
command tables and precaution items are given below. Also, a status flag is used for
each command to control dual command issue.
SMPC Interrupt
The word “generation” means that a SMPC interrupt is generated by the SH-2 via
the SCU when the command ends. In addition, the interrupt can be enabled or
disabled by setting the SCU.
IREG, OREG
• Shows the details of the IREG and OREG used by commands.
• A command parameter is a parameter that is set in IREG before the command is
issued.
• A result parameter is a parameter that is set in OREG before the command is
executed.
• Result parameter OREG31 is set when the SMPC begins command processing.
The command code is output to OREG31. Also using it as a status flag (SF) makes
it possible to determine:
Which command is executing (SF=1)
Which command has finished (SF=0)
Execution Time
Shows the execution time calculated from the number of SMPC internal firmware
steps. When there is a collision with an internal task, such as a RTC increment, the
command execution time is changed, so the minimum and maximum range values
are given.
SMPC User's Manual 45
Command
NO. 1 SETTIME Time Setting Code 16 H
SMPC Interrupt Generation Execution max min
Interrupt Not Possible IREG 0~6 OREG 31 Time XXX 70 µsec
Function Sets the RTC time.
Description
Command
bit7 bit4 bit3 bit0
Parameter
IREG0 20100001H Year 1000s Place Year 100s Place (BCD)
IREG1 20100003H Year 10s Place Year 1s Place (BCD)
IREG2 20100005H Day Note 1 Month (Hexadecimal) Note 2
IREG3 20100007H Days 10s Place Days 1s Place (BCD)
IREG4 20100009H Hour 10s Place Hour 1s Place (BCD)
IREG5 2010000BH Minute 10s Place Minute 1s Place (BCD)
IREG6 2010000DH Second 10s Place Second 1s Place (BCD)
Note 1: Days
0H: Sun. 1H: Mon. 2 H: Tue. 3 H: Wed. 4H : Thur. 5H : Fri. 6H: Sat.
Note 2: Month
1H: Jan 2 H: Feb 3H: Mar 4 H: Apr 5H: May 6 H: Jun
7H: July 8H: Aug 9 H: Sep AH: Oct BH: Nov CH: Dec
Result bit7 bit0
Parameter OREG031 25FC00BC H 0 0 0 1 0 1 1 0
Remarks • The time is initialized to "12/31/93 Friday 23:59:59" and the count is started
during SMPC cold reset.
The SMPC cold reset is generated under the following conditions.
(1) When the reset switch in the SATURN background battery box is
pushed down.
(2) When the battery is not installed or is dead and the main power is on.
(3) When 0 cleared when the battery is installed when the power is off.
• When data that does not actually exist, a day higher than 7, a month higher
than 12, a date for a month not supported (correction is made for leap years
until 2099), hours above 24, minutes above 60, or seconds above 60 are set,
the set value or the count up value becomes undefined.
• If the SETTIME command is issued while the power is off:
(1) All data is updated if the SETTIME command internal processing is
executed before the power off sequence.
(2) The data before command issuance is preserved when the power off
sequence is executed first.
46
Chapter 3 Peripheral Control
Section 3 Contents
3.1 Peripheral Control Mode....................................................................................... 48
SMPC Control Mode............................................................................................. 48
INTBACK Command Use Method for SMPC Control Mode ....................................... 53
Peripheral Data Collection Time Optimization .......................................................... 55
INTBACK Command's Command Parameters During Peripheral Data Acquisition ...... 58
INTBACK Command Result Parameter During Peripheral Data Acquisition ................ 61
Peripheral Data Configuration................................................................................ 65
Result Parameter Details ........................................................................................ 66
SATURN Peripheral ID........................................................................................... 69
SH-2 Direct Mode..................................................................................................
Section 3 Contents 74
3.2 SATURN Peripheral 3.1 Standard Format .....................................................................
Peripheral Control Mode .......................................................... 76 48
Purpose of SATURN 3.2 Peripheral Standard Format ....................................................
SATURN Peripheral Standard Formats .................................... 76 76
SATURN Standard Format Types and Data Format .................................................. 76
3.3 Support Peripheral
3.3 Support Peripheral Data Format for SMPC Control Mode Data Format in SMPC Control Mode .........81
......................................... 81
3.4 Support Peripheral Data3.4 Format
Supportfor Peripheral
SH-2 Direct Data Format
Mode in SH-2 Direct Mode .............
............................................. 86 86
SMPC User's Manual 47
3.1 Peripheral Control Mode
The SH-2 can control peripherals via the SMPC. There are two peripheral control
methods. They are:
1) SMPC Control Mode
2) SH-2 Direct Mode
SMPC Control Mode
Block Diagram
Figure 3.1 shows the SMPC control mode block diagram. The SMPC control mode
sets the command parameter in the SH-2 interface register’s IREG and is started up
by issuing an INTBACK command. The peripheral data collection results are output
to the OREG as a result parameter.
SH-2 SMPC
SH-2 PDR1
Data Bus Interface 7
8 Register
PDR2
7
Figure 3.1 SMPC Control Mode Block Diagram
Characteristics
Used as an effective method to keep overhead to a minimum when accessing periph-
erals from inside an application.
Settings for Using SMPC Control Mode
Figure 3.2 shows an setting example for using the SMPC control mode for port 1.
Mode settings are set independently for each port.
48
SMPC Control Mode
Set DDR1 to "00H"
When using EXL1 "0",
disable EXL1 to "0".
Set IOSEL1 to "0"
Setting End
Figure 3.2 SMPC Control Mode Setting Example.
• Parallel I/O Register Default Value During Power On
During power-on, the parallel I/O register is set to the default values shown in
Table 3.1.
Table 3.1 Parallel I/O Register Default Values During Power-On
Register Name Setting Value Description
IOSEL1/2 0H SMPC control mode
EXL1/2 0H PAD interrupt
VDP2 external latch disable
DDR1/2 00H Input of all bits
SMPC Control Mode Use Method
When using the INTBACK command and acquiring peripheral data, the collected
peripheral data is output to the OREG as a result parameter. However, it is possible
that the collected peripheral data is larger than the OREG capacity. At this time, in
the SMPC control mode, peripheral data acquisition is stopped when the OREG
becomes full. When the OREG becomes full with peripheral data, the SMPC gener-
ates an SMPC interrupt and sends a request for peripheral data acquisition to the
SH-2.
Also, when there is still peripheral data that should be collected, it is displayed that
data still remains in the status register. After the SH-2 acquires the peripheral data, a
continue request is sent to the SMPC which causes the SMPC to begin acquiring
peripheral data again. When the remaining peripheral data is not needed, peripheral
data acquisition is ended by a break request.
The above sequence is illustrated in Figures 3.3 and 3.4.
SMPC User's Manual 49
Continue Request
A continue request from the SH-2 to the SMPC is done by reversing the IREG bit 7.
Break Request
A break request from the SH-2 to the SMPC is made by writing “1” in the IREG0’s
bit 6.
Precautions Regarding Continue and Break Requests
When requesting continue or break, be aware of the conditions given in Table 3.2.
Table 3.2 Continue and Break Issue Conditions
Issue to be requested
Continue Break Received Condition SMPC Operation
X X Hold Request Wait
X O Break Peripheral data collection is stopped and
INTBACK command is terminated.
O X Continue Peripheral data collection is continued.
O O Prohibited No guarantee
Termination Conditions for INTBACK Command that Acquires Peripheral Data
The INTBACK command that acquires peripheral data is terminated by the follow-
ing conditions.
1) When all peripheral data acquisition is completed.
2) When peripheral data collection could not be completed by V-BLANK-IN (time
over).
3) Peripheral data collection was terminated by a break request from the SH-2.
50
SH-2 SMPC
IREG Set
INTBACK Command Issued
Collect Peripheral Data
and Create OREG
Interrupt Generated
Data Remains
OREG Acquisition
CONTINUE Request
Create OREG
Interrupt Generated
Data Remains
••
•
OREG Acquisition
CONTINUE Request
Data Remains
Create OREG
Interrupt Generated
Data Remains
OREG Acquisition
CONTINUE Request
Create OREG
Interrupt Generated
No Data Remains
INTBACK Command Ends
Figure 3.3 All Peripheral Data Acquisition Sequence
SMPC User's Manual 51
SH-2 SMPC
IREG Set
INTBACK Command Issued
Collect Peripheral Data
and Create OREG
Interrupt Generated
Data Remains
OREG Acquisition
CONTINUE Request
Create OREG
Interrupt Generated
Data Remains
••
OREG Acquisition
CONTINUE Request
•
Data Remains
Create OREG
Interrupt Generated
Data Remains
OREG Acquisition
BREAK Request
INTBACK Command Ends
Figure 3.4 Peripheral Data Acquisition Cancel Sequence Due to Break Request
52
Methods for Using INTBACK Command in SMPC Control Mode
Section 2 explained how to acquire SMPC status using the INTBACK command. As
was explained in Section 2, the INTBACK command can be used in three ways.
1) To acquire only the SMPC status.
2) To acquire peripheral data after acquiring SMPC status.
3) To acquire only peripheral data.
This section continues on mainly explaining the peripheral control functions by
explaining (2) “to acquire peripheral data after acquiring SMPC status” and (3) “to
acquire only peripheral data.”
How to Acquire Peripheral Data After Acquiring SMPC Status
Here the procedure for acquiring peripheral data after acquiring the SMPC status is
explained. The procedure for acquiring SMPC status is explained in Section 2, so the
following only explains the procedure after status data acquisition. (Refer to Figures
3.3 and 3.4)
1) Continue request or break request (SH-2)
2) Peripheral data acquisition and result parameter setting (SMPC)
3) SMPC interrupt generation (SMPC)
4) Peripheral data acquisition (SH-2)
If peripheral data still remains, repeat processing from (1).
5) INTBACK command end
How to Acquire Only Peripheral Data
The procedure for using the INTBACK command to acquire only peripheral data is
explained below. (Refer to Figures 3.3 and 3.4)
1) Command parameter setting (SH-2).
2) INTBACK command issue (SH-2). Examples are given in Table 3.3.
3) Peripheral data collection and result parameter setting (SMPC).
4) SMPC interrupt generation (SMPC).
5) Peripheral data acquisition (SH-2)
When no peripheral data remains, the INTBACK command ends (SMPC).
6) Continue request or break request (SH-2)
7) When continue is requested the processing in (3) is repeated.
8) INTBACK command end.
SMPC User's Manual 53
Table 3.3 Example Acquisition Command Parameter Setting When Only Peripheral
Data Is Acquired
IREG Setting Value Description
IREG0 00H The data and time, cartridge code, area code, terminal
status, SMEM, and reset button mode data are not
returned.
IREG1 Application specifications Port 2 mode (P2MD1, P2MD0)=from application
(except PEN bit) specifications
Port 1 mode (P1MD1, P1MD0)=from application
specifications
Peripheral data enable (PEN)=1B return peripheral data
Acquisition time optimization (OPE)=from application
specifications
IREG2 F0H Set unconditionally in F0H.
54
Peripheral Data Collection Time Optimization
The application processing cycle for the SMPC was created as follows.
1) Peripheral data is prepared until V-BLANK-IN.
2) The sprite and control screen parameter in the peripheral are calculated and
output.
3) 3D calculation, etc.
4) Sprite and polygon drawing.
5) Display
The purpose of optimizing the peripheral data collection time is to collect the pe-
ripheral data as close to V-BLANK-IN as possible. In other words, the start of pe-
ripheral data collection is made as close as possible to V-BLANK-IN to shorten the
time from peripheral data collection to peripheral data acquisition by SH-2. Figure
3.5 shows an operation overview of peripheral data collection time optimization.
OREG Acquisition Peripheral
INTBACK Issued Peripheral Data Change Information is 1
V-BLANK
1
Response Is Slow
Peripheral Data Acquisition
Peripheral Data Is Changed
END Optimization
OREG Acquisition Peripheral
INTBACK Issued Peripheral Data Change Information is 2
V-BLANK
1 ms
2
Collection Start Peripheral Data
Timing is Offset Collection
END
Figure 3.5 Overview of Peripheral Data Collection Time Optimization
SMPC User's Manual 55
Operations when Peripheral Data Collection Time Is Not Optimized
Issue the INTBACK command after 300 µs prior to V-BLANK-IN and before V-
BLANK-OUT. This makes it possible to accurately start peripheral data collection at
V-BLANK-OUT. Peripheral data collection starts when the SMPC detects V-BLANK-
OUT. The INTBACK command terminates at the time peripheral data collection is
finished.
Precautions when Peripheral Data Collection Time Is Not Optimized
The peripheral data collection end timing varies depending on the type and number
of peripherals that are connected. For example, for a SATURN standard PAD 2 unit
configuration, all the peripheral data is put in the OREG much faster than V-
BLANK-IN.
If an SMPC interrupt is used in this case, peripheral data can be acquired faster than
with V-BLANK-IN. Also, as above, when less than 32 OREG are used, peripheral
data can be acquired using V-BLANK-IN timing without using an SMPC interrupt.
Operations for Optimizing Peripheral Data Collection Time
Issue the INTBACK command after 300 µs after V-BLANK-IN and before V-BLANK-
OUT. This makes it possible to accurately start peripheral data collection at V-
BLANK-OUT.
When optimizing peripheral data collection time, the SMPC first collects peripheral
data without optimization and measures the collection time. The peripheral data
collection start timing is the timing when the SMPC detects V-BLANK-OUT, as in
the case when peripheral data collection time is not optimized.
From the next frame, a 1 msec margin is added to the measured time, and this time
is used as the peripheral data collecting time. The peripheral data is collected using
this timing. Refer to Figure 3.5 for more.
After that, the peripheral data collection time is constantly monitored and the data
collection time is optimized. Also, if a time-over occurs after optimization, the next
time optimization is be performed, V-BLANK-OUT will be used as the start timing.
56
Precautions when Optimizing Peripheral Data Collection Time
The peripheral data collection timing varies depending on the type and number of
peripherals that are connected. When performing peripheral data collection time
optimization, verify the types, number, and configuration of connected peripherals
and make a sufficient evaluation to prevent time-over from occurring.
In addition, when using continue as well, the continue request wait-time is mea-
sured as part of the peripheral data collection time. Therefore, make the time from
SMPC interrupt generation to continue request as short as possible, and be sure to
execute them at a set time.
SMPC User's Manual 57
INTBACK Command’s Command Parameters During Peripheral Data Acquisition
Following is an explanation of command parameters when peripheral data is acquired
using the INTBACK command.
IREG0
There are two IREG0 settings: when the INTBACK command is issued and when con-
tinue or break is requested.
• When INTBACK Command Is Issued
The IREG0 uses the SMPC status acquisition switch.
bit7 bit0
IREG0 20100001H Status Acquisition Switch (00H or 01H)
Initial Value: Not Specified Write Only
IREG0: SMPC Status Acquisition Switch Setting Value
IREG0 Setting
Value Explanation
All data for date and time, cartridge code, area code, terminal
00H status, SMEM, and reset button mode are not returned.
All data for date and time, cartridge code, area code, terminal
01H
status, SMEM, and reset button mode are returned.
Figure 3.6 IREG0 (During INTBACK Command Issue)
• During Continue and Break Request
The IREG0 uses the continue and break requests sent to the SMPC.
When the SMPC receives a continue request, it begins collecting the remaining
peripheral data. When it receives a break request, it stops collecting peripheral data
and terminates the INTBACK command.
bit7 bit0
IREG0 CONT BR --- --- --- --- --- ---
CONT: CONTINUE Request Bit
CONTINUE is requested by changing the value of this bit.
BR: BREAK Request Bit
A BREAK request is made by changing this bit to "1."
---: Possible for both 0 H and 1H .
Figure 3.7 IREG0 (During Continue and Break Requests)
Note: When the CONT.BR request value that has reached maximum is also written in IREG0, it
cannot be guaranteed which operation the SMPC will execute. Refer to Table 3.2.
58
IREG1
The IREG1 uses the peripheral data collection mode.
bit7 bit4 bit3 bit0
IREG1 20100003H P2MD1 P2MD0 P1MD1 P1MD0 PEN 0 OPE 0
Unde. Unde. Unde. Unde. Unde. Unde. Unde. Unde.
W W W W W --- W ---
Bit7, 6: Port 2 Mode
Bit7 Bit 6
Explanation
P2MD1 P2MD0
0 0 15-Byte Mode
0 1 255-Byte Mode
1 0 SEGA RESERVED (Setting Restricted)
1 1 0-Byte Mode
Bit5, 4: Port 1 Mode
Bit7 Bit 6
Explanation
P1MD1 P1MD0
0 0 15-Byte Mode
0 1 255-Byte Mode
1 0 SEGA RESERVED (Setting Restricted)
1 1 0-Byte Mode
Bit3: Peripheral Data Enable
Bit3
Explanation
PEN
0 Peripheral Data Not Returned
1 Peripheral Data Returned
Bit1: Acquisition Time Optimization
Bit1
Explanation
OPE
0 Peripheral Data Acquisition Time Optimized
1 Peripheral Data Acquisition Time not Optimized
Figure 3.8 IREG1
Note: When both the SH-2 direct mode and SMPC control mode are both used (example:
port 1=SH-2 direct mode, port 2=SMPC control mode), use the 0 byte mode in the
port used by SH-2 direct mode when the INTBACK command is issued.
SMPC User's Manual 59
IREG2
bit7 bit0
IREG2 20100005H F0 H
Initial Value: Not Specified Write Only
When issuing the INTBACK command, be sure to set F0H in IREG2.
Figure 3.9 IREG2
60
INTBACK Command Result Parameter During Peripheral Data Acquisition
Following is an explanation of the result parameter when peripheral data is acquired
using the INTBACK command.
Basic Configuration of Result Parameter Acquired Using INTBACK Command
When the INTBACK command is executed, the result parameter shown in Figure
3.10 is configured in the status register and OREG.
The peripheral control status shows the statuses used during peripheral control
mode. Port 1 status and port 2 status show their respective port peripheral connec-
tion states. The connected peripheral’s ID and peripheral data are output in the port
1 data and port 2 data. When the peripheral is directly connected to the peripheral
port, the peripheral data for one unit is output. When a multitap is connected, the
peripheral data for several taps is output.
SMPC User's Manual 61
= 1 PDL NPE RESB P2MD1 P2MD0 P1MD1 P1MD0
Peripheral Control
SR Status
Port 1 Status Num. of
= Multitap ID Connectors
Peripheral 1 Data
Port 1 Data Peripheral 2 Data SATURN Peripheral ID = SATURN
Peripheral Data Size
. Extension Data Size Type
. Peripheral 1 1st Data
OREG . Peripheral 1 2nd Data
. .
Port 2 Data Peripheral m Data .
.
Peripheral 1 nth Data
Port 1 data and 0<m<15 The maximum nth is 255.
Port 2 data have
the same structure
Figure 3.10 Result Parameter Standard Configuration Acquired Using INTBACK Command
62
Result Parameter Configuration During 0 Byte Mode
When one of the ports is set to 0 byte mode, the port data set in 0 byte mode is
removed to make a smaller configuration. Figure 3.11 shows the data configuration
during 0 byte mode.
When Port 1 Mode and Port 2 Mode Are Other
Than 0-Byte Mode
Peripheral Control Port 1 Mode Is Peripheral Control
SR Status 0-Byte Mode Status
Port 2 Data
Port 1 Data
Becomes configuration
OREG where Port 1 Data portion
is packed.
Port 2 Data Port 2 Mode Is
0-Byte Mode Peripheral Control
Status
Port 1 Data
Becomes configuration
where Port 2 Data portion
is removed.
Figure 3.11 Result Parameter Configuration when One Port is 0 Byte Mode
As shown above, the result parameter varies depending on the command parameter
setting conditions. Table 3.4 shows the relation between the command parameter
setting conditions and the created result parameter configuration.
SMPC User's Manual 63
Table 3.4 Command Parameter Setting Conditions and Peripheral Data Configuration
Command Parameter Setting Conditions Result Parameter Configuration
Returns Returns Has Port 1 Has Port 2 SMPC Port 1 Data Port 2 Data
SMPC Status Peripheral Data Control Control Status
X X X X X X X
X X X O X X X
X X O X X X X
X X O O X X X
X O X X X X X
X O X O X X O
X O O X X O X
X O O O X O O
O X X X O X X
O X X O O X X
O X O X O X X
O X O O O X X
O O X X O X X
O O X O O X O
O O O X O O X
O O O O O O O
Use Prohibited
64
Peripheral Data Configuration
The peripheral data configuration is shown in Figure 3.12. Peripheral data consists
of the SATURN peripheral ID and peripheral data. The peripheral data body with-
out the SATURN peripheral ID has a maximum of 255 bytes.
SATURN Peripheral ID SATURN Peripheral ID Configuration
Extension Data Size bit7 bit4 bit3 bit0
SATURN
Data Size
Peripheral 1 1st Data Peripheral Type
Peripheral 1 2nd Data
OREG
.
.
. The extension data size is added for peripherals
. with data sizes of 16 bytes or more. Also, the
maximum size for nth is 255.
Peripheral 1 nth Data
Figure 3.12 Peripheral Data Configuration
SMPC User's Manual 65
Result Parameter Details
Peripheral Control Status
The SMPC outputs the peripheral control status to the status register (SR) when the
SMPC control mode is used. The status register (SR) is a register that can be read
without regard for the INTBACK command. However, when the register is read
when the INTBACK command is not in use, all bits except the RESB bit will be
undefined.
bit7 bit0
SR 1 PDL NPE RESB P2MD1 P2MD0 P1MD1 P1MD0
P1MD: Port 1 Mode
00: 15-byte mode (Returns peripheral data up to a maximum of 15 bytes.)
01: 255-byte mode (Returns peripheral data up to a maximum of 255 bytes.)
10: Unused
11: 0-byte mode (Port is not accessed.)
P2MD: Port 2 Mode
00: 15-byte mode (Returns peripheral data up to a maximum of 15 bytes.)
01: 255-byte mode (Returns peripheral data up to a maximum of 255 bytes.)
10: Unused
11: 0-byte mode (Port is not accessed.)
RESB: Reset Button Status Bit
0: Reset Button OFF
1: Reset Button ON
Reading without regard for INTBACK command is possible. (Shows
status for each V-BLANK-IN.)
NPE: Remaining Peripheral Existence Bit
0: No remaining data
1: Remaining data
PDL: Peripheral Data Location Bit
0: 2nd or above peripheral data
1: 1st peripheral data
bit7: Always 1
Figure 3.13 Peripheral Control Status
66
Port Status
The port status is 1-byte data that shows the state of the peripheral connected to the
port. Using the port status makes it possible to determine if the peripheral is directly
connected to the corresponding port or if a multitap is connected. Figure 3.14 shows
the port status configuration.
bit7 bit4 bit3 bit0
Multitap ID Number of Connectors
Figure 3.14 Port Status Configuration
• Number of Connectors
If the peripheral is directly connected to the peripheral port, 1H is shown; only one
peripheral can be connected to the port. If a multitap is connected, the number of
taps in the multitap is shown. When nothing is connected to the peripheral port,
or when a peripheral that the SMPC does not recognize is connected to the port,
0H is shown.
Table 3.5 shows the relation between the number of connectors and the connected
peripheral.
Table 3.5 Relation Between the Number of Connections and Peripherals
Number of Connectors Connected Peripheral
0H • Not connected
• SMPC UNKNOWN peripheral is connected
1H • Peripheral is directly connected
2H ~FH • Number of taps in the multitap
SMPC User's Manual 67
• Multitap ID
The multitap ID is classified as follows depending on the peripheral connected.
1) When a peripheral is directly connected to the peripheral port, or none is
connected at all, the multitap ID is shown as FH.
2) When a multitap is connected to the peripheral port, 0H~EH is shown.
3) When a device not recognized by the SMPC (UNKNOWN device) is connected
to the peripheral port, the Mega Drive peripheral ID (hereafter MD PID) is
shown.
The connection of a SMPC UNKNOWN device is determined during the initial
phase between the SMPC and the peripheral by the transmission of a MD PID that
the SMPC does not support. When a justifier (Lethal Enforcers), etc., is used, con-
nection determination is performed by the SMPC control mode, and can be
handled by using the SH-2 direct mode after port status acquisition. In addition, if
an error occurs in the circuit between the SMPC and the peripheral during initial
phase, the peripheral is also determined to be UNKNOWN.
Table 3.6 Relation Between Connected Peripherals and Multitap ID
Peripheral Connected to the Data Shown in Multitap ID
Peripheral Port
Peripheral is directly connected or FH
not connected
Multitap is connected 0H ~EH
UNKNOWN device is connected. MD-PID
The multitap ID is collected separately from the SATURN peripheral ID. The
multitap ID is supplied by the multitap specifications. The multitap IDs and
number of connectors currently supported are shown in Table 3.7.
Table 3.7 Multitap ID and Number of Connectors
Multitap Name Multitap ID Number of Connectors
SEGA Tap 0H 4H
SATURN 6P Multitap 1H 6H
68
SATURN Peripheral ID
SATURN Peripheral ID Configuration
The SATURN peripheral ID is configured from the peripheral type and data size.
The peripheral data configuration and contents can be recognized from the SATURN
peripheral ID. The SATURN peripheral ID is shown in Figure 3.15.
bit7 bit4 bit3 bit0
SATURN Peripheral Type Data Size
Figure 3.15 SATURN Peripheral ID Configuration
• SATURN Peripheral Type
The SATURN peripheral type shows the type of peripheral. Therefore, it is used to
recognize how the peripheral data is aligned. Currently, four peripheral types are
defined for SATURN and are presented as the standard format. For details, please
refer to the item covering “SATURN Peripheral Standard Format.”
• Data Size
The data size shows how many bytes after the SATURN peripheral ID are being
output. Therefore, using the data size makes it possible to recognize from how
many bytes the peripheral data table is configured. It also makes it possible to
recognize where the start of the next peripheral data table is.
SMPC User's Manual 69
SATURN Peripheral ID Details
• When a Peripheral Is Directly Connected to the Peripheral Port
SATURN peripherals can define a data size up to a maximum of 255 bytes.
There are two types of SATURN peripherals; those of 15 bytes or less and those of
16 bytes or more up to 255 bytes. There are also two port modes; 15-byte mode
and 255-byte mode. Therefore, as shown in Table 3.8, there are four combinations
that can be made from the peripheral data size and port mode. The SATURN
peripheral ID and peripheral data configuration are shown from Figure 3.16 to
Figure 3.18.
Table 3.8 Combinations of Peripheral Data Size and Port Mode (Peripheral Is
Connected Directly to Peripheral Port)
Port Mode (IREG1 Setting)
15 255
15 Peripheral Data Configuration 1
Peripheral Data Size
(Byte) 16- Peripheral Data Peripheral Data
255 Configuration 2 Configuration 3
bit7 bit4 bit3 bit0
SATURN Peripheral ID OH~E H 1H~F H
SATURN Peripheral Type Data Size
bit7 bit0
Peripheral Data 1st
Peripheral Data 2nd
Peripheral Data Table .
.
.
Peripheral Data nth
nth shows the data size. The maximum size is 15 bytes.
Figure 3.16 Peripheral Data Configuration 1
70
bit7 bit4 bit3 bit0
SATURN Peripheral ID OH~E H 0H
SATURN Peripheral Type Data Size
Extension Data Size OH FH
Peripheral Data 1st
Peripheral Data 2nd
Peripheral Data Table .
.
.
Peripheral Data 15th
Extension data size is limited to 15 bytes.
When accessed using 255-byte mode and the extension data
size is a combination of 0FH, permission will not be given by the
peripheral development side.
Figure 3.17 Peripheral Data Configuration 2
bit7 bit4 bit3 bit0
SATURN Peripheral ID OH ~EH 0H
SATURN Peripheral Type Data Size
Extension Data Size 1O H ~FFH
Peripheral Data 1st
Peripheral Data 2nd
Peripheral Data Table .
.
.
Peripheral Data nth
nth shows the data size. The maximum size is 255 bytes.
Figure 3.18 Peripheral Data Configuration 3
SMPC User's Manual 71
• When a Multitap Is Connected to the Peripheral Port
When the multitap is connected, the port mode shows the maximum data size
that can be collected from the peripherals connected to each tap. (This is not the
total number of data that can be collected from the entire multitap.)
If the connected peripheral is 15 bytes or less, the peripheral data configuration 1
will be used whether the port mode is 15 bytes or 255 bytes. If the connected
peripheral is 16 bytes or more and the port mode is the 15-byte mode, only up to
15 bytes of data can be collected as for peripheral data configuration 2. If the
connected peripheral is 16 bytes or more and the port mode is the 255-byte mode,
all the peripheral data can be collected as in peripheral data configuration 3.
Also, if the specifications for the multitap itself are limited to 15 bytes or less, all
data of 16 bytes and beyond is cut off. With a multitap, it is possible to mix the
connection of peripherals of 15 bytes or less and 16 bytes or more. However, when
an INTBACK command is issued, the port mode can only be set to either 15-byte
or 255-byte mode.
Here, the specifications of the multitap define the maximum data size that can be
collected for each tap. When a multitap is used, the port mode setting is set to
follow the tap’s maximum data size. In other words, if the multitap’s specification
is a maximum of 15 bytes, the port mode should be set to 15-byte mode, and if the
multitap’s maximum specification is 255 bytes, the port mode should be set to
255-byte mode.
The SATURN 6P multitap is a maximum of 15 bytes per tap. Use the 15-byte
mode for the port mode. Table 3.9 shows combinations of the multitap data size
and the port mode. The peripheral data configurations 1~3 in Table 3.9 are the
same as those shown in Figures 3.16~3.18.
The connection state of all taps when using a multitap is shown by each tap’s
SATURN peripheral ID. When no peripheral is connected to the tap, or when the
connected device is UNKNOWN, the SATURN peripheral ID is output as shown
in Figures 3.19 and 3.20.
72
Table 3.9 Combinations of Peripheral Data Size and Port Mode (Multitap)
Port Mode (IREG1 Setting)
15 255
15 Peripheral Data Configuration 1
Peripheral Data Peripheral Data
16-255
Peripheral Data Configuration 2 Configuration 3
Size (Byte) Not
Connected Tap Peripheral Not Connected
UNKNOWN Tap Peripheral UNKNOWN
bit7 bit0
SATURN Peripheral ID FFH
Figure 3.19 SATURN Peripheral ID when Tap Unconnected
bit7 bit4 bit3 bit0
SATURN Peripheral ID FH 0~EH
SATURN Peripheral Type Data Size
The Mega Drive peripheral ID is output to the data size.
It can be handled the same as the previously mentioned SMPC
UNKNOWN.
Figure 3.20 SATURN Peripheral ID when Tap Unknown
SMPC User's Manual 73
SH-2 Direct Mode
Block Diagram
Figure 3.21 shows the block diagram for the SH-2 direct mode. The SH-2 can directly
access peripherals via the two I/O port data registers (PDR1, PDR2) in the SMPC.
SH-2 SMPC
PDR1
Data Bus 8 7
PDR2
7
Figure 3.21 SH-2 Direct Mode Block Diagram
Characteristics
This mode becomes an effective means during the following procedures:
1) When controlling peripherals that require high-speed access that is faster than
the access speed possible in the SMPC control mode.
2) When data output from the peripherals is required.
3) When access to peripherals that need an external latch is required.
4) When access is required to a peripheral that is not supported by the SMPC.
74
Settings for Using the SH-2 Direct Mode
Figure 3.22 shows an example of a setting for using the SH-2 direct mode and shows
an example of a setting to port 1. Mode settings can be done independently for each
port.
SH-2 Direct Mode
Set PDR1
Set DDR1
Set IOSEL1 to "1"
NO
External Latch Required
YES
Set EXLE1 to "1"
Setting End
Figure 3.22 SH-2 Direct Mode Setting Example
When both the SH-2 direct mode and the SMPC control mode are used (example:
port 1=SH-2 direct mode, port 2=SMPC control mode), use the 0 byte mode for the
port used by the SH-2 direct mode at an INTBACK command issue.
SMPC User's Manual 75
3.2 SATURN Peripheral Standard Formats
Purpose of SATURN Peripheral Standard Formats
The SATURN peripheral standard format was prepared for the following purposes.
1) To be able to control multiplay even though the peripheral data configurations,
types, and meanings are different.
2) To be able to perform multiplay and to use any upward compatible peripherals,
such as increase buttons, increased number of analog channels, and added exten-
sion data, that may be sold in the future; as well as controlling previously sold
applications.
SATURN Standard Format Types and Data Formats
There are currently four SATURN standard formats that were created for the above
stated purposes. An explanation of these is given below.
• SATURN Digital Device
This is a device that is only configured with buttons and is represented by the
SATURN standard PAD. The basic peripheral type is 0H and the data size is 2
bytes. The format characteristic is that the 1st Data is configured with the same
value as the Mega Drive 3 button.
Compatibility is preserved by adding the 1st Data to the application, which makes
it possible to control the application. Table 3.10 shows the SATURN digital device
format.
Table 3.10 SATURN Digital Device Standard Format
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
SATURN Peripheral ID 0 0 0 0 Data Size
1st Data Right Left Down Up Start A TRG C TRG B TRG
2nd Data R TRG X TRG Y TRG Z TRG L TRG Extension Data
3rd Data Extension Data
: Extension Data
: Extension Data
nth Data Extension Data
Right, Left, Down, Up, Start, A TRG, C TRG, B TRG, R TRG, X TRG, Y TRG, Z TRG, and L TRG
become 0 when the button is pushed down.
76
• SATURN Analog Device
These devices, such as the analog joystick, analog steering wheel, and tablet,
contain an A/D converter. The basic peripheral type is 1H and the data size is
5 bytes. The format characteristic is that the 1st Data is configured with the same
value as the Mega Drive 3-button PAD.
Compatibility is preserved by adding the 1st Data to the application, which makes
it possible to control the application. Table 3.11 shows the SATURN analog device
standard format.
Table 3.11 SATURN Analog Device Standard Format
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
SATURN Peripheral ID 0 0 0 1 Data Size
1st Data Right Left Down Up Start A TRG C TRG B TRG
2nd Data R TRG X TRG Y TRG Z TRG L TRG Extension Data
3rd Data AX7 AX6 AX5 AX4 AX3 AX2 AX1 AX0
4th Data AY7 AY6 AY5 AY4 AY3 AY2 AY1 AY0-
5th Data AZ7 AZ6 AZ5 AZ4 AZ3 AZ2 AZ1 AZ0
6th Data Extension Data
: Extension Data
: Extension Data
nth Data Extension Data
Right, Left, Down, Up, Start, A TRG, C TRG, B TRG, R TRG, X TRG, Y TRG, Z TRG, and L TRG
become 0 when the button is pushed down.
AX7~AX0, AY7~AY0, and AZ7~AZ0 are the absolute values of the unsigned A/D converter
output.
For AX7~AX0 and AY7~AY0, the upper left is (0,0) and the bottom right is (255,255).
For AZ7~AZ0, the bottom is 0 and the top is 255.
• Pointing Device
This device outputs rotary encoder movement quantities, such as those from a
mouse or trackball. The peripheral type is 2H and the basic data size is 3 bytes.
The format characteristic is that unlike the data tables for digital devices, analog
devices, and keyboard devices. The data table for pointing devices does not have
data with the same value as the Mega Drive 3-button PAD.
In addition, the X and Y data movement is output as the amount of movement of
the rotary encoder (∆ delta), so if all three of the defined bytes are not supported,
compatibility cannot be maintained. Table 3.12 shows the SATURN pointing
device standard format.
SMPC User's Manual 77
Table 3.12 SATURN Pointing Device Standard Format
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
SATURN Peripheral ID 0 0 1 0 Data Size
1st Data Y Over X Over Y Sign X Sign Start Middle Right Left
2nd Data XD7 XD6 XD5 XD4 XD3 XD2 XD1 XD0-
3rd Data YD7 YD6 YD5 YD4 YD3 YD2 YD1 YD0
4th Data Extension Data
: Extension Data
: Extension Data
nth Data Extension Data
Y Over, X Over 0: X or Y data is valid.
1: Data is over flowing. (255 exceeded)
Y Sign, X Sign 0: X and Y data have positive values.
1: X and Y data have negative values.
XD7~XD0, YD7~YD0 Absolute value of amount of mouse movement.
Start, Middle, Right, Left Becomes 1 when button is pushed.
• Keyboard Device
Devices used for personal computers, represented by full keyboards. The periph-
eral type is 3H and the data size is 4 bytes. The format characteristic is that the 1st
Data is configured with the same value as for the Mega Drive 3-button PAD.
Compatibility is maintained by combining the 1st Data with the application to
control the application. Table 3.13 shows the SATURN keyboard device standard
format.
78
Table 3.13 SATURN Keyboard Device Standard Format
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
SATURN Peripheral ID 0 0 1 1 Data Size
1st Data Right Left Down Up Start A TRG C TRG B TRG
2nd Data R TRG X TRG Y TRG Z TRG L TRG Extension Data
3rd Data Caps Num Scroll Break
0 Make 1 1
Lock Lock Lock
4th Data D7 D6 D5 D4 D3 D2 D1 D0
5th Data Extension Data
: Extension Data
: Extension Data
nth Data Extension Data
Right, Left, Down, Up, Start, A TRG, C TRG, B TRG, R TRG, X TRG, Y TRG, Z TRG, and L TRG
become 0 when the button is pushed down. The corresponding values for each button and
keyboard key are given below.
Button Key
Right →
Left ←
Down ↓
Up ↑
Start ESC
A TRG Z
C TRG C
B TRG X
R TRG Q
X TRG A
Y TRG S
Z TRG D
L TRG E
For Caps Lock 1: Caps Lock is locked (Caps Lock LED is lit.)
For Num Lock 1: Num Lock is locked (Num Lock LED is lit.)
For Scroll Lock 1: Scroll Lock is locked (Scroll Lock LED is lit.)
For Make 1 is shown when there is a valid Make code (a key that shows
D7~D0 code is pushed down) in D7~D0.
For Break 1 is shown when there is a valid Break code (a key that shows
D7~D0 code is pushed down) in D7~D0.
D7~D0 show the key No. They are used with both Make and Break.
SMPC User's Manual 79
Future Expansion of Standard Formats
At the present time, four types of formats have been prepared. More will be pre-
pared in the future when required.
Precautions when Using Standard Formats
Because the system conforms to standard formats, when the data is larger than the
standard format size the extra data is deleted. Further, when the data size is smaller
than the standard format, other data will be added to make up the insufficiency. In
addition, As an example of how handling is done on the peripheral end, there is
analog X-Y control as for the analog joystick. When there is no appropriate digital
input, a value that is higher than that of the analog X-Y data is used on the periph-
eral end to make it possible to turn on and off the U, D, L, and R bits.
80
3.3 Support Peripheral Data Format in SMPC Control Mode
This section describes the SMPC support peripheral data format in the SMPC control
mode. For detailed data on each peripheral, refer to the manual for each peripheral.
Mega Drive 3-Button PAD
Table 3.14 shows the Mega Drive 3-button PAD data format for SMPC control mode.
Table 3.14 Mega Drive 3-Button PAD Data Format in SMPC Control Mode
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
SATURN Peripheral ID 1 1 1 0 0 0 0 1
1st Data Right Left Down Up Start A TRG C TRG B TRG
Right, Left, Down, Up, Start, A TRG, C TRG, and B TRG become 0 when the button is pushed.
Mega Drive 6-Button PAD
Table 3.15 shows the Mega Drive 6-button PAD data format for SMPC control mode.
Table 3.15 Mega Drive 6-Button PAD Data Format in SMPC Control Mode
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
SATURN Peripheral ID 1 1 1 0 0 0 1 0
1st Data Right Left Down Up Start A TRG C TRG B TRG
2nd Data MODE X TRG Y TRG Z TRG 1 1 1 1
Right, Left, Down, Up, Start, A TRG, C TRG, B TRG, MODE, X TRG, Y TRG, and Z TRG become 0
when the button is pushed.
SATURN Mouse (Provisional Name)
Table 3.16 shows the SATURN mouse data format for SMPC control mode.
SMPC User's Manual 81
Table 3.16 SATURN Mouse Data Format in SMPC Control Mode
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
SATURN Peripheral ID 1 1 1 0 0 0 1 1
1st Data Y Over X Over Y Sign X Sign Start Middle Right Left
2nd Data XD7 XD6 XD5 XD4 XD3 XD2 XD1 XD0
3rd Data YD7 YD6 YD5 YD4 YD3 YD2 YD1 YD0
Y Over, X Over 0: X or Y data is valid.
1: Data is over-flowing. (255 exceeded)
Y Sign, X Sign 0: X and Y data have positive values.
1: X and Y data have negative values.
XD7~XD0, YD7~YD0 Absolute value of amount of mouse movement.
Start, Middle, Right, Left Becomes 1 when button is pushed.
SEGA Tap
In the SMPC control mode, the port status shown in Table 3.17 is output. The SEGA
Tap is connected to the Mega Drive 3-button PAD, Mega Drive 6-button PAD, and
SEGA mouse. For information regarding peripheral data, refer to each peripheral
data format.
Table 3.17 SEGA Tap Port Status in SMPC Control Mode
Multitap ID No. of Connectors
OH 4H
SATURN Standard PAD (Provisional Name)
Table 3.18 shows the SATURN standard PAD data format for SMPC control mode.
Table 3.18 SATURN Standard PAD Data Format in SMPC Control Mode
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
SATURN Peripheral ID 0 0 0 0 0 0 1 0
1st Data Right Left Down Up Start A TRG C TRG B TRG
2nd Data R TRG X TRG Y TRG Z TRG L TRG 1 1 1
Right, Left, Down, Up, Start, A TRG, C TRG, B TRG, R TRG, X TRG, Y TRG, Z TRG and L TRG
become 0 when the button is pushed.
82
SATURN Analog Joystick (Provisional Name)
Table 3.19 shows the SATURN analog joystick data format for SMPC control mode.
The data AX7~AX0, AY7~AY0, and AZ7~AZ0 are the absolute values output by the
A/D converter.
Table 3.19 SATURN Analog Joystick Data Format in SMPC Control Mode
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
SATURN Peripheral ID 0 0 0 1 0 1 0 1
1st Data Right Left Down Up Start A TRG C TRG B TRG
2nd Data R TRG X TRG Y TRG Z TRG L TRG 1 1 1
3rd Data AX7 AX6 AX5 AX4 AX3 AX2 AX1 AX0
4th Data AY7 AY6 AY5 AY4 AY3 AY2 AY1 AY0
5th Data AZ7 AZ6 AZ5 AZ4 AZ3 AZ2 AZ1 AZ0
Right, Left, Down, Up, Start, A TRG, C TRG, B TRG, R TRG, X TRG, Y TRG, Z TRG, and L TRG
become 0 when the button is pushed down.
AX7~AX0, AY7~AY0, and AZ7~AZ0 are the absolute values of the unsigned A/D converter
output.
For AX7~AX0 and AY7~AY0, the upper left is (0,0) and the bottom right is (255,255).
For AZ7~AZ0, the bottom is 0 and the top is 255.
SATURN Keyboard (Provisional Name)
Table 3.20 shows the SATURN keyboard data format for SMPC control mode.
Table 3.20 SATURN Keyboard Data Format in SMPC Control Mode
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
SATURN Peripheral ID 0 0 1 1 0 1 0 0
1st Data Right Left Down Up Start A TRG C TRG B TRG
2nd Data KB KB KB
R TRG X TRG Y TRG Z TRG L TRG
TYPE2 TYPE1 TYPE0
3rd Data Caps Num Scroll
0 Lock Lock Lock Make 1 1 Break
4th Data D7 D6 D5 D4 D3 D2 D1 D0
Right, Left, Down, Up, Start, A TRG, C TRG, B TRG, R TRG, X TRG, Y TRG, Z TRG, and L TRG
become 0 when the button is pushed down.
SMPC User's Manual 83
The corresponding values for each button and keyboard key are given below.
Button Key
Right →
Left ←
Down ↓
Up ↑
Start ESC
A TRG Z
C TRG C
B TRG X
R TRG Q
X TRG A
Y TRG S
Z TRG D
L TRG E
KBTYPE2~0 000: SATURN Keyboard
001~110: SEGA RESERVED
111: UNKNOWN
The KBTYPE shown here is used for the IBM keyboard conversion adapter format.
When IBM keyboards 101, 102, and 106 are connected to the conversion adapter, 000
is displayed. When a keyboard not supported by the conversion adapter, or when a
device not recognized as a keyboard is connected to the conversion adapter, 111 is
output. In the future, with the integration accompanying the commercialization of
the keyboard, the system will be configured to output 000.
For Caps Lock 1: Caps Lock is locked (Caps Lock LED is lit.)
For Num Lock 1: Num Lock is locked (Num Lock LED is lit.)
For Scroll Lock 1: Scroll Lock is locked (Scroll Lock LED is lit.)
For Make 1 is shown when there is a valid Make code (a key that shows
D7~D0 code is pushed down) in D7~D0.
For Break 1 is shown when there is a valid Break code (a key that shows
D7~D0 code is pushed down) in D7~D0.
D7~D0 Shows the key No. They are used with both Make and Break.
84
SATURN 6P Multitap (Provisional Name)
In the SMPC control mode, the port status shown in Table 3.21 is output. The SAT-
URN 6P multitap is connected to the Mega Drive 3-button PAD, Mega Drive 6-
button PAD, SATURN standard PAD (provisional name), SATURN analog joystick
(provisional name), SATURN mouse (provisional name), and SATURN standard
keyboard (provisional name). For information regarding peripheral data, refer to
each peripheral data format.
For the SATURN 6P multitap, the maximum data size for each tap is 15 bytes. Use
the 15-byte port mode.
Table 3.21 SATURN 6P Multitap Port Status
Multitap ID No. of Connectors
1H 6H
SMPC User's Manual 85
3.4 Support Peripheral Data Format in SH-2 Direct Mode
This section explains about peripheral access protocols and data formats in the SH-2
direct mode.
About Peripheral Port Bit Names
The SMPC peripheral ports were configured to succeed Mega Drive peripheral ports
to maintain compatibility. The naming method for port bit names was also kept.
Table 3.22 shows the relationship between the port bit number and port bit name.
Hereafter, this manual will give explanations using port bit names.
Table 3.22 Relationship Between Port Bit Number and Port Bit Name
Port Bit Number bit6 bit5 bit4 bit3 bit2 bit1 bit0
Port Bit Name TH TR TL R L D U
Mega Drive Peripheral ID Computing Method in SH-2 Direct Mode
The Mega Drive peripheral ID calculation formula is given below, and is shown by
the four bits ID3, ID2, ID1, and ID0.
ID3=R # L (TH=1)
ID2=D # U (TH=1)
ID1=R # L (TH=0)
ID0=D # U (TH=0)
# signifies the logical sum OR.
86
Port Setting During Mega Drive Peripheral ID Acquisition
The port direction register setting values during Mega Drive peripheral ID acquisi-
tion are shown in Table 3.23. When the port direction is set as shown below, Read is
performed when TH=1 for RLDU and TH=0 for RLDU, and the Mega Drive periph-
eral ID can be output using the above explained formula.
After TH is changed, read the R, L, D, and U after 2 µS.
Table 2.23 Port Direction Register Setting Value During Mega Drive Peripheral ID
Acquisition
Port Bit Name TH TR TL R L D U
Port Direction Set to Output Set to Input
Peripheral Interface Protocol
There are three types of peripheral interface protocols. Following is given an over-
view of each peripheral protocol and the peripherals they support.
TH Control Method
The TH control method interface protocol is a method that acquires data when TH=1
for TR, TL, R, L, D, and U and when TH=0 for TR, TL, R, L, D, and U. The peripher-
als that support this protocol are the Mega Drive 3-button PAD and Mega Drive 6-
button PAD.
TH and TR Control Method
The TH and TR control method interface protocol is a method that acquires data
when the 4-bit pattern for TH and TR is R, L, D, and U. The peripheral that supports
this protocol is the Saturn Standard PAD.
3-Line Handshake Method
The 3-line handshake method SEL (select) the peripheral when TH=0, transfers REQ
(request) from TR, and then returns an ACK (acknowledgment) to TL when the R, L,
D, and U data has been verified. The 3-line handshake method is a method that
acquires data after confirming the status using the above three control signals. The
peripherals that support this protocol are the SEGA tap, SEGA mouse, SATURN
analog joystick, SATURN keyboard, and SATURN 6P multitap.
Mega Drive Peripheral ID for Each Port
The Mega Drive peripheral ID for each peripheral is given in Table 3.24.
SMPC User's Manual 87
Table 3.24 Mega Drive Peripheral ID for Each Peripheral
Peripheral Name Mega Drive Peripheral ID
Mega Drive 3-Button PAD DH
Mega Drive 6-Button PAD DH &CH
SEGA Mouse 3H
SEGA Tap 7H
SATURN Standard PAD BH
SATURN Analog Joystick 5H
SATURN Keyboard 5H
SATURN Multitap 5H
Access Sequence in SH-2 Direct Mode for Peripherals that Have a
Mega Drive ID Other Than 5H
The access sequence in SH-2 direct mode to peripherals that have Mega Drive pe-
ripheral ID’s other than 5H is given below.
1) Acquire the Mega Drive peripheral ID.
2) Determine the type of peripheral from the Mega Drive peripheral ID. Execute the
appropriate sequence for the peripheral and acquire the data. The SATURN
peripheral ID is not returned for peripherals that have Mega Drive peripherals
other than 5H.
88
Access Sequence in SH-2 Direct Mode for Peripherals that Have a 5H
Mega Drive ID
The access sequence in SH-2 direct mode to peripherals that have a 5H Mega Drive
peripheral ID’s.
1) Acquire the Mega Drive peripheral ID.
2) Execute the appropriate protocol required for the Mega Drive peripheral ID and
acquire the Saturn peripheral ID.
The protocol is determined by the D and U that comprise the Mega Drive
peripheral ID. Other combinations are SEGA RESERVED.
3-Line Handshake Method Peripherals
D, U = 0, 1 (TH=1)
D, U = 0, 1 (TH=0)
3) Acquire the SATURN peripheral ID, perform the number of accesses required for
the data size, and receive all peripheral data.
SMPC User's Manual 89
Mega Drive 3-Button PAD
The Mega Drive 3-button PAD is a TH control method peripheral. The access proto-
col operates by having the 1st Data and 2nd Data alternately output by repeatedly
changing the TH bit value. The Mega Drive peripheral ID is DH. Table 3.25 shows
the Mega Drive
3-button PAD access protocol and data format for the SH-2 direct mode.
After the TH is changed, read the TR, TL, R, L, D, and U after 2 µS.
Table 3.25 Mega Drive 3-Button PAD Data Format for SH-2 Direct Mode
Output Input
TH TR TL R L D U
1st Data 1 C TRG B TRG Right Left Down Up
2nd Data 0 Start A TRG 0 0 Down Up
Mega Drive Peripheral ID Acquisition Sequence
Right, Left, Down, Up, Start, A TRG, C TRG, and B TRG become 0 when the button is pushed
down.
Mega Drive 6-Button PAD
The Mega Drive 6-button PAD is a TH control method peripheral. The access proto-
col operates by having the 1st Data to the 8th Data repeatedly output by repeatedly
changing the TH bit value. To preserve the compatibility with the Mega Drive 3-
button PAD, the Mega Drive 6-button PAD uses the same Mega Drive peripheral ID.
With the 6-button PAD, continuing ID identification until the 6th Data will change
the ID from DH to CH. Table 3.26 shows the Mega Drive 6-button PAD data format
for the SH-2 direct mode.
After the TH is changed, read the TR, TL, R, L, D, and U after 2 µS. After data acqui-
sition, have TH=1 remain for over 2 mS until the next acquisition.
Table 3.26 Mega Drive 6-Button PAD Data Format for SH-2 Direct Mode
Output Input
TH TR TL R L D U
1st Data 1 C TRG B TRG Right Left Down Up
2nd Data 0 Start A TRG 0 0 Down Up
3rd Data 1 C TRG B TRG Right Left Down Up
4th Data 0 Start A TRG 0 0 Down Up
5th Data 1 C TRG B TRG Right Left Down Up
6th Data 0 Start A TRG 0 0 0 0
7th Data 1 C TRG B TRG MD X TRG Y TRG Z TRG
8th Data 0 Start A TRG 1 1 1 1
Mega Drive Peripheral ID Acquisition Sequence
Right, Left, Down, Up, Start, A TRG, C TRG, and B TRG become 0 when the button is pushed
down.
90
SATURN Mouse (Provisional Name)
The SATURN mouse is a 3-line handshake method peripheral. There are three se-
quence types for the SATURN mouse: power on reset, reset, and data request.
1) Power On Reset
When the power is turned on the mouse is automatically initialized. While the
mouse is being initialized the TL bit is made 0B to notify the SH-2 that the mouse
is being initialized.
Do not make a data request until initialization is finished. Table 3.27 shows the
data format during SATURN mouse power on reset in SH-2 direct mode.
Table 3.27 Data Format During SATURN Mouse Power On Reset for SH-2 Direct
Mode
Output Input
TH TR TL R L D U
During Reset 1 1 0 0 0 0 0
Reset Finished 1 1 1 0 0 0 0
2) Reset
This is the sequence that resets the SATURN mouse from the SH-2.
A mouse reset request can be made by changing TR to 0B when TH is 1B. The
SATURN mouse answers the request by changing TL to 0B. Initialization begins
when the SH-2 changes TR to 1B.
Do not make a data request until initialization is completed. Table 3.28 shows the
data format during SATURN mouse reset in the SH-2 direct mode.
SMPC User's Manual 91
Table 3.28 Data Format During SATURN Mouse Reset for SH-2 Direct Mode
Output Input
TH TR TL R L D U
Initial Status 1 1 1 0 0 0 0
Reset Request 1 0 1 0 0 0 0
Reset Acknowledge 1 0 0 0 0 0 0
Reset Execute 1 1 0 0 0 0 0
Reset End 1 1 1 0 0 0 0
3) Data Request
This sequence acquires data from the mouse. It is started by changing TH to 0B,
and ended by changing both TH and TR to 1B.
The first data is the Mega Drive ID acquisition phase. Data is acquired by chang-
ing TH to 0B from 1B. After TH is changed, read R, L, D, and U after 2 µs. Later
data is acquired by a handshake with TR and TL. Table 3.29 shows the data
format during SATURN mouse data request in the SH-2 direct mode.
92
Table 3.29 Data Format During SATURN Mouse Data Request for SH-2 Direct Mode
Output Input
TH TR TL R L D U
1st Data 1 1 1 0 0 0 0
2nd Data 0 1 1 1 0 1 1
0 0 1 x x x x
3rd Data 0 0 0 1 1 1 1
0 1 0 x x x x
4th Data 0 1 1 1 1 1 1
0 0 1 x x x x
5th Data 0 0 0 Y Over X Over Y Sign X Sign
0 1 0 x x x x
6th Data 0 1 1 Start Middle Right Left
0 0 1 x x x x
7th Data 0 0 0 XD7 XD6 XD5 XD4
0 1 0 x x x x
8th Data 0 1 1 XD3 XD2 XD1 XD0
0 0 1 x x x x
9th Data 0 0 0 YD7 YD6 YD5 YD4
0 1 0 x x x x
10th Data 0 1 1 YD3 YD2 YD1 YD0
End Request 1 1 x x x x x
End 1 1 1 0 0 0 0
Mega Drive Peripheral ID Acquisition Sequence
Y Over, X Over 0: X or Y data is valid.
1: Data is over flowing. (255 exceeded)
Y Sign, X Sign 0: X and Y data have positive values.
1: X and Y data have negative values.
XD7~XD0, YD7~YD0 Absolute value of amount of mouse movement.
Start, Middle, Right, Left Becomes 1 when button is pushed.
SMPC User's Manual 93
SEGA Tap
The SEGA tap is a 3-line handshake method peripheral. There are two sequence
types for the SEGA tap: power on reset and data request.
1) Power On Reset
When the power is turned on the tap is automatically initialized. While the tap is
being initialized the TL bit is made 0B to notify the SH-2 that the mouse is being
initialized. Do not make a data request until initialization is finished. Table 3.30
shows the data format during SEGA tap power on reset in SH-2 direct mode.
Table 3.30 Data Format During SEGA Tap Power On Reset for SH-2 Direct Mode
Output Input
TH TR TL R L D U
During Reset 1 1 0 0 0 0 0
Reset Finished 1 1 1 0 0 0 0
2) Data Request
This is the sequence to acquire data from the SEGA tap. A data request is started
by changing TH to 0B and ended by changing TH and TR to 1B. The first data is
the Mega Drive ID acquisition phase. Data is acquired by changing TH to 0B from
1B. After TH is changed, read R, L, D, and U after 2 µs. Acquire the data thereaf-
ter with a handshake with TR and TL. Table 3.31 shows the data format during
SEGA tap data request in the SH-2 direct mode.
94
Table 3.31 Data Format During SEGA Tap Data Request for SH-2 Direct Mode
Output Input
TH TR TL R L D U
1st Data 1 1 1 0 0 1 1
2nd Data 0 1 1 1 1 1 1
0 0 1 x x x x
3rd Data 0 0 0 0 0 0 0
0 1 0 x x x x
4th Data 0 1 1 0 0 0 0
0 0 1 x x x x
1P 1P 1P 1P
5th Data 0 0 0
DevID3 DevlD2 DevlD1 DevlD0
0 1 0 x x x x
2P 2P 2P 2P
6th Data 0 1 1
DevID3 DevlD2 DevlD1 DevlD0
0 0 1 x x x x
3P 3P 3P 3P
7th Data 0 0 0
DevID3 DevlD2 DevlD1 DevlD0
0 1 0 X X X X
4P 4P 4P 4P
8th Data 0 1 1
DevID3 DevlD2 DevlD1 DevlD0
0 0 1 x x x x
9th Data and Later 0 0 0 D3 D2 D1 D0
End Request 1 1 x x x x x
End 1 1 1 0 0 1 1
Mega Drive Peripheral ID Acquisition Sequence
The 1P~4P DevID in Table 3.31 shows the ID of the peripherals connected to SEGA
tap. The peripherals that can be connected to SEGA tap are the Mega Drive 3-button
PAD, Mega Drive 6-button PAD, and SEGA mouse. Table 3.32 shows the ID of the
connected devices.
Table 3.32 Connected Peripherals and ID
ID Peripheral Name
0H Mega Drive 3-button PAD
1H Mega Drive 6-button PAD
2H SEGA mouse
FH Unconnected or Unknown
SMPC User's Manual 95
The data of devices connected to bits D3~D0 of the 9th Data and later from Table 3.31
continues. The data format of each device is given on the following page.
(a) Mega Drive 3-Button PAD
Table 3.33 shows the Mega Drive 3-button PAD data format when connected to
SEGA tap.
Table 3.33 Mega Drive 3-Button PAD Data Format During Connection to SEGA Tap
bit3 bit2 bit1 bit0
Right Left Down Up
Start A TRG C TRG B TRG
Right, Left, Down, Up, Start, A TRG, C TRG, and B TRG are 0 when the button is pushed down.
(b) Mega Drive 6-Button PAD
Table 3.34 shows the Mega Drive 6-button PAD data format when connected to
SEGA tap.
Table 3.34 Mega Drive 6-Button PAD Data Format During Connection to SEGA Tap
bit3 bit2 bit1 bit0
Right Left Down Up
Start A TRG C TRG B TRG
MODE X TRG Y TRG Z TRG
Right, Left, Down, Up, Start, A TRG, C TRG, B TRG, MODE, X TRG, Y TRG, and Z TRG are 0
when the button is pushed down.
(c) SEGA Mouse
Table 3.35 shows the SEGA mouse data format when connected to SEGA tap.
Table 3.35 SEGA Mouse Data Format During Connection to SEGA Tap
bit3 bit2 bit1 bit0
Y Over X Over Y Sign X Sign
Start Middle Right Left
XD7 XD6 XD5 XD4
XD3 XD2 XD1 XD0
YD7 YD6 YD5 YD4
YD3 YD2 YD1 YD0
Y Over, X Over 0: X or Y data is valid.
1: Data is over flowing. (255 exceeded)
Y Sign, X Sign 0: X and Y data have positive values.
1: X and Y data have negative values.
XD7~XD0, YD7~YD0 Absolute value of amount of mouse movement.
Start, Middle, Right, Left Becomes 1 when button is pushed.
96
SATURN Standard PAD (Provisional Name)
The SATURN standard PAD is a TH and TR control method peripheral.
Data is output by repeating the specified bit pattern in the TH and TR bits. After TH
and TR have been changed, read the R, L, D, and U after 2 µs. Table 3.36 shows the
SATURN standard PAD data format in the SH-2 direct mode.
Table 3.36 SATURN Standard PAD Data Format for SH-2 Direct Mode
Output Input
TH TR TL R L D U
1st Data 1 1 1 L TRG 1 0 0
2nd Data 0 1 1 Right Left Down Up
3rd Data 1 0 1 Start A TRG C TRG B TRG
4th Data 0 0 1 R TRG X TRG Y TRG Z TRG
Mega Drive Peripheral ID Acquisition Sequence
Right, Left, Down, Up, Start, A TRG, C TRG, B TRG, R TRG, X TRG, Y TRG, Z TRG, and L TRG
become 0 when the button is pushed down.
SATURN Analog Joystick (Provisional Name)
The SATURN analog joystick is a 3-wire handshake method peripheral. Start is done
by changing TH to 0B and end is done by changing TH and TR to 1B.
The first data is the Mega Drive ID acquisition phase. Data is acquired by changing
TH to 0B from 1B. After TH is changed, read R, L, D, and U after 2 µs. Acquire later
data by making a handshake with TR and TL. Table 3.37 shows the SATURN analog
joystick data format in SH-2 direct mode.
SMPC User's Manual 97
Table 3.37 SATURN Analog Joystick Data Format for SH-2 Direct Mode
Output Input
TH TR TL R L D U
1st Data 1 1 1 0 0 0 1
2nd Data 0 1 1 0 0 0 1
0 0 1 x x x x
3rd Data 0 0 0 0 0 0 1
0 1 0 x x x x
4th Data 0 1 1 0 1 0 1
0 0 1 x x x x
5th Data 0 0 0 Right Left Down Up
0 1 0 x x x x
6th Data 0 1 1 Start A TRG C TRG B TRG
0 0 1 x x x x
7th Data 0 0 0 R TRG X TRG Y TRG Z TRG
0 1 0 X X X X
8th Data 0 1 1 L TRG α1TRG α2TRG α3TRG
0 0 1 x x x x
9th Data 0 0 0 AX7 AX6 AX5 AX4
0 1 0 x x x x
10th Data 0 1 1 AX3 AX2 AX1 AX0
0 0 1 x x x x
11th Data 0 0 0 AY7 AY6 AY5 AY4
0 1 0 x x x x
12th Data 0 1 1 AY3 AY2 AY1 AY0
0 0 1 x x x x
13th Data 0 0 0 AZ7 AZ6 AZ5 AZ4
0 1 0 x x x x
14th Data 0 1 1 AZ3 AZ2 AZ1 AZ0
0 0 1 x x x x
15th Data 0 0 0 0 0 0 0
0 1 0 x x x x
16th Data 0 1 1 0 0 0 1
End Request 1 1 x x x x x
End 1 1 1 0 0 0 1
Mega Drive Peripheral ID Acquisition Sequence
SATURN Peripheral ID Acquisition Sequence
Right, Left, Down, Up, Start, A TRG, C TRG, B TRG, R TRG, X TRG, Y TRG, Z TRG, and L TRG
become 0 when the button is pushed down.
AX7~AX0, AY7~AY0, and AZ7~AZ0 are the absolute values of the unsigned A/D converter output.
For AX7~AX0 and AY7~AY0, the upper left is (0,0) and the bottom right is (255,255).
For AZ7~AZ0, the bottom is 0 and the top is 255.
98
SATURN Keyboard
The SATURN keyboard is a 3-wire handshake method peripheral. Start is done by
changing TH to 0B and end is done by changing TH and TR to 1B.
The first data is the Mega Drive ID acquisition phase. Data is acquired by changing
TH to 0B from 1B. After TH is changed, read R, L, D, and U after 2 µs. Acquire later
data by making a handshake with TR and TL. Table 3.38 shows the SATURN key-
board data format in SH-2 direct mode.
SMPC User's Manual 99
Table 3.38 SATURN Keyboard Data Format for SH-2 Direct Mode
Output Input
TH TR TL R L D U
1st Data 1 1 1 0 0 0 1
2nd Data 0 1 1 0 0 0 1
0 0 1 x x x x
3rd Data 0 0 0 MDID3 MDID2 MDID1 MDID0
0 1 0 x x x x
4th Data 0 1 1 DSIZE DS9ZE DSIZE DSIZE
3 2 1 0
0 0 1 x x x x
5th Data 0 0 0 Right Left Down Up
0 1 0 x x x x
6th Data 0 1 1 Start A TRG C TRG B TRG
0 0 1 x x x x
7th Data 0 0 0 R TRG X TRG Y TRG Z TRG
0 1 0 X X X X
KBTYPE2 KBTYPE1 KBTYPE0
8th Data 0 1 1 L TRG
0 0 1 x x x x
Caps Num Scroll
9th Data 0 0 0 0 Lock Lock Lock
0 1 0 x x x x
10th Data 0 1 1 Make 1 1 Break
0 0 1 x x x x
11th Data 0 0 0 D7 D6 D5 D4
0 1 0 x x x x
12th Data 0 1 1 D3 D2 D1 D0
0 0 1 x x x x
13th Data 0 0 0 0 0 0 0
0 1 0 x x x x
14th Data 0 1 1 0 0 0 1
End Request 1 1 x x x x x
End 1 1 1 0 0 0 1
Mega Drive Peripheral ID Acquisition Sequence
SATURN Peripheral ID Acquisition Sequence
Right, Left, Down, Up, Start, A TRG, C TRG, B TRG, R TRG, X TRG, Y TRG, Z TRG, and L TRG
become 0 when the button is pushed down.
100
The corresponding values for each button and keyboard key are given below.
Button Key
Right →
Left ←
Down ↓
Up ↑
Start ESC
A TRG Z
C TRG C
B TRG X
R TRG Q
X TRG A
Y TRG S
Z TRG D
L TRG E
KBTYPE2~0 000: SATURN Keyboard
001~110: SEGA RESERVED
111: UNKNOWN
The KBTYPE shown here is used for the IBM keyboard conversion adapter format.
When IBM keyboards 101, 102, and 106 are connected to the conversion adapter, 000
is shown. When a keyboard not supported by the conversion adapter, or when a
device not recognized as a keyboard is connected to the conversion adapter, 111 is
output. In the future, with the integration accompanying the commercialization of
the keyboard, the system will be configured to output 000.
For Caps Lock 1: Caps Lock is locked (Caps Lock LED is lit.)
For Num Lock 1: Num Lock is locked (Num Lock LED is lit.)
For Scroll Lock 1: Scroll Lock is locked (Scroll Lock LED is lit.)
For Make 1 is shown when there is a valid Make code (a key that shows D7~D0
code is pushed down) in D7~D0.
For Break 1 is shown when there is a valid Break code (a key that shows D7~D0 code
is pushed down) in D7~D0.
D7~D0 Shows the key No. They are used with both Make and Break.
SMPC User's Manual 101
SATURN 6P Multitap (Provisional Name)
The SATURN 6P tap is a 3-line handshake method peripheral. The peripherals that
can be connected to this tap are the Mega Drive 3-button PAD, Mega Drive 6-button
PAD, SEGA mouse, SATURN standard PAD, SATURN analog joystick, and SAT-
URN keyboard. The maximum data size for each tap of the SATURN 6P multitap is
15 bytes. If peripherals of 16 bytes or more are connected, only the data up to 15
bytes will be collected. Data is output from the SATURN 6P multitap in the SMPC
control mode as explained previously. The SATURN peripheral ID is added as a
header to the data of all supported peripherals.
Data collection is started by changing TH to 0B and ended by changing TH and TR
to 1B. The first data is the Mega Drive ID acquisition phase. Data is acquired by
changing TH from 1B to 0B. After TH is changed, read R, L, D, and U after 2 µs.
Acquire later data using a handshake with TR and TL. Table 3.39 shows the SAT-
URN 6P multitap data format in the SH-2 direct mode.
102
Table 3.39 SATURN 6P Multitap Data Format for SH-2 Direct Mode
Output Input
TH TR TL R L D U
1st Data 1 1 1 0 0 0 1
2nd Data 0 1 1 0 0 0 1
0 0 1 x x x x
3rd Data 0 0 0 \\\\ 0 \\\\ \\\\ 0 \\\\ \\\\ 0 \\\\ \\\\ 0 \\\\
0 1 0 x x x x
4th Data 0 1 1 //// 0 //// //// 0 //// //// 0 //// //// 1 ////
0 0 1 //// x //// //// x //// //// x //// //// x ////
5th Data 0 0 0 //// 0 //// //// 1 //// //// 1 //// //// 0 ////
0 1 0 //// x //// //// x //// //// x //// //// x ////
6th Data 0 1 1 0 0 0 0
0 0 1 x x x x
7th Data 0 0 0 CH1-M6ID3 CH1-M6ID2 CH1-M6ID1 CH1-M6ID0
0 1 0 x x x x
8th Data 0 1 1 CH1-DSIZE3 CH1-DSIZE2 CH1-DSIZE1 CH1-DSIZE0
0 0 1 x x x x
?th Data 0 0 0 CH1-DATA CH1-DATA CH1-DATA CH1-DATA
0 : : : : : :
?th Data 0 : : CH2-M6ID3 CH2-M6ID2 CH1-M6ID1 CH1-M6ID0
0 : : x x x x
?th Data 0 : : CH2-DSIZE3 CH2-DSIZE2 CH2-DSIZE1 CH2-DSIZE0
0 : : x x x x
?th Data 0 : : CH2-DATA CH2-DATA CH2-DATA CH2-DATA
0 : : : : : :
?th Data 0 : : CH3-M6ID3 CH3-M6ID2 CH3-M6ID1 CH3-M6ID0
0 : : x x x x
?th Data 0 : : CH3-DSIZE3 CH3-DSIZE2 CH3-DSIZE1 CH3-DSIZE0
0 : : x x x x
?th Data 0 : : CH3-DATA CH3-DATA CH3-DATA CH3-DATA
0 : : : : : :
?th Data 0 : : CH4-M6ID3 CH4-M6ID2 CH4-M6ID1 CH4-M6ID0
0 : : x x x x
?th Data 0 : : CH4-DSIZE3 CH4-DSIZE2 CH4-DSIZE1 CH4-DSIZE0
0 : : x x x x
?th Data 0 : : CH4-DATA CH4-DATA CH4-DATA CH4-DATA
0 : : : : : :
?th Data 0 : : CH5-M6ID3 CH5-M6ID2 CH5-M6ID1 CH5-M6ID0
0 : : x x x x
?th Data 0 : : CH5-DSIZE3 CH5-DSIZE2 CH5-DSIZE1 CH5-DSIZE0
0 : : x x x x
?th Data 0 : : CH5-DATA CH5-DATA CH5-DATA CH5-DATA
0 : : : : : :
?th Data 0 : : CH6-M6ID3 CH6-M6ID2 CH6-M6ID1 CH6-M6ID0
0 : : x x x x
?th Data 0 : : CH6-DSIZE3 CH6-DSIZE2 CH6-DSIZE1 CH6-DSIZE0
0 : : x x x x
?th Data 0 : : CH6-DATA CH6-DATA CH6-DATA CH6-DATA
0 : : : : : :
nth Data 0 0 0 0 0 0 0
0 1 0 x x x x
n+1th Data 0 1 1 0 0 0 1
end 1 1 1 0 0 0 1
Mega Drive Peripheral ID Acquisition Sequence
\\\\ SATURN Peripheral ID Acquisition Sequence
///// Port Status
SMPC User's Manual 103
Index
Alphabetical Listing
3-Line Handshake Method .................................................................................................. 87
All Peripheral Data Acquisition Sequence ........................................................................ 51
Bit Name ................................................................................................................................ 86
Break Request ........................................................................................................................ 50
Break Request Precautions .................................................................................................. 50
Calendar Time ......................................................................................................................... 2
Cold Reset .............................................................................................................................. 13
Command Issuance .............................................................................................................. 13
Command Issuance Classification ..................................................................................... 13
Command Issuance Limitations ......................................................................................... 19
Command Issuance Method ............................................................................................... 13
Command Issuance Timing ................................................................................................ 17
Command Register ............................................................................................................... 13
COMREG ............................................................................................................................. 5, 6
Continue Request.................................................................................................................. 50
Continue Request Precautions ............................................................................................ 50
Data Configuration when One Port is in 0 Byte Mode ................................................... 63
Data Size........................................................................................................................... 62, 65
DDR Functions ........................................................................................................................ 7
DDR1 ........................................................................................................................................ 7
DDR2 ........................................................................................................................................ 7
DSP.......................................................................................................................................... (i)
EXLE1 ....................................................................................................................................... 8
Existence of Remaining Peripheral Data ........................................................................... 66
EXLE Functions ....................................................................................................................... 9
EXLE2 ....................................................................................................................................... 9
Extension Data Size .............................................................................................................. 76
Functions .................................................................................................................................. 3
H-BLANK-IN ....................................................................................................................... (ii)
Horizontal Resolution ........................................................................................................ 2, 3
INTBACK Command End Conditions .............................................................................. 50
INTBACK Command Usage Method .......................................................................... 42, 53
Introduction ............................................................................................................................. 1
IOSEL Functions ..................................................................................................................... 8
IOSEL1 ...................................................................................................................................... 8
IOSEL2 ...................................................................................................................................... 8
IREG0 (Peripheral Control) ................................................................................................. 58
IREG0~IREG6 ...................................................................................................................... 5, 6
104
IREG1 (Peripheral Control) ................................................................................................. 59
IREG2 (Peripheral Control) ................................................................................................. 60
Main CPU.............................................................................................................................. (ii)
MC68EC000 .......................................................................................................................... (ii)
MDID ................................................................................................................................ 68, 88
Mega Drive 3-Button PAD ............................................................................................. 81, 90
Mega Drive 6-Button PAD ............................................................................................. 81, 90
Multitap .................................................................................................................................. 68
Multitap ID ............................................................................................................................ 68
Non-Resetable System Management Commands............................................................ 35
Number of Connectors......................................................................................................... 13
Optimization During Peripheral Data Collection ............................................................ 55
Optimization Operations During Peripheral Data Collection, Overview of ............... 55
OREG0~OREG31 ................................................................................................................ 5, 6
PAD ........................................................................................................................................... 4
Parallel I/O Register .............................................................................................................. 7
Parallel I/O Register Address Map ..................................................................................... 7
PC ............................................................................................................................................. 3
PDR1 ......................................................................................................................................... 7
PDR2 ......................................................................................................................................... 8
Peripheral Control Mode ..................................................................................................... 48
Peripheral Control Status .............................................................................................. 62, 66
Peripheral Data Acquisition Cancel Sequence Resulting from Break Request ............ 52
Peripheral Data Acquisition Method for SMPC Control Mode ..................................... 49
Peripheral Data Acquisition Sequence .............................................................................. 53
Peripheral Data Collection .................................................................................................. 62
Peripheral ID ................................................................................................................... 62, 69
Peripheral Type ............................................................................................................... 62, 70
Peripherals ............................................................................................................................ (ii)
PLL .......................................................................................................................................... (i)
Port 1 Data ................................................................................................................. 62, 63, 64
Port 2 Data ................................................................................................................. 62, 63, 64
Port Mode .................................................................................................................. 37, 59, 66
Port Status ........................................................................................................................ 62, 67
Power On, Initial Status During ........................................................................................... 3
Reset Button ............................................................................................................................. 2
Reset Button Status ............................................................................................................... 39
Resetable System Management Commands ..................................................................... 21
RTC Command ....................................................................................................................... 3
SMPC User's Manual 105
SATURN 6P Multitap ................................................................................................... 85, 102
SATURN Analog Device Data Format .............................................................................. 77
SATURN Analog Joystick .............................................................................................. 83, 97
SATURN Digital Device Data Format ............................................................................... 76
SATURN Digital Standard PAD ................................................................................... 82, 97
SATURN Keyboard ........................................................................................................ 83, 99
SATURN Keyboard Device Data Format .......................................................................... 78
SATURN Mouse .............................................................................................................. 81, 91
SATURN Peripheral ID .................................................................................................. 62, 69
SATURN Peripheral Standard Format .............................................................................. 76
SATURN Peripheral Types ............................................................................................ 62, 70
SATURN Pointing Device Data Format ............................................................................ 77
SATURN Standard PAD ................................................................................................ 82, 97
SCSP .................................................................................................................................... (i), 3
SCU .................................................................................................................................... (ii), 3
SEGA Tap ................................................................................................................... 38, 83, 94
SF ......................................................................................................................................... 5, 6
SH-2 Direct Mode ..................................................................................................... 48, 74, 86
SH-2 Direct Mode Block Diagram ...................................................................................... 74
SH-2 Direct Mode Setting Flow .......................................................................................... 75
SH-2 Direct Mode Standards .............................................................................................. 75
SH-2 Direct Mode, Access Control During (Mega Drive 3-Button PAD) ..................... 90
SH-2 Direct Mode, Access Control During (Mega Drive 6-Button PAD) ..................... 90
SH-2 Direct Mode, Access Control During (SATURN 6P Multitap) ........................... 102
SH-2 Direct Mode, Access Control During (SATURN Analog Joystick) ...................... 97
SH-2 Direct Mode, Access Control During (SATURN Keyboard) ................................. 99
SH-2 Direct Mode, Access Control During (SATURN Mouse) ...................................... 91
SH-2 Direct Mode, Access Control During (SATURN Standard PAD) ......................... 97
SH-2 Direct Mode, Access Control During (SEGA Adapter) ......................................... 94
SH-2 Direct Mode, Setting to .............................................................................................. 74
SH-2 Interface .......................................................................................................................... 5
SH-2 Interface Register .......................................................................................................... 5
SH-2 Interface Register Address Map .................................................................................. 5
Slave SH-2 ................................................................................................................................ 3
SMPC ...................................................................................................................................... (i)
SMPC ........................................................................................................................................ 3
SMPC Command .................................................................................................................. 12
SMPC Command List........................................................................................................... 12
SMPC Control Mode ............................................................................................................ 48
SMPC Control Mode Block Diagram ................................................................................. 48
SMPC Control Mode Characteristics ................................................................................. 48
SMPC Control Mode Standards ......................................................................................... 49
SMPC Control Mode, Setting to ......................................................................................... 49
106
SMPC Control, Format During (Mega Drive 3-Button PAD) ......................................... 81
SMPC Control, Format During (Mega Drive 6-Button PAD) ......................................... 81
SMPC Control, Format During (SATURN 6P Adapter) .................................................. 85
SMPC Control, Format During (SATURN Analog Joystick) .......................................... 83
SMPC Control, Format During (SATURN Keyboard) .................................................... 83
SMPC Control, Format During (SATURN Mouse) .......................................................... 81
SMPC Control, Format During (SATURN Standard PAD) ............................................ 82
SMPC Control, Format During (SEGA Tap) ..................................................................... 82
SMPC Functions ...................................................................................................................... 3
SMPC Interrupt ..................................................................................................................... 13
SMPC System Configuration ................................................................................................ 2
SMPC UNKNOWN Peripheral Data Format ............................................................. 67, 68
Sound CPU .............................................................................................................................. 3
SR (Peripheral Control) ........................................................................................................ 66
SR ......................................................................................................................................... 5, 6
Standard Format ................................................................................................................... 76
System Configuration ............................................................................................................ 2
TH and TR Control Method ................................................................................................ 87
TH Control Method .............................................................................................................. 87
Type A Command Flow ....................................................................................................... 14
Type B Command Flow ....................................................................................................... 14
Type C Command Flow ....................................................................................................... 15
Type D Command Flow ....................................................................................................... 16
V-BLANK-IN ........................................................................................................................ (ii)
V-BLANK-IN Skip Function .............................................................................................. (ii)
V-BLANK-OUT .................................................................................................................... (ii)
VDP1 ................................................................................................................................... (i), 3
VDP2 ................................................................................................................................... (i), 3
SMPC User's Manual 107
Command Abbreviations
CDOFF .................................................................................................................................... 28
CDON ..................................................................................................................................... 27
CKCHG320 ............................................................................................................................ 31
CKCHG352 ............................................................................................................................ 30
INTBACK ............................................................................................................................... 36
MSHON ................................................................................................................................. 22
NMIREQ ................................................................................................................................ 32
RESDISA ................................................................................................................................ 34
RESENAB............................................................................................................................... 33
SETSMEM .............................................................................................................................. 44
SETTIME ................................................................................................................................ 46
SNDOFF ................................................................................................................................. 26
SNDON .................................................................................................................................. 25
SSHOFF .................................................................................................................................. 24
SSHON ................................................................................................................................... 23
SYSRES ................................................................................................................................... 29
Command Names
CD OFF................................................................................................................................... 28
CD ON .................................................................................................................................... 27
Clock Change 320 Mode ...................................................................................................... 31
Clock Change 352 Mode ...................................................................................................... 30
Interrupt Back ........................................................................................................................ 36
Master SH-2 ON .................................................................................................................... 22
NMI Request.......................................................................................................................... 32
Entire System Reset .............................................................................................................. 29
Reset Disable ......................................................................................................................... 34
Reset Enable........................................................................................................................... 33
Slave SH-2 OFF ..................................................................................................................... 24
Slave SH-2 ON ...................................................................................................................... 23
SMPC Memory Setting ........................................................................................................ 44
Sound OFF ............................................................................................................................. 26
Sound ON .............................................................................................................................. 25
Time Setting ........................................................................................................................... 46
108
TM
SEGA Saturn
Dual CPU
User's Guide
Doc. # ST-202-R1-120994
© 1994 SEGA. All Rights Reserved.
Update History
Date Version Update History
August 5, 1994 1.0
September 28, 1994 1.1 Correction of typographical errors in address values for 2.2 EVA
board settings
December 9, 1994 1.2 Corrected translated error on page 5. Address 28000000H under
section 6.1 was changed to 21800000H.
Contents
1.0 Dual CPU Configuration in Sega Saturn ......................... 1
1.1 Complete Shared Mode (Memory Sharing ............ 1
1.2 Communication by FRT Input Capture Signal ....... 1
2.0 Settings for Debugging Environment ............................. 2
2.1 E7000 ICE Settings ............................................... 2
2.2 EVA Board Settings ............................................... 2
3.0 Clock Changes .................................................................. 2
4.0 Programming ..................................................................... 3
4.1 Program Sharing ................................................... 3
4.2 Stack Variables and Static and Global Variables ... 3
4.3 Slave CPU Initialization ......................................... 3
4.4 Initialization (Vector, Stack) by the Boot ROM ....... 3
5.0 Communication from Master CPU to Slave CPU ........... 4
5.1 FRT Input Capture Interrupt ................................... 4
5.2 Polling of the FRT Input Capture Flag ................... 4
6.0 Communication from Slave CPU to Master CPU ........... 5
6.1 FRT Input Capture Interrupt ................................... 5
6.2 Polling of the FRT Input Capture Flag ................... 5
7.0 Data Transfer Between Master and Slave CPUs ............ 5
7.1 Cache-through Read ............................................. 5
7.2 Cache Invalidate .................................................... 5
8.0 Programming Examples Using the Slave CPU .............. 6
8.2 Function Execution Request from Master CPU
to Slave CPU ......................................................... 6
Virtual CD Tool ........................................................................... 7
1.0 Dual CPU Configuration in Sega Saturn
1.1 Complete Shared Mode (Memory Sharing)
In the Sega Saturn, the slave CPU shares all external devices with the master CPU.
The programs executed by the slave CPU and the reset vector obtained during reset
are exactly the same as those of the master CPU. However, identification of the
master and slave CPUs is performed in the boot ROM because each CPU must be
initialized separately.
When the slave and master CPUs compete for external access, one of the CPUs is
forced to wait for access and execution speed decreases.
1.2 Communication by FRT Input Capture Signal
The Sega Saturn is designed so that the FRT Input Capture signal of the SH2 built-in
module can be used to implement communication between the master and slave
CPUs. Specifically, to input the FRT Input Capture signal to the slave CPU, write
16-bit data to address 21000000H; to input the FRT Input Capture signal to the mas-
ter CPU, write 16-bit data to address 21800000H.
SEGA Saturn Dual CPU User's Guide 1
2.0 Settings for Debugging Environment
2.1 E7000 ICE Settings
To use the E7000 ICE in the slave CPU, slave mode must be specified with the ICE
MODE command.
Setting Procedure
:mode;c [Return]
E7000 MODE(MD5-0)=xx? 2E [Return]
MODE SET (C:CONFIGURATION/U:USER/M:MASTER-SLAVE)=X? C [Return]
CONFIGURATION WRITE OK?(Y/N)? Y [Return]
2.2 EVA Board Settings
To use the EVA board in the slave CPU, the following settings are required:
1. Release the slave CPU reset in the master CPU emulator.
Release Procedure
:m 2010001f:b [Return]
2010001f xx ? 02 [Return]
20100020 xx ? . [Return]
2. The EVA board in the slave CPU is started.
3. Execute em ct=d on the EVA board in the slave CPU.
When using the EVA board in the slave CPU, note that the EVA board cannot be
operated until the slave CPU reset is released.
3.0 Clock Change
When the clock is changed, the SMPC switches the slave CPU to reset state. The
slave CPU must therefore be restarted by the SMPC command (SSH_ON = 02H) after
the clock is changed.
2
4.0 Programming
4.1 Program Sharing
Because the slave and master CPUs share all external devices, either CPU can ex-
ecute an execution file from any location. (If the cache is used as internal RAM,
programs placed in internal RAM are not shared.)
4.2 Stack Variables and Static and Global Variables
Re-entrant functions can be executed concurrently for the slave and master CPUs
because a stack area is allocated separately for each CPU (boot ROM setting). How-
ever, if both CPUs execute programs that rewrite static or global variables, special
attention must be paid to the execution sequence and to concurrent execution in
each CPU.
4.3 Slave CPU Initialization
In slave CPU activation by the master CPU, the boot ROM rewrites the execution
entry (SYS_SETSINT(164H, EntryFunc);) after read initialization. The master CPU
then uses the SMPC command (SSH_ON = 02H) to release the slave reset.
(EntryFunc is the slave entry function).
4.4 Initialization (Vector, Stack) by the Boot ROM
The boot ROM initializes the slave CPU as follows:
1. Vector VBR is set to address 6000400H.
2. Stack SP is set to address 6001000H.
3. Of the interrupts, only the FRT Input Capture interrupt is enabled (64H, level 1).
SEGA Saturn Dual CPU User's Guide 3
5.0 Communication from Master CPU to Slave CPU
Bidirectional communication is necessary for coordinating operation between the
master and slave CPUs. For communication from the master CPU to the slave CPU,
the Sega Saturn provides the methods described in the following sections.
5.1 FRT Input Capture Interrupt
During boot ROM initialization, the FRT Input Capture interrupt is set for the slave
CPU. To set interrupt processing from the master CPU, use the application initial-
ization routine to register the interrupt processing routine to interrupt vector 64H of
the slave CPU. (When the interrupt processing routine is registered from the master
PCU, the interrupt vector is 164H.)
To issue this interrupt from the master CPU, write 16-bit data to address 21000000H.
The slave CPU then starts the interrupt processing that was previously registered.
5.2 Polling of the FRT Input Capture Flag
When the SH CPU accepts the FRT Input Capture signal, it sets a flag to an internal
register in the FRT unit. The SH CPU then monitors change in the flag during pro-
cessing wait state (or synchronous wait state). This method is especially effective
when there are many synchronous or processing waits because it has a shorter
reception time than the interrupt processing method. When using this method, be
sure to disable the FRT Input Capture interrupt in the application initialization
routine. (Set 01H to TIER.)
4
6.0 Communication from Slave CPU to Master CPU
In addition to providing communication methods from the master CPU to the slave
CPU, the Sega Saturn also provides all of the same communication methods for
communication from the slave CPU to the master CPU.
6.1 FRT Input Capture Interrupt
During boot ROM initialization, the FRT Input Capture interrupt is set for the mas-
ter CPU. To set interrupt processing from the slave CPU, set up the application
initialization routine to register the interrupt processing routine to interrupt vector
64H of the master CPU.
To issue this interrupt from the slave CPU, write 16-bit data to address 21800000H.
The slave CPU then starts the interrupt processing that was previously registered.
6.2 Polling of the FRT Input Capture Flag
When the SH CPU accepts the FRT Input Capture signal, it sets a flag to an internal
register in the FRT unit. The SH CPU then monitors change in the flag during pro-
cessing wait state (or synchronous wait state). This method is especially effective
when there are many synchronous or processing waits because it has a shorter
reception time than the interrupt processing method. When using this method, be
sure to disable the FRT Input Capture interrupt in the application initialization
routine.
7.0 Data Transfer Between Master and Slave CPUs
The cache unit of the SH CPU does not support a bus snoop function. Therefore
when data is transferred between the master and slave CPUs, the CPU reading the
data must either perform a cache-through read or read the data after the cache of the
target area is invalidated.
7.1 Cache-through Read
In cache-through read, the CPU reads data starting from the address obtained when
20000000H is added to the target address.
7.2 Cache InValidate
To invalidate the cache, the CPU writes 0 by 16-bit access to the address obtained
when 40000000H is added to the target address. This operation invalidates a 16-byte
area that includes the target address.
SEGA Saturn Dual CPU User's Guide 5
8.0 Programming Examples Using the Slave CPU
The following sections shows program examples that use the slave CPU
(when the FRT Input Capture Flag is polled.)
8.1 Slave CPU Initialization
The following examples show a program that initializes the slave CPU and an execu-
tion entry function of the slave CPU.
void
InitSlaveCPU(void)
{
volatile Uint 16 i;
/* Set Slave SH reset status in Slave SH */
while((*SMPC_SF & 0x01) == 0x01);
*SMPC_SF = 1;
*SMPC_COM = SMPC_SSHOFF;
while((*SMPC_SF & 0x01 == 0x01);
for(i = 0; i < 10; i++);
SETSINT(0x94,(void *)&SlaveCPUmain);
/* Release reset status of Slave SH */
*SMPC_SF = 1;
*SMPC_COM = SMPC_SSHON;
while((*SMPC_SF & 0x01) == 0x01);
}
void
SlaveCPUmain(void)
{
/* Wait until SlaveCommand is set */
/* then call function for SlaveCommand */
set_imask(0xf);
*IPRA = 0x0000;
*IPRB = 0x0000;
*TIER = 0x01;
while(1){
/* Use “FRT InputCaptureFlag” Polling for wait command from Master */
if((*FTCSR & 0x80) == 0x80){
*FTCSR = 0x00;
/* Execute function requested from master CPU */
(*(void(*)(void))*(void**)((Uint32)&SlaveCommand+0x20000000))();
SlaveCommand = (void*)0;
}
}
}
8.2 Function Execution Request from Master CPU to Slave CPU
extern void SlaveFunction(void);
SlaveCommand = SlaveFunction;
*(Uint16 *)0x21000000 = 0xffff; /* FRT Input Capture for Slave */
6
Virtual CD Tool (September 27, 1994 Version)
This document provides details about the virtual CD tool 9/27/94.
Note that to use the virtual CD, virtual internal CD Board ROM version 3.1 must be
replaced with version 3.2. Also note that the script syntax changed when the
VCDPRE.EXE was upgraded from version 1.xx to version 2.xx.
1. Virtual CD interface board EPROM (version 3.2)
This version corrects a fault that prevented CD-DA data on the virtual CD from
being played in multi-player mode.
2. VCDEMU.EXE (version 1.70)
This version implements multi-index and scan play. Scan play is valid only in
real-time emulation mode.
The current version does not support file interleaving during direct DOS file
access.
Note: To operate VCDEMU.EXE version 1.70, you must upgrade the ROM on the virtual CD
board to version 3.2.
3. VCDPRE.EXE, VCDBUILD.EXE (version 2.13)
Modifications from version 2.11
• The directory record is always located at the beginning of a sector when the
number of files is large and the directory file extends over multiple sectors.
• Processing is interrupted if the same file name exists.
[Restriction]
The total number of files that are currently operating is only a little more than 500. Although the
specification allows up to 1300 files to be executed as options when XMS is used, this specifica-
tion has not been announced due to a bug that was found.
Furthermore, an urgent request to support 2000 or more files has been made.
Note: In version 2.xx, the syntax of the script file is different from the syntax used in version
1.xx. Users of version 1.xx must change the script file. For details, refer to the syntax in
item 7, EXSAMPLE.SCR.
4. VCDUTL.EXE (version 1.00)
5. VCDMKTOC.EXE (version 1.20)
6. SWAP.EXE (version 1.00)
SWAP.EXE is an endian conversion program for CD-DA data.
7. EXSAMPLE.SCR
EXSAMPLE.SCR is an example of new script file for VCDPRE version 2.xx. Refer
to this example during script modification.
SEGA Saturn Dual CPU User's Guide 7
TM
SCU
User's Manual
Third version
Doc. # ST-97-R5-072694
© 1994 SEGA. All Rights Reserved.
REFERENCES
In translating/creating this document, certain technical words and/or phrases were interpreted
with the assistance of the technical literature listed below.
1. KenKyusha New Japanese-English Dictionary
1974 Edition
2. Nelson’s Japanese-English Character Dictionary
2nd revised version
3. Microsoft Computer Dictionary
4. Japanese-English Computer Terms Dictionary
Nichigai Associates
4th version
Version History
Version 1: April 7, 1994
• New draft
Version 2: May 31, 1994
• Revisions according to April 28, 1994 meeting
Version 3: July 15, 1994
• Revisions requested on June 30 and July 11, 1994
Introduction
This manual explains functions of the system controller and how they are used. The system
controller transfers data rapidly and smoothly by means of the bus controls.
Explanation of Terms
The following terms are used in this manual.
SCU System Control Unit. The SCU contains the CPU I/F, A-Bus IF, B-BUS I/F, and
smoothly effects data transfers between several processors connected through
their respective I/F and bus. It also internally houses the DMA controller,
interrupt controller, and DSP, and makes possible rapid DMA control, interrupt
control, and processing of operations.
Main CPU Uses a RISC type CPU SH2 that controls the overall system. SH2 contains 32-bit
internal and external buses.
VDP1 Video Display Processor 1. Functions include character and line painting, color
indication, Gouraud Shading color operations, screen output coordinate indica-
tion, and frame buffer display control.
VDP2 Video Display Processor 2. Functions include scrolling the screen up/down/
left/right, rotating the screen, determining priority order of multiple screens, and
a priority function that controls the image process of color operations and color
offset.
SCSP Acronym for Saturn Custom Sound Processor. This is a sound source LSI for
multi-functional games that combines a PCM sound source and sound used for
the DSP.
i
SMPC System Manager and Peripheral Control. Has the functions of managing system
resets, control of interfacing with output devices (control pads, mouse, etc.), time
display by a real time clock, and battery backup.
Data A bit is the smallest unit for expressing 1 or 0. 8 bits is a byte. 16 bits (or 2 bytes)
is a word. 32 bits (or 4 bytes) is a 9 long word.
A_Bus Bus that connects external devices such as a ROM cassette or CD.
B_Bus Bus that connects VDP1, VDP2, and SCSP.
ii
Manual Notations
This manual contains the following notations.
Binary Represented by “B” at the end as in 100B. However, “B” may be omitted
for 1 bit.
Hexadecimal Represented by H at the end as in 00H and FFH.
Unit 1 KByte is 1,024 bytes. 1 Mbit is 1,048,576 bits.
MSB, LSB The configuration of byte and word shows at the left the high order bit
(MSB, most significant bit), and atthe right the low order bit (LSB, least
significant bit).
Undefined Bit A bit not defined by an instruction word is represented by “—”
(R) Represents read only data.
(W) Represents write only data.
(R/W) Represents data that can be read and written.
++ Shows increments. For example, when the CT0 register is incremented, it
is shown as CT0++.
x=2-0 This indicates that 3 types exist, 2,1, and 0. For example, DxR26-0[x=2-0]
in the read address in section 3.2 “DMA Control Register” means that
D2R26-0, D1R26-0, and D0R26-0 exist. Similarly, D2R26-0 indicates that
D2R26 ~ D2R0 exist.
iii
CONTENTS
INTRODUCTION
Explanation of Terms .............................................................................. (i)
Manual Notations .................................................................................. (iii)
List of Figures ................................................................................ (vii)
List of Tables .................................................................................... (x)
CHAPTER 1 OVERVIEW .......................................................................... 1
1.1 SCU Overview ........................................................................ 2
System Diagram ............................................................................. 2
Block Diagram ................................................................................ 3
1.2 SCU Mapping ......................................................................... 4
Operation of Cache Hit ................................................................... 5
1.3 SCU Register Map ................................................................. 7
Level 2-0DMA Set Register ........................................................... 8
DMA Forced-Stop Register ........................................................... 8
DMA Status Register ......................................................................9
DSP Program Control Port ............................................................ 9
DSP Program RAM Data Port ..................................................... 10
DSP Data RAM Address Port ...................................................... 10
DSP Data RAM Data Port ............................................................ 10
Timer 0 Compare Register ........................................................... 11
Timer 1 Set Data Register ............................................................ 11
Timer 1 Mode Register ................................................................. 11
Interrupt Mask Register ................................................................ 12
Interrupt Status Register ...............................................................12
A-Bus Interrupt Acknowledge Register ........................................ 12
A-Bus Set Register ....................................................................... 13
A-Bus Refresh Register ................................................................ 13
SCU SDRAM Select Register ...................................................... 14
SCU Version Register ................................................................... 14
iv
CHAPTER 2 OPERATION ............................................................... 15
2.1 DMA Transfer ....................................................................... 16
Basic Operation of DMA ...............................................................16
DMA Mode.................................................................................... 18
Example of a Specific Use ............................................................ 21
2.2 Interrupt Control .................................................................. 27
Blanking Interrupt ......................................................................... 29
Timer Interrupt .............................................................................. 30
DSP-End Interrupt ........................................................................ 33
Sound-Request Interrupt .............................................................. 33
SMPC Interrupt ............................................................................. 33
PAD Interrupt ................................................................................ 33
DMA End Interrupt ........................................................................ 33
DMA-Illegal Interrupt ..................................................................... 33
Sprite Draw End Interrupt .............................................................33
2.3 DSP ....................................................................................... 34
DSP Control from the Main CPU ................................................. 34
CHAPTER 3 REGISTERS ............................................................... 39
3.1 Register List ......................................................................... 40
3.2 DMA Control Registers ....................................................... 41
Level 2-0 DMA Set Register ........................................................ 41
DMA Mode, Address Update, Start Factor Select Register ......... 46
DMA Force-Stop Register ............................................................ 47
DMA Status Register ....................................................................47
3.3 DSP Control Ports ............................................................... 51
DSP Program Control Port .......................................................... 51
DSP Program RAM Data Port ..................................................... 53
DSP Data RAM Address Port ...................................................... 53
DSP Data RAM Data Port ............................................................ 54
3.4 Timer Registers ................................................................... 55
Timer 0 Compare Register .......................................................... 55
Timer 1 Set Data Register ............................................................ 55
Timer 1 Mode Register ................................................................. 56
v
3.5 Interrupt Control Registers ..................................................... 57
Interrupt Mask Register ................................................................ 57
Interrupt Status Register ...............................................................58
3.6 A-Bus Control Registers .......................................................... 61
A-Bus Interrupt Acknowledge Register ........................................ 61
A-Bus Set Register ...................................................................... 62
A-Bus Refresh Register ................................................................ 72
3.7 SCU Control Registers .............................................................. 73
SCU SDRAM Select Register ...................................................... 73
SCU Version Register ................................................................... 73
CHAPTER 4 DSP CONTROL .......................................................... 75
4.1 DSP Internal BLOCK MAP .................................................. 76
4.2 List of Commands ..................................................................... 80
4.3 Operand Execution Methods .............................................. 85
Jump Command Execution ......................................................... 85
Loop Command Execution .......................................................... 86
DMA Command Execution .......................................................... 87
End Command Execution .............................................................88
4.4 Special Process Execution ..................................................... 89
Loading a Program by the DMA Command ................................. 89
Repeating One Command ............................................................ 89
Executing a Subroutine Program ................................................. 90
4.5 More About Commands ............................................................ 91
Operation Commands .................................................................. 91
Load Immediate Command ....................................................... 120
DMA Command .......................................................................... 132
Jump Commands ....................................................................... 141
Loop Bottom Commands ............................................................ 153
END Command .......................................................................... 156
vi
List of Figures
(Chapter 1 Overview)
Figure 1.1 Diagram of System .................................................................................... 2
Figure 1.2 Block Diagram ........................................................................................... 3
Figure 1.3 SCU Mapping (Cache_address) ............................................................. 4
Figure 1.4 Explanation of Cache Hit Operation ........................................................ 5
Figure 1.5 SCU Mapping (Cache_through_address) ................................................. 6
Figure 1.6 SCU Register Map .................................................................................... 7
Figure 1.7 Level 2-0 DMA Set Register Map ............................................................. 8
Figure 1.8 DMA Force-Stop Register Map .................................................................8
Figure 1.9 DMA Status Register Map ......................................................................... 9
Figure 1.10 DSP Program Control Port Map ............................................................. 9
Figure 1.11 DSP Program RAM Data Port Map ....................................................... 10
Figure 1.12 DSP Data RAM Address Port Map ....................................................... 10
Figure 1.13 DSP Data RAM Data Port Map .............................................................10
Figure 1.14 Timer 0 Compare Register Map ............................................................ 11
Figure 1.15 Timer 1 Set Data Register Map ............................................................. 11
Figure 1.16 Timer 1 Mode Register Map .................................................................. 11
Figure 1.17 Interrupt Mask Register Map ................................................................. 12
Figure 1.18 Interrupt Status Register Map ................................................................ 12
Figure 1.19 A-Bus Interrupt Acknowledge Map ....................................................... 12
Figure 1.20 A-Bus Set Register Map .................................................................. 13
Figure 1.21 A-Bus Refresh Register Map ................................................................. 13
Figure 1.22 SCU SDRAM Select Register Map ....................................................... 14
Figure 1.23 SCU Version Register Map .................................................................. 14
(Chapter 2 Operation)
Figure 2.1 DMA Transfer Basic Operation ................................................................ 16
Figure 2.2 DMA Transferable Area when Activacted from the Main CPU ................ 17
Figure 2.3 DMA Transferable Area when Activacted from the DSP ......................... 17
Figure 2.4 Direct Mode DMA Transfer Operation .................................................... 18
Figure 2.5 Indirect Mode DMA Transfer Flow .......................................................... 19
Figure 2.6 Indirect Mode DMA Transfer Operation Details ...................................... 20
Figure 2.7 Differences in DMA Operations according to the Address Update Bit .... 22
vii
Figure 2.8 Example of Data Write ............................................................................ 23
Figure 2.9 Work RAM Area Contents ...................................................................... 24
Figure 2.10 DMA Transfer by Setting Address Add Value ........................................ 26
Figure 2.11 Blanking Interrupt .................................................................................... 29
Figure 2.12 Timer 0 Interrupt Process (compare register = when 19 is set) ........... 30
Figure 2.13 Timer 1 Interrupt Process (In sync with Timer 0) .................................. 31
Figure 2.14 Timer 1 Interrupt Process (not in sync with Timer 0) ............................ 32
Figure 2.15 DSP Program Load Step 1 ....................................................................34
Figure 2.16 DSP Program Load Step 2 ....................................................................35
Figure 2.17 DSP Program Load Step 3 ....................................................................35
Figure 2.18 DSP Data Access Step 1 ....................................................................... 36
Figure 2.19 DSP Data Access Step 2 ...................................................................... 37
Figure 2.20 DSP Data Access Step 3 ...................................................................... 37
Figure 2.21 DSP Program Execution Start Control from CPU ................................. 38
Figure 2.22 DSP Program Forced Stop Control from CPU ...................................... 38
(Chapter 3 Registers)
Figure 3.1 Level 2-0 Read Address (Register: D0R, D1R, D2R) ........................... 41
Figure 3.2 Level 2-0 Write Address (Register: D0W, D1W, D2W) ......................... 41
Figure 3.3 Level 0 Transfer Byte Number (Register: D0C) .................................... 42
Figure 3.4 Level 2-1 Transfer Byte Number (Register: D1C, D2C) ........................ 42
Figure 3.5 Level 2-0 Address Add Value (Register: D0AD, D1AD, D2AD) ............. 42
Figure 3.6 Communication Units between the SCU and Processor ........................ 44
Figure 3.7 Specific Example of Transfer between the SCU and Processor ............. 44
Figure 3.8 Write Address Add Value Indication ........................................................ 45
Figure 3.9 Level 2-0 DMA Authorization Bit (Register: D0EN, D1EN, D2EN) ....... 45
Figure 3.10 Level 2-0 DMA Mode, Address Update, Start Up Factor
Select Register (Register: D0MP, D1MP, D2MP) ................................ 46
Figure 3.11 DMA Force-Stop Register (Register: DSTP) ...................................... 47
Figure 3.12 High and Low Level DMA Operation .................................................... 48
Figure 3.13 DMA Status Register (Register: DSTA) .............................................. 48
viii
Figure 3.14 DSP Program Control Port (Register: PPAF) ..................................... 51
Figure 3.15 DSP Program RAM Data Port (Register: PPD) ................................... 53
Figure 3.16 DSP Data RAM Address Port (Register: PDA) .................................... 53
Figure 3.17 DSP Data RAM Data Port (Register: PDD) ........................................ 54
Figure 3.18 Time 0 Compare Register (Register: T0C) ....................................... 55
Figure 3.19 Timer 1 Set Data Register (Register: T1S) ......................................... 55
Figure 3.20 Timer 1 Mode Register (Register: T1MD) ........................................... 56
Figure 3.21 Interrupt Mask Register (Register: IMS) ............................................. 57
Figure 3.22 Interrupt Status Register (Register: IST) ........................................... 58
Figure 3.23 A-Bus Interrupt Acknowledge Register (Register: AIAK) ...................... 61
Figure 3.24 A-Bus Set [CS0, 1 Space] (Register: ASR0) ........................................ 62
Figure 3.25 A-Bus Set [CS2, Dummy Space] (Register: ASR1) ............................. 62
Figure 3.26 Result of Previous Read Process ......................................................... 63
Figure 3.27 Timing when Setting the Pre-Charge Insert Bit after Write ................... 63
Figure 3.28 Timing when Setting the Pre-Charge Insert Bit after Read .................. 64
Figure 3.29 Differences in Timing by Setting External Wait Effective Bit ................. 64
Figure 3.30 A-Bus Refresh Register (Register: AREF) .......................................... 72
Figure 3.31 SCU SDRAM Select Bit (Register: RSEL) .......................................... 73
Figure 3.32 SCU Version Register (Register: VER) ................................................ 73
Chapter 4 DSP Control)
Figure 4.1 DSP Internal Block Map ........................................................................... 77
Figure 4.2 Jump Command Execution ..................................................................... 85
Figure 4.3 Loop Program Execution ......................................................................... 86
Figure 4.4 Subroutine Program Execution ................................................................ 91
Figure 4.5 Operation Command Format ................................................................... 92
Figure 4.6 Load Immediate Command Format 1 (Unconditional Transfer) ........... 120
Figure 4.7 Load Immediate Command Format 2 (Conditional Transfer) ............... 120
Figure 4.8 DMA Command Format 1...................................................................... 132
Figure 4.9 DMA Command Format 2...................................................................... 132
Figure 4.10 Jump Command Format ...................................................................... 141
Figure 4.11 Loop Bottom Command Format ......................................................... 153
Figure 4.12 End Command Format ........................................................................ 156
ix
List of Tables
(Chapter 2 Operation)
Table 2.1 Interrupt Factors ................................................................. 27
Table 2.2 Interrupt Factor General Names ........................................ 28
(Chapter 3 Registers)
Table 3.1 Register List ....................................................................... 40
Table 3.2 Read Address Add Value ................................................... 43
Table 3.3 Write Address Add Value ................................................... 43
Table 3.4 Starting Factors .................................................................. 46
Table 3.5 RAM Page Select ...............................................................53
Table 3.6 Timer 1 Occurrence Selection Contents ............................ 56
Table 3.7 Timer Operation Contents ................................................. 56
Table 3.8 Interrupt Status Bit Contents ............................................. 59
Table 3.9 A-Bus Interrupt Acknowledge Contents .............................. 61
Table 3.10 CS0 Space Burst Cycle Set Values .................................. 65
Table 3.11 CS0 Space Normal Cycle Set Values ............................... 65
Table 3.12 CS0 Space Burst Length Set Values ................................ 65
Table 3.13 CS0 Space Bus Size Set Values ...................................... 66
Table 3.14 CS1 Space Burst Cycle Set Values .................................. 67
Table 3.15 CS1 Space Normal Cycle Set Values ............................... 67
Table 3.16 CS1 Space Burst Length Set Values ................................ 68
Table 3.17 CS1 Space Bus Size Set Values ...................................... 68
Table 3.18 CS2 Space Burst Cycle Set Values .................................. 69
Table 3.19 CS2 Space Bus Size Set Values ...................................... 70
Table 3.20 Dummy Space Burst Cycle Set Values ............................. 71
Table 3.21 Dummy Space Normal Cycle Set Values ......................... 71
Table 3.22 Dummy Space Burst Length Set Values ........................... 71
Table 3.23 Dummy Space Bus Size Set Values ................................. 72
Table 3.24 A-Bus Refresh Wait Number ............................................. 72
x
(Chapter 4 DSP Control)
Table 4.1 List of Commands (1) ........................................................ 80
Table 4.2 List of Commands (2) ........................................................ 81
Table 4.3 List of Commands (3) ........................................................ 82
Table 4.4 List of Commands (4) ........................................................ 83
Table 4.5 Descriptions of Constants .................................................. 84
Table 4.6 Features of Data Transfer from D0 Bus to DSP ................ 87
Table 4.7 Features of Data Transfer from DSP to D0 Bus ................ 88
xi
CHAPTER 1 OVERVIEW
Chapter 1 Contents
1.1 SCU Overview ...................................................................... 2
System Diagram ..................................................2
Block Diagram .....................................................3
1.2 SCU Mapping ....................................................................... 4
Operation of Cache Hit ......................................5
1.3 SCU Register Map................................................................ 7
Level 2-0DMA Set Register ................................8
DMA Forced-Stop Register ................................8
DMA Status Register ..........................................9
DSP Program Control Port ................................9
DSP Program RAM Data Port .........................10
DSP Data RAM Address Port ..........................10
DSP Data RAM Data Port ................................10
Timer 0 Compare Register ............................... 11
Timer 1 Set Data Register ................................. 11
Timer 1 Mode Register ..................................... 11
Interrupt Mask Register ...................................12
Interrupt Status Register ..................................12
A-Bus Interrupt Acknowledge Register ........12
A-Bus Set Register .............................................13
A-Bus Refresh Register .....................................13
SCU SDRAM Select Register ...........................14
SCU Version Register ........................................14
SCU User's Manual 1
1.1 SCU Overview
The SCU (System Control Unit) contains a CPU I/F, A-Bus I/F, and B-Bus I/F. It
smoothly interfaces multiple processors connected through their respective I/Fs and
buses. Also contained inside are the DMA controller, interrupt controller, and DSP.
The DMA controller controls the internal level 2-0 as well as DSP total 4 channel
DMA transfer, and allows the free transfer of data between the CPU, A-Bus, and B-
Bus. Using the CPU-Bus, the CPU can access the work area while executing the
DMA of the A-Bus and B-Bus. The DSP region must be used in data transfer request
from the DSP. For instance, DMA transfer with the A-Bus and B-Bus not using the
DSP region cannot request that data be transfered from the DSP.
The interrupt controller includes interrupts from the A-Bus, B-Bus, and System
Manager, and controls all interrupts within the SCU. It also supports interrupt by
timers and can produce interrupts that are in sync with the screen.
DSP can handle processes that cannot be handled by the main CPU when its load
has been exceeded. DSP operates at half the frequency of the main CPU. As a result,
one step takes about 70 nsec.
System Diagram
A diagram of the system is shown in Figure 1.1. The Work RAM-H, Work RAM-L,
Backup RAM, IPL ROM, and SMPC are connected to the CPU-Bus. The CPU-Bus
controls the system reset signal and control pad. The medium that supplies the CD
or cartridge software is an external system connected to the A-Bus. VDP1, VDP2,
and SCSP are connected to the B-Bus and control picture and sound.
INT Signal A-Bus
Main SCU
CPU CPU-Bus B-Bus
WORK WORK BACKUP IPL
SMPC VDP1 VDP2 SCSP
RAM-H RAM-L RAM ROM
Figure 1.1 Diagram of System
2
Block Diagram
A block diagram of the SCU is shown in Figure 1.2. As previously mentioned, the
CPU interface, A-Bus, and B-Bus interfaces, and the DMA controller, interrupt con-
troller, and DSP are contained in the SCU. All interfaces and controllers are con-
nected by buses, making transfer of data possible.
The CPU I/F and A-Bus I/F connections are through two buses. The upper bus is
connected through the register. The lower bus is a connection used in transferring
data. Therefore, DMA transfer is done using the lower bus.
SCU
Main CPU
INT
TIMER
CPU-Bus CPU A-Bus
A-Bus
I/F I/F
DSP DMA B-Bus
B-Bus
I/F
Figure 1.2 Block Diagram
SCU User's Manual 3
1.2 SCU Mapping
Figure 1.3 shows the mapping operation.
00000000 H
ROM Access Region 512 Kbyte
00080000 H
00100000 H
SMPC Region 128 byte
00100080 H
00180000 H
Backup-RAM Region 64 Kbyte
00190000 H ~
External Area 1 Region ~
00200000 H
Work-RAM-L Region 1 Mbyte
00300000 H
01000000 H
MINIT Region 4 byte
01000004 H
01800000 H
SINIT Region 4 byte
01800004 H
02000000 H
A-Bus CS0 Region 32 Mbyte
04000000 H
A-Bus CS1 Region 16 Mbyte
05000000 H
A-Bus Dummy Region 8 Mbyte
05800000 H
A-Bus CS2 Region 1 Mbyte
05900000 H
1 Mbyte
05A00000 H Sound Region about 1 Mbyte
05B00EE4 H
05C00000 H VDP 1 Region 192 Kbyte
05CC0000 H
05D00000 H VDP 1 Region 24 byte
05D00018 H
05E00000 H
VDP 2 Region 512 Kbyte
05E80000 H
05F00000 H VDP 2 Region 4 Kbyte
05F01000 H
05F80000 H VDP 2 Region 288 byte
VDP 2 Region
05F80120 H 05FC0000 H
05FE0000 H SCU Register Region 208 byte
05FE00D0 H
06000000 H SCU Register Region Region
Work RAM-H 1 Mbyte
06100000 H
07FFFFFF H
Indicates areas that can't be accessed
Figure 1.3 SCU Mapping (Cache_address)
4
Operation of Cache Hit
If a hit is made to the cache during access to an area that is rewritable by non-CPU
devices such as the work RAM of an I/O port, an external device, or a SCU register,
a value different from the actual value could be returned. When this happens, the
cache-through area must be accessed.
Figure 1.4 explains cache hit operations, and Figure 1.5 shows cach-through opera-
tions.
Data read from device B
Cache A Device Reads address 5C00000 H.
SCU Data is FFFFFFFF H
B Device CPU can write data to cache
CPU
Write from device A to B (DMA)
Cache A Device Cache does not change.
SCU
Address 5C00000H clears to 0
B Device
CPU
Accesses cache address area Accesses cache-through area
Cache A Device Cache A Device
SCU SCU
B Device B Device
CPU CPU
Address 5C00000H is read again. Reads again from device B without
Data FFFFFFFF H inside cache accessing the cache. Data is 0.
becomes valid. Address is 25C00000H.
arrow indicates the flow of data
Figure 1.4 Explanation of Cache Hit Operation
SCU User's Manual 5
20000000 H
ROM Access Region 512 Kbyte
20080000 H
20100000 H
SMPC Region 128 byte
20100080 H
20180000 H
Backup-RAM Region 64 Kbyte
20190000 H ~
External Area 1 Region ~
20200000 H
Work-RAM-L Region 1 Mbyte
20300000 H
21000000 H
MINIT Region 4 byte
21000004 H
21800000 H
SINIT Region 4 byte
21800004 H
22000000 H
A-Bus CS0 32 Mbyte
24000000 H
A-Bus CS1 16 Mbyte
25000000 H
A-Bus Dummy 8 Mbyte
25800000 H
A-Bus CS2 1 Mbyte
25900000 H
1 Mbyte
25A00000 H Sound Region about 1 Mbyte
25B00EE4 H
25C00000 H VDP 1 Region 192 Kbyte
25CC0000 H
25D00000 H VDP 1 Region 24 byte
25D00018 H
25E00000 H
VDP 2 Region 512 Kbyte
25E80000 H
25F00000 H VDP 2 Region 4 Kbyte
25F01000 H
25F80000 H VDP 2 Region 288 byte
VDP 2 Region
25F80120 H 05FC0000 H
25FE0000 H SCU Register Region 208 byte
25FE00D0 H
26000000 H SCU Register Region Region
Work RAM-H 1 Mbyte
26100000 H
27FFFFFF H
Indicates areas that can't be accessed
Figure 1.5 SCU Mapping (Cache_through_address)
6
1.3 SCU Register Map
Figure 1.6 shows a map of the SCU register. The SCU register is assigned to the
highest address in the SCU mapping region and, as shown in Figure 1.3, maintains a
208 byte area. Next, a map of each register region is shown.
25FE0000 H
Level 0 DMA Set Register 32 byte
25FE0020 H
Level 1 DMA Set Register 32 byte
25FE0040 H
Level 2 DMA Set Register 32 byte
25FE0060 H
DMA Forced Stop 16 byte
25FE0070 H
DMA Status Register 16 byte
25FE0080 H DSP Program Control Port 4 byte
25FE0084 H DSP Program RAM DataPort 4 byte
25FE0088 H DSP Data RAM Address Port 4 byte
25FE008C H DSP Data RAM DataPort 4 byte
25FE0090 H Timer 0 Compare Register 4 byte
25FE0094 H Timer 1 Set Data Register 4 byte
25FE0098 H Timer 1 Mode Register 4 byte
25FE009C H Free 4 byte
25FE00A0 H Interrupt Mask Register 4 byte
25FE00A4 H Interrupt Status Register 4 byte
25FE00A8 H A-Bus Interrupt Acknowledge 4 byte
25FE00AC H Free 4 byte
25FE00B0 H A-Bus Set Register 8 byte
25FE00B8 H A-Bus Refresh Register 4 byte
25FE00BC H
Free 8 byte
25FE00C4 H SCU SDRAM Select Register 4 byte
25FE00C8 H SCU Version Register 4 byte
25FE00CC H Free 4 byte
25FE00CF H
Figure 1.6 SCU Register Map
SCU User's Manual 7
Level 2-0 DMA Set Register
Figure 1.7 is a map of the Level 2-0 DMA set register. Parameters required for DMA
transfer are stored in this register. There are three DMA levels (from level 0 to level
2), as there are in the SCU register map (Figure 1.6). As a result, the addresses in
Figure 1.7 are shown as relative addresses.
31 24 16 8 0
00 H Read Address (in bytes) (R/W)
04 H Write Address (in bytes) (R/W)
08 H Transfer byte number (in bytes) (R/W)
0C H 1 2 (W)
10 H 3 4 (W)
14 H 5 6 7 8 (W)
18 H
1C H
Inside graphic:
1. Read address add value 5. DMA mode bit (=0:Direct Mode / =1:Indirect Mode)
2. Write address add value 6. Read address update bit (=0:Save / =1:Revise)
3. DMA enable bit (=0:Disable / =1:Enable) 7. Write address update bit (=0:Save / =1:Update )
4. DMA starting bit 8. DMA start factor select bit
Figure 1.7 Level 2-0 DMA Set Register Map
DMA Force-Stop Register
Figure 1.8 is a map of the DMA force-stop register. This register has a bit that forces
the DMA operation to stop. However, if the DMA is forced to stop, it can no longer
be used. This register should not be used except for debugging.
31 0
25FE0060 H 1 (W)
Inside graphic:
1. DMA force-stop bit (=1:DMA force-stop)
Figure 1.8 DMA Force-Stop Register Map
8
DMA Status Register
Figure 1.9 is a map of the DMA status register. This register shows level 2-0 condition
status.
31 24 16 8 0
25FE007C H 1 2 3 4 5 6 7 8 9 1011 1213 (R)
Inside graphic:
1. DMA DSP-Bus access flag (=0: no access /=1:access)
2. DMA B-Bus access flag (=0: no access / =1:access) 8. Level 1 DMA standby (=0:stop/=1:standby)
3. DMA A-Bus access flag (=0: no access / =1:access) 9. Level 1 DMA in operation (=0:stop/=1:operate)
4. Level 1 DMA interrupt(=0:stop/=1:interrupt) 10. Level 0 DMA stand by (=0:stop/=1:standby)
5. Level 0 DMA interrupt(=0:stop/=1:interrupt) 11. Level 0 DMA in operation (=0:stop/=1:operate)
6. Level 2 DMA standby (=0:stop/=1:standby) 12. DSP side DMA in stand by (=0:stop/=1:standby)
7. Level 2 DMA in operation (=0:stop/=1:operate) 13. DSP side DMA in operation (=0:stop/=1:operate)
Figure 1.9 DMA Status Register Map
DSP Program Control Port
Figure 1.10 is a map of the DSP program control port. This is the DSP control register.
It stores both the DSP operation start address and end address.
31 26 24 16 15 7 0
25FE0080 H 12 3 4 5 6 7 8 9 1011 Prog RAM address (R/W)
Inside graphic:
1. EX = cancels pause briefly (=0: no execute/=1:execute) 7. Overflow flag
2. EX = executes pause briefly (=0: no execute/=1:execute) 8. Program end interrupt flag
3. D0 bus use DMA transfer execution flag
4. Sine flag 9. Program step execute control bit (=0:no execute/=1:execute)
5. Zero flag 10. Program execute control (=0:stop/=1:execute)
6. Carry flag 11. Program counter load authorization (=0:no execute/=1:execute)
Figure 1.10 DSP Program Control Port Map
SCU User's Manual 9
DSP Program RAM Data Port
Figure 1.11 is a map of the DSP program RAM data port. This port is used as a
go-between when transferring program data from the CPU to the DSP.
31 0
05FE0084 H Program RAM Data (W)
Figure 1.11 DSP Program RAM Data Port Map
DSP Data RAM Address Port
Figure 1.12 is a map of the DSP data RAM address port. This port indicates the data
RAM address while accessing the data RAM inside DSP from the CPU.
31 7 0
05FE0088 H Data RAM Address (W)
Figure 1.12 DSP Data RAM Address Port Map
DSP Data RAM Data Port
Figure 1.13 is a map of the DSP data RAM data port. The content of the address
shown by the DSP data RAM address port is stored. Data written from the CPU is
stored in the DSP data RAM and data read from the CPU can fetch RAM data inside
the DSP.
31 0
05FE008C H Data RAM Data (R/W)
Figure 1.13 DSP Data RAM Data Port Map
10
Timer 0 Compare Register
Figure 1.14 is the map of the timer 0 compare register. Timer 0 gets in sync with V-
Blank-IN interrupt (See 2.2 Interrupt Control) and causes interrupt to occur. The opera-
tion is explained in section 2.2 and the register contents are explained in chapter 3.
31 9 0
05FE0090 H Counter Value (W)
Figure 1.14 Timer 0 Compare Register Map
Timer 1 Set Data Register
Figure 1.15 is the map timer 1 set data register. Timer 1 is data-set by H-Blank-IN inter-
rupt (See 2.2 Interrupt Control) and decremented by 7 MHz cycles. Interrupt occurs
when data is 0. The operation is explained in section 2.2 and the register contents are
explained in chapter 3.
31 8 0
05FE0094 H Set Data (W)
Figure 1.15 Timer 1 Set Data Register Map
Timer 1 Mode Register
Figure 1.16 is a map of the timer 1 mode register. This register indicates the timing by
which Time 1 is generated. The operation is explained in section 2.2 and the register
contents are explained in chapter 3.
31 8 0
05FE0098 H 2 (W)
Inside graphic:
1. Timer 1 mode bit =0:occurs at each line
=1:occurs only for lines designated by timer 0
2. Time operation enable bit =0: Timer operation OFF
=1 : Timer operation ON
Figure 1.16 Timer 1 Mode Register Map
SCU User's Manual 11
Interrupt Mask Register
Figure 1.17 shows the map of the interrupt mask register. When this bit is 0, interrupt
is not masked and occurs as needed. When the bit is 1, interrupt will not occur be-
cause it is masked. Chapter 3 has more information about bit 0 (inside graphic, no. 15)
to bit 13 (inside graphic, no. 2).
31 15 0
05FE00A0 H 1 2 3 4 5 6 7 8 9 10 1112131415 (W)
Inside graphic:
1. A-Bus interrupt mask bit
2~15 Interrupt mask bit
Figure 1.17 Interrupt Mask Register Map
Interrupt Status Register
Figure 1.18 shows the map of the interrupt status register. Because this register is able
to read and write, when reading it shows that interrupt won’t occur when bit data is 0,
and will occur when bit data is 1. When writing, interrupt is reset if 0 is written, and
maintains the current interrupt status when 1 is written. See chapter 3 for details
about this register.
31 0
05FE00A4 H 1 2 3 4 5 6 7 8 9 10 1112131415 16 171819 2021222324 252627282930 (R/W)
Inside graphic:
1~30 Interrupt status bit
Figure 1.18 Interrupt Status Register Map
A-Bus Interrupt Acknowledge Register
Figure 1.19 shows a map of the A-Bus interrupt acknowledge. This is a read/write bit
that has different meanings when reading vs. when writing. See chapter 3 for details.
31 0
25FE00A8 H 1 (R/W)
Inside graphic:
1. READ: A-Bus interrupt acknowledge significant bit (=0:insignificant / =1:significant)
WRITE: A-Bus interrupt acknowledge significant bit (=0:insignificant / =1:significant)
Figure 1.19 A-Bus Interrupt Acknowledge Register Map
12
A-Bus Set Register
Figure 1.20 shows the map of the A-Bus set register. Each pre-read significant bit,
precharge insertion bit, and external wait significant bit is insignificant at 0 and
significant at 1. See chapter 3 for more information.
31 0
25FE00B0 H 1 2 3 4 5 6 7 8 9 10 1112 1314 1516171819 20 212223242526272829 30 (W)
25FE00B4 H 31323334 3536 3738394041424344 454647484950 51 52 (W)
Inside graphic:
1. CS0 space, pre-read significant bit 31. CS2 space, pre-read significant bit
2. CS0 space, precharge insertion bit after write 32. CS2 space, precharge insertion bit after write
3. CS0 space, precharge insertion bit after read 33. CS2 space, precharge insertion bit after read
4. CS0 space, external wait significant bit 34. CS2 space, external wait significant bit
5~8. CS0 space, burst cycle wait no. set 35~36. CS2 space, burst length set bit
9~12. CS0 space, single cycle wait no. set 37. Bus size set bit (0=16 bit 1=8 bit)
13~14. CS0 space, burst length set 38. Spare space, pre-read significant bit
15. CS0 space, bus size set bit (0=16bit 1=8bit) 39. Spare space, precharge insertion after write
16. CS1 space, pre-read significant bit 40. Spare space, precharge insertion after read
17. CS1 space, precharge insertion bit after write 41. Spare space, external wait significant bit
18. CS1 space, precharge insertion bit after read 42~45. Spare space, burst cycle wait no. set bit
19. CS1 space, external wait significant bit 46~49. Spare space, normal cycle wait no. set bit
20~23. CS1 space, burst cycle wait no. set 50~51. Spare space, burst length set bit
24~27. CS1 space, normal cycle wait no. set 52. Spare space, bus size set bit (0=16bit 1=8bit)
28~29. CS1 space, burst length set bit
30. CS1 space, bus size set bit (0=16bit 1=8bit)
Figure 1.20 A-Bus Set Register Map
A-Bus Refresh Register
Figure 1.21 shows the map of the A-Bus refresh register. This register performs the
settings for A-Bus refresh.
31 4 0
25FE00B8 H 1 2 3 4 5 (W)
Inside graphic:
1. A-Bus refresh output significant bit (=0:insignificant / =1:significant)
2~5. A-Bus refresh wait number set bit
Figure 1.21 A-Bus Refresh Register Map
SCU User's Manual 13
SCU SDRAM Select Register
Figure 1.22 shows the map of the SCU SDRAM select register.
31 0
25FE00C4 H 1 (R/W)
Inside graphic:
1. Work-SDRAM select bit (=0:2 Mbit x2 / =1:4 Mbit x 2)
Figure 1.22 SCU SDRAM Select Register Map
SCU Version Register
Figure 1.23 shows the map of the SCU version register.
31 0
25FE00C8 H 1 234 (R)
Inside graphic:
1~4. Version number‘
Figure 1.23 SCU Version Register Map
14
CHAPTER 2 OPERATION
Chapter 2 Contents
2.1 DMA Transfer ....................................................................................... 16
Basic Operation of DMA ...........................................................16
DMA Mode .................................................................................18
Example of A Specific Use ........................................................21
2.2 Interrupt Control .................................................................................. 27
Blanking Interrupt ......................................................................29
Timer Interrupt ...........................................................................30
DSP-End Interrupt .....................................................................33
Sound-Request Interrupt ...........................................................33
SMPC Interrupt ..........................................................................33
PAD Interrupt .............................................................................33
DMA End Interrupt ...................................................................33
DMA-Illegal Interrupt ...............................................................33
Sprite Draw End Interrupt ........................................................33
2.3 DSP .......................................................................................................34
DSP Control from the Main CPU .............................................34
SCU User's Manual 15
2.1 DMA Transfer
Basic Operation of DMA
Figure 2.1 shows basic DMA operation. This DMA is basically long word access
through the DMA controller buffer, but if the start address and end address are not
in long word boundaries, reads and writes are made in byte units, and DMA transfer
can be executed.
Figure 2.1 is an example of DMA transfer from transfer source address 1H - 50H to
transfer destination address 6H - 55H. However, since the long word boundary in
the transfer source is 4H, 1H - 3H is read in byte units. Since the long word bound-
ary in the transfer destination is 8H, the first 2 bytes of read data are written to 6H -
7H in byte units. Moreover, the transfer source end address is 50H, but since the
long word boundary is up to 4FH, the data in 50H is read in byte units. On the other
hand, since the transfer destination end address is 55H but the long word boundary
is up to 53H, the last two bytes read are written to 54H - 55H in byte units.
Source Buffer Destination
read write
1st byte 1st byte 1st byte
1H 6H
2nd byte 2nd byte 2nd byte
2H 7H
3rd byte 3rd byte 3rd byte
3H 8H
4th byte 4th byte 4th byte
4H 9H
5th byte 5th byte 5th byte
5H AH
6th byte 6th byte 6th byte
6H BH
7th byte 7th byte 7th byte
7H CH
8th byte 8th byte 8th byte
8H DH
9th byte 9th byte 9th byte
9H EH
~ ~ ~ ~ ~ ~
4BH 75th byte 75th byte 50H 75th byte
76th byte 76th byte 51H 76th byte
4C H
77th byte 77th byte 77th byte
4D H 52H
78th byte 78th byte 78th byte
4EH 53H
79th byte 79th byte 79th byte
4F H 54H
80th byte 80th byte 55H 80th byte
50H
Access in long word units Access in bytes
Figure 2.1 DMA Transfer Basic Operation
16
There are two methods of activating the SCU’s DMA transfer control.
1) activate DMA from the Main CPU
2) activate DMA from the DSP
Figure 2.2 shows the DMA transferable area when activated from the main CPU.
Figure 2.3 shows the DMA transferable area when activated from the DSP.
Work RAM-H Area
A-Bus Connection B-Bus Connection
Processor Processor
Figure 2.2 DMA Transferable Area when activated from the Main CPU
DSP Area
A-Bus Connection B-Bus Connection
Work RAM-H Area
Processor Processor
Figure 2.3 DMA Transferable Area when activated from the DSP
SCU User's Manual 17
DMA Mode
The SCU DMA mode has the following two modes:
1) Direct Mode
2) Indirect Mode
Direct Mode
Data is transferred only in byte numbers shown as transfer byte numbers directly
using address values of separate level DMA set registers, and from the address
memory shown by the read address register to the address memory shown by the
written address register. One transfer is implemented per start up, then DMA ends.
Figure 2.4 shows the DMA transfer operation of the direct mode.
DMA Set Register
Read Address
Write Address
Transfer Byte Number
Address Add Value
DMA Authorization Bit
Mode, Update, Select
Transfer Source Transfer Destination
Read Write
Address Address
. .
. DMA Transfer .
. .
. .
Figure 2.4 Direct Mode DMA Transfer Operation Map
18
Indirect Mode
The indirect mode implements DMA transfer by indirectly using the DMA set regis-
ter at a level different from the Direct mode mentioned earlier. The address value
and byte number stored by the Direct mode in the set register are stored in the
indirect mode temporary buffer by the Indirect mode, and DMA transfer is repeated
until the end code is detected. Thus, the Indirect mode can implement more than
one DMA transfer when activated once. Figure 2.5 shows the execution flow of
Indirect mode DMA.
Indirect Mode DMA
Parameters used for transfer are
copied in a temporary buffer
N
End Code Exists
DMA Transfer DMA Transfer
End
Figure 2.5 Indirect Mode DMA Transfer Flow
SCU User's Manual 19
When the Indirect mode is activated, parameters of a 3 long word segment from the
address first written in the write address register (DxW) is read and stored in a
temporary buffer. Next, the actual DMA is executed using the parameters. On
completion of DMA, the address parameters of DxW+CH are read and similarly
executed. This operation is repeated until the end code is detected.
The indirect mode address is incremented in 4 byte units.
DMA Set Register Execute Address Storage Buffer
Address
Write Address
Address Add Value (DxW)
First Read Address
DMA Authorization Bit First Write Address
Mode, Update, Select First Transfer Byte Number
(DxW+CH) Second Read Address
Second Write Address
Write Address
Second Transfer Byte Number
(DxW+C(N-1)H)
~ ~
End Code nth Write Address
nth Transfer Byte Number
Temporary Buffer
Read Address
Write Address
Transfer Byte Number
Transfer Source Transfer Destination
Read 1st DMA Transfer Write
Address 1 Address 1
Read 2nd DMA Transfer Write
Address 2 Address 2
Read 3rd DMA Transfer Write
Address 3 Address 3
End of DMA Transfer
Figure 2.6 Indirect Mode DMA Transfer Operation Details
20
Example of a Specific Use
Direct Mode
A 1 Kbyte transfer can be thought of as level 0 DMA from address 2000000H (A-Bus
area) to address 6000000H (work RAM). DMA (direct mode) can be executed when
operating in accordance with the following procedures.
1) Write the read address (200000H) to the read address register D0R. (Loads the
address that is read to address 25EF0000H from the CPU.)
2) Write the write address (6000000H) to the write address register D0W. (Loads
the address that is written to address 25EF0004H from the CPU.)
3) Write the transfer byte number (400H) to transfer byte number register D0C.
(Loads the transfer byte number from the CPU to address 25EF0008H.)
4) Write the address add value (101H) to address add value register D0AD.
(Loads the address add value from the CPU to address 25EF000CH. Details of
the address add value are listed in the address add value of this section. The
address add value indicated in the normal DMA is 101H. )
5) The DMA mode is 0, and the address update bit and DMA start factor are set as
necessary and written to mode/address/update/DMA start factor register
D0MD. For example, when address update is handled as the save mode and
V-Blank-IN is handled as the start factor, 0 is written to D0MD. (Loads 0 in
address 25EF0014H from the CPU.)
6) Set 1 in the DMA enable bit. When the start factor set by step 5) occurs, DMA
is activated and 1 Kbyte of data is transferred by level 0 from address 2000000H
(A-Bus area) to address 6000000H (work RAM).
7) After DMA has ended, DMA is activated each time the start factor set in step 5)
occurs. The operation at that time changes according to the values of the read
address update bit (D0RUP) and write address update bit (D0WUP). Figure 2.7
shows DMA operation changes by the address update bit.
Steps 1) to 5) do not have to be done in the same order. (When the start factor is set
in the DMA starting bit, DMA starts each time the DMA operation bit is set to 1 by
the CPU.)
SCU User's Manual 21
When D0RUP=0 and D0WUP=0
2000000 H 6000000 H
20003FF H 60003FF H
When D0RUP=0 and D0WUP=1
2000000 H 6000000 H
20003FF H 6000400 H
When D0RUP=1 and D0WUP=0
2000000 H 6000000 H
2000400 H 60003FF H
When D0RUP=1 and D0WUP=1
2000000 H 6000000 H
2000400 H 6000400 H
First DMA transfer Second DMA transfer
Figure 2.7 Differences in DMA Operations according to the Address update Bit
When the read address update bit is 0, the same address is referred to (read to) both
the first and second time. When the read address update bit is 1, the second read
starts after the address following the first read.
When the write address update bit is 0, write is executed to the same address for
both the first and second time. When the write address update bit is 1, the second
write starts after the address following the first write.
22
Indirect Mode
The Indirect mode is used when executing DMA transfer more than once by starting
once. The Indirect mode is not set in a register as is the Direct mode, but uses a
method of executing DMA by accessing the register through RAM. For example,
consider a case in which three DMA transfers are to be continuously (consecutively)
executed at level 0 through work RAM area (6000000H).
(a) 20HByte DMA transfer from 4000000H to 5C00000H
(b) 10HByte DMA transfer from 5E00000H to 6080000H
(c) 15HByte DMA transfer from 5A00000H to 6081000H
DMA (Indirect mode) can be executed if operated in accord with the following steps.
1) As shown in Figure 2.8, data is written in long word units from the work RAM
area (6000000H).
6000000H 4 00 0 00 0 H
5 C0 0 00 0 H
2 0H
600000CH 5 E00 0 00 H
6 08 0 00 0 H
1 0H
6000018H 5 A00 0 00 H
6 08 1 00 0 H
8 00 0 00 1 5H
6000024H
Figure 2.8 Example of Data Write
2) DMA parameter source address (6000000H) is written to the write address
register (D0W).
3) The address add value (101H) is loaded to the address add value register D0AD.
(The address add value is written from the CPU to address 25FE000CH.) Infor-
mation on the address add value is described in the address add value of this
section. The address add value indicates 101H in normal DMA.
4) The DMA mode is 1 and the address update bit and DMA start factor are set as
required and written to mode/address/update /DMA start factor register D0MP.
For example, when address update is handled as the retain mode and V-Blank-
IN is handled as the start factor, 1000000H is written to D0MD. (Loads 1000000H
in address 25FE0014H from the CPU.)
SCU User's Manual 23
5) “1” is set in the DMA enable bit, DMA is activated when the start factor set by
step 4) occurs. DMA transfer (a) to (c) is executed in order until the DMA end
code is detected. The DMA end code is the end notification code of the DMA
indirect mode that exists only in the work RAM area. DMA transfer continues as
long as “1” of this bit remains undetected.
Steps 1) to 4) do not need to be done in the same order. The read address register
(D0R), transfer byte number register (D0C), and address add value register (D0AD),
which must be set in the Direct mode, do not need to be set in the Indirect mode.
When the DMA transfers listed below are registered in memory, DMA transfer is
restarted after the above process ends. Restart can be done only by repeating the
operation in step (4) above.
(d) 30HByte DMA transfer from 5000000H to 6100000H.
(e) 25HByte DMA transfer from 5100000H to 6200000H.
The contents from the work RAM area 6000000H are shown below in Figure 2.9.
DMA starts each time the start factor set by (5) occurs.
6000000H 4 00 0 00 0 H
5 C0 0 00 0 H
2 0H
600000CH 5 E00 0 00 H
6 08 0 00 0 H
1 0H
6000018H 5 A00 0 00 H
6 08 1 00 0 H
8 00 0 00 1 5H
6000024H 5 00 0 00 0 H
6 09 0 00 0 H
3 0H
6000030H 5 10 0 00 0 H
6 0A0 0 00 H
8 00 0 00 2 5H
600003CH
Figure 2.9 Work RAM Area Contents
24
The operation at restart differs depending on whether the DMA mode is in save
mode or update mode. Recognition of the save/update mode of the Indirect mode
is performed and judged by the write address update bit.
• For Save mode (write address update bit = 0), after one DMA transfer is
completed, because the address accessing the parameters is saved at 6000000H,
(a) ~ (c) DMA transfer is re-implemented.
• For update mode (write address update bit = 1), after one DMA transfer is
completed, because the address accessing the parameters is updated at 6000024H,
(d) ~ (e) DMA transfer is implemented.
Address Add Value
DMA normally accesses continuous areas, but by setting the address add value, the
addresses of fixed intervals can be accessed. This function is effective when chang-
ing part of continuously arranged parameters like the VDP1 command table. An
example is 32 blocks as one 20H byte table from address 5C00000H, among which
the parameters of each 8 byte block are rewritten one time. Change parameters that
have 40H bytes from address 6000000H are set by the following steps and the transfer
process is implemented when transferring via level 0 of DMA.
1) Write the read address 6000000H to read address register D0R.
2) Write the write address 5C00008H to write address register D0W.
3) Write transfer byte number 40H to transfer byte number register D0C.
4) Write the address add value 105H to address add value register D0AD. Here, the
low 3 bits (5=101B) updates the address for each 20H.
5) Set the DMA mode to 0 and set the address update bit and DMA start factor as
required. Write to the mode/address /update/DMA start factor register D0MD.
For example, 0 is written to D0MD when V-Blank-IN is the starting factor and
address update is in a retain mode.
SCU User's Manual 25
6) Set the DMA enable bit to 1. DMA is activated when the starting factor set in
step 5) occurs and the slanted line area in Figure 2.10 is rewritten once.
16 bit
5C00000 H
5C00008 H
Table 1
5C00020 H
5C00028 H
Table 2
5C00030 H
5C003E0H
5C003E8H
Table 32
Figure 2.10 DMA Transfer by Setting Address Add Value
Steps 1) through 5) do not have to be in the same order.
26
2.2 Interrupt Control
Table 2.1 shows the bit allocation of interrupt factors. Bit allocation shows the inter-
rupt register status. Level 1 is the lowest interrupt level and level F is the highest.
Details are given below for each interrupt factor.
Table 2.1 Interrupt Factors
Bit Interrupt Factors Interrupt Source Vector Number Level
Allocation
bit 0 V-Blank-IN VDP2 Vector 40 Level F
bit 1 V-Blank-OUT VDP2 Vector 41 Level E
bit 2 H-Blank-IN VDP2 Vector 42 Level D
bit 3 Timer 0 SCU Vector 43 Level C
bit 4 Timer 1 SCU Vector 44 Level B
bit 5 DSP End SCU Vector 45 Level A
bit 6 Sound Request SCSP Vector 46 Level 9
bit 7 System Manager SM Vector 47 Level 8
bit 8 PAD Interrupt PAD Vector 48 Level 8
bit 9 Level-2 DMA End A-Bus Vector 49 Level 6
bit 10 Level-1 DMA End A-Bus Vector 4A Level 6
bit 11 Level-0 DMA End A-Bus Vector 4B Level 5
bit 12 DMA-illegal SCU Vector 4C Level 3
bit 13 Sprite Draw End VDP1 Vector 4D Level 2
bit 14 --
bit 15 --
bit 16 External Interrupt 00 A-Bus Vector 50 Level 7
bit 17 External Interrupt 01 A-Bus Vector 51 Level 7
bit 18 External Interrupt 02 A-Bus Vector 52 Level 7
bit 19 External Interrupt 03 A-Bus Vector 53 Level 7
bit 20 External Interrupt 04 A-Bus Vector 54 Level 4
bit 21 External Interrupt 05 A-Bus Vector 55 Level 4
bit 22 External Interrupt 06 A-Bus Vector 56 Level 4
bit 23 External Interrupt 07 A-Bus Vector 57 Level 4
bit 24 External Interrupt 08 A-Bus Vector 58 Level 1
bit 25 External Interrupt 09 A-Bus Vector 59 Level 1
bit 26 External Interrupt 10 A-Bus Vector 5A Level 1
bit 27 External Interrupt 11 A-Bus Vector 5B Level 1
bit 28 External Interrupt 12 A-Bus Vector 5C Level 1
bit 29 External Interrupt 13 A-Bus Vector 5D Level 1
bit 30 External Interrupt 14 A-Bus Vector 5E Level 1
bit 31 External Interrupt 15 A-Bus Vector 5F Level 1
SCU User's Manual 27
Table 2.2 shows by what general names the interrupt factors are called. Later de-
scriptions are based on the general name.
Table 2.2 Interrupt Factor General Names
General Names Specific Names
V-Blank-IN
Blanking Interrupt V-Blank-OUT
H-Blank-IN
Timer Interrupt Timer 0
Timer 1
Level 2-DMA End Interrupt
DMA End Interrupt Level 1-DMA End Interrupt
Level 0-DMA End Interrupt
28
Blanking Interrupt
There are three types of blanking interrupt, V-Blank-IN, V-Blank-OUT, and H-Blank-
IN. Figure 2.11 details blanking interrupt. Blanking interrupt is synchronous to the
display, and notifies the user whether a drawing is at the beginning or end.
Display Direction
V-Blank-OUT H-Blank-IN
Display Screen
Non-Display Area
V-Blank-IN
Figure 2.11 Blanking Interrupt
V-Blank-IN
Indicates the end of a display, after which nothing will be displayed on the screen
even when attempting to display data.
V-Blank-OUT
V-Blank-OUT indicates the beginning of a display. Although a display may be about
to begin, how long before interrupt occurs must be taken into consideration since it
takes time (an interval) for the actual display to materialize. V-Blank-OUT also
clears Time 0 data.
SCU User's Manual 29
H-Blank-IN
H-Blank-IN indicates the draw end of one line. Timer 0 data is incremented by this
timing.
Timer Interrupt
Time interrupt includes Timer 0 and Timer 1. Time interrupt is synchronous with
the blanking interrupt mentioned earlier and can cause interrupt to occur at dots
(points) on the screen.
Timer 0
Values are cleared by V-Blank-OUT interrupt reception and counted by
H-Blank-IN interrupt reception . Timer 0 interrupt occurs when values compared to
the Timer 0 compare register (see register details) are the same. Figure 2.12 shows
the Timer 0 occurrence process.
Display Direction
Timer 0 Clear Timer 0 Increment
(In Sync with V-Blank-OUT) (In Sync with V-Blank-IN)
Display Screen Timer 0 =0
Timer 0 =10
Timer 0 Interrupt Timer 0 =19
Occurence (Same value as
compare register)
Non-Display Area
Figure 2.12 Timer 0 Interrupt Occurrence Process
(compare register = example when set to 19)
30
Timer 1
Data of the Timer 1 data set register (see register details) is set by Timer 1 with H-
Blank-In interrupt receiving. Count down is done at a frequency (1 dot painting) of
7 MHz or about 1/4 the system clock. When the value of Timer 1 becomes 0, inter-
rupt of Timer 1 occurs. Interrupt can also be made to occur at 1 point by combining
it with Timer 0 according to the Timer 1 mode register value (see register details),
and interrupt can be caused to occur at each line independently of Timer 0. Figure
2.13 shows the process up to when Timer 1 interrupt is caused to occur in sync with
Timer 0.
Display Direction
Timer 1 Data Set
(each line)
Display Screen
Timer 1 Register = 1 Timer 1 Register = 0
Timer 0
occurence
Timer 1 Interrupt Occurence
7 MHz
Non-Display Area
V-Blank-IN
Timer 1 Decrement
Figure 2.13 Timer 1 Interrupt Process (In sync with Timer 0)
SCU User's Manual 31
Figure 2.14 shows the process up to when Timer 1 is caused to occur out of sync with
Timer 0. There is no change when operationally in sync but a judgment is made for
each line and interrupt made to occur.
Display Direction
Timer 1 Data Set
(each line)
Display Screen
Timer 1 Interrupt
occurs at each
line
7 MHz
Non-Display Area
V-Blank-IN
Timer 1 Decrement
Figure 2.14 Timer 1 Interrupt Process (out of sync with Timer 0)
32
DSP-End Interrupt
The program execution control flag (see section 3.3, E flag of the Program Control Port)
of the program control port (see section 3.3, Program Control Port) is set by the DSP
ENDI command (see section 4.5, “Command” ENDI command) and gives notice when
the program has ended. By this, the main CPU can retrieve the results calculated by
the DSP.
Sound-Request Interrupt
This interrupt occurs from the SCSP. For example, to display the volume level meter
on the screen when a CD (Compact Disk) is connected, interrupt from SCSP is used
and reported to the main.
SMPC Interrupt
Detailed information about interrupt that occurs from SMPC is listed in the SMPC
User’s Manual.
PAD Interrupt
The occurrence of this interrupt depends on the action of the user. PAD is given as
one example but other items, such as a mouse, may be connected.
DMA End Interrupt
Divided by level, this interrupt notifies the user when DMA transfer has ended.
There are three DMA levels from level 2 to level 0.
DMA-Illegal Interrupt
Notifies user that DMA cannot be executed by interrupt when executing DMA that
cannot be done using certain parameters.
Sprite Draw End Interrupt
Notifies user via VDP1 that draw has ended.
SCU User's Manual 33
2.3 DSP
DSP Control from the Main CPU
This allows control of the DSP from the main CPU. DSP items that can be controlled
from the CPU include:
1) Load DSP program
2) Access DSP data
3) Begin DSP program execution
4) Forced stop of DSP program
Load DSP Program
There are two methods in which the DSP program is loaded: by using the DSP
DMA command, and by writing directly to the DSP program RAM area from the
main CPU. Program data can be loaded if controlled from the main CPU in the
order shown below.
1) Set the program control port bits 16 and 17 to 0.
2) Write the transfer start address to the program RAM address of the same port.
If DSP is not stopped, it cannot be loaded.
3) Write sequence program data in long word units to the program RAM data port.
Figures 2.15 to 2.17 show each step of control from the CPU.
Program Control Port
bit 31 bit 17 bit 16 bit 0
Step execute Program execute
control bit control bit
0 0
STEP 1
Stops Program Execute
Figure 2.15 DSP Program Load Step 1
34
Program Control Port
bit 31 bit 7 bit 0
Program RAM Address
Program Transfer
Begin Address
STEP 2
Recognizes the Transfer Source Address
Figure 2.16 DSP Program Load Step 2
Program RAM Data Port
bit 31 bit 0
Program RAM Data Port
Data
STEP 3
Program transfer
Loads Program address counts up 1.
Figure 2.17 DSP Program Load Step 3
SCU User's Manual 35
DSP Data Access
In order to access DSP data, the DMA command of DSP can be used, but there is also
a method that accesses the DSP data RAM area from the main CPU. Data can be
accessed if controlled from the CPU in the following sequence.
1) Set the program control port bit 16 and bit 17 to 0.
2) Write the access start address to the data RAM address port.
If DSP is not stopped, it cannot be set.
3) Sequence data is accessed in long-word units through the data RAM data port.
Control methods from the CPU for each step are shown from Figure 2.18 to
Figure 2.20.
Program Control Port
bit 31 bit 17 bit 16 bit 0
Step execute Program execute
control bit control bit
0 0
STEP 1
Stops Program Execute
Figure 2.18 DSP Data Access Step 1
36
Data RAM Address Port
bit 31 bit 7 bit 0
Program RAM Address
Data Access Start Address
STEP 2
Recognizes the Access Start Address
Figure 2.19 DSP Data Access Step 2
Data RAM Data Port
bit 31 bit 0
Data RAM Data Port
Data
STEP 3
Read / Write data Data access address
counts up 1.
Figure 2.20 DSP Data Access Step 3
SCU User's Manual 37
DSP Program Execute Start
Execution of the DSP program is begun by writing of the program control port 1 to
bit 16 (see Figure 2.21). When the write is recognized, DSP begins execution from
the address stored in the program RAM address of the program control port. The
execution start address must be set before writing “1” to bit 16 of the program con-
trol port.
Program Control Port
b31 b16 b0
Program execute
control bit
Figure 2.21 DSP Program Execution Start Control from CPU
DSP Program Forced Stop
In contrast to execution start, DSP program execution forced stop is done by writing
the program control port 0 to bit 16 of the program control port. Figure 2.22 shows
the forced stop control.
Program Control Port
b31 b16 b0
Program execute
control bit
Figure 2.22 DSP Program Forced Stop Control from CPU
38
CHAPTER 3 REGISTERS
Chapter 3 Contents
3.1 Register List......................................................................................................... 40
3.2 DMA Control Registers .................................................................................... 41
Level 2-0 DMA Set Register ............................................................. 41
DMA Enable Register ....................................................................... 45
DMA Mode, Address Update, Start Factor Select Register ........ 46
DMA Forced Stop Register .............................................................. 47
DMA Status Register ........................................................................ 47
3.3 DSP Control Ports .............................................................................................. 51
DSP Program Control Port .............................................................. 51
DSP Program RAM Data Port ......................................................... 53
DSP Data RAM Address Port .......................................................... 53
DSP Data RAM Data Port ................................................................ 54
3.4 Timer Registers ................................................................................................... 55
Timer 0 Compare Register ............................................................... 55
Timer 1 Set Data Register ................................................................. 55
Timer 1 Mode Register ..................................................................... 56
3.5 Interrupt Control Registers .............................................................................. 57
Interrupt Mask Register ................................................................... 57
Interrupt Status Register .................................................................. 58
3.6 A-Bus Control Registers ................................................................................... 61
A-Bus Interrupt Acknowledge Register ........................................ 61
A-Bus Set Register ............................................................................. 62
A-Bus Refresh Register .................................................................... 72
3.7 SCU Control Registers ...................................................................................... 73
SCU SDRAM Select Register ........................................................... 73
SCU Version Register ........................................................................ 73
SCU User's Manual 39
3.1 Register List
A list of SCU registers is given in Table 3.1. Headings are divided for each register
type and each register is explained.
Table 3.1 Register List
Type Register Name Lead Address End Address Size
DMA Control Registers Level 0-DMA Set Register 25FE0000H 25FE0017H 24 byte
Level 1-DMA Set Register 25FE0020H 25FE0037H 24 byte
Level 2-DMA Set Register 25FE0040H 25FE0057H 24 byte
DMA Force-End Register 25FE0060H 25FE0063H 4 byte
DMA Status Register 25FE007CH 25FE007FH 4 byte
DSP Control Ports DSP Program Control Port 25FE0080H 25FE0083H 4 byte
DSP Program RAM Data
Port 25FE0084H 25FE0087H 4 byte
DSP Data RAM Address
Port 25FE0088H 25FE008BH 4 byte
DSP RAM Data Port 25FE008CH 25FE008FH 4 byte
Timer Registers Timer 0 Compare Register 25FE0090H 25FE0093H 4 byte
Timer 1 Set Data Register 25FE0094H 25FE0097H 4 byte
Timer 1 Mode Register 25FE0098H 25FE009BH 4 byte
Interrupt Control Interrupt Mask Register 25FE00A0H 25FE00A3H 4 byte
Registers Interrupt Status Register 25FE00A4H 25FE00A7H 4 byte
A-Bus Control Registers A-Bus Interrupt Acknowledge 25FE00A8H 25FE00ABH 4 byte
A-Bus Set Register 25FE00B0H 25FE00B7H 8 byte
A-Bus Refresh Register 25FE00B8H 25FE00BBH 4 byte
SCU Control Registers SCU SDRAM Select Register 25FE00C4H 25FE00C7H 4 byte
SCU Version Register 25FE00C8H 25FE00CBH 4 byte
40
3.2 DMA Control Registers
Level 2-0 DMA Set Register
There are three DMA levels, beginning at the highest priority level of 2 to the lowest
priority level of 0. These are explained below.
• Read Address
Figure 3.1 is the read address register. The DMA mode includes a direct mode
and an indirect mode. The value of the meaning changes for each mode.
b31 b24 b23 b16 b15 b8 b7 b0
25FE0000 (Level 0)
25FE0020 (Level 1) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
25FE0040 (Level 2)
Figure 3.1 Level 2-0 Read Address (Register: D0R, D1R, D2R) Initail value undefined
Read Address (1~27 [bit 26 ~ 0] in Figure 3.1)
DxR 26-0[x=2-0] (R/W) DMA level 2-0 Read address bit 26-0
When in the Direct mode, values being stored are transfer source addresses.
However, this has no meaning when in the Indirect mode. The register of
that level prohibits writing while DMA is operating. All address values are
expressed in bytes.
• Write Address
The write address register is shown in Figure 3.2. The DMA mode includes a
direct mode and indirect mode; the value of the meaning changes with each
mode.
b31 b24 b23 b16 b15 b8 b7 b0
25FE0004 (Level 0)
25FE0024 (Level 1) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
25FE0044 (Level 2)
Figure 3.2 Level 2-0 Write Address (Register: D0W, D1W, D2W) Initial value undefined
Write Address (1~27 [bit 26 ~ 0] in Figure 3.2)
DxW 26-0[x=2-0] (R/W) DMA level 2-0 Write address bit 26-0
When in the Direct mode, the value being stored is the transfer source ad-
dress. However, when in the Indirect mode, the address of the location where
the transfer source address of DMA transfer is executed the first time is
stored. The register of that level prohibits writing while DMA is operating.
All address values are expressed in bytes.
SCU User's Manual 41
• Transfer Byte Number
Stores the byte number to be transferred by DMA. Figure 3.3 shows the level 0
transfer byte number. Figure 3.4 shows the level 2-1 transfer byte number.
b31 b24 b23 b16 b15 b8 b7 b0
25FE0008 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
Figure 3.3 Level 0 Transfer Byte Number (Register: D0C) Initial value undefined
Level 0 transfer byte number (1~20 [bit 19 ~ 0] in Figure 3.3)
D0C 19-0 (R/W) DMA level 0 Count bit 19-0
Stores the DMA transfer byte number to be operated at level 0. The register
of that level prohibits writing while DMA is operating. This register can be
set to up to 1 MByte.
b31 b24 b23 b16 b15 b8 b7 b0
25FE0028 (Level 1)
25FE0048 (Level 2) 1 2 3 4 5 6 7 8 9 10 11 12
Figure 3.4 Level 2-1 Transfer Byte Number (Register: D1C, D2C) Initial value undefined
Level 2-1 transfer byte number (1~12 [bit 11 ~ 0] in Figure 3.4)
DxC 11-0[x=2-1] (R/W) DMA level 2-1 Count bit 11-0
Stores the DMA transfer byte number to be operated at level 1 or 2. The
register of that level prohibits writing while DMA is operating. This register
can be set to a maximum of 4 Kbytes.
• Add Value Register
Figure 3.5 shows the add value register.
25FE000C (Level 0)
b31 b24 b23 b16 b15 b8 b7 b0
25FE002C (Level 1) 1 2 3 4
25FE004C (Level 2)
Figure 3.5 Level 2-0 Address Add Value (Register: D0AD, D1AD, D2AD) Initial value 00000101H
42
Read Address Add Value (1 [bit 8] in Figure 3.5)
DxRA[x=2-0] (W) DMA level 2-0 Read address Addition data bit
Designates the add byte number of the read address. Table 3.2 shows the
read address add value. Since this is effective only for the CS2 space of the A-
Bus, everything else should set 1B. The register of that level prohibits writing
while DMA is operating.
Table 3.2 Read Address Add Value
DxRA (X=2-0) Description
0 Nothing is added
1 4 Bytes are added
Write Address Add Value (2~4 [bit 2~0] in Figure 3.5)
DxWA3-0[x=2-0] (W) DMA level 2-0 Write address Addition data bit 3-0
Designates the add byte number of the write address. Table 3.3 shows the
write address add value. This value is always effective when writing data to
the B-Bus, but is effective only for 000B or 010B data when writing to the CS2
space of the A-Bus. Data should be set to 010B when writing anywhere except
to A-Bus or B-Bus. The register of that level prohibits writing while DMA is
operating.
Table 3.3 Write Address Add Value
DxWA (X=2-0) Description
000 B Nothing is added
001 B 2 Bytes are added
010 B 4 Bytes are added
011 B 8 Bytes are added
100 B 16 Bytes are added
101 B 32 Bytes are added
110 B 64 Bytes are added
111 B 128 Bytes are added
SCU User's Manual 43
There are provisions (as in Figure 3.6) for the write address add value. As shown in
Figure 3.6, communication between the SCU and B-Bus is in 32-bit units, but in 16-
bit units between the B-Bus and processor. Thus, when transferring A ~ D data from
the SCU to the processor, as shown in Figure 3.7, the SCU can transfer A ~ D to the
B-Bus at one time but the B-Bus can only transfer to the processor after dividing A ~
B and C ~ D. From this, the difference between address 2 and address 1 can be
written and indicated as the address add value since the write address add value of
B-Bus is 2 byte units, as shown in Figure 3.8.
SCU
B-Bus
32 16
SCSP VDP1 VDP2
Figure 3.6 Communication Units Between the SCU and Processor
A A
B B Processor
SCU B-Bus SCSP
C C VDP1
VDP2
D D
32 bits of A~D is A~B, C~D are divided
output once into 2 and output
Figure 3.7 Specific Example of Transfer Between the SCU and Processor
44
Transfer SCU Transfer B-Bus Transfer Transfer
Source Units Units Destination
Address 1
Address 2
Address 2 - Address 1 can
be indicated by "Write
Address Add Value"
Figure 3.8 Write Address Add Value Indication
DMA Enable Register
This register enable execution of DMA. The register of that level prohibits writing
while DMA is operating. Figure 3.9 shows the format of this register.
25FE0010 (Level 0)
b31 b24 b23 b16 b15 b8 b7
25FE0030 (Level 1) 1
25FE0050 (Level 2)
Figure 3.9 Level 2-0 DMA Enable Bit (Register: D0EN, D1EN, D2EN) Initial Value 00000000H
DMA Enable Bit (1 [bit 8] in Figure 3.9)
DxEN[x=2-0] (W) DMA level 2-0 ENable bit
This bit enables DMA to be executed. This flag is set to 1 when DMA is
enabled. Other required data must be set in advance since DMA begins after
the flag is set.
DMA Starting Bit (2 [bit 0] in Figure 3.9)
DxGO[x=2-0] (W) DMA level 2-0 GO bit
This bit starts execution of DMA. The starting factor bit is significant only
when 111B, and when DMA is started, this bit is set to 1. DMA starts one time
per set.
SCU User's Manual 45
DMA Mode, Address Update, Start Factor Select Register
This register designates the DMA mode (direct or indirect), address update (save or
update set value), and selection of the start factor. Registers of that level prohibit
writing while DMA is operating. Figure 3.10 shows the register.
25FE0014 (Level 0)
b31 b24 b23 b16 b15 b8 b7 b0
25FE0034 (Level 1) 1 2 3 4 5 6
25FE0054 (Level 2)
Figure 3.10 Level 2-0 DMA Mode, Address Update, Start Factor Select
Register (Register : D0MD, D1MD, D2MD) Initial Value 00000007H
DMA Mode Bit (1 [bit 24] in Figure 3.10)
DxMOD[x=2-0] (W) DMA level 2-0 MODe bit
Decides the DMA mode. “0” shows the direct mode, and “1” shows the
indirect mode.
Read Address Update Bit (2 [bit 16] in Figure 3.10)
DxRUP[x=2-0] (W) DMA level 2-0 Read update UP bit
This bit decides whether to save or update the value at the time it is set for
read address. 0 means save and 1 means update. See “Example of a Specific
Use” in section 2.1 “DMA Transfer” for more information on how to operate it.
Write Address Update Bit (3 [bit 8] in Figure 3.10)
(DxWUP[x=2-0] (W) DMA level 2-0 Write update UP bit
This bit decides whether to save or update the value at the time it is set for
write address. “0” means save and “1” means update. See “Example of A
Specific Use” in section 2.1 “DMA Transfer” for more information on how to
operate it.
DMA Starting Factor Select Bit (4~6 [bit 2~0] in Figure 3.10)
DxFT2-0[x=2-0] (W) DMA level 2-0 starting FacTor bit 2-0
DMA sets the DMA enable bit and starts by receiving an outside signal se-
lected by the starting factor select bit. When the starting factor bit is 111B,
DMA starts by setting the DMA starting bit.
Table 3.4 Starting Factors
Starting Factor Bits (x=2-0) Starting Factors
DxFT2 DxFT1 DXFT0
0 0 0 V-BLANK-IN signal receive and enable bit setting
0 0 1 V-BLANK-OUT signal receive and enable bit setting
0 1 0 H-BLANK-IN signal receive and enable bit setting
0 1 1 Timer 0 signal receive and enable bit setting
1 0 0 Timer 1 signal receive and enable bit setting
1 0 1 Sound Req signal receive and enable bit setting
1 1 0 Sprite draw end signal receive and enable bit setting
1 1 1 Enable bit setting and DMA starting factor bit setting
46
DMA Forced Stop Register
This is a bit in DMA control which causes DMA forced stops. This register is posi-
tioned at address 05FE0060H (32 bit area) within the SCU. Its operation is shown by
the map below.
b31 b24 b23 b16 b15 b8 b7 b0
25FE0060 1
Figure 3.11 DMA Force-Stop Register (Register: DSTP) Initial Value 00000000H
DMA Force-Stop bit (1 [bit 0] in Figure 3.11)
DSTOP (W) DMA STOP control bit
DSTOP=1 : Stops DMA while in operation.
DMA Status Register
• Access, Interruption, Stand by, Operation Registers
This register shows the DMA bus access indication and the DMA condition for
each level. The four DMA conditions are interrupt, standby, operation, and
stop. Explained first are the high level and low level DMA operational relation
ships.
When high level DMA is operating, as shown in Figure 3.15, and launching
low level DMA currently interrupted, the operation will not occur at the time
when the low level DMA is launched (it will not be in operation). It will wait for
a period of time and then go into operation mode. This period is called Standby
(or Wait period), and this condition always exists prior to the DMA operation.
Low level DMA operates after high level DMA is completed.
When starting high level DMA while low level DMA is operating, operation
will not begin at the moment that high level DMA is started but will begin to
operate after temporarily being on standby. At this time, low level DMA is
interrupted and cannot start until high level DMA has stopped (operation ends).
SCU User's Manual 47
When Low Level DMA starts while High Level DMA is operating
Start
Low Level DMA stopped on standby in operation stopped
High Level DMA in operation stopped
When High Level DMA starts while Low Level DMA is operating
Start
High Level DMA stopped on standby in operation stopped
Low Level DMA in operation interrupted in operation
Figure 3.12 High Level DMA Operation
A 0 bit during interrupt or operation confirms that the DMA operation is stopped.
Figure 3.13 shows access, interrupt, stand by, and operation registers.
b31 b24 b23 b16 b15 b8 b7 b0
25FE007C 1 2 3 4 5 6 7 8 9 10 11 12 13
Figure 3.13 DMA Status Register (Register: DSTA) Initial Value 00000000H
DMA DSP Bus Access Flag (1 [bit 22] in Figure 3.13)
DACSD (R) DMA ACceSs DSP-Bus
Shows whether the DSP bus is being accessed during DMA. 1 means access-
ing. 0 means not accessing.
DMA B Bus Access Flag (2 [bit 21] in Figure 3.13)
DACSB (R) DMA ACceSs B-Bus
Shows whether the B bus is being accessed during DMA. 1 means accessing.
0 means not accessing.
DMA A Bus Access Flag (3 [bit 20] in Figure 3.13)
DACSA (R) DMA ACceSs A-Bus
Shows whether the A bus is being accessed during DMA. 1 means accessing.
0 means not accessing.
48
Level-1 DMA Interrupt Flag (4 [bit 17] in Figure 3.13)
D1BK (R) DMA level 1 BacK ground flag
Shows Level-1 DMA transfer execution is interrupted by the effect of high
level DMA. A 1 shows that it is currently being interrupted. A 0 shows that
level 1 DMA is not interrupted.
Level-0 DMA Interrupt Flag (5 [bit 16] in Figure 3.13)
D0BK (R) DMA level 0 BacK ground flag
Shows Level-0 DMA transfers execution is interrupted by the effect of high
level DMA. A 1 shows that it is currently being interrupted. A 0 shows that
level 0 DMA is not interrupted.
Level-2 DMA Stand by Flag (6 [bit 13] in Figure 3.13)
D2WT (R) DMA level 2 WaiT flag
Level-2 DMA transfer execution is currently shown in on standby (in wait
condition). A 1 shows the current standby condition. A 0 shows that level 2
DMA is not on standby.
Level-2 DMA Operation Flag (7 [bit 12] in Figure 3.13)
D2MV (R) DMA level 2 MoVe flag
Level-2 DMA transfer execution is currently shown in operation. A 1 shows
that it is currently in operation. A 0 shows level 2 DMA is not in operation.
Also, when both D2WT and D2MV are 0, it shows that level 2 DMA is
stopped.
Level-1 DMA Stand by Flag (8 [bit 19] in Figure 3.13)
D1WT (R) DMA level 1 WaiT flag
Level-1 DMA transfer execution is currently shown on standby. A 1 shows
the current standby condition. A 0 shows that level 1 DMA is not on standby.
Level-1 DMA Operation Flag (9 [bit 8] in Figure 3.13)
D1MV (R) DMA level 1 MoVe flag
Level-1 DMA transfer execution is currently shown in operation. A 1 shows
that it is currently in operation. A 0 shows level 1 DMA is not in operation.
Also, when D1WT, D1MV, D1BK are all 0, it shows that level 1 DMA is
stopped.
Level-0 DMA Stand by Flag (10 [bit 5] in Figure 3.13)
D0WT (R) DMA level 0 WaiT flag
Level-0 DMA transfer execution is shown to be currently on standby. A 1
shows the current standby condition. A 0 shows level 0 DMA is not on
standby.
SCU User's Manual 49
Level-0 DMA Operation Flag (11 [bit 4] in Figure 3.13)
D0MV (R) DMA level 0 MoVe flag
Level-0 DMA transfer execution is shown to be currently in operation. A 1
shows that it is currently in operation. A 0 shows that level 0 DMA is not in
operation. Also, when all D0WT, D0MV, D0BK are 0 it indicates that level 0
DMA is stopped.
DSP DMA Stand by Flag (12 [bit 1] in Figure 3.13)
DDWT (R) DMA DSP WaiT flag
DMA transfer execution of the DSP statement is shown to be currently on
standby. A 1 shows the current standby condition. A 0 shows that DSP issue
DMA is not on standby.
DSP DMA Operation Flag (13 [bit 0] in Figure 3.13)
DDMV (R) DMA DSP MoVe flag
DMA transfer execution of the DSP statement is shown to be currently in
operation. A 1 shows that it is currently in operation. A 0 shows that DSP
issue DMA is not in operation. Also, when DDWT, DDMV, D0BK are all 0, it
shows that DSP DMA is stopped.
50
3.3 DSP Control Ports
DSP Program Control Port
The DSP program control port is shown in Figure 3.14.
b31 b24 b23 b16 b15 b8 b7 b0
25FE080 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
Figure 3.14 DSP Program Control Port (Register: PPAF) Initial Value 00000000H
Execute Pause Reset Flag (1 [bit 26] in Figure 3.14)
PR (W) execute Pause Reset flag
When the program execute control flag (see below) is 1, the program pause is
reset if 1 is written to the flag and execution begins. The condition does not
change when it does not pause or when the program execute flag is 0.
Execute Pause Flag (2 [bit 25] in Figure 3.14)
EP (W) Execute Pause flag
When the program execute control flag (see below) is 1, the executing pro-
gram pauses if 1 is written to the flag. This condition does not change when
it pauses or when the program execute flag is 0.
D0-Bus DMA Execution Flag (3 [bit 23] in Figure 3.14)
T0 (R) Transfer 0
This flag becomes 1 when executing DMA using the D0-Bus.
Sine Flag (4 [bit 22] in Figure 3.14)
S (R) Sign flag
This flag becomes 1 when the operation result is negative.
Zero Flag (5 [bit 21] in Figure 3.14)
Z (R) Zero flag
This flag becomes 1 when the operation result is 0.
Carry Flag (6 [bit 20] in Figure 3.14)
C (R) Carry flag
This flag becomes 1 when carry occurs in the operation result.
Overflow Flag (7 [bit 19] in Figure 3.14)
V (R) oVerflow flag
This flag becomes 1 when the operation results causes overflow (or
underflow). This flag is reset by the read out.
SCU User's Manual 51
Program End Interrupt Flag (8 [bit 18] in Figure 3.14)
E (R) End flag
This flag becomes 1 and causes program end interrupt to occur when the
program ended by the ENDI command is detected. This flag is reset by the
read out.
Step Execute Control BIt (9 [bit 17] in Figure 3.14)
ES (W) Execute Step control bit
The program executes 1 step if a 1 is written while the program is stopped
(when the program execute control flag is 0). Invalid while executing.
Program Execute Control Flag (10 [bit 16] in Figure 3.14)
EX (R/W) program EXecute control flag
Controls execution of program. Execution begins by writing 1 and stops by
writing 0. When this flag is read out, it can be determined whether execution
is in progress (1) or is stopped (0).
Program Counter Transfer Enable Bit (11 [bit 15] in Figure 3.14)
LE (W) Load Enable bit
This bit decides whether or not the program RAM address (see below) is to be
loaded to the program counter. The program RAM address is loaded to the
program counter if 1 is written to the bit. The address can not be loaded
when the program is being executed (when the program execute control flag
is 1).
Program RAM Address (12~19 [bit 7~0] in Figure 3.14)
P7-0 (R/W) Program RAM address bit 7-0
Stores the address of the program RAM. Also, is able to set the begin address
and read the stop address.
52
DSP Program RAM Data Port
Details of the DSP program RAM data port are shown in Figure 3.15. Data is loaded
into the program RAM by writing data stored in the program RAM area from the CPU.
After loading, the program RAM address of the program control port counts up 1.
However, write is prohibited while the program is being executed (when program
execute control flag is 1). This port is write only.
b31 b24 b23 b16 b15 b8 b7 b0
25FE0084 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Figure 3.15 DSP Program RAM Data Port (Register: PPD) Initial Value Undefined
DSP Data RAM Address Port
The DSP data RAM address port is shown in Figure 3.16. This sets the data RAM ad-
dress to be accessed. However, write is prohibited while the program is being executed
(when program execute control flag is 1).
b31 b24 b23 b16 b15 b8 b7 b0
25FE0088 1 2 3 4 5 6 7 8
Figure 3.16 DSP Data RAM Address Port (Register: PDA) Initial Value 00000000H
Data RAM Select Bit (1~2 [bit 7~6] in Figure 3.16)
RA7-6 (W) RAM select bit bit 7-6
Shows the page of the read RAM data. Table 3.5 shows the RAM page selection.
Table 3.5 RAM Page Select
Bit
Select RAM Page
RA7 RA6
0 0 Selects RAM0
0 1 Selects RAM1
1 0 Selects RAM2
1 1 Selects RAM3
Data RAM Address (3~8 [bit 5~0] in Figure 3.16)
RA5-0 (W) RAM address bit 5-0
Indicates the read data RAM address.
SCU User's Manual 53
DSP Data RAM Data Port
Details of the DSP data RAM data port are shown in Figure 3.17. The data RAM
data is accessed from this port. The data RAM address of the DSP data RAM ad-
dress port increases by 1 when accessed. However, access is prohibited while the
program is being executed (when program execute control flag is 1). This port can
read and write.
b31 b24 b23 b16 b15 b8 b7 b0
25FE008C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Figure 3.17 DSP Data RAM Data Port (Register: PDD) Initial Value Undefined
54
3.4 Timer Registers
Timer 0 Compare Register
The Timer 0 compare register is shown in Figure 3.18. (Timer 0 is a counter that
increases on receiving an H-Blank-IN signal, and that is cleared by a V-Blank-END
signal.)
b31 b24 b23 b16 b15 b8 b7 b0
25FE0090 1 2 3 4 5 6 7 8 9 10
Figure 3.18 Timer 0 Compare Register (Register: T0C) Initial Value Undefined
Timer 0 Compare Data (1~1
0 [bit 9~0] in Figure 3.18)
TOC9-0 (W) Timer 0 Compare data bit 9-0
When the value of Timer 0 is equal to the value of this register, timer 0 inter-
rupt will occur.
Timer 1 Set Data Register
The Timer 1 set data register is shown in Figure 3.19. (Timer 1 sets the data of this
register by the H-Blank-IN signal receive, automatically counts down by 7 MHz, and
when the Timer 1 value is 0, executes interrupt.)
b31 b24 b23 b16 b15 b8 b7 b0
25FE0094 1 2 3 4 5 6 7 8 9
Figure 3.19 Timer 1 Set Data Register (Register: T1S) Initial Value Undefined
Timer 1 Set Data (1~9 [bit 8~0] in Figure 3.19)
T1S8-0 (W) Timer 1 Set data bit 8-0
Sets the value that is set in Timer 1.
SCU User's Manual 55
Timer 1 Mode Register
Details of the Timer 1 mode register are shown in Figure 3.20. How occurrence of
Time is set is decided by this register.
b31 b24 b23 b16 b15 b8 b7 b0
25FE0098 1 2
Figure 3.20 Timer 1 Mode Register (Register: T1MD) Initial Value 00000000H
Timer 1 Mode Bit (1 [bit 8] in Figure 3.20)
T1MD (W) Timer 1 MoDe bit
This bit specifies the occurrence of Timer 1. Table 3.6 shows what happens
when it occurs.
Table 3.6 Timer 1 Occurrence Selection
T1MD Occurrence Selection
0 Interrupt occurs at each line
1 Occurs only at lines indicated by Timer 0
Timer Enable Bit (2 [bit 0] in Figure 3.20)
TENB (W) Timer ENaBle bit
This bit turns the timer operation ON/OFF. Operation details are shown in
Table 3.7.
Table 3.7 Timer Operation Contents
TENB Timer Operation
0 Timer operation off
1 Timer operation on
56
3.5 Interrupt Control Registers
Interrupt Mask Register
The interrupt register is shown in Figure 3.21. It does not mask interrupt when the
value of this register is 0, and masks interrupt when it is 1.
b31 b24 b23 b16 b15 b8 b7 b0
25FE00A0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Figure 3.21 Interrupt Mask Register (Register: IMS) Initial Value 0000BFFFH
A-Bus Interrupt Mask Bit (1 [bit 15] in Figure 3.21)
IMS15 (W) Interrupt MaSk bit bit 15
Indicates whether to mask the A-Bus interrupt.
Sprite Draw End Interrupt Mask Bit (2 [bit 13] in Figure 3.21)
IMS13 (W) Interrupt MaSk bit bit 13
Indicates whether to mask the sprite draw end interrupt.
DMA Illegal Interrupt Mask Bit (3 [bit 12] in Figure 3.21)
IMS12 (W) Interrupt MaSk bit bit 12
Indicates whether to mask the DMA illegal interrupt.
Level-0-DMA End Interrupt Mask Bit (4 [bit 11] in Figure 3.21)
IMS11 (W) Interrupt MaSk bit bit 11
Indicates whether to mask the level-0-DMA end interrupt.
Level-1-DMA End Interrupt Mask Bit (5 [bit 10] in Figure 3.21)
IMS10 (W) Interrupt MaSk bit bit 10
Indicates whether to mask the level-1-DMA end interrupt.
Level-2-DMA End Interrupt Mask Bit (6 [bit 9] in Figure 3.21)
IMS9 (W) Interrupt MaSk bit bit 9
Indicates whether to mask the level-2-DMA end interrupt.
PAD Interrupt Mask Bit (7 [bit 8] in Figure 3.21)
IMS8 (W) Interrupt MaSk bit bit 8
Indicates whether to mask the interrupt from PAD.
System Manager Interrupt Mask Bit (8 [bit 7] in Figure 3.21)
IMS7 (W) Interrupt MaSk bit bit 7
Indicates whether to mask the interrupt from the system manager.
Sound Request Interrupt Mask Bit (9 [bit 6] in Figure 3.21)
IMS6 (W) Interrupt MaSk bit bit 6
Indicates whether to mask the sound request interrupt.
SCU User's Manual 57
DSP End Interrupt Mask Bit (10 [bit 5] in Figure 3.21)
IMS5 (W) Interrupt MaSk bit bit bit 5
Indicates whether to mask the DSP end interrupt.
Timer 1 Interrupt Mask Bit (11 [bit 4] in Figure 3.21)
IMS4 (W) Interrupt MaSk bit bit 4
Indicates whether to mask the Timer 1 interrupt.
Timer 0 Interrupt Mask Bit (12 [bit 3] in Figure 3.21)
IMS3 (W) Interrupt MaSk bit bit 3
Indicates whether to mask the Timer 0 interrupt.
H-Blank-IN Interrupt Mask Bit (13 [bit 2] in Figure 3.21)
IMS2 (W) Interrupt MaSk bit bit 2
Indicates whether to mask the H-Blank-IN interrupt.
V-Blank-OUT Interrupt Mask Bit (14 [bit 1] in Figure 3.21)
IMS1 (W) Interrupt MaSk bit bit 1
Indicates whether to mask the V-Blank-OUT interrupt.
V-Blank-IN Interrupt Mask Bit (15 [bit 0] in Figure 3.21)
IMS0 (W) Interrupt MaSk bit bit 0
Indicates whether to mask the V-Blank-IN interrupt.
Interrupt Status Register
Figure 3.22 shows the interrupt status register.
b31 b24 b23 b16 b15 b8 b7 b0
25FE00A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
Figure 3.22 Interrupt Status Register (Register: IST) Initial Value 00000000H
These status registers are all read/write registers; the read and write meanings are as
shown in Table 3.8.
58
Table 3.8 Interrupt Status Bit Contents
Access Status Result
Read 0 Interrupt does not occur
1 Interrupt does occur
Write 0 Resets interrupt
1 Maintains current interrupt status
External Interrupt Status Bit (1~16 [bit 31-16] in Figure 3.22)
IST31-16 (R/W) Interrupt STatus bit bit 31-16
Shows the status of 16 external interrupts from external interrupt 15 (1 in
Figure 3.25) to external interrupt 0 (16 in Figure 3.25).
Sprite Draw End Interrupt Status Bit (17 [bit 13] in Figure 3.22)
IST13 (R/W) Interrupt STatus bit bit 13
Shows interrupt status of sprite draw end.
DMA Illegal Interrupt Status Bit (18 [bit 12] in Figure 3.22)
IST12 (R/W) Interrupt STatus bit bit 12
Shows interrupt status of DMA illegal.
Level-0-DMA End Interrupt Status Bit (19 [bit 11] in Figure 3.22)
IST11 (R/W) Interrupt STatus bit bit 11
Shows interrupt status of level-0-DMA end.
Level-1-DMA End Interrupt Status Bit (20 [bit 10] in Figure 3.22)
IST10 (R/W) Interrupt STatus bit bit 10
Shows interrupt status of level-1-DMA end.
Level-2-DMA End Interrupt Status Bit (21 [bit 9] in Figure 3.22)
IST9 (R/W) Interrupt STatus bit bit 9
Shows interrupt status of level-2-DMA end.
PAD Interrupt Status Bit (22 [bit 8] in Figure 3.22)
IST8 (R/W) Interrupt STatus bit bit 8
Shows status of interrupt from PAD.
System Manager Interrupt Status Bit (23 [bit 7] in Figure 3.22)
IST7 (R/W) Interrupt STatus register bit bit 7
Shows status of interrupt from the system manager.
Sound Request Interrupt Status Bit (24 [bit 6] in Figure 3.22)
IST6 (R/W) Interrupt STatus bit bit 6
Shows status of sound request interrupt.
SCU User's Manual 59
DSP End Interrupt Status Bit (25 [bit 5] in Figure 3.22)
IST5 (R/W) Interrupt STatus bit bit 5
Shows status of DSP end interrupt.
Timer 1 Interrupt Status Bit (26 [bit 4] in Figure 3.22)
IST4 (R/W) Interrupt STatus bit bit 4
Shows status of Timer 1 interrupt.
Timer 0 Interrupt Status Bit (27 [bit 3] in Figure 3.22)
IST3 (R/W) Interrupt STatus bit bit 3
Shows status of Timer 0 interrupt.
H-Blank-IN Interrupt Status Bit (28 [bit 2] in Figure 3.22)
IST2 (R/W) Interrupt STatus register bit bit 2
Shows status of H-Blank-IN interrupt.
V-Blank-OUT Interrupt Status Bit (29 [bit 1] in Figure 3.22)
IST1 (R/W) Interrupt STatus bit bit 1
Shows status of V-Blank-OUT interrupt.
V-Blank-IN Interrupt Status Bit (30 [bit 0] in Figure 3.22)
IST0 (R/W) Interrupt STatus bit bit 0
Shows status of V-Blank-IN interrupt.
60
3.6 A-Bus Control Registers
A-Bus Interrupt Acknowledge Register
Figure 3.23 shows the A-Bus interrupt acknowledge register.
b31 b24 b23 b16 b15 b8 b7 b0
25FE00A8 1
Figure 3.23 A-Bus Interrupt Acknowledge Register (Register: AIACK) Initial Value 00000000H
A-Bus Interrupt Acknowledge (1 [bit 0] in Figure 3.23)
AIACK (R/W) A-Bus Interrupt ACKnowledge
This shows the effectiveness or ineffectiveness of interrupts from the devices
that exist on the A-Bus. This bit can read and write. The meaning of the bit is
shown in Table 3.9. If interrupt is requested, the A-Bus interrupt acknowledge
cycle occurs, the interrupt classification data (16 bit) is fetched, and by means
of its contents, the current interrupt condition can be acknowledged. If this
cycle occurs, and since the AIACK bit must be 0 and the A-Bus interrupt be
comes ineffective, the AIACK bit must be reset to receive interrupt from the
A-Bus.
Table 3.9 A-Bus Interrupt Acknowledge Contents
Access Status Contents
Read 0 Invalid A-Bus interrupt
1 Valid A-Bus interrupt
Write 0 Invalid A-Bus interrupt
1 Valid A-Bus interrupt
SCU User's Manual 61
A-Bus Set Register
There are a total of four types of spaces arranged as spaces connected to the A-Bus,
chip select 0 ~ 2 (hereafter referred to as CS) which includes three types of spaces
that are output and one type of dummy space that CS does not output.
The register relating to the A-Bus is determined by the connecting devices and
therefore must be set to include all devices. Make sure that there is no excessive
change in the value after it has been set.
CS0, CS1, and CS2 Dummy Space A-Bus Set Registers
Figure 3.24 shows the CS0 and CS1 spaces, and Figure 3.25 shows the CS2 spaces
and dummy spaces of the A-Bus set register.
b31 b24 b23 b16 b15 b8 b7 b0
25FE00B0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
Figure 3.24 A-Bus Set Register [CS0, CS1 Spaces] (Register: ASR0) Initial Value 00000000H
b31 b24 b23 b16 b15 b8 b7 b0
25FE00B4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
Figure 3.25 A-Bus Set Register [CS2, Dummy Spaces] (Register: ASR1) Initial Value 00000000H
CS0 Space Previous Read Bit (1 [bit 31] in Figure 3.24)
A0PRD (W) A-Bus CS0 Previous ReaD bit
This bit decides whether the data previous read process of CS0 space is
effective or not. The time period from when access begins until data output
is reduced by the previous data read process. This is effective only for data
that is stored in the address following the accessed data; other addresses do
not change with normal access. A 1 shows it is effective, 0 shows it is not
effective. Figure 3.26 shows the result when the previous read is effective.
62
CLK
CPU RD A B C E
A B C D E F
A-Bus RD
A-Bus DATA A B C D E F
CPU DATA A B C E
Collects the next address
data in advance (preread)
Decreases loss time from beginning * The clock in the figure is
of access until data is output the SCU internal clock
Figure 3.26 Result of Previous Read Process
Pre-charge Insert Bit After CS0 Space Write (2 [bit 30] in Figure 3.24)
A0WPC (W) A-Bus CS0 after Write Pre-Charge insert bit
After data is written in the CS0 space, 1 clock no-process condition can be
inserted. This is the bit that decides whether the process is effective or inef-
fective: 1 shows it is effective; 0 shows it is ineffective. This bit does not
affect the operation after CS0 space read. The operation when this bit
has been set is shown in Figure 3.27.
CLK
ARD
AWR
After Read After Write After Write After Read
1 clock 2 clock 2 clock 1 clock
*The clock in the figure is the SCU internal clock
Figure 3.27 Timing when Setting the Pre-Charge Insert Bit after Write
Pre-charge Insert Bit After CS0 Space Read (3 [bit 29] in Figure 3.24)
A0RPC (W) A-Bus CS0 Previous ReaD bit
After CS0 space data is read, 1 clock no-process condition can be inserted.
This is the bit that decides whether the process is effective or ineffective: 1
shows it is effective; 0 shows it is ineffective. This bit does not affect the
operation after CS0 space write. The operation when this bit has been set is
shown in Figure 3.28. Depending on the type of device, this bit is set because
a fixed period is required after CS is set to High until the next CS is set to
Low. This is true for write as well.
SCU User's Manual 63
CLK
ARD
AWR
After Read After Write After Write After Read
2 clock 1 clock 1 clock 2 clock
* Clock in the figure is the SCU internal clock
Figure 3.28 Timing when Setting the Pre-Charge Insert Bit after Read
CSO External Wait effective Bit (4 [bit 28] in Figure 3.24)
A0EWT (W) A-Bus CS0 External WaiT effective bit
Wait can be inserted by force by the external signal when accessing the CS0
space via the A-Bus. Whether the process will be effective or not is decided
by this bit. A 1 shows that the process is effective, 0 shows that the process is
ineffective. When the process is effective, wait will continue as long as the
external wait signal is “Low” at the time of the SCU wait sampling. Figure
3.29 shows the difference in timing charts when external wait is effective or
ineffective.
CLK
CPU RD
A-Bus RD
AWAIT
DATA
Timing when External Wait Timing when External Wait
is Ineffective is Effective
* Clock in the figure is the SCU internal clock
Figure 3.29 Differences in Timing by Setting External Wait Effective Bit
CS0 Space Burst Cycle Wait Number Set Bit (5~8 [bit 27~24] in Figure 3.24)
A0BW3-0 (W) A-Bus CS0 Burst cycle Wait bit 3-0
In the CS0 space, the wait number is set for 1 cycle while a burst access is
being performed. Table 3.10 shows the set values.
64
Table 3.10 CS0 Space Burst Cycle Set Values
Bit Wait Number
A0BW3 A0BW2 A0BW1 A0BW0
0 0 0 0 No wait (wait does not sample)
0 0 0 1 1-cycle wait
: : : :
1 1 1 0 14-cycle wait
1 1 1 1 15-cycle wait
CS0 Normal Cycle Wait Number Set Bit (9~12 [bit 23~20] in Figure 3.24)
A0NW3-0 (W) A-Bus CS0 Normal cycle Wait bit 3-0
In the CS0 space, the wait number is set for 1 cycle during normal access.
Table 3.11 shows the set values.
Table 3.11 CS0 Space Normal Cycle Set Values
Bit Wait Number
A0NW3 A0NW2 A0NW1 A0NW0
0 0 0 0 No wait (does not sample waits)
0 0 0 1 1 cycle wait
: : : :
1 1 1 0 14 cycle wait
1 1 1 1 15 cycle wait
CS0 Burst Length Set Bit (13~14 [bit 19~18] in Figure 3.24)
A0LN1-0 (W) A-Bus CS0 burst LeNgth bit 1-0
In the CS0 space, the length (boundary) to be accessed is designated during
burst access. Table 3.12 shows the length set values.
Table 3.12 CS0 Space Burst Length Set Values
Bit
Access Values
A0LN1 A0LN0
0 0 No burst access
0 1 4 address burst access
1 0 256 address burst access
1 1 No boundary
SCU User's Manual 65
CS0 Space Bus Size Set Bit (15 [bit 16] in Figure 3.24)
A0SZ (W) A-Bus CS0 bus SiZe bit
Sets the A-Bus size in the CS0 space. Table 3.13 shows the set values.
Table 3.13 CS0 Space Bus Set Values
A0SZ Bus Size Settings
0 Indicates 16 bit bus
1 Indicates 8 bit bus
CS1 Space Previous Read Effective Bit (16 [bit 15] in Figure 3.24)
A1PRD (W) A-Bus CS1 Previous ReaD bit
This bit decides whether the data previous read process of CS1 space is effec-
tive or not. The data previous read processes reduces the time from access
start until data output. This is effective only for data that is stored in address
that follows the accessed data. Other addresses do not change with normal
addresses. A 1 shows it is effective, a 0 shows it is not effective. See Figure
3.26 for the result when previous read is effective.
Pre-charge Insert Bit After CS1 Space Write (17 [bit 14] in Figure 3.24)
A1WPC (W) A-Bus CS1 after Write Pre-Charge insert bit
Non-process conditions of 1 clock can be inserted after writing data to CS1
space. This is the bit that decides whether the process is effective or ineffec-
tive. A 1 shows it is effective, a 0 shows it is ineffective. This bit has no effect
on the operation after read. Figure 3.26 shows the operation when this bit
has been set.
Pre-charge Insert Bit After CS1 Space Read (18 [bit 13] in Figure 3.24)
A1RPC (W) A-Bus CS1 Read Pre-Charge insert bit
One clock worth of non-process condition can be inserted after reading data
to CS1 space. This is the bit that decides whether the process is effective or
ineffective. A 1 shows it is effective, a 0 shows it is ineffective. This bit has
no effect on the operation after write. Figure 3.28 shows the operation when
this bit has been set.
66
CS1 Space External Wait Effective Bit (19 [bit 12] in Figure 3.24)
A1EWT (W) A-Bus CS1 External WaiT effective bit
Wait can be entered by force by an external signal when accessing the CS1
space via the A-Bus; however, whether the process will be effective or not is
decided by this bit. A 1 shows that the process is effective, a 0 shows that the
process is ineffective. When the process is effective, wait will continue as
long as the external signal is “Low.” Figure 3.29 shows differences in
timing charts when external wait is effective vs. ineffective.
CS1 space Burst Cycle Wait Number Set Bit (20~23 [bit 11~8] in Figure 3.24)
A1BW3-0 (W) A-Bus CS1 Burst cycle WaiT bit 3-0
In the CS1 space, the wait number is set for 1 cycle while a burst access is
performed. Table 3.14 shows the set values.
Table 3.14 CS1 Space Burst Cycle Set Values
Bit Wait Number
A1BW3 A1BW2 A1BW1 A1BW0
0 0 0 0 No wait (Does not sample wait)
0 0 0 1 1 cycle wait
: : : :
1 1 1 0 14 cycle wait
1 1 1 1 15 cycle wait
CS1 Normal Cycle Wait Number Set Bit (24~27 [bit 7~4] in Figure 3.24)
A1NW3-0 (W) A-Bus CS1 Normal cycle Wait bit 3-0
In the CS1 space, the wait number is set for 1 cycle during a normal access.
Table 3.15 shows the set values.
Table 3.15 CS1 Space Normal Cycle Set Values
Bit Wait Number
A1NW3 A1NW2 A1NW1 A1NW0
0 0 0 0 No wait (Does not sample wait)
0 0 0 1 1 cycle wait
: : : :
1 1 1 0 14 cycle wait
1 1 1 1 15 cycle wait
SCU User's Manual 67
CS1 space Burst Length Bit (28~29 [bit 3~2] in Figure 3.24)
A1LN1-0 (W) A-Bus CS1 burst LeNgth bit 1-0
The access length (boundary) is indicated while burst accessing in CS1 space.
Table 3.16 shows length values.
Table 3.16 CS1 Space Burst Length Set Values
Bit
Access Settings
A1LN1 A1LN0
0 0 No burst access
0 1 4 Address burst access
1 0 256 Address burst access
1 1 No boundary
CS1 space Bus Size Set Bit (30 [bit 0] in Figure 3.24)
A1SZ (W) A-Bus CS1 bus SiZe bit
Sets the A-Bus bus size in the CS1 space. Table 3.17 shows the set values.
Table 3.17 CS1 Space Bus Size Set Values
A1SZ Bus Size Settings
0 Indicates 16-bit bus
1 Indicates 8-bit bus
CS2 Space Previous Read Effective Bit (1 [bit 31] in Figure 3.25)
A2PRD (W) A-Bus CS2 Previous ReaD bit
This bit decides whether the data in the previous read process of CS2 is
effective or not. The data previous read process reduces the time from
access start until data output. This is effective only for data that is stored in
the address that follows the accessed data. Other addresses do not change
with normal addresses. A 1 shows it is effective, a 0 shows it is not effective.
See Figure 3.25 for the effect when previous read is effective.
68
Pre-charge Insert Bit After Writing CS2 Space (2 [bit 30] in Figure 3.25)
A2WPC (W) A-Bus CS2 after Write Pre-Charge insert bit
A no-process condition of 1 clock can be inserted after writing data to CS2.
This is the bit that decides whether the process is effective or ineffective. A
1 shows it is effective, a 0 shows it is ineffective. This bit has no effect on the
operation after read. Figure 3.27 shows the operation when this bit has been
set.
Pre-charge Insert Bit After Reading CS2 Space (3 [bit 29] in Figure 3.25)
A2RPC (W) A-Bus CS2 Read Pre-Charge insert bit
A no-process condition of 1 clock can be inserted after reading data to CS2.
This is the bit that decides whether the process is effective or ineffective. A
1 shows it is effective, a 0 shows it is ineffective.This bit does not affect the
operation after write. Figure 3.28 shows the operation when this bit has
been set.
CS2 Space External Wait Effective Bit (4 [bit 28] in Figure 3.25)
A2EWT (W) A-Bus CS2 External Wait effective bit
Wait can be entered by force by an external signal when accessing the CS2
space via the A-Bus. Whether the process will be effective or not is decided by
this bit. A 1 shows that the process is effective, a 0 shows that the process is
ineffective. When the process is effective, wait will continue as long as the
external signal is “Low.” Figure 3.29 shows differences in timing charts
when external wait is effective vs. ineffective.
CS2 Space Burst Length Bit (5~6 [bit 19~18] in Figure 3.25)
A2LN1-0 (W) A-Bus CS2 burst LeNgth bit 1-0
The access length (boundary) is indicated while burst accessing in CS2.
Table 3.18 shows the length settings.
Table 3.18 CS2 Space Burst Length Set Values
Bit
Access Settings
A2LN1 A2LN0
0 0 No burst access
0 1 4 Address burst access
1 0 256 Address burst access
1 1 No border
CS2 Bus Size Set Bit (7 [bit 16] in Figure 3.25)
A2SZ (W) A-Bus CS2 bus SiZe bit
Sets the A-Bus bus size in the CS2 space. Table 3.19 shows the set values.
SCU User's Manual 69
Table 3.19 CS2 Space Bus Size Set Values
A2SZ Bus Size Settings
0 Indicates 16-bit bus
1 Indicates 8-bit bus
Dummy Space Previous Read Effective Bit (8 [bit 15] in Figure 3.25)
A3PRD (W) A-Bus CS3 Previous ReaD bit
This bit decides whether the data previous read process of dummy space is
effective or not. The data previous read process reduces the time from access
start until data output. This is effective only for data that is stored in address
that follows the accessed data. Other addresses do not change with normal
addresses. A 1 shows it is effective, a 0 shows it is not effective. See Figure
3.26 for the result when previous read is effective.
After Pre-charge Insert Bit Dummy Space Write (9 [bit 14] in Figure 3.25)
A3WPC (W) A-Bus CS3 after Write Pre-Charge insert bit
Non-process conditions of 1 clock can be inserted after writing data to
dummy space. This is the bit that decides whether the process is effective or
ineffective. A 1 shows it is effective, a 0 shows it is ineffective. This bit hasno
effect on the operation after read. Figure 3.27 shows the operation when
this bit has been set.
After Pre-charge Insert Bit Dummy Space Read (10 [bit 13] in Figure 3.25)
A3RPC (W) A-Bus CS3 Read Pre-Charge insert bit
Non-process conditions of 1 clock can be inserted after reading data to
dummy space. This is the bit that decides whether the process is effective or
ineffective. A 1 shows it is effective, a 0 shows it is ineffective. This bit does
not affect the operation after write. Figure 3.28 shows the operation when
this bit has been set.
Dummy Space External Wait Effective Bit (11 [bit 12] in Figure 3.25)
A3EWT (W) A-Bus CS3 External WaiT effective bit
Wait can be entered by force by an external signal when accessing the
dummy space via the A-Bus. Whether the process will be effective or not is
decided by this bit. A 1 shows that the process is effective, a 0 shows that the
process is ineffective. When the process is effective, wait will continue as
long as the external signal is “Low.” Figure 3.29 shows differences in
timing charts for when external wait is effective vs. when it is ineffective.
Dummy Space Burst Cycle Wait Number Set Bit (12~15 [bit 11~8] in Figure 3.25)
A3BW3-0 (W) A-Bus CS3 Burst cycle Wait bit 3-0
In dummy space, the wait number is set for 1 cycle while a burst access is
performed. Table 3.20 shows the set values.
70
Table 3.20 Dummy Space Burst Cycle Set Values
Bit Wait Number
A3BW3 A3BW2 A3BW1 A3BW0
0 0 0 0 No wait (wait not sampled)
0 0 0 1 1 cycle wait
: : : :
1 1 1 0 14 cycle wait
1 1 1 1 15 cycle wait
Dummy Space Normal Cycle Wait Number Bit (16~19 [bit 7~4] in Figure 3.25)
A3NW3-0 (W) A-Bus CS 3 Normal cycle Wait bit 3-0
In the dummy space, the wait number is set for 1 cycle during normal
accessing. Table 3.21 shows the set values.
Table 3.21 Dummy Space Normal Cycle Set Values
Bit Wait Number
A3NW3 A3NW2 A3NW1 A3NW0
0 0 0 0 No wait (wait not sampled)
0 0 0 1 1 cycle wait
: : : :
1 1 1 0 14 cycle wait
1 1 1 1 15 cycle wait
Dummy Space Burst Length Set Bit (20~21 [bit 3~2] in Figure 3.25)
A3LN1-0 (W) A-Bus CS 3 burst Le Ngth bit 1-0
In the dummy space, the length (boundary) to be accessed is designated
during burst access. Table 3.22 shows the length set values.
Table 3.22 Dummy Space Burst Length Set Values
Bit
Access Settings
A3LN1 A3LN0
0 0 No burst access
0 1 4 address burst access
1 0 256 address burst access
1 1 No boundary
SCU User's Manual 71
Dummy Space Bus Size Set Bit (22 [bit 0] in Figure 3.25)
A3SZ (W) A-Bus CS3 bus SiZe bit
Sets the A-Bus bus size in the dummy space. Table 3.23 shows the set values.
Table 3.23 Dummy Space Bus Size Set Values
A3SZ Bus Size Settings
0 Indicates 16 bit bus
1 Indicates 8 bit bus
A-Bus Refresh Register
Figure 3.30 shows the A-Bus refresh register.
b31 b24 b23 b16 b15 b8 b7 b0
25FE00B8 1 2 3 4 5
Figure 3.30 A-Bus Refresh Register (Register: AREF) Initial Value 00000000H
A-Bus Refresh Output Effective Bit (1 [bit 4] in Figure 3.30)
ARFEN (W) A-Bus ReFresh ENable bit
Makes effective the refresh cycle output of A-Bus. A 1 indicates it is effective,
a 0 indicates it is not effective.
A-Bus Refresh Wait Number Set Bit (2~5 [bit 3~0] in Figure 3.30)
ARWT3-0 (W) A-Bus Refresh WaiT bit 3-0
Sets the A-Bus refresh cycle wait number. Table 3.24 shows the details.
Table 3.24 A-Bus Refresh Wait Number
Bit Wait Number
ARWT3 ARWT2 ARWT1 ARWT0
0 0 0 0 No wait
0 0 0 1 1 cycle wait
: : : :
1 1 1 0 14 cycle wait
1 1 1 1 15 cycle wait
72
3.7 SCU Control Registers
SCU SDRAM Select Register
The SCU has a register that designates the SDRAM configuration. The SDRAM
select register is shown in Figure 3.31. This register is at address 25FE00C4H within
the SCU.
b31 b24 b23 b16 b15 b8 b7 b0
25FE00C4 1
Figure 3.31 SCU SDRAM Select Bit (Register: RSEL) Initial Value 00000000H
SD-RAM Select Bit (1 [bit 0] in Figure 3.31)
RSEL (R/W) RAM SELect bit
RSEL=0 indicates 2 Mbit X 2
RSEL=1 indicates 4 Mbit X 2
SCU Version Register
SCU has a register showing the chip version. This register is at the address
25FE00C8H within the SCU. The version register is shown in Figure 3.32.
b31 b24 b23 b16 b15 b8 b7 b0
25FE00C8 1 2 3 4
Figure 3.32 SCU Version Register (Register: VER) Initial Value 00000000H
Version Number (1~4 [bit 3~0] in Figure 3.32)
VER 3-0 (R) VERsion number bit 3~0
Shows the SCU chip version. Because there are 4 bits, this supports version
0~15 chips.
SCU User's Manual 73
(This page is blank in the original Japanese document.)
74
CHAPTER 4 DSP CONTROL
Chapter 4 Contents
4.1 DSP Internal BLOCK MAP ................................................................ 76
4.2 List of Commands ................................................................................ 80
4.3 Operand Execution Methods ............................................................. 85
Jump Command Execution ...............................................85
Loop Program Execution ..................................................86
DMA Command Execution ..............................................87
End Command Execution .................................................88
4.4 Special Process Execution ................................................................... 89
Loading a Program by the DMA Command ..................89
Repeating One Command .................................................89
Executing a SubRoutine Program .....................................90
4.5 More About Commands ..................................................................... 91
Operation Commands ........................................................91
Load Immediate Command ............................................120
DMA Command ................................................................132
Jump Commands ..............................................................141
Loop Bottom Commands .................................................153
END Command .................................................................156
SCU User's Manual 75
4.1 DSP Internal BLOCK MAP
Figure 4.1 (on the next page) is an internal block map of the DSP.
76
Figure 4.1 Block Map Inside DSP
SCU User's Manual
MDO MD1 MD2 MD3
A (64 word X 32 bit) A (64 word X 32 bit) A (64 word X 32 bit) A (64 word X 32 bit)
WD RD WD RD WD RD WD RD
CT0(6) CT1(6) CT2(6) CT3(6) RA(8)
D0[31-0]
D0
D1 DS[31-0]
X
Y
SHIFT L16
Imm
TOP(8) TOP(12)
RX(32) RY(32) PH(16) PL(32) ACH(16) ACL(32)
DSP
X Y B A PC(8) LEEX ES EP PR E V C Z S T0
WA0
MULTIPLIER ALU
Write address read F
P47-0 Q data data E Instruction RA0
48 48 T decoder
PROGRAM RAM C
(256 wordX32bit)
DSPexternal
H register
77
• ALU This arithmetic unit is able to output up to 48 bits. Normal calcula-
tions are executed at 32 bits. Only product sum operations become
48-bit operations.
• MULTIPLIER
This multiplier outputs a low-order 48 bit from among the 64 bit
results obtained by 32 bit X 32 bit. The calculation results are in 48 bit
data; the high-order 16 bit is stored in PH and the low order 32 bit is
stored in PL (see below).
• TOP (W) This is an 8 bit register that stores the lead address. The jump
command and subroutine execution process store the lead address in
this register and execute the process.
• LOP (W) This is a 12 bit register that stores the loop counter. The number of
loops is set by the process of repeating 1 command.
• CT0-3 (W) This is a 6 bit register that stores the access address of data RAM0-3.
• MDO-3 (R/W)
This is a 32 bit unit data port that stores the data of data
RAM0-3. There are 64 data ports in each data RAM.
• RA (W) This is the address that stores the register for accessing the data
RAM. This register is 8 bit. The RAM designation number (0-3) is
stored by a high-order 2 bit. The RAM access address is stored by a
low-order 6 bit.
• RX (W) This is the 32 bit X-bus connection register that stores the multiplier
input data.
• RY (W) This is the 32 bit Y-bus connection register that stores the multiplier
input data.
• PH (W) This register stores the high-order 16 bit within the 48 bit multiplier
output data. There is also an input data storage register that stores
the high-order 16 bit within ALU arithmetic unit input data B (48bit).
• PL (W) This register stores the low-order 32 bit within the 48 bit of multiplier
output data. There is also an input data storage register that stores
the low-order 32 bit within ALU arithmetic unit input data B (48bit).
78
• ACH (W) This register stores the high-order 16 bit within 48 bit data showing
the ALU calulation results. There is also an imput data storage
register that stores the high-order 16 bit within ALU arithmetic unit
input data A(48bit).
• ACL (W) This register stores the low-order 32 bit within the 48 bit data
showing the ALU calulation results. There is also an imput data
storage register that stores the low-order 32 bit within ALU arithmetic
unit input data A(48bit).
• D0 Bus This is a 32 bit data bus for external access. It operates at 28 MHz.
It is used in accessing the main CPU.
• X-Bus, Y-Bus
This is a 32 bit data bus for aquiring arithmetic unit input data. It
operates at 14 MHz.
• RAO (W) This is a 32 bit external address register used in external → DSP DMA
transfer. Since it takes a 4 byte unit value, the external address should
be shifted right 2 bits.
• WAO (W) This is a 32 bit external address register used in DSP → external DMA
transfer. Since it takes a 4 byte unit value, the external address should
be shifted right 2 bits.
SCU User's Manual 79
4.2 List of Commands
A list of commands used by DSP is given in Tables 4.1 to 4.4.
Table 4.1 List of Commands (1)
Type Command Overview of Operation
Operation Commands
ALU Control NOP No operation
AND Takes the AND operation of [ACL] and [PL].
OR Takes the OR operation of [ACL] and [PL].
XOR Takes the exclusive OR of [ACL] and [PL].
ADD Adds [ACL] and [PL].
SUB Subtracts [PL] from [ACL].
AD2 Adds [ACH][ACL] and [PH][PL].
SR Shifts [ACL] right 1 bit, stores LSB in carry flag
RR Rotates [ACL] right 1 bit, stores LSB in carry flag
SL Shifts [ACL] left 1 bit, stores 0 in LSB of [ACL], stores MSB
in carry flag.
RL Rotates [ACL] left 1 bit, stores MSB in carry flag.
RL8 Rotates [ACL] left 8 bits, stores b24 in carry flag.
X-Bus Control NOP No operation
MOV [s], X Transfers data from data RAM to [RX]
MOV MUL, P [MULTIPLIER] data is transfered to [PH] [PL]
MOV [s], P Transfers data from data RAM to [PL]
Y-Bus Control NOP No operation
MOV [s], Y Transfers data from data RAM to [RY]
CLR A Clears to 0 [ACH] and [ACL]
MOV ALU, A Transfers [ALU] data to [ACH][ACL]
MOV [s], A Transfers data from data RAM to [ACL]
D1-Bus Control NOP No operation
MOV SImm, [d] SImm (short immediate) data is stored in a register or a data
RAM designated by [d].
MOV [s], [d] Data is transfered to the RAM designated by [s] or data RAM
designated by [d] from the register.
Load Immediate MVI Imm , [d] Stores Imm (immediate) data in register or in data RAM
Commands designated by [d]
MVI Imm , [d] , Z When Z (zero flag) of the program control port is 1, Imm
(immediate) data is stored in register or in data RAM
designated by [d]
MVI Imm , [d] , NZWhen Z (zero flag) of the program control port is 0, Imm
(immediate) data is stored in register or in data RAM
designated by [d]
80
Table 4.2 List of Commands (2)
Type Command Overview of Operation
Load Immediate MVI Imm , [d] , S When S (sine flag) of the program control port is 1, Imm
commands (immediate) data is stored in register or in data RAM
designated by [d]
MVI Imm , [d] , NS When S (sine flag) of the program control port is 0, Imm
(immediate) data is stored in register or in data RAM
designated by [d]
MVI Imm , [d] , C When C (carry flag) of the program control port is 1, Imm
(immediate) data is stored in register or in data RAM
designated by [d]
MVI Imm , [d] , NC When C (carry flag) of the program control port is 0, Imm
(immediate) data is stored in register or in data RAM
designated by [d]
MVI Imm , [d] , T0 When T0 (flag while executing D0 bus DMA) of the program
control port is 1, Imm (immediate) data is stored in register or
in data RAM designated by [d]
MVI Imm , [d] , NT0 When T0 (flag while executing D0 bus DMA) of the program
control port is 0, Imm (immediate) data is stored in register or
in data RAM designated by [d]
MVI Imm , [d] , ZS When either S (sine flag) or Z (zero flag) of the program
control port is 1, Imm (immediate) data is stored in register or
in data RAM designated by [d]
MVI Imm , [d] , NZSWhen both S (sine flag) and Z (zero flag) of the program
control port are 0, Imm (immediate) data is stored in register
or in data RAM designated by [d]
DMA Commands DMA D0, [RAM], SImm (short immediate) data is set in the transfer word
SImm number counter ([TN0]) as the transfer counter, and
transfers data to the RAM area designated by [RAM] from
outside using D0-Bus. Transfer begin address ([RA0]) and
transfer word number counter ([TN0]) are updated to the
value when transfer ends.
DMA [RAM], D0, SImm (short immediate) data is set in the transfer word
SImm number counter ([TN0]) as the transfer counter, and
transfers data from the RAM area designated by [RAM] using
D0-Bus to the outside. Transfer begin address ([WA0]) and
transfer word number counter ([TN0]) are updated to the
value when transfer ends.
SCU User's Manual 81
Table 4.3 List of Commands (3)
Type Command Overview of Operation
DMA Commands DMA D0, [RAM], [s] Sets data within the data RAM designated by [s] as the
transfer counter to the transfer word number counter
([TN0]), and transfers data to the RAM area designated
by [RAM] from outside using D0-Bus. Transfer begin
address ([RA0]) and transfer word number counter
([TN0]) are updated to the value when transfer ends.
DMA [RAM], D0, [s] Sets data within the data RAM designated by [s] as the
transfer counter to the transfer word number counter
([TN0]), and transfers data to the outside from the RAM
area designated by [RAM] using D0-Bus. Transfer begin
address ([WA0]) and transfer word number counter
([TN0]) are updated to the value at the time that transfer
ends.
DMAH D0, [RAM], SImm SImm (short immediate) data is set in the transfer word
number counter ([TN0]) as the transfer counter, and
transfers data to the RAM area designated by [RAM] from
outside using D0-Bus. Transfer begin address ([RA0])
and transfer word number counter ([TN0]) keep the value
when transfer begins.
DMAH [RAM], D0, SImm SImm (short immediate) data is set as the transfer
counter in the transfer word number counter ([TN0]), and
transfers data from the RAM area designated by [RAM] to
the outside using D0-Bus. Transfer begin address
([WA0]) and transfer word number counter ([TN0]) keep
the value at the time that transfer ends.
DMAH D0, [RAM], [s] Sets data within the data RAM designated by [s] as the
transfer counter to the transfer word number counter
([TN0]), and transfers data to the RAM area designated
by [RAM] from outside using D0-Bus. Transfer begin
address ([RA0]) and transfer word number counter
([TN0]) keep the value at the time that transfer begins.
DMAH [RAM], D0, [s] Sets data within the data RAM designated by [s] as the
transfer counter to the transfer word number counter
([TN0]) , and transfers data to the outside from the RAM
area designated by [RAM] using D0-Bus. Transfer begin
address ([WA0]) and transfer word number counter
([TN0]) keep the value at the time that transfer begins.
JUMP Commands JMP Imm Moves to the address shown by Imm (immediate)
JMP Z, Imm Moves to the address shown by Imm (immediate) when
the Z (zero flag) of the program control port is 1.
JMP NZ, Imm Moves to the address shown by Imm (immediate) when
the Z (zero flag) of the program control port is 0.
82
Table 4.4 List of Commands (4)
Type Command Overview of Processing
JUMP Commands JMP S, Imm When S (sine flag) of the program control port is 1, moves to
address displayed by Imm (immediate)
JMP NS, Imm When S (sine flag) of the program control port is 0, moves to
address displayed by Imm (immediate)
JMP C, Imm When C (carry flag) of the program control port is 1, moves to
address displayed by Imm (immediate)
JMP NC, Imm When C (carry flag) of the program control port is 0, moves to
address displayed by Imm (immediate)
JMP T0, Imm When T0 (flag while executing D0 Bus DMA) of the program
control port is 1, moves to address displayed by Imm
(immediate)
JMP NT0, Imm When T0 (flag while executing D0 Bus DMA) of the program
control port is 0, moves to address displayed by Imm
(immediate)
JMP ZS, Imm When either Z (zero flag) or S (sine flag) of the program control
port is 1, moves to address displayed by Imm (immediate)
JMP NZS, Imm When either Z (zero flag) or S (sine flag) of the program control
port is 0, moves to address displayed by Imm (immediate)
LOOP BOTTOM BTM When loop counter ([LOP]) is any number but 0, the top address
Commands register ([TOP]) is stored in the program counter and the loop
counter ([LOP]) is decremented. No operation is done when 0.
LPS When loop counter ([LOP]) is any number but 0, the program
counter stops, the next command is executed, loop counter
([LOP]) is decremented. This is repeated until the loop counter
is 0.
END Commands END Program stops and EX (program execute control flag) of the
program control port is reset.
ENDI Program stops and EX (program execute control flag) of the
program control port is reset, and E (program end interrupt flag)
is set.
SCU User's Manual 83
• Description of Constants
Follow the notation in Table 4.5.
Table 4.5 Descriptions of Constants
Notation Description Example
Binary Place a "%" before numbers %0010, %1111
Digital Place nothing before nor after numbers 2, 10, 16, 32
Hexadecimal Place a "$" before numbers $05, $0A, $FF
84
4.3 Operand Execution Method
DSP controls and executes registers as shown for the following commands.
Jump Command Execution
Jump command execution is attained by storing the jump destination address (Im-
mediate Data) in the program RAM address of the program control port. But you
should be aware that commands that are pre-fetched will be executed. The condi-
tional JUMP command examines the condition of the program control port flag, and
then, if the conditions are met, stores the jump destination address in the program
RAM address of the program control port. See the section on Jump commands
under 4.5 “Commands” for the command format. Figure 4.2 is a flowchart of the
Jump command execution.
Jump
Command
Any N
Conditions?
N Conditions
Satisfied ?
Y
Stores Jump destination address
in program RAM address of
program control port
Executes pre-fetched commands
END
Figure 4.2 Jump Command Execution
SCU User's Manual 85
Loop Program Execution
Execution of programs between the address designated by the top address register
([TOP]) and the BTM command of the DSP (see Loop Bottom command under 4.5
“Command” ) are repeated only the number of times indicated by the loop counter.
Thus, in order to realize this process, it must be executed after setting values in the
top address register and loop counter. Values can be set by the DSP load immediate
command (see section on Load Immediate Command under 4.5 “Command”). Ex-
ecution flow of the Loop program is shown in Figure 4.3.
LOOP
Sets the top address
of the Loop program
Sets number of Loops
BTM N
Command ?
Y Execute command
Loop End ? N
([LOP]=0)
Y Decrement
number of Loops
Stores the Loop program top
address in the program control port
Execute Pre-Fetch Commands Execute Pre-Fetch Commands
END
Figure 4.3 Loop Program Execution
86
DMA Command Execution
This sets the DMA controller register from the DSP and explains the actual process
of DMA transfer. The DMA command is divided into the two types, shown below,
depending on the transfer direction (read / write).
1) Data transfer from the D0-Bus to the DSP.
2) Data transfer from the DSP to the D0-Bus.
• Data transfer from D0-Bus to DSP
DSP data RAM transfer begin address and external memory transfer begin
address are set in registers ([CT0-3] and [RA0]), and transfer is begun by the
DMA command. The command formats up to the DMA command are shown
below. See 4.5 “Commands” for more information.
MOV SImm , [CT0] ; Sets DSP data RAM0 transfer begin address
MVI Imm , [RA0] ; Sets external memory transfer begin address
DMA D0 , [MD0] , SImm ; Begins DMA transfer using the D0 Bus
Table 4.6 is a collection of the features of DMA transfer. Because DMA transfer is
executed by 1 long word units, setting of the transfer word number (SImm of the
DMA command mentioned above) must be done in long word units.
Table 4.6 Features of Data Transfer from D0 Bus to DSP
Item Feature
Flag Set T0 flag of the program control port is set
Start and End Follows the data ready signal from outside. Transfer is done by this signal in 1
long word units. DMA transfer is ended by the end signal from outside, and
the program control port T0 flag is reset by this timing.
Address Update Each time 1 long word is transfered, 1 is added to the DSP data RAM transfer
address ([CT0-3]), and the external memory transfer address ([RA0]) is added
according to the address add number.
Hold Status If the DMA command Hold bit (see item 4.5 "Commands" DMA command
section) is set to 1, the transfer word number ([TN0]) and external memory
transfer address ([RA0]) keep the transfer begin values.
SCU User's Manual 87
• Data transfer from DSP to D0-Bus
The DSP data RAM transfer begin address and external memory begin address
are set in registers ([CT0-3]) and (WA0]), and transfer is begun by the DMA
command. The command formats up to the DMA command are shown below.
See item 4.5 for more information.
MOV SImm , [CT0] ; Sets DSP data RAM0 transfer begin address
MVI Imm , [WA0] ; Sets external memory transfer begin address
DMA [MD0] , D0, SImm ; Begins DMA transfer using the D0 Bus
Table 4.7 is a collection of the features of DMA transfer. Because DMA transfer is
executed in single long word units, setting of the transfer word number (SImm of
the DMA command mentioned above) must be done in long word units.
Table 4.7 Features of Data Transfer from DSP to D0 Bus
Item Feature
Flag Set T0 flag of the program control part is set
Start and End Obeys the data ready signal from outside. Transfer is done by this
signal in 1 long word units. DMA transfer is ended by the end signal
from outside, and the program control port T0 flag is reset by this
timing.
Address Change Each time 1 long word is transfered, 1 is added to the DSP data RAM
transfer address ([CT0-3]), and the external memory transfer address
([WA0]) is added according to the address add number.
Hold Status If the DMA command Hold bit (see item 4.5 "Commands" DMA
command section) is set to 1, the transfer word number ([TN0]) and
external memory transfer address ([WA0]) keep the transfer begin
values.
END Command Execution
When the END command is recognized, the program control port program RAM
address add process is stopped and the program execution control bit (EX flag) is
reset. Execution of the DSP program is stopped accordingly. But data transfer by
the DMA command continues ignoring this END command until the transfer is
completed. The value of the program address when the program termintes stops at
the address that follows the address stored in END command.
88
4.4 Special Process Execution
DSP can execute the following special processes.
1) Loading a Program by the DMA command
2) Repeating One Command
3) Execution of subroutine program
Loading a Program by the DMA command
Loading from the CPU was explained earlier as one method of loading a program
(see section 2.3), but a program can be loaded in the DSP program RAM by using the
DSP DMA command as well. Loading a program is done in the following formats.
MVI Imm , [RA0] ; Sets external memory transfer begin address
DMA D0 , [PRG], SImm ; Sets transfer word number, begins transfer
MVI Imm , [PC] , SImm ; Sets program execution start address
Repeating One Command
The format for repeating 1 command is shown below. The 1 command repeat execu-
tion command (see LPS command in section 4.5 “Command” under the part on Loop
Bottom) repeat the following commands. The repeat number executes one time
more than the set value.
MVI Imm , [LOP] ; Sets number of repetitions
LPS ; Repeat execution comand
### ; This command is repeatedly executed
SCU User's Manual 89
Executing a SubRoutine Program
There are no special commands (mnemonic) in the DSP program for executing
subroutines. By combining the Load Immediate command to the [PC] with the Loop
Bottom command, subroutines are created in the form shown in Figure 4.4.
Main
Subroutine
Program Program
Designates Child
MOV $01 , [LOP]
execution 1 time
Sets subroutine
MOV Imm , [PC] program start address
Program
NOP Caution: within subroutine
Executed 2 times
Jumps after execution
Program
BTM
END
Execute pre-fetched
command of next step
Return to start address
Figure 4.4 Subroutine Program Execution
90
4.5 More About Commands
Operation Commands
Operation commands use each X, Y, and D1 bus as well as an arithmetic logic unit
(ALU). Operation commands can be classified into the following four control types.
1) ALU control command
2) X-Bus control command
3) Y-Bus control command
4) D1-Bus control command
The operation command format is as shown in Figure 4.5.
31 30 29 26 25 20 19 14 13 0
0 0 ALU Control X-Bus Control Y-Bus Control D1-Bus Control
Figure 4.5 Operation Command Format
Operation commands can execute these four types of commands concurrently.
Mnemonics should list the ALU control command to the far left. Other required
commands should be listed and separated by a space or tab.
SCU User's Manual 91
• ALU Control Command
ALU control commands operate using the ALU. The following pages show more
about ALU control commands.
92
NOP ALU No Operation
Operation No ALU command process
Description
Label NOP
Instruction Code
b31 26 0
0 0 0 0 0 0
Flag No change
Comments
SCU User's Manual 93
AND AND Operation
Operation Takes the AND operation of [ACL] and [PL] logical product.
Description
Label AND
Instruction Code
b31 26 0
0 0 0 0 01
Flag S ; 1 when operation result is negative, otherwise it is 0.
Z ; 1 when operation result is 0, otherwise it is 0.
C ; is 0.
Comments
94
OR OR Operation
Operation Takes the OR operation of [ACL] and [PL] logical sum.
Description
Label OR
Instruction Code
b31 26 0
0 0 0 01 0
Flag S ; 1 when operation result is negative, otherwise it is 0.
Z ; 1 when operation result is 0, otherwise it is 0.
C ; is 0.
Comments
SCU User's Manual 95
XOR Exclusive OR Operation
Operation Takes the exclusive OR operation of [ACL] and [PL].
Description
Label XOR
Instruction Code
b31 26 0
0 0 0 01 1
Flag S ; 1 when operation result is negative, otherwise it is 0.
Z ; 1 when operation result is 0, otherwise it is 0.
C ; this is 0.
Comments
96
ADD Addition
Operation ADDS [ACL] and [PL].
Description
Label ADD
Instruction Code
b31 26 0
0 0 01 0 0
Flag S; 1 when operation result is negative, otherwise it is 0.
Z; 1 when operation result is 0, otherwise it is 0.
C; 1 when carry occurs as a result of the operation, otherwise it is 0.
V; 1 when there is overflow (exceeds 48 bits)opeation result,
otherwise it is 0.
Comments
SCU User's Manual 97
SUB Subtraction
Operation Subtracts [PL] from [ACL].
Description
Label SUB
Instruction Code
b31 26 0
0 0 01 01
Flag S; 1 when operation result is negative, otherwise it is 0.
Z; 1 when operation result is 0, otherwise it is 0.
C; 1 when carry occurs as a result of the operation, otherwise it is 0.
V; 1 when there is underflow in the opeation result,otherwise it is 0.
Comments
98
AD2 Addition
Operation Adds [ACH][ACL] and [PH][PL].
Description
Label AD2
Instruction Code
b31 26 0
0 0 01 1 0
Flag S; 1 when operation result is negative, otherwise it is 0.
Z; 1 when operation result is 0, otherwise it is 0.
C; 1 when carry occurs as a result of the operation, otherwise it is 0.
V; 1 when there is overflow (exceeds 48 bits)operation result,
otherwise it is 0.
Comments
SCU User's Manual 99
SR Right Shift 1 Bit
Operation Shifts the value of [ACL] right 1 bit, and the value of bit 0 is stored in C
flag.
Description
MSB LSB
b31 b30 b29 b2 b1 b0
C
Label SR
Instruction Code
b31 26 0
0 01 0 0 0
Flag S ; 1 when operation result MSB is 1,0 when 0.
Z ; 1 when operation result is 0, otherwise it is 0.
C ; 1 when the value of b0 of input data is 1, 0 when 0.
ACL ; Shifts 1 bit to the right, most significant bit (b31) does not change
Comments
100
RR Right Rotate 1 Bit
Operation Rotates the [ACL] value right 1 bit.
Description
MSB LSB
b31 b30 b29 b0
C
Label RR
Instruction Code
b31 26 0
0 01 0 01
Flag S ; 1 when operation result MSB is 1,0 when 0.
Z ; 1 when operation result is 0, otherwise it is 0.
C ; 1 when the value of b0 of input data is 1, 0 when 0.
ACL ; Shifts 1 bit to the right, least significant bit (b0) moves to the most
significant bit (b31).
Comments
SCU User's Manual 101
SL Left Shift 1 Bit
Operation Shifts the [ACL] value left 1 bit.
Description
MSB LSB
b31 b30 b29 0
C
Label SL
Instruction Code
b31 26 0
0 01 01 0
Flag S ; 1 when operation result MSB is 1,0 when 0.
Z ; 1 when operation result is 0, otherwise it is 0.
C ; 1 when the value of b31 of input data is 1, 0 when 0.
ACL ; Shifts 1 bit to the left; least significant bit (b0) is 0.
Comments
102
RL Left Rotate 1 Bit
Operation Rotates the [ACL] value left 1 bit.
Description
MSB LSB
b31 b30 b29 b0
C
Label RL
Instruction Code
b31 26 0
0 01 01 1
Flag S ; 1 when operation result MSB is 1,0 when 0.
Z ; 1 when operation result is 0, otherwise it is 0.
C ; 1 when the value of b31of input data is 1, 0 when 0.
ACL ; Shifts 1 bit to the left, most significant bit (b31) moves to the least
significant bit (b0).
Comments
SCU User's Manual 103
RL8 Left Rotate 8 Bits
Operation Rotates the [ACL] value left 8 bits.
Description
MSB LSB
b31 b30 b29 b0
C
Label RL8
Instruction Code
b31 26 0
0 01 1 1 1
Flag S ; 1 when operation result MSB is 1,0 when 0.
Z ; 1 when operation result is 0, other wise 0.
C ; 1 when the value of b24of input data is 1, 0 when 0.
ACL ; Rotates 8bits to the left.
Comments
104
• X-Bus Control Commands
X-Bus control commands transfer data using the X-Bus to the RX register
and PH, PL registers. The following pages show more about X-Bus control
commands.
SCU User's Manual 105
NOP X-Bus No Operation
Operation No X-Bus control process
Description
Label NOP
Instruction Code
b31 25 23 0
0 0 0 0 0
Flag No change
Comments
106
MOV [s],X Transfer (Memory →[RX])
Operation Data is transfered to [RX] from the data RAM address displayed by
[CTx(x=0~3)].
Description
[CTx] [RX]
32bit
Label
MOV [Source RAM],X
Source RAM = MO ~ M3 *,MC0 ~ MC3 *
Instruction Code
b31 25 20 0
0 0 1 0 0x x x
Bit Data
Process Selections
bit 22 bit 21 bit 20
0 0 0 DATA RAM0 [RX]
0 0 1 DATA RAM1 [RX]
0 1 0 DATA RAM2 [RX]
0 1 1 DATA RAM3 [RX]
1 0 0 DATA RAM0 [RX] ,CT0++
1 0 1 DATA RAM1 [RX] ,CT1++
1 1 0 DATA RAM2 [RX] ,CT2++
1 1 1 DATA RAM3 [RX] ,CT3++
Flag * RX ; becomes data selected by multiple choice.
CTx(x=0 ~ 3) ; incremented as long as b22 = 1. No change when b22
0.
Comments * [Mx(x=0 ~ 3)] designates DATA RAMx(x=0~3).
[MCx(x=0 ~ 3)] designates DATA RAMx(x=0~3) and after transfer,
increments [CTx(x=0~3).
SCU User's Manual 107
MOV MUL,P Transfer (MULTIPLIER →[Pn])
Operation The high order 16 bit of the MULTIPLIER data 48 bit is transfered to
[PH], and the low order 32 bit is transferred to [PL]
Description
MULTIPLIER
16bit 32bit
[PH] [PL]
Label
MOV MUL,P
Instruction Code
b31 25 20 0
0 0 0 1 0
Flag PH ; becomes MULTIPLIER high order 16 bit data
PL ; becomes the MULTIPLIER low order 32 bit data
Comments
108
MOV [s],P Transfer (Memory →[PL])
Operation Data is transfered to [PL] from the data RAM address displayed by
[CTx(x=0~3)]. The value of [PH] is changed by the [PL] sign
Description extension.
[CTx] [PL]
32bit
Label
MOV [Source RAM],P
Source RAM = MO ~ M3,MC0 ~ MC3 *
Instruction Code
b31 25 20 0
0 0 0 1 1x x x
Bit Data
Process Selections
bit 22 bit 21 bit 20
0 0 0 DATA RAM0 [PL]
0 0 1 DATA RAM1 [PL ]
0 1 0 DATA RAM2 [PL]
0 1 1 DATA RAM3 [PL]
1 0 0 DATA RAM0 [PL] ,CT0++
1 0 1 DATA RAM1 [PL] ,CT1++
1 1 0 DATA RAM2 [PL] ,CT2++
1 1 1 DATA RAM3 [PL] ,CT3++
Flag PL ; becomes data selected by multiple choice.
PH ; changed by [PL] sign extension.
CTx(x=0~3) ; incremented when b22 = 1. No change when b22 = 0.
Comments * [Mx(x=0 ~ 3)] designates DATA RAMx(x=0~3).
[MCx(x=0 ~ 3)] designates DATA RAMx(x=0~3) and after transfer
increments [CTx(x=0~3).
SCU User's Manual 109
• Y-Bus Control Commands
Y-Bus control commands transfer data using the Y-Bus to the RY register
and ACH, ACL registers. The following pages shows more about Y-Bus
control commands.
110
NOP Y-Bus No Operation
Operation No Y-Bus control process
Description
Label NOP
Instruction Code
b31 19 17 0
0 0 0 0 0
Flag No change
Comments
SCU User's Manual 111
MOV [s],Y Transfer (Memory →[RY])
Operation Data is transfered to [RY] from the data RAM address displayed by
[CTx(x=0~3)].
Description
[CTx] [RY]
32bit
Label
MOV [Source RAM],Y
Source RAM = MO ~ M3,MC0 ~ MC3 *
Instruction Code
b31 19 14 0
0 0 1 0 0x x x
Bit Data
Process Selections
bit16 bit15 bit 14
0 0 0 DATA RAM0 [RY]
0 0 1 DATA RAM1 [RY ]
0 1 0 DATA RAM2 [RY]
0 1 1 DATA RAM3 [RY]
1 0 0 DATA RAM0 [RY] ,CT0++
1 0 1 DATA RAM0 [RY] ,CT1++
1 1 0 DATA RAM0 [RY] ,CT2++
1 1 1 DATA RAM0 [RY] ,CT3++
Flag RY ; becomes data selected by multiple choice.
CTx(x=0~3) ; incremented when b16 = 1. No change when b16 = 0.
Comments * [Mx(x=0 ~ 3)] designates DATA RAMx(x=0~3).
[MCx(x=0 ~ 3)] designates DATA RAMx(x=0~3) and after transfer
increments [CTx(x=0~3).
112
CLR A 0 Clear
Operation 0 clears the [ACH] and [ACL] values.
Description
Label CLR A
Instruction Code
b31 19 14 0
0 0 0 0 1
Flag ACH ; becomes 0
ACL ; becomes 0
Comments
SCU User's Manual 113
MOV ALU,A Transfer ([ALU] →[ACH][ACL])
Operation Transfers the value of the [ALU] high order 16 bit to [ACH] and the
value of the [ALU] low order 32 bit to [ACL].
Description
ALU
16bit 32bit
[ACH] [ACL]
Label
MOV ALU,A
Instruction Code
b31 19 14 0
0 0 0 1 0
Flag ACH ; becomes ALU high order 16 bit data
ACL ; becomes ALU low order 32 bit data
Comments
114
MOV [s],A Transfer (Memory →[ACL])
Operation Data is transfered to [ACL] from the data RAM address displayed by
[CTx(x=0~3)]. The value of [ACH] is changed by the sign extension of
Description [ACL].
[CTx] [ACL]
32bit
Label
MOV [Source RAM],A
Source RAM = MO ~ M3,MC0 ~ MC3 *
Instruction Code
b31 19 14 0
0 0 0 1 1x x x
Bit Data
Process Selections
bit16 bit15 bit 14
0 0 0DATA RAM0 [ACL]
0 0 1DATA RAM1 [ACL]
0 1 0DATA RAM2 [ACL]
0 1 1DATA RAM3 [ACL]
1 0 0DATA RAM0 [ACL] ,CT0++
1 0 1DATA RAM1 [ACL] ,CT1++
1 1 0DATA RAM2 [ACL] ,CT2++
1 1 1DATA RAM3 [ACL] ,CT3++
Flag ACL ; becomes data selected by multiple choice.
ACH ; is changed by the sign extension of [ACL]
CTx(x=0~3) ; incremented when b16 = 1. No change when b16 = 0.
Comments * [Mx(x=0 ~ 3)] designates DATA RAMx(x=0~3).
[MCx(x=0 ~ 3)] designates DATA RAMx(x=0~3) and after transfer
increments [CTx(x=0~3).
SCU User's Manual 115
• D1-Bus Control Commands
D1-Bus control commands control the exchange of data between memory
connected to the D1-Bus. The following pages shows more about D1-Bus
control commands.
116
NOP D1-Bus No Operation
Operation No D1-Bus control process
Description
Label NOP
Instruction Code
b31 13 0
0 0 0 0
Flag No change
Comments
SCU User's Manual 117
MOV SImm,[d] Transfer (SImm →[destination])
Operation SImm data is transfered to the RAM or register designated by
[destination]. SImm data is signed 8 bit data.
Description
[destination]
Short Immediate Data
D31 - 7 ← b7
D6-0 ← b6-0
Label MOV SImm,[Destination]
Destination = MC0 ~ MC3 *,RX,PL,RA0,WA0,LOP,TOP,CT0 ~ CT3
Instruction Code
b31 13 8 7 0
0 0 0 1x x x x
SImm Data
Bit Data
[d] Selections
bit11 bit10 bit 9 bit 8
0 0 0 0 DATA RAM0 ,CT0++
0 0 0 1 DATA RAM1 ,CT1++
0 0 1 0 DATA RAM2 ,CT2++
0 0 1 1 DATA RAM3 ,CT3++
0 1 0 0 [RX]
0 1 0 1 [PL]
0 1 1 0 [RA0]
0 1 1 1 [WA0]
1 0 0 0 unused
1 0 0 1 unused
1 0 1 0 [LOP]
1 0 1 1 [TOP]
1 1 0 0 [CT0]
1 1 0 1 [CT1]
1 1 1 0 [CT2]
1 1 1 1 [CT3]
Flag Area selected by [d] selection ; becomes Imm data
Comments * [MCx(x=0 ~ 3)] designates DATA RAMx(x=0~3) and, after transfer,
increments [CTx(x=0~3).
118
MOV [s],[d] Transfer ([source]→[destination])
Operation RAM data or register data designated by [source] is transfered to the
RAM or register designated by [destination].
Description
Label MOV [Source], [Destination]
Source = M0 ~ M3 *,MC0 ~ MC3 *,ALH,ALL
Destination = MC0 ~ MC3,RX,PL,RA0,WA0,LOP,TOP,CT0 ~ CT3
Instruction Code
b31 13 8 3 0
0 0 1 1x x x x x x x x
Bit Data Bit Data
[d] Selections [s] Selections
bit11 bit10 bit 9 bit 8 bit 3 bit 2 bit 1 bit 0
0 0 0 0 DATA RAM0 ,CT0++ 0 0 0 0 DATA RAM0
0 0 0 1 DATA RAM1 ,CT1++ 0 0 0 1 DATA RAM1
0 0 1 0 DATA RAM2 ,CT2++ 0 0 1 0 DATA RAM2
0 0 1 1 DATA RAM3 ,CT3++ 0 0 1 1 DATA RAM3
0 1 0 0 [RX] 0 1 0 0 DATA RAM0 ,CT0++
0 1 0 1 [PL] 0 1 0 1 DATA RAM1 ,CT1++
0 1 1 0 [RA0] 0 1 1 0 DATA RAM2 ,CT2++
0 1 1 1 [WA0] 0 1 1 1 DATA RAM3 ,CT3++
1 0 0 0 unused 1 0 0 0 no field
1 0 0 1 unused 1 0 0 1 [ALU LOW]
1 0 1 0 [LOP] 1 0 1 0 [ALU HIGH]
1 0 1 1 [TOP]
1 1 0 0 [CT0]
1 1 0 1 [CT1]
1 1 1 0 [CT2]
1 1 1 1 [CT3]
Flag Area selected by [d] selection is data of an area selected by [s] selectio
Comments * [Mx(x=0 ~ 3)] designates DATA RAM x(x=0~3)
[MCx(x=0 ~ 3)] designates DATA RAM x(x=0~3) and, after transfer,
increments [CTx(x=0~3).
SCU User's Manual 119
Load Immediate Command
The load immediate command transfers immediate data to the storage destination.
Unconditional transfer follows the format in Figure 4.6. Conditional transfer follows
the format in Figure 4.7. Details are on the following pages.
31 30 29 26 25 24 0
1 0 Storage
to ag 0 Immediate data
Destination
Figure 4.6 Load Immediate Command Format 1 (Unconditional Transfer)
31 30 29 26 25 24 19 18 0
1 0 Storage
to ag 1 Status Immediate data
Destinat
sti ion
Figure 4.7 Load Immediate Command Format 2 (Conditional Transfer)
120
MVI Imm,[d] Unconditional Transfer (Imm →[destination])
Operation Imm data is unconditional and is transfered to the RAM or register
designated by [destination].
Description
Imm data is signed 25 bit data.
Label MVI Imm,[Destination]
Destination = MC0 ~ MC3 *,RX,PL,RA0,WA0,LOP,PC
Instruction Code
b31 24 0
1 0x x x x 0
Imm Data
Bit Data
[d] Selections
bit11 bit10 bit 9 bit 8
0 0 0 0 DATA RAM0 ,CT0++
0 0 0 1 DATA RAM1 ,CT1++
0 0 1 0 DATA RAM2 ,CT2++
0 0 1 1 DATA RAM3 ,CT3++
0 1 0 0 [RX]
0 1 0 1 [PL]
0 1 1 0 [RA0]
0 1 1 1 [WA0]
1 0 0 0 unused
1 0 0 1 unused
1 0 1 0 [LOP]
1 0 1 1 unused
1 1 0 0 [PC] → [TOP] ,[PC]
1 1 0 1 unused
1 1 1 0 unused
1 1 1 1 unused
Flag Area selected by [d] multiple choice ; becomes Imm data
Comments * [MCx(x=0 ~ 3)] designates DATA RAM x(x=0~3) and, after transfer,
increments [CTx(x=0~3).
SCU User's Manual 121
MVI Imm,[d]Z Conditional Transfer (Z=1 then Imm →[destination])
Operation When the Z flag is 1, Imm data is transfered to the RAM or register
designated by [destination]. Imm data is signed 19 bit data.
Description
Can be used as execution of the subroutine program (see instruction
code**) by sending Imm data (subtroutine begin dress) to the PC and
saving the PC (jump address after subroutine ends) value to TOP. Be
aware that the address next after this command will be executed twice
once before the subroutine and once after.
Label MVI Imm,[Destination],Z
Destination RAM = MC0 ~ MC3 *,RX,PL,RA0,WA0,LOP,PC
Instruction Code
b31 18 0
1 0x x x x 1 1 0 0 0 0 1
Imm Data
Bit Data
[d] Selections
bit29 bit28 bit27 bit26
0 0 0 0 DATA RAM0 ,CT0++
0 0 0 1 DATA RAM1 ,CT1++
0 0 1 0 DATA RAM2 ,CT2++
0 0 1 1 DATA RAM3 ,CT3++
0 1 0 0 [RX]
0 1 0 1 [PL]
0 1 1 0 [RA0]
0 1 1 1 [WA0]
1 0 0 0 unused
1 0 0 1 unused
1 0 1 0 [LOP]
1 0 1 1 unused
1 1 0 0 [PC] → [TOP] ,[PC]
1 1 0 1 unused
1 1 1 0 unused
1 1 1 1 unused
Flag Area selected by [d] selection ; becomes Imm data
Comments * [MCx(x=0 ~ 3)] designates DATA RAM x(x=0~3) and, after transfer,
increments [CTx(x=0~3).
122
MVI =Imm,[d]NZ Conditional Transfer (Z=0 then Imm →[destination])
Operation When the Z flag is 0, Imm data is transfered to the RAM or register
designated by [destination]. Imm data is signed 19 bit data.
Description
Can be used as execution of the subroutine program (see instruction
code**) by sending Imm data (subtroutine begin dress) to the PC and
saving the PC (jump address after subroutine ends) value to TOP. Be
aware that the address next after this command will be executed twice
once before the subroutine and once after.
Label MVI Imm,[Destination],NZ
Destination = MC0 ~ MC3 *,RX,PL,RA0,WA0,LOP,PC
Instruction Code
b31 18 0
1 0x x x x 1 1 0 0 0 0 1
Imm Data
Bit Data
[d] Selections
bit29 bit28 bit27 bit26
0 0 0 0 DATA RAM0 ,CT0++
0 0 0 1 DATA RAM1 ,CT1++
0 0 1 0 DATA RAM2 ,CT2++
0 0 1 1 DATA RAM3 ,CT3++
0 1 0 0 [RX]
0 1 0 1 [PL]
0 1 1 0 [RA0]
0 1 1 1 [WA0]
1 0 0 0 unused
1 0 0 1 unused
1 0 1 0 [LOP]
1 0 1 1 unused
1 1 0 0 [PC] → [TOP] ,[PC]
1 1 0 1 unused
1 1 1 0 unused
1 1 1 1 unused
Flag Area selected by [d] selection ; becomes Imm data
Comments * [MCx(x=0 ~ 3)] designates DATA RAM x(x=0~3) and, after transfer ,
increments [CTx(x=0~3).
SCU User's Manual 123
MVI Imm,[d]S Conditional Transfer (S=1 then Imm →[destination])
Operation When the S flag is 1, Imm data is transfered to the RAM or register
designated by [destination]. Imm data is signed 19 bit data.
Description
Can be used asexecution of the subroutine program (see instruction
code**) by sending Imm data (subtroutine begin dress) to the PC and
saving the PC (jump address after subroutine ends) value to TOP. Th
address next after this command will be executed twice, once before
the subroutine and once after.
Label MVI Imm,[Destination],S
Destination = MC0 ~ MC3 *,RX,PL,RA0,WA0,LOP,PC
Instruction Code
b31 18 0
1 0x x x x 1 1 0 0 0 1 0
Imm Data
Bit Data
[d] Selections
bit29 bit28 bit27 bit26
0 0 0 0 DATA RAM0 ,CT0++
0 0 0 1 DATA RAM1 ,CT1++
0 0 1 0 DATA RAM2 ,CT2++
0 0 1 1 DATA RAM3 ,CT3++
0 1 0 0 [RX]
0 1 0 1 [PL]
0 1 1 0 [RA0]
0 1 1 1 [WA0]
1 0 0 0 unused
1 0 0 1 unused
1 0 1 0 [LOP]
1 0 1 1 unused
1 1 0 0 [PC] → [TOP] ,[PC]
1 1 0 1 unused
1 1 1 0 unused
1 1 1 1 unused
Flag Area selected by [d] selection ; becomes Imm data
Comments * [MCx(x=0 ~ 3)] designates DATA RAM x(x=0~3) and, after transfer,
increments [CTx(x=0~3).
124
MVI Imm,[d]NS Conditional Transfer (S=0 then Imm →[destination])
Operation When the S flag is 0, Imm data is transfered to the RAM or register
designated by [destination]. Imm data is signed 19 bit data.
Description
Can be used asexecution of the subroutine program (see instruction
code**) by sending Imm data (subtroutine begin dress) to the PC and
saving the PC (jump address after subroutine ends) value to TOP. Be
aware that the address next after this command will be executed twice
once before the subroutine and once after.
Label MVI Imm,[Destination],NS
Destination = MC0 ~ MC3 *,RX,PL,RA0,WA0,LOP,PC
Instruction Code
b31 18 0
1 0x x x x 1 1 0 0 0 1 0
Imm Data
Bit Data
[d] Selections
bit29 bit28 bit27 bit26
0 0 0 0 DATA RAM0 ,CT0++
0 0 0 1 DATA RAM1 ,CT1++
0 0 1 0 DATA RAM2 ,CT2++
0 0 1 1 DATA RAM3 ,CT3++
0 1 0 0 [RX]
0 1 0 1 [PL]
0 1 1 0 [RA0]
0 1 1 1 [WA0]
1 0 0 0 unused
1 0 0 1 unused
1 0 1 0 [LOP]
1 0 1 1 unused
1 1 0 0 [PC] → [TOP] ,[PC]
1 1 0 1 unused
1 1 1 0 unused
1 1 1 1 unused
Flag Area selected by [d] selection ; becomes Imm data
Comments * [MCx(x=0 ~ 3)] designates DATA RAM x(x=0~3) and, after transfer,
increments [CTx(x=0~3).
SCU User's Manual 125
MVI Imm,[d]C Conditional Transfer (C=1 then Imm →[destination])
Operation When the C flag is 1, Imm data is transfered to the RAM or register
designated by [destination]. Imm data is signed 19 bit data.
Description
Can be used asexecution of the subroutine program (see instruction
code**) by sending Imm data (subtroutine begin dress) to the PC and
saving the PC (jump address after subroutine ends) value to TOP. Be
aware that the address next after this command will be executed twice
once before the subroutine and once after.
Label MVI Imm,[Destination],C
Destination = MC0 ~ MC3 *,RX,PL,RA0,WA0,LOP,PC
Instruction Code
b31 18 0
1 0x x x x 1 1 0 0 1 0 0
Imm Data
Bit Data
[d] Selections
bit29 bit28 bit27 bit26
0 0 0 0 DATA RAM0 ,CT0++
0 0 0 1 DATA RAM1 ,CT1++
0 0 1 0 DATA RAM2 ,CT2++
0 0 1 1 DATA RAM3 ,CT3++
0 1 0 0 [RX]
0 1 0 1 [PL]
0 1 1 0 [RA0]
0 1 1 1 [WA0]
1 0 0 0 unused
1 0 0 1 unused
1 0 1 0 [LOP]
1 0 1 1 unused
1 1 0 0 [PC] → [TOP] ,[PC]
1 1 0 1 unused
1 1 1 0 unused
1 1 1 1 unused
Flag Area selected by [d] selection ; becomes Imm data
Comments * [MCx(x=0 ~ 3)] designates DATA RAM x(x=0~3) and, after transfer,
increments [CTx(x=0~3).
126
MVI Imm,[d]NC Conditional Transfer (C=0 then Imm →[destination])
Operation When the C flag is 0, Imm data is transfered to the RAM or register
designated by [destination]. Imm data is signed 19 bit data.
Description
Can be used asexecution of the subroutine program (see instruction
code**) by sending Imm data (subtroutine begin dress) to the PC and
saving the PC (jump address after subroutine ends) value to TOP. Be
aware that the address next after this command will be executed twice
once before the subroutine and once after.
Label MVI Imm,[Destination],NC
Destination = MC0 ~ MC3 *,RX,PL,RA0,WA0,LOP,PC
Instruction Code
b31 18 0
1 0x x x x 1 1 0 0 1 0 0
Imm Data
Bit Data
[d] Selections
bit29 bit28 bit27 bit26
0 0 0 0 DATA RAM0 ,CT0++
0 0 0 1 DATA RAM1 ,CT1++
0 0 1 0 DATA RAM2 ,CT2++
0 0 1 1 DATA RAM3 ,CT3++
0 1 0 0 [RX]
0 1 0 1 [PL]
0 1 1 0 [RA0]
0 1 1 1 [WA0]
1 0 0 0 unused
1 0 0 1 unused
1 0 1 0 [LOP]
1 0 1 1 unused
1 1 0 0 [PC] → [TOP] ,[PC]
1 1 0 1 unused
1 1 1 0 unused
1 1 1 1 unused
Flag Area selected by [d] selection ; becomes Imm data
Comments * [MCx(x=0 ~ 3)] designates DATA RAM x(x=0~3) and, after transfer,
increments [CTx(x=0~3).
SCU User's Manual 127
MVI Imm,[d],T0 Conditional Transfer (T0=1 then Imm →[destination])
Operation When the T0 flag is 1, Imm data is transfered to the RAM or register
designated by [destination]. Imm data is signed 19 bit data.
Description
Can be used asexecution of the subroutine program (see instruction
code**) by sending Imm data (subtroutine begin dress) to the PC and
saving the PC (jump address after subroutine ends) value to TOP. Be
aware that the address next after this command will be executed twice
once before the subroutine and once after.
Label MVI Imm,[Destination],T0
Destination = MC0 ~ MC3 *,RX,PL,RA0,WA0,LOP,PC
Instruction Code
b31 18 0
1 0x x x x 1 1 0 1 0 0 0
Imm Data
Bit Data
[d] Selections
bit29 bit28 bit27 bit26
0 0 0 0 DATA RAM0 ,CT0++
0 0 0 1 DATA RAM1 ,CT1++
0 0 1 0 DATA RAM2 ,CT2++
0 0 1 1 DATA RAM3 ,CT3++
0 1 0 0 [RX]
0 1 0 1 [PL]
0 1 1 0 [RA0]
0 1 1 1 [WA0]
1 0 0 0 unused
1 0 0 1 unused
1 0 1 0 [LOP]
1 0 1 1 unused
1 1 0 0 [PC] → [TOP] ,[PC]
1 1 0 1 unused
1 1 1 0 unused
1 1 1 1 unused
Flag Area selected by [d] selection ; becomes Imm data
Comments * [MCx(x=0 ~ 3)] designates DATA RAM x(x=0~3) and, after transfer,
increments [CTx(x=0~3).
128
MVI Imm,[d]NT0 Conditional Transfer (T0=0 then Imm →[destination])
Operation When the T0 flag is 0, Imm data is transfered to the RAM or register
designated by [destination]. Imm data is signed 19 bit data.
Description
Can be used asexecution of the subroutine program (see instruction
code**) by sending Imm data (subtroutine begin dress) to the PC and
saving the PC (jump address after subroutine ends) value to TOP. Be
aware that the address next after this command will be executed twice
once before the subroutine and once after.
Label MVI Imm,[Destination],NT0
Destination = MC0 ~ MC3 *,RX,PL,RA0,WA0,LOP,PC
Instruction Code
b31 18 0
1 0x x x x 1 0 0 1 0 0 0
Imm Data
Bit Data
[d] Selections
bit29 bit28 bit27 bit26
0 0 0 0 DATA RAM0 ,CT0++
0 0 0 1 DATA RAM1 ,CT1++
0 0 1 0 DATA RAM2 ,CT2++
0 0 1 1 DATA RAM3 ,CT3++
0 1 0 0 [RX]
0 1 0 1 [PL]
0 1 1 0 [RA0]
0 1 1 1 [WA0]
1 0 0 0 unused
1 0 0 1 unused
1 0 1 0 [LOP]
1 0 1 1 unused
1 1 0 0 [PC] → [TOP] ,[PC]
1 1 0 1 unused
1 1 1 0 unused
1 1 1 1 unused
Flag Area selected by [d] selection ; becomes Imm data
Comments * [MCx(x=0 ~ 3)] designates DATA RAM x(x=0~3) and, after transfer,
increments [CTx(x=0~3).
SCU User's Manual 129
MVI Imm,[d]ZS Conditional Transfer (Z=1 or S=1 then Imm →
[destination])
Operation When the Z flag or S flag is 1, Imm data is transfered to the RAM or
register designated by [destination]. Imm data is signed 19 bit data.
Description
Can be used asexecution of the subroutine program (see instruction
code**) by sending Imm data (subtroutine begin dress) to the PC and
saving the PC (jump address after subroutine ends) value to TOP. Be
aware that the address next after this command will be executed twice
once before the subroutine and once after.
Label MVI Imm,[Destination],ZS
Destination = MC0 ~ MC3 *,RX,PL,RA0,WA0,LOP,PC
Instruction Code
b31 18 0
1 0x x x x 1 1 0 0 0 1 1
Imm Data
Bit Data
[d] Selections
bit29 bit28 bit27 bit26
0 0 0 0 DATA RAM0 ,CT0++
0 0 0 1 DATA RAM1 ,CT1++
0 0 1 0 DATA RAM2 ,CT2++
0 0 1 1 DATA RAM3 ,CT3++
0 1 0 0 [RX]
0 1 0 1 [PL]
0 1 1 0 [RA0]
0 1 1 1 [WA0]
1 0 0 0 unused
1 0 0 1 unused
1 0 1 0 [LOP]
1 0 1 1 unused
1 1 0 0 [PC] → [TOP] ,[PC]
1 1 0 1 unused
1 1 1 0 unused
1 1 1 1 unused
Flag Area selected by [d] selection ; becomes Imm data
Comments * [MCx(x=0 ~ 3)] designates DATA RAM x(x=0~3) and, after transfer,
increments [CTx(x=0~3).
130
MVI Imm,[d]NZS Conditional Transfer (Z=0=S then Imm → [destination])
Operation When the Z flag or S flag are both 0, Imm data is transfered to the RA
or register designated by [destination]. Imm data is signed 19 bit data
Description
Can be used as execution of the subroutine program (see instruction
code**) by sending Imm data (subtroutine begin dress) to the PC and
saving the PC (jump address after subroutine ends) value to TOP. Be
aware that the address next after this command will be executed twice
once before the subroutine and once after.
Label MVI Imm,[Destination],NZS
Destination = MC0 ~ MC3 *,RX,PL,RA0,WA0,LOP,PC
Instruction Code
b31 18 0
1 0x x x x 1 0 0 0 0 1 1
Imm Data
Bit Data
[d] Selections
bit29 bit28 bit27 bit26
0 0 0 0 DATA RAM0 ,CT0++
0 0 0 1 DATA RAM1 ,CT1++
0 0 1 0 DATA RAM2 ,CT2++
0 0 1 1 DATA RAM3 ,CT3++
0 1 0 0 [RX]
0 1 0 1 [PL]
0 1 1 0 [RA0]
0 1 1 1 [WA0]
1 0 0 0 unused
1 0 0 1 unused
1 0 1 0 [LOP]
1 0 1 1 unused
1 1 0 0 [PC] → [TOP] ,[PC]
1 1 0 1 unused
1 1 1 0 unused
1 1 1 1 unused
Flag Area selected by [d] selection ; becomes Imm data
Comments * [MCx(x=0 ~ 3)] designates DATA RAM x(x=0~3) and, after transfer,
increments [CTx(x=0~3).
SCU User's Manual 131
DMA Command
DMA commands transfer data of an external and DSP internal RAM through an
external bus. There are two methods, one of which is setting the transfer word
number directly by Imm data, and the other is setting the internal RAM transfer
word number by designating the number of the internal data RAM. The first
method is shown in Figure 4.8 and the second method is shown in Figure 4.9.
Details of the command are shown on the pages that follow.
31 30 29 28 27 18 17 15 14 13 12 11 10 8 7 0
d
1 1 0 0 Mod
o e H 0 dir RAM Immediate data
Figure 4.8 DMA Command Format 1
31 30 29 28 27 18 17 15 14 13 12 11 10 8 7 3 2 0
d
1 1 0 0 Mod
o e H 1 dir RAM SOURCE
Figure 4.9 DMA Command Format 2
132
DMA D0,[RAM],SImm DMA Transfer (D0[31-0] → RAM)
Operation D0[31-0] data is transfered to RAM . The external address register
and transfer word number register are updated (added) according to
Description the address add number. The transfer word number register is a
register for storing the transfer word number in long word units. This
word number is either 0 or transfer ends when forced to end.
Label DMA D0,[Destination],Counter
Destination = M0 ~ M3 *
Instruction Code
b31 28 17 15 7 0
1 1 0 0 x x x 0 0 0 0 0x x
SImm Data
Bit Data Bit Data
Add Mode Selections Selections
bit17 bit16 bit15 bit9 bit8
0 0 0 Address Add 0 0 0 DATA RAM 0
0 0 1 Address Add 1 0 1 DATA RAM 1
0 1 0 Address Add 2 1 0 DATA RAM 2
0 1 1 Address Add 4 1 1 DATA RAM 3
1 0 0 Address Add 8
1 0 1 Address Add 16
1 1 0 Address Add 32
1 1 1 Address Add 64
Flag T0 ; becomes 1.
Comments * [MCx(x=0 ~ 3)] selects DATA RAM x(x=0~3).
**When the END signal informing you that transfer end from outside
has been entered, T0; becomes 0.
Designating address-add adds an add number after the command and
becomes DMA0~DMA64.
Add number is1 when address add number designation is omitted.
The transfer source address is set in advance to RA0 and the transfer
destination RAM address is set in advance to CTx.
SCU User's Manual 133
DMA [RAM],D0,SImm DMA Transfer (RAM → D0[31-0])
Operation RAM data is transfered to D0[31-0]. The external address register and
transfer word number register are updated (added) according to the
Description address add number. Only add numbers 0 and 1 are valid for the A -
Bus and the write unit is 32bit. All add numbers (0 - 64) are valid for
the B-Bus. Write unit is16bit; 32bit data is divided in half and written at
intervals of16X (0-64). The transfer word number register is a register
for storing the transfer word number in long word units. This word
number is either 0 or transfer ends when forced to end.
Label DMA [Source],D0,Counter
Source = Mo ~ M3 *
Instruction Code
b31 17 15 7 0
1 1 0 0 x x x 0 0 1 0 0x x
SImm Data
Bit Data Bit Data
Add Mode Selections Selections
bit17 bit16 bit15 bit9 bit8
0 0 0 Address Add 0 0 0 DATA RAM 0
0 0 1 Address Add 1 0 1 DATA RAM 1
0 1 0 Address Add 2 1 0 DATA RAM 2
0 1 1 Address Add 4 1 1 DATA RAM 3
1 0 0 Address Add 8
1 0 1 Address Add 16
1 1 0 Address Add 32
1 1 1 Address Add 64
Flag T0 ; becomes 1.
Comments * [MCx(x=0 ~ 3)] selects DATA RAM x(x=0~3).
**When the END signal informing you that transfer end from outside
has been entered, T0; becomes 0.
Designating address-add adds an add number after the command and
becomes DMA0~DMA64.
Add number is 1 when address add number designation is omitted.
The transfer source RAM address is set in advance to CTx and the
transfer destination address is set in advance to WA0.
134
DMA D0,[RAM],[s] DMA Transfer (D0[31-0] → RAM )
Operation [s] data designated by bit0~2 is treated as a transfer counter, and only
numbers displayed transfer D0[31-0] data to the RAM. External
Description address register and transfer word number register are updated
(added) according to the address add number. The transfer word
number register stores transfer word numbers in long word units. This
word number becomes 0 or transfer ends when forced to end.
Label DMA D0,[Destination],[Counter]
Counter = M0 ~ M3 *,MC0~MC3*
Destination = M0~M3 *,PRG *
Instruction Valid only for A-Bus
Code Address add is 32bit units.
bit 15 Add Mode Selections
0 Address Add 0
1 Address Add 1
b31 28 7 0
1 1 0 0 0 0x 0 1 0 0x x x x x x
Bit Data Bit Data
RAM Selections [s] Selections
bit 10 bit9 bit8 bit 2 bit1 bit 0
0 0 0 DATA RAM 0 0 0 0 DATA RAM 0
0 0 1 DATA RAM 1 0 0 1 DATA RAM 1
0 1 0 DATA RAM 2 0 1 0 DATA RAM 2
0 1 1 DATA RAM 3 0 1 1 DATA RAM 3
1 0 0 PROGRAM RAM 1 0 0 DATA RAM 0,CT0++
1 0 1 DATA RAM 1,CT1++
1 1 0 DATA RAM 2,CT2++
1 1 1 DATA RAM 3,CT3++
Flag T0 ; becomes 1. **
CTx(x0~3) ; incremented when b2=1. When b2=0, there is no change
Comments * [MCx(x=0 ~ 3)] selects DATA RAM x(x=0~3). MCx(x=0~3) selects
DATA RAM x(x=0~3), and after transfer increments CTx(x0~3).
PRG selects program RAM.
**When the END signal informing you that transfer end from outside
has been entered, T0; becomes 0.
Designating address-add adds an add number after the command an
becomes DMA0~DMA1.
Add number is 1 when address add number designation is omitted.
The transfer source address is set in advance to RA0 and the transfer
destination RAM address is set in advance to CTx.
SCU User's Manual 135
DMA [RAM],D0,[s] DMA Transfer (RAM → D0[31-0] )
Operation [s] data designated by bit0~2 is treated as a transfer counter, and only
numbers displayed transfer RAM data to DO[31-0] data. External
Description address register and transfer word number register are updated
(added) according to the address add number. The transfer word
number register stores transfer word numbers in long word units. But
only add numbers 0 and 1 are valid for A-Bus, and write units are 32
bits. For B-Bus, all add numbers (0-64) are valid. Write units are 16 bit;
32 bit data is divided in half and written at intervals of 16bitX (0-64). Th
transfer word number register stores transfer words in long word units.
This word number becomes 0 or transfer ends when forced to end.
Label DMA D0,[Destination],[Counter]
Counter = M0 ~ M3 *,MC0~MC3*
Source = M0~M3 *,PR*
Instruction
Code Bit Data
Add Mode Selections
Bit Data
[s] Selections
bit17 bit16 bit15 bit 2 bit1 bit 0
0 0 0 Address Add 0 0 0 0 DATA RAM 0
0 0 1 Address Add 1 0 0 1 DATA RAM 1
0 1 0 Address Add 2 0 1 0 DATA RAM 2
0 1 1 Address Add 4 0 1 1 DATA RAM 3
1 0 0 Address Add 8 1 0 0 DATA RAM 0,CT0++
1 0 1 Address Add 16 1 0 1 DATA RAM 1,CT1++
1 1 0 Address Add 32 1 1 0 DATA RAM 2,CT2++
1 1 1 Address Add 64 1 1 1 DATA RAM 3,CT3++
b31 17 7 0
1 1 0 0 x x x 0 1 1 0 0x x x x x
Bit Data
RAM Selections
bit9 bit8
0 0 DATA RAM 0
0 1 DATA RAM 1
1 0 DATA RAM 2
1 1 DATA RAM 3
Flag T0 ; becomes 1. **
CTx(x=0~3) ; incremented when b2=1. No changes when b2=0.
Comments * [MCx(x=0 ~ 3)] selects DATA RAM x(x=0~3). MCx(x=0~3) selects
DATA RAM x(x=0~3), and after transfer increments CTx(x0~3).
**When the END signal informing you that transfer end from outside
has been entered, T0; becomes 0.
Designating address-add adds an add number after the command an
becomes DMA0~DMA64.
Add number is 1 when address add number designation is omitted.
The transfer source RAM address is set in advance to CTx and the
transfer destination address is set in advance to WA0.
136
DMAH D0,[RAM],SImm DMA Transfer (D0[31-0] → RAM) by HOLD Status
Operation D0[31-0] data is transfered to the RAM. External address register and
transfer word number register save the value at the time transfer
Description begins. The transfer word number register stores the transfer word
number in long word units. This word number becomes 0 or becomes
the transfer end when forced to end.
Label DMAH D0,[Destination],[Counter]
Destination = M0~M3 *,PR*
Instruction Code
b31 28 17 15 7 0
1 1 0 0 0 0x 0 1 0 0x x x x x x
SImm Data
bit 15 Add Mode Selections Bit Data
RAM Selections
0 Address Add 0 bit 10 bit9 bit8
1 Address Add 1 0 0 0 DATA RAM 0
Valid only for A-Bus 0 0 1 DATA RAM 1
Address add is 32 bit unit. 0 1 0 DATA RAM 2
0 1 1 DATA RAM 3
1 0 0 PROGRAM RAM
Flag T0 ; becomes 1.**
Comments * [MCx(x=0 ~ 3)] selects DATA RAM x(x=0~3).
PR selects PROGRAM RAM
**When the END signal informing you that transfer end from outside
has been entered, T0; becomes 0.
Designating address-add adds an add number after the command an
becomes DMAH0~DMAH1.
Add number is 1 when address add number designation is omitted.
The transfer source address is set in advance to RA0 and the transfer
destination RAM address is set in advance to CTx.
SCU User's Manual 137
DMAH [RAM],D0,SImm DMA Transfer (RAM → D0[31-0]) by HOLD Status
Operation RAM data is transfered to D0[31-0]. The external address register and
transfer word number register save the value when transfer starts.
Description The transfer word number register is a register for storing the transfer
word number in long word units. This word number is either 0 or
transfer ends when forced to end.
Label DMA H [Source],D0,Counter
Source = Mo ~ M3 *
Instruction Code
b31 17 15 7 0
1 1 0 0 x x x 1 0 1 0 0x x
SImm Data
Bit Data Bit Data
Add Mode Selections Selections
bit17 bit16 bit15 bit9 bit8
0 0 0 Address Add 0 0 0 DATA RAM 0
0 0 1 Address Add 1 0 1 DATA RAM 1
0 1 0 Address Add 2 1 0 DATA RAM 2
0 1 1 Address Add 4 1 1 DATA RAM 3
1 0 0 Address Add 8
1 0 1 Address Add 16
1 1 0 Address Add 32
1 1 1 Address Add 64
Flag T0 ; becomes 1.**
Comments * [MCx(x=0 ~ 3)] selects DATA RAM x(x=0~3).
**When the END signal informing you that transfer end fromoutside
has been entered, T0; becomes 0.
Designating address-add adds an add number after the command and
becomes DMAH0~DMAH64.
Add number is 1 when address add number designation is omitted.
The transfer source RAM address is set in advance to CTx and the
transfer destination address is set in advance to WA0.
138
DMAH D0,[RAM],[s] DMA Transfer (D0[31-0] → RAM ) by HOLD Status
Operation [s] data designated by bit0~2 is treated as transfer counter, and only
numbers displayed transfer RAM data to D0(31-0) data. External
Description address register and transfer word number register save the value,
when starting transfer, to the address add number. The transfer word
number register stores transfer word numbers in long word units. This
word number becomes 0 or transfer ends when forced to end.
Label DMA H D0,[Destination],[Counter]
Counter = M0 ~ M3 *,MC0~MC3*
Destination = M0~M3 *,PR*
Instruction Valid only for A-Bus
Code Address add is 32bit units.
bit 15 Add Mode Selections
0 Address Add 0
1 Address Add 1
b31 28 7 0
1 1 0 0 0 0x 1 1 0 0x x x x x x
Bit Data Bit Data
RAM Selections [s] Selections
bit 10 bit9 bit8 bit 2 bit1 bit 0
0 0 0 DATA RAM 0 0 0 0 DATA RAM 0
0 0 1 DATA RAM 1 0 0 1 DATA RAM 1
0 1 0 DATA RAM 2 0 1 0 DATA RAM 2
0 1 1 DATA RAM 3 0 1 1 DATA RAM 3
1 0 0 PROGRAM RAM 1 0 0 DATA RAM 0,CT0++
1 0 1 DATA RAM 1,CT1++
1 1 0 DATA RAM 2,CT2++
1 1 1 DATA RAM 3,CT3++
Flag T0 ; becomes 1. **
CTx(x0~3) ; incremented when b2=1. When b2=0, there is no change
Comments * [MCx(x=0 ~ 3)] selects DATA RAM x(x=0~3). MCx(x=0~3) selects
DATA RAM x(x=0~3), and after transfer increments CTx(x0~3).
**When the END signal informing you that transfer end from outside
has been entered, T0; becomes 0.
Designating address-add adds an add number after the command an
becomes DMAH0~DMAH1.
Add number is 1 when address add number designation is omitted.
The transfer source address is set in advance to RA0 and the transfer
destination RAM address is set in advance to CTx.
SCU User's Manual 139
DMA [RAM],D0,[s] DMA Transfer (RAM → D0[31-0] ) by HOLD Status
Operation [s] data designated by bit0~2 is treated as transfer counter, and only
numbers displayed transfer RAM data to D0[31-0] data. External
Description address register and transfer word number register save the value
when starting transfer. The transfer word number register stores
transfer words in long word units. This word number becomes 0 or
transfer ends when forced to end.
Label DMAH [Source],DO,[Counter]
Counter = M0 ~ M3 *,MC0~MC3*
Source = M0~M3 *,PR*
Instruction
Code Bit Data Add Mode Bit Data
[s] Selections
bit17 bit16 bit15 Selections bit 2 bit1 bit 0
0 0 0 Address Add 0 0 0 0 Data RAM 0
0 0 1 Address Add 1 0 0 1 Data RAM 1
0 1 0 Address Add 2 0 1 0 Data RAM 2
0 1 1 Address Add 4 0 1 1 Data RAM 3
1 0 0 Address Add 8 1 0 0 Data RAM 0 ,CT0++
1 0 1 Address Add 16 1 0 1 Data RAM 1 ,CT1++
1 1 0 Address Add 32 1 1 0 Data RAM 2 ,CT2++
1 1 1 Address Add 64 1 1 1 Data RAM 3 ,CT3++
b31 17 7 0
1 1 0 0 x x x 1 1 1 0 0x x x x x
Bit Data
RAM Selections
bit9 bit8
0 0 DATA RAM 0
0 1 DATA RAM 1
1 0 DATA RAM 2
1 1 DATA RAM 3
Flag T0 ; becomes 1. **
CTx(x=0~3) ; incremented when b2=1. No changes when b2=0.
Comments * [MCx(x=0 ~ 3)] selects DATA RAM x(x=0~3). MCx(x=0~3) selects
DATA RAM x(x=0~3), and after transfer increments CTx(x0~3).
**When the END signal informing you that transfer end from outside
has been entered, T0; becomes 0.
Designating address-add adds an add number after the command and
becomes DMAH0~DMAH64.
Add number is 1 when address add number designation is omitted.
The transfer source RAM address is set in advance to CTx and the
transfer destination address is set in advance to WA0.
140
JUMP Commands
Jump commands are realized by storing immediate data in the program counter.
Figure 4.10 shows the Jump command format. Details of the command are shown in
the next few pages.
31 30 29 28 27 26 25 24 19 18 8 7 0
1 1 0 1 Status Immediate
Figure 4.10 Jump Command Format
SCU User's Manual 141
JMP Imm Unconditional Jump
Operation Jumps according to address data (Imm).
Description
Label JMP [address]
Instruction Code
b31 25 19 7 0
1 1 0 1 0 0 0 0 0 0 0
Imm Data
Flag No change
Comments
142
JMP Z, Imm Conditional Jump (Z = 1)
Operation When the Z flag is 1, jump is in accordance with address data (Imm).
Description
Label JMP Z,[address]
Instruction Code
b31 25 19 7 0
1 1 0 1 1 1 0 0 0 0 1
Imm Data
Flag No change
Comments
SCU User's Manual 143
JMP NZ,Imm Conditional Jump (Z=0)
Operation When the Z flag is 0, jump is in accordance with address data (Imm).
Description
Label JMP NZ,[address]
Instruction Code
b31 25 19 7 0
1 1 0 1 1 0 0 0 0 0 1
Imm Data
Flag No change
Comments
144
JMP S,Imm Conditional Jump (S=1)
Operation When the S flag is 1, jump is in accordance with address data (Imm).
Description
Label JMP S,[address]
Instruction Code
b31 25 19 7 0
1 1 0 1 1 1 0 0 0 1 0
Imm Data
Flag No change
Comments
SCU User's Manual 145
JMP NS,Imm Conditional Jump (Z=0)
Operation When the S flag is 0, jump is in accordance with address data (Imm).
Description
Label JMP NS,[address]
Instruction Code
b31 25 19 7 0
1 1 0 1 1 0 0 0 0 1 0
Imm Data
Flag No change
Comments
146
JMP C,Imm Conditional Jump (C=1)
Operation When the C flag is 1, jump is in accordance with address data (Imm).
Description
Label JMP C,[address]
Instruction Code
b31 25 19 7 0
1 1 0 1 1 1 0 0 1 0 0
Imm Data
Flag No change
Comments
SCU User's Manual 147
JMP NC,Imm Conditional Jump (C=0)
Operation When the C flag is 0, jump is in accordance with address data (Imm).
Description
Label JMP NC,[address]
Instruction Code
b31 25 19 7 0
1 1 0 1 1 0 0 0 1 0 0
Imm Data
Flag No change
Comments
148
JMP T0,Imm Conditional Jump (T0=1)
Operation When the T0 flag is 1, jump is in accordance with address data (Imm).
Description
Label JMP T0,[address]
Instruction Code
b31 25 19 7 0
1 1 0 1 1 1 0 1 0 0 0
Imm Data
Flag No change
Comments
SCU User's Manual 149
JMP NT0,Imm Conditional Jump (T0=0)
Operation When the T0 flag is 0, jump is in accordance with address data (Imm).
Description
Label JMP NT0,[address]
Instruction Code
b31 25 19 7 0
1 1 0 1 1 0 01 0 0 0
Imm Data
Flag No change
Comments
150
JMP ZS,Imm Conditional Jump (Z=1 or S=1)
Operation When the Z flag or S flag is 1, jump is in accordance with address data
(Imm).
Description
Label JMP ZS,[address]
Instruction Code
b31 25 19 7 0
1 1 0 1 1 1 0 0 0 1 1
Imm Data
Flag No change
Comments
SCU User's Manual 151
JMP NZS,Imm Conditional Jump (Z=S=0)
Operation When the Z flag and S flag are 0, jump is in accordnce with address d
(Imm).
Description
Label JMP NZS,[address]
Instruction Code
b31 25 19 7 0
1 1 0 1 1 0 0 0 0 1 1
Imm Data
Flag No change
Comments
152
LOOP BOTTOM Commands
Loop Bottom commands repeat one to several steps of a program. Figure 4.11 shows
the Jump command format. Details of the command are shown in the next few
pages.
31 30 29 28 27 0
1 1 1 0 MOD
Figure 4.11 Loop Bottom Command Format
SCU User's Manual 153
BTM Repeat Process Criterion
Operation There is no repeat when the [LOP] flag is 0. Otherwise the program
counter returns to [TOP].
Description
Does nothing when the [LOP] flag is 0; otherwise, it returns the
program counter to [TOP].
Label BTM
Instruction Code
b31 29 27 0
1 1 1 0 0
Flag LOP ; decremented when LOP≠ 0. Ends when LOP=0.
Comments
154
LPS 1 Step Repeat
Operation Repeats next 1 step until the [LOP] register is 0.
Description
Label LPS
Instruction Code
b31 29 27 0
1 1 1 0 1
Flag LOP ; decremented when LOP≠ 0. Ends when LOP=0.
Comments After the process ends, PC executes LOP+1 time then ends.
SCU User's Manual 155
END Command
The END command stops the program currently being executed. Figure 4.12 shows
the END command format. Details of the command are shown in the next two
pages.
31 30 29 28 27 0
1 1 1 1 IE
Figure 4.12 END Command Format
156
END STOP
Operation Stops the program.
Description
Label END
Instruction Code
b31 29 27 0
1 1 1 1 0
Flag EX ; is0.
Comments
SCU User's Manual 157
ENDI Program End
Operation Stops the program, and sets the E flag (program end interrupt flag).
Description
Label ENDI
Instruction Code
b31 29 27 0
1 1 1 1 1
Flag E ; is 1
EX ; is0.
Comments
158
APPENDIX
This appendix contains a list of SCU register address maps.
SCU User's Manual 159
Register names are shown in parenthesis.
160
D0R26 D0R25 D0R24 D0R23 D0R22 D0R21 D0R20
D0R19 D0R18 D0R17 D0R16 D0R15 D0R14 D0R13 D0R12 D0R11 D0R10 D0R9 D0R8 D0R7
D0R6 D0R5 D0R4 D0R3 D0R2 D0R1 D0R0
D0W26 D0W25 D0W24 D0W23 D0W22 D0W21 D0W20 D0W19 D0W18 D0W17 D0W16 D0W15 D0W14 D0W13 D0W12 D0W11 D0W10 D0W9 D0W8 D0W7 D0W6 D0W5 D0W4 D0W3 D0W2 D0W1 D0W0
D0C19 D0C18 D0C17 D0C16 D0C15 D0C14 D0C13 D0C12 D0C11 D0C10 D0C9
D0C8 D0C7 D0C6 D0C5 D0C4 D0C3 D0C2 D0C1 D0C0
D0RA D0WA2 D0WA1 D0WA0
D0EN D0GO
D0MOD D0RUP
D0WUP
D0FT2 D0FT1 D0FT0
D1R26 D1R25 D1R24 D1R23 D1R22 D1R21 D1R20 D1R19
D1R18 D1R17 D1R16 D1R15 D1R14 D1R13 D1R12 D1R11 D1R10 D1R9
D1R8 D1R7 D1R6 D1R5 D1R4 D1R3 D1R2 D1R1 D1R0
D1W26 D1W25 D1W24 D1W23 D1W22 D1W21 D1W20 D1W19 D1W18 D1W17 D1W16 D1W15 D1W14 D1W13 D1W12 D1W11 D1W10 D1W9 D1W8 D1W7 D1W6 D2W5 D1W4 D1W3 D1W2 D1W1 D1W0
D1C11 D1C10 D1C9 D1C8 D1C7 D1C6 D1C5 D1C4 D1C3 D1C2 D1C1 D1C0
D1RA D1WA2 D1WA1 D1WA0
D1EN
D1GO
D1MOD
D1RUP D1WUP D1FT2 D1FT1 D1FT0
D2R26 D2R25 D2R24 D2R23 D2R22 D2R21 D2R20
D2R19 D2R18 D2R17 D2R16 D2R15 D2R14 D2R13 D2R12 D2R11 D2R10 D2R9
D2R8 D2R7 D2R6 D2R5 D2R4 D2R3 D2R2 D2R1 D2R0
D2W26 D2W25 D2W24 D2W23 D2W22 D2W21 D2W20 D2W19 D2W18 D2W17 D2W16 D2W15 D2W14 D2W13 D2W12 D2W11 D2W10 D2W9 D2W8 D2W7 D2W6 D2W5 D2W4 D2W3 D2W2 D2W1 D2W0
D2C11 D2C10 D2C9 D2C8 D2C7 D2C6 D2C5 D2C4 D2C3 D2C2 D2C1` D2C0
D2RA D2WA2 D2WA1 D2WA0
D2EN D2GO
D2MOD
D2RUP D2WUP
D2FT2 D2FT1 D2FT0
DSTOP
DACS0 DACSB DACSA D1BK D0BK D2WT D2MV D1WT D1MV D0WT D0MV DOWT DOMV
SCU User's Manual
25FE0080(PPAF) PR EP T0 9 Z C E
V E8 EX LE P7 P6 P5 P4 P3 P2 P1 P0
25FE0084(PPD) PD31 PD30 PD29 PD28 PD27 PD26 PD25 PD24 PD23 PD22 PD21 PD20 PD19 PD18
PD17 PD16 PD15 PD14 PD13 PD12 PD11 PD10 PD9 PD8 PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0
25FE0088(PDA)
RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0
25FE008C(PDD) RD31 RD30 RD29 RD28 RD27 RD26 RD25 RD24 RD23 RD22 RD21 RD20 RD19 RD18 RD17 RD16
RD15 RD14 RD13 RD12 RD11 RD10 RD9 RD8 RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0
25FE0090(T0C)
T0C9 T0C8 T0C7 T0C6 T0C5 T0C4 T0C3 T0C2 T0C1 T0C0
25FE0094(T1S)
T198 T197 T196 T195 T194 T193 T192 T191 T190
25FE0098(T1MD)
T1MD TENB
25FE009C(—)
25FE00A0(IMS)
IMS15 IMS13 IMS12 IMS11 IMS10 IMS9 IMS8 IMS7 IMS6 IMS5 IMS4 IMS3 IMS2 IMS1 IMS0
25FE00A4(IST) IST31 IST30 IST29 IST28 IST27 IST26 IST25 IST24 IST23 IST22 IST21 IST20 IST19 IST18 IST17 IST16
IST13 IST12 IST11 IST10 IST9 IST8 IST7 IST6 IST5 IST4 IST3 IST2 IST1 IST0
25FE00A8(—)
AIACK
25FE00AC(—)
25FE00B0(ASR0) A0PRO A0WPC A0RPC A0EWT A0BW3 A0BW2 A0BW1 A0BW0
A0NW3 A0NW2 A0NW1 A0NW0 A0LN1 A0LN0 A0SZ A1PRO A1WPC A1RPC A1EW1 A1BW3 A1BW2 A1BW1 A1BW0 A1NW3 A1NW2 A1NW1 A1NW0 A1LN1 A1LN0 A1SZ
25FE00B4(ASR1) A2PRO A2WPC A2RPC A2EWT
A2LN1 A2LN0 A2SZ A3PRO A3WPC A3RPC A3EW1 A3BW3 A3BW2 A3BW1 A3BW0 A3NW3 A3NW2 A3NW1 A3NW0 A3LN1 A3LN0 A3SZ
25FE00B8(AREF)
ARFEN ARWT3 ARWT2 ARWT1 ARWT0
25FE00BC(AIAK)
25FE00C0(—)
25FE00C4(RSEL)
RSEL
25FE00C8(VER)
VER3 VER2 VER1 VER0
25FE00CC(—)
161
Acronym Address Bit Description
AIACK 25FE00A8H 0 A-Bus interrupt acknowledge output valid bit
(=0: invalid / =1: valid)
ARFEN 25FE00B8H 4 A-Bus refresh output valid bit (=0: invalid/=1: valid)
ARWT3-0 25FE00B8H 3-0 A-Bus refresh wait number
A0BW3-0 25FE00B0H 27 - 24 CS0 space, burst cycle wait number set bit
A0EWT 25FE00B0H 28 CS0 space, external wait effective bit (=0: invalid/=1: valid)
A0LN1-0 25FE00B0H 19 - 18 CS0 space, burst length set bit
A0PRD 25FE00B0H 31 CS0 space, previous read effective bit (=0: invalid/=1: valid)
A0RPC 25FE00B0H 29 CS0 space, pre-charge insert bit after read
A0NW3-0 25FE00B0H 23 - 20 CS0 space, normal cycle wait number set bit
A0SZ 25FE00B0H 16 CS0 space, bus size set bit
A0WPC 25FE00B0H 30 CS0 space, pre-charge insert bit after write
A1BW3-0 25FE00B0H 11 - 8 CS1 space, burst cycle wait number set bit
A1EWT 25FE00B0H 12 CS1 space, external wait effctive bit (=0: invalid/=1: valid)
A1LN1-0 25FE00B0H 3-2 CS1 space, burst length set bit
A1NW3-0 25FE00B0H 7-4 CS1 space, normal cycle wait number set bit
A1PRD 25FE00B0H 15 CS1 space, previous read effective bit (=0: invalid/=1: valid)
A1RPC 25FE00B0H 13 CS1 space, pre-charge insert bit after read
A1SZ 25FE00B0H 0 CS1 space, bus size set bit
A1WPC 25FE00B0H 14 CS1 space, pre-charge insert bit after write
A2EWT 25FE00B4H 28 CS2 space, external wait effctive bit (=0: invalid/=1: valid)
A2LN1-0 25FE00B4H 19 - 18 CS2 space, burst length set bit
A2PRD 25FE00B4H 31 CS2 space, previous read effective bit (=0: invalid/=1: valid)
A2RPC 25FE00B4H 29 CS2 space, pre-charge insert bit after read
A2SZ 25FE00B4H 16 CS2 space, bus size set bit
A2WPC 25FE00B4H 30 CS2 space, pre-charge insert bit after write
A3BW3-0 25FE00B4H 11 - 8 Dummy space, burst cycle wait number set bit
A3EWT 25FE00B4H 12 Dummy space, external wait effctive bit (=0: invalid/=1: valid)
A3LN1-0 25FE00B4H 3-2 Dummy space, burst length set bit
A3NW3-0 25FE00B4H 7-4 Dummy space, normal cycle wait number set bit
A3PRD 25FE00B4H 15 Dummy space, previous read effective bit (=0: invalid/=1: valid)
A3RPC 25FE00B4H 13 Dummy space, pre-charge insert bit after read
A3SZ 25FE00B4H 0 Dummy space, bus size set bit
A3WPC 25FE00B4H 14 Dummy space, pre-charge insert bit after write
C 25FE0080H 20 DSP program control port, Carry flag
DACSA 25FE007CH 20 DMA A-Bus Access Flag (=0: no access/=1: access)
DACSB 25FE007CH 21 DMA B-Bus Access Flag (=0: no access/=1: access)
DACSD 25FE007CH 22 DMA DSP-Bus Access Flag (=0: no access/=1: access)
DDMV 25FE007CH 0 DSP side DMA operate flag (=0: stop/=1: operate)
DDWT 25FE007CH 1 DSP side DMA standby flag (=0: stop/=1: standby)
DSTOP 25FE0060H 0 DMA force-stop bit (=0: DMA operable/=1: DMA force stop)
D0BK 25FE007CH 16 DMA level 0 interrupt flag (=0: stop/=1: interrupt)
D0C19-0 25FE0008H 19 - 0 DMA level 0 transfer byte number
D0EN 25FE0010H 8 DMA level 0 enable bit (=0: Disable/=1: Enable)
162
Acronym Address Bit Description
D0FT2-0 25FE0014H 2-0 DMA level 0 starting factor selection bit
=000B: V-Blank-IN receive and enable bit set
=001B: V-Blank-OUT receive and enable bit set
=010B: H-Blank-IN receive and enable bit set
=011B: Timer 0 receive and enable bit set
=100B: Timer 1 receive and enable bit set
=101B: Sound Req receive and enable bit set
=110B: Sprite draw end and enable bit set
=111B: DMA start bit set and enable bit set
D0GO 25FE0010H 0 DMA level 0 start bit (=0: stop =1: start)
D0MOD 25FE0014H 24 DMA level 0 mode bit (=0: direct mode/=1: indirect mode)
D0MV 25FE007CH 4 DMA level 0 operating flag (=0: stop/=1: start)
D0RA 25FE000CH 8 DMA level 0 read address add value
(=0: no add/=1: adds 4 byte)
D0RUP 25FE0014H 16 DMA level 0 read address update bit
D0R26-0 25FE0000H 26 - 0 DMA level 0 read address
D0WA2-0 25FE000CH 2-0 DMA level 0 write address add value
=000B: no addition
=001B: adds 2 bytes
=010B: adds 4 bytes
=011B: adds 8 bytes
=100B: adds 16 bytes
=101B: adds 32 bytes
=110B: adds 64 bytes
=111B: adds 128 bytes
D0WT 25FE007CH 5 DMA level 0 standby flag (=0: stop/=1: standby)
D0WUP 25FE0014H 8 DMA level 0 write address update bit
D0W26-0 25FE0004H 26 - 0 DMA level 0 write address
D1BK 25FE007CH 17 DMA level 1 interrupt flag (=0: stop/=1: interrupt)
D1C11-0 25FE0028H 11 - 0 DMA level 1 transfer byte number
D1EN 25FE0030H 8 DMA level 1 enable bit (=0: Disable/=1: Enable)
D1FT2-0 25FE0034H 2-0 DMA level 1 starting factor selection bit
=000B: V-Blank-IN receive and enable bit set
=001B: V-Blank-OUT receive and enable bit set
=010B: H-Blank-IN receive and enable bit set
=011B: Timer 0 receive and enable bit set
=100B: Timer 1 receive and enable bit set
=101B: Sound Req receive and enable bit set
=110B: Sprite draw end and enable bit set
=111B: DMA start bit set and enable bit set
D1GO 25FE0030H 0 DMA level 1 start bit (=0: stop/=1: start)
D1MOD 25FE0034H 24 DMA level 1 mode bit (=0: direct mode/=1: indirect mode)
D1MV 25FE007CH 8 DMA level 1 operating flag (=0: stop/=1: start)
D1RA 25FE002CH 8 DMA level 1 read address add value
(=0: no add/=1: adds 4 bytes)
D1RUP 25FE0034H 16 DMA level 1 read address update bit
D1R26-0 25FE0020H 26 - 0 DMA level 1 read address
SCU User's Manual 163
Acronym Address Bit Description
D1WA2-0 25FE002CH 2-0 DMA level 1 write address add value
=000B:does not add
=001B: adds 2 bytes
=010B: adds 4 bytes
=011B: adds 8 bytes
=100B: adds 16 bytes
=101B: adds 32 bytes
=110B: adds 64 bytes
=111B: adds 128 bytes
D1WT 25FE007CH 9 DMA level 1 standby flag (=0: stop/=1: standby)
D1WUP 25FE0034H 8 DMA level 1 write address update bit
D1W26-0 25FE0024H 26 - 0 DMA level 1 write address
D2C11-0 25FE0048H 11 - 0 DMA level 2 transfer byte number
D2EN 25FE0050H 8 DMA level 2 enable bit (=0: Disable/=1: Enable)
D2FT2-0 25FE0054H 2-0 DMA level 2 starting factor selection bits
=000B: V-Blank-IN receive and enable bit set
=001B: V-Blank-OUT receive and enable bit set
=010B: H-Blank-IN receive and enable bit set
=011B: Timer 0 recieve and enable bit set
=100B: Timer 1 recieve and enable bit set
=101B: Sound Req receive and enable bit set
=110B: Sprite draw end and enable bit set
=111B: DMA start bit set and enable bit set
D2G0 25FE0050H 0 DMA level 2 start bit (=0: stop/=1: operation)
D2MOD 25FE0054H 24 DMA level 2 mode bit (=0: direct mode/=1: indirect mode)
D2MV 25FE007CH 12 DMA level 2 operation flag (=0: stop/=1: operation)
D2RA 25FE004CH 8 DMA level 2 read address add value
(=0: no add/=1: adds 4 bytes)
D2RUP 25FE0054H 16 DMA level 2 read address update bit
D2R26-0 25FE0040H 26 - 0 DMA level 2 read address
D2WA2-0 25FE004CH 2-0 DMA level 2 write address add value
=000B: no addition
=001B: adds 2 bytes
=010B: adds 4 bytes
=011B: adds 8 bytes
=100B: adds 16 bytes
=101B: adds 32 bytes
=110B: adds 64 bytes
=111B: adds 128 bytes
D2WT 25FE007CH 13 DMA level 2 standby flag (=0: stop/=1: standby)
D2WUP 25FE0054H 8 DMA level 2 write address update bit
D2W26-0 25FE0044H 26 - 0 DMA level 2 write address
E 25FE0080H 18 DSP Program control port, Program end interrupt flag
EP 25FE0080H 25 DSP Program control port, Temporary stop execution flag during
program execution
(=0: don't execute / =1: execute)
164
Acronym Address Bit Description
ES 25FE0080H 17 DSP Program Control Port, Program Step Execution Control Bit
(=0: don't execute / =1: execute)
EX 25FE0080H 16 DSP Program Control Port, Program Execution Control Bit
(=0: don't execute / =1: execute)
IMS0 25FE00A0H 0 V-Blank-IN Interrupt Mask Bit
IMS1 25FE00A0H 1 V-Blank-OUT Interrupt Mask Bit
IMS2 25FE00A0H 2 H-Blank-IN Interrupt Mask Bit
IMS3 25FE00A0H 3 Timer 0 Interrupt Mask Bit
IMS4 25FE00A0H 4 Timer 1 Interrupt Mask Bit
IMS5 25FE00A0H 5 DSP End Interrupt Mask Bit
IMS6 25FE00A0H 6 Sound Request Interrupt Mask Bit
IMS7 25FE00A0H 7 SMPC Interrupt Mask Bit
IMS8 25FE00A0H 8 PAD Interrupt Mask Bit
IMS9 25FE00A0H 9 Level 2-DMA End Interrupt Mask Bit
IMS10 25FE00A0H 10 Level 1-DMA End Interrupt Mask Bit
IMS11 25FE00A0H 11 Level 0-DMA End Interrupt Mask Bit
IMS12 25FE00A0H 12 DMA Illegal Interrupt Mask Bit
IMS13 25FE00A0H 13 Sprite Draw End Interrupt Mask Bit
IMS15 25FE00A0H 15 A-Bus Interrupt Mask Bit
IST0 25FE00A4H 0 V-Blank-IN Interrupt Status Bit
IST1 25FE00A4H 1 V-Blank-OUT Interrupt Status Bit
IST2 25FE00A4H 2 H-Blank-IN Interrupt Status Bit
IST3 25FE00A4H 3 Timer 0 Interrupt Status Bi
t
IST4 25FE00A4H 4 Timer 1 Interrupt Status Bit
IST5 25FE00A4H 5 DSP End Interrupt Status Bit
IST6 25FE00A4H 6 Sound request Interrupt Status Bit
IST7 25FE00A4H 7 SMPC Interrupt Status Bit
IST8 25FE00A4H 8 PAD Interrupt Status Bit
IST9 25FE00A4H 9 Level 2-DMA End Interrupt Status Bit
IST10 25FE00A4H 10 Level 1-DMA End Interrupt Status Bit
IST11 25FE00A4H 11 Level 0-DMA End Interrupt Status Bit
IST12 25FE00A4H 12 DMA Illegal Interrupt Status Bit
IST13 25FE00A4H 13 Sprite Draw End Interrupt Status Bit
IST31-16 25FE00A4H 31-16 Outside Interrupt 15-0 Status Bit
LE 25FE0080H 15 DSP Program Control Port, Program Counter Load Enable Bit (=0:
no execute/=1: execute)
PD31-0 25FE0084H 31 - 0 DSP Program RAM Data Port
PR 25FE0080H 26 DSP Program Control Port, Pause Cancel Flag while program is
executing (=0: no execute/=1: execute)
P7-0 25FE0080H 7-0 DSP Program RAM Address
RA7-0 25FE0088H 7-0 DSP Data RAM Address
RD31-0 25FE008CH 31 - 0 DSP Data RAM Data Port
RSEL 25FE00C4H 0 SDRAM Selection Bit (=0: 2 Mbit x 2 / =1: 4 Mbit x 2)
S 25FE0080H 22 DSP Program Control Port, Sine Flag
SCU User's Manual 165
TENB 25FE0098H 0 Timer Enable Bit (=0: OFF / =1: ON)
T0 25FE0080H 23 DSP Program Control Port, D0 Bus Use DMA Execute Flag
T0C9-0 25FE0090H 9-0 Timer 0 Compare Data
T1MD 25FE0098H 8 Timer 1 ModeBit
=0: occurs at each line
=1: occurs only at lines indicated by Timer 0
T1S8-0 25FE0094H 8-0 Timer 1 Set Data
V 25FE0080H 19 DSP Program Control Port, Overflow Flag
VER3-0 25FE00C8H 3-0 SCU Chip Version Number
Z 25FE0080H 21 DSP Program Control Port, Zero Flag
166
INDEX Numbers within ( ) shows the page of the “First” heading.
Numeric
1 command Repeat Execution...................................................................................... 89
Alphabetic
A-Bus ................................................................................................................................ ii
A-Bus Control Register ................................................................................................. 61
A-Bus Interrupt Acknowledge .................................................................................... 61
A-Bus Interrupt Acknowledge Register ..................................................................... 61
A-Bus Interrupt Acknowledge Map ........................................................................... 14
A-Bus Refresh Register ........................................................................................... 13, 71
A-Bus Refresh Register Map ........................................................................................ 13
A-Bus Refresh Wait Number ........................................................................................ 71
A-Bus Set Register (CS0, 1 spaces) .............................................................................. 62
A-Bus Set Register (CS2 and dummy spaces) ........................................................... 62
A-Bus Set Register Map ................................................................................................ 13
Access, Interrupt, Standby, Operation Registers ....................................................... 47
B-Bus ............................................................................................................................... (ii)
Blanking Interrupt ......................................................................................................... 29
Block Diagram .................................................................................................................. 3
Commands ...................................................................................................................... 91
Commands (1), List of ................................................................................................... 80
Commands (2), List of ................................................................................................... 81
Commands (3), List of ................................................................................................... 82
Commands (4), List of ................................................................................................... 83
Constants, Description of ............................................................................................. 90
CS0 Space Burst Cycle Set Value ................................................................................. 65
CS0 Space Burst Length Set Value ............................................................................... 65
CS0 Space Bus Size Set Value ....................................................................................... 66
CS0 Space Single Cycle Set Value ................................................................................ 65
CS0, 1 Space A-Bus Set Set Register ............................................................................ 62
CS1 Space Burst Cycle Set Value ................................................................................. 67
CS1 Space Burst Length Set Value ............................................................................... 68
CS1 Space Bus Size Set Value ....................................................................................... 68
CS1 Space Single Cycle Set Value ................................................................................ 67
CS2 Space Burst Cycle Value ........................................................................................ 68
CS2 Space Bus Size Set Value ....................................................................................... 70
SCU User's Manual 167
Data .................................................................................................................................... ii
Data Write Example (Indirect Mode) .......................................................................... 23
Difference in DMA operation by Address Renewal Bit ........................................... 22
Difference in Timing by Setting External Wait Effective Bit .................................... 64
Direct Mode DMA Transfer Operation ...................................................................... 18
DMA Enable Register .................................................................................................... 45
DMA Command Execution .......................................................................................... 87
DMA Command Format 1 ......................................................................................... 132
DMA Command Format 2 ......................................................................................... 132
DMA Control Register .................................................................................................. 41
DMA End Interrupt ....................................................................................................... 33
DMA Force-Stop Register ............................................................................................. 47
DMA Force-Stop Register Map...................................................................................... 8
DMA Illegal Interrupt ................................................................................................... 33
DMA Mode ..................................................................................................................... 18
DMA Mode, Address Renewal, Start Factor Select Register ................................... 46
DMA Status Register ............................................................................................... 47, 48
DMA Status Register Map .............................................................................................. 9
DMA Transfer (Basic Operation) ................................................................................. 16
DMA Transfer Execution by Address Add Value Set ............................................... 26
DMA Transferable Area when Started from DSP ..................................................... 17
DMA Transferable Area when Started from Main CPU .......................................... 17
DMA Write Address while Stopped ........................................................................... 46
DSP .................................................................................................................................. 34
DSP Control Port............................................................................................................ 51
DSP Data RAM Address Port ................................................................................ 10, 53
DSP Data RAM Address Port Map ............................................................................. 10
DSP Data RAM Data Port ............................................................................................. 54
DSP Data RAM Data Port Map ................................................................................... 10
DSP End Interrupt ......................................................................................................... 33
DSP Program Control Port ............................................................................................. 9
DSP Program Load Step 1 ............................................................................................ 34
DSP Program Load Step 2 ............................................................................................ 35
DSP Program Load Step 3 ............................................................................................ 35
DSP Program RAM Data Port ................................................................................ 10, 53
DSP Program RAM Data Port Map ............................................................................ 10
Dummy Space Burst Cycle Set Value ......................................................................... 71
Dummy Space Burst Length Set Value ....................................................................... 71
Dummy Space Bus Size Set Value ............................................................................... 72
Dummy Space Single Cycle Set Value ........................................................................ 71
168
Example of transfer between SCU and Processor ..................................................... 44
Features of Data Transfer to DSP from D0 Bus ................................................... 87, 88
High/Low Level DMA Operation .............................................................................. 48
Indirect Mode DMA Transfer ...................................................................................... 20
Indirect Mode DMA Transfer Flow ............................................................................. 19
Interrupt Control Register ............................................................................................ 57
Interrupt Factor .............................................................................................................. 27
Interrupt Factor, General Names ................................................................................. 28
Interrupt Mask Register ................................................................................................ 57
Interrupt Mask Register Map ....................................................................................... 12
Interrupt Status Register ............................................................................................... 58
Interrupt Status Register Contents .............................................................................. 59
Interrupt Status Register Map ..................................................................................... 12
Jump Command Execution .......................................................................................... 85
Jump Command Format ............................................................................................. 141
Level 0 Transfer Byte Number ..................................................................................... 42
Level 2-0 Address Add Value ....................................................................................... 42
Level 2-0 DMA Authorization Bit ............................................................................... 45
Level 2-0 DMA Mode, Address Renewal, Start Factor Select Register .................. 46
Level 2-0 DMA Set Register Map .................................................................................. 8
Level 2-0 Read Address ................................................................................................ 41
Level 2-0 Write Address ................................................................................................ 41
Level 2-1 Transfer Byte Number .................................................................................. 42
Load Immediate Command Format 1 (unconditional transfer) ........................... 120
Load Immediate Command Format 2 (conditional transfer) ................................ 120
Loop Bottom Command Format ............................................................................... 153
Loop Program Execution .............................................................................................. 86
Main CPU .......................................................................................................................... i
Operand Execution Method ......................................................................................... 85
Operation Command Format ...................................................................................... 91
Operation when Cache Hit ............................................................................................. 5
PAD Interrupt ................................................................................................................. 33
RAM Page Select ............................................................................................................ 53
Read Address Add Value .............................................................................................. 43
Registers, List of ............................................................................................................. 40
Results of Previous Read Process ................................................................................ 63
SCU User's Manual 169
SCSP .................................................................................................................................... i
SCU ..................................................................................................................................... i
SCU Control Register .................................................................................................... 73
SCU Mapping (Cache_address)..................................................................................... 4
SCU Mapping (Cache_through_address) .................................................................... 6
SCU Overview ................................................................................................................. 2
SCU SDRAM Select Register Map .............................................................................. 14
SCU SDRAM Select Bit ................................................................................................. 73
SCU Version Register Map ........................................................................................... 14
SCU Version Register .................................................................................................... 73
SMPC ................................................................................................................................. ii
SMPC Interrupt .............................................................................................................. 33
Sound Request Interrupt .............................................................................................. 33
Special Process Execution ............................................................................................. 89
Sprite Draw End Interrupt ........................................................................................... 33
Start Factor ...................................................................................................................... 46
Subroutine Program Execution .................................................................................... 90
System Configuration ..................................................................................................... 2
Timer 0 Compare Register ...................................................................................... 11, 55
Timer 0 Compare Register Map ................................................................................... 11
Timer 0 Interrupt Degree of Occurrence .................................................................... 30
Timer 1 Interrupt Degree of Occurrence .................................................................... 31
Timer 1 Mode Register ............................................................................................ 11, 56
Timer 1 Mode Register Map ......................................................................................... 11
Timer 1 Occurrence Select Content ............................................................................. 56
Timer 1 Set Data Register ....................................................................................... 11, 55
Timer 1 Set Data Register Map .................................................................................... 11
Timer Operation Contents ............................................................................................ 56
Timer Register ................................................................................................................ 55
Timing when setting pre-charge insert bit after Read .............................................. 63
Timing when setting pre-charge insert bit after Write ............................................. 63
Timing when Writing CS2 Burst Cycle ....................................................................... 65
VDP1 ................................................................................................................................... i
VDP2 ................................................................................................................................... i
Work RAM Area Contents ............................................................................................ 24
Write Address Add Value ............................................................................................. 43
Write Address Add Value Indication .......................................................................... 45
170
(This page is blank in the original Japanese document.)
SCU User's Manual 171
Commands
NOP (ALU Operation) .................................................................................................. 93
AND ................................................................................................................................. 94
OR .................................................................................................................................... 95
XOR .................................................................................................................................. 96
ADD ................................................................................................................................. 97
SUB .................................................................................................................................. 98
AD2 .................................................................................................................................. 99
SR ................................................................................................................................... 100
RR ................................................................................................................................... 101
SL .................................................................................................................................... 102
RL ................................................................................................................................... 103
RL8 ................................................................................................................................. 104
NOP (X-Bus Operation) .............................................................................................. 106
MOV [s] , X ................................................................................................................... 107
MOV MUL , p ............................................................................................................... 108
MOV [s] , P.................................................................................................................... 109
NOP (Y-Bus Control) ...................................................................................................111
MOV [s] , Y ................................................................................................................... 112
CLR A ........................................................................................................................... 113
MOV ALU , A ............................................................................................................... 114
MOV [s] , A ................................................................................................................... 115
NOP (D1-Bus No Operation) .................................................................................... 117
MOV SImm , [d] ........................................................................................................... 118
MOV [s] , [d] ................................................................................................................. 119
MVI Imm , [d] ............................................................................................................... 121
MVI [d] , Imm , Z ......................................................................................................... 122
MVI Imm , [d] , NZ ...................................................................................................... 123
MVI Imm , [d] , S ......................................................................................................... 124
MVI Imm , [d] , NS ...................................................................................................... 125
MVI Imm , [d] , C ......................................................................................................... 126
MVI Imm , [d] , NC ..................................................................................................... 127
MVI Imm , [d] , T0 ....................................................................................................... 128
MVI Imm , [d] , NT0 .................................................................................................... 129
MVI Imm , [d] , ZS ....................................................................................................... 130
MVI Imm , [d] , NZS ................................................................................................... 131
172
DMA D0 , [RAM] , SImm .......................................................................................... 133
DMA [RAM] , D0 , SImm .......................................................................................... 134
DMA , D0 , [RAM] , [s] .............................................................................................. 135
DMA [RAM] , D0 , [s] ................................................................................................ 136
DMAH , D0 , [RAM] , SImm ..................................................................................... 137
DMAH [RAM] , D0 , SImm ....................................................................................... 138
DMAH D0 , [RAM] , [s] ............................................................................................. 139
DMAH [RAM] , D0 , [s] ............................................................................................. 140
JMP Imm ...................................................................................................................... 142
JMP Z , Imm................................................................................................................. 143
JMP NZ , Imm ............................................................................................................. 144
JMP S , Imm ................................................................................................................. 145
JMP NS , Imm .............................................................................................................. 146
JMP C , Imm ................................................................................................................ 147
JMP NC , mm .............................................................................................................. 148
JMP T0 , Imm ............................................................................................................... 149
JMP NT0 , Imm ........................................................................................................... 150
JMP ZS , Imm .............................................................................................................. 151
JMP NZS , Imm ........................................................................................................... 152
BTM ............................................................................................................................... 154
LPS ................................................................................................................................. 155
END ............................................................................................................................... 157
ENDI ........................................................................................................................ 33, 158
SCU User's Manual 173
TM
VDP1
User's Manual
Doc. # ST-013-R3-061694
© 1994-95 SEGA. All Rights Reserved.
REFERENCES
In translating/creating this document, certain technical words and/or phrases were interpreted
with the assistance of the technical literature listed below.
1. Dictionary of Science and Engineering, 350,000 words, 3rd Edition
Inter Press
Tokyo, Japan
1990
2. Computer Dictionary
Kyoritsu Publishing Co., LTD.
Tokyo, Japan
1978
3. IBM Dictionary of Computing
McGraw-Hill, Inc.
New York, New York
1994
Revision History
Revision 7.1 December 6, 1993
• Minor corrections
• Total 155 pages
First Edition February 20, 1994
• Added even/odd coordinate selection bit (EOS) to frame
buffer change mode register (FBCR)
• Added high speed shrink (HSS) and pre-clipping disable
(Pclp) to plot mode word (+04H) in the command table.
• Total 163 pages
Introduction
This manual explains the functions of the VDP1 and how they are used. The VDP1 primarily
defines draw data and performs drawing.
Definitions
The terms used in this manual are defined as follows:
VDP1
VDP1 is an integrated circuit (IC) that controls drawing. The VRAM and frame buffer (both
DRAM) are connected to the VDP1. The CPU writes draw commands to VRAM via the VDP1.
The VDP1 reads draw commands from VRAM and writes (draws) draw data to the frame
buffer, and later transfers this data to a display monitor.
The frame buffer is a bit-mapped memory, and any data written to it has a 1-to-1 correspon-
dence with the contents of the display screen. Therefore, the frame buffer is a map of the dis-
play screen. There are system registers in the VDP1 and screen display is controlled by setting
values in these registers.
Display
Televisions are commonly used as display devices. The standard used in Japan and in the
United States is NTSC. PAL system TVs are used in Europe.
Hi-res is a high resolution mode that doubles the horizontal resolution. 31KC is a system that
doubles the horizontal frequency of 15KC in order to raise the vertical resolution. Hi-vision
(HDTV), or so-called “high-definition” TV, has twice the horizontal and vertical resolution of
regular TV.
A TV display is comprised of fields and frames. A field is the time it takes a scanning line to
scan one screen. In the NTSC system, this is 1/60th of a second and in the PAL system, 1/50th
of a second. A frame is the time it takes from one change of the frame buffer to the next
change. When the change mode of the frame buffer is in a one cycle mode, one frame is equal
to one field. When the frame buffer is changed every two fields such as in single density inter-
lace, one frame comprises two fields. When the frame buffer is changed only once a second in
the manual mode, one frame comprises 60 fields in the NTSC system, and 50 fields in the PAL
system.
(1)
Before each frame is drawn, the frame buffer is automatically erased. Erase is performed by
writing (filling) a code specified in a register to the frame buffer. This operation is referred to
as erase/write.
Access
Reading and writing of data by the CPU and VDP1 in VRAM, the system registers, and frame
buffers are referred to as access. When two or more devices attempt access at the same time,
the accesses are arbitrated, with writes normally given priority over reads.
When a DMA controller is used, access of VRAM can be performed continuously and rapidly
by burst transfer. However, do not perform burst access of registers.
Data
A bit is the smallest unit of data which is represented by “0” or “1.” A combination of 8 bits is
called a byte, and 16 bits (or 2 bytes) is called a word. When a byte is divided into its upper 4
bits and its lower 4 bits, each is referred to as a nibble.
Commands
Commands include draw commands, clipping coordinate set commands, and local coordinate
set commands. Clipping is the removal of graphics outside a set area. Local coordinates change
the drawing position using the coordinates specified by the draw command as local coordi-
nates.
Commands are defined in VRAM as command tables. In addition to the command table, there
are the character pattern table, the Gouraud shading table, and the color lookup table.
Tables are defined by addresses with an 8H-byte boundary or a 20H-byte boundary, and are
stored in VRAM. A boundary is the splitting of addresses at the 8H or 20H boundary so there
is no remainder. Registers have 2H-byte (one = word) boundaries.
The VDP1 fetches command tables successively and draws according to these commands.
Fetch is the act of reading from VRAM in order to process commands.
(2)
Parts
Objects drawn by using the draw command are called parts. Parts are divided into textured
and non-textured parts. Textured parts are called sprites; non-textured parts include polygons,
polylines, and lines.
Sprites are characters and the color codes of these characters are defined in VRAM as a charac-
ter pattern table. Polygons are filled squares, polylines are non-filled squares, and lines are
straight lines that connect two points.
The VDP1 processes draw commands in VRAM and draws parts in the frame buffer 1 pixel at
a time. The color resolution of the data in the frame buffer is in 8 or 16 bits per pixel (bpp).
Color
The RGB code method and the color bank method, which uses palette codes and color banks
are used to express color. The RGB code method specifies the luminance of each of the colors:
red (R), green (G), and blue (B), in 5 bits. In the color bank method, the VDP2 color palette is
selected from a color bank, and a palette code is used to select the desired color from this
palette.
Sprite colors can be specified using the color lookup table method. The color is selected from
among the 16 colors defined in the color lookup table. The color code can be specified using
RGB or color bank codes.
Color Calculation
Color calculation is a special function of the VDP1. Gouraud shading is an example of color
calculation. The luminance of the RGB code of a particular part can be changed using the RGB
codes of four points defined in the Gouraud shading table.
(3)
Notations Used in this Manual
The notations used in this manual are as follows:
Binary and Hexadecimal Numbers
Binary numbers are designated with a “B” at the end of the number— for example, 100B.
Hexadecimal numbers are designated with an “H” at the end of the number— for example,
00H, FFH.
Units
1 Kbyte is equal to 1024 bytes. 1 Mbit is 1,048,576 bits.
MSB, LSB
In the configuration of bytes and words, the left is the most significant bit (MSB) and the right
is the least significant bit (LSB).
Undefined Bits
Bits that are not defined in the command table or the system registers are indicated by a hy-
phen “-”. Write 0B to undefined bits in the system registers. Write “0” or “1” to undefined bits
in command tables. If an entire word is unused, fill with either "0" or "1". When a word is
partially used, fill the remaining unused bits with "0".
Addresses
The addresses shown in this manual are relative VDP1 addresses . VDP1 is at the absolute
address 5C00000H of the system.
Add 5C00000H to a relative address to determine the absolute address. For example, the abso-
lute address 000000H in VRAM is address 5C00000H, and the absolute address 180000H in the
system registers becomes 5D80000H.
(4)
Table of Contents
Introduction
Definitions .................................................................................................................................. (1)
Notations Used in this Manual .................................................................................................. (4)
Contents ...................................................................................................................... (5)
List of Figures ............................................................................................................................ (8)
List of Tables............................................................................................................................ (10)
Chapter 1 Functions of the VDP1 ............................................................................. 1
1.1 VDP1 .............................................................................................................. 2
System Configuration ............................................................................ 2
Functions of the VDP1 .......................................................................... 3
Parts ..................................................................................................... 4
Textured Parts ....................................................................................... 5
Non-Textured Parts ............................................................................. 10
Color ................................................................................................... 12
1.2 Screen Modes.................................................................................................. 14
Screen Modes and Display Areas ....................................................... 14
Rotated Reading of Frame Buffer ....................................................... 15
Chapter 2 Address Map ............................................................................................................ 17
2.1 Address Map .................................................................................................... 18
VRAM ................................................................................................. 19
Frame Buffer ....................................................................................... 20
System Registers ................................................................................ 23
2.2 Tables in VRAM ............................................................................................... 24
Command Table .................................................................................. 25
Color Lookup Table ............................................................................. 26
Gouraud Shading Table ...................................................................... 26
Character Pattern Table ...................................................................... 26
Chapter 3 Processing Flow .................................................................................... 27
3.1 Draw Procedure Flow ...................................................................................... 28
3.2 Command Table Flow ...................................................................................... 30
3.3 Table Referencing ............................................................................................ 31
(5)
Chapter 4 System Registers ................................................................................... 33
4.1 TV Mode Selection Register ............................................................................ 36
4.2 Frame Buffer Change Mode Register .............................................................. 38
4.3 Plot Trigger Register ........................................................................................ 45
4.4 Erase/Write ...................................................................................................... 46
Erase/Write Data Register .................................................................. 46
Erase/Write Upper-Left Coordinate Register ...................................... 47
Erase/Write Upper-Right Coordinate Register ................................... 47
4.5 Draw Forced Termination Register .................................................................. 51
4.6 Transfer End Status Register ........................................................................... 52
4.7 Last Operation Command Address Register ................................................... 54
4.8 Current Operation Command Address Register ............................................. 55
4.9 Mode Status Register ...................................................................................... 57
Chapter 5 Tables ......................................................................................................................... 59
5.1 Character Pattern Tables ................................................................................. 60
5.2 Color Lookup Tables ........................................................................................ 62
5.3 Gouraud Shading Table ................................................................................... 64
5.4 Command Tables ............................................................................................. 66
Chapter 6 Command Tables ................................................................................... 69
6.1 CMDCTRL (Control Words) ............................................................................. 70
Commands ......................................................................................... 71
Jump Mode ......................................................................................... 72
Zoom Point ......................................................................................... 73
Character Read Direction ................................................................... 77
6.2 CMDLINK (Link Specification) ......................................................................... 78
6.3 CMDPMOD (Draw Mode Word) ....................................................................... 79
High Speed Shrink .............................................................................. 81
Pre-Clipping Disable ........................................................................... 83
User Clipping Enable .......................................................................... 84
User Clipping Mode ............................................................................ 84
Mesh Enable ....................................................................................... 85
End Code Disable ............................................................................... 86
Trasparent Pixel Disable ..................................................................... 88
Color Mode ......................................................................................... 89
Color Calculation................................................................................. 93
MSB ON .............................................................................................. 97
(6)
6.4 CMDCOLR (Color Control Word) ..................................................................... 98
Color Bank .......................................................................................... 99
Color Lookup Table ........................................................................... 101
Non-Textured Color ........................................................................... 102
6.5 CMDSRCA (Character Address) .................................................................... 103
6.6 CMDSIZE (Character Size)............................................................................ 104
6.7 CMDXA~CMDYD (Vertex Coordinate Data) ................................................. 105
6.8 CMDGRDA (Gouraud Shading Table) ........................................................... 106
Chapter 7 Commands ........................................................................................... 107
7.1 System Clipping Coordinate Set Command .................................................. 110
System Clipping ................................................................................ 111
7.2 User Clipping Coordinate Set Command ....................................................... 112
User Clipping .................................................................................... 113
7.3 Local Coordinate Set Command .................................................................... 116
Local Coordinates ............................................................................. 117
7.4 Normal Sprite Draw Command ...................................................................... 118
7.5 Scaled Sprite Draw Command....................................................................... 120
Specification of Two Coordinate Vertices ......................................... 120
Specification of Fixed Point (Scaled Sprite Draw Command) .......... 122
7.6 Distorted Sprite Draw Command ................................................................... 124
7.7 Polygon Draw Command ............................................................................... 126
7.8 Polyline Draw Command ............................................................................... 128
7.9 Line Draw Command ..................................................................................... 130
7.10 Draw End Command ..................................................................................... 132
Chapter 8 Quick Reference ................................................................................... 133
8.1 System Registers ........................................................................................... 134
8.2 Tables ............................................................................................................ 140
8.3 Command Tables ........................................................................................... 142
8.4 Commands .................................................................................................... 151
Chapter 9 Precautions for Use .............................................................................. 157
Index ................................................................................................................................................ 161
(7)
List of Figures
(Chapter 1 Functions of the VDP1)
Figure 1.1 System Configuration ................................................................................................ 2
Figure 1.2 Normal Sprites ........................................................................................................... 5
Figure 1.3 Scaled Sprites (Two Vertices Specified) .................................................................... 6
Figure 1.4 Scaled Sprites (Zoom Point Specified) ...................................................................... 7
Figure 1.5 Distorted Sprites ........................................................................................................ 8
Figure 1.6 Fill-In Processing ....................................................................................................... 9
Figure 1.7 Polygons.................................................................................................................. 10
Figure 1.8 Polylines .................................................................................................................. 11
Figure 1.9 Line ......................................................................................................................... 11
Figure 1.10 Bit Configuration of Color Bank Method ................................................................ 12
(Chapter 2 Address Map)
Figure 2.1 Address Map ........................................................................................................... 18
Figure 2.2 Frame Buffer Plane ................................................................................................. 21
(Chapter 3 Processing Flow)
Figure 3.1 Command Table Flow .............................................................................................. 30
Figure 3.2 Referencing of Tables .............................................................................................. 31
(Chapter 4 System Registers)
Figure 4.1 Single Interlace and Double Interlace Display ......................................................... 43
Figure 4.2 Erase/Write Area ..................................................................................................... 48
Figure 4.3 Last Operation Command and Current Operation Command Address .................. 54
(Chapter 5 Tables)
Figure 5.1 Examples of Character Pattern Tables ....................................................................61
Figure 5.2 Color Lookup Table .................................................................................................. 62
Figure 5.3 Relationship between Tables in Lookup Table System ........................................... 63
Figure 5.4 RGB Code Format ................................................................................................... 64
Figure 5.5 Command Table ...................................................................................................... 66
(8)
(Chapter 6 Command Tables)
Figure 6.1 Zoom Point .............................................................................................................. 73
Figure 6.2 Drawing Area ........................................................................................................... 75
Figure 6.3 Zoom Point and Drawing Area................................................................................. 76
Figure 6.4 Character Read Direction ........................................................................................ 77
Figure 6.5 High Speed Shrink .................................................................................................. 82
Figure 6.6 Pre-Clipping ............................................................................................................ 83
Figure 6.7 Drawing Area ........................................................................................................... 84
Figure 6.8 Mesh Processing ..................................................................................................... 85
Figure 6.9 Mesh Processing of Lines and Polylines ................................................................. 85
Figure 6.10 (a) End Code Processing (1 of 2) .......................................................................... 87
Figure 6.10 (b) End Code Processing (2 of 2) .......................................................................... 87
Figure 6.11 Example of Drawing in Modes 0 and 1 .................................................................. 90
Figure 6.12 Example of Drawing in Modes 2, 3, and 4 ............................................................. 91
Figure 6.13 RGB Code Format ................................................................................................. 92
Figure 6.14 Example of Drawing in Mode 5 .............................................................................. 92
Figure 6.15 Examples of Color Calculation .............................................................................. 96
Figure 6.16 MSB ON ............................................................................................................ 97
Figure 6.17 Color Bank ............................................................................................................ 99
Figure 6.18 Color Lookup Table.............................................................................................. 101
Figure 6.19 CMDSIZE .......................................................................................................... 104
(Chapter 7 Commands)
Figure 7.1 System Clipping .................................................................................................... 111
Figure 7.2 User Clipping Settings ........................................................................................... 114
Figure 7.3 User Clipping ......................................................................................................... 115
(Chapter 8 Quick Reference)
Figure 8.1 Examples of Character Pattern Tables .................................................................. 140
Figure 8.2 Color Lookup Table................................................................................................ 140
Figure 8.3 Command Table .................................................................................................... 142
(9)
List of Tables
(Chapter 1 Functions of the VDP1)
Table 1.1 Classification of Parts ................................................................................................. 4
Table 1.2 Screen Modes and Display Areas ............................................................................. 14
(Chapter 2 Address Map)
Table 2.1 System Registers ...................................................................................................... 23
Table 2.2 Tables in VRAM ........................................................................................................ 24
(Chapter 4 System Registers)
Table 4.1 System Registers ...................................................................................................... 34
Table 4.2 Screen Modes ........................................................................................................... 37
Table 4.3 (a) Example of Use of Frame Buffer Change Mode (Fixed at VBE = 0) ................... 41
Table 4.3 (b) Example of Use of Frame Buffer Change Mode (VBE Is Used) ......................... 42
Table 4.4 Number of Rasters and Number of Pixels ................................................................. 49
Table 4.5 Number of Pixels that Can Be Used in V-Blank Erase (in Non-Interlace Display) .... 50
(Chapter 5 Tables)
Table 5.1 Size of Character Pattern Tables .............................................................................. 60
Table 5.2 Gouraud Shading Table ............................................................................................ 64
Table 5.3 Relationship between Gouraud Shading Table Settings and Correction Values .. ... 65
(Chapter 6 Command Tables)
Table 6.1 Commands ............................................................................................................ 71
Table 6.2 Pixel Data ............................................................................................................ 92
Table 6.3 CMDCOLR ............................................................................................................ 98
Table 6.4 Example of Relationship of Defined Data and Draw Data to Color Bank ............... 100
Table 6.5 Relationships between Settings and Drawn Pixels ................................................ 104
Table 6.6 Correspondence between Commands and CMDXA~CMDYD ............................... 105
(Chapter 7 Commands)
Table 7.1 Commands .......................................................................................................... 109
(Chapter 8 Quick Reference)
Table 8.1 Screen Modes ......................................................................................................... 134
Table 8.2 Gouraud Shading Table .......................................................................................... 141
Table 8.3 Commands .............................................................................................................. 145
Table 8.4 CMDCOLR .............................................................................................................. 149
Table 8.5 Relationships between Settings and Drawn Pixels ................................................ 149
Table 8.6 Correspondence between Commands and CMDXA~CMDYD ............................... 150
(10)
Chapter 1
Functions of the VDP1
Contents
1.1 VDP1 .............................................................................................. 2
System Configuration ........................................................... 2
Functions of the VDP1 ......................................................... 3
Parts ..................................................................................... 4
Textured Parts ....................................................................... 5
Non-textured Parts .............................................................. 10
Color ................................................................................... 12
1.2 Screen Modes.................................................................................. 14
Screen Modes and Display Areas ...................................... 14
Rotated Reading of Frame Buffer ...................................... 15
VDP1 User's Manual 1
1.1 VDP1
The VDP1 is a sprite drawing IC for the SEGA SATURN because the VDP1 uses a
frame buffer, it is much faster, is characterized by an increased RAM capacity, and
can display many more sprites (characters) compared to previous systems.
System Configuration
A VRAM (4-Mbit DRAM) and a two-plane frame buffer (2-Mbit DRAM per screen)
are connected to the VDP1. The image data defined in VRAM by the CPU are output
to the display device via the frame buffer.
Draw data is sent from the CPU to the VDP1 via the system control IC and is written
in VRAM. Parts written in VRAM are drawn in the frame buffer in a 16- or 8-bit/
pixel form. The frame buffer data that is drawn is displayed on the display device
via the priority circuit in the VDP2. The priority circuit prioritizes the scroll plane
and the priority plane. The frame buffer has two screens, and draw and display are
changed every frame.
The information that controls draws is set in the VDP1 system registers by the CPU
via the system controller IC. The system registers control draws.
VRAM
(4 Mbit)
VDP1
System Display
CPU Controller System VDP2 Device
IC Registers
Frame Frame
Buffer Buffer
(2 Mbit) (2 Mbit)
Figure 1.1 System Configuration
2
Functions of the VDP1
The functions of the VDP1 include the drawing of parts (characters and lines), speci-
fication of colors, color calculation of Gouraud shading, specification of clipping
coordinates and local coordinates, and control of display by the frame buffer. Parts,
color, and coordinates are controlled by the command table in VRAM, and display of
the frame buffer is controlled by the system registers.
Parts
The following graphics can be drawn as parts.
· Normal sprites
· Scaled sprites (with zooming)
· Distorted sprites (includes rotation)
· Polygons (quadrangles)
· Polylines (quadrangles comprising four lines)
· Lines
Collectively, sprites are referred to as textured parts, and polygons, polylines, and
lines are referred to as non-textured parts.
Color
· The possible numbers of colors for each textured part are 16, 64, 128, 256,
and 32,768.
Special Functions
· When RGB codes are used, color calculation of half-luminance, half-trans-
parency, Gouraud shading, and shadowing are possible.
· Mesh (tiling).
Coordinate Control
· System and user clipping settings are possible.
· Local coordinates can be set during drawing.
Frame Buffer Display Control
· Enlargement, reduction, and rotation of the entire frame buffer screen.
· Specification of the TV display mode.
· Specification of the frame buffer change mode, the change trigger, and the
plot trigger.
· Specification of double interlace.
· Specification of fill area and fill data during erase/write.
· End status of transfer to the frame buffer as help information during pro-
gram development.
VDP1 User's Manual 3
Parts
Parts are classified as shown in Table 1.1.
Table 1.1 Classification of Parts
Classification Part name Function How defined
Normal Character, vertical, and 1 vertex and direction of
sprites horizontal inversion readout
Textured parts Scaled Character, vertical, and 2 vertices and direction of
sprites horizontal inversion, readout or zoom point, width
enlargement and reduction, and direction of readout
stretching
Parts Distorted Character, vertical, and 4 vertices and direction of
sprites horizontal inversion, readout
enlargement and reduction,
stretching, rotation, twisting
Non- Polygons Filled quadrangles 4 vertices
textured
parts Polylines Quadrangles 4 vertices
Lines Straight lines Starting vertex and ending
vertex
4
Textured Parts
Textured parts are called sprites. Sprites draw character patterns. Character patterns
define pixel data as character pattern tables in VRAM. The size of the pixel data is
determined by the color mode and the size of the characters.
Sprites include normal sprites, scaled sprites, and distorted sprites. Normal sprites
can be inverted vertically and horizontally; scaled sprites can be inverted vertically
and horizontally, enlarged and reduced, and stretched; and distorted sprites can be
inverted vertically and horizontally, enlarged and reduced, stretched, rotated, and
twisted.
Normal Sprites
The character pattern is drawn at a specified position. The coordinates of the upper-
left vertex at which the character pattern is drawn are specified. The character pat-
tern is drawn from the specified coordinates to the right in the X direction and down
in the Y direction. When vertical and horizontal inversion are specified for the read-
out direction of the character pattern, the right side of the defined character pattern
is drawn from the left and the bottom side is drawn from the top.
Normal sprites cannot be rotated 90°. Specify the distorted sprite draw command to
perform 90° rotation.
Vertex (A) Vertex (A)
A B A B B A
Original Draw Normal Horizontal
graphic inversion
Vertex (A)
A B Vertex (A)
A B
Vertical Vertical &
inversion horizontal
inversion
... .
Figure 1.2 Normal Sprites
VDP1 User's Manual 5
Scaled Sprites
The character pattern is drawn enlarged or reduced at a specified position. There are
two methods by which the position and scaling can be specified. The coordinates of
the upper-left vertex and the lower-right vertex are specified in one method, while
the zoom point coordinates and the horizontal and vertical display widths are speci-
fied in another.
Scaled sprites cannot be rotated 90°. Specify the distorted sprite draw command to
perform 90° rotation.
Specification of Coordinates of Two Vertices
In this method, the coordinates of the upper-left and the lower-right vertices are
specified. The draw direction (direction of drawing a character) is determined by the
positional relationship of the lower-right coordinate with respect to the upper-left
coordinate. The character pattern is drawn from the upper-left coordinate toward
the lower-right coordinate. When the value of X of the lower-right coordinate is
smaller than the X value of the upper-left coordinate, the character pattern is in-
verted horizontally, and when the Y value of the lower-right coordinate is smaller
than the Y value of the upper-left coordinate, the character pattern is inverted verti-
cally.
As with normal sprites, inversion can be specified by the read direction. However,
when the coordinates and the direction of readout are both inverted vertically, the
inversions cancel each other out and the character remains unchanged.
Vertex (A) Vertex (A)
A B A B Vertex (C)
Draw Vertical-horizontal
Original Normal Vertex (C) reduction & horizontal
graphic inversion
Vertex (C)
Vertex (C)
Vertex (A)
Horizontal enlargement,
vertical reduction &
AB
Vertex (A)
... .
vertical inversion Vertical-horizontal
enlargement & vertical-
horizontal inversion
Figure 1.3 Scaled Sprites (Two Vertices Specified)
6
Specification of Zoom Point
Scaled sprites can be drawn by specifying the zoom point and display width. The
zoom point of the character pattern, the draw coordinates of the zoom point, and the
display width at which the character pattern is drawn are specified. The zoom point
specifies which point on the character pattern is used as a stationary point for draw-
ing. The point is selected from the left side, center, and right side in the horizontal
direction and from the top side, center, and bottom side in the vertical direction. The
display width specifies the display width in the X direction and the Y direction.
When vertical and horizontal inversions are specified for the character pattern
readout direction, each character patter is drawn inverted vertically and horizontally
with reference to each zoom point. The draw area differs depending on vertical or
horizontal inversion.
Zoom Zoom
point point A B
AB AB Display
width
Draw Display
Original width
graphic Normal size Vertical/horizontal reduction
& horizontal inversion with
zoom point at center.
Display Zoom
AB Display
width point width
Zoom
point
Horizontal enlargement,
vertical reduction & Vertical/horizontal enlargement
vertical inversion with & vertical/horizontal inverstion
zoom point at upper right. with zoom point at right center.
Figure 1.4 Scaled Sprites (Zoom Point Specified)
VDP1 User's Manual 7
Distorted Sprites
Draw a character pattern by specifying four coordinates. Specify the four draw
coordinates corresponding to the four vertices of the character pattern. These four
coordinates can assume any position relative to each other, and therefore the charac-
ter pattern can be inverted, enlarged or reduced, rotated, or twisted, depending on
how they are specified.
Distorted sprites are created by skewing the character pattern. At this time holes are
filled to prevent the dropout of pixels. For this reason, there may be some pixels that
are written twice, and therefore the results of half-transparent processing as well as
other processing in color calculation cannot be guaranteed.
Because drawing is done with lines, part of the character pattern may result outside
the graphic formed by linking the four vertices if it is twisted or rotated.
Figure 1.5 Distorted Sprites
8
Anti-aliasing
Distorted sprites and polygons contain diagonal lines that may result in pixel drop-
out (aliasing). When this happens, holes are anti-aliased as shown below.
Indicates direction of drawing.
Copied color code Anti-aliasing
Figure 1.6 Anti-aliasing
VDP1 User's Manual 9
Non-Textured Parts
Non-textured parts are different from textured parts in that they do not require an
original picture, and VRAM is not frequently accessed from the VDP1.
Polygons
Draw a quadrangle by specifying four vertices and filling the enclosed area with a
single color. The four vertices can be specified as desired. The color is specified as a
non-textured color.
Polygons contain diagonal lines that may result in pixel dropout (aliasing). When
this occurs, holes are anti-aliased. For this reason, some pixels may be written twice,
and therefore the results of half-transparency processing as well as other color
calculations cannot be guaranteed. Concave polygons can also be drawn. However,
fills may extend outside of the polygon since lines are used to fill the polygon.
Vertex (B)
Vertex (A)
Vertex (C)
Vertex (D)
Vertex (A)
Concave polygon
Vertex(B)
Vertex (D) Vertex (C)
Figure 1.7 Polygons
10
Polylines
A quadrangle is drawn by connecting four lines. Specify four vertices, and lines
connecting the vertices are drawn in order. Unlike polygons, the area enclosed by
the four vertices cannot be filled. The four vertices can be specified as desired.
Specify the color as non-textured color. Because four lines are drawn, the pixels near
the vertices are written twice. Therefore, the results of half-transparent processing
and other color calculations cannot be guaranteed.
Vertex (B)
Vertex (A)
Vertex (C)
Vertex (D)
Figure 1.8 Polylines
Lines
A line is drawn in a single color between two specified coordinates. Specify the
color as a non-textured color.
Vertex A
Vertex B
Figure 1.9 Line
VDP1 User's Manual 11
Color
The functions and special functions related to color are as follows.
• The number of colors per textured part unit is 16, 64, 128, 256, and 32,768.
• In the RGB mode, color calculation of half-luminance, half-transparency,
Gouraud shading, and shadowing is possible.
• Mesh (tiling).
The color bank and RGB code methods are used to express the colors of pixels
drawn (written) in the frame buffer. The color capability of the color bank method is
16, 64, 128, or 256 colors and the RGB code method is 32,768 colors.
Color Bank Method
The color bank method combines the color bank with the palette codes for 16, 64,
128, and 256 colors, and references the colors stored in the color RAM of the VDP2.
A 16 color palette code requires four bits of memory. The upper 12 bits of the color
bank is added to the palette to give a total of 16 bits which is written to the frame
buffer. Graphics that use 64, 128, or 256 colors (8-bit graphics) require a total of eight
bits of memory. Only the lower 6 bits and 7 bits are significant for 64 and 128 color
graphics, respectively, while 256 colors use all 8 bits. The upper 10, 9, and 8 bits of
the color bank are added.
The data written by the color bank method are divided into function bits as shown
in Figure 1.10 and processed in the VDP2. (Refer to the VDP2 manual for more
information.)
MSB LSB
Color bank Palette code
Priority
Color calculation
Figure 1.10 Bit Configuration of Color Bank Method
RGB Code Method
The RGB code method represents colors using a 5-bit luminance for each of red,
green, and blue (RGB) dot. The luminance of each of RGB is represented by 00H to
1FH. The closer the number is to 00H, less light is emitted from the RGB dots, the
closer it is to 1FH, more light is emitted. Up to 32,768 colors can be formed by RGB
codes. RGB codes are 16-bit data, and the most significant bit (MSB) is 1.
12
Part Colors
The color bank method, the color lookup table method, or the RGB code method can
be used to set the color of sprites. Set a non-textured color for each non-textured part
such as polygons, polylines, and lines.
Color Lookup Table
The color lookup table references the 4-bit graphic data to a 16-color lookup table
and converts it to 16-bit data. Because the 16-bit data in the table are written as is to
the frame buffer, there is no distinction between color bank codes and RGB codes for
textured data.
When read to the VDP2, the code is handled as a color bank code when the MSB of
the 16-bit data is “0” and as an RGB code when the MSB is “1.”
Non-textured Color
Non-textured color is handled as pixel data without the use of a color bank or color
lookup table.
8 Bits/Pixel Color
When using high resolution or specifying a bit width of 8 bits/pixel for a rotated
frame buffer, the graphics will be written to the frame buffer in 8 bits/pixel. When
there are 8 bits/pixel, the lower 8 bits are written to the frame buffer when using a
color lookup table or non-textured color. In either case, the lower 8 bits of the 16 bits
are written to the frame buffer. This will be abbreviated as 8 bits/pixel (high resolu-
tion or rotation 8).
VDP1 User's Manual 13
1.2 Screen Modes
Screen Modes and Display Areas
Table 1.2 shows the screen modes and the coordinate values displayed in each.
Table 1.2 Screen Modes and Display Areas
X range
Screen mode (pixels) Standard High Y range
resolution
Non-interlace 320 H × 224 V 0≤X≤319 0≤X≤639 0≤Y≤223
Single interlace 320 H × 240 V 0≤X≤319 0≤X≤639 0≤Y≤239
NTSC, PAL 352 H × 224 V 0≤X≤351 0≤X≤703 0≤Y≤223
352 H × 240 V 0≤X≤351 0≤X≤703 0≤Y≤239
Double interlace 320 H × 224 V 0≤X≤319 0≤X≤639 0≤Y≤447
NTSC, PAL 320 H × 240 V 0≤X≤319 0≤X≤639 0≤Y≤479
352 H × 224 V 0≤X≤351 0≤X≤703 0≤Y≤447
352 H × 240 V 0≤X≤351 0≤X≤703 0≤Y≤479
Non-interlace 320 H × 240 V 0≤X≤319 — 0≤Y≤239
31KC, HDTV 352 H × 240 V 0≤X≤351 0≤Y≤239
H = Horizontal V = Vertical
• These are coordinate ranges and are not the sizes of the areas occupied in the
frame buffer. For more information about the size of the frame buffer, see “Frame
Buffer” in Section 2.1 Address Map.
• High-resolution display has a color resolution of 8 bits/pixel, which is half the
standard mode. Rotated display of the frame buffer is not possible in high-
resolution.
• Rotated display of the frame buffer is not possible with double interlace.
• A double interlaced display system uses graphic information from both buffers
to make one frame.
• A single interlaced display system switches frame buffers every two fields and
displays the same picture in both the odd and even display lines. In both cases,
there are no gaps between the scanning lines.
• The resolution in single interlace and non-interlace are the same, and the method
of writing to the frame buffer is the same.
• In 31KC and HDTV, the same color is displayed in 4-pixel units, 2 vertical pixels
and 2 horizontal pixels. That is, the resolution is the same as 320 x 240 (31KC)
and 352 x 240 (HDTV) in the standard mode, and the method of writing to the
frame buffer is the same.
• For information about how to set the interlace, refer to the VDP2 manual.
Notes
Field: The time it takes the scanning lines to scan one screen (1/60 second).
Frame: The time period during which one image is displayed. If interlaced,
two fields make one frame (1/30 second.)
14
Rotated Reading of Frame Buffer
• By reading the frame buffer diagonally, the entire frame buffer plane can be dis-
played rotated.
• Display coordinates that exceed the frame buffer address range are handled as
transparent (XX00H for 8-bit graphics and 0000H for 16-bit graphics).
• Even if rotated reading of the frame buffer is performed, the clipping area and
erase/write area remain fixed with respect to the frame buffer plane. Therefore,
the clipping area and erase/write area become inclined with respect to the display
screen.
• To prevent dropout of any of the display screen when the frame buffer is dis-
played rotated, the coordinate range of the frame buffer must be made large. In
this case the frame buffer is set to 8 bits/pixel and the screen to 512 × 512 rather
than 512 × 256. The number of colors that can be expressed at one time becomes
fewer than 256.
• Rotation is prohibited when normal, high resolution, HDTV, or double interlace is
set.
• The read start coordinates and read movement value for rotated reading from the
frame buffer are received from the VDP2.
• Rotated reading of the frame buffer is only valid in rotation 16 and rotation 8, and
is prohibited in all other cases. In the case of non-rotation, any rotation data re-
ceived from the VDP2 are invalid and the parameters of the VDP1 become valid.
VDP1 User's Manual 15
(Page 16 is blank in the original Japanese version.)
16
Chapter 2
Address Map
Contents
2.1 Address Map .................................................................................... 18
VRAM ................................................................................. 19
Frame Buffer ....................................................................... 20
System Registers ................................................................ 23
2.2 Tables in VRAM ............................................................................... 24
Command Table .................................................................. 25
Color Lookup Table .............................................................26
Gouraud Shading Table ..................................................... 26
Character Pattern Table ..................................................... 26
VDP1 User's Manual 17
2.1 Address Map
Figure 2.1 shows the address map for the VRAM, frame buffer, and system registers
controlled by the VDP1.
*3
000000~07FFFFH VRAM *1
(4 Mbit)
Frame buffer 0 Frame buffer 1
080000~0BFFFFH (2 Mbit) (2 Mbit) *2
0C0000~0FFFFFH Reserved
System
100000~17FFFFH registers
Access
180000~1FFFFH prohibited
Notes
*1 The following tables are stored in VRAM.
Command tables,
Character pattern tables
Color lookup tables
Gouraud shading tables
*2 The frame buffer comprises two screens at
080000~0BFFFFH. Only the drawing screen can
be accessed. The display screen cannot be accessed.
*3 Address is absolute. To find absolute address,
add 5C00000H.
Figure 2.1 Address Map
18
VRAM
• The VRAM is a 4-Mbit DRAM.
• The command table, sprite character pattern table, color lookup table, and
Gouraud shading table are defined in VRAM. It doesn’t matter where in VRAM
the data of each are, or whether they are in a nested condition. They are refer-
enced by specifying the address of each.
• Fetching of the command must be performed from the top (000000H) of VRAM.
• Fetching of VRAM is repeated in the following order:
Command table
Gouraud shading table (only when Gouraud shading is used)
Color lookup table (only when lookup table method is used)
Character pattern table (only when drawing sprites)
• When fetching of the command table goes beyond the end address (07FFFFH) of
VRAM, fetching wraps to the top address (000000H) of VRAM.
• Byte access and word access are both possible from the CPU.
• Read-write access of the VRAM by the system controller IC, and parameter read
and pattern read access by the VDP1, are performed after assigning an order of
priority.
• The order of priority of access of the VRAM is always: system controller (system
controller IC) > drawing.
• Because access is performed after assigning an order of priority, there may be
more than 10 wait cycles according to that timing, depending on the operating
clock of the CPU. The operating clock of the CPU is 28 MHz.
• Perform access from the CPU when drawing is not being performed in order to
prevent interruption of drawing. To determine if drawing is being performed, poll
the system registers, or use an interrupt signal. Access of the VRAM and frame
buffer is performed in a short period of time using burst transfer.
VDP1 User's Manual 19
Frame Buffer
• The frame buffer comprises two 2-Mbit DRAM and is divided into two screens: a
display frame buffer and a draw frame buffer.
• The function of the two buffers is changed immediately before the screen display
period (DISP). After powering on or resetting, frame buffer 0 becomes the draw-
ing frame buffer, and frame buffer 1 becomes the display frame buffer.
• Read-write access of the frame buffer by the system controller IC is performed
only on the draw frame buffer. The display frame buffer becomes the rear bank, so
it cannot be accessed.
• Drawing is performed in sync with the CPU operating clock. The CPU operating
clock is 28 MHz, and the data for 1 pixel is drawn in sync with this.
• Read-write access of the frame buffer by the system controller IC and draw access
by the VDP1 are performed after assigning an order of priority.
• The order of priority of access of the frame buffer is always: system controller IC >
drawing
• When access from the system controller is performed during drawing, drawing is
interrupted and must wait. Therefore this situation should be avoided as much as
possible.
• Because drawing and access of the CPU are not performed together, perform
control by using a method that uses a manual start for drawing start.
• Access can be performed using word access. Byte access is only possible when
display is 8 bits/pixel. Do not use byte access when display is 16 bits/pixel.
• The entire frame buffer can be displayed rotated by reading the frame buffer
diagonally. Also, by skipping or repeating read addresses, the entire frame buffer
plane can be enlarged or reduced. Rotation, enlargement, and reduction can be
performed simultaneously.
• Rotation is specified from the VDP2. Refer to the VDP2 instruction manual for
more information about the specification of rotation.
20
Frame Buffer Plane
The coordinates of the frame buffer plane are as follows. Coordinates increase in
value toward the lower-right.
X -1024 ≤ X ≤ 1023
Y -1024 ≤ Y ≤ 1023
Operation cannot be guaranteed when specified values exceed these values.
Figure 2.2 Frame Buffer Plane
As shown in Figure 2.2, parts can be positioned outside the display screen. However,
nothing is written for parts that exceed the range of the frame buffer plane.
VDP1 User's Manual 21
Pixel Data in Frame Buffer
The pixel data in the frame is shown below. There is 16-bit and 8-bit data. RGB data,
which does not go through the color RAM in the VDP2, is only 16-bit data. When all
bits are 0, the dot is treated as a transparent dot by the VDP2.
• Bit configuration when data goes through color RAM (color RAM address)
16-color mode b15* b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
(4 bits/pixel)
Color bank Character data
64-color mode b15* b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
(6 bits/pixel)
Color bank Character data
128-color mode b15* b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
(7 bits/pixel)
Color bank Character data
256-color mode b15* b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
(8 bits/pixel)
Color bank Character data
Note: b15 = 0 when RGB data are mixed; b15 can be either when not mixed.
• Bit configuration when data do not go through color RAM (RGB data)
RGB mode 1 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
(16 bits/pixel)
BLUE data GREEN data RED data
• Bit configuration when pixel data is 8 bit (color RAM address)
16-color mode b7 b6 b5 b4 b3 b2 b1 b0
(4 bits/pixel)
Color bank Character data
64-color mode b7 b6 b5 b4 b3 b2 b1 b0
(6 bits/pixel)
Color bank Character data
128-color mode b7 b6 b5 b4 b3 b2 b1 b0
(7 bits/pixel)
Color bank Character data
256-color mode b7 b6 b5 b4 b3 b2 b1 b0
(8 bits/pixel)
Character data
22
System Registers
• System registers are memory used for making system settings for the VDP1. They
are housed inside the VDP1 separately from the VRAM and frame buffer.
• There are read-only registers and write-only registers.
• The write-only registers are used to control display of the frame buffer. They
select the TV mode, specify change of display and the drawing trigger, and define
the fill data and area for erase/write. Drawing can also be forcibly terminated.
• Read-only registers are used as help information during program development.
They make it possible to know the address of the command table that underwent
draw processing last.
• Read/write access from the CPU must be performed in word units.
• Do not use DMA burst transfer when accessing the system registers.
• Except for the plot trigger register (PTMR), the values in the write-only registers
become undefined after powering on and after resetting, so be sure to set the
values from the CPU. Undefined data is displayed from the frame buffer until a
suitable value is set.
• Set the unused bits of write-only system registers to “0”.
Table 2.1 System Registers
Address Name Description Access
100000H TVHR TV mode selection Write-only (word)
100002H FBCR Frame buffer change mode Write-only (word)
100004H PTMR Draw trigger Write-only (word)
100006H EWDR Erase/write data Write-only (word)
100008H EWLR Erase/write upper-left coordinate Write-only (word)
10000AH EWRR Erase/write lower-right coordinate Write-only (word)
10000CH ENDR Draw forced termination Write-only (word)
100010H EDSR Transfer end status Read-only (word)
100012H LOPR Last operation command address Read-only (word)
100014H COPR Current operation command address Read-only (word)
100016H MODR Mode status Read-only (word)
VDP1 User's Manual 23
2.2 Tables in VRAM
The command table, color lookup table, Gouraud shading table, and character
pattern table are defined in VRAM. Table 2.2 shows the sizes and boundaries of the
tables.
Table 2.2 Tables in VRAM
Name Function Commands Size Boundary
Textured Normal sprite draw command
Draw Scaled sprite draw command
Draw Command Distorted sprite draw command
Commands Polygon draw command
Command Non-textures Polyline draw command 1EH 20H
Table Line draw command
User clipping coordinate set
Coordinate Clipping coordinate command
Set set commands System clipping coordinate set
Commands command
Local coordinate set command
Drawing end command
Color lookup table 20H 20H
Gouraud shading table 8H 8H
Character pattern table optional* 20H
Note: *Differs depending on the character size and color mode.
The VRAM is 4 Mbit (512 Kbyte), and it is addressed in byte units from 000000H to
07FFFFH. Table data cannot be written beyond 07FFFFH. Each table must be kept
within the size of the VRAM.
24
Command Table
• The command table is a table in VRAM where commands are defined, and in
which the VDP1 reads commands, draws parts and processes clipping.
• The commands are as follows:
Draw commands
These are divided into texture drawing and non-texture drawing. Texture
drawing includes normal sprite, scaled sprite, and distorted sprite draw
commands. Non-texture drawing includes polygon, polyline, and line
draw commands. Draw commands draw these parts.
Clipping coordinate set commands
Includes user clipping and system clipping coordinate set commands, and
they set the draw area for parts.
Local coordinate set commands
Specifies the definition of the parts draw coordinate by the local coordinate.
Draw end command
Terminates drawing.
• The size of the command table is 1EH (30) bytes, and its boundary is 20H (32)
bytes.
• Each command is read to the VDP1 and is processed. This operation is referred to
as fetching.
• Fetching of the command table is performed from the top address (000000H) of
VRAM, and the next command table is fetched according to the specification of
the jump mode.
• According to the command table specification, the color lookup table, Gouraud
shading table, and character pattern table are referenced after the command table.
VDP1 User's Manual 25
Color Lookup Table
• This is a table in which 16-bit color codes for 16 colors are defined in VRAM.
• When a lookup table method is used for the color mode according to the texture
draw command, the table is referenced as color data.
• The pixel data of character patterns is converted to color codes and written to the
frame buffer.
• The size of the table is 20H (32) bytes, and its boundary is also 20H (32 ) bytes.
• The table is referenced according to the instruction at the lookup table address of
the texture draw command.
Gouraud Shading Table
• This is a table in VRAM in which 16-bit RGB codes for 4 points are defined.
• It is referenced when the processing of Gouraud shading by color calculation is
instructed by the draw command for the part.
• The pixel data of the part undergoes processing for Gouraud shading and is
written to the frame buffer.
• The size of the table is 8H bytes, and its boundary is also 8H bytes.
• It is referenced according to the instruction at the Gouraud shading table address
of the draw command for the part.
• When Gouraud shading is performed, the pixel data of the part is limited to RGB
code. When the pixel data of the part is a color bank code, the results cannot be
guaranteed.
Character Pattern Table
• This is a table in VRAM in which the pixel data for character patterns is defined.
• The table is referenced by the texture draw command.
• The pixel data is defined as 4, 8, or 16 bits/pixel, according to the specification of
the color mode.
• In the color bank mode, a color bank is added to the pixel data of the character
pattern; in the color lookup table mode it is converted in the color lookup table; in
the RGB mode it is written, as is, to the frame buffer.
• The size of the table is determined by the size of the characters and the color
mode. Its boundary is 20H (32) Bytes.
• The table is referenced according to the instruction at the character address of the
texture draw command.
26
Chapter 3
Processing Flow
Contents
3.1 Draw Procedure Flow ................................................. 28
3.2 Command Table Flow ................................................. 30
3.3 Table Referencing ....................................................... 31
VDP1 User's Manual 27
3.1 Draw Procedure Flow
Draw procedure flow using the VDP1 is as follows.
Step 1. Power on the system.
Step 2. Set the necessary values in the system registers of the VDP1.
Step 3. Write the necessary character pattern table to VRAM.
Step 4. Write the necessary color lookup table to VRAM.
Step 5. Write the necessary Gouraud shading table to VRAM.
Step 6. Write the necessary command table to VRAM.
Step 7. Drawing to the frame buffer starts automatically at the start of frame
change, and the drawn frame buffer is displayed in the next frame change.
Step 8. Repeat steps 3 through 6 as required.
28
Table Access
The procedure VDP1 uses to access the table in VRAM and draw is as follows:
Step 1. Controls drawing and display according to the instructions set in the system
registers.
Step 2. Fetches the command table at the top address of VRAM.
Step 3. The fetched command table:
(1) Terminates drawing in the case of a draw end command (goes to step
9).
(2) Is ignored when jump mode is skipped; reading of the table is termi-
nated and the table is not processed (goes to step 8).
(3) In cases other than (1) and (2), goes to step (4).
Step 4. In the case of a clipping coordinate set command or a local coordinate set
command, each is processed (goes to step 8).
Step 5. In the case of a drawing command, the Gouraud shading table and color
lookup table are read if specified.
Step 6. In the case of a textured drawing, the character pattern table is read and is
written to the frame buffer according to the specification. At this time,
processing of the color mode, color calculation, inversion, enlargement and
reduction, and rotation are performed.
Step 7. In the case of a non-textured drawing, writing to the frame buffer is per-
formed according to the specification.
Step 8. The next command table is fetched according to the specification of the
jump mode and processing of the command table is repeated (goes to step
3).
Step 9. Drawing is repeated with the start of framing (goes to step 1).
VDP1 User's Manual 29
3.2 Command Table Flow
Except for the draw end command, a jump mode to the next command table to be
processed can be specified in other commands. Those jump modes include the
following.
· Jump to a command table
· Skip to a command table
· Call a command table group (subroutine)
· Return (to main routine)
Figure 3.1 shows an example of the flow of a command using a jump mode.
VRAM/Command Table
000000 H Clipping coordinates
• Fetched from the top of VRAM
Local coordinates during frame switching.
Parts
Subroutine call
Parts • The specified table receives
a subroutine call.
Parts
Jump
: • Moves to specified table.
Parts
Parts
Return
: • Returns to main routine.
Parts
Parts
Skip/parts
• Skips (this part is not drawn).
Parts
Parts
Jump
Parts
Parts
Jump
:
Clipping coordinate change
Parts
Local coordinate change
Parts
:
Terminate drawing
: • Drawing is terminated.
Figure 3.1 Command Table Flow
30
3.3 Table Referencing
Referencing of the tables stored in VRAM begins with the following command table.
VRAM
:
:
Parts draw command • The data size of the command
: table is 1EH bytes and the
boundary is 20H bytes.
Color mode and color calculation
Address of color lookup table
Character address
Character size
:
:
Address of Gouraud shading table
:
:
:
Color lookup table
: • Both the data size and boundaries
are 20H bytes when the color mode
: is the lookup table mode.
:
:
Gouraud shading table • Both the data size and boundaries
: are 8H bytes when Gouraud
shading is used for color calculation.
:
:
:
Character pattern • In the case of a sprite draw command,
: the data size has 20H-byte boundaries
as determined by the character size
:
and color mode.
:
:
Figure 3.2 Referencing of Tables
VDP1 User's Manual 31
(This page is blank in the original Japanese document.)
32
Chapter 4
System Registers
Contents
4.1 TV Mode Selection Register ............................................................ 36
4.2 Frame Buffer Change Mode Register ............................................. 38
4.3 Plot Trigger Register ........................................................................ 45
4.4 Erase/Write ...................................................................................... 46
Erase/Write Data Register ................................................. 46
Erase/Write Upper-Left Coordinate Register ...................... 47
Erase/Write Upper-Right Coordinate Register ................... 47
4.5 Draw Forced Termination Register ................................................. 51
4.6 Transfer End Status Register .......................................................... 52
4.7 Last Operation Command Address Register .................................. 54
4.8 Current Operation Command Address Register ............................. 55
4.9 Mode Status Register ...................................................................... 57
VDP1 User's Manual 33
The following table shows the functions of the systems registers.
Table 4.1 System Registers
Abbrevi - Internal update
Register Names ation Address Access Function period
TV mode selection TVMR 100000H Write-only Specifies TV display mode PTM as occasion
demands
(word) VBE is field
Frame buffer switch FBCR Write-only Controls frame buffer toggle and FCM and FMT are set
for each field, others
mode 100002H (word) double interlace mode are frame buffer SW
timing
PTMR Write-only Controls start of drawing 01B write as the
occasion demands,
Plot trigger 100004H (word) 00B and 10B write are
frame buffer SW
timing
Erase/write data EWDR Write-only Specifies fill data for frame buffer Frame buffer SW
100006H (word) during erase/write timing
Erase/write upper - EWLR Write-only Specifies upper-left coordinate of area Frame buffer SW
left coordinate 100008H (word) in frame buffer to fill during timing
erase/write
Erase/write lower - EWRR Write-only Specifies lower-right coordinate of Frame buffer SW
right coordinate 10000AH (word) area in frame buffer to fill during timing
erase/write
Plot abnormal end ENDR 10000CH Write-only Forces termination of drawing As the occasion
(word) demands
Transfer end status EDSR Read-only Status of ‘END’ bit of current/previous –
100010H (word) frame
Last Operation LOPR Read-only Address of last accessed command –
Command Address 100012H (word) table for previous frame
Current Operation COPR Read-only Address of last accessed command –
Command Address 100014H (word) table being processed
Mode status MODR 100016H Read-only Displays setting of write-only register –
(word)
34
System Register Settings Switch Timing
The timing with which the system register settings become valid is as follows.
• Settings that change immediately
Plot trigger mode (PTM, when 01B is written)
TV mode selection (TVM)
• Settings that change with each field (1/60 second)
Frame buffer change mode (FCM)
Frame buffer change trigger (FCT)
• Settings that change with the switching of the frame buffer
Plot trigger mode (PTM, when 00B or 10B is written)
Even/odd coordinate selection bit (EOS)
Double-density interlace enable (DIE)
Double-density interlace draw line (DIL)
Erase/write data
Erase/write coordinates (upper-left, lower-right)
• Changes following the termination of display of one line after the V-blank IN
interrupt.
Enables V-blank erase/write (VBE)
VDP1 User's Manual 35
4.1 TV Mode Selection Register
The TV mode selection register (TVMR, TV mode register) enables V-blank erase
and specifies the TV display mode. It is a 16-bit write-only register, and is at address
100000H. Its value becomes undefined after powering on or resetting; therefore the
TV display mode must be set. The unused bits must be set to “0.”
TVMR bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
100000H 0 0 0 0 0 0 0 0 0 0 0 0 VBE TVM
Write-only
V-Blank Erase/Write Enable (VBE): bit 3
• When VBE = 1, erase/write is performed during V-blank. VBE = 1 can only be set
when FCM = 1 and FCT = 1 are written. For more information, refer to section 4.2,
“Frame Buffer Change Mode Register.”
• When VBE is set to “0” or “1,” TVM of the same value before making the setting
must be set at the same time.
• The VBE setting must be set immediately after the V-blank IN interrupt. Access is
prohibited from the first H-blank IN interrupt after the V-blank IN interrupt until
the next H-blank IN interrupt.
TV Mode Select (TVM): bits 2~0
• Specifies the TV display mode.
• For more information about the coordinate values of the displayed area, refer to
“Screen Mode and Display Areas” in section 1.2.
• When TVM = 010B(2), the frame buffer has only 512 (H) x 256 (V) pixels, and
therefore if the screen is greatly inclined, a transparent area occurs in the display
screen.
• Since only non-interlace is possible when HDTV is specified (TVM = 100B(4)), and
only non-interlace and single interlace are possible when rotated display is speci-
fied (TVM = 010B(2), 011B(3)), the frame buffer change mode register must be set
to double-interlace disable (DIE bit = 0). For more information, refer to section 4.2,
“Frame Buffer Change Mode Register.”
• TVM settings must be performed from the second H-blank IN interrupt after the
V-blank IN interrupt to the H-blank IN interrupt immediately after the V-blank
OUT interrupt.
36
• The function of each bit is as follows.
Bit 2: HDTV enable bit
0 = NTSC, PAL
1 = HDTV, 31KC
Bit 1: Frame buffer rotation enable bit
0 = non-rotation
1 = rotation
Bit 0: Bit depth selection bit
0 = 16 bits/pixel
1 = 8 bits/ pixel
Table 4.2 Screen Modes
Frame
TVM Screen Mode buffer VDP CLK (MHz)
Bits Resolution Bit width screen
2 1 0 Name HxV (bit/pixel) size Interlace NTSC PAL
Normal 320x224 512 H 26.8426 26.6564
0 0 0 (NTSC, PAL) 320x240 16 x Yes 26.8426 26.6564
352x224 256 V 28.6364 28.4375
352x240 28.6364 28.4375
High 640x224 1024 H 26.8426 26.6564
0 0 1 resolution 640x240 8 x Yes 26.8426 26.6564
(NTSC, PAL, Hi- 704x224 256 V 28.6364 28.4375
Res) 704x240 28.6364 28.4375
Rotation 16 320x224 512 H 26.8426 26.6564
0 1 0 (NTSC, PAL 320x240 16 x Single 26.8426 26.6564
Rotation) 352x224 256 V 28.6364 28.4375
352x240 Only 28.6364 28.4375
Rotation 8 (NTSC, 320x224 512 H 26.8426 26.6564
0 1 1 PAL 320x240 8 x Single 26.8426 26.6564
Rotation) 352x224 512 V 28.6364 28.4375
352x240 Only 28.6364 28.4375
1 0 0 HDTV 320x240 16 512 H x 26.8426 26.6564
(31KC, HDTV) 352x240 256 V No 28.6364 28.4375
All other Setting prohibited (do not use)
VDP1 User's Manual 37
4.2 Frame Buffer Change Mode Register
The frame buffer change mode register (FBCR, frame buffer change register) controls
drawing and display change of the frame buffer, as well as double interlace drawing.
It is a 16-bit read-only register at address 100002H. Its value becomes undefined
after powering on or resetting, and therefore the change mode must be set. Unused
bits must be set to “0.”
FBCR bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
100002H 0 0 0 0 0 0 0 0 0 0 0 EOS DIE DIL FCM FCT
Write-only
Frame Buffer Change Mode (FCM): bit 1
Frame Buffer Change Trigger (FCT): bit 0
• Normally the two frame buffers are used as a front screen and a back screen. The
front screen is displayed and the back screen is drawn. Also, the front screen and
back screen are toggled after the time required to change one frame has elapsed.
The front screen that was displayed becomes the back screen to be drawn, and the
back screen that was being drawn becomes the front screen to be displayed.
• Only that part of the frame buffer being drawn can be accessed. The side being
displayed cannot be accessed.
• The number of characters that can be drawn in one frame is limited. Therefore, in
order to draw multiple characters, the manual mode must be set and controls
erased and changed from the CPU.
• When selected data is written from the CPU to FBCR, the values of FCM and FCT
are updated at the time of a field change in the VDP1.
• When in the manual mode, the FCT bit setting is only valid for the next frame.
The contents of FCT are updated internally at the time of frame change.
• Make the FCM and FCT settings immediately after the V-blank OUT interrupt.
Access is prohibited from the first H-blank IN interrupt after the V-blank OUT
interrupt until the next H-blank IN interrupt.
VBE FCM FCT Change mode Change time
0 0 0 1-cycle mode Change every 1/60 second
0 0 1 Setting prohibited —
0 1 0 Manual mode (erase) Erase in next field
0 1 1 Manual mode (change) Change in next field
1 0 0 Setting prohibited —
1 0 1 Setting prohibited —
1 1 0 Setting prohibited —
1 1 1 Manual mode (erase and Erase by V-blank and change
change) in next field
38
1-Cycle Mode
• This is the normal mode.
• One frame changes automatically every 1/60 second.
• Set the value of the VBE and FCT bits to “0.”
Erase (Manual Mode)
• Erase/write for one frame is controlled from the CPU.
• Manual erase/write of the frame buffer is specified by writing “0” to the VBE,
FCM and FCT registers. Erase/write of the display frame buffer is performed in
the next specified field, and the display frame buffer is cleared.
• Changing of the drawing and display frame buffers is not performed. Because the
display frame buffer is cleared when erase is performed, it is necessary to specify
change in the next field when display is performed for which erase is specified
and to perform change of drawing and display.
• This mode is used when there are two or more fields in one frame, as in double
interlace. Also, when changing from manual mode to the 1-cycle mode, this erase
is used in the field before changing.
• Erase is used when it is known that frame change will be performed two fields in
advance. Use erase and change when it is unclear up until the prior field that
frame change will be performed.
Change (Manual Mode)
• The changing of one frame is controlled by the CPU.
• Change is specified by writing “0” to the VBE register and “1” to the FCM and
FCT registers. The drawing and display are changed in the next specified field.
• Because erase/write is not performed, it is necessary to specify erase in the prior
field in which change is specified and to erase/write the frame buffer.
• Until change is specified, characters can be drawn in the back screen.
• This change is normally used when switching from the 1-cycle mode to the
manual mode. This change is also used when changing the frame buffer in
manual mode.
VDP1 User's Manual 39
Erase & Change (Manual Mode)
• By writing “1” to the VBE register, V-blank erase is specified; and by writing “1”
to the FCM and FCT registers at the same time, switching of the frame buffer after
V-blank is specified.
• This mode is used when frame change is unclear up until the prior V-blank, as
when the frame buffer cannot be changed by the end of processing by the CPU.
• Once VBE has been set to “1,” erase/write is performed automatically even in the
next V-blank, and therefore VBE must be set to “0” before the next V-blank after
frame change.
• Place the erase & change setting immediately after the V-blank IN interrupt. When
set at another time, the change may be performed without being able to erase.
• If the timing for frame change is known in advance as in normal, high resolution,
and interlace, specify erase & change and perform erase/write during the display
period. In this case, erase/write of the entire display screen is possible.
Sequence When Using Erase & Change
1) Set VBE to “0” and FCM and FCT to “1.”
2) Wait for the end of processing by the CPU without selecting the TV mode or
setting the FB change mode.
3) When processing by the CPU ends by the H-blank IN interrupt time (224th line
in 224-line display and 240th line in 240-line display) immediately before V-
blank, then VBE, FCM, and FCT are set to “1” (erase & change). The erase &
change setting should be placed immediately after the V-blank IN interrupt.
4) V-blank erase is started after completion of the V-blank IN interrupt.
5) At the end of V-blank, erase/write is interrupted and the frame is changed.
6) If erase/write is not completed, erase/write non-erased areas with polygons.
7) Return VBE to “0” after the V-blank OUT interrupt to stop V-blank erase.
8) Return to 2).
40
Example
Table 4.3(a) shows the frame buffer change mode being used.
Table 4.3(a) Example of Use of Frame Buffer Change Mode (Fixed at VBE = 0)
Setting1 Frame Frame Frame buffer Change
FCM FCT buffer 0 2 buffer 1 2 change mode time
0 0 Draw Display and 1-cycle mode 60 frames/sec
erase/write
Display and Draw
erase/write
Draw Display and
Erase/write
Display and Draw
erase/write
1 1 Draw Display and Manual mode
erase/write (change)3
Display Draw 20 frames/sec
1 0 Display Draw Manual mode (erase)4
1 1 Display and Draw Manual mode
erase/write (change)4
Draw Display
1 0 Draw Display Manual mode (erase)5
0 0 Draw Display and 1-cycle mode
erase/write
Display and Draw 60 frames/sec
erase/write
Draw Display and
erase/write
Notes:
1Value written to register immediately after the V-blank OUT interrupt.
2Changes from the first of the field.
3Changes from the 1-cycle mode to the manual mode with change.
4Be sure to continue to specify erase & change.
5Specify erase in the field immediately before changing to the 1-cycle mode.
VDP1 User's Manual 41
Table 4.3 (b) Example of Use of Frame Buffer Change Mode (VBE Is Used)
42
Double Interlace Enable (DIE): bit 3
Double Interlace Draw Line (DIL): bit 2
• In single interlace, the same picture is displayed in the even fields and the odd
fields. In double interlace, however, the vertical resolution is doubled by display-
ing different pictures (each draws only even lines and odd lines, respectively) in
the even fields and the odd fields.
• Double interlace is enabled by DIE = 1.
• The contents of the first screen displayed after changing DIE cannot be guaran-
teed.
• In double interlace, the fields are changed every 1/60 second, and therefore
FCM = FCT = 0 (1-cycle mode) is set.
DIE DIL Interlace mode Plot after next frame change
0 0 Non-interlace/single interlace Plot both even and odd lines
0 1 Setting prohibited —
1 0 Double interlace Plot even-numbered lines only
1 1 Double interlace Plot odd-numbered lines only
Single interlace mode display Double interlace mode display
line 0 line 0
line 0 line 1
line 1 line 2
line 1 line 3
line 2 line 4
line 2 line 5
line 3 line 6
line 3 line 7
• Appears as 256 lines vertically • Appears as 512 lines vertically
• The frame is changed every 1/60th of a • Even and odd numbered lines are
second, and either the same picture is rendered into different frame buffers.
displayed two times or the frame is changed
every 1/30th of a second (a 1/60 sec signal is
used and is specified from the CPU).
Figure 4.1 Single Interlace and Double Interlace Display
VDP1 User's Manual 43
Even/Odd Coordinate Select Bit (EOS): bit 4
• When “1” is specified for high speed shrink (HSS) with a scaled or distorted
sprite, this bit is enabled. When HSS = 1 is specified, lines drawn with a magnifi-
cation ratio of less than 1 are drawn by sampling only the even or odd pixels of
the original picture data. This bit specifies whether even or odd coordinates are
sampled.
• When EOS = 0, only pixels at even coordinates are sampled. When EOS = 1, only
pixels at odd coordinates are sampled.
• If HSS = 0, this bit is not referenced.
• Refer to “High Speed Shrink” under “6.3 CMDPMOD (Draw Mode Word” for
more information.
EOS Even/odd coordinate select bit
0 Samples only pixels at even coordinates
1 Samples only pixels at odd coordinates
44
4.3 Plot Trigger Register
The plot trigger mode register (PTMR) controls the start of drawing. It is a 16-bit
write-only register at address 100004H. Its value is reset to 00B after powering on or
resetting. Set unused bits to “0”.
PTMR bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
100004H 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PTM
Write-only
Plot Trigger Mode (PTM): bits 1, 0
• Controls the start of drawing.
• When the plot trigger mode bits are 10B, drawing begins automatically at the start
of the frame.
• When the plot trigger mode bits are made 01B, drawing begins when the register
is written. When 01B is written to the plot trigger mode bits during drawing,
drawing begins from the top of the command table.
• When the plot trigger mode bits are 00B, drawing does not start even at the start
of the frame. An idling condition is set.
• The value of the bits is reset to 00B after powering on or resetting.
PTM Drawing mode
Bit 1 0
0 0 Idle at frame change
0 1 Starts drawing when 01B is written
1 0 Starts drawing automatically with frame change
1 1 Setting prohibited (do not set)
• When the plot trigger mode bits are rewritten from 01B to 00B, drawing becomes
valid from the next frame. However, when the plot trigger bits are rewritten from
00B or 10B to 01B, drawing becomes valid at that point and drawing is started
even if drawing is automatically started by 10B.
• When the table is not rewritten the same drawing is performed, and therefore the
results of color calculation of half-transparency change. Use the following proce-
dure to change only the draw start mode without drawing.
1) Change the plot trigger mode bits from 10B to 00B.
2) Change the plot trigger mode bits from 00B to 01B in the next frame.
VDP1 User's Manual 45
4.4 Erase/Write
Before rendering data into the frame buffer, the VDP1 erases the contents of the
frame buffer. This erasure is referred to as erase/write, and it specifies the fill area to
be erased and the fill data to be written to that area. The three registers related to
erase/write are the erase/write data register, the erase/write left coordinate register
and the erase/write right coordinate register.
Erase/Write Data Register
The erase/write data register (EWDR) specifies the fill data during erase/write. It is
a 16-bit write-only register at address 100006H. Its value becomes undefined after
powering on or resetting, and therefore the fill data must be set.
EWDR
100006H bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
16 bits/pixel Erase/write data
8 bits/pixel Erase/write data for even X coordinates Erase/write data for odd X coordinates
Write-only
Erase/Write Data: bits 15~0
When parts are written to the frame buffer, the VDP1 automatically erases the frame
buffer. At the time of this erase/write, the frame buffer is filled with the 16-bit data
set in the erase/write register. Erase/write is performed 2 pixels at a time when the
frame buffer depth is 8 bits/pixel. The area of erase/write is set by the erase/write
left coordinate register and the erase/write right coordinate register.
46
Erase/Write Upper-Left Coordinate Register
The erase/write left register (EWLR) sets the upper-left coordinate of the erase/
write area. It is a 16-bit write-only register at address 100008H. Its value becomes
undefined after powering on or resetting, and therefore the coordinates must be set.
Set unused bits to “0.”
EWLR bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
100008H 0 Upper-left coordinate X1 Upper-left coordinate Y1
Write-only
Erase/Write Upper-Left Coordinate X1: bits 14~9
Erase/Write Upper-Left Coordinate Y1: bits 8~0
Erase/Write Upper-Right Coordinate Register
The erase/write right coordinate register (EWRR) sets the lower-right coordinate of
the erase/write area. It is a 16-bit write-only register at address 10000AH. Its value
becomes undefined after powering on or resetting, and therefore the coordinates
must be set. Set unused bits to “0”.
EWRR bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
10000AH Lower-right coordinate X3 Lower-right coordinate Y3
Write-only
Erase/Write Lower-Right Coordinate X3: bits 15~9
Erase/Write Lower-Right Coordinate Y3: bits 8~0
• These registers specify the fill area in the frame buffer during erase/write.
• The X coordinate is set in 8-pixel units when there are 16 bits/pixel (normal,
rotation 16, HDTV) and in 16-pixel units when there are 8 bits/pixel (high resolu-
tion, rotation 8). When the value of the system register is 1, it becomes 8 or 16.
The actual lower-right X coordinate takes a value that is 8 or 16 times the register
setting and from which 1 is subtracted.
• The Y coordinate is set in one-line units. Because the register setting for the Y
coordinate is doubled during double interlace, the actual coordinate value should
be set to one half. For example, when the setting is 223, the coordinate becomes
447.
• The actual X coordinate is expressed by the following equations.
16 bits/pixel Upper-left coordinate X 1 = register setting × 8
Lower-right coordinate X 3 = register setting × 8 – 1
8 bits/pixel Upper-left coordinate X1 = register setting × 16
Lower-right coordinate X3 = register setting × 16 – 1
VDP1 User's Manual 47
Therefore the values that the upper-left coordinate X1 and the lower-right coordinate
X3 can take are as shown in the following table.
Value set 16 bits/pixel 8 bits/pixel
in register High Resolution Rotated 8
Upper left Lower right Upper left Lower right Upper left Lower right
coordinate X1 coordinate X3 coordinate X1 coordinate X3 coordinate X1 coordinate X3
Setting Setting Setting
0 0 prohibited 0 prohibited 0 prohibited
1 8 7 16 15 16 15
2 16 15 32 31 32 31
: : : : : : :
31 248 247 496 495 496 495
Setting
32 256 255 512 511 prohibited 511
Setting Setting
33 264 263 528 527 prohibited prohibited
: : : : : : :
40 320 319 640 639 : :
: : : : : : :
43 344 343 688 687 : :
44 352 351 704 703 : :
: : : : : : :
62 496 495 992 991 : :
63 504 503 1008 1007 : :
Setting Setting
64 prohibited 511 prohibited 1023 : :
Setting Setting Setting Setting Setting Setting
over 65
prohibited prohibited prohibited prohibited prohibited prohibited
• The coordinates for erase/write are not checked, and therefore the registers must
be set in the CPU in advance so that X1 < X3 and Y1 ≤ Y3.
• Set the erase/write range in each TV mode within their respective memory map
ranges.
(X1, Y1) (X3, Y3)
(X3, Y3) (X1, Y1)
(a) X1 < X3, Y1 ≤ Y3 (b) X1 ≥ X3, Y1 > Y3
White area undergoes erase-write No erase-write
Figure 4.2 Erase/Write Area
48
• If the setting is X1 ≥ X3 or Y1 > Y3, then erase/write is performed for 1 dot in the
normal or high-resolution mode and for 8 dots in the case of rotation or HDTV. In
these cases, erase/write is performed under the assumption that the area (X1, Y1)
is set to (X3 = X1 + 1, Y3 = Y1).
• When VBE = 0 in the normal or high-resolution mode, erase/write is performed
beyond the frame buffer during the display period. When setting the X3 coordi-
nate beyond the display screen, after the end of the effective data (fall of HTIM),
erase/write is continued for 4 pixels in the normal mode and for 8 pixels in the
high-resolution mode, and erase/write is not performed beyond the display
screen other than in those areas.
• When the erase/write area is set within the display screen area, no erase/write is
performed outside the display area.
• Erase/write is not affected by clipping.
• Erase/write cannot be performed on the frame buffer during display when in the
HDTV mode, when the frame buffer is enlarged or reduced, or when display is
rotated. Because erase/write is performed in the vertical blanking period (V-
BLANK), there is not enough time to erase/write the entire screen. To perform
erase/write on the entire screen, the non-erased areas must be filled with poly-
gons at the start of drawing.
• The number of pixels required for V-blank erase is expressed by
(X3 – X1 + 1) x (Y3 – Y1 + 1) x 8
If this is within the number of pixels that can be used in V-blank erase, then erase/
write is completed.
• The number of pixels that can be used in V-blank erase is given by
{(number of pixels in 1 raster) – 200}
× {(number of rasters in 1 field) – (number of display rasters)}
The respective values are shown in Tables 4.4 and 4.5.
Table 4.4 Number of Rasters and Number of Pixels
Screen mode Number of horizontal Number of pixels in Number of rasters in
pixels 1 raster 1 field
NTSC 320 1708 263
PAL 352 1820 313
31KC — 852 525
HDTV — 848 562
VDP1 User's Manual 49
Table 4.5 Number of Pixels that Can Be Used in V-Blank Erase (in Non-Interlace Display)
Screen mode Resolution Number of pixels that can
(horizontal x vertical) be used
320 × 224 58812
NTSC 320 × 240 34684
352 × 224 63180
352 × 240 37260
320 × 224 134212
320 × 240 110084
PAL 320 × 256 85956
352 × 224 144180
352 × 240 118260
352 × 256 92340
31KC 320 × 480 29340
HDTV 352 × 480 53136
50
4.5 Draw Forced Termination Register
The draw forced termination register (ENDR) forces termination of drawing. It is a
write-only 16-bit register at address 10000CH.
ENDR bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
10000CH 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Write-only
Draw Forced termination: draw end
• Forces termination of the drawing currently being processed.
• Forces termination of the drawing in the frame within approximately 30 clock
cycles after the data is written to the register.
• Specify 0000H for the write data.
• Interrupted drawing cannot be resumed.
• When the amount of data drawn is large and cannot be drawn in one frame, a
pseudo draw continuation is used to divide the data into two parts and draw it.
This draw forced termination is used to terminate drawing during this pseudo
draw continuation. For more information, refer to section 4.8 “Current Operation
Command Address Register.”
VDP1 User's Manual 51
4.6 Transfer End Status Register
The transfer end status register (EDSR) indicates the end status of the prior frame
processing. It is a 16-bit read-only register at address 100010H. Set unused bits to
“0.”
EDSR bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
100010H 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CEF BEF
Read-only
Current End Bit Fetch Status (CEF): bit 1
This register indicates whether or not the end bit (draw forced termination com-
mand) has been fetched from the command table in the frame currently being
drawn. When it is “0,” the end bit indicates a non-fetched status; when it is “1,” it
indicates that the end bit has been fetched and that drawing is terminated.
CEF End bit fetch status
0 The end bit in current frame has not been fetched.
1 The end bit in current frame has been fetched and plotting is ended.
• The VDP1 successively fetches the following command tables in VRAM and
draws them in the frame buffer. When the draw end command (when end bit is 1)
is fetched, the drawing of one frame is terminated. CEF is set to “1” at this time.
• When data are transferred from the CPU to VRAM while in a draw end (CEF = 1)
status, VRAM can be accessed without the overhead for stopping drawing and
without causing the CPU to wait.
• When the draw end command is fetched, the VDP1 sets CEF to “1” and generates
an interrupt signal.
• There are two methods of judging termination of drawing: one confirms the fetch
status of the end bit with CEF (polling) and the other uses the interrupt signal.
• When there is no draw end command in VRAM, or when there is one and it is
defined by the jump mode such that it cannot be fetched, this bit remains “0.”
• This bit is reset to “0” when the frame buffers are changed or when drawing is
started.
• If fetch of the draw terminate command matches when the frame buffer changes,
CEF and BEF might not become “1.”
52
Before End Bit Fetch Status (BEF): bit 0
This register indicates whether or not the end bit (draw terminate command) has
been fetched from the command table in the previous frame. When it is “0,” it indi-
cates that the end bit has not been fetched; when “1,” it indicates that the end bit has
been fetched and that drawing is terminated.
BEF End bit fetch status
0 The end bit in previous frame has not been fetched.
1 The end bit in previous frame has been fetched and drawing is terminated.
• The VDP1 successively fetches the following command tables in VRAM and
draws them in the frame buffer. When the draw terminate command (when end
bit is 1) is fetched, the drawing of one frame is terminated. If there are many
commands, or if there are many pixels to be drawn because of enlargement, draw-
ing may not be terminated in one frame. This is referred to as “transfer-over.”
This bit indicates a transfer-over status.
• When transfer-over has occurred, it is necessary to reduce the drawing commands
or to reduce the pixels drawn.
• When there is no draw terminate command in VRAM, or when there is one and it
is defined by a jump mode such that it cannot be fetched, this bit remains at “0.”
• This bit is written with the value of the CEF value when the frame buffer is
changed or at the start of drawing, and is maintained until the next frame buffer
change.
VDP1 User's Manual 53
4.7 Last Operation Command Address Register
The last operation command address register (LOPR) indicates the command table
address processed at the end of the previous frame. It is a 16-bit read-only register at
address 100012H.
LOPR bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
100012H Last operation command address/8H 0 0
Read-only
Last Operation Command Address: bits 15~0
• When the frame buffer is changed, the value resulting from dividing the address
of the command table read to the VDP1 from the VRAM by 8H is written to this
register.
• This register is updated when the frame buffer is changed, so it is possible to
know the address of the command table last processed in the previous frame.
• Because the boundary of the table address is 20H bytes, the lower 2 bits of the
register are fixed at 00B.
VRAM VDP1 Frame buffer
Parameters Parameters
Command
read
Address
Table
address
To current
operation
command
address
To last
operation
Latch command
address
Figure 4.3 Last Operation Command and Current Operation Command Address
54
4.8 Current Operation Command Address Register
The current operation command address register (COPR) indicates the address of
the command table being processed. It is a 16-bit read-only register at address
100014H.
COPR bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
100014H Current operation command address/8H 0 0
Read-only
Current Operation Command Address: bits 15~0
• The value resulting from dividing the command table address, which has received
the parameter currently being processed, by 8H is written to this register.
• It is possible to know the address of the command table currently being pro-
cessed. The address value is continually updated during command processing.
• When the draw end command is fetched and drawing is abnormally ended, the
value of the address updated at that time is retained as is until drawing is started
by a frame change or plot trigger.
• When the draw end command is fetched, this is the address (divided by 8H) of
the draw end command table. In the case of draw forced termination, this is the
address (divided by 8H) of the abnormally ended command table.
• Because the boundary of the table address is 20H bytes, the lower 2 bits of the
register are fixed at 00B.
VDP1 User's Manual 55
Pseudo Draw Continuation
• When the amount of data drawn is large and cannot be drawn in one frame,
drawing is terminated part way through and pseudo draw continuation is used to
divide the data into two parts and to draw it.
• Pseudo draw continuation is performed using the following procedure. Drawing
is terminated, at which time the top command is written so that it jumps to the
address of the table whose processing was terminated at that time, and the plot
trigger mode is set to start drawing (PTM = 01B) when it is written.
• As much drawing is performed as possible in the time of one frame, at which
point drawing is terminated (interrupted) by the CPU. Next, the CPU writes the
jump destination in the top command in VRAM to the command table address at
the time of termination, and drawing is immediately started by the plot trigger
mode (PTM = 01B). This is how pseudo draw continuation is done. However,
drawing cannot be continued when the command table address is in the subrou-
tine at the time of a forced termination. In this case, the drawing times necessary
to transfer the respective pixel data to the frame buffer are set shorter than the
time to the end of the frames.
• When color calculation of half-transparent is being performed at the time of an
forced termination of drawing, it is possible that dots may occur for which half-
transparent processing is performed twice (color calculation is performed twice)
when drawing is continued using the above method. A forced termination of
drawing must be performed when color calculation of half-transparency is not
performed.
56
4.9 Mode Status Register
The mode register (MODR) indicates the setting of the write-only register. It is a 16-
bit read-only register at address 100016H.
MODR bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
100016H VER — — — PTM1 EOS DIE DIL FCM VBE TVM
Read-only
Because the registers at addresses from 100000H to 10000CH are write-only, they
cannot be read to confirm the settings. The settings in write-only registers can be
confirmed by this register. It is mainly used as help information during program
development. However, because these values are the actual system register settings,
they may be different from the values taken in as internal signals.
Version Number (VER): bits 15~12
Indicates the version number of VDP1. The value is “1” (0001B).
Plot trigger Mode (PTM1): bit 8
Setting of bit 1 of the plot trigger register (PTMR: 100004H).
Even/Odd Coordinate Select Bit (EOS): bit 7
Setting of bit 4 of the frame buffer change mode register (FBCR: 100002H).
Double Interlace Enable Bit (DIE): bit 6
Setting of bit 3 of the frame buffer change mode register (FBCR: 100002H).
Double Interlace Draw Line (DIL): bit 5
Setting of bit 2 of the frame buffer change mode register (FBCR: 100002H).
Frame Buffer Change Mode Bit (FCM): bit 4
Setting of bit 1 of the frame buffer change mode register (FBCR: 100002H).
VDP1 User's Manual 57
V-Blank Erase/Write Enable Bit (VBE): bit 3
Setting of bit 3 of the TV mode selection register (TVHR: 100000H).
TV Mode Selection Bits (TVM): bit 2~0
Setting of bits 2 through 0 of the TV mode selection register (TVHR: 100000H).
58
Chapter 5
Tables
Contents
5.1 Character Pattern Tables ................................................................. 60
5.2 Color Lookup Tables ........................................................................ 62
5.3 Gouraud Shading Table ................................................................... 64
5.4 Command Tables ............................................................................. 66
VDP1 User's Manual 59
5.1 Character Pattern Tables
A character pattern is data that becomes the basis for a sprite drawn by a texture
draw command.
Define character patterns continuously to VRAM as tables. The stored data are
referenced at the character address of the command table, and the data size is deter-
mined by the size of the character pattern and the color mode of the sprite.
Character Pattern Table Addresses
Define character pattern boundaries with a 20H (32)-byte boundary. However,
character patterns starting from address 00000H in VRAM cannot be defined. Char-
acter patterns are stored in a 20H-byte boundary, so that part of the 20H bytes not
filled becomes free space. The address of VRAM is 7FFFFH. Do not define character
patterns beyond address 80000H.
Table Size
Depending on the color mode, 1 pixel of the character pattern becomes 4-, 8- or 16-
bit data. The character size can be specified from 8 pixels to 504 pixels horizontally
in 8-pixel units and from 1 pixel to 255 pixels vertically in 1-pixel units.
For example, in order to represent a character pattern 8 horizontal pixels by 3 verti-
cal pixels, 0CH (12) bytes is required for 4 bits/pixel, 18H (24) bytes is required for 8
bits/pixel; and 30H (48) bytes is required for 16 bits/pixel. The table of a character
pattern requires 4H bytes when the character pattern is 8 horizontal pixels by 1
vertical pixel and 4 bits/pixel, and the maximum data of a character pattern is
3EC10H (257,040) bytes when the character pattern is 504 horizontal pixels by 255
vertical pixels and 16 bits/pixel.
Table 5.1 Size of Character Pattern Tables
Item Minimum Maximum
Character size 8 horizontal pixels x 504 horizontal pixels x
1 vertical pixel 255 vertical pixels
Color mode 4 bits/pixel 16 bits/pixel
Character pattern 4H bytes* 3EC10H (257,040) bytes
*Even a 4H-byte character requires 20H bytes in VRAM, so use caution.
60
Examples of Character Pattern Tables
The examples of character patterns in Figure 5.1 are shown with a character size of 8
horizontal pixels by 3 vertical pixels:
For 4 bits/pixel, 0CH (12) bytes is required.
pixel 0 1 2 3 4 5 6 7
+00H + 0 + 1 + 2 + 3 Value is relative address from
+04H + 4 + 5 + 6 + 7 character pattern address
+08H + 8 + 9 + A + B
For 8 bits/pixel, 18H (24) bytes is required.
pixel 0 1 2 3 4 5 6 7
+00H +0 +1 +2 +3 +4 +5 +6 +7
+08H +8 +9 +A +B +C +D +E +F
+10H +10 +11 +12 +13 +14 +15 +16 +17
For 16 bits/pixel, 30H (48) bytes is required.
pixel 0 1 2 3 4 5 6 7
+00H +0 +1 +2 +3 +4 +5 +6 +7 +8 +9 +A +B +C +D +E +F
+10H +10 +11 +12 +13 +14 +15 +16 +17 +18 +19 +1A +1B +1C +1D +1E +1F
+20H +20 +21 +22 +23 +24 +25 +26 +27 +28 +29 +2A +2B +2C +2D +2E +2F
Figure 5.1 Examples of Character Pattern Tables
VDP1 User's Manual 61
5.2 Color Lookup Tables
The color lookup table is used to specify the color of the pixels of the character
pattern in the lookup table mode. The color lookup table defines the respective color
codes of 16 colors in VRAM as 16-bit data. In the lookup table mode, character
patterns are defined in the character pattern table in 4 bits/pixel, and 1 color of the
16 colors defined as 4-bit data in the color lookup table is selected. The 16 bits of the
color code of the selected color are written to the frame buffer, as is as the color code
of the pixel.
The size of the color lookup table is 20H (32) bytes. The table should be written from
the boundary addresses of 20H-byte units in VRAM. However, 00000H cannot be
defined. VRAM occupies up to address 7FFFFH. Do not define color lookup tables
beyond address 80000H.
The data written to the color lookup table can be either color bank code or RGB
code. If RGB code, MSB = 0. If color bank code, MSB = 0 if RGB code is mixed, and
MSB can be either 0 or 1 if RGB is not mixed. Set MSB to match data processing by
the VDP2.
+00H 16-bit data (color code of 0H)
+02H 16-bit data (color code of 1H)
+04H 16-bit data (color code of 2H)
:
:
+1CH 16-bit data (color code of EH)
+1EH 16-bit data (color code of FH)
Figure 5.2 Color Lookup Table
Lookup Table Mode
The color mode is set to the lookup table mode by the sprite draw command. Ac-
cording to this specification, the character patterns stored in VRAM with 4 bits/pixel
are converted to color codes by referencing the specified color lookup table, and are
written to the frame buffer.
The storage address and size of the character pattern and the storage address in the
color lookup table are specified by the sprite draw command.
62
Character Patterns
In the lookup table mode a character pattern is 4 bits/pixel and is stored in VRAM.
Command Tables
The address of the color lookup table referenced by the sprite is specified in the color
lookup table address (top address + 06H) of the command table. The specified value
is address/8H. Since the color lookup table is stored in boundaries of 20H-byte
units, the lower two bits become 00B.
The relationship between the command table, color lookup table and character
pattern table is shown below.
Command Table
Lookup Table address
Character address
Character size
Frame buffer
Character Pattern Table 4-bit
data
Address
Color Lookup Table
Address
16-bit
data
Figure 5.3 Relationship between Tables in Lookup Table System
VDP1 User's Manual 63
5.3 Gouraud Shading Table
This table specifies RGB data for four points when processing Gouraud shading for
parts. The data for each of the four points is 16 bit, so 8 bytes are required for one
table. The table is positioned where an 8H-byte boundary address begins, but do not
write from 00000H to 0001FH. VRAM occupies up to address 7FFFFH. Do not define
Gouraud shading tables beyond 80000H.
The table defines RGB data for vertices (A), (B), (C), and (D), in that order. In the case
of lines, only vertices (A) and (B) are valid and correspond to the start and end of the
line. In the case of sprites, vertices (A), (B), (C), and (D) correspond to the upper-left,
upper-right, lower-right, and lower-left. This table is referenced when Gouraud
shading processing is specified.
Table 5.2 Gouraud Shading Table
Table Corresponding Vertices
address Sprites, polygons, polylines Lines
Table top address Vertex (A) Line start point
Table top address + 2 Vertex (B) Line end point
Table top address + 4 Vertex (C) Ignored
Table top address + 6 Vertex (D) Ignored
MSB LSB
X B G R
4 3 2 1 0 4 3 2 1 0 4 3 2 1 0
Note: The MSB 1 bit is ignored.
Figure 5.4 RGB Code Format
Gouraud Shading
Gouraud shading can be performed on parts drawn in RGB code. Gouraud shading
specifies the amount of change in the luminance of each of R, G, and B, which are
changed in RGB code parts in a Gouraud shading table. It is only effective on RGB
color codes. The color cannot be guaranteed when Gouraud shading is specified for
color bank color codes.
Gouraud Shading Specification
Gouraud shading is specified with color calculation bits. The color calculation bits
are at bits 2~0 of the draw mode word at the top address + 04H of the command
table. When Gouraud shading is specified, the address of the Gouraud shading table
is specified. The top address/8H of the Gouraud shading table is positioned at the
top address + 1CH of the command table.
64
Gouraud Shading Processing
This specifies the data for the amount of change in R, G, and B for the four points
(two points in the case of lines) of the part in the Gouraud shading table. The data
interpolated for each of R, G, and B between the four points are added to the original
color of the part. Because each of the values of R, G, and B takes the values 00H to
1FH, the result of subtracting 10H from the complementary RGB data is added to the
original color of the part. For example, if the value of RGB is 10H, the original color
is left as is; if the value is 00H, the original color becomes –10H; and if the value is
1FH, then the original color becomes +0FH. If the value after color calculation be-
comes less than 00H, then 00H is used; if it is larger than 1FH, then 1FH is used.
The relationship between Gouraud shading table settings and correction values is
shown as follows.
Table 5.3 Relationship between Gouraud Shading Table Settings and Correction Values
Table setting Correction for original Table setting Correction for original
data data
00H –10H 10H 0
01H –0FH 11H +01H
02H –0EH 12H +02H
03H –0DH 13H +03H
04H –0CH 14H +04H
05H –0BH 15H +05H
06H –0AH 16H +06H
07H –09H 17H +07H
08H –08H 18H +08H
09H –07H 19H +09H
0AH –06H 1AH +0AH
0BH –05H 1BH +0BH
0CH –04H 1CH +0CH
0DH –03H 1DH +0DH
0EH –02H 1EH +0EH
0FH –01H 1FH +0FH
Real Gouraud shading changes only the luminance, but in this system it changes
each of R, G, and B, and therefore in some cases the hue also changes. To avoid
changing the hue, define the same value for each RGB for one point defined in the
Gouraud shading table. By this means, white Gouraud shading is applied.
Gouraud shading is performed on non-textured colors in the case of lines, polylines,
and polygons and on colors referenced by the character pattern data or the color
lookup table in the case of sprites.
VDP1 User's Manual 65
5.4 Command Tables
Command tables comprise 1EH (30) bytes. Because command tables are fetched
every 20H (32) bytes, they should be defined with 20H boundaries. The 2 bytes
following command tables are dummy bytes, and are skipped when the command
table is fetched.
Command tables stored in VRAM are fetched from the top address (00000H) every
frame. A command table must always be stored at address 00000H to 0001EH.
Drawing operation cannot be guaranteed when other than a command table (color
lookup table, Gouraud shading table, or character pattern table) is stored there.
VRAM occupies up to 7FFFFH. Do not define Gouraud shading tables beyond
address 80000H.
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDCTRL END JP ZP 0 0 Dir Comm
+00H
CMDLINK LINK specification/8H 0 0
+02H
CMDPMOD MON 0 0 HSS Pclp Clip Cmod Mesh ECD SPD Color mode Color calculation bit
+04H
CMDCOLR Color bank, color lookup table/8H (LSB is set to 00), non-textured color
+06H
CMDSRCA Character address/8H 0 0
+08H
CMDSIZE 0 0 Character size X/8 Character size Y
+0AH
CMDXA
+0CH
Code extension Point (A) X coordinate (XA) *
CMDYA Code extension Point (A) Y coordinate (YA)
+0EH
CMDXB Code extension Point (B) X coordinate (XB)
+10H
CMDYB Code extension Point (B) Y coordinate (YB)
+12H
CMDXC Code extension Point (C) X coordinate (XC)
+14H
CMDYC Code extension Point (C) Y coordinate (YC)
+16H
CMDXD Code extension Point (D) X coordinate (XD)
+18H
CMDYD Code extension Point (D) Y coordinate (YD)
+1AH
CMDGRDA Gouraud Shading Table/8H
+1CH
+1EH (Dummy) Skipped during table fetch
+20H Succeeding table
:
+40H Succeeding table
:
+60H :
:
* Note: The top bit of the vertex coordinate is a sign bit. A negative value is indicated by a
complement of 2. Extend the sign for the upper 6 bits.
Figure 5.5 Command Table
66
The order in which sprites and other parts are drawn is determined by how they are
placed in the VRAM of this command table.
Drawn parts processed first are the farthest from the view point, and parts processed
last are the closest to the view point.
VDP1 User's Manual 67
(Page 68 is blank in the original Japanese document.)
68
Chapter 6
Command Tables
Contents
6.1 CMDCTRL (Control Words) .............................................................70
Commands ......................................................................... 71
Jump Mode ......................................................................... 72
Zoom Point ......................................................................... 73
Character Read Direction .................................................. 77
6.2 CMDLINK (Link Specification) ........................................................ 78
6.3 CMDPMOD (Draw Mode Word) ...................................................... 79
High Speed Shrink .............................................................. 81
Pre-Clipping Disable .......................................................... 83
User Clipping Enable ......................................................... 84
User Clipping Mode ............................................................ 84
Mesh Enable ....................................................................... 85
End Code Disable ...............................................................86
Transparent Pixel Disable .................................................. 88
Color Mode ......................................................................... 89
Color Calculation................................................................. 93
MSB ON .............................................................................. 97
6.4 CMDCOLR (Color Control Word) .................................................... 98
Color Bank .......................................................................... 99
Color Lookup Table .......................................................... 101
Non-textured Color............................................................ 102
6.5 CMDSRCA (Character Address) ................................................... 103
6.6 CMDSIZE (Character Size)............................................................ 104
6.7 CMDXA~CMDYD (Vertex Coordinate Data) ................................. 105
6.8 CMDGRDA (Gouraud Shading Table) .......................................... 106
Note: Refer to “5.4 Command Tables” for more information on command tables.
VDP1 User's Manual 69
6.1 CMDCTRL (Control Words)
CMDCTRL specifies commands and also controls command tables and specifies the
inversion and zoom point of sprites. CMDCTRL is 16 bits at the top address + 00H
of the command table, and its bit configuration is as follows. Set unused bits to “0.”
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDCTRL
+00H END JP ZP 0 0 Dir Comm
End Bit (END): bit 15
Indicates the draw terminate command. If there is no draw terminate command, the
command selection bit becomes valid.
Jump Select (JP): bits 14~12
Indicates the method by which the next command table to be read (fetched) is speci-
fied.
Zoom Point (ZP): bits 11~8
Indicates the zoom point in the case of a scaled sprite draw command. The zoom
point specifies the reference point for inversion and enlargement or reduction.
Character Read Direction (Dir): bits 5, 4
Indicates the read direction from the character pattern table in the case of a texture
draw command.
Command Select (Comm): bits 3~0
Indicates the function of the command. When the end bit is a terminate command,
command select is disabled.
70
Commands
Commands are determined by the end bit (END, bit 15) of CMDCTRL and the
command selection bit (Comm, bits 3~0). The commands set by the end bit and the
command selection bit are shown in Table 6.1. The content of the command table in
VRAM is determined by the command.
Table 6.1 Commands
END Comm
Bit 15 3 2 1 0 Function Commands
0 0 0 0 0 Textured draw Normal sprite draw command
0 1 command Scaled sprite draw command
1 0 Draw Distorted sprite draw command
1 0 0 commands Non-textured Polygon draw command
0 1 draw command Polyline draw command
1 0 Line draw command
1 0 0 0 Set command for user clipping
Register set Clipping coodinate coordinates
1 commands set commands Set command for system clipping
coordinates
1 0 Local coordinate set command
1 0 0 0 0 Draw end command
All other codes Setting prohibited (do not use)
VDP1 User's Manual 71
Jump Mode
The jump mode specifies the command table to be processed next and how to jump
to the table. When the jump mode specifies the address and jumps to it, the address
of the command table (prior to jumping) is set to a CMDLINK (top address + 02H of
command table, 16 bits).
Jump Mode (JP): top address + 00H of command table, bits 14~12
Specifies the jump mode for jumping to the next command table to be processed.
When the jump mode is skipped (bit 14 = 1), reading of the command table is termi-
nated there and the table is not processed. There is 1 level of nesting by a jump call.
Do not use jump calls in subroutines.
JP
Bit 14 13 12 Jump mode Processing
0 0 0 Jump next Automatically jumps to next table (address +20 H) a fter this
table is processed (CMDLINK is ignored).
0 0 1 Jump assign Jumps to CMDLINK table after this table is processed.
0 1 0 Jump call CMDLINK table receives subroutine call after this table is
processed.
0 1 1 Jump return Returns to main routine after this table is processed
(CMDLINK is ignored).
1 0 0 Skip next Jumps to next table (address +20H ) a fter this table is
processed (CMDLINK is ignored).
1 0 1 Skip assign Jumps to CMDLINK table without processing this table.
1 1 0 Skip call CMDLINK table receives subroutine call without processing
this table.
1 1 1 Skip return Returns to main routine without processing this table
(CMDLINK is ignored).
When jump assign, jump call, skip assign, or skip call is specified, the address of the
table to be processed next is specified by CMDLINK.
When jump next, jump return, skip next, or skip return is specified, CMDLINK is
ignored.
72
Zoom Point
Zoom point specifies the zoom point of the character when a scaled sprite is drawn
enlarged or reduced. It functions only with scaled sprites.
Zoom Point (ZP): top address + 00H of command table, bits 11~8
Zoom point specifies the fixed point of the character when a scaled sprite is drawn
enlarged or reduced. The relationship between the value of the zoom point and the
fixed point is as follows. When the zoom point (ZP) is “0,” there is no zoom point,
and drawing is performed by specifying the upper-left coordinates and the lower-
right coordinates.
Fix the zoom point to 0H for sprites other than scaled sprites.
ZP
Bit 11 10 9 8 Code Zoom point
0 0 0 0 0H Specifies two coordinates
0 1 0 1 5H Upper-left
0 1 1 0 6H Upper-center
0 1 1 1 7H Upper-right
1 0 0 1 9H Center-left
1 0 1 0 AH Center-center
1 0 1 1 BH Center-right
1 1 0 1 DH Lower-left
1 1 1 0 EH Lower-center
1 1 1 1 FH Lower-right
Other than above Setting prohibited (do not set)
+1 +2 +3
+4
The result of adding the vertical
and horizontal values is the value
of the zoom point.
+8
+C
Center line
Figure 6.1 Zoom Point
VDP1 User's Manual 73
When a value other than “0” is specified for the zoom point (ZP), the drawing posi-
tion and drawing size of the sprite are determined by the zoom point (ZP), zoom
point coordinates, and display width. The zoom point of a character whose zoom
point is specified is drawn at the zoom point coordinates (CMDXA, CMDYA). The
drawing size is determined by the display width (CMDXB, CMDYB).
When reduced, pixels are pulled out, and therefore the specified zoom point may
disappear. Do not specify values other than those that have been established as the
zoom point. Drawing cannot be guaranteed when values other than those that have
been established are specified.
Because the character size in the X direction is a multiple of 8, the zoom point will
not be exactly in the center. When the length in the Y direction is an even value, the
zoom point will not be exactly in the center. When the length is an even number, the
coordinates for the left side, right side, top, and bottom are calculated from point (A)
and the display width, and therefore the position of the zoom point may shift.
The direction of drawing of the character is specified by the read direction of the
character. A negative value cannot be specified for the display width. Drawing
cannot be guaranteed when a negative value is specified for the display width.
Zoom Point Specification
When ZP is other than 0H, the zoom point coordinates are specified by CMDXA and
CMDYA and the display width is specified by CMDXB and CMDYB.
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDXA
+0CH Code extension Zoom point, X coordinate (XA)
CMDYA
+0EH Code extension Zoom point, Y coordinate (YA)
CMDXB
+10H Code extension Display, X width (XB)
CMDYB
+12H Code extension Display, Y width (YB)
Specification of Coordinates for Two Points
When ZP is 0H, coordinates for the upper-left and coordinates for the lower-right
can be specified. Vertex (A) is specified by CMDXA and CMDYA, and vertex (C) is
specified by CMDXC and CMDYC.
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDXA
+0CH Code extension Vertex (A), X coordinate (XA)
CMDYA
+0EH Code extension Vertex (A), Y coordinate (YA)
+10H :
+12H :
CMDXC
+14H Code extension Vertex (C), X coordinate (XC)
CMDYC
+16H Code extension Vertex (C), Y coordinate (YC)
74
Drawing Area
The zoom point coordinates are specified by CMDXA and CMDYA. The zoom point
specified by the Zoom Point (ZP) is drawn at the zoom point coordinates. The zoom
point becomes the reference point when zooming the character.
The display width is specified by CMDXB and CMDYB. The display width becomes
the size drawn.
The area in which the character is drawn is determined by the zoom point bit, zoom
point coordinates, and the display width. When the zoom point coordinate is (XA,
YA) and the display width is (XB, YB), the drawing area is as shown in Figure 6.2.
Left side is zoom point, left side =XA,
right side = XA + XB
Center is zoom point, left side = XA-XB/2,
right side = XA + (XB + 1)/2
Right side is zoom point, left side = XA-XB,
right side = XA
Top side is zoom point, top side = YA,
bottom side = YA + YB
Center if zoom point, top side = YA-YB/2,
bottom side = YA + (YB + 1)/2
Bottom side is zoom point, top side = YA-YB,
bottom side = YA
Values to the left of the decimal point are rounded off.
Figure 6.2 Drawing Area
VDP1 User's Manual 75
Zoom Point and Drawing Area
When the zoom point coordinates are (100, 50) and the display widths are (40, 30),
the coordinates for each of the vertices are as follows. A sprite for which vertical or
horizontal inversion is not specified is assumed. In this case, vertex (A) is (100, 50)
and vertex (C) is (140, 80) when the zoom point (ZP) is 0H.
Figure 6.3 Zoom Point and Drawing Area
76
Character Read Direction
The read direction of the character can be specified. This specification makes it
possible to invert the character vertically and horizontally.
Character Read Direction (Dir) Bits: Command table start address + 00H, bits 5, 4
These bits specify the read direction of the character pattern. Vertical inversion,
horizontal inversion, or simultaneous vertical and horizontal inversion can be speci-
fied.
When bit 5 is “0,” the vertical (Y) direction is drawn as is, without inversion. When
bit 5 is “1,” the character pattern is inverted vertically.
When bit 4 is “0,” the horizontal (X) axis is drawn as is, without inversion. When bit
4 is “1”, then the character pattern is inverted horizontally.
When bits 4 and 5 are both “0”, then the character pattern is drawn as is with no
inversion. When bits 4 and 5 are both “1”, then the character pattern is inverted both
vertically and horizontally. Fix the character read direction to 00B for characters
other than sprites.
Dir
Y X Inversion processing
0 0 Not inverted
0 1 Inverted horizontally
1 0 Inverted vertically
1 1 Inverted vertically and horizontally
A B Draw
A B
Original graphic Dir = 00B Dir = 01B
Not inverted Inverted horizontally
Dir = 10B Dir = 11B
Inverted vertically
.... Inverted vertically &
horizontally
Figure 6.4 Character Read Direction
VDP1 User's Manual 77
6.2 CMDLINK (Link Specification)
CMDLINK specifies the address of the command table to be processed next when
assign or call is specified in the jump mode. The specification is made with the 16
bits at the top address + 02H of the command table.
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDLINK 0 0
+02H Link specification/8H
CMDLINK: Top Address + 02H of Command Table
When the command table being processed is completed, processing moves to the
command table at the address of CMDLINK if the jump mode is set to assign, and if
it is set to call, the command table at the CMDLINK address is called in a subroutine
and processing moves to the next command table to be processed.
A value resulting from dividing the address in VRAM by 8H is specified with 16 bits
as the address. Because command tables are stored in boundaries of 20H (32)-byte
units, the lower 2 bits of CMDLINK become 00H.
When the jump mode specifies the next table or specifies return to the main routine,
this CMDLINK is ignored.
78
6.3 CMDPMOD (Draw Mode Word)
CMDPMOD enables or disables clipping, specifies mesh processing and the trans-
parent code, specifies the color mode, and controls color calculation and shade
processing. It occupies the 2 bytes from the top address + 04H of the command table,
and its bit configuration is as follows. Set unused bits to “0.”
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDPMOD
+04H MON 0 0 HSS Pclp Clip Cmod Mesh ECD SPD Color mode Color calculation bits
High Speed Shrink (HSS): bit 12
Specifies whether speed or precision is given priority when scaled or distorted
sprites are reduced and drawn.
Pre-clipping Disable (Pclp): bit 11
Specifies whether coordinate calculation, which judges whether clipping is required
or not, is disabled or not.
Clipping Mode Bit (Clip): bit 10
Specifies whether or not the part is drawn according to the user clipping coordinates
already set in the case of a part draw command.
User Clipping Enable Bit (Cmod): bit 9
Specifies whether clipping is performed inside or outside the user clipping coordi-
nates when user clipping is enabled (Clip = 1).
Mesh Enable Bit (Mesh): bit 8
Specifies whether or not mesh processing is performed in the case of a part draw
command.
End Code Disable (ECD): bit 7
Specifies whether or not the end code of the character pattern is disabled.
Transparent Pixel Disable (SPD): bit 6
Specifies whether or not the transparent pixel of the character pattern is disabled.
Color Mode Bits: bits 5~3
Specifies the number of colors in which the sprite is drawn and how they are ex-
pressed.
VDP1 User's Manual 79
Color Calculation Bits: bits 2~0
Specifies color calculation of Gouraud shading, shadow, half-luminance, and half-
transparent.
MSB On Bit (MON): bit 15
Looks at the MSB of the sprite data in the VDP2 and performs shadow or window
processing. This bit is assigned when this function is used. Refer to the VDP2
manual for more information.
80
High Speed Shrink
High Speed Shrink (HSS): bit 12
Specifies whether speed or precision is given priority when scaled or distorted
sprites are reduced and drawn.
This bit is only valid for drawing commands for scaled sprites and distorted sprites.
Set it to “0” for other drawing commands.
When this bit is set to “1”, only the pixels at even or odd coordinates of the original
picture data are sampled for lines to be reduced when drawn. The selection of even
coordinates or odd coordinates is performed by the even/odd coordinate selection
(EOS) bit of the frame buffer change mode register (FBCR).
When “1” is specified, the end code of the original picture is ignored regardless of
whether the sprite is being enlarged or reduced.
When “0” is specified, the original picture data is sampled at any magnification ratio
irrespective of even or odd coordinates.
Specify “0” to give precedence to precision of drawing even though operation may
be slowed down, and specify “1” to give fast operation precedence over precision.
HSS Processing
0 High speed shrink disabled
1 High speed shrink enabled
VDP1 User's Manual 81
Original Picture Plotting
Drawing
•When HSS = 0
00 01 02 03 04 05 06 07 X3/8 Zooming 01 04 06
10 11 12 13 14 15 16 17 X4/8 11 13 15 17
20 21 22 23 24 25 26 27 X5/8 20 22 24 25 27
30 31 32 33 34 35 36 37 X6/8 30 32 33 34 36 37
40 41 42 43 44 45 46 47 X7/8 40 41 42 44 45 46 47
50 51 52 53 54 55 56 57 X1 50 51 52 53 54 55 56 57
60 61 62 63 64 65 66 67 X9/8 60 61 62 63 63 64 65 66 67
70 71 72 73 74 75 76 77 X10/8 70 71 72 72 73 74 75 75 76 77
•When HSS = 1, EOS = 0 Sampling only even X coordinates
00 01 02 03 04 05 06 07 00 02 04 06 00 04 06
10 11 12 13 14 15 16 17 10 12 14 16 10 12 14 16
20 21 22 23 24 25 26 27 20 22 24 26 20 22 22 24 26
30 31 32 33 34 35 36 37 30 32 34 36 30 32 32 34 34 36
40 41 42 43 44 45 46 47 40 42 44 46 40 40 42 42 44 44 46
50 51 52 53 54 55 56 57 50 51 52 53 54 55 56 57
60 61 62 63 64 65 66 67 60 61 62 63 63 64 65 66 67
70 71 72 73 74 75 76 77 70 71 72 72 73 74 75 75 76 77
•When HSS = 1, EOS = 1 Sampling only odd X coordinates
00 01 02 03 04 05 06 07 01 03 05 07 01 05 07
10 11 12 13 14 15 16 17 11 13 15 17 11 13 15 17
20 21 22 23 24 25 26 27 21 23 25 27 21 23 23 25 27
30 31 32 33 34 35 36 37 31 33 35 37 31 33 33 35 35 37
40 41 42 43 44 45 46 47 41 43 45 47 41 41 43 43 45 45 47
50 51 52 53 54 55 56 57 50 51 52 53 54 55 56 57
60 61 62 63 64 65 66 67 60 61 62 63 63 64 65 66 67
70 71 72 73 74 75 76 77 70 71 72 72 73 74 75 75 76 77
Figure 6.5 High Speed Shrink
82
Pre-Clipping Disable
Pre-Clipping Disable (Pclp): bit 11
Specifies whether pre-clipping is enabled or disabled. When “0” is specified, pre-
clipping is performed. When “1” is specified, pre-clipping is not performed. One
drawing command comprises a group of several lines, and the respective lines
comprise a number of dots. Each dot is drawn based on clipping area (drawing area)
information specified by the CPU.
For lines that are completely separated from the drawing area or if drawing of the
entire line is not necessary and can be detected in advance, drawing efficiency can be
raised by specifying the drawing not be started. Also, when one end of a line is
outside the drawing area, efficiency can be improved by starting drawing from
inside the drawing area (limited to vertical and horizontal lines).
VDP1 normally performs this detection, but in the case of small elements whose
points are in the (A)—(B) or (D)—(C) direction, the overhead required for that detec-
tion (up to five CPU clock cycles for one line) becomes conspicuous and can lower
the drawing efficiency.
In the case of large elements that extend greatly out of the drawing area, it is more
efficient to perform pre-clipping. This bit is only valid for drawing commands. Set it
to “0” for other commands.
Pclp Processing
0 Pre-clipping with horizontal inversion
1 No pre-clipping and no horizontal inversion
Figure 6.6 Pre-clipping
VDP1 User's Manual 83
User Clipping Enable
User Clipping Enable Bit (Clip): bit 10
This bit specifies whether or not the part is drawn according to the already set user
clipping coordinates when the command is a draw command for a part.
When the bit is “0,” the user clipping coordinates are ignored and the part is clipped
and drawn according to the system clipping coordinates. When the bit is “1,” the
part is clipped and drawn according to the user clipping coordinates and the specifi-
cation of the clipping mode bit (Cmod). Even when this bit is “1,” the part is clipped
according to the system clipping coordinates.
Both the user and system clipping coordinates become undefined after resetting.
Therefore, the clipping register set command must be used to set the system clipping
coordinates after resetting and to set the user clipping coordinates prior to the user
clipping specification.
User Clipping Mode
Clipping Mode Bit (Cmod): bit 9
Specifies whether drawing is performed inside or outside the user clipping coordi-
nates when user clipping is enabled (Clip = 1). When it is 0, drawing is performed
inside. When it is 1, drawing is performed outside.
When Cmod = 1, the user clipping rectangle (including the lines) already specified
becomes the drawing area. When Cmod = 0, the drawing area does not include the
lines of the rectangle.
Cmod = 0 Cmod = 1
(inside drawing mode) (outside drawing mode)
Frame buffer Frame buffer
Upper-right
coordinate of
user clipping
Drawing area
Lower-right coordinate
of user clipping
Figure 6.7 Drawing Area
Do not set this bit to “1” when user clipping is disabled (Clip = 0). Combinations of
the user clipping enable bit and the clipping mode bit have the following results.
Clip Cmod User clipping processing
0 0 User clipping disabled
0 1 Setting prohibited (do not set)
1 0 Inside drawing mode
1 1 Outside drawing mode
84
Mesh Enable
Mesh Enable Bit: bit 8
This bit specifies whether or not mesh processing is performed when the command
is a draw command for a part. When it is “0,” the part is drawn without mesh pro-
cessing. When it is “1,” the part is drawn with mesh processing.
Mesh Mesh enable
0 Draw without mesh processing
1 Draw with mesh processing
When mesh processing is specified (Mesh = 1), every other pixel of the part is drawn
to form a mesh. Only pixels for which (X coordinate value + Y coordinate value) is
even (XLSB XOR YLSB = 0) are drawn, and odd pixels are skipped and not drawn.
When the starting point of a 45° diagonal line is an odd coordinate, nothing is
drawn. Nothing is drawn in some cases when the point of a 45° polyline is an odd
coordinate.
0 1 2 3 4 5 6 7 8 9 AB C DE F
0
1 : not drawn
2
3 : drawn
4
5
6
7
8
9
A
B
C
D
E
F
Figure 6.8 Mesh Processing
0 1 2 34 5 67 8 9 ABC DEF
0
1 : not drawn
2
3 : drawn
4
5
6
7 This line is not drawn
8
9
A This polyline is not drawn
B
C
D
E
F
Figure 6.9 Mesh Processing of Lines and Polylines
VDP1 User's Manual 85
End Code Disable
End Code Disable (ECD): bit 7
This bit specifies whether or not the end code of the character pattern is disabled.
When it is “0,” the end code is enabled; when it is “1,” the end code is disabled.
The end code disable bit is only valid for drawing sprites with a character pattern.
Set this bit to “1” for polygons, polylines, and lines.
If a second end code is read in the horizontal direction during drawing of a character
pattern when end code is enabled (ECD = 0), drawing of that row is terminated there
and drawing moves to the head of the next row. End codes are not drawn and that
pixel becomes transparent. When the end code is disabled (ECD = 1), the end code is
processed in the same way as other color codes.
Drawing in the horizontal direction is terminated when an end code is read twice,
and an end code is only processed in the horizontal direction of the character pattern
and is not affected by the vertical direction. Processing is performed irrespective of
the transparent pixel disable bit (SPD).
When the end code is enabled (ECD = 0), it cannot be used for color display, and
therefore, the number of colors that can be used is reduced by one. Use caution.
Use end code disable (ECD = 1) in the case of sprites reduced in the horizontal
direction by HSS = 1.
HSS ECD End code processing
0 0 End code enabled: drawing in horizontal direction is disabled when second
end code is read and end code becomes transparent.
0 1 End code disabled: end code is not processed,
color of code is expressed.
1& 0 End code enabled: drawing in horizontal direction is disabled when second
enlarge end code is read and end code becomes transparent.
1& 0 End code disabled: end code is not processed,
reduce color of code is expressed.
1 1 End code disabled: end code is not processed,
color of code is expressed.
The relationship between the color mode and the end code is as follows. The number
of bits of the end code differs depending on the color mode.
Color mode End code
0 16 colors (color bank mode) FH ( 4 bits)
1 16 colors (lookup table mode) FH ( 4 bits)
2 64 colors (color bank mode) FFH ( 8 bits)
3 128 colors (color bank mode) FFH ( 8 bits)
4 256 colors (color bank mode) FFH ( 8 bits)
5 32,768 colors (RGB mode) 7FFFH (16 bits)
86
An example of end code processing is shown below.
Figure 6.10(a) End Code Processing (1 of 2)
Since drawing is not allowed toward the outside from the end code when read from
the left or right, place only a transparent pixel there. Therefore, when ECD = 0, SPD
must equal 0. Do not use the combination ECD = 0 and SPD=1.
The drawing direction may be inverted by pre-clipping. When using end codes in
the original picture, do so as shown below.
Place only transparent pixels toward
the outside of end codes.
Place one end code each at the right and left of pictures
E E
made up of non-transparent pixels
0 E E
1 E E Even if transparent pixels are included inside, only
2 E E
3 E E one end code each is placed to the far outside.
E E
4
5 Two end codes are placed at either end of
6 lines comprising all transparent pixels.
7
0 1 2 3 4 5 6 7 8 9 AB CDE F
Transparent pixel End codes are not placed in lines in which either
both ends or one end is not a transparent pixel.
E :End code
:Other pixels
Figure 6.10(b) End Code Processing (2 of 2)
VDP1 User's Manual 87
Transparent Pixel Disable
Transparent Pixel Disable (SPD): bit 6
This bit specifies whether or not the transparent pixel of the character pattern is
disabled. When it is “0,” the transparent pixel is enabled; when it is “1,” the trans-
parent pixel is disabled. The transparent pixel disable bit is only valid for drawing
sprites with a character pattern. Be sure to set this bit to “1” for polygons, polylines,
and lines.
When the transparent pixel is enabled (SPD = 0), transparent color codes in the
character pattern become transparent pixels and are not drawn. When the end code
is disabled (SPD = 1), the transparent color code is processed like other color codes.
When the transparent pixel is enabled (SPD = 0), the number of colors that can be
used decreases by one, so use caution. For example, only 14 colors can be displayed
when ECD = 0, SPD = 0, and color mode = 0.
SPD End code processing
0 Transparent pixel enable: transparent color codes are not
drawn; transparent color codes
become transparent.
1 Transparent pixel disable: transparent color code is not
processed, color of code is expressed.
The relationship between the color mode and the transparent color code is as fol-
lows. The number of bits of the transparent color code differs depending on the
color mode.
Color mode Transparent color code
0 16 colors (color bank mode) 0H ( 4 bits)
1 16 colors (lookup table mode) 0H ( 4 bits)
2 64 colors (color bank mode) 00H ( 8 bits)
3 128 colors (color bank mode) 00H ( 8 bits)
4 256 colors (color bank mode) 00H ( 8 bits)
5 32,768 colors (RGB mode) 0000H (16 bits)
88
Color Mode
Color Mode Bits: bits 5~3
These bits specify the method by which the number of colors to be drawn is ex-
pressed. It is only valid for sprites. Set the color mode to 000B for non-textures. The
possible color modes include the color bank mode, which specifies the color with a
palette code and a color bank; the lookup table mode, which uses a color lookup
table; and the RGB mode, which specifies the luminance directly. In the color bank
mode, the color can be selected from among 16, 64, 128, or 256 colors, depending on
the number of bits of the pixel data. In the lookup table mode, the color can be
selected from among 16 colors. And in the RGB mode, 32,768 colors can be drawn.
The color mode bits are described in the following table.
Color mode Description Bits per
Mode Number of Mode pixel
Bit 5 4 3 colors
0 0 0 0 16 Color bank mode 4 bits
0 0 1 1 16 Lookup table mode 4 bits
0 1 0 2 64 Color bank mode 8 bits
0 1 1 3 128 Color bank mode 8 bits
1 0 0 4 256 Color bank mode 8 bits
1 0 1 5 32,768 RGB mode 16 bits
Other than above Setting prohibited (do not set)
VDP1 User's Manual 89
Character Patterns in Each Mode
Character patterns are stored in VRAM in each mode. An example is shown that is 8
horizontal pixels and 1 vertical pixel.
Mode 0
This is the 16-color color bank mode. Color is expressed using palette codes and a
color bank. One pixel is represented by 4 bits. 16 colors can be drawn. 4 bytes are
necessary to express 8 pixels. The data for 2 pixels are contained in 1 byte, and when
there is no horizontal inversion, the upper 4 bits represent the left pixel and the
lower 4 bits represent the right pixel.
The palette code is represented by 4 bits, and the upper 12 bits are the color bank
added from the color bank word (top address + 06H of command table), resulting in
16-bit data being written to the frame buffer. When there are 8 bits/pixel (frame
buffer rotation or high resolution), the lower 8 bits of the 16 bits are written to the
frame buffer. The upper 8 bits are ignored. Because the draw pixel data is color bank
code, color calculation cannot be performed.
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00H Pixel 0 1 2 3
+02H 4 5 6 7
Mode 1
This mode is the lookup table mode which uses a color lookup table. One pixel is
represented by 4 bits. 16 colors can be drawn. The character data is the same as in
mode 0. The data for 1 color of the 16-bit 16 colors stored in the color lookup table is
selected with 4 bits and written to the frame buffer. When there are 8 bits/pixel
(frame buffer rotation or high resolution), the lower 8 bits of the 16 bits are written to
the frame buffer.
The address of the color lookup table is written to the lookup table address (top
address + 06H of command table; also used as color bank word). Either color bank
code or RGB code can be specified as the color code of the lookup table. However,
RGB code is prohibited when there are 8 bits per pixel.
Original picture with 8 horizontal pixels
+00H → 0 1 2 3 4 5 6 7 ← +02H
+04H → 8 9 A B C D E F ← +06H
Figure 6.11 Example of Drawing in Modes 0 and 1
90
Mode 2, Mode 3, Mode 4
Mode 2, mode 3, and mode 4 are respectively 64-color, 128-color, and 256-color
palette bank modes. Colors are represented by palette code and a color bank.
One pixel is represented by 8 bits. In the respective modes, 64 colors, 128 colors, and
256 colors can be drawn. 8 bytes are required to represent 8 pixels.
The palette code is represented by bits 6, 7, and 8, and upper bits 10, 9, and 8 are the
color bank added from the color bank word (top address + 06H of command table),
resulting in 16-bit data being written to the frame buffer. In mode 2 and mode 3, the
respective upper 2 bits and upper 1 bit are ignored. When there are 8 bits/pixel
(frame buffer rotation or high resolution), the lower 8 bits of the 16 bits are written to
the frame buffer. Because the draw pixel data is color bank code, color calculation
cannot be performed.
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00H Pixel 0 1
+02H 2 3
+04H 4 5
+06H 6 7
Original picture with 8 horizontal pixels
+00H → 0 1 2 3 4 5 6 7 ← +06H
+08H → 8 9 A B C D E F ← +0EH
Figure 6.12 Example of Drawing in Modes 2, 3, and 4
Mode 5
This is the 32,768-color RGB mode. The color is expressed by the respective lumi-
nances of red, green, and blue (RGB). One pixel is represented by 16 bits. It is pos-
sible to draw 32,768 colors. 16 bytes are required to express 8 pixels.
The RGB code is represented by a MSB (value 1), which indicates that the code is
RGB code, and the respective luminances of R, G, and B are represented by 5 bits
each. The respective luminances of R, G and B are represented by the values 00H to
1FH. The closer the value is to 00H, the darker the color; the closer it is to 1FH, the
brighter the color. When all of R, G, and B are 00H, the value is 8000H, which repre-
sents black; when all are 1FH, the value is FFFFH, which represents white.
RGB codes are written in their original 16-bit form to the frame buffer. When there
are 8 bits/pixel (frame buffer rotation or high resolution), this mode cannot be used.
Color calculation can be performed on RGB code.
VDP1 User's Manual 91
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00H Pixel 0 (upper byte) Pixel 0 (lower byte)
+02H 1 (upper byte) 1 (lower byte)
+04H 2 (upper byte) 2 (lower byte)
+06H 3 (upper byte) 3 (lower byte)
+08H 4 (upper byte) 4 (lower byte)
+0AH 5 (upper byte) 5 (lower byte)
+0C H 6 (upper byte) 6 (lower byte)
+0EH 7 (upper byte) 7 (lower byte)
MSB LSB
1 B G R
4 3 2 1 0 4 3 2 1 0 4 3 2 1 0
Note: The MSB is 1.
Figure 6.13 RGB Code Format
Table 6.2 Pixel Data
Pixel data Draw data
0000H Transparent color code
0001H Setting prohibited
: (Do not set in RGB mode)
7FFEH (Palette bank code)
7FFFH End code
8000H
: RGB code
FFFFH
Original picture with 8 horizontal pixels
+00H → 0 1 2 3 4 5 6 7 ← +0EH
+10H → 8 9 A B C D E F ← +1EH
Figure 6.14 Example of Drawing in Mode 5
92
Color Calculation
Color Calculation Bits: bits 2~0
These bits specify Gouraud shading, shadow, half-luminance, and half-transparency.
The functions of each of the bits are as follows.
Bit Function
2 Gouraud shading enable bit
1 1/2 original graphic enable bit
0 1/2 background enable bit
Color calculation is performed on sprites or non-textured pixel data to be drawn and
on pixel data already drawn in the frame buffer.
Except for color calculation of replace and shadow, color calculation can only be
performed when the color code of the original picture is RGB code. Color calculation
can be executed when the color code is color bank code, but the results are not guar-
anteed.
In the case of sprites, color calculation can be performed when the color mode is
mode 1 (lookup table mode) and the color code of the color lookup table is RGB
code, or when the color mode is mode 5 (RGB mode). Color calculation can be per-
formed for non-textured colors when the color code is RGB code.
In color calculation of parts with an original picture, the transparent code is valid
when SPD = 0 and the end code is valid when ECD = 0, and therefore color calcula-
tion cannot be performed on those pixels.
Color calculation for polygons, polylines, and lines is enabled only when the non-
textured color is RGB code. Color calculation cannot be performed when there are 8
bits/pixel (high resolution or rotation 8).
VDP1 User's Manual 93
Color Calculation
Color calculation includes replace, shadow, half-luminance, half-transparent,
Gouraud shading, and the combination of half-luminance with Gouraud shading
and half-transparent with Gouraud shading. These are specified as follows.
Color
calculation Background Original Type of color Usable modes
(in Bit) MSB graphic Background calculation Original
2 1 0 graphic Background
0 0 0 — 1 0 Replace Not restricted Not restricted
0 0 1 0 0 1 Cannot rewrite Not Not restricted
1 01 1/2 Shadow restricted RGB
0 1 0 — 1/2 0 Half-luminance RGB Not restricted
0 1 1 0 1 0 Replace RGB Not restricted
1 1/2 1/2 Half-transparent RGB
1 0 0 — Gouraud 0 Gouraud shading RGB Not restricted
1 0 1 — — — Setting prohibited — —
(do not set)
1 1 0 Gouraud Gouraud shading + RGB Not restricted
— 1/2 0 half-luminance 2
0 Gouraud 0 Gouraud shading Not restricted
1 1 1 Gouraud Gouraud shading +
1 1/2 1/2 half- transparent 3 RGB RGB
Notes —: doesn’t matter
Original graphic: sprite or pixel data to be drawn in non-textured color.
Background: pixel data already drawn in the frame buffer.
1Original graphic (transparent pixels, end code) is referenced.
2Data that has undergone saturation processing after Gouraud calculation is reduced by
half.
3Background is added to data that has undergone saturation processing after Gouraud
calculation is reduced by half.
Replace (Color Calculation Mode = 0)
Color calculation is not performed for replace. Parts to be drawn are written, as is, to
the frame buffer. Pixel data already written to the frame buffer are not affected.
Color calculation cannot be performed when there are 8 bits/pixel, so replace should
be specified.
Shadow (Color Calculation Mode = 1)
Processing differs depending on the MSB of the pixel data already written to the
frame buffer. When the MSB of the frame buffer is “0,” processing of color calcula-
tion, including replace, is not performed and the frame buffer is left as is. When the
MSB of the frame buffer is “1,” shadow is performed.
In shadow, pixel data already written to the frame buffer is subjected to color calcu-
lation. The area in the frame buffer on which color calculation is to be performed is
sought from the character pattern and its draw coordinates in the case of sprites, and
from the draw coordinates in the case of non-textures. The luminance of pixel data
already written in the frame buffer in the area where the part is to be drawn becomes
one half for each of R, G, and B.
Shadow does not change the MSB of the background. Transparent areas remain
transparent.
94
Shadow halves the luminance of pixels in the frame buffer. To make the luminance
one fourth, set the same command table in VRAM twice. To make it one eighth, set
the same command table in VRAM three times.
In shadow, calculation is performed on the pixel data read from the coordinates to
which the pixel data of the original graphic is written. Drawing in this case slows
down, so use caution—It takes six times longer than when color calculation is not
performed.
Half-Luminance (Color Calculation Mode = 2)
Half-luminance halves the luminance of each of R, G, and B of the pixel data of the
part to be drawn. Pixel data already written to the frame buffer is not affected.
Half-Transparency (Color Calculation Mode = 3)
Processing differs depending on the MSB of the frame buffer. When the MSB is “0,”
replace is performed. When the MSB of the frame buffer is “1,” half-transparency
results. In half-transparency, one half (average) the sum of the data of the original
graphic and the background is written to the frame buffer.
Color calculation of half-transparency is performed on the pixel data of the original
graphic and the pixel data read from the write coordinates. Drawing in this case
slows down, so use caution—it takes six times longer than when color calculation is
not performed.
Gouraud Shading (Color Calculation Mode = 4)
Processes Gouraud shading using the RGB code set in the Gouraud shading table.
Pixel data already written to the frame buffer is not affected. The Gouraud shading
table address is specified by CMDGRDA (top address + 1CH of command table).
Gouraud Shading + Half-luminance (Color Calculation Mode = 6)
Gouraud shading + half-luminance is processing that combines half-luminance with
Gouraud shading. The part undergoes half-luminance processing after receiving
Gouraud shading processing.
Gouraud Shading + Half-Transparency (Color Calculation Mode = 7)
Processing differs depending on the MSB of the frame buffer. When the MSB of the
frame buffer is “0,” Gouraud shading is performed. When the MSB of the frame
buffer is “1,” Gouraud shading + half-transparency is performed.
VDP1 User's Manual 95
Original Graphic
In parts (sprites) with an original graphic, color calculation other than shadow is
enabled only in the RGB mode (lookup table is RGB code in color mode 1 and color
mode 5). If not in the RGB mode (characters in color bank mode), the results cannot
be guaranteed.
In color calculation of parts with an original graphic, the transparent code is enabled
when SPD = 0 and the end code is enabled when ECD = 0; therefore color calcula-
tion of that pixel cannot be performed.
When color calculation other than shadow is performed in the RGB mode (color
mode 5) and when SPD = 1, the result for pixels with transparent color code (0000H)
of the original graphic cannot be guaranteed. They are treated as black in color
calculation.
When color calculation other than shadow is performed in the RGB mode (color
mode 5) and when ECD = 1, the result for pixels with end code (7FFFH) of the origi-
nal graphic cannot be guaranteed. They are treated as white in color calculation.
In color calculation other than shadow on polygons, polylines, and lines, non-tex-
tured color is enabled only for RGB code.
Original graphic Background
MSB = 0 (Palettes, etc.)
MSB = 1 (RGB, etc.)
Color Calculation mode= 0 Color Calculation mode= 1
Replace Shadow
Color Calculation mode= 2 Color Calculation mode= 3
Half- Replace
Luminance Half-
Luminance
Color Calculation mode= 4 Color Calculation mode= 5
Setting
Gouraud
Prohibited
Color Calculation= 6 Color Calculation mode= 7
Gouraud+Half- Gouraud
Luminance Gouraud+Half-
Transparent
Figure 6.15 Examples of Color Calculation
96
MSB ON
MSB ON Bit (MON): bit 15
MON Processing
0 MSB of pixel data in frame buffer is not changed
1 Sets MSB of pixel data in frame buffer to 1
When a mode is set in which the VDP2 uses shadow (drops luminance of pixel data
in scroll screen) or window (displays a different screen in the specified area),
shadow and window processing are performed when the most significant bit (MSB)
is “1.”
Set the MSB to “1” (ON) for the pixels already written to the frame buffer. The color
code is valid only when the frame buffer is color bank code (this is because the MSB
is used for shadow enable and window enable in the VDP2, eliminating an RGB
recognition bit), thus making it impossible to perform color calculation. Specify
replace for color calculation.
In the case of textured parts, this can be used only when the original graphic data
has or does not have pixels (no pixels for transparent and end codes and pixels for
everything else), and therefore RGB code or color bank code can be used as the color
code. In the case of non-textured parts, the non-textured color is not reflected in the
drawing.
Do not specify color calculation (specify replace instead) when the MSB is set to “1.”
When the MSB is set to “1,” color calculation has no meaning and processing takes a
long time, so use caution.
For parts that undergo mesh processing, the MSB is set to ON in the mesh condition.
An example of MSB ON is shown below.
When MSB is ON in distorted sprite
Original graphic
The MSB of the data in the
frame buffer in this area
becomes "1". Since it
becomes "1" whether or not it
is already drawn, the address
becomes 0000H →8000H, so
Transparent use caution.
Figure 6.16 MSB ON
VDP1 User's Manual 97
6.4 CMDCOLR (Color Control Word)
CMDCOLR specifies the color of the part. The function differs depending on the
part and the color mode. It specifies the color bank, the color lookup table address,
or non-textured colors. CMDCOLR is at the top address + 06H of the command table
and is 16 bits.
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDCOLR
+06H Color bank, color lookup table/8H (LSB fixed at 00), non-textured colors
CMDCOLR: top address + 06H of command table
When a textured part is in the color bank mode, color bank is specified; when it is a
textured part in the lookup table mode, the lookup table address is specified, and
when it is a non-textured part, a non-textured color is specified. When it is a textured
part in the RGB mode, this word is ignored.
Table 6.3 CMDCOLR
Part Color mode CMDCOLR
Color bank mode Color bank
Textured part Lookup table mode Lookup table address
RGB mode Ignored
Non-textured part Non-textured color
98
Color Bank
• Color banks are bits added to the upper bit when the pixel data of the character
pattern are written to the frame buffer when the color mode of a textured part is
the color bank mode.
• Color bank is specified using 16 bits, but the lower 4 bits must be fixed at “0.”
Depending on the color mode, 12, 10, 9 or 8 bits are added. Figure 6.17 shows the
addition of bits.
• When there are 16 bits/pixel, the data is written to the frame buffer as is. When
there are 8 bits/pixel, the lower 8 bits are written.
Color bank Fix lower
Fix lower44bits
bitsofof
Color Bank 0 0 0 0
color banktoto
colorbank "0"."0".
16-color mode Color Bank Upper 12 bits
64-color mode Color Bank Upper 10 bits Bit dataofofcharacter
Bit data character
pattern for which
pattern for which the
the
128-color mode Color Bank Upper 9 bits lower bits are defined
lower bits are defined
is writtentotothe
is written the
256-color mode Color Bank Upper 8 bits frame buffer.
When 16 bits/pixel
When 8 bits/pixel Written
Writtentotoframe
framebuffer.
buffer
RGB mode: Data of defined character patterns is written to frame buffer.
Lookup table mode: Data of lookup table referenced from defined character
patterns is written to frame buffer.
Figure 6.17 Color Bank
VDP1 User's Manual 99
• The data written to the frame buffer are transferred to the VDP2 as is (16-bit data)
when the data written to the frame buffer become the display buffer in the next
frame.
• Table 6.4 shows the relationship between the color bank, defined character pat-
tern data, and draw frame buffer data.
Table 6.4 Example of Relationship of Defined Data and Draw Data to Color Bank
Note: The shaded areas represent color bank code.
100
Color Lookup Table
• Defines the address of the color lookup table.
• When the color mode is the lookup table mode, the 4-bit data of the character
pattern of textured parts is converted to 16-bit pixel data by referencing the color
lookup table, and is written to the frame buffer.
• The color lookup table defines 16-bit color codes for 16 colors. The 16-bit data in
the table is written as is to the frame buffer, and therefore there is no distinction
between palette bank code and RGB code in the character pattern of textured
parts. When read to the VDP2, the code is handled as color bank code when the
MSB of the 16 bits is “0,” and as RGB code when it is “1.”
• The color lookup table address defines the address/8H of the color lookup table.
Because the color lookup table is defined with 20H-byte boundaries, the two
LSBs of the lookup table address are fixed at “00.”
16-color color lookup table
Character pattern specified by table address Frame buffer
+00H 16-bit data (0Hcolor code)
+02H 16-bit data (1Hcolor code)
+04H 16-bit data (2Hcolor code)
Defined 4-bit data : : : Drawn 16-bit data
: : :
+1CH 16-bit data (EHcolor code)
+1EH 16-bit data (FHcolor code)
The 16-bit data of the color lookup table selected with the 4 bits of the character pattern is written as
is to the frame buffer as pixel data.
Figure 6.18 Color Lookup Table
VDP1 User's Manual 101
Non-Textured Color
• Non-textured color defines the color of non-textured parts.
• In the case of a non-textured part, the non-textured color is written, as is, to the
frame buffer as pixel data.
• Non-textured colors are not related to transparent color codes and end codes.
• When the display mode is 8 bits/pixel, the lower 8 bits become valid. Only
palette bank codes can be specified at this time.
• When color calculation (except shadow) is performed on non-textured parts, be
sure to set RGB code for the non-textured color.
102
6.5 CMDSRCA (Character Address)
• CMDSRCA specifies the address that defines the character pattern.
• CMDSRCA is valid for texture draw commands. The address is specified with 16
bits at the top address + 08H of the command table. Set unused bits to “0.”
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDSRCA
+08H Character address/8H 0 0
• Specifies an address that defines the character pattern drawn by the texture draw
command.
• This is an address in VRAM of the character pattern to be drawn, and the value
resulting from dividing the address by 8H is specified with 16 bits.
• The character address specifies the top address at which the pixel data of the
defined character pattern is stored. The pixel data of the upper-left point of the
character pattern is at the top address. Even if the character is rotated or inverted
horizontally or vertically, the address of the upper-left point of the defined char-
acter pattern is specified.
• The content of the pixel data of the character pattern is 4, 8, or 16 bits/pixel,
depending on the color mode.
• The size of the table is specified by CMDSIZE (Character size).
• Because the character pattern table is defined with 20H-byte boundaries, the two
LSBs are fixed at “00B.”
VDP1 User's Manual 103
6.6 CMDSIZE (Character Size)
CMDSIZE specifies the size of the defined character pattern. CMDSIZE is valid for
texture draw commands. It is specified with 16 bits at the top address + 0AH of the
command table. Set unused bits to “0.”
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDSIZE
+0AH 0 0 Character size X/8 Character size Y
• The character size is defined in multiples of 8 horizontally (X) and in 1-pixel
units vertically.
• Horizontally, values from 1 to 63 can be specified with 5 bits. Because the size is
specified in 8-pixel units, sizes from 8 to 504 pixels can actually be specified. Do
not specify “0.”
• Vertically, values from 1 to 255 can be specified with 8 bits. Do not specify”0.”
Horizontal size: 8~504 pixels
Vertical size: 1~255 pixels
Figure 6.19 CMDSIZE
• Table 6.5 shows the relationships between the values defined in the command
table and the number of drawn pixels.
Table 6.5 Relationships between Settings and Drawn Pixels
Horizontal (X) direction Vertical (Y) direction
Setting in command Number of pixels Setting in command Number of pixels
table actually drawn table actually drawn
0 Setting prohibited 0 Setting prohibited
1 8 1 1
2 16 2 2
: : : :
63 504 255 255
104
6.7 CMDXA~CMDYD (Vertex Coordinate Data)
The coordinates of clipping areas, the point coordinates for drawing sprites and
other coordinates are specified by CMDXA~CMDYD. The coordinates for a maxi-
mum of four vertex (X coordinates, Y coordinates) can be specified. They are defined
in the 16 bytes (8 words) from the top address + 0CH to 1AH of the command table.
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDXA
+0CH Code extension Vertex (A), X coordinates (XA)
CMDYA
+0EH Code extension Vertex (A), Y coordinates (YA)
CMDXB
+10H Code extension Vertex (B), X coordinates (XA); or display, X width (XB)
CMDYB
+12H Code extension Vertex (B), Y coordinates (YA); or display, Y width (YB)
CMDXC
+14H Code extension Vertex (C), X coordinates (XC)
CMDYC
+16H Code extension Vertex (C), Y coordinates (YC)
CMDXD
+18H Code extension Vertex (D), X coordinates (XD)
CMDYD
+1AH Code extension Vertex (D), Y coordinates (YD)
Note: The top bit of the vertex coordinates is a sign bit. A negative value is indicated by
a complement of two. Extend the code with the upper 6 bits.
• Each of the coordinates is specified CMDXA~CMDYD with 16 bits. A negative
value is specified by a complement of 2. The range that can be specified is -1024
to 1023. The upper 5 bits are code-extension bits, and the same value as bit 10 is
written to them.
• The meaning of CMDXA~CMDYD differs depending on the command. Table 6.6
shows the correspondence between the commands and CMDXA~CMDYD. For
more information, refer to the section for each command in chapter 7.
Table 6.6 Correspondence between Commands and CMDXA~CMDYD
Command CMDXA CMDXB CMDXC CMDXD
CMDYA CMDYB CMDYC CMDYD
Normal sprite draw command Vertex (A) — — —
Specify coordinates
Scaled sprite draw for two points Vertex (A) — Vertex (C) —
command
(two methods) Specify fixed point Zoom point Display width — —
coordinates
Distorted sprite draw command Vertex (A) Vertex (B) Vertex (C) Vertex (D)
Polygon draw command Vertex (A) Vertex (B) Vertex(C) Vertex (D)
Polyline draw command Vertex (A) Vertex (B) Vertex (C) Vertex (D)
Line draw command Vertex (A) Vertex(B) — —
User clipping coordinate set command Upper-left — Lower-right —
coordinates coordinates
System clipping coordinate set — — Lower-right —
command coordinates
Local coordinate set command Local coordinates — — —
Note: "—" indicates unused.
VDP1 User's Manual 105
6.8 CMDGRDA (Gouraud Shading Table)
1. Specifies the address of the Gouraud shading table.
2. The Gouraud shading table address is valid when Gouraud shading processing is
specified for color calculation and is specified with 16 bits at the top address +
1CH of the command table.
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDGRDA
+1CH Gouraud shading table/8H
3. The address of the Gouraud shading table is divided by 8H and is specified with
16 bits.
4. The Gouraud shading table is a table for Gouraud shading processing, and it
defines the amount of change in the luminances of R, G, and B at four vertices
(two points for lines). The size of the table is 8H bytes (4 words), and the table is
defined with 8H-byte boundaries.
106
Chapter 7
Commands
Contents
7.1 System Clipping Coordinate Set Command ..................................110
System Clipping ................................................................ 111
7.2 User Clipping Coordinate Set Command ....................................... 112
User Clipping .................................................................... 113
7.3 Local Coordinate Set Command .................................................... 116
Local Coordinates ............................................................. 117
7.4 Normal Sprite Draw Command ...................................................... 118
7.5 Scaled Sprite Draw Command...................................................... 120
Specification of Two Coordinate Points ............................ 120
Specification of Zoom Point ............................................. 122
7.6 Distorted Sprite Draw Command .................................................. 124
7.7 Polygon Draw Command ............................................................... 126
7.8 Polyline Draw Command ............................................................... 128
7.9 Line Draw Command ..................................................................... 130
7.10 Draw End Command ..................................................................... 132
VDP1 User's Manual 107
Page 108 was blank in the original document.
108
Commands are determined by the end bit and the command selection bits. Table 7.1
lists the commands.
Table 7.1 Commands
END Comm Function Command
Bit 15 3 2 1 0
0 1 0 0 0 Coordinate Clipping User clipping coordinate set
set coordinate command
1 commands set commands System clipping coordinate set
command
1 0 Local coordinate set command
0 0 0 0 Texture Normal sprite draw command
0 1 draw Scaled sprite draw command
1 0 commands Distorted sprite draw command
Draw
1 0 0 commands Non-texture Polygon draw command
0 1 draw Polyline draw command
1 0 commands Line draw command
1 0 0 0 0 Draw terminate command
VDP1 User's Manual 109
7.1 System Clipping Coordinate Set Command
Clipping is the removal of graphics outside the set display area so that they are not
drawn. Clipping includes system clipping, which sets the drawing area for the
system, and user clipping, which makes it possible to freely set the clipping area
using software.
When the command select bits (bits 3 to 0) are 1001B, the system clipping coordinate
set command is set; when they are 1000B, the user clipping coordinate set command
is set. The contents of the system clipping coordinate set command table are shown
in the following figure.
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDCTRL
+00H 0 JP 0 0 0 0 0 0 0 0 1 0 0 1
(0,0)
CMDLINK Link specification/8H 0 0
+02H
+04H TV
+06H
+08H Lower-right
+0AH Coordinate
+0CH
+0EH
+10H System clipping area
+12H
CMDXC
+14H 0 0 0 0 0 0 Lower-right X coordinate (XC) Upper-left coordinates are fixed at (0,0).
CMDYC
+16H 0 0 0 0 0 0 0 Lower-right Y coordinate (YC)
+18H
+1AH
+1CH
Note: is ignored.
The system clipping coordinate set command is defined as follows:
• When the end bit (bit 15) is set to 0B and the command select bits are set to 1001B,
the system clipping coordinate set command is enabled.
• The jump mode is specified. When the jump mode is assigned or called, the ad-
dress of the command table to be processed next is divided by 8H and is set in
CMDLINK.
• The lower-right coordinates of the clipping area are defined by CMDXC, CMDYC.
The upper-left coordinates are fixed at (0,0). The lines of the rectangle (quad-
rangle) represented by the upper-left coordinates (0,0) and the lower-right coordi-
nates (XC, YC) and inside the rectangle make up the drawing area.
110
System Clipping
System clipping coordinates are always valid when drawing, so that outside the set
area is clipped; that is, the area inside the coordinates is drawn. Clipping processing
is performed in a rectangle. The coordinates are specified by defining the values of
the lower-right coordinates (XC, YC) in the command table, since the upper-left
coordinates are fixed at (0,0).
Because the clipping coordinates are not checked, they should be set in advance so
that XC ≥ 0 and YC ≥ 0. Operation cannot be ensured if XC < 0 or YC < 0. Points on
the clipping line are treated as being inside the clipping area and are drawn. The
clipping coordinate set command rewrites the internal clipping coordinate register.
Parts subsequent to rewriting are drawn by referencing those values.
Because this command can be defined in any number in one frame, it is possible to
give part groups different clipping coordinates. The system clipping coordinates
become undefined after powering on or after resetting, and therefore they must be
set before drawing starts.
(a) System clipping setting
(0,0)
System clipping area
Inside the area is displayed
(lower-right
coordinate (C))
TV
(b) Incorrect system clipping setting
(lower-right System clipping area
coordinate (C))
Operation cannot be ensured
when XC < 0 or YC < 0
(0, 0)
TV
Figure 7.1 System Clipping
VDP1 User's Manual 111
7.2 User Clipping Coordinate Set Command
User clipping coordinates can be freely set using software. When the command
selection bits are 1000B, the user clipping coordinate set command is enabled. The
contents of the user clipping coordinate set command table are shown in the follow-
ing figure.
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDCTRL 0 JP 0 0 0 0 0 0 0 0 10 0 0
+00H
Upper-left
CMDLINK +02H Link specification/8H 0 0 coordinate
TV
+04H
+06H
Lower-right
+08H coordinate System
+0AH clipping area
0 0 0 0 0 0 Upper-left X coordinate (XA)
CMDXA +0CH
0 0 0 0 0 0 0 Upper-left Y coordinate (YA) User clipping area
CMDYA +0EH
+10H
+12H
0 0 0 0 0 0 Lower-right X coordinate (XC)
CMDXC +14H
CMDYC +16H 0 0 0 0 0 0 0
Lower-right Y coordinate (YC)
+18H
+1AH
+1CH
Note: is ignored.
The user clipping coordinate set command is defined as follows:
• When the end bit is set to 0B and the command selection bits are set to 1000B, the
user clipping coordinate set command is enabled.
• The jump mode is then specified. When the jump mode is assign or call, the
address of the command table to be processed next is divided by 8H and set in
CMDLINK.
• The upper-left coordinates of the clipping area are defined as vertex (A)
(CMDXA, CMDYA), and the lower-right coordinates are defined as vertex (C)
(CMDXC, CMDYC). The rectangle (quadrangle) represented by the upper-left
coordinates (XA, YA) and the lower-right coordinates (XC, YC) is the clipping
area. User clipping is enabled, and whether the inside or the outside of the area is
clipped is determined by the draw mode of the draw command for the part.
112
User Clipping
User clipping can be selected using software, and it is possible to specify whether or
not user clipping is enabled for each part and whether the outside of the set area or
the inside of the set area is clipped.
User clipping coordinates can be enabled or disabled using the user clipping enable
bit (Clip bit, bit 10 at top address + 04H of command table). When this bit is dis-
abled, the user clipping coordinates become disabled, and parts are only clipped by
the system clipping coordinates. When the user clipping coordinates are enabled,
parts are clipped by both the system clipping coordinates and the user clipping
coordinates.
When user clipping is enabled, user clipping can be set to the inside drawing mode
or the outside drawing mode with the clipping mode bit (Cmod bit, bit 9 at top
address + 04H of command table). When set to the inside drawing mode, only those
parts inside the area set by the user clipping coordinates are drawn; when set to the
outside drawing mode, the area outside the coordinates is drawn. System clipping
is performed regardless of user clipping.
The clipping coordinates form a rectangle. The coordinates are the upper-left coordi-
nates (XA, YA) and the lower-right coordinates (XC, YC), and they are specified by
defining the values of the coordinates of these two points in the command table.
Because the clipping coordinates are not checked, they must be set in advance so
that XA ≤ XC and YA ≤ YC. Operation cannot be guaranteed if XC < XA or YC < YA.
Set the user clipping coordinates inside the set area (including on-line) of the system
clipping coordinates. Operation cannot be guaranteed when the user clipping coor-
dinates are set beyond the set area of the system clipping coordinates.
Points on the clipping line are treated as being inside the clipping area. They are
drawn in the inside drawing mode and not drawn in the outside drawing mode.
Two or more user clipping commands can be set in the same frame. The clipping
coordinate set commands rewrite the internal clipping coordinate registers. Parts
subsequent to rewriting are drawn by referring to these values.
Because the user clipping coordinates become undefined after powering on or after
resetting, they must be set before drawing starts.
VDP1 User's Manual 113
(a) User clipping setting
(upper-left coordinate (A)) User clipping area
Set so that XA ≤ XC, YA ≤ YC.
(lower-right coordinate (C))
TV System clipping area
(b) Incorrect user clipping setting
(lower-right coordinate (C)) User clipping area
Operation cannot be ensured
if XC < XA or YC < YA.
(upper-left coordinate (A))
TV System clipping area
Figure 7.2 User Clipping Settings
114
(a) User clipping disabled
(upper-left coordinate (A)) User clipping area
Since user clipping is
disabled, the inside of the
(lower-right coordinate (C)) system clipping area is
drawn.
TV System clipping area
(b) Inside drawing mode
User clipping area
(A)
When user clipping is enabled
(C) and the inside drawing mode
is set, the inside of the user
clipping area is drawn.
TV System clipping area
(c) Outside drawing mode
(A) User clipping area
When user clipping is enabled
and the outside drawing mode
is set, the area inside the
(C)
system clipping area and
outside the user clipping area
is drawn.
TV System clipping area
(d) Setting prohibited
User clipping area
Be sure to set the user clipping
area inside the system clipping
area.
Operation cannot be ensured
when it is set outside the system
clipping area.
TV System clipping area
Figure 7.3 User Clipping
VDP1 User's Manual 115
7.3 Local Coordinate Set Command
The local coordinate set command makes the coordinates specified by the draw
command local coordinates, and then makes them drawing coordinates by adding
the value specified by the local coordinate command.
When the command selection bits are 1010B, the local coordinate set command is
enabled. The contents of the command table are as shown in the following figure.
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDCTRL
+00H 0 JP 0 0 0 0 0 0 0 0 1 0 1 0
CMDLINK +02H Link specification/8H 0 0 (0,0)
+04H
TV
+06H Local Coordinates (A)
+08H
+0AH
CMDXA Code extension Local X coordinate (XA)
+0CH
CMDYA Code extension Local Y coordinate (YA)
+0EH
System clipping area
+10H
+12H
+14H
+16H
+18H
+1AH
+1CH
Note: is ignored.
The local coordinate set command is defined as follows.
• When the end bit is set to 0B and the command selection bits are set to 1010B, the
local coordinate set command is enabled.
• The jump mode is then specified. When the jump mode is assigned or called, the
address of the command table to be processed next is divided by 8H and set in
CMDLINK.
• The local coordinates are defined in CMDXA, CMDYA.
116
Local Coordinates
Local coordinates are set in the local coordinate register. The values of the local
coordinates are added to the coordinates specified by the draw command, and they
become the drawing coordinates. Parts are drawn in the frame buffer using the
drawing coordinates as a reference.
When the local coordinates are (0,0), the part is drawn at the coordinates specified by
the draw command using the upper-left corner of the screen as (0,0). When (0,0) is
set approximately in the center of the screen, (160,112) are specified as the local
coordinates.
Because the local coordinates are retained in the register until they are set again, in
order to move the coordinates of several parts and draw them together, the local
coordinates are set before their respective draw commands.
Coordinate comparison in clipping is processed using the value resulting from
adding these local coordinates to the coordinates specified by drawing of the part.
Furthermore, because the local coordinates are not added to the clipping coordi-
nates, the clipping area does not move. Because the values in the local coordinate
register become undefined after powering on or after resetting, they must be set
before drawing starts.
VDP1 User's Manual 117
7.4 Normal Sprite Draw Command
The normal sprite draw command draws character patterns in the frame buffer.
When drawing, the character pattern can be inverted vertically or horizontally at the
specified coordinates and drawn.
When the end bit is 0B and the command selection bits are 0000B, the normal sprite
draw command is enabled. Normal sprites cannot be rotated 90°. To rotate 90°,
specify the distorted sprite draw command. The contents of the command table are
shown in the following figure.
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 JP 0 0 0 0 0 0 Dir 0 0 0 0 Normal sprite
CMDCTRL +00H
Link specification/8H
CMDLINK +02H Color
Vertex (A) Vertex (B)
MO 0 0 0 Pc CI Cm Me EC SP Color mode
CMDPMOD calculation
+04H
CMDCOLR Color bank, lookup table/8H (LSB fixed at 00)
+06H
CMDSRCA Character address/8H 0 0
+08H
CMDSIZE 0 0 Character size X/8 Character size Y Vertex (D) Vertex (C)
+0AH
CMDXA Code extension Vertex (A), X coordinate (XA)
+0CH
CMDYA Code extension Vertex (A), Y coordinate (YA)
+0EH
+10H Frame buffer
+12H
+14H
+16H
+18H
+1AH
CMDGRDA Gouraud shading table/8H
+1CH
Note: is ignored.
MO = MON, HS = HSS, Pc = Pclp, Cl = Clip, Cm = Cmod,
Me = Mesh, EC = CD and SP = SPD.
The normal sprite draw command is defined as follows:
• When the end bit is set to 0B and the command selection bits are set to 0000B, the
normal sprite draw command is enabled.
• The jump mode is then specified. When the jump mode is assigned or called, the
address of the command table to be processed next is divided by 8H and set in
CMDLINK.
• The read direction of the character pattern is set. The character pattern can be
drawn with vertical or horizontal inversion by the specification of the read direc-
tion.
• Set pre-clipping. Specify enable or disable in consideration of the clipping area
and the drawing position of the part.
118
• The user clipping enable bit and clipping mode are specified. Depending on the
clipping mode, either the outside or the inside of the user clipping area is speci-
fied.
• Mesh is enabled, end code is disabled, and transparent pixel is disabled. MSB
ON is set to perform shade processing in the VDP2.
• The color mode that defines the character pattern is set. Color bank is specified
when the color mode is the color bank mode. When the color mode is the lookup
table mode, the address of the color lookup table is defined by dividing by 8H.
• Color calculation is specified. Color calculation is enabled in the RGB mode.
When color calculation is not used, replace is specified. When Gouraud shading
is used, the address of the Gouraud shading table is specified by dividing by 8H.
Gouraud shading processing is enabled in the RGB mode.
• The address of the character pattern table is defined in CMDSRCA by dividing
by 8H. The horizontal and vertical lengths of the character size defined in the
character pattern table are defined in CMDSIZE. A value divisible by 8 is defined
for the horizontal size.
• The upper-left coordinates of the area to be drawn are defined in vertex (A)
(CMDXA, CMDYA).
VDP1 User's Manual 119
7.5 Scaled Sprite Draw Command
The scaled sprite draw command draws character patterns in the frame buffer.
Character patterns can be drawn at specified coordinates inverted vertically and/or
horizontally, enlarged or reduced, and stretched.
When the end bit is 0B and the command selection bits are 0001B, the scaled sprite
draw command is enabled. When the zoom point is 0000B, the character pattern is
defined by specifying the coordinates for two points. When the zoom point is other
than 0000B, the zoom point is defined.
The scaled sprite can not be rotated at 90°. When rotating 90°, specify using the
scaled draw command.
Specification of Two Coordinate Points (Scaled Sprite Draw Command)
The contents of the command table for specifying the coordinates of two points are
shown in the following figure.
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Scaled sprite
CMDCTRL +00H 0 JP 0 0 0 0 0 0 Dir 0 0 0 1
Link specification/8H
CMDLINK +02H Vertex (A) Vertex (B)
Color
MO 0 0 HS Pc Cl Cm Me EC SP Color mode calculation
CMDPMOD +04H
CMDCOLR +06H Color bank, lookup table/8H (LSB fixed at 00)
CMDSRCA +08H Character address/8H 0 0
CMDSIZE +0AH 0 0 Character size X/8 Character size Y Vertex (D) Vertex (C)
CMDXA +0CH Code extension Vertex (A), X coordinate (XA)
CMDYA +0EH Code extension Vertex (A), Y coordinate (YA)
+10H
Frame buffer
+12H
CMDXC +14H Code extension Vertex (C), X coordinate (XC)
CMDYC +16H Code extension Vertex (C), Y coordinate (YC)
+18H
+1AH
CMDGRDA +1CH Gouraud shading table/8H
Note: is ignored.
Specification of coordinates for two points by the scaled sprite draw command is
defined as follows:
• When the end bit is set to 0B and the command selection bits are set to 0001B, the
scaled sprite draw command is enabled.
• The jump mode is then specified. When the jump mode is assigned or called, the
address of the command table to be processed next is divided by 8H and set in
CMDLINK.
• The zoom point is set to 0000B. The coordinates for two points are specified.
120
• The read direction of the character pattern is set. The character pattern can be
drawn with vertical or horizontal inversion by the specification of the read direc-
tion. When inversion is specified twice by the read direction and by the specifica-
tion of vertex (A) (CMDXA, CMDYA) and vertex (C) (CMDXC, CMDYC), the
inversions cancel each other out and the direction returns to the original direc-
tion.
• Set high speed shrink. Specify priority to precision or to speed.
• Set pre-clipping. Specify enable or disable in consideration of the clipping area
and the drawing position of the part.
• The user clipping enable bit and clipping mode are specified. Depending on the
clipping mode, either the outside or the inside of the user clipping area is speci-
fied.
• Mesh is enabled, end code is disabled, and transparent pixel is disabled. MSB
ON is set to perform shade processing in the VDP2.
• The color mode that defines the character pattern is set. The color bank is speci-
fied when the color mode is the color bank mode. When the color mode is the
lookup table mode, the address of the color lookup table is defined by dividing
by 8H.
• Color calculation is specified. Color calculation is enabled in the RGB mode.
When color calculation is not used, replace is specified. When Gouraud shading
is used, the address of the Gouraud shading table is specified by dividing by 8H.
Gouraud shading processing is enabled in the RGB mode.
• The address of the character pattern table is defined in CMDSRCA by dividing
by 8H. The horizontal and vertical lengths of the character size defined in the
character pattern table are defined. A value divisible by 8 is defined for the
horizontal size.
• The upper-left coordinates of the area to be drawn are defined as vertex (A)
(CMDXA, CMDYA), and the lower-right coordinates are defined as vertex (C)
(CMDXC, CMDYC). Enlargement, reduction, and stretching are possible by the
specification of vertex (A) and vertex (C). Also, when X of (A) is greater than X of
(C), the part is inverted horizontally. When Y of (A) is greater than Y of (C), the
part is inverted vertically.
• When vertex A and vertex C are set at the same coordinates, they are drawn with
one pixel.
VDP1 User's Manual 121
Specification of Zoom Point (Scaled Sprite Draw Command)
The contents of the command table for specifying the zoom point are shown in the
following figure.
al
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
nti
CMDCTRL 0 JP ZP 0 0 Dir 0 0 0 1
+00H
CMDLINK Link specification/8H
+02H Color
CMDPMOD MO 0 0 HS Pc Cl Cm Me EC SP Color mode calculation
+04H Scaled sprite
CMDCOLR Color bank, lookup table/8H (LSB fixed at 00)
+06H
Vertex (A) Vertex (B)
CMDSRCA Character address/8H 0 0
+08H
de
Zoom Point
CMDSIZE 0 0 Character size X/8 Character size Y
+0AH Display
CMDXA Code extension Zoom point, X coordinate (XA) width (YB)
+0CH
CMDYA Code extension Zoom point, Y coordinate (YA)
+0EH Vertex (D) Vertex (C)
CMDXB Code extension Display, X width (XB)
+10H
CMDYB Code extension Display, Y width (YB) Display width (XB)
+12H
CMDGRDA
+1AH
+1CH
+14H
+16H
+18H
nfi
Gouraud shading table/8H
Frame buffer
Co
Note: is ignored.
Specification of the zoom point of the scaled sprite draw command is defined as
follows:
• When the end bit is set to 0B and the command selection bits are set to 0001B, the
scaled sprite draw command is enabled.
• The jump mode is then specified. When the jump mode is assigned or called, the
GA
address of the command table to be processed next is divided by 8H and set in
CMDLINK.
• The zoom point is specified. When the zoom point is set to other than 0000B, it
becomes the display width specification. When 0000B is set, it becomes the coor-
dinate specification for two points.
• For more information on zoom point, refer to “Zoom Point” in section 6.1.
• The read direction of the character pattern is set. The character pattern can be
drawn with vertical or horizontal inversion by the specification of the read direc-
SE
tion.
• Set high speed shrink. Specify priority to precision or to speed.
• Set pre-clipping. Specify enable or disable in consideration of the clipping area
and the drawing position of the part.
122
• The user clipping enable bit and clipping mode are specified. Depending on the
clipping mode, either the outside or the inside of the user clipping area is speci-
fied.
• Mesh is enabled, end code is disabled, and transparent pixel is disabled. MSB
ON is set to perform shade processing in the VDP2.
• The color mode that defines the character pattern is set. Color bank is specified
when the color mode is the color bank mode. When the color mode is the lookup
table mode, the address of the color lookup table is defined by dividing by 8H.
• Color calculation is specified. Color calculation is enabled in the RGB mode.
When color calculation is not used, replace is specified. When Gouraud shading
is used, the address of the Gouraud shading table is specified by dividing by 8H.
Gouraud shading processing is enabled in the RGB mode.
• The address of the character pattern table is defined in CMDSRCA by dividing
by 8H. The horizontal and vertical lengths of the character size defined in the
character pattern table are defined in CMDSIZE. A value divisible by 8 is defined
for the horizontal size.
• The coordinates of the zoom point of the character to be drawn are set at zoom
point coordinates (CMDXA, CMDYA). The display width is defined in CMDXB,
CMDYB. The character pattern can be drawn enlarged, reduced, or stretched by
specifying the display width.
• When the value of CMDXB, CMDYB is set to (0, 0), the sprite is drawn as one
pixel.
VDP1 User's Manual 123
7.6 Distorted Sprite Draw Command
The distorted sprite draw command draws character patterns in the frame buffer.
Character patterns can be drawn at specified coordinates inverted vertically and/or
horizontally, enlarged or reduced, stretched, rotated or twisted.
When the end bit is 0B and the command selection bits are 0010B, the distorted
sprite draw command is enabled. The contents of the command table are shown in
the following figure.
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
JP 0 0 0 0 0 0 Dir 0 0 1 0
CMDCTRL +00H 0
CMDLINK +02H Link specification/8H 0 0
Color Distorted sprite
CMDPMOD
MO 0 0 HS Pc Cl Cm Me EC SP Color mode calculation
+04H
CMDCOLR Color bank, lookup table/8H (LSB fixed at 00) Vertex (A)
+06H Vertex (D)
CMDSRCA Character address/8H 0 0
+08H
CMDSIZE 0 0 Character size X/8 Character size Y
+0AH
CMDXA Code extension Vertex (A), X coordinate (XA)
Vertex (B)
+0CH
CMDYA Code extension Vertex (A), Y coordinate (YA) Vertex (C)
+0EH
CMDXB Code extension Vertex (B), X coordinate (XB)
+10H
CMDYB Code extension Vertex (B), Y coordinate (YB) Frame buffer
+12H
CMDXC Code extension Vertex (C), X coordinate (XC)
+14H
CMDYC Code extension Vertex (C), Y coordinate (YC)
+16H
CMDXD Code extension Vertex (D), X coordinate (XD)
+18H
CMDYD Code extension Vertex (D), Y coordinate (YD)
+1AH
CMDGRDA Gouraud shading table/8H
+1CH
Note: is ignored.
The distorted sprite draw command is defined as follows:
• When the end bit is set to 0B and the command selection bits are set to 0010B, the
distorted sprite draw command is enabled.
• The jump mode is then specified. When the jump mode is assigned or called, the
address of the command table to be processed next is divided by 8H and set in
CMDLINK.
• The read direction of the character pattern is set. The character pattern can be
drawn with vertical or horizontal inversion by the specification of the read direc-
tion. When inversion is specified twice by the read direction and by the specifica-
tion of vertex (A), vertex (B), vertex (C), and vertex (D), the inversions cancel
each other out.
• Set high speed shrink. Specify priority to precision or to speed.
• Set pre-clipping. Specify enable or disable in consideration of the clipping area
and the drawing position of the part.
124
• The user clipping enable bit and clipping mode are specified. Depending on the
clipping mode, either the outside or the inside of the user clipping area is speci-
fied.
• Mesh is enabled, end code is disabled, and transparent pixel is disabled. MSB
ON is set to perform shade processing in the VDP2.
• The color mode that defines the character pattern is set. Color bank is specified
when the color mode is the color bank mode. When the color mode is the lookup
table mode, the address of the color lookup table is defined by dividing by 8H.
• Color calculation is specified. Color calculation is enabled in the RGB mode.
When color calculation is not used, replace is specified. When Gouraud shading
is used, the address of the Gouraud shading table is specified by dividing by 8H.
Gouraud shading processing is enabled in the RGB mode.
• The address of the character pattern table is defined in CMDSRCA by dividing
by 8H. The horizontal and vertical lengths of the character size defined in the
character pattern table are defined in CMDSIZE. A value divisible by 8 is defined
for the horizontal size.
• The upper-left coordinates of the area to be drawn are defined as vertex (A)
(CMDXA, CMDYA), the upper-right coordinates are defined as vertex (B)
(CMDXB, CMDYB), the lower-right coordinates are defined as vertex (C)
(CMDXC, CMDYC), and the lower-left coordinates are defined as vertex (D)
(CMDXD, CMDYD). The relationships between the positions of the four vertices
can be set as desired, and therefore enlargement, reduction, stretching, rotation,
and twist can be specified when drawing the character pattern by the specifica-
tion of vertex (A), vertex (B), vertex (C), and vertex (D). Vertical and horizontal
inversion are also possible.
• When two vertices are set at the same coordinates, the sprite is drawn as a tri-
angle. When four vertices are set at the same coordinates, the sprite is drawn as
one pixel.
VDP1 User's Manual 125
7.7 Polygon Draw Command
The polygon draw command draws quadrangles in the frame buffer. The inside of
the quadrangle is filled with the specified color. When the end bit is 0B and the
command selection bits are 0100B, the polygon draw command is enabled. The
contents of the command table are shown in the following figure.
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDCTRL +00H 0 JP 0 0 0 0 0 0 0 0 0 1 0 0
Link specification/8H 0 0 Polygon
CMDLINK +02H Filled with
Color
MO 0 0 0 Pc Cl Cm Me 1 1 0 0 0 calculation non-textured
CMDPMOD +04H
Non-textured color l
CMDCOLR +06H Vertex (D) Vertex (A)
+08H
+0AH
CMDXA +0CH Code extension Vertex (A), X coordinate (XA) Vertex (B)
Vertex (C)
CMDYA +0EH Code extension Vertex (A), Y coordinate (YA)
CMDXB +10H Code extension Vertex (B), X coordinate (XB)
CMDYB +12H Code extension Vertex (B), Y coordinate (YB)
Frame buffer
CMDXC +14H Code extension Vertex (C), X coordinate (XC)
CMDYC +16H Code extension Vertex (C), Y coordinate (YC)
CMDXD +18H Code extension Vertex (D), X coordinate (XD)
CMDYD +1AH Code extension Vertex (D), Y coordinate (YD)
CMDGRDA +1CH Gouraud shading table/8H
Note: is ignored.
The polygon draw command is defined as follows:
• When the end bit is set to 0B and the command selection bits are set to 0100B, the
polygon draw command is enabled.
• The jump mode is specified. When the jump mode is assigned or called, the
address of the command table to be processed next is divided by 8H and set in
CMDLINK.
• Set pre-clipping. Specify enable or disable in consideration of the clipping area
and the drawing position of the part.
• The user clipping enable bit and clipping mode are specified. Depending on the
clipping mode, either the outside or the inside of the user clipping area is speci-
fied.
• Mesh is enabled. MSB ON is set to perform shade or window processing in the
VDP2.
• The color mode is set to 000B. The color code is set to non-textured color
(CMDCOLR).
126
• Specify color calculation. Color calculation is enabled when the non-textured
color is in the RGB mode. When color calculation is not used, replace is specified.
When Gouraud shading is used, the address of the Gouraud shading table is
specified by dividing by 8H. Gouraud shading processing is enabled when the
non-textured color is in the RGB mode.
• The upper-left coordinates of the quadrangle to be drawn are defined as vertex
(A) (CMDXA, CMDYA), the upper-right coordinates are defined as vertex (B)
(CMDXB, CMDYB), the lower-right coordinates are defined as vertex (C)
(CMDXC, CMDYC), and the lower-left coordinates are defined as vertex (D)
(CMDXD, CMDYD). The relationships between the positions of the four vertices
can be set as desired, and therefore rotation and twist can be specified when
drawing the character pattern by the specification of vertex (A), vertex (B), vertex
(C), and vertex (D).
• When two vertices are set at the same coordinates, a polygon is drawn as a tri-
angle. When four vertices are set at the same coordinates, the polygon is drawn
as one pixel.
VDP1 User's Manual 127
7.8 Polyline Draw Command
The polyline draw command draws quadrangles in the frame buffer. The inside of
the quadrangle is not filled. When the end bit is 0B and the command selection bits
are 0101B, the polyline draw command is enabled. The contents of the command
table are shown in the following figure.
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDCTRL
+00 H 0 JP 0 0 0 0 0 0 0 0 0 1 0 1 Polyline
CMDLINK
+02 H Link specification/8 H 0 0
CMDPMOD
+04 H MO 0 0 0 Pc C1 Cm Me 1 1 0 0 0 Color
calculation
Vertex (A)
CMDCOLR Vertex (D)
+06 H Non-textured color
+08 H
+0AH
CMDXA Vertex (B)
+0CH Code extension Vertex (A), X coordinate (XA) Vertex (C)
CMDYA
+0EH Code extension Vertex (A), Y coordinate (YA)
CMDXB
+10 H Code extension Vertex (B), X coordinate (XB)
CMDYB Frame buffer
+12 H Code extension Vertex (B), Y coordinate (YB)
CMDXC
+14 H Code extension Vertex (C), X coordinate (XC)
CMDYC
+16 H Code extension Vertex (C), Y coordinate (YC)
CMDXD
+18 H Code extension Vertex (D), X coordinate (XD)
CMDYD Code extension Vertex (D), Y coordinate (YD)
+1AH
CMDGRDA
+1CH Gouraud shading table/8 H
NOTE: is ignored.
The polyline draw command is defined as follows:
• When the end bit is set to 0B and the command selection bits are set to 0101B, the
polyline draw command is enabled.
• The jump mode is then specified. When the jump mode is assigned or called, the
address of the command table to be processed next is divided by 8H and set in
CMDLINK.
• Set pre-clipping. Specify enable or disable in consideration of the clipping area
and the drawing position of the part.
• The user clipping enable bit and clipping mode are specified. Depending on the
clipping mode, either the outside or the inside of the user clipping area is speci-
fied.
• Mesh is enabled. When mesh is enabled, the entire sprite may not be drawn
depending on the position and shape of the polyline.
• MSB ON is set to perform shade or window processing in the VDP2.
• The color mode is set to 000B. The color code is set to non-textured color
(CMDCOLR).
128
• Color calculation is specified. Color calculation is enabled when the non-textured
color is in the RGB mode. When color calculation is not used, replace is specified.
When Gouraud shading is used, the address of the Gouraud shading table is
specified by dividing by 8H. Gouraud shading processing is enabled when the
non-textured color is in the RGB mode.
• When half-transparency processing is performed on polylines, two lines overlap
at each point. As a result half-transparency is applied twice, thus causing original
picture 3/4 + background 1/4.
• When shadow processing is performed on polylines, two lines overlap at each
point. As a result shadow is applied twice, thus causing one half the luminance.
• The upper-left coordinates of the quadrangle to be drawn are defined as vertex
(A) (CMDXA, CMDYA), the upper-right coordinates are defined as vertex (B)
(CMDXB, CMDYB), the lower-right coordinates are defined as vertex (C)
(CMDXC, CMDYC), and the lower-left coordinates are defined as vertex (D)
(CMDXD, CMDYD). The relationships between the positions of the four vertices
can be set as desired, and therefore rotation and twist can be specified when
drawing the character pattern by the specification of vertex (A), vertex (B), vertex
(C), and vertex (D).
• When two vertices are set at the same coordinates, a polygon is drawn as a tri-
angle. When four vertices are set at the same coordinates, the polygon is drawn
as one pixel.
VDP1 User's Manual 129
7.9 Line Draw Command
The line draw command draws quadrangles in the frame buffer. The inside of the
quadrangles is not filled. When the end bit is 0B and the command selection bits are
0110B, the line draw command is enabled. The contents of the command table are
shown below.
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 JP 0 0 0 0 0 0 0 0 0 1 1 0
CMDCTRL +00H
Link specification/8H 0 0
CMDLINK +02H
1 1 0 0 0 Color Line
CMDPMOD
MO 0 0 0 Pc Cl Cm Me calculation
+04H
Non-textured color
CMDCOLR
+06H Vertex (A)
+08H Vertex (B)
+0AH Vertex (A), X coordinate (XA)
CMDXA Code extension
+0CH
CMDYA Code extension Vertex (A), Y coordinate (YA)
+0EH
CMDXB Code extension Vertex (B), X coordinate (XB)
+10H
CMDYB Code extension Vertex (B), Y coordinate (YB) Frame buffer
+12H
+14H
+16H
+18H
+1AH
CMDGRDA Gouraud shading table/8H
+1CH
Note: is ignored.
The line draw command is defined as follows.
• When the end bit is set to 0B and the command selection bits are set to 0110B, the
line draw command is enabled.
• The jump mode is then specified. When the jump mode is assigned or called, the
address of the command table to be processed next is divided by 8H and set in
CMDLINK.
• Set pre-clipping. Specify enable or disable in consideration of the clipping area and
the drawing position of the part.
• The user clipping enable bit and clipping mode are specified. Depending on the
clipping mode, either the outside or the inside of the user clipping area is specified.
• Mesh is enabled. When mesh is enabled, the entire sprite may not be drawn de-
pending on the position and shape of the line.
• MSB ON is set to perform shade or window processing in the VDP2.
• The color mode is set to 000B. The color code is set to non-textured color
(CMDCOLR).
130
• Color calculation is specified. Color calculation is enabled when the non-textured
color is in the RGB mode. When color calculation is not used, replace is specified.
When Gouraud shading is used, the address of the Gouraud shading table is
specified by dividing by 8H. Gouraud shading processing is enabled when the
non-textured color is in the RGB mode. Only vertex (A) and vertex (B) in the
Gouraud shading table are enabled; vertex (C) and vertex (D) are ignored.
• Vertex (A) of the line to be drawn is defined in CMDXA, CMDYA and vertex (B)
is defined in CMDXB, CMDYB.
• When the two vertices are set to the same coordinates, the line is drawn as one
pixel.
VDP1 User's Manual 131
7.10 Draw End Command
The draw end command specifies the end of drawing. When the end bit is “1”, the
draw end command is enabled. The contents of the command table are shown in the
following figure.
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDCTRL
+00H 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+02H
+04H
+06H
+08H
+0AH
+0CH
+0EH
+10H
+12H
+14H
+16H
+18H
+1AH
+1CH
Note: is ignored.
Gouraud shading table/8H
• When the +00H address is set to 8000H, the draw end command is enabled.
132
Chapter 8
Quick Reference
Contents
8.1 System Registers ........................................................................... 134
8.2 Tables ............................................................................................ 140
8.3 Command Tables ........................................................................... 142
8.4 Commands .................................................................................... 151
VDP1 User's Manual 133
8.1 System Registers
TV Mode Selection Register (TVMR)
TVMR bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
100000H 0 0 0 0 0 0 0 0 0 0 0 0 VBE TVM
Write-only
V-blank Erase/Write Enable (VBE): bit 3
VBE FCM FCT Change mode Change time
0 0 0 One cycle mode Changes every 1/60 second
0 0 1 Setting prohibited —
0 1 0 Manual mode (erase) Erase in next field
0 1 1 Manual mode (change) Change in next field
1 0 0 Setting prohibited —
1 0 1 Setting prohibited —
1 1 0 Setting prohibited —
1 1 1 Manual mode Erase with V-blank, change in next
(erase & change) field
TV Mode Select (TVM): bits 2 - 0
Table 8.1 Screen Modes
Frame Double
TVM Screen mode Bit buffer Inter- VDP CLK (MHz)
depth screen lace
Bit 2 1 0 Name Resolution (bits/pixel) size possible? NTSC PAL
Normal 320x224 512H Yes 26.8426 26.6564
0 0 0 (NTSC, PAL) 320x240 16 x 26.8426 26.6564
352x224 256V 28.6364 28.4375
352x240 28.6364 28.4375
High 640x224 1024H Yes 26.8426 26.6564
0 0 1 resolution 640x240 8 x 26.8426 26.6564
(NTSC, PAL, Hi - 704x224 256V 28.6364 28.4375
Res) 704x240 28.6364 28.4375
Rotation 16 320x224 512H Single 26.8426 26.6564
0 1 0 (NTSC, PAL 320x240 16 x only 26.8426 26.6564
Rotation) 352x224 256V 28.6364 28.4375
352x240 28.6364 28.4375
Rotation 8 (NTSC, 320x224 512H Single 26.8426 26.6564
0 1 1 PAL 320x240 8 x only 26.8426 26.6564
Rotation) 352x224 512V 28.6364 28.4375
352x240 28.6364 28.4375
1 0 0 HDTV 320x240 16 512H x No 26.8426 26.6564
(31KC, HDTV) 352x240 256V 28.6364 28.4375
Other Setting prohibited (do not set)
134
Frame Buffer Change Mode Register
FBCR bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
100002H 0 0 0 0 0 0 0 0 0 0 0 EOS DIE DIL FCM FCT
Write-only
Frame Buffer Change Mode (FCM): bit 1
Frame Buffer Change Trigger (FCT): bit 0
VBE FCM FCT Change mode Change time
0 0 0 1 cycle mode Changes every 1/60 second
0 0 1 Setting prohibited —
0 1 0 Manual mode (erase) Erase in next field
0 1 1 Manual mode (change) Change in next field
1 0 0 Setting prohibited —
1 0 1 Setting prohibited —
1 1 0 Setting prohibited —
1 1 1 Manual mode Erase with V-blank and change in
(erase & change) next field
Double Interlace Enable (DIE): bit 3
Double Interlace Draw Line (DIL): bit 2
DIE DIL Interlace mode Draw after next frame change
0 0 Non-interlace/single interlace Draw all lines
0 1 Setting prohibited —
1 0 Double-interlace Only even numbered (EVEN) lines
drawn
1 1 Double-interlace Only odd numbered (ODD) lines
drawn
Even/Odd Coordinate Select Bit (EOS): bit 4
EOS Even/odd coordinate select bit
0 Samples only pixels at even coordinates
1 Samples only pixels at odd coordinates
VDP1 User's Manual 135
Plot Trigger Register
PTMR bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
100004H 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PTM
Write-only
Plot Trigger Mode (PT): bits 1, 0
PTM
Bit 1 0 Drawing mode
0 0 Idle at frame change
0 1 Starts drawing when 01B is written
1 0 Starts drawing automatically with frame change
1 1 Setting prohibited (do not set)
Erase/Write Data Register
EWDR
100006H bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
16 bits/pixel Erase/write Data
8 bits/pixel Erase/write data for even X coordinates Erase/write data for odd X coordinates
Write-only
Erase/Write Data: bits 15~0
136
Erase/Write Upper-Left Coordinate Register
EWLR bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
100008H 0 Upper-left coordinate X1 Upper-left coordinate Y1
Write-only
Erase/Write Upper-Left Coordinate X1: bits 14~9
Erase/Write Upper-Left Coordinate Y1: bits 8~0
Erase-Write Lower-Right Coordinate Register
EWRR bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
10000AH Lower-right coordinate X3 Lower-right coordinate Y3
Write-only
Erase/Write Lower-Right Coordinate X3: bits 15~9
Erase/Write Lower-Right Coordinate Y3: bits 8~0
8 bits/pixel
16 bits/pixel High Resolution Rotated 8
Value set Upper-left Lower-right Upper-left Lower-right Upper-left Lower-right
in register coordinate X1 coordinate X3 coordinate X1 coordinate X3 coordinate X1 coordinate X3
0 0 Setting 0 Setting 0 Setting
prohibited prohibited prohibited
1 8 7 16 15 16 15
2 16 15 32 31 32 31
: : : : : : :
31 248 247 496 495 496 495
32 256 255 512 511 Setting 511
prohibited
33 264 263 528 527 Setting Setting
prohibited prohibited
: : : : : : :
40 320 319 640 639 : :
: : : : : : :
43 344 343 688 687 : :
44 352 351 704 703 : :
: : : : : : :
62 496 495 992 991 : :
63 504 503 1008 1007 : :
64 Setting 511 Setting 1023 : :
prohibited prohibited
65 and Setting Setting Setting Setting Setting Setting
over prohibited prohibited prohibited prohibited prohibited prohibited
VDP1 User's Manual 137
Draw Forced Termination Register
ENDR bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
10000CH 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Write-only
Transfer End Status Register
EDSR bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CEF BEF
100010H 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Read-only
• Current End Bit Fetch Status (CEF): bit 1
CEF End bit fetch status
0 The end bit in current frame has not been fetched.
1 The end bit in current frame has been fetched and that drawing is terminated.
• Before End Bit Fetch Status (BEF): bit 0
BEF End bit fetch status
0 The end bit in previous frame has not been fetched.
1 The end bit in previous frame has been fetched and that drawing is terminated.
Last Operation Table Address Register
LOPR bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
100012H Last operation table address/8H 0 0
Read-only
• Last Operation Table Address: bits 15~0
Current Operation Table Address
COPR bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
100014H Current operation table address/8H 0 0
Read-only
• Current Operation Table Address: bits 15~0
138
Mode Status Register
MODR bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
100016H VER — — — PTM1 EOS DIE DIL FCM VBE TVM
Read-only
Version Number (VER): bits 15~12
Plot Trigger Mode 1 (PTM1): bit 8
Even/Odd Coordinate Select Bit (EOS): bit 7
Double Interlace Enable Bit (DIE): bit 6
Double Interlace Draw Line (DIL): bit 5
Frame Buffer Change Mode Bit (FCM): bit 4
V-Blank Erase/Write Enable Bit (VBE): bit 3
TV Mode Selection Bits (TVM): bits 2~0
VDP1 User's Manual 139
8.2 Tables
Character Pattern Tables
For 4 bits/pixel, 0CH (12) bytes is required.
pixel 0 1 2 3 4 5 6 7
+00H + 0 + 1 + 2 + 3 ← Value is local address from character pattern
+04H + 4 + 5 + 6 + 7
+08H + 8 + 9 + A + B
For 8 bits/pixel, 18H (24) bytes is required.
pixel 0 1 2 3 4 5 6 7
+00H +0 +1 +2 +3 +4 +5 +6 +7
+08H +8 +9 +A +B +C +D +E +F
+10H +10 +11 +12 +13 +14 +15 +16 +17
For 16 bits/pixel, 30H (48) bytes is required.
pixel 0 1 2 3 4 5 6 7
+00H +0 +1 +2 +3 +4 +5 +6 +7 +8 +9 +A +B +C +D +E +F
+10H +10 +11 +12 +13 +14 +15 +16 +17 +18 +19 +1A +1B +1C +1D +1E +1F
+20H +20 +21 +22 +23 +24 +25 +26 +27 +28 +29 +2A +2B +2C +2D +2E +2F
Figure 8.1 Examples of Character Pattern Tables
Color Lookup Table
+00H 16-bit data (color code of 0H)
+02H 16-bit data (color code of 1H)
+04H 16-bit data (color code of 2H)
:
:
+1CH 16-bit data (color code of EH)
+1EH 16-bit data (color code of FH)
Figure 8.2 Color Lookup Table
140
Gouraud Shading Table
Table 8.2 Gouraud Shading Table
Corresponding vertex
Table address Sprites, polygons, polylines Lines
Table top address Vertex (A) Line start vertex
Table top address + 2 Vertex (B) Line end vertex
Table top address + 4 Vertex (C) Ignored
Table top address + 6 Vertex (D) Ignored
VDP1 User's Manual 141
8.3 Command Tables
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDCTRL END JP ZP 0 0 Dir Comm
+00H
CMDLINK LINK specification/8H 0 0
+02H
CMDPMOD MON 0 0 HSS Pclp Clip Cmod Mesh ECD SPD Color mode Color calculation bit
+04H
CMDCOLR Color bank, color lookup table/8H (LSB is set to 00), non-textured color
+06H
CMDSRCA Character address/8H 0 0
+08H
CMDSIZE 0 0 Character size X/8 Character size Y
+0AH
CMDXA
+0CH
Code extension Vertex (A) and X coordinate (XA) *
CMDYA Code extension Vertex (A) and Y coordinate (YA)
+0EH
CMDXB Code extension Vertex (B) and X coordinate (XB)
+10H
CMDYB Code extension Vertex (B) and Y coordinate (YB)
+12H
CMDXC Code extension Vertex (C) and X coordinate (XC)
+14H
CMDYC Code extension Vertex (C) and Y coordinate (YC)
+16H
CMDXD Code extension Vertex (D) and X coordinate (XD)
+18H
CMDYD Code extension Vertex (D) and Y coordinate (YD)
+1AH
CMDGRDA
+1CH Gouraud Shading Table/8H
+1EH (Dummy) Skipped during table fetch
+20H
: Succeeding table
+40H
: Succeeding table
+60H
: :
* Note: The top bit of the vertex coordinate is a sign bit. A negative value is indicated by the complement of
2. Extend the sign for the upper 6 bits.
Figure 8.3 Command Table
142
CMDCTRL (Control Words)
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDCTRL
+00H END JP ZP 0 0 Dir Comm
End bit (END): bit 15
END End bit
0 Drawing command or coordinate setting command (other than draw end
command)
1 Draw end command
Jump Mode (JP): bits 14~12
JP
Bit 14 13 12 Jump mode Processing
Automatically jumps to next table (address +20 H) after this
0 0 0 Jump next
table is processed (CMDLINK is ignored).
0 0 1 Jump assign Jumps to CMDLINK table after this table is processed.
CMDLINK table receives subroutine call after this table is
0 1 0 Jump call processed.
Returns to main routine after this table is processed
0 1 1 Jump return (CMDLINK is ignored).
Jumps to next table (address +20H ) after this table is
1 0 0 Skip next
processed (CMDLINK is ignored).
Jumps to CMDLINK without processing this table.
1 0 1 Skip assign
CMDLINK table receives subroutine call without processing
1 1 0 Skip call this table.
Returns to main routine without processing this table
1 1 1 Skip return (CMDLINK is ignored).
VDP1 User's Manual 143
Zoom Point (ZP): bits 11~8
ZP
Bit 11 10 9 8 Code Zoom point
0 0 0 0 0H Specifies two coordinates
0 1 0 1 5H Upper-left
0 1 1 0 6H Upper-center
0 1 1 1 7H Upper-right
1 0 0 1 9H Center-left
1 0 1 0 AH Center-center
1 0 1 1 BH Center-right
1 1 0 1 DH Lower-left
1 1 1 0 EH Lower-center
1 1 1 1 FH Lower-right
Other than above Setting prohibited (do not set)
Character Read Direction (Dir): bits 5 and 4
Dir
Y X Inversion processing
0 0 Not inverted
0 1 Inverted horizontally
1 0 Inverted vertically
1 1 Inverted vertically and horizontally
144
Command Select (Comm): bits 3~0
Table 8.3 Commands
END Comm
Bit 15 3 2 1 0 Function Command
0 0 0 0 0 Textured draw Normal sprite draw command
0 1 command Scaled sprite draw command
1 0 Draw Distorted sprite draw command
1 0 0 commands Non-textured draw Polygon draw command
0 1 command Polyline draw command
1 0 Line draw command
1 0 0 0 Coordinates Clipping User clipping coordinates set
set coordinate set command
commands commands
1 System clipping coordinates set
command
1 0 Local coordinate set command
1 0 0 0 0 End draw command
All other codes Setting prohibited (do not set)
CMDLINK (Link Specification)
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDLINK
+02H Link specification/8H 0 0
VDP1 User's Manual 145
CMDPMOD (Draw Mode Word)
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDPMOD
+04H MON 0 0 HSS Pclp Clip Cmod Mesh ECD SPD Color mode Color calculation bits
High Speed Shrink (HSS): bit 12
HSS Processing
0 High speed shrink disabled
1 High speed shrink enabled
Pre-clipping Disable (Pclp): bit 11
Pclp Processing
0 Pre-clipping with horizontal inversion
1 No pre-clipping and no horizontal inversion
User Clipping Enable Bit (Clip): bit 10
Clipping Mode Bit (Cmod): bit 9
Clip Cmod User clipping processing
0 0 User clipping disabled
0 1 Setting prohibited (do not set)
1 0 Inside drawing mode
1 1 Outside drawing mode
Mesh Enable Bit (Mesh): bit 8
Mesh Mesh enable
0 Draw without mesh processing
1 Draw with mesh processing
146
End Code Disable (ECD): bit 7
HSS ECD End code processing
0 0 End code enable: drawing horizontally is disabled when second
end code is read and end code becomes transparent.
0 1 End code disable: end code is not processed,
color of code is expressed.
1& 0 End code enable: drawing horizontally is disabled when second
enlarge end code is read and end code becomes transparent.
1& 0 End code disable: end code is not processed,
reduce color of code is expressed.
1 1 End code disable: end code is not processed,
color of code is expressed.
Transparent Pixel Disable (SPD): bit 6
SPD End code processing
Transparent pixel enable: transparent color codes are not
0 drawn; transparent color codes
become transparent.
Transparent pixel disable: transparent color code is not
1 processed, color of code is expressed.
Color Mode Bits: bits 5~3
Color mode Description
Number of Bits per
Bit 5 4 3 Mode colors Mode pixel
0 0 0 0 16 Color bank mode 4 bits
0 0 1 1 16 Lookup table mode 4 bits
0 1 0 2 64 Color bank mode 8 bits
0 1 1 3 128 Color bank mode 8 bits
1 0 0 4 256 Color bank mode 8 bits
1 0 1 5 32,768 RGB mode 16 bits
Other than above Setting prohibited (do not set)
VDP1 User's Manual 147
Color Calculation Bits: bits 2-–0
Bit Function
2 Gouraud shading enable bit
1 1/2 original graphic enable bit
0 1/2 background enable bit
Color
calculation Background Original Type of color Usable modes
(in Bit) MSB graphic Background calculation Original
2 1 0 graphic Background
0 0 0 — 1 0 Replace Not restricted Not restricted
0 0 1 0 0 1 Cannot rewrite Not Not restricted
1 01 1/2 Shadow restricted RGB
0 1 0 — 1/2 0 Half-luminance RGB Not restricted
0 1 1 0 1 0 Replace RGB Not restricted
1 1/2 1/2 Half-transparent RGB
1 0 0 — Gouraud 0 Gouraud shading RGB Not restricted
1 0 1 — — — Setting prohibited — —
(do not set)
1 1 0 Gouraud Gouraud shading + RGB Not restricted
— 1/2 0 Half-luminance 2
0 Gouraud 0 Gouraud shading Not restricted
1 1 1 Gouraud Gouraud shading +
1 1/2 1/2 Half- transparent3 RGB RGB
Notes —: doesn't matter
Original graphic: sprite or pixel data to be plotted in non-textured color.
Background: pixel data already plotted in the frame buffer.
1Original graphic (transparent pixels, end code) is referenced.
2Data that has undergone saturation processing after Gouraud calculation is reduced by half.
3Background is added to data that has undergone saturation processing after Gouraud
calculation is reduced by half.
MON Bit (MSB on): bit 15
MON Processing
0 MSB of pixel data in frame buffer is not changed
1 Sets MSB of pixel data in frame buffer to 1
148
CMDCOLR (Color Control Word)
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDCOLR
+06H Color bank, color lookup table/8H (LSB fixed at 00), non-textured colors
Table 8.4 CMDCOLR
Part Color mode Color control word
Textured part Color bank mode Color bank
Lookup table mode Color lookup table address
RGB mode Ignored
Non-textured part Non-textured color
CMDSRCA (Character Address)
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDSRCA
+08H Character address/8H 0 0
CMDSIZE (Character Size)
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDSIZE
+0AH 0 0 Character size X/8 Character size Y
Table 8.5 Relationships between Settings and Drawn Pixels
Horizontal (X) direction Vertical (Y) direction
Setting in command Number of pixels Setting in command Number of pixels
table actually drawn table actually drawn
0 Setting prohibited 0 Setting prohibited
1 8 1 1
2 16 2 2
: : : :
63 504 255 255
VDP1 User's Manual 149
CMDXA~CMDYD (Vertex Coordinate Data)
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDXA
+0CH Code extension Vertex (A), X coordinates (XA)
CMDYA
+0EH Code extension Vertex (A), Y coordinates (YA)
CMDXB
+10H Code extension Vertex (B), X coordinates (XA); or display, X width (XB)
CMDYB
+12H Code extension Vertex (B), Y coordinates (YA); or display, Y width (YB)
CMDXC
+14H Code extension Vertex (C), X coordinates (XC)
CMDYC
+16H Code extension Vertex (C), Y coordinates (YC)
CMDXD
+18H Code extension Vertex (D), X coordinates (XD)
CMDYD
+1AH Code extension Vertex (D), Y coordinates (YD)
Note: The top bit of the parameter is a sign bit. A negative value is indicated by a complement
of 2. Extend the code with the upper 6 bits.
Table 8.6 Correspondence between Commands and CMDXA-CMDYD
Command CMDXA CMDXB CMDXC CMDXD
CMDYA CMDYB CMDYC CMDYD
Normal sprite draw command Vertex (A) — — —
Specify coordinates
Scaled sprite draw for two points Vertex (A) — Vertex (C) —
command
(two methods) Specify zoom point Zoom point Display width — —
coordinates
Distorted sprite draw command Vertex (A) Vertex (B) Vertex (C) Vertex (D)
Polygon draw command Vertex (A) Vertex (B) Vertex (C) Vertex (D)
Polyline draw command Vertex (A) Vertex (B) Vertex (C) Vertex (D)
Line draw command Vertex (A) Vertex (B) — —
User clipping coordinate set command Upper-left — Lower-right —
coordinates coordinates
System clipping coordinate set — — Lower-right —
command coordinates
Local coordinate set command Local coordinates — — —
Note: "—" indicates unused.
CMDGRDA (Gouraud Shading Table)
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDGRDA
+1CH Gouraud shading table/8H
150
8.4 Commands
System Clipping Coordinate Set Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDCTRL
+00H 0 JP 0 0 0 0 0 0 0 0 1 0 0 1
CMDLINK Link specification/8H 0 0
+02H
(0, 0)
+04H
+06H TV
+08H
+0AH
Lower-right Coordinate
+0CH
+0EH
System clipping area
+10H
+12H
CMDXC
+14H 0 0 0 0 0 0 Lower-right X coordinate (XC) Upper-left coordinates
CMDYC are fixed at (0, 0).
+16H 0 0 0 0 0 0 0 Lower-right Y coordinate (YC)
+18H
+1AH
+1CH
Note: is ignored.
User Clipping Coordinate Set Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDCTRL
+00H 0 JP 0 0 0 0 0 0 0 0 1 0 0 0
CMDLINK Link specification/8H 0 0
+02H Upper-left
coordinate
+04H TV
+06H
+08H Lower-right
coordinate
System
clipping area
+0AH
CMDXA
+0CH 0 0 0 0 0 0 Upper-left X coordinate (XA) User clipping area
CMDYA
+0EH 0 0 0 0 0 0 0 Upper-left Y coordinate (YA)
+10H
+12H
CMDXC
+14H 0 0 0 0 0 0 Lower-right X coordinate (XC)
CMDYC
+16H 0 0 0 0 0 0 0 Lower-right Y coordinate (YC)
+18H
+1AH
+1CH
Note: is ignored.
VDP1 User's Manual 151
Local Coordinate Set Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDCTRL 0 0 0 0 0 0 0 0 1 0 1 0
+00H 0 JP
CMDLINK Link specification/8H 0 0 (0,0)
+02H
+04H
TV
+06H Local coordinate (A)
+08H
+0AH
CMDXA
+0CH Code extension Local X coordinate (XA)
CMDYA +0EH Code extension Local Y coordinate (YA)
System clipping area
+10H
+12H
+14H
+16H
+18H
+1AH
+1CH
Note: is ignored.
Normal Sprite Draw Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 JP 0 0 0 0 0 0 Dir 0 0 0 0 Normal sprite
CMDCTRL +00H
Link specification/8H
CMDLINK +02H Color
Vertex (A) Vertex (B)
MO 0 0 0 Pc CI Cm Me EC SP Color mode
calculation
CMDPMOD +04H
Color bank, lookup table/8H (LSB fixed at 00)
CMDCOLR +06H
Character address/8H 0 0
CMDSRCA +08H
0 0 Character size X/8 Character size Y Vertex (D) Vertex (C)
CMDSIZE +0AH
CMDXA +0CH Code extension Vertex (A), X coordinate (XA)
CMDYA +0EH Code extension Vertex (A), Y coordinate (YA)
+10H Frame buffer
+12H
+14H
+16H
+18H
+1AH
CMDGRDA Gouraud shading table/8H
+1CH
Note: is ignored.
MO = MON, HS = HSS, Pc = Pclp,
Cl = Clip, Cm = Cmod,
Me = Mesh, EC = CD and
152
Scaled Sprite Draw Command (Coordinates of 2 Points Specification )
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Scaled sprite
0 JP 0 0 0 0 0 0 Dir 0 0 0 1
CMDCTRL +00H
Link specification/8H
CMDLINK +02H Color
Vertex (A) Vertex (B)
MO 00 HS Cl Cm Me EC SP Color mode
Pc calculation
CMDPMOD
+04H Color bank, lookup table/8H (LSB fixed at 00)
CMDCOLR
+06H
CMDSRCA Character address/8H 0 0
+08H
CMDSIZE 0 0 Character size X/8 Character size Y Vertex (D) Vertex (C)
+0AH
CMDXA Code extension Vertex (A), X coordinate (XA)
+0CH
CMDYA Code extension Vertex (A), Y coordinate (YA)
+0EH
+10H Frame buffer
+12H Code extension Vertex (C), X coordinate (XC)
CMDXC
+14H Code extension
CMDYC Vertex (C), Y coordinate (YC)
+16H
+18H
CMDGRDA +1AH
Gouraud shading table/8H
+1CH
Note: is ignored.
Scaled Sprite Draw Command (Specification of Zoom Point )
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 JP ZP 0 0 Dir 0 0 0 1
CMDCTRL+00H
Link Specification/8H
CMDLINK+02H
Color
MO 0 0 HS Pc Cl Cm Me EC SP Color mode
calculation Scaled sprite
CMDPMOD+04H
CMDCOLR Color bank, lookup table/8H (LSB fixed at 00)
+06H Vertex (A) Vertex (B)
CMDSRCA Character address/8H 0 0
+08H Zoom Point
CMDSIZE 0 0 Character size X/8 Character size Y
Display
+0AH
Code extension Zoom point (A), X coordinate (XA) width (YB)
CMDXA+0CH
CMDYA Code extension Zoom point (A), Y coordinate (YA) Vertex (D)
+0EH Vertex (C)
CMDXB+10H Code extension Display, X width (XB)
CMDYB Code extension Display, Y width (YB) Display Width (XB)
+12H
+14H
+16H Frame buffer
+18H
+1AH
CMDGRDA Gouraud shading table/8H
+1CH
Note: is ignored.
VDP1 User's Manual 153
Distorted Sprite Draw Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 JP 0 0 0 0 0 0 Dir 0 0 1 0
CMDCTRL +00H
Link specification/8H 0 0 Distorted sprite
CMDLINK +02H Color Color
MO 0 0 HS Pc Cl Cm Me EC SP
mode calculation
CMDPMOD
+04H Color bank, lookup table/8H (LSB fixed at 00)
CMDCOLR Vertex (D) Vertex (A)
+06H Character address/8H 0 0
CMDSRCA
+08H 0 0 Character size X/8 Character size Y
CMDSIZE
+0AH Code extension Vertex (A), X coordinate (XA)
CMDXA Vertex (B)
+0CH Code extension Vertex (A), Y coordinate (YA) Vertex (C)
CMDYA
+0EH
CMDXB Code extension Vertex (B), X coordinate (XB)
+10H
CMDYB Code extension Vertex (B), Y coordinate (YB) Frame buffer
+12H
CMDXC Code extension Vertex (C), X coordinate (XC)
+14H Code extension Vertex (C), Y coordinate (YC)
CMDYC
+16H
Code extension Vertex (D), X coordinate (XD)
CMDXD
+18H
CMDYD Code extension Vertex (D), Y coordinate (YD)
+1AH
CMDGRDA Gouraud shading table/8H
+1CH
Note: is ignored.
Polygon Draw Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDCTRL JP 0 0 0 0 0 0 0 0 0 1 0 0
+00H 0
CMDLINK+02H Link specification/8H 0 0 Polygon
Color Filled with
CMDPMOD+04H MO 0 0 0 Pc Cl Cm Me 1 1 0 0 0 calculation non-textured color
CMDCOLR Non-textured color Vertex (A)
+06H Vertex (D)
+08H
+0AH
CMDXA Code extension Vertex (A), X coordinate (XA)
+0CH Vertex (B)
CMDYA+0EH Vertex (C)
Code extension Vertex (A), Y coordinate (YA)
CMDXB Code extension
+10H Vertex (B), X coordinate (XB)
CMDYB Code extension Vertex (B), Y coordinate (YB)
+12H
CMDXC Frame buffer
+14H Code extension Vertex (C), X coordinate (XC)
CMDYC+16H Code extension Vertex (C), Y coordinate (YC)
CMDXD+18H Code extension Vertex (D), X coordinate (XD)
CMDYD
+1AH Code extension Vertex (D), Y coordinate (YD)
CMDGRDA
+1CH Gouraud shading table/8H
Note: is ignored.
154
Polyline Draw Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDCTRL
+00 H 0 JP 0 0 0 0 0 0 0 0 0 1 0 1 Polyline
CMDLINK
+02 H Link specification/8 H 0 0
CMDPMOD MO 0 0 0 Pc CI Cm Me 1 1 0 0 0 Color
Vertex (A)
+04 H calculation
Vertex (D)
CMDCOLR Non-textured color
+06 H
+08 H
+0AH Vertex (B)
CMDXA
Code extension Vertex (A), X coordinate (XA) Vertex (C)
CMDYA +0CH
Code extension Vertex (A), Y coordinate (YA)
+0EH
CMDXB
Code extension Vertex (B), X coordinate (XB)
CMDYB +10 H
Code extension Vertex (B), Y coordinate (YB) Frame buffer
+12 H
CMDXC
Code extension Vertex (C), X coordinate (XC)
CMDYC +14 H
Code extension Vertex (C), Y coordinate (YC)
CMDXD +16 H
Code extension Vertex (D), X coordinate (XD)
+18 H
CMDYD Code extension Vertex (D), Y coordinate (YD)
+1AH
CMDGRDA Gouraud shading table/8 H
+1CH
NOTE: is ignored.
Line Draw Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDCTRL +00H 0 JP 0 0 0 0 0 0 0 0 0 1 1 0
CMDLINK +02H Link specification/8H 0 0
MO 0 0 0 Pc Cl Cm Me 1 1 0 0 0 Color Line
CMDPMOD calculation
+04H
CMDCOLR Non-textured color
+06H
+08H Vertex (A)
Vertex (B)
+0AH
CMDXA Code extension Vertex (A), X coordinate (XA)
+0CH
CMDYA Code extension Vertex (A), Y coordinate (YA)
+0EH
CMDXB Code extension Vertex (B), X coordinate (XB)
+10H
CMDYB Code extension Vertex (B), Y coordinate (YB) Frame buffer
+12H
+14H
+16H
+18H
+1AH
CMDGRDA Gouraud shading table/8H
+1CH
Note: is ignored.
VDP1 User's Manual 155
Draw End Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMDCTRL
+00H 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+02H
+04H
+06H
+08H
+0AH
+0CH
+0EH
+10H
+12H
+14H
+16H
+18H
+1AH
+1CH
Note: is ignored.
156
Chapter 9
Precautions for Use
VDP1 User's Manual 157
VDP1
· Rotated reading of the frame buffer is prohibited during normal, high resolu-
tion, HDTV, and double interlace.
· The CPU can only access the draw frame buffer.
System Registers
· DMA access of the system registers is prohibited. Word access must be used.
· Be sure to set the system registers after powering on.
· Be sure to set bits not used in the system registers to “0.”
· Be sure to set DIE to “0” for rotated reading of the frame buffer. Rotated read-
ing is prohibited in double interlace.
· An undefined screen is displayed in the first frame after changing the DIE bit,
so use caution.
· When changing the TVM bit, the frame buffer must be masked. An undefined
screen is displayed for one frame during the change.
· Set FCM and FCT to “0” during double interlace. The fields can only be
changed when they are 1/60 second.
· Set the erase/write areas so that upper-left coordinate XA is less than lower-
right coordinate XC and upper-left coordinate YA is less than or equal to lower-
right coordinate YC.
Commands
· Local coordinates must be set after powering on.
· The clipping coordinate setting range is from (0, 0) to (1023, 511).
· In the clipping coordinate range, upper-left coordinate XA is less than lower-
right coordinate XC and upper-left coordinate YA is less than or equal to lower-
right coordinate YC.
· Set suitable values for clipping to match the screen mode set by the TVM bit.
· Always set the user clipping area inside the system clipping area. They can be
set on the same lines.
· The upper-left coordinate of the system clipping area is fixed at (0,0) in the
hardware.
· Set unused bits in words used in commands tables to “0.”
· Call (call, jump call, skip call) is prohibited in command subroutines.
158
· Return (return, jump return, skip return) is prohibited in command main rou-
tines.
· Only 0H, 5H, 6H, 7H, 9H, AH (10), BH (11), DH (13), EH (14,) and FH (15) are
allowed as zoom-point values. Settings other than these are prohibited.
· When HSS = 1, the end codes of the original graphic are ignored whether the
sprite is enlarged or reduced.
· Set the lower 2 bits of CMDLINK to “00”.”
· Set the lower 2 bits of lookup tables to “00.”
· When setting a color bank, set the lower 4 bits of the color bank data to “0000.”
· Set ECD and SPD to “1” and the color mode to “0” for non-textures.
· When calculating colors in non-textures, set the non-texture color using RGB
data (greater than 8000H).
· Set ECD to “0” when the color mode is set to the RGB mode and 7FFFH data
are used for the original graphic.
· Set SPD to “0” when the color mode is set to the RGB mode and 0000H data are
used for the original graphic.
· When the color mode is set to the RGB mode, the frame buffer cannot be set to
8 bits/pixel. The only color modes in which 8 bits/pixel can be set are modes 0,
1, 2, 3, and 4.
· When the frame buffer is set to 8 bits/pixel, set the color calculation mode to
“0.” Only replace is possible. Color calculation other than this is prohibited.
· When the frame buffer is set to 8 bits/pixel, the upper 8 bits of non-textured
colors are ignored. The use of RGB data is prohibited at this time.
· When the frame buffer is set to 8 bits/pixel, set the MSB ON bit (MON) to “1.”
· When the MSB ON bit (MON) is set to “1,” set the color calculation mode to
“0.”
· Store command tables to address 000000H of VRAM.
VDP1 User's Manual 159
(Page 160 is blank in the original Japanese version.)
160
INDEX
#
(color) lookup table mode ............................... 89 disable (transparent pixel) ............................... 88
(color) palette code ........................................... 89 display device ...................................................... 2
1-cycle mode ...................................................... 38 display range ..................................................... 14
31KC ................................................................... 37 distorted sprite draw command ................... 124
distorted sprites .................................................. 8
A DMA burst transfer .......................................... 23
access (system registers) .................................. 23 double interlace ................................................. 43
address map ...................................................... 18 double interlace enable bit .............................. 43
double interlace draw line ............................... 43
B draw forced termination register ................... 51
background ........................................................ 94 draw command ............................................... 109
boundaries ......................................................... 24 draw mode word .............................................. 79
burst transfer (DMA)........................................ 23 draw procedure flow ........................................ 28
byte access (VRAM) ......................................... 19 draw end command ....................................... 132
dropout processing ............................................. 9
C
change (manual mode) .................................... 39 E
character address ............................................ 103 end bit ........................................................... 70, 71
character pattern (each color mode) .............. 90 end code disable................................................ 86
character pattern ............................................... 60 erase & change (manual mode) ...................... 40
character pattern table ............................... 26, 60 erase (manual mode) ........................................ 39
character read direction ................................... 77 erase/write ........................................................ 46
character size ................................................... 104 even lines ........................................................... 43
clipping coordinate set command ................ 109 even/odd coordinate selection ....................... 44
CMDCOLR ........................................................ 98
CMDCTRL ......................................................... 70 F
CMDGRDA ..................................................... 106 fetch .................................................................... 29
CMDLINK ......................................................... 78 fetch status (of end bit) .................................... 52
CMDPMOD ....................................................... 79 fill data (erase/write) ....................................... 46
CMDSIZE ......................................................... 104 fill-in (polygons) ............................................... 10
CMDSRCA ....................................................... 103 fixed point (zoom point) .................................. 73
CMDXA~CMDYD .......................................... 105 flow (of command tables) ................................ 30
color .................................................................... 12 flow (of draw procedure) ................................ 28
color bank .......................................................... 99 frame ................................................................... 38
color bank code ............................................... 100 frame buffer ................................................... 2, 20
color calculation ................................................ 93 frame buffer change mode bit ......................... 38
color control word ............................................ 98 frame buffer change mode register ................ 38
color lookup table ............................... 26, 62, 101 frame buffer change trigger bit ....................... 38
color mode ......................................................... 89
command table ...................................... 25, 66, 69 G
command table flow ......................................... 30 Gouraud shading ........................................ 64, 95
commands .................................................. 71, 109 Gouraud shading table ...................... 26, 64, 106
control words .................................................... 70
coordinate set command ................................ 109 H
CPU ....................................................................... 2
current operation table address (register) ..... 55 half-luminance .................................................. 95
half-transparent ................................................. 95
D HDTV ................................................................. 37
disable (end code) ............................................. 86 high resolution .................................................. 37
disable (pre-clipping) ....................................... 83 high speed shrink ............................................. 81
horizontal inversion ......................................... 77
VDP1 User's Manual 161
I
inside drawing mode ............................... 84, 115 plot trigger mode ..................................................45
interlace mode ................................................... 43 plot trigger mode register....................................45
interrupt signal .................................................. 52 point coordinate data .........................................105
inversion (horizontal, vertical) ....................... 77 polling ....................................................................52
polygon draw command ...................................126
J polygons .................................................................10
jump assign ........................................................ 72 polyline draw command ...................................128
jump call ............................................................. 72 polylines ................................................................. 11
jump mode ......................................................... 72 pre-clipping ...........................................................83
jump next ........................................................... 72 last operation table address (register) ................54
jump return ........................................................ 72 pseudo draw continuation ..................................56
L R
line draw command ....................................... 130 read direction (character) .....................................77
lines ..................................................................... 11 read/write access (VRAM)..................................19
LINK specification ............................................ 78 referencing (of tables) ...........................................31
local coordinate set command ...................... 116 registers (system) ..................................................34
local coordinates ............................................. 117 replace ....................................................................94
lookup table mode ............................................ 89 reset .........................................................................23
luminance (Gouraud shading) ........................ 64 RGB code ................................................................91
luminance (RGB) ............................................... 91 RGB mode ..............................................................89
M S
manual mode ..................................................... 39 scaled sprite .............................................................6
mesh enable ....................................................... 85 scaled sprite draw command ............................120
mode 0 (color mode) ........................................ 90 screen modes ...................................................14, 37
mode 1 (color mode) ........................................ 90 shadow (color calculation) ..................................94
mode 2 (color mode) ........................................ 91 shadow (MSB ON) ................................................97
mode 3 (color mode) ........................................ 91 single interlace ......................................................43
mode 4 (color mode) ........................................ 91 skip assign..............................................................72
mode 5 (color mode) ........................................ 91 skip call...................................................................72
mode status register ......................................... 57 skip next .................................................................72
MSB ON ............................................................. 97 skip return ..............................................................72
specification of coordinates
N of two points (scaled sprite draw command) .120
non-textured color .................................... 13, 102 specification of coordinates
non-textured parts ............................................ 10 of two points (scaled sprites) ................................6
non-textured draw commands ..................... 109 specification of zoom point
normal sprite ....................................................... 5 (scaled sprite draw command) .........................122
normal sprite draw command ...................... 118 specification of zoom point (scaled sprites) ........7
NTSC system ..................................................... 37 sprite IC ....................................................................2
subroutines (jump call, skip call)..................30, 72
O system clipping ................................................... 111
odd lines ............................................................. 43 system clipping coordinate set command....... 110
order of priority (frame buffer) ....................... 20 system controller.....................................................2
order of priority (VRAM) ................................ 19 system registers ...........................................2, 23, 34
original picture .................................................. 94
outside drawing mode ............................. 84, 115
P
PAL system ........................................................ 37
palette code ........................................................ 89
parts ...................................................................... 4
162
T
table referencing flow ....................................... 31
tables (in VRAM) ........................................ 24, 59
texture draw commands ................................ 109
textured parts ...................................................... 5
transfer end status register .............................. 52
transfer-over ...................................................... 53
transparent color code ...................................... 88
transparent pixel disable ................................. 88
trigger (draw) .................................................... 45
TV mode selection bit ....................................... 36
TV mode selection register .............................. 36
U
user clipping .................................................... 113
user clipping coordinate set command ....... 112
user clipping enable ......................................... 84
user clipping mode ........................................... 84
V
V-blank erase/write enable bit ....................... 36
VDP1 ..................................................................... 1
VDP1 Functions .................................................. 3
VDP2 ..................................................................... 2
version number ................................................. 57
vertex coordinate data.................................... 105
vertical inversion .............................................. 77
VRAM ............................................................. 2, 19
W
window (MSB ON) ........................................... 97
word access (VRAM) ........................................ 19
Z
zoom point(fixed point) ................................... 73
VDP1 User's Manual 163
TM
VDP2
User's Manual
Version 1.1
Doc. #ST-58-R2-060194
© 1994 SEGA. All Rights Reserved.
REFERENCES
In translating/creating this document, certain technical words and/or phrases were interpreted
with the assistance of the technical literature listed below.
1. KenKyusha New Japanese-English Dictionary
1974 Edition
2. Nelson’s Japanese-English Character Dictionary
2nd revised version
3. Microsoft Computer Dictionary
4. Japanese-English Computer Terms Dictionary
Nichigai Associates
4th version
Preface
This manual describes the VDP2 (Video Display Processor 2) and how to use it. The VDP2
controls the scroll screen control and the display priority control.
Manual Notations
Notations within this manual are described below.
Binary, hexadecimal
Binary notation has a B attached at the end (as in 100B); however, B may be omitted when
binary notation is obvious. Hexadecimal notation has an H attached at the end (as in 00H
and FFH).
Units
1 Kbyte is 1024 bytes. 1 Mbit is 1024 Kbits, or 1,048,576 bits.
MSB, LSB
The structure of byte and word shows the MSB (most significant bit) on the left and LSB (least
significant bit) on the right.
An undefined bit
A bit not defined by the register is shown as a dash. A “0” should be written into an undefined
bit of the register. Bits not defined by data of tables defined by VRAM are shown as shaded.
As a rule, a 0 should be written, providing that the undefined bit is ignored.
Byte, word, bit
Bits, as in digits of 0 and 1, are the lowest unit of data. A byte consists of 8 bits. A word consists
of 2 bytes, and begins from an even address.
Boundary
A boundary defines data from an address divisible by a selected value. For example, data for a
20H-byte boundary is defined at addresses beginning from 20H, 40H, and so on. A word is a
2-byte boundary.
Address
All addresses defined by VDP2 are relative addresses within VDP2. The first address of VDP2
begins from 5E00000H. For example, VRAM is at 000000H address of the relative address, and
begins from 5E00000H address of the absolute address. The TV screen mode register is at
180000H address of the relative address, and is set at address 5F80000H of the absolute address.
i
Manual Structure
The main items described in each chapter are as follows.
Table 1. Chapters and Main Items
Chapter Name Contents
Chapter 1 VDP2 Functions VDP2 Functions
Chapter 2 TV Screen TV Screen Mode, Normal, Hi-Res, Exclusive
Monitor, Interlace Mode, External Signal,- H
Counter, V-Counter, Exclusive Hi-Res Setting
Chapter 3 RAM VRAM Size, Address Map, VRAM, Color RAM,
Register, VRAM Change, VRAM Bank
Partition, VRAM Access Method, Color RAM
Mode
Chapter 4 Scroll Screen Cell, Character Color Count, Transparent Dot,
Character Pattern, Pattern Name Table,
Special Function Bit, Reverse Function Bit,
Page, Plane, Map, Bitmap, Screen-Over
Process, Mosaic Process
Chapter 5 Normal Scroll Screen Screen Scroll, Scaling, Line Scroll, Vertical Cell
Scroll Coordinates
Chapter 6 Rotation Scroll Screen Rotation Scroll Increment, Rotation Scroll
Screen Display, Rotation Parameter
Coefficient Table
Chapter 7 Line Screen Line Color Screen, Back Screen
Chapter 8 Window Normal Rectangular Window, Normal Line
Window, Sprite Window
Chapter 9 Sprite Data Sprite Type, Sprite Color Mode, Priority, Color
Calculation
Chapter 10 Dot Color Data Palette Format, RGB Format, Sprite Dot, Scroll
Dot, Special Function Code
Chapter 11 Priority Function Priority Number, Line Color Screen Insertion
Chapter 12 Color Calculation Color Calculation, Extended Color Calculation,
Special Color Calculation, Gradation
Calculation
Chapter 13 Color Offset Function Color Offset
Chapter 14 Shadow Function Normal Shadow, MSB Shadow
Chapter 15 How To Use VDP2 Operation Flow Chart, How to use RAM, Bit
Structure
ii
Table 2. Functions, their chapters and sections
Function Details Chapter
Overview ~ 1 VDP2 Functions
TV Screen Configuration, Designate Display 2.1 TV Screen Configuration
Area, Boarder Area
TV Screen TV Screen Mode, Normal, Hi-Res, Exclusive 2.2 TV Screen Mode
Monitor
Interlace, Non-interlace, Single-Density Interlace, 2.3 Interlace Mode
Double-Density Interlace
Address Map 3.1 Address Map
Size 3.1 Address Map
RAM VRAM Change 3.2 VRAM Change
Bank Partition 3.3 VRAM Bank Partition
Access During Display 3.4 How to Access VRAM
During Display
Color RAM Mode 3.5 Color RAM Mode
Screen Display 4.1 Screen Display Control
Character 4.3 Cell
Color Count
Bitmap Color
Count
Palette Format 10.1 Palette Format Dot Color
Color Dot Color Data Data
RGB Format 10.2 RGB Format Dot Color Data
Normal Scroll Dot Color Data
Screen
Rotation Scroll Color RAM 3.5 Color RAM Mode
Scroll Screen Screen Mode
Cell 4.3 Cell
Character 4.4 Character Pattern
Pattern
Cell Format Pattern Name 4.6 Pattern Name Table (Page)
Table (Page)
Plane 4.7 Plane
Map 4.8 Map
Bitmap Format 4.9 Bitmap
Display Area, Screen-Over 4.10 Display Area
Mosaic Process 4.11 Mosaic Process
Screen Scroll Function 5.1 Screen Scroll Function
Scale Function 5.2 Scale Function
Line Scroll Function, Vertical 5.3 Line & Vertical Cell Scroll
Cell Scroll Function Function
iv
Table 2. Functions, their chapters and sections (continued)
Function Details Chapter
Coordinates Calculation 6.1 Rotation Scroll Coordinates
Calculation
Rotation Display Control 6.2 Rotation Scroll Screen
Display Control
Scroll Screen Rotation Parameter Control 6.3 Rotation Parameter Control
8 Window
Scroll Screen Coefficient Control 6.4 Coefficient Table Control
Line Color Screen 7.1 Line Color Screen
Line Screen 6.4 Coefficient Table Control
11.3 Line Color Screen Insertion
Back Screen 7.2 Back Screen
Window Normal Rectangular Window, Normal Line 8 Window
Window, Sprite Window, Window Effective Area 9.1 Sprite Data
Sprite Data, Type, Color Mode 9.1 Sprite Data
Priority and Color Calculation 9.2 Priority and Color
Calculation
Sprite Sprite Window 8 Window
9.1 Sprite Data
Dot Color Palette Format 10.1 Palette Format Dot Color
Data
Data RGB Format 10.2 RGB Format Dot Color Data
Color RAM Mode 3.5 Color RAM Mode
Priority Function 11.1 Priority Function
9.2 Priority and Color
Calculation
Priority Special Priority Function 11.2 Special Priority Function
10.3 Special Function Code
Line Color Screen Insertion 11.3 Line Color Screen Insertion
7.1 Line Color Screen
Color Calculation Function, 12.1 Color Calculation Function
Extended Color Calculation 7.1 Line Color Screen
Function
Color Special Color Calculation 12.3 Special Color Calculation
Image Process Function Function
10.3 Special Function Code
Gradation Calculation Function 12.2 Gradation Calculation
Function
Color Calculation Window 8 Window
Color Offset Function 13 Color Offset Function
Shadow Normal Shadow, MSB Shadow 14 Shadow Function
9.1 Sprite Data
v
Table of Contents
Preface ............................................................................................................................ i
Manual Notation .................................................................................................. i
Manual Structure ............................................................................................... iii
List of Figures................................................................................................................ xi
List of Tables ............................................................................................................... xiv
Chapter 1 VDP2 Functions ........................................................................................... 1
Introduction......................................................................................................... 2
1.1 System Configuration ................................................................................... 2
1.2 Address Map ................................................................................................ 3
VRAM ..................................................................................................... 3
Color RAM .............................................................................................. 3
Register .................................................................................................. 4
1.3 Scroll Function.............................................................................................. 5
Display Screen ....................................................................................... 5
Scroll Screen .......................................................................................... 6
Line Screen ............................................................................................ 7
Windows ................................................................................................. 7
1.4 Priority Function ........................................................................................... 8
Priority Function...................................................................................... 8
Color Calculation Function ..................................................................... 8
Color Offset Function .............................................................................. 8
Shadow Function .................................................................................... 9
Chapter 2 TV Screen .................................................................................................. 11
2.1 TV Screen Mode ........................................................................................12
Special High Resolution Graphic Mode ................................................ 13
2.2 Interlace Mode............................................................................................ 14
2.3 TV Screen Structure ................................................................................... 15
2.4 TV Screen Mode Register .......................................................................... 16
2.5 External Signals and Scan Conditions ....................................................... 19
External Signal Enable Register ........................................................... 19
Screen Status Register ........................................................................ 21
H Counter Register ............................................................................... 23
V Counter Register ............................................................................... 24
Chapter 3 RAM ...........................................................................................................25
Introduction.......................................................................................................26
3.1 Address Map ..............................................................................................26
VRAM Size Register .............................................................................28
3.2 VRAM Bank Partitioning .............................................................................29
RAM Control Register .......................................................................... 29
3.3 Accessing VRAM During Display Interval .................................................. 31
VRAM Access During Display Interval ................................................. 31
Image Data Access ..............................................................................32
Vertical Cell Scroll Table Data Access .................................................. 35
Read/Write Access by the CPU ............................................................ 35
VRAM Cycle Pattern Selection Process ............................................... 37
vi
VRAM Cycle Pattern Register .............................................................. 39
3.4 Color RAM Mode ........................................................................................ 43
RAM Control Register .......................................................................... 45
Chapter 4 Scroll Screen .............................................................................................. 47
4.1 Screen Display Control .............................................................................. 48
Screen Display Enable Register ........................................................... 48
4.2 Scroll Screen Structure .............................................................................. 50
Cell Format ....................................................................................................... 50
Bit Map Format ................................................................................................. 52
4.3 Cell ............................................................................................................. 53
Character Color Number ...................................................................... 53
Cell Data Configuration ........................................................................ 53
Transparent Dots .................................................................................. 57
RGB Format Dot Data .......................................................................... 58
4.4 Character Patterns ..................................................................................... 59
Character Size and Cell Arrangement .................................................. 59
4.5 Character Control Register ........................................................................ 60
4.6 Pattern Name Table (Page) ........................................................................ 64
Pattern Name Table Data Configuration ............................................... 64
Pattern Name Data ............................................................................... 69
Character Number ................................................................................ 74
Palette Number..................................................................................... 74
Special Function Bit .............................................................................. 74
Reverse (Flip) Function Bit ................................................................... 75
Pattern Name Control Register ............................................................ 76
4.7 Planes ........................................................................................................ 79
Plane Size ............................................................................................ 79
Plane Size Register .............................................................................. 80
4.8 Maps ........................................................................................................... 82
Map Selection Register ........................................................................ 82
Map Size ............................................................................................... 84
Map Offset Register .............................................................................. 85
Normal Scroll Screen Map Register ..................................................... 87
Rotation Scroll Surface Map Register .................................................. 89
4.9 Bit Maps ..................................................................................................... 93
Bit Map Size ......................................................................................... 93
Bit Map Color Number .......................................................................... 93
Bit Map Pattern ..................................................................................... 95
Bit Map Palatte Number ..................................................................... 111
Special Function Bit ............................................................................ 111
Bit Map Palatte Number Register ....................................................... 112
4.10 Display Area ........................................................................................... 114
Display Area ....................................................................................... 114
Screen-Over Process ......................................................................... 115
Display-Over Pattern Name ............................................................... 115
Screen-Over Pattern Name Register ................................................. 116
4.11 Mosaic Process ...................................................................................... 117
Mosaic Control Register ..................................................................... 118
vii
Chapter 5 Normal Scroll Screen ............................................................................... 121
Introduction..................................................................................................... 122
5.1 Screen Scroll Function ............................................................................. 122
Screen Scroll Value Register .............................................................. 123
5.2 Expansion/Contraction Function .............................................................. 126
Coordinate Increment Register .......................................................... 127
Reduction Enable Register ................................................................. 129
5.3 Line and Vertical Cell Scroll Function ....................................................... 131
Line Scroll Function ............................................................................131
Vertical Cell Scroll Function ................................................................ 134
Line and Vertical Cell Scroll Control Register..................................... 137
Line Scroll Table Address Register ..................................................... 140
Vertical Cell Scroll Table Address Register ........................................ 141
Chapter 6 Rotation Scroll Screen ............................................................................. 143
Introduction..................................................................................................... 144
6.1 Rotation Scroll Coordinate Operation ...................................................... 144
6.2 Rotation Scroll Screen Display Control .................................................... 148
RAM Control Register ........................................................................ 148
6.3 Rotation Parameter Control ..................................................................... 151
Data Configuration of the Rotation Parameter Table .......................... 153
Rotation Parameter Table ................................................................... 155
Rotation Parameter Read Control Register ........................................ 157
Rotation Parameter Table Address Register ...................................... 158
Rotation Read Out of the Frame Buffer .............................................. 159
Rotation Parameter Change ............................................................... 160
Rotation Parameter Mode Register .................................................... 162
6.4 Coefficient Table Control .......................................................................... 163
Line Color Screen Data ...................................................................... 164
Bit Configuration of Coefficient Table Data ......................................... 165
Coefficient Table Lead Address .......................................................... 165
Most Significant Bit of Coefficient Data .............................................. 166
RAM Control Register ........................................................................ 167
Coefficient Table Control Register ...................................................... 168
Coefficient Table Address Offset Register .......................................... 170
Chapter 7 Line Screen ..............................................................................................171
Introduction..................................................................................................... 172
7.1 Line Color Screen .................................................................................... 172
Line Color Screen Table Address Register ......................................... 174
7.2 Back Screen ............................................................................................. 175
Back Screen Table Address Register ................................................. 176
Chapter 8 Windows ................................................................................................... 179
8.1 Window Area ............................................................................................ 180
Normal Rectangular Window .............................................................. 180
Window Position Register .................................................................. 181
Normal Line Window .......................................................................... 184
Line Window Table Address Register ................................................. 186
Sprite Window .................................................................................... 187
viii
Sprite Control Register ....................................................................... 188
Window’s Active Area for the Screen.................................................. 189
8.2 Window Process .......................................................................................190
Window Control Register .................................................................... 193
Chapter 9 Sprite Data ...............................................................................................199
9.1 Sprite Data ...............................................................................................200
Sprite Types ........................................................................................ 200
Sprite Color Mode............................................................................... 203
9.2 Priority and Color Calculation ................................................................... 204
Priority Number Selection ................................................................... 204
Color Calculation Enable Conditions .................................................. 205
Color Calculation Ratio Selection ....................................................... 206
Sprite Control Register ....................................................................... 207
Priority Number Register .................................................................... 209
Color Calculation Ratio Registers ...................................................... 210
Chapter 10 Pixels ......................................................................................................213
Introduction..................................................................................................... 214
10.1 Palette Format Pixels .............................................................................214
Sprite Dot Pixels ................................................................................. 214
Scroll Dot Pixels ................................................................................. 216
Color RAM Address Offset Register ................................................... 217
10.2 RGB Format Pixels ................................................................................ 218
Sprite Pixels........................................................................................ 218
Scroll Pixels ........................................................................................ 218
10.3 Special Function Code ........................................................................... 220
Special Function Code Select Register .............................................. 221
Special Function Code Register ......................................................... 222
Chapter 11 Priority Function......................................................................................223
Introduction..................................................................................................... 224
11.1 Priority Function ......................................................................................224
Priority Number................................................................................... 224
Priority Number Register .................................................................... 225
11.2 Special Priority Function ......................................................................... 227
Special Priority Mode Register ........................................................... 229
11.3 Insertion of Line Color Screen ............................................................... 230
Line Color Screen Enable Register .................................................... 231
Chapter 12 Color Calculations ................................................................................... 233
Introduction..................................................................................................... 234
12.1 Color Calculation Function ..................................................................... 234
Normal Color Calculation ................................................................... 234
Extended Color Calculation Function ................................................. 236
12.2 Gradation Calculation Function .............................................................. 238
Color Calculaton Control Register ...................................................... 240
Color Calculation Ratio Register ........................................................ 243
12.3 Special Color Calculation Function ........................................................ 245
Special Color Calculation Mode Register ........................................... 247
ix
Chapter 13 Color Offset Function ............................................................................. 249
Introduction..................................................................................................... 250
13.1 Color Offset Selection ............................................................................250
Color Offset Enable Register .............................................................. 251
Color Offset Select Register ............................................................... 252
Color Offset Register .......................................................................... 253
Chapter 14 Shadow Function ................................................................................... 255
Introduction..................................................................................................... 256
14.1 Shadow Process .................................................................................... 256
Normal Shadow .................................................................................. 256
MSB Shadow ......................................................................................258
Shadow Control Register ................................................................... 259
Chapter 15 How to Use VDP2 .................................................................................. 261
15.1 Operation Flow ....................................................................................... 262
15.2 How to Use RAM .................................................................................... 264
15.3 Bit Configuration Map ............................................................................. 267
Chapter 16 Quick Reference .................................................................................... 295
16.1 Register Map .......................................................................................... 296
16.2 Register Bit List ......................................................................................315
16.3 Register Bit Functions ............................................................................328
16.4 Table List ................................................................................................389
x
Table of Figures
Chapter 1 VDP2 Functions
Figure 1.1 System Configuration ........................................................................ 2
Figure 1.2 Address Map ..................................................................................... 3
Chapter 2 TV Screen
Figure 2.1 Display Method by Interlace Setting ............................................... 14
Figure 2.2 TV Screen Structure........................................................................ 15
Chapter 3 RAM
Figure 3.1 Different Capacities of VRAM Address Map ................................... 27
Figure 3.2 VRAM Cycle Pattern Register ......................................................... 32
Figure 3.3 Access Selection Limits of Pattern Name Table Data ..................... 33
Figure 3.4 Example of Character Pattern Data Read Access
Selection ......................................................................................... 34
Figure 3.5 Access Select Limits of Vertical Cell Scroll Table Data ................... 35
Figure 3.6 CPU Read/Write Access Selection when
VRAM is not Divided into Two Bank ............................................... 36
Figure 3.7 CPU Read/Write Access Selection when
VRAM is Divided into Two Banks ................................................... 37
Figure 3.8 VRAM Cycle Pattern Selection ....................................................... 39
Figure 3.9 Color Data Configuration on Color RAM ......................................... 44
Figure 3.10 Color Data of the Color RAM ........................................................ 45
Chapter 4 Scroll Screen
Figure 4.1 Scroll Screen Configuration of Cell Format ..................................... 50
Figure 4.2 Scroll Screen Configuration of Cell Format and
Corresponding Data Settings ......................................................... 51
Figure 4.3 Scroll Screen Configuration of Bit Map Format............................... 52
Figure 4.4 Relationship of bit map format scroll screen and data settings....... 52
Figure 4.5 Configuration of Cells by Character Color Count ............................ 54
Figure 4.6 RGB Format Dot Data ..................................................................... 58
Figure 4.7 Cell Arrangement by Character Size ............................................... 59
Figure 4.8 Data Configuration of Pattern Name Tables ................................... 65
Figure 4.9 Bit Configuration when Pattern Name Data is 2 Word .................... 69
Figure 4.10 Configuration when Pattern Name Data is 1 Word ....................... 71
Figure 4.11 Dot Color Data by Character Number of Colors ............................ 74
Figure 4.12 Reverse Display of Character Patterns......................................... 75
Figure 4.13 Arrangement of Pattern Name Table by Plane Size ...................... 79
Figure 4.14 Map Selection Register ................................................................. 82
Figure 4.15 Map Size ....................................................................................... 84
Figure 4.16 Plane Arrangement of Map by Reduction Settings ....................... 85
Figure 4.17 Bit Map Pattern Configuration ....................................................... 96
Figure 4.18 Dot Color Data by Bit Map Number of Colors ............................. 111
Figure 4.19 Mosaic Pattern ............................................................................ 117
xi
Chapter 5 Normal Scroll Screen
Figure 5.1 Screen Scroll Value Bit Configuration ........................................... 122
Figure 5.2 Configuration of Coordinate Increment Register........................... 126
Figure 5.3 Line Scroll Function ...................................................................... 131
Figure 5.4 Bit Configuration of Line Scroll Table Data ................................... 132
Figure 5.5 Line Scroll Table ............................................................................133
Figure 5.6 Vertical Cell Scroll Function .......................................................... 134
Figure 5.7 Data Configuration on Vertical Cell Scroll Table ........................... 135
Figure 5.8 Vertical Cell Scroll Table................................................................ 136
Chapter 6 Rotation Scroll Screen
Figure 6.1 Rotation Scroll Screen Display Method ........................................ 145
Figure 6.2 Rotation Parameter data Configuration ........................................ 153
Figure 6.3 Rotation Parameter Table ............................................................. 156
Figure 6.4 How to Store to the Rotation Parameter Table VRAM .................. 157
Figure 6.5 Rotation Parameter Change ......................................................... 161
Figure 6.6 Line Color Screen Data Using Coefficient Data ............................ 164
Figure 6.7 Bit Configuration of Coefficient Table Data ................................... 165
Chapter 7 Line Screen
Figure 7.1 Line Screen ................................................................................... 172
Figure 7.2 Configuration of Line Color Screen Table ..................................... 173
Figure 7.3 Bit Configuration of Line Color Screen Table Data ....................... 173
Figure 7.4 Configuration of Back Screen Table .............................................. 175
Figure 7.5 Bit Configuration of Back Screen Table Data ................................ 176
Chapter 8 Windows
Figure 8.1 Normal Rectangle Window ........................................................... 180
Figure 8.2 Normal Line Window ..................................................................... 184
Figure 8.3 Bit Configuration of Normal Line Window Table Data ................... 184
Figure 8.4 Configuration of Normal Line Window Table ................................. 185
Figure 8.5 Sprite Window ............................................................................... 187
Figure 8.6 Active Area of Windows ................................................................ 189
Figure 8.7 Window Process ........................................................................... 191
Chapter 9 Sprite Data
Figure 9.1 Sprite Types .................................................................................. 201
Chapter 10 Dot Color Data
Figure 10.1 Palette Format Sprite Dot Color Data ......................................... 215
Figure 10.2 Sprite Color RAM Address .......................................................... 215
Figure 10.3 Palette Format Scroll Dot Color Data .......................................... 216
Figure 10.4 Scroll Color RAM Address .......................................................... 216
Figure 10.5 RGB Format Sprite Dot Color Data ............................................. 218
Figure 10.6 RGB Format Scroll Dot Color Data ............................................. 219
Figure 10.7 Dot Color Code Corresponding to Special Function Code ......... 220
xii
Chapter 11 Priority Function
Figure 11.1 Priority Function .......................................................................... 224
Figure 11.2 Line Color Screen Insertion ......................................................... 230
Chapter 12 Color Operations
Figure 12.1 Color Calculation Function ......................................................... 234
Figure 12.2 Color Calculation Ratio Mode ..................................................... 236
Figure 12.3 Expand Color Operation Function ............................................... 237
Figure 12.4 Gradation Calculation Function ................................................... 239
Chapter 13 Color Offset Function
Figure 13.1 Color Offset Data ........................................................................ 250
Chapter 14 Window Function
Figure 14.1 Shadow Function ........................................................................ 256
Figure 14.2 Sprite Data Write of a Normal Shadow ....................................... 257
Figure 14.3 Sprite Data of a Normal Shadow ................................................ 257
Figure 14.4 Sprite Shadow and Transparent Shadow ................................... 258
Figure 14.5 Sprite Data of MSB Shadow ....................................................... 259
xiii
List of Tables
Chapter 1 VDP2 Functions
Table 1.1 TV Screen Mode ................................................................................. 5
Table 1.2 Scroll Screen ..................................................................................... 5
Table 1.3 Windows ............................................................................................. 6
Table 1.4 Scroll Screen Function ....................................................................... 6
Chapter 2 TV Screen
Table 2.1 TV Screen Mode ............................................................................... 12
Table 2.2 Register for Setting the External Screen .......................................... 21
Table 2.3 H Counter Register Bit Content ........................................................ 24
Table 2.4 V Counter Register Bit Content ........................................................ 24
Chapter 3 RAM
Table 3.1 Data Defined in VRAM ..................................................................... 26
Table 3.2 Access Numbers of Required Pattern Name Table Data
during 1 Cycle .................................................................................. 33
Table 3.3 Character Pattern Data (Bit Map Pattern Data)
Read Access Number ...................................................................... 34
Table 3.4 Character Pattern Data Read Access Selection Limits .................... 34
Table 3.5 Access Command .............................................................................40
Chapter 4 Scroll Screen
Table 4.1 Character Color Count and Dot Data Size ....................................... 53
Table 4.2 Cell Data Configuration ....................................................................53
Table 4.3 Transparent Dot Data Values ........................................................... 58
Table 4.4 Pattern Name Table Capacity Page Boundary of One Page ............ 64
Table 4.5 Character Number Auxiliary Mode .................................................... 69
Table 4.6 Bit Configuration when Pattern Name Table is 1 Word .................... 70
Table 4.7 Reverse Function Bit ........................................................................ 75
Table 4.8 Address Value of Map Designation Register by Setting ................... 83
Table 4.9 Bit Map Size .....................................................................................93
Table 4.10 Bit Map Color Count ....................................................................... 94
Table 4.11 Bit Map Pattern Capacity per Surface ........................................... 95
Table 4.12 Normal Scroll Screen Display Area .............................................. 114
Table 4.13 Rotation Scroll Screen Display Area ............................................. 114
Chapter 5 Normal Scroll Screen
Table 5.1 Horizontal Coordinate Increment and Reduction Setting ............... 128
Table 5.2 Display Screen Limits by Setting of Reduction Enable Bit ............. 130
Chapter 6 Rotation Scroll Screen
Table 6.1 Rotation Scroll Screen ................................................................... 144
Table 6.2 Rotation Parameters ....................................................................... 151
Table 6.3 Lease significant bit of Coefficient Parameter
Data Showing the Address Value Separate from
Coefficient Parameter Data Size ..................................................... 166
Table 6.4 Image Processing using RGB0 Coefficient Data MGB Value. ........ 167
xiv
Chapter 8 Windows
Table 8.1 Bit Content of Window Position Register for Horizontal
Coordinates. .................................................................................... 182
Table 8.2 Bit Content of Window Position Register for Vertical
Coordinates. .................................................................................... 183
Chapter 9 Sprite Data
Table 9.1 Shared Bits .....................................................................................200
Table 9.2 Selection of Sprite Priority Number Register .................................. 204
Table 9.3 Selection of Sprite Color Calculation Ratio Register ...................... 206
Chapter 11 Priority Function
Table 11.1 Priority when the Priority Numbers are Equal ............................... 225
Table 11.2 Special Priority Function by Mode ................................................ 228
Chapter 12 Color Operation
Table 12.1 Color Operation Function when in High Resolution
Mode or Special Monitor Mode .................................................... 236
Table 12.2 Expanded Color Calculation Ratio................................................ 238
Table 12.3 Special Color Calculation Mode ................................................... 246
Chapter 15 Method of Using VDP2
Table 15.1 Register Connected with Data Defined in VRAM ......................... 265
xv
Chapter 1 VDP2 Functions
Introduction .......................................................... 2
1.1 System Configuration .................................. 2
1.2 Address Map ............................................... 3
VRAM .................................................... 3
Color RAM ............................................. 3
Register ................................................. 4
1.3 Scroll Function ............................................ 5
Display Screen ...................................... 5
Scroll Screen ......................................... 6
Line Screen .......................................... 7
Windows .......................................... 7
1.4 Priority Function .......................................... 8
Priority Function .................................... 8
Color Calculation Function .................... 8
Color Offset Function ............................ 8
Shadow Function ................................... 9
ST-58-R2 1
Introduction
VDP2 has a scroll and priority function. The scroll function defines the scroll screen,
moves the screen up, down, right, left, and rotates the screen. The priority function
prioritizes the display of multiple scroll screens, sprites, and external screens. It also
processes the images in operations such as color calculation and color offset.
1.1 System Configuration
VDP2 is connected to 4 Mbit or 8 Mbit VRAM and contains 32K bits of color RAM.
Image data is defined in the VRAM and color RAM from the CPU via the SCU.
Image display controlling information is set by each register in the same way. Data
defined by VRAM is read according to the setting of the register, then becomes the
image data of each scroll screen. Image data of each scroll screen and sprite image
data received from VDP1, as well as the external image data received from outside,
become image display data. Display priority is decided by the register setting.
When display image data is in a palette format, color data defined in the color RAM
according to that value is read and displayed. When display image data is in the
RGB format, it is shown as is. In this way, the acquired display color data is output
to the display device. The VDP2 system configuration is shown in Figure 1.1.
External Screen
VDP1 Circuitry
(OPTION)
VDP2
Register
CPU SCU Display Device
Color RAM
VRAM
Figure 1.1 System Configuration
2
1.2 Address Map
In order to define pattern name tables and character pattern data, VDP2 is connected
to two VRAMs. VDP2 contains 32K bits of color RAM for defining color data, and
together with internal registers control VRAM. Figure 1.2 shows VDP2 controlled
VRAM, color RAM, and register address maps.
000000H
VRAM
0FFFFFH
100000H
COLOR-RAM
17FFFFH
180000H
REGISTER
1BFFFFH
Figure 1.2 Address Map
VRAM
VRAM stores scroll screen image data and data tables needed in each function.
Read access by VDP2 is always given priority over read/write access through the
CPU or DMA controller. Consequently, the wait cycle enters the CPU or DMA
controller through the access timing. Access through the CPU or DMA controller is
possible in units of byte, word, and long word.
Color RAM
Color RAM stores color data of sprites and scroll screens. It also defines the enable
bit of the color calculation function as it applies to the most significant bit when
necessary. Read/write access from the CPU or DMA controller is possible, but the
image may be disturbed by the access timing. Access through the CPU or DMA
controller is possible only in word units and long word units. Access in bytes is not
allowed.
ST-58-R2 3
Register
Registers set each VDP2 function. Because the values of most registers are cleared to
0 after power on or reset, the values must be set. Read/write access from the CPU or
DMA controller is always possible, but the image may be poor due to the access
timing. Access by the CPU or DMA controller is possible only in word units and
long word units. Access in bytes is not allowed.
4
1.3 Scroll Function
The VDP2 scroll function has a scroll screen and a window.
Display Screen
The TV screen mode has the following characteristics.
Table 1.1 TV Screen Mode
TV Screen Graphic Mode Horizontal Vertical Display Device
Mode Resolution Resolution
(Pixels) (Pixels)
Normal Normal 320 224 NTSC Format
Graphic A
Normal 352 240 or
Graphic B
Hi-Res Hi-Res 640 256 PAL Format
Graphic A
Hi-Res 704 selection TV
Graphic B
Exclusive Normal 320 480 31kHz Monitor
Graphic A
Exclusive Exclusive Normal 352 480 Hi-Vision Monitor
Graphic B
Monitor Exclusive Hi-Res 640 480 31kHz Monitor
Graphic A
Exclusive Hi-Res 704 480 Hi-Vision Monitor
Graphic B
The scroll screen which can be displayed has the following characteristics.
Table 1.2 Scroll Screen
Scroll Screen Name Name Remarks
Normal Scroll 0 NBG0 Can move up/down/left/
Normal Normal Scroll 1 NBG1 right. Can scale
Scroll Screen Normal Scroll 2 NBG2 Can move up/down/left/
Normal Scroll 3 NBG3 right.
Rotation Rotation Scroll 0 RBG0 Can scale/rotate
Scroll Screen Rotation Scroll 1 RBG1
Line Line Color Screen LNCL Used only in color
calculations
Screen Back Screen BACK Displayed only when
other screens are not
displayed
Expandable Screen External Input Screen EXBG Screen input externally
ST-58-R2 5
The following windows exist:
Table 1.3 Windows
Window Name Name Remarks
Normal Window W0 Line Window allowed
W1
Sprite Window SW Sprite Character Window
Scroll Screen
The functions of the scroll screen are listed in the table below.
Table 1.4 Scroll Screen Function
Function Normal Scroll Screen Rotation Scroll Screen
NBG0 NBG1 NBG2 NBG3 RBG0 RBG1
Character 16 colors 16 colors 16 colors 16 colors 16 colors 16 colors
Color Count 256 colors 256 colors 256 colors 256 colors 256 colors 256 colors
2048 colors 2048 colors selection selection 2048 colors 2048 colors
32,768 colors 32,768 colors 32,768 colors 32,768 colors
16,770,000 colors 16,770,000 colors 16,770,000 colors
selection
selection selection selection
Character 1 Cell H x 1 Cell V; 2 Cells H x 2 Cells V
Size
Pattern Name 1 Word, 2 Words selection
Data Size
Plane Size 1 H x 1 V 1 Pages; 2 H x 1 V 1 Pages; 2 H x 2 V Pages
Plane Count 4 4 4 4 16 16
Bitmap Display Display Display Not Display Not Display Display Not
Display Allowed Allowed Allowed Allowed Allowed Allowed
Bitmap Size 512 H x 256 V Dots None 512 H X 256 V None
512 H x 512 V Dots Dots
1024 H x 256 V Dots 512 H X 512 V
1024 H x 512 V Dots selection
selection
Scale 1/4~256 ratio None Any Ratio
Function
Rotation None Yes
Function
Line Scroll Yes Yes No No No
Function
Vertical Cell Yes Yes No No No
Scroll Function
Mosaic Yes Yes (Horizontal Direction Only)
Process
Function
Note: *There are 2048 colors when the color RAM is in mode 1, and 1024 colors when in mode
0 or 2.
Normal scroll screen changes the number of screens that can be displayed through
each setting.
6
The normal scroll screen can be displayed simultaneously with one rotation scroll
screen. If two rotation scroll screens are displayed, the normal scroll screen cannot
be displayed (the register that sets RBG1 is used for NBG0). When an external input
screen is displayed, NBG1 cannot be displayed. The register setting the external
input screen can be used for NBG1.
Line Screen
The line color screen works for color calculation and on other screens. It can indicate
whether the entire screen consists of one color, or if there is a color for each line, but
it cannot display characters.
The back screen is displayed when all other screens are transparent. The entire
screen is displayed in one color, or a color can be selected for each line, but charac-
ters cannot be displayed.
Windows
A rectangular window can be selected by using the two screen coordinate value
points in the upper left and lower right corners of a normal window. The sprite
window is a window based on sprite characters. There are three types of windows
that can be used and stacked individually for each screen: the “transparent control
window” designates the transparent area; the “color calculation window” designates
the area in which color calculation is not performed; the “rotation parameter win-
dow” changes screens by two rotation parameters.
ST-58-R2 7
1.4 Priority Function
There are four types of VDP2 priority functions: priority function, color calculation
function, color offset function, and shadow function.
Priority Function
The display priority of the sprite and scroll screen is decided by a 3-bit priority
number. The sprite priority number can be set at a maximum value of 8, one of
which is designated by character units. The scroll screen priority number is usually
designated by surface units. When the special priority function is used, character
units and dot units can change the scroll screen priority number.
Color Calculation Function
By adding color data of multiple screens, the color calculation function produces an
effect in which the back screen can be seen through the front screen. It is normally
performed by two screen images, the top image and the second image, but up to
four screens can be peformed when the expanded color calculation function is used.
Surface units determine whether the color calculation is performed. Sprites can be
selected by character units through sprite color calculation condition settings. When
a scroll screen uses the special color calculation function, sprites can be selected by
character units and dot units.
The color calculation ratio of the top and second images can be selected from 32
steps. Sprites can set a maximum of 8 color calculation ratios, among which one can
be selected by character units. The scroll screen is selected by surface units.
When the Gradation function is used, one selected screen can be gradated horizon-
tally and displayed.
Color Offset Function
The color offset function is used for displaying the offset value calculation (subtrac-
tion) for color data, and for fade in and fade out purposes. The color offset function
can be specified by surface unit. Up to two color offset values can be selected for
each RGB, one of which can be specified by surface units.
8
Shadow Function
The shadow function adds shadow to the shapes of sprite characters on each screen.
There are two types of sprite shadow: normal shadow by data, and MSB shadow.
The normal shadow can only add a shadow to the scroll screen. The MSB shadow
can add a shadow to scroll screens and to sprites.
ST-58-R2 9
(This page was blank in the original Japanese document.)
10
Chapter 2 TV Screen
2.1 TV Screen Mode .................................................. 12
Special High Resolution Graphics Mode ............. 13
2.2 Interlace Mode ..................................................... 14
2.3 TV Screen Structure ............................................ 15
2.4 TV Screen Mode Register ................................... 16
2.5 External Signals and Scan Conditions ................ 19
External Signal Enable Register .................... 19
Screen Status Register .................................. 21
H Counter Register ........................................ 23
V Counter Register ........................................ 24
ST-58-R2 11
2.1 TV Screen Mode
VDP2 can display images in 31 kHz monitors as well as high-vision monitors, and in
NTSC and PAL standards for TV. There are three kinds of image displaying TV
screen modes: normal, high-resolution, and special monitor. Screen scan format can
be selected from three types: non-interlace, single-density interlace, and double-
density interlace. A register showing TV scan conditions is also provided.
Table 2.1 shows the TV screen modes that are selectable, the graphics mode, and the
current resolution. Furthermore, special settings are required when indicating
special high-resolution graphics A and special high-resolution graphics B.
Table 2.1 TV Screen Mode
TV Screen Graphics Mode Interlace Mode Horiz X Vertical. Restrictions During
Mode Resolution Use
(Pixels)
Normal 320 X 224
Non-interlace 320 X 240
Normal 320 X 256 PAL standard only
Graphic A 320 X 448
Interlace 320 X 480
320 X 512 PAL standard only
352 X 224
Non-interlace 352 X 240
Normal 352 X 256 PAL standard only
Graphic B 352 X 448
Interlace 352 X 480
352 X 512 PAL standard only
Hi-Res 640 X 224
Non-interlace 640 X 240
Hi-Res 640 X 256 PAL standard only
Graphic A 640 X 448
Interlace 640 X 480
640 X 512 PAL standard only
704 X 224
Non-interlace 704 X 240
Hi-Res 704 X 256 PAL standard only
Graphic B 704 X 448
Interlace 704 X 480
704 X 512 PAL standard only
Non-interlace 320 X 480 31kHz monitor only
Non-interlace 352 X 480 Hi-vision monitor only
Non-interlace 640 X 480 31kHz monitor only
Non-interlace 704 X 480 Hi-vision monitor only
12
Special High-Resolution Graphics Mode
The graphics mode of special high-resolution graphics A or B displays one screen by
joining the NBG0 and NBG1 screens. If the following setting is not performed, the
display will not appear correctly.
• Must be able to display only NBG0 and NBG1.
• The NBG0 and NBG1 character pattern tables (or, bit map pattern) and pattern
name tables must use the exact same data.
• Must be able to reduce both NBG0 and NBG1 horizontally up to 50%.
• Set the vertical direction screen scroll values of NBG0 and NBG1 so that they
are identical.
• Set the NBG1 horizontal screen scroll value at the NBG0 horizontal screen
scroll value plus 1.
• Set both NBG0 and NBG1 horizontal coordinate increments at 2.
• Set the color RAM mode to 0.
• Set the priority numbers of NBG0 and NBG1 at the same value.
• Do not enter the line color screen.
• Special priority of both NBG0 and NBG1 should be in mode 0.
• Do not use the color calculation function.
• For registers other than those listed above, NBG0 and NBG1 settings should
be the same.
ST-58-R2 13
2.2 Interlace Mode
VDP2 interlace mode (screen scan method) consists of non-interlace, single-density
interlace, and double-density interlace modes. The non-interlace mode is 1 field per
frame (1/60 sec.). The single-density interlace mode is 2 fields (1/30 sec.) per frame;
the same image is displayed in even and odd fields. The double-density interlace
mode is 2 fields (1/30 sec.) per 1 frame with separate images being displayed in even
and odd fields. There is no space between scan lines in both the single-density and
double-density interlace modes, but the actual resolution in the vertical direction of
the single-density interlace mode is the same as the resolution in the vertical direction
of the non-interlace mode. Figure 2.1 shows display methods by interlace settings.
8X8 Do t Char act er Pat ter n
● No n- Inter lace Mo de
Be cau se sca nn ing occu rs a t the same a rea i n
eve ry fiel d, some area s may n ot be scan ne d, thu s
crea ting some g ap s.
1 frame p er 1 fiel d (1/60 se c.)
● Singl e Densi ty Int erl ace Mod e
Sca nn in g occu rs i n ea ch o dd an d even field ,
ho weve r, sin ce the same pi cture i s di sp la yed , the
vertica l resol utio n wi ll be si milar to that in the N on-
Interl ace M ode .
1 frame p er 2 fiel ds (1/30 se c.)
●
Å Doub le Den sit y Inter lace Mo de
Sca nn in g occu rs i n ea ch o dd an d even field ,
ho weve r, sin ce di fferent pi ctures are di spl ayed ,
the ve rtica l resol ution wil l b e d ou bl e tha t i n the
Non -Interlace mod e.
1 frame p er 2 fiel ds (1/30 se c.)
Figure 2.1 Display Method by Interlace Setting
14
2.3 TV Screen Structure
In response to the TV screen mode, VDP2 outputs image signals corresponding to
their respective NTSC standard or PAL standard TV, 31 kHz monitor, and high-
vision monitor. The TV screen is a collection of rasters constructed by vertical dis-
play intervals, vertical blank intervals (V blank interval), and their respective hori-
zontal display intervals and horizontal blank intervals (H blank interval). The TV
screen structure is shown in Figure 2.2. The location where horizontal display inter-
vals and vertical display intervals overlap is the standard display area of the various
TV formats. The set display area, where VDP2 is able to display the image, is
slightly smaller than the standard display area. The border area excludes the set
display area from the standard display, and can output either black or the back
screen.
Hor izo nt al Tr acin g Ho rizo nt al Disp lay Hor izon tal Tra ci ng
Per iod Per iod Per iod
Ver tica l Traci ng
Peri od
Boar de rA re a
Ve rtical Displ ay Set ting
Per iod Displ ay Are a
Ver tica l Traci ng Stan da rd
Peri od Displ ay Are a
Stand ar d Displ ayA re a= Setting Displ ay Area+ Boar de r Area
Figure 2.2 TV Screen Structure
ST-58-R2 15
2.4 TV Screen Mode Register
The TV screen mode register controls the TV screen display. It is a read/write 16 bit
register and is at address 180000H. After the power on or reset, the value is cleared
to 0 and therefore must be set.
15 14 13 12 11 10 9 8
TVMD DISP ~ ~ ~ ~ ~ ~ BDCLMD
180000H 7 6 5 4 3 2 1 0
LSMD1 LSMD0 VRESO1 VRESO0 ~ HRESO2 HRESO1 HRESO0
• TV screen display bit : Display bit (DISP), bit 15
Controls picture display to the TV screen.
DISP Process
0 Picture is not displayed on TV screen
1 Picture is displayed on TV screen
Because it is in the blank condition during the display interval when this bit is 0, the
VRAM can be accessed from the CPU or DMA controller at any time. The colors
displayed when this bit is 0 are selected by the BDCLMD bit. Please make sure to
change this bit from 0 to 1 during V blank.
• Border color mode bit (BDCLMD), bit 8
Controls colors displayed by the border area.
BDCLMD Process
0 Displays black
1 Display back screen
Selects colors of all the standard display areas when the DISP bit is 0. However, after
the power on or reset, if this bit is set to 1 without setting DISP bit to 1 even once, the
back screen will not be correctly displayed. When the setting allows the back screen
selection by line, the color displayed in the border area will become the same color
as the lowermost line in the display area.
16
• Interlace mode bit (LSMD1, LSMD0) bits 7 and 6
Designates the interlace mode.
LSMD1 LSMD0 Process
0 0 Non-Interlace
0 1 Setting not allowed
1 0 Single-density interlace
1 1 Double-density interlace
Single-density interlace is a mode that shows the same pictures in odd and even
fields; double-density interlace is a mode that shows different pictures in odd and
even fields. In either case, the spaces between scan lines are not vacant. The vertical
resolution for double-density interlace is twice that of non-interlace, but the vertical
resolution of the actual picture for single-density interlace is the same for non-
interlace. Pictures displayed in double-density interlace are vertically half the size
of pictures displayed in single-density interlace or non-interlace. When the horizon-
tal resolution (HRESO2 to HRESO0) setting is in the exclusive monitor mode, make
sure to select the noninterlaced mode (00B).
• Vertical resolution bit (VRESO1, VRESO0), bit 5, 4
Designates vertical resolution when a picture is displayed on the TV screen.
VRESO1 VRESO0 Vertical Resolution Display Monitor
0 0 224 Lines NTSC or PAL format TV
0 1 240 Lines NTSC or PAL format TV
1 0 256 Lines PAL format TV
1 1 Not Allowed -
Increments when vertical resolution is increased, then are added to the top and
bottom of the screen without changing the screen’s center. When set in the special
monitor mode, the horizontal resolution (HRESO2 to HRESO0) is set to 480 lines.
Settings of this bit are ignored.
ST-58-R2 17
• Horizontal resolution bit (HRESO2 to HRESO0), bit 2 to 0
Selects the horizontal resolution when a picture is displayed on the TV screen.
HRESO2 HRESO1 HRESO0 Horizontal Graphic Mode Display
Resolution Monitor
0 0 0 320 Pixels Normal
Graphic A
0 0 1 352 Pixels Normal NTSC
Graphic B Format or
0 1 0 640 Pixels Hi-Res PAL
Graphic A Format TV
0 1 1 704 Pixels Hi-Res
Graphic B
1 0 0 320 Pixels Exclusive Normal 31kHz Monitor
Graphic A
1 0 1 352 Pixels Exclusive Normal Hi-Vision Monitor
Graphic B
1 1 0 640 Pixels Exclusive Normal 31kHz Monitor
Graphic A
1 1 1 704 Pixels Exclusive Normal Hi-Vision Monitor
Graphic B
When special high-resolution graphics A or B is selected, other registers must be set
as directed. See “Special High Resolution Graphics Mode” on page 13 for more
information. When switching the TV mode from exclusive monitor mode to normal
mode or hi-res mode, make sure to reset the VDP2.
18
2.5 External Signals and Scan Conditions
The register controlling external signals has an external signal enable register. The
register displaying TV scan conditions has a screen status register, H counter regis-
ter, and V counter register.
External Signal Enable Register
The external signal enable register controls signals from the VDP2 exterior. It is a
read/write 16 bit register and is at address 180002H. After the power is turned on or
reset, the value is cleared to 0 and must be set.
15 14 13 12 11 10 9 8
EXTEN ~ ~ ~ ~ ~ ~ EXLTEN EXSYEN
180002H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ DASEL EXBGEN
• External latch enable bit (EXLTEN), bit 9
Selects the condition for latching the HV counter value to the HV counter register.
EXLTEN Condition
0 Latches when reading external signal enable register
1 Latches through external signal
The latched H counter value can read with the H counter register; V counter value
can read with the V counter register. When reading H and V counter values through
external signals such as laser guns, the bit should be set at 1. Otherwise, it should be
set at 0.
• EXSYNC enable bit (EXSYEN), bit 8
Controls input to the internal synchronous circuit of the external sync signal.
EXSYEN Process
0 Does not input external sync signal
1 Inputs external sync signal, and synchronizes TV screen display with the
external
When synchronizing with other devices and screen displays, set to 1 and input an
EXSYNC signal. The normal setting is 0.
• Display area select bit (DASEL), bit1
Designates the image display area. Valid only when the EXBGEN bit is 1.
ST-58-R2 19
DASEL Process
0 Displays screen image only in the set display area
1 Displays screen in the standard display area
When displaying the entire standard display area, images from external screen data
are displayed correctly. Images not in set display areas (sprite, scroll screen, etc.)
need to be made transparent using a window because they are not displayed cor-
rectly.
• EXBG enable bit (EXBGEN), bit 0
Controls input of external screen data.
EXBGEN Process
0 Does not input external screen data
1 Inputs external screen data
Because the data becomes NBG1 screen data when inputting external screen data,
the external screen settings are used for NBG1 as well. Table 2.2 shows the register
bit for setting the external screen.
20
Table 2.2 Register for setting the external screen
Address Bit Number Bit Name
180020H 9 N1TPON Transparent display enable
180028H 13,12 N1CHCN1, N1CHCN0 Character Color Count
8 N1W0A W0 window area
9 N1W0E W0 window enable
10 N1W1A W1 window area
1800D0H 11 N1W1E W1 window enable
12 N1SWA SW window area
13 N1SWE SW window enable
15 N1LOG Window logic
1800E2H 1 N1SDEN Shadow enable
1800E4H 6~4 N1CAOS2~N1CAOS0 Color RAM address offset
1800E8H 1 N1LCEN Line color screen insertion enable
1800EAH 3,2 N1SPRM1, N1SPRM0 Special priority mode
1800ECH 1 N1CCEN Color calculation enable
1800EEH 3,2 N1SCCM, N1SCCM0 Special color calculation mode
1800F8H 10~8 N1PRIN2~N1PRIN0 Priority number
180118H 12~8 N1CCRT4~N1CCRT0 Color Calculation Ratio
180110H 1 N1COEN Color offset enable
180112H 1 N1COSL Color offset select
Screen Status Register
The screen status register displays TV screen information. This read exclusive 16-bit
register is at address 180004H.
15 14 13 12 11 10 9 8
TVSTAT ~ ~ ~ ~ ~ ~ EXLTFG EXSYFG
180004H 7 6 5 4 3 2 1 0
~ ~ ~ ~ VBLANK HBLANK ODD PAL
ST-58-R2 21
• External latch flag (EXLTFG), bit 9
Through external signals, this displays whether the HV counter value is latched to
the HV counter register. Clears to 0 when the screen status register reads out.
EXLTFG HV Counter Value Status
0 Not latched in register
1 Latched in register
• External SYNC flag (EXSYFG), bit 8
Displays whether the internal routes through External SYNC flag are in sync.
Clears to 0 when the screen status register reads out.
EXSYFG External Sync Status
0 Not synchronized
1 Internal circuit synchronized
• Vertical blank flag (VBLANK), bit 3
Displays the vertical scan status of the TV screen.
VBLANK Vertical Scan Status
0 During vertical scan
1 During vertical re-trace (VBLANK)
• Horizontal blank flag (HBLANK), bit 2
Displays the horizontal scan status of the TV screen.
HBLANK Horizontal Scan Status
0 During horizontal scan
1 During horizontal re-trace (HBLANK)
22
• Scan Field Flag : Odd/even field flag (ODD), bit 1
Scan conditions are shown when the TV screen mode is the interlace mode. The
non-interlace mode is always 1.
ODD Display
0 During even field scan
1 During odd field scan
• TV standard flags : PAL/NTSC flag (PAL), bit 0
Displays TV standards.
PAL Display
0 NTSC standard
1 PAL standard
H Counter Register
The H counter register shows the H counter value. This read exclusive 16-bit regis-
ter is at address 180008H.
15 14 13 12 11 10 9 8
HCNT ~ ~ ~ ~ ~ ~ HCT9 HCT8
180008H 7 6 5 4 3 2 1 0
HCT7 HCT6 HCT5 HCT4 HCT3 HCT2 HCT1 HCT0
• H counter bit (HCT9 to HCT0), bits 9 to 0
Signals controlled through EXLTEN external signal enable register show the latched
H counter values. The bit configuration of this bit changes according to the setting
of the graphics mode, as seen in Table 2.3. For normal graphics of H counter values,
the HCT0 of the least significant bit is invalid data. For special normal graphics of
H counter values, the HCT9 of the most significant bit is invalid data. For the
H counter value of special high-resolution graphics, the most significant bit of HCT9
becomes invalid. Because there is no bit for H0, it shows a value of 2 dot units.
ST-58-R2 23
Table 2.3 H counter register bit content
Graphic HCT9 HCT8 HCT7 HCT6 HCT5 HCT4 HCT3 HCT2 HCT1 HCT0
Mode
Normal H8 H7 H6 H5 H4 H3 H2 H1 H0 Invalid
Hi-Res H9 H8 H7 H6 H5 H4 H3 H2 H1 H0
Exclusive Invalid H8 H7 H6 H5 H4 H3 H2 H1 H0
Normal
Exclusive Invalid H9 H8 H7 H6 H5 H4 H3 H2 H1
Hi-Res
V Counter Register
The V counter register shows the V counter value. This read exclusive 16-bit register
is at address 18000AH.
15 14 13 12 11 10 9 8
VCNT ~ ~ ~ ~ ~ ~ VCT9 VCT8
18000AH 7 6 5 4 3 2 1 0
VCT7 VCT6 VCT5 VCT4 VCT3 VCT2 VCT1 VCT0
• V counter value bit : V counter bit (VCT9~VCT0), bit 9 to 0
Signals controlled through EXLTEN external signal enable register show the latched
V counter values. The bit configuration of this register changes according to the
settings of the TV screen mode, as shown in Table 2.4. The V counter values for
single density interlace of the normal and high resolution modes show V counter
values in their various even and odd fields. The V counter values for double density
interlace of normal and high resolution modes show the odd fields when 0 and even
field when the least significant bit of VCT0 is 1. VCT1~VCT9 show the V counter
values in their respective fields.
Table 2.4 V counter register bit content
TV Screen VCT9 VCT8 VCT7 VCT6 VCT5 VCT4 VCT3 VCT2 VCT1 VCT0
(Interlace) Mode
Normal Hi-Res V8 V7 V6 V5 V4 V3 V2 V1 V0 Invalid
(Non-Interlace,
Single-Density
Interlace)
Normal Hi-Res V8 V7 V6 V5 V4 V3 V2 V1 V0 0: Odd fields
(Double-Density 1: Even fields
Interlace)
Exclusive V9 V8 V7 V6 V5 V4 V3 V2 V1 V0
Monitor
24
Chapter 3 RAM
Introduction...................................................................... 26
3.1 Address Map ............................................................. 26
VRAM Size Register ............................................... 28
3.2 VRAM Bank Partitioning ............................................ 29
RAM Control Register ............................................ 29
3.3 Accessing VRAM During Display Interval ................. 31
VRAM Access During Display Interval ................... 31
Image Data Access ................................................ 32
Vertical Cell Scroll Table Data Access .................... 35
Read/Write Access by the CPU .............................. 35
VRAM Cycle Pattern Selection Process................. 37
VRAM Cycle Pattern Register ................................ 39
3.4 Color RAM Mode ....................................................... 43
RAM Control Register ............................................ 45
ST-58-R2 25
Introduction
VDP2 is connected to special VRAM for defining pattern name tables, character
patterns, and so on. VRAM has two divisions called VRAM-A and VRAM-B, each
having equal capacity. VRAM-A and VRAM-B can each be divided into two banks,
called bank 0 and bank 1. Banks divided with four equal capacities are called
VRAM-A0, VRAM-A1, VRAM-B0, and VRAM-B1. VRAM data is defined in table
3.1. Also contained is color RAM for defining the color data of scroll screens and
sprites.
Table 3.1 Data defined in VRAM
Data that must be defined when Data that must be defined when Data defined as necessary
display format is cell (format) display format is bitmap (format)
Pattern name table data Bitmap pattern data Line scroll table data
Character pattern data Vertical cell scroll table data
Rotation parameter table data
Coefficient table data
Line color screen table data
Back screen table data
Line window table data
3.1 Address Map
VDP2 can be applied to two types of VRAM: 4 Mbit and 8 Mbit. Programs created
for systems using a 4 Mbit VRAM can also be used in systems using 8 Mbit VRAM,
but programs created for systems using an 8 Mbit VRAM cannot be used in systems
using 4 Mbit VRAM.
26
The address map changes according to VRAM capacity being used in the system, as
shown in Figure 3.1.
● VRAM Size: 4M Bit
000000H
VRAM-A0
01FFFFH
020000H
VRAM-A1
03FFFFH
040000H
VRAM-B0
05FFFFH
060000H
VRAM-B1
07FFFFH
● VRAM Size: 8M Bit
000000H
VRAM-A0
03FFFFH
040000H
VRAM-A1
07FFFFH
080000H
VRAM-B0
0BFFFFH
0C0000H
VRAM-B1
0FFFFFH
Figure 3.1 Different Capacities of VRAM Address Map
ST-58-R2 27
VRAM Size Register
The VRAM size register indicates the VRAM capacity to be used in the system. It is
a read/write 16-bit register and is at the 180006H address. Bits 3 to 0 are exclusively
for read only. Because the value of bit15 (VRAMSZ) is cleared to 0 after the power is
turned on or reset, it must be reset.
15 14 13 12 11 10 9 8
VRSIZE VRAMSZ ~ ~ ~ ~ ~ ~ ~
180006H 7 6 5 4 3 2 1 0
~ ~ ~ ~ VER3 VER2 VER1 VER0
VRAM size bit (VRAMSZ), bit 15.
Indicates the VRAM capacity used in the system.
VRAMSZ VRAM Size
0 4 Mbit
1 8 Mbit
This bit must be set before data is written to VRAM.
Version Number Bit (VER3 to VER0), Bits 3 to 0
Shows the VDP2 version number; the first is 0.
28
3.2 VRAM Bank Partitioning
VDP2 can access VRAM-A0, VRAM-A1, VRAM-B0, and VRAM-B1 at the same time
when both VRAM-A and VRAM-B are divided in half. As a result, more image data
can be obtained at once, a higher number of scroll screens can be displayed simulta-
neously, and a screen with multiple colors can be displayed. However, there are
limitations when selecting of VRAM read/write access through the CPU during the
display. Therefore, don’t partition the VRAM into two areas when accessing (read/
write) through the CPU during the display. Normally, accessing can be efficiently
done if divided into two areas.
RAM Control Register
RAM control register selects VRAM bank partitions with the objective of using the
rotation scroll screen VRAM as well as the color RAM mode. It is a read/write
16-bit register and is at the 18000EH address. Also, because the value is cleared to 0,
it must be set after the power is turned on or reset.
15 14 13 12 11 10 9 8
RAMCTL CRKTE ~ CRMD1 CRMD0 ~ ~ VRBMD VRAMD
18000EH 7 6 5 4 3 2 1 0
RDBSB11 RDBSB10 RDBSB01 RDBSB00 RDBSA11 RDBSA10 RDBSA01 RDBSA00
Color RAM Coefficient Table Enable Bit (CRKTE), Bit 15
See “6.4 Coefficient Table Control.”
Color RAM Mode Bit (CRMD1, CRMD0), Bits 13 and 12
See “3.4 Color RAM Mode.” Set the Color RAM mode to mode 1 when the CRKTE
bit is 1. At that time, color data can no longer be stored because the second half of
the color RAM (100800H ~ 100FFFH) is used for the coefficient table data.
VRAM Mode Bit (VRBMD, VRAMD), Bits 9 and 8
Controls VRAM bank partitions.
VRAMD 18000EH Bit 8 For VRAM-A
VRBMD 18000EH Bit 9 For VRAM-B
ST-58-R2 29
VRxMD Process
0 Do not partition in 2 banks
1 Partition in 2 banks
Note: Enter A or B into bit name for x.
Rotation Data Bank Select bit: RBG0 DataBank Select Bit (RDBSA00 to RDBSB11), Bits 7 to 0
See “6.2 Rotation Scroll Screen Display Control”.
When the CRKTE bit is 1, do not designate to allow the 4 banks of VRAM to be used
as RAM for the coefficient table data.
30
3.3 Accessing VRAM During Display Interval
VRAM Access During Display Interval
VDP2 synchronizes scroll screen data with the TV scan and displays them while
reading from VRAM. VRAM access during display repeats the cycle as four or eight
access operating units (1 cycle). When the TV screen mode is the Normal mode, 1
cycle accesses eight times. Also, 1 cycle is accessed four times when in the high-
resolution or special monitor mode. Below are the ten types of VRAM accesses
performed in one cycle:
(1) Normal scroll screen pattern name data read access.
(2) Normal scroll screen character pattern data read access or bit map pattern data read access.
(3) NBG0, NBG1 vertical cell scroll table data read access.
(4) Read/Write access through the CPU.
(5) Does not access.
(6) RGB0 pattern name data read access.
(7) RGB0 character pattern data read access or bit map pattern data read access.
(8) RGB0 coefficient table data read access.
(9) RGB1 pattern name data read access.
(10) RGB1 character pattern data read access.
The timing during the 1 cycle when the above (1) through (5) are performed must be
selected for each bank of VRAM-A0, VRAM-A1, VRAM-B0, and VRAM-B1. This
selection is performed by writing the values of 4 bits, called access commands, to the
VRAM cycle pattern register. Access Commands correspond to the several types of
VRAM access.
Each VRAM access in the above items (6) through (8) occupies a full one cycle,
therefore, for one bank only one type may be selected. This is accomplished by
writing the value corresponding to each VRAM access type to the RAM control
register rotation data bank select bit. The setting of the bank VRAM cycle pattern
register, which select (6) through (8) VRAM access, will become invalid.
Each VRAM access in the above items (9) and (10) occupies a full one cycle. (9) is
fixed in VRAM-B1 and (10) in VRAM-B0. While items (9) and (10) are selected auto-
matically with the display of RGB1, the setting of the VRAM-B0 and VRAM-B1
VRAM cycle pattern registers will become invalid.
ST-58-R2 31
The VRAM cycle pattern register has registers that correspond to the following
banks: VRAM-A0, VRAM-A1, VRAM-B0, VRAM-B1. When the VRAM is not di-
vided into two partitions, the VRAM-A0 register is used for VRAM-A, and the
VRAM-B0 register is used for VRAM-B. Registers for VRAM-A1 and VRAM-B1 are
not used. Registers that correspond to the various banks are separated into eight (T0
to T7) access timings. Access is performed in order, beginning from VRAM access,
showing the access command selected in the T0 bit. T0 to T7 are in effect when the
TV screen is in Normal mode, but only T0 to T3 are in effect for the high-resolution
or special monitor mode; T4 to T7 are ignored. Figure 3.2 shows the VRAM cycle
pattern register used during 1 cycle.
1 pa rtition= 4 Bit, sel ect for VRA M access
T0 T1 T2 T3 T4 T5 T6 T7
Fo r VRAM-A0 (o r VRAM-A )
For VRAM-A 1
Fo r VRAM-B0 (o r VRAM-B )
For VRAM-B 1
Regi st er ena bl ed ran ge (T 0~T 3) in Hi-R es or Excl usive Mon ti or Mod e.
Re gi st er en abl ed ran ge (T0~ T7) in Norm al Mod e
Figure 3.2 VRAM Cycle Pattern Register
Be sure to set “do not access” for the remaining access time after selecting the VRAM
access required in the display. If the VRAM access address selected in the VRAM
cycle pattern register is not the address in the selected bank, access won’t be done
and the correct screen will not be displayed.
Image Data Access
The required image data must be read from VRAM for normal scroll screens (NBG0
to NBG3) to be displayed. When the display format is the cell format, the required
image data is pattern name data and character pattern data. When in a bit map
format, the necessary image data is bit map pattern data . The VRAM access num-
ber for obtaining this image data during 1 cycle is decided by the conditions.
32
Pattern name data read access during 1 cycle must be set to a maximum of two
banks, one being either VRAM-A0 or VRAM-B0, and the other being VRAM-A1 or
VRAM-B1. When the VRAM is not divided into two partitions, the VRAM-A0
register is used as VRAM-A, and the VRAM-B0 register is used as VRAM-B; there-
fore, one or the other must be set. Any access timing may be selected if within the
register’s effective range in all TV screen modes. The access number must be the
same as the number as determined by conditions, but the related timing does not
need to be selected.
The pattern name data read access number is shown in Table 3.2. The pattern name
data read access selection limits are shown in Figure 3.3.
Table 3.2 Access numbers of required pattern name table data during 1 cycle
Item NBG0~NBG3
Reduction setting x1 x1/2 x1/4
Number of VRAM 1 2 4
accesses required
during 1 cycle
T0 T1 T2 T3 T4 T5 T6 T7
Only on e
can be For VRA M- A0 (or VRAM- A)
sel ect ed
For VRAM-A 1
For VRA M- B0 (or VRAM- B)
Only on e
can be For VRAM-B 1
sel ect ed
Reg ist er en ab led ra ng e (T0~ T3) in Hi -Res or Excl usi ve Mo ni tor Mo de
Reg ist er en ab led ra ng e (T0~ T7) in No rma l Mo de
Figure 3.3 Access selection limits of pattern name table data
As a rule, the character pattern data read access during 1 cycle can select any timing
from four banks. However, the timing that can be selected through pattern name
data access timing is limited. Only when the pattern name data access of NBG0 and
NBG1 are selected in T0 can select various character pattern data read accesses
through the timings of any of the four banks be selected with are no limits. The
access number must be selected so that it is the same as the number as determined
by the conditions. The related timing does not need to be selected. Character pattern
data read access numbers are shown in Table 3.3. Character pattern data read access
selection limits are shown in Table 3.4.
ST-58-R2 33
Table 3.3 Character pattern data (bit map pattern data) read access number
Item NBG0~NBG3
32,768 16,770,000
Character 16 256 2048
Color Count
Reduction 1 1/2 1/4 1 1/2 1 1 1
setting
Number of 1 2 4 2 4 4 4 8
VRAM
accesses
required
during 1 cycle
Table 3.4 Character pattern data read access selection limits
Item TV Screen Pattern Name Table Data Access Timing
Mode T0 T1 T2 T3 T4 T5 T6 T7
Timing that Normal T0~T2, T0~T3, T0~T3, T0~T3, T0~T3 T1~T3 T2, T3
can select T4~T7 T5~T7 T6~T7 T7 T3
character Hi-Res, T0~T2 T1~T3 T0, T2, T0, T1, - - - -
pattern data exclusive T3 T3
access monitor
When the reduction setting is one, all of the character pattern data read access must
observe selection limits if the character pattern data read access is to be two or
greater. If the reduction setting is 1/2 or 1/4, the required access number when the
reduction setting is 1 (one time for 16 colors and two times for 256 colors) must
observe selection limits through one time pattern name data read access. Figure 3.4
shows character pattern data read access selection limits when the pattern name
data read access is selected in T1 and T3, with 256 colors and 1/2 reduction.
T0 T1 T2 T3 T4 T5 T6 T7
For VRAM-A0 (o r VRAM-A )
For VRA M- A1
For VRAM-B0 (o r VRAM-B )
For VRA M- B1
T1 's Pat ter n Na me Dat a Read Access with re spe ct to se le ct ab le ran ge (T0~ T3, T5~T 7)
T3 's Pat ter n Na me Dat a Read Access with re spe ct to se le ct ab le ran ge (T0~ T3, T7)
Not e: Ch ar act er Pattern Dat a Rea d Acce ss must be sel ect ed twice in each se le ct ab le
ran ge.
Figure 3.4 Example of character pattern data read access selection
34
Vertical Cell Scroll Table Data Access
When using the vertical cell scroll function in NBG0 and NBG1 {Translator’s Note:
The original document reads NB1, we believe this is an error.}, vertical cell scroll table
data must also be read.
Vertical cell scroll table data read access must be performed for one surface during 1
cycle. Vertical cell scroll table data read access for NBG0 must be selected in T0 or
T1 timing. NBG1 vertical cell scroll table data read access must be selected within
the timing of T0 to T2. Also, access for NBG0 and NBG1 must be by the same bank
and NBG0 access must be selected first.
When specifying the same vertical cell scroll table data read access against multiple
banks, make sure to specify the same access timing.
Figure 3.5 shows access selection limits of vertical cell scroll table data.
T0 T1 T2 T3 T4 T5 T6 T7
For VRA M- A0 (or VRAM-A)
For VRAM-A 1
For VRA M- B0 (or VRAM-B)
For VRAM-B 1
NBG0 ver tical scr oll tabl e acce ss sel ect ab le ran ge (T0 , T1)
NBG1 ver tical scr oll tabl e acce ss sel ect ab le ran ge (T0 ~T2 )
Not e: For NB G0 and NBG1 access timing , NBG0 access must be first sel ect ed in
the sa me bank.
Figure 3.5 Access select limits of vertical cell scroll table data
Read/Write Access by the CPU
When performing read/write access to the VRAM by the CPU during the screen
display interval, the timing must be set to the VRAM cycle pattern register. VDP2
waits for the selected timing in the CPU read/write access when VRAM access is
requested by the CPU, and approves access only in that timing. When read/write
access is not requested by the CPU, nothing will be performed for VRAM, even for
selected timings. Moreover, during read access through the CPU, the wait cycle will
enter the CPU until it is able to read. The write access wait cycle will not be entered
if the two word write access is at least two times.
ST-58-R2 35
VRAM access by the CPU can be selected only in units of access to VRAM-A or
VRAM-B, and can not be selected in bank units.
When selecting VRAM access by the CPU for the VRAM without two partitions, you
should select the CPU read/write access command in the VRAM cycle pattern
register of the timing performing the access. Selecting an access command that does
not access in place of the CPU read/write access command is the same as before. In
the screen display enable register, when the access command (pattern name data
read, character pattern data read, or bit map pattern data read) used for a screen not
set to be displayed is also set, it becomes the CPU read/write access. See “4.1 Screen
Display Control” about the screen display enable register.
When selecting an access command for not to access or CPU read/write with respect
to every access timing of the VRAM that is not partitioned into two areas, the CPU
access will then be always allowed during display period. This allows to use one of
the VRAMs as an auxiliary work RAM. In addition, by switching the VRAM used in
the image display as a frame buffer, the image can be displayed while being rewrit-
ten at a high speed.
Figure 3.6 illustrates the VRAM cycle pattern register selection if CPU read/write
access is being performed in T2 and T4 when VRAM-A is not partitioned.
T2 T3 T4 T5
O the r
CPU Read / No O the r VRAM Cycle Pattern
Access
Wri te Access Access Regi st er f or VRAM-A
Comm an ds Comm an ds
Figure 3.6 CPU Read/Write Access Selection when VRAM is not Divided into Two Bank
When setting the CPU read/write access for the VRAM that is partitioned into two
areas, the CPU read/write access command must be set in the VRAM cycle pattern
register of both bank 0 and bank 1 of the timing performing access. Further, in the
registers of both bank 0 and bank 1 of the timing before the set CPU read/write
access command timing, the access command that won’t access must be selected.
However, when selecting CPU read/write access in linked timing, only the timing
before the lead of the linked access timing may be selected.
Figure 3.7 illustrates the selection of the VRAM cycle pattern register when perform-
ing CPU read/write access linked to T4 and T5 while VRAM-B is divided into two
partitions.
36
T3 T4 T5 T6
NoA ccess Othe r
CPU Rea d/ CPU Rea d/ VRAM Cycle pa ttern Reg ist er
Access
Wr ite Wri te for VRAM-B0
Comm an ds
CPU Re ad / Othe r
CP U Re ad / Access VRA M Cycl e pa ttern Reg ist er
NoA ccess Writ e Wr ti e Comm an ds for VRAM-B1
Figure 3.7 CPU Read/Write Access Selection when VRAM is Divided into Two Banks
VRAM Cycle Pattern Selection Process
Selection process to the VRAM cycle pattern register is listed below.
1. Decide the TV screen mode.
2. Decide whether to partition the VRAM into two segments.
3. Decide the number of character colors of the scroll screen being displayed
and the reduction setting. Also, decide whether to use the vertical cell scroll
function.
4. Decide the VRAM bank that will store the required image data (patternname
data, character pattern data, bit map pattern data) for all scroll screens. Decide
the VRAM bank for storing vertical cell scroll table data when the vertical cell
scroll function is used.
5. Decide whether to read/write access through the CPU.
6. To observe selection limits of various access timings, select access command in
the VRAM cycle pattern register.
ST-58-R2 37
An example of VRAM cycle pattern register selection is shown in Figure 3.8.
<Condition>
Set TV screen in normal mode.
Partition both VRAM-A and VRAM-B into two areas.
Set the scroll screen as follows:
Screen Name Character Colors Reduction
Setting
Vertical Cell Scroll
Function
NBG0 256 Colors x1/2 Do not use
NBG1 256 Colors x1 Use
NBG3 256 Colors x1 -
Banks that store data per each scroll screen:
Screen Name Pattern Name Character Pattern Vertical Cell Scroll Table
NBG0 A0 B0,B1 -
NBG1 A0,A1 B0,B1 A0
NBG3 A1 A1,B0 -
A0: VRAM-A0 A1: VRAM-A1 B0: VRAM-B0 B1: VRAM-B1
Allow CPU read/write access to VRAM-A
<VRAM CYCLE PATTERN REGISTER>
T0 T1 T2 T3 T4 T5 T6 T7
N1CE N0PN N1PN N0PN NA CPU CPU NA For VRAM-A0 (or VRAM-A)
N3PN NA N1PN NA NA CPU CPU N3CG For VRAM-A1
N0CG N0CG N1CG N1CG NA N0CG N0CG N3CG For VRAM-B0 (or VRAM-B)
N0CG N0CG N1CG N1CG NA N0CG N0CG NA For VRAM-B1
N0PN : Pattern name data read for NBG0, N0CG : Character pattern Data Read for NBG
N1PN : Pattern name data read for NBG1, N1CG : Character pattern Data Read for NBG
N3PN : Pattern name data read for NBG3, N3CG : Character pattern Data Read for NBG
N1CE: NBG1 vertical cell scroll table data read, CPU : CPU Read/Write
NA : No access
Figure 3.8 VRAM Cycle Pattern Selection
38
VRAM Cycle Pattern Register
The VRAM cycle pattern register controls the VRAM access during the display
interval. It is a 16-bit write only register with addresses from 180010H to 18001EH.
Because the value is cleared to 0 after the power is turned on or reset, it must be
reset.
15 14 13 12 11 10 9 8
CYCA0L VCP0A03 VCP0A02 VCP0A01 VCP0A00 VCP1A03 VCP1A02 VCP1A01 VCP1A00
180010H 7 6 5 4 3 2 1 0
VCP2A03 VCP2A02 VCP2A01 VCP2A00 VCP3A03 VCP3A02 VCP3A01 VCP3A00
15 14 13 12 11 10 9 8
CYCA0U VCP4A03 VCP4A02 VCP4A01 VCP4A00 VCP5A03 VCP5A02 VCP5A01 VCP5A00
180012H 7 6 5 4 3 2 1 0
VCP6A03 VCP6A02 VCP6A01 VCP6A00 VCP7A03 VCP7A02 VCP7A01 VCP7A00
15 14 13 12 11 10 9 8
CYCA1L VCP0A13 VCP0A12 VCP0A11 VCP0A10 VCP1A13 VCP1A12 VCP1A11 VCP1A10
180014H 7 6 5 4 3 2 1 0
VCP2A13 VCP2A12 VCP2A11 VCP2A10 VCP3A13 VCP3A12 VCP3A11 VCP3A10
15 14 13 12 11 10 9 8
CYCA1U VCP4A13 VCP4A12 VCP4A11 VCP4A10 VCP5A13 VCP5A12 VCP5A11 VCP5A10
180016H 7 6 5 4 3 2 1 0
VCP6A13 VCP6A12 VCP6A11 VCP6A10 VCP7A13 VCP7A12 VCP7A11 VCP7A10
15 14 13 12 11 10 9 8
CYCB0L VCP0B03 VCP0B02 VCP0B01 VCP0B00 VCP1B03 VCP1B02 VCP1B01 VCP1B00
180018H 7 6 5 4 3 2 1 0
VCP2B03 VCP2B02 VCP2B01 VCP2B00 VCP3B03 VCP3B02 VCP3B01 VCP3B00
15 14 13 12 11 10 9 8
CYCB0U VCP4B03 VCP4B02 VCP4B01 VCP4B00 VCP5B03 VCP5B02 VCP5B01 VCP5B00
18001AH 7 6 5 4 3 2 1 0
VCP6B03 VCP6B02 VCP6B01 VCP6B00 VCP7B03 VCP7B02 VCP7B01 VCP7B00
15 14 13 12 11 10 9 8
CYCB1L VCP0B13 VCP0B12 VCP0B11 VCP0B10 VCP1B13 VCP1B12 VCP1B11 VCP1B10
18001CH 7 6 5 4 3 2 1 0
VCP2B13 VCP2B12 VCP2B11 VCP2B10 VCP3B13 VCP3B12 VCP3B11 VCP3B10
15 14 13 12 11 10 9 8
CYCB1U VCP4B13 VCP4B12 VCP4B11 VCP4B10 VCP5B13 VCP5B12 VCP5B11 VCP5B10
18001EH 7 6 5 4 3 2 1 0
VCP6B13 VCP6B12 VCP6B11 VCP6B10 VCP7B13 VCP7B12 VCP7B11 VCP7B10
ST-58-R2 39
Table 3.5 shows access command that corresponds to the content of the VRAM
access during 1 cycle.
Table 3.5 Access command
Access Command Value VRAM Access
VCPnxx3 VCPnxx2 VCPnxx1 VCPnxx0
0 0 0 0 NBG0 Pattern Name Data Read
0 0 0 1 NBG1 Pattern Name Data Read
0 0 1 0 NBG2 Pattern Name Data Read
0 0 1 1 NBG3 Pattern Name Data Read
0 1 0 0 NBG0 Character Pattern Data Read
0 1 0 1 NBG1 Character Pattern Data Read
0 1 1 0 NBG2 Character Pattern Data Read
0 1 1 1 NBG3 Character Pattern Data Read
1 0 0 0 Setting not allowed
1 0 0 1 Setting not allowed
1 0 1 0 Setting not allowed
1 0 1 1 Setting not allowed
1 1 0 0 NBG0 Vertical Cell Scroll Table Data Read
1 1 0 1 NBG1 Vertical Cell Scroll Table Data Read
1 1 1 0 CPU Read/Write
1 1 1 1 No Access
Note: n: 0 to 7 (corresponds to access timing T0 to T7)
xx: A0, A1, B0, B1 (corresponds to VRAM-A0, VRAM-A1, VRAM-B0, VRAM-B1)
VRAM cycle pattern (for VRAM-A0) bit: VRAM cycle pattern bit (VCP0A00 to VCP0A03,
VCP1A00 to VCP1A03, VCP2A00 to VCP2A03, VCP3A00 to VCP3A03, VCP4A00 to VCP4A03,
VCP5A00 to VCP5A03, VCP6A00 to VCP6A03, VCP7A00 to VCP7A03)
Sets the access command of VRAM access that performs in VRAM-A0 (or VRAM-A)
timing T0 to T7.
40
VCP0A00~VCP0A03 180010H Bit 12~15 VRAM-A0 (or VRAM-A) Timing for T0
VCP1A00~VCP1A03 180010H Bit 8~11 VRAM-A0 (or VRAM-A) Timing for T1
VCP2A00~VCP2A03 180010H Bit 4~7 VRAM-A0 (or VRAM-A) Timing for T2
VCP3A00~VCP3A03 180010H Bit 0~3 VRAM-A0 (or VRAM-A) Timing for T3
VCP4A00~VCP4A03 180012H Bit 12~15 VRAM-A0 (or VRAM-A) Timing for T4
VCP5A00~VCP5A03 180012H Bit 8~11 VRAM-A0 (or VRAM-A) Timing for T5
VCP6A00~VCP6A03 180012H Bit 4~7 VRAM-A0 (or VRAM-A) Timing for T6
VCP7A00~VCP7A03 180012H Bit 0~3 VRAM-A0 (or VRAM-A) Timing for T7
VRAM cycle pattern (for VRAM-A1) bit: VRAM cycle pattern bit (VCP0A10 to VCP0A13,
VCP1A10 to VCP1A13, VCP2A10 to VCP2A13, VCP3A10 to VCP3A13, VCP4A10 to VCP4A13,
VCP5A10 to VCP5A13, VCP6A10 to VCP6A13, VCP7A10 to VCP7A13)
Sets the access command of the VRAM access that performs in VRAM-A1 timing T0
to T7.
VCP0A10~VCP0A13 180014H Bit 12~15 VRAM-A1 Timing for T0
VCP1A10~VCP1A13 180014H Bit 8~11 VRAM-A1 Timing for T1
VCP2A10~VCP2A13 180014H Bit 4~7 VRAM-A1 Timing for T2
VCP3A10~VCP3A13 180014H Bit 0~3 VRAM-A1 Timing for T3
VCP4A10~VCP4A13 180016H Bit 12~15 VRAM-A1 Timing for T4
VCP5A10~VCP5A13 180016H Bit 8~11 VRAM-A1 Timing for T5
VCP6A10~VCP6A13 180016H Bit 4~7 VRAM-A1 Timing for T6
VCP7A10~VCP7A13 180016H Bit 0~3 VRAM-A1 Timing for T7
When VRAM is not partitioned in two, the value of this register is ignored.
VRAM cycle pattern (for VRAM-B0) bit: VRAM cycle pattern bit (VCP0B00 to VCP0B03,
VCP1B00 to VCP1B03, VCP2B00 to VCP2B03, VCP3B00 to VCP3B03, VCP4B00 to VCP4B03,
VCP5B00 to VCP5B03, VCP6B00 to VCP6B03, VCP7B00 to VCP7B03)
Sets the access command of VRAM access that performs in VRAM-B0 (or VRAM-B)
timing T0 to T7.
ST-58-R2 41
VCP0B00~VCP0B03 180018H Bit 12~15 VRAM-B0 (or VRAM-B) Timing for T0
VCP1B00~VCP1B03 180018H Bit 8~11 VRAM-B0 (or VRAM-B) Timing for T1
VCP2B00~VCP2B03 180018H Bit 4~7 VRAM-B0 (or VRAM-B) Timing for T2
VCP3B00~VCP3B03 180018H Bit 0~3 VRAM-B0 (or VRAM-B) Timing for T3
VCP4B00~VCP4B03 18001AH Bit 12~15 VRAM-B0 (or VRAM-B) Timing for T4
VCP5B00~VCP5B03 18001AH Bit 8~11 VRAM-B0 (or VRAM-B) Timing for T5
VCP6B00~VCP6B03 18001AH Bit 4~7 VRAM-B0 (or VRAM-B) Timing for T6
VCP7B00~VCP7B03 18001AH Bit 0~3 VRAM-B0 (or VRAM-B) Timing for T7
VRAM cycle pattern (for VRAM-B1) bit: VRAM cycle pattern bit (VCP0B10 to VCP0B13,
VCP1B10 to VCP1B13, VCP2B10 to VCP2B13, VCP3B10 to VCP3B13, VCP4B10 to VCP4B13,
VCP5B10 to VCP5B13, VCP6B10 to VCP6B13, VCP7B10 to VCP7B13).
Sets the access command of VRAM access that performs in VRAM-B1 timing T0 to
T7.
VCP0B10~VCP0B13 18001CH Bit 12~15 VRAM-B1 Timing for T0
VCP1B10~VCP1B13 18001CH Bit 8~11 VRAM-B1 Timing for T1
VCP2B10~VCP2B13 18001CH Bit 4~7 VRAM-B1 Timing for T2
VCP3B10~VCP3B13 18001CH Bit 0~3 VRAM-B1 Timing for T3
VCP4B10~VCP4B13 18001EH Bit 12~15 VRAM-B1 Timing for T4
VCP5B10~VCP5B13 18001EH Bit 8~11 VRAM-B1 Timing for T5
VCP6B10~VCP6B13 18001EH Bit 4~7 VRAM-B1 Timing for T6
VCP7B10~VCP7B13 18001EH Bit 0~3 VRAM-B1 Timing for T7
When VRAM is not partitioned into two areas, the value of this register is ignored.
42
3.4 Color RAM Mode
With 32 Kbits (2 Kword) of color RAM, color data that is stored is used for all scroll
screens and palette format sprites. The color data selects and stores either RGB-5 bit
(15 bit data) or RGB-8 bit (24 bit data). In addition, when dividing it into 16K bits
(1K word) and storing various color data of the same type, the expansion color
calculation function can also be used. There are three methods for storing color data
in color RAM:
(1) Mode 0: RGB in each of 5 bits for a total of 15 bits, 1024 color settings
(2) Mode 1: RGB in each of 5 bits for a total of 15 bits, 2048 color settings
(3) Mode 2: RGB in each of 8 bits for a total of 24 bits, 1024 color settings
Because color data must be set to RGB-8 bit when it is output, a 0 will be added to
the lowest 3 bits if RGB-5 bit color data is stored in the color RAM, . When the
special color calculation mode is set to mode 3, the most significant bit of color RAM
data becomes the color calculation enable bit. See “12.3 Special Color Calculation
Function” about the special color calculation mode.
ST-58-R2 43
Figure 3.9 shows the color data configuration of the color RAM.
Dat a se t for RG B 5-b ti
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CC 5 Bit Blue Dat a 5 Bit G re en Dat a 5 Bit Re d Data
Colo r Da ta
Blue Data O ut put 5 Bit Blue Dat a 0 0 0
Gree n Da ta Out put 5 Bit Green Da ta 0 0 0
Red Dat a Outpu t 5 Bit Red Data 0 0 0
No te: The MSB CC is ena bl e bi t when spe cia l col or ca lcul at ion mode is mo de 3.
Dat a se t for RG B 8-b ti
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Co lor Dat a CC 8 Bit Blue Dat a
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Col or Data 8 Bit Gre en Dat a 8 Bit Red Dat a
Blue Dat a O ut put 8 Bit Blue Dat a
8 Bit Gree n Dat a
Gree n Data Out put
Red Dat a Outpu t 8 Bit Red Dat a
Not e: The MSB CC is en abl e bi t wh en spe ci al co lo r cal cul ation mo de is mode 3.
Sha ded bit ar ea s are ign or ed .
Figure 3.9 Color data configuration on the color RAM
44
Color data written to the color RAM is illustrated in Figure 3.10.
Bit 0
100000H 1K Word
16 bit X 1024 Colors
Same Color Data
16 bit X 1024 Colors 1K Word
100FFFH
Bit 1
100000H
16 bit X 2048 Colors 2K Word
100FFFH
Bit 2
100000H
32 bit X 1024 Colors 2K Word
100FFFH
Figure 3.10 Color Data of the Color RAM
RAM Control Register
The RAM control register selects the bank partitions of the VRAM, the purpose of
using the rotation scroll screen of VRAM, and the color RAM mode. It is a read/
write 16-bit register and is at the 18000EH address. Also, because the value is
cleared to 0, it must be set after the power is turned on or reset.
15 14 13 12 11 10 9 8
RAMCTL CRKTE ~ CRMD1 CRMD0 ~ ~ VRBMD VRAMD
18000EH 7 6 5 4 3 2 1 0
RDBSB11 RDBSB10 RDBSB01 RDBSB00 RDBSA11 RDBSA10 RDBSA01 RDBSA00
Color RAM Coefficient Table Enable Bit (CRKTE), Bit 15
See “6.4 Coefficient Table Control.”
ST-58-R2 45
Color RAM mode bit (CRMD1, CRMD0), bits 13 and 12
Selects the color RAM mode. See “3.4 Color RAM mode.”
Set the Color RAM mode to mode 1 when the CRKTE bit is 1. At that time, color
data can no longer be stored because the second half of the color RAM (100800H ~
100FFFH) is used for the coefficient table data.
CRMD1 CRMD0 Mode Process
0 0 0 RGB each 5 bits, 1024 color settings
0 1 1 RGB each 5 bits, 2048 color settings
1 0 2 RGB each 8 bits, 1024 color settings
1 1 - Setting not allowed
Saving color data to the color RAM must be done after thes bits have been set.
When mode 0 is set, data written to the first half of the color RAM will be written to
the second half at the same time.
VRAM mode bit (VRBMD and VRAMD), bits 9 and 8. (See “ 3.2 VRAM Bank Parti-
tion.”)
Rotation data bank select bit: Data bank select bit (RDBSA01, RDBSA00, RDBSA11,
RDBSA10, RDBSB01, RDBSB00, RDBSB11, RDBSB10)
Designates the use objective of the VRAM of the rotation scroll screen. This bit is
only in effect when the rotation scroll screen is displayed. (See “6.2 Rotation Scroll
Screen Display Control.”)
46
Chapter 4 Scroll Screen
4.1 Screen Display Control .............................................................................. 48
Screen Display Enable Register ........................................................... 48
4.2 Scroll Screen Structure .............................................................................. 50
Cell Format ........................................................................................... 50
Bit Map Format ..................................................................................... 52
4.3 Cell ............................................................................................................. 53
Character Color Number ...................................................................... 53
Cell Data Configuration ........................................................................ 53
Transparent Dots .................................................................................. 57
RGB Format Dot Data .......................................................................... 58
4.4 Character Patterns ..................................................................................... 59
Character Size and Cell Arrangement .................................................. 59
4.5 Character Control Register ........................................................................ 60
4.6 Pattern Name Table (Page) ........................................................................ 64
Pattern Name Table Data Configuration ............................................... 64
Pattern Name Data ............................................................................... 69
Character Number ................................................................................ 74
Palette Number..................................................................................... 74
Special Function Bit .............................................................................. 74
Reverse (Flip) Function Bit ................................................................... 75
Pattern Name Control Register ............................................................ 76
4.7 Planes ........................................................................................................ 79
Plane Size ............................................................................................ 79
Plane Size Register .............................................................................. 80
4.8 Maps ........................................................................................................... 82
Map Selection Register ........................................................................ 82
Map Size ............................................................................................... 84
Map Offset Register .............................................................................. 85
Normal Scroll Screen Map Register ..................................................... 87
Rotation Scroll Surface Map Register .................................................. 89
4.9 Bit Maps ..................................................................................................... 93
Bit Map Size ......................................................................................... 93
Bit Map Color Number .......................................................................... 93
Bit Map Pattern ..................................................................................... 95
Bit Map Palatte Number ..................................................................... 111
Special Function Bit ............................................................................ 111
Bit Map Palatte Number Register ....................................................... 112
4.10 Display Area ........................................................................................... 114
Display Area ....................................................................................... 114
Screen-Over Process ......................................................................... 115
Display-Over Pattern Name ............................................................... 115
Screen-Over Pattern Name Register ................................................. 116
4.11 Mosaic Process ...................................................................................... 117
Mosaic Control Register ..................................................................... 118
ST-58-R2 47
4.1 Screen Display Control
The scroll screen selects screens not displayed by controlling VRAM access used in
the display of each screen, and can also indicate whether to invalidate the dot color
code (transparency code) in each screen, which are the transparent dots of the screen
being displayed.
Screen Display Enable Register
The screen display enable register controls the screen display and transparency code.
With a write-only 16-bit register, its address is 180020H. Because the value of the
register is cleared to 0 after power on or reset, the value must be set.
15 14 13 12 11 10 9 8
BGON ~ ~ ~ R0TPON N3TPON N2TPON N1TPON N0TPON
180020H 7 6 5 4 3 2 1 0
~ ~ R1ON R0ON N3ON N2ON N1ON N0ON
Transparent display enable bit (N0TPON, N1TPON, N2TPON, N3TPON, R0TPON)
Designates whether to nullify the transparency code. For more specifics about the
transparency code see Transparent Dots in section “4.3 Cell.”
N0TPON 180020H Bit 8 For NBG0 (or RBG1)
N1TPON 180020H Bit 9 For NBG1 (or EXBG)
N2TPON 180020H Bit 10 For NBG2
N3TPON 180020H Bit 11 For NBG3
R0TPON 180020H Bit 12 For RBG0
xxTPON Process
0 Validates transparency code (transparency code dots become transparent)
1 Invalidates transparency code (transparency code dots are displayed according to da
values)
Note: N0, N1, N2, N3, or R0 is entered into bit name for xx.
48
Screen display enable bit: On bit (N0ON, N1ON, N2ON, N3ON, R0ON, R1ON)
Designates whether to display each scroll screen.
N0TPON 180020H Bit 8 For NBG0 (or RBG1)
N1TPON 180020H Bit 9 For NBG1 (or EXBG)
N2TPON 180020H Bit 10 For NBG2
N3TPON 180020H Bit 11 For NBG3
R0TPON 180020H Bit 12 For RBG0
xxTPON Process
0 Validates transparency code (transparency code dots become transparent)
1 Invalidates transparency code (transparency code dots are displayed according to da
values)
Note: N0, N1, N2, N3, R0, or R1 is entered into bit name xx.
When the screen access command (which has a 0 bit) is set in the VRAM cycle pat-
tern register, the access command is ignored and the VRAM access for displaying
the screen will not be performed.
When R0ON is 0, do not set R1ON at 1.
When both R0ON and R1ON are 1, the normal scroll screen can no longer be dis-
played. At this time, VRAM-B0 is fixed in RAM used for RBG1 character pattern
tables; and VRAM-B1 is fixed in RAM used for RBG1 pattern name tables.
When a specific screens can no longer be displayed by register settings, the screen bit
should be set to 0. For example, when both R0ON and R1ON are 1, set the N0ON,
N1ON, N2ON, N3ON bits at 0. See section “6.2 Rotation Scroll Surface Display
Control” for more about rotation scroll surfaces.
ST-58-R2 49
4.2 Scroll Screen Structure
The scroll screen has two screen formats, the cell format and the bit map format.
Cell Format
The cell format scroll screen is composed of picture pattern “cells” that are 8 H dots
by 8 V dots; cells are arranged in 1 H X 1 V or 2 H X 2 V to form “character pat-
terns.” A “page” is an arrangement of character patterns in 32 H X 32 V or 64 H X 64
V. A “plane” is an arrangement of pages 1 H X 1 V, 2 H X 1 V, or 2 H X 2 V. A
“map” is an arrangement of planes 2 H X 2 V (for normal scroll screens), or 4 H X 4
V (for rotation scroll surface). Figure 4.1 shows the cell format configuration of the
scroll screen.
Cha ra ct er
Cell Pat ter n Pag e Plane Map
8 H do t
X 1 H cel l
8 V dot X
1 V cel l 32 H X 32 V
or or
2 H cel l 1 H pa ge
64 H X 64 V
X X 2 H pl an e
ch ar act er pa ttern
2 V cel l 1 V pa ge X
(64 H X 64 V ce l ) or 2 V pl an e
2 H pa ge (n or mal scr ol l scr ee n)
X or
1 V pa ge 4 H pl an e
or X
2 H pa ge 4 V pl an e
X (r ot at ion scr ol l scr ee n)
2 V pa ge
Figure 4.1 Scroll screen configuration of the cell format
Dot color data stored as character pattern tables in VRAM becomes cell data. Color
data is composed of 4, 8, 16, or 32-bit character color. Character pattern data is cell
data arranged in one or four pieces. Page data is character pattern name data (ad-
dress of character pattern table) stored as a pattern name table. Page data arranged
in one, two, or four pieces is a plane. The map selects the lead address of the pattern
name table in the map register and map offset register. Figure 4.2 shows the con-
figuration of a cell format of the scroll screen and corresponding data settings.
50
Map Register + Ma p Offse t Reg is ter
Map
To p Addre ss of Pla n e A PN T
To p A d dre ss of Plane B PNT
Plane A Plane B
To p Address o f Pla ne C PNT
To p Addre ss of Plane D PN T
Plane C Pla ne D
PNT : Patte rn N ame Ta ble
Pla ne Pa ttern Name Ta ble (V R AM)
C P0 Pa t e rn N a me Da ta
Pag e 0 Page 1
Page 0
CP 10 2 3 Pa tter n Na me D at a
Pag e 2 Page 3 C P0 Pat te rn N a me D a ta
Page 1
C P1 0 23 Pa t e rn N a me Da ta Page
Plane A CP0 CP31
Plane Size R egist e r CP 0 P at ter n N am e D at a
Pla n e Size Page 2
C P1 02 3 Pa t e rn N a me Da ta
C P0 Pat te rn N a me D a ta CP99 2 CP10 23
Page 3
C P1 02 3 P at ter n N am e D at a
Patte rn N ame C ontrol Register
Pattern Na me D ata Size
CP : Character Pattern
C haract er Pa ttern C haract er Pat tern Ta ble (VRAM )
D ot 0 C olor D ata
Cell 0 Cell 1
C ell 0
Cell 2 Cell 3 Dot 63 Co lo r Da ta
Dot 0 Color Dat a
C haract er C ontrol Register C ell 1
C hara ct e r Size Cha ra cter Dot 63 Co lo r Da ta
Patte rn 0 Ce l
Dot 0 Color Dat a Dot 0 Do t 7
C ell 2
Dot 63 Co lo r Da ta
Dot 0 Color Dat a Dot 56 Do t 63
C ell 3
Dot 63 Co lo r Da ta C haracter C ontrol Register
Ch ara cter Co lo r Co unt
N ote: Character pattern and pla ne siz e vary depen din g on the re g is ter setting; ma p siz e varie s
d epending on the scro l scre en type. T he above f ig u re is an exam ple of the ca se w hen cha ra cter
p attern is 2 H cells X 2 V ce l s. Th e plane is 2 H p ages X 2 V p ages and norm al sc roll scre en
(2 H planes X 2 V plane s) .
Figure 4.2 Scroll screen configuration of cell format and corresponding data settings.
ST-58-R2 51
Bit Map Format
The scroll screen of the bit map format is composed of a bit map pattern 512 H (or
1024) dots and 256 V (or 512) dots. When a screen is displayed by the bit map for-
mat, the size of the bit map must be set in the register and the set size of the bit map
pattern must be stored in VRAM. Figure 4.3 shows the scroll screen configuration of
the bit map format. Figure 4.4 shows the relationship of the register and the scroll
screen of the bit map format.
Bitmap
1 Do t
512 H X 256 V dot s
512 H X 512 V dot s
102 4 H X 25 6 Vdo ts
or
1024 H X 51 2 V do ts
Figure 4.3 Scroll screen configuration of the bit map format
Map Offset Re gi st er
VRAM Cha ra ct er Con trol Reg ist er
Map Offset
Dot 0 Col or Data Cha ra ct er Colo r Coun t
Bitmap Shap e Bit ma p
Cha ra ct er Cont rol Regi st er
Bitma p Size
Figure 4.4 Relationship of bit map format scroll screen and data settings
52
4.3 Cell
The cell is a picture pattern 8 H dots by 8 V dots, and is stored in VRAM. The char-
acter color count (number of colors per one cell) can be selected from among 16, 256,
2048, 32,768, or 16,777,216 colors. The amount of RAM required in the size of each
dot color data and in data of one cell changes according to the color count.
Character Color Number
There are two color formats for displaying characters: the palette format and the
RGB format. The palette format treats display color data as color RAM address data
selected by the dot color code within cell data, and palette number within pattern
name data. The RGB format treats cell data as display color data. Table 4.1 shows
the character color count and the number of bits per dot at that time in the various
color formats.
Table 4.1 Character color count and dot data size
Color Format Character Color Count Bit Count for 1 Dot
16 colors 4 bits
Palette Format 256 colors 8 bits
2048 colors 16 bits (Only use lower 11 bits)
RGB Format 32,768 colors 16 bits
16,770,000 colors 32 bits (Only use MSB and lower 24 bits)
Note: In color RAM modes 0 and 2, 2048-color becomes 1024-color.
Cell Data Configuration
The data configuration of each cell stored in a character pattern table changes ac-
cording to the bit count of one dot. The boundary when stored in VRAM is 20H and
has no relationship to the bit count of one dot. Cell data configuration is shown in
Table 4.2 and Figure 4.5.
Table 4.2 Cell Data Configuration
Bit Count for 1 Dot Cell Data Boundary
4 bits/dot 32 bytes/cell 20H byte
8 bits/dot 64 bytes/cell 20H byte
16 bits/dot 128 bytes/cell 20H byte
32 bits/dot 256 bytes/cell 20H byte
ST-58-R2 53
(1) 4 bi ts/ dot (32 byt es/ cel l)
Cha ra ct er Pat ter n Ta bl e (V RA M)
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Dot 0- 0 Dat a Dot 0- 1 Da ta Dot 0- 2 Da ta Dot 0- 3 Da ta
+00H
+02H Do t 0-4 Dat a Dot 0-5 Dat a Dot 0- 6 Da ta Dot 0- 7 Da ta
+1E H Do t 7-4 Dat a Dot 7- 5 Da ta Do t 7-6 Dat a Dot 7- 7 Da ta
Dot 0 1 2 3 4 5 6 7
Dot 0 +00 +01 +02 +03
1 +04 +05 +06 +07
2 +08 +09 +0A +0B
3 + 0C + 0D +0E +0F Cel l
4 +10 +11 +12 +13
5 +14 +15 +16 +17
6 +18 +19 +1A +1B
7 + 1C + 1D +1E +1F
Not e 1: The up pe r le ft not at ion in the cel l is dot 0- 0; to the rig ht ar e dot 0- 1,
do t 0-2 , dot 0- 3, ...
Not e 2: Num be rs in the cel ls ar e VRAM addr esses (Hexa de cim al ) of do t (2
do ts) da ta, wit h VRA M ad dr ess of dot 0- 0, 0- 1 dat a as the
ref ere nce .
Figure 4.5 Data configuration of cells by character color count
54
(2) 8 bi ts/ dot (64 byt es/ cel l)
Cha ra ct er Pat ter n Ta bl e (V RA M)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00H Dot 0- 0 Dat a Dot 0- 1 Dat a
+02H Dot 0- 2 Da ta Do t 0-3 Dat a
+3E H Dot 7- 6 Da ta Dot 7- 7 Dat a
Dot 0 1 2 3 4 5 6 7
Dot 0 +00 +01 +02 +03 +04 +05 +06 +07
1 +08 +09 +0A +0B +0C +0D +0E +0F
2 +10 +11 +12 +13 +14 +15 +16 +17
3 +18 +19 +1A +1B +1C +1D +1E +1F Cel l
4 +20 +21 +22 +23 +24 +25 +26 +27
5 +28 +29 +2A +2B +2C +2D +2E +2F
6 +30 +31 +32 +33 +34 +35 +36 +37
7 +38 +39 +3A +3B + 3C + 3D +3E +3F
Not e 1: The uppe r lef t no tat ion in the ce l is dot 0- 0; to the rig ht ar e dot 0- 1,
do t 0-2 , dot 0- 3, ...
Not e 2: Num ber s in the cel ls ar e VRAM ad dr esse s (Hexad eci mal ) of do t
da ta, with VRAM ad dr ess of dot 0- 0 dat a as the ref er en ce.
Figure 4.5 Data configuration of cells by character color count (continued)
ST-58-R2 55
(3) 16 bits/ do t (1 28 byt es/ ce l )
Cha ra ct er Pat ter n Ta bl e (V RA M)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00H Dot 0- 0 Dat a
+02H Dot 0- 1 Dat a
+7 EH Dot 7- 7 Dat a
Dot 0 1 2 3 4 5 6 7
Dot 0 +00 +02 +04 +06 +08 +0A +0C +0E
1 +10 +12 +14 +16 +18 +1A + 1C +1E
2 +20 +22 +24 +26 +28 +2A + 2C +2E
3 +30 +32 +34 +36 +38 +3A + 3C +3E Cel l
4 +40 +42 +44 +46 +48 +4A + 4C +4E
5 +50 +52 +54 +56 +58 +5A + 5C +5E
6 +60 +62 +64 +66 +68 +6A + 6C +6E
7 +70 +72 +74 +76 +78 +7A +7C +7E
Not e 1: The upp er lef t no tat io n in the ce ll is dot 0- 0; to the righ t ar e do t 0-1 ,
dot 0- 2, dot 0- 3, ...
Not e 2: Numb er s in the cel ls are VRAM add re sses (Hexa de cim al) of dot
dat a, with VRAM ad dr ess of dot 0- 0 da ta as the re fer en ce.
Figure 4.5 Data configuration of cells by character color count (continued)
56
(4) 32 bits/ do t (2 56 byt es/ ce l )
Cha ra ct er Pat ter n Ta bl e (V RA M)
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00H Dot 0- 0 Da ta (M ost si gn fi ica nt wor d)
+02H Dot 0- 0 Da ta (L ea st si gn ificant wor d)
+0 4H Dot 0- 1 Da ta (M ost si gn fi ica nt wor d)
+FCH Dot 7- 7 Da ta (M ost si gn fi ica nt wor d)
+F EH Dot 7- 7 Da ta (L ea st si gn ificant wor d)
Do t 0 1 2 3 4 5 6 7
Do t 0 +00 +04 +08 +0C +10 +14 +18 +1C
1 +20 +24 +28 + 2C +30 +34 +38 +3C
2 +40 +44 +48 + 4C +50 +54 +58 +5C
3 +60 +64 +68 + 6C +70 +74 +78 +7C Cel l
4 +80 +84 +88 + 8C +90 +94 +98 +9C
5 +A0 +A4 +A8 +AC +B0 +B4 +B8 +BC
6 +C0 + C4 + C8 +CC + D0 +D4 +D8 +D C
7 +E0 +E4 +E8 + EC +F 0 +F 4 +F 8 +F C
Not e 1: The uppe r lef t no tat io n in the ce l is dot 0- 0; to the rig ht ar e dot 0- 1,
do t 0-2 , dot 0- 3, ...
Not e 2: Numb er s in the cel ls ar e VRAM addr esses (Hexadeci mal ) of do t
da ta (M SW), with VRAM ad dr ess of dot 0- 0 da ta (MSW) as the
ref ere nce .
Figure 4.5 Data configuration of cells by character color count (continued)
Transparent Dots
Dot color code, which are transparent dots (transparency code), changes according
to the color format. When the color format is the palette format, the transparent dot
applies when all bits per one dot is 0; when the RGB format, the transparent dot
applies when the most significant bit of the dot data is 0.
When in the palette format, lead color data of the palette corresponds to the trans-
parency code; therefore, it normally cannot be used. If the transparency code is
nullified, this color data can be used. Control is done by the screen display enable
register. Table 4.3 shows the transparent dot data values.
ST-58-R2 57
Table 4.3 Transparent dot data values
Color Format Character Color Bit Count for 1 Dot Transparency Code
Count
16 colors 4 bits/dot 0H (4 bit)
Palette Format 256 colors 8 bits/dot 00H (8 bit)
2048 colors 16 bits/dot 000H (lower 11 bits)
RGB Format 32,768 colors 16 bits/dot MSB (bit 15) is 0
16,770,000 colors 32 bits/dot MSB (bit 31) is 0
RGB Format Dot Data
When the color format is the RGB format, the character color count can be selected
from two groups: 32,768 colors and 16,770,000 colors. 16,770,000 colors are desig-
nated by RGB 8-bit; but 32,768 colors designate the higher 5 bits within RGB 8-bit,
and the lower 3 bits are set to 0. The transparency bit designates whether it is a
transparent dot. The most significant bit is a transparent dot when 0. In the screen
display enable register, when the transparency code is indicated as invalid, the
transparent bit is ignored. Figure 4.6 shows the dot data of the RGB format.
Wh en 32 76 8 Colo rs
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Tra nsp ar en t Blue Dat a Gree n Da ta Re d Da ta
Bit
7 6 5 4 3 7 6 5 4 3 7 6 5 4 3
Wh en 16 ,770, 00 0 Col ors
Bit 32 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Tr an spa re nt Blue Da ta
Bit 7 6 5 4 3 2 1 0
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Gre en Dat a Red Dat a
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
Not e: Shade d bi ts are ign or ed
Figure 4.6 RGB format dot data
58
4.4 Character Patterns
Character patterns are perfect squares composed of 1 or 4 cells; the size is specified
in their respective registers.
Character Size and Cell Arrangement
When the character pattern is composed of four cells, the data of a cell that is used in
the same character pattern must be linked to and stored in a character pattern table.
The relationship of cell arrangement by character size (cell number of character
pattern) and character pattern table is shown in Figure 4.7.
Cha ra ct er Pat ter n Ta bl e
Select ed When 1 H cel l X 1 V cel l
Cha ra ct er
Pattern
Addr ess Cell Data 0
Ce ll Da ta 0 8 dot
Hea de r
Addr ess
8 dot
Ce ll Da ta 1
When 2 H cel ls X 2 V cel ls
Cel l Dat a 2
Ce ll Da ta 0 Cel l Dat a 1
16 do t
Cel l Dat a 3
Cel l Dat a 2 Cel l Dat a 3
Cell Data 4
16 do t
Figure 4.7 Cell Arrangement by Character Size
ST-58-R2 59
4.5 Character Control Register
The character control register selects cell and bit map formats, the number of charac-
ter (bit map) colors, and the size of the character pattern or bit map. This register is
a write only 16-bit register located in addresses 180028H to 18002AH. Because the
value of the register is cleared to 0 after the power is turned on or reset, the value
must be set.
15 14 13 12 11 10 9 8
CHCTLA ~ ~ N1CHCN1 N1CHCN0 N1BMSZ1 N1BMSZ0 N1BMEN N1CHSZ
180028H 7 6 5 4 3 2 1 0
~ N0CHCN2 N0CHCN1 N0CHCN0 N0BMSZ1 N0BMSZ0 N0BMEN N0CHSZ
15 14 13 12 11 10 9 8
CHCTLB ~ R0CHCN2 R0CHCN1 R0CHCN0 ~ R0BMSZ R0BMEN R0CHSZ
18002AH 7 6 5 4 3 2 1 0
~ ~ N3CHCN N3CHSZ ~ ~ N2CHCN N2CHSZ
Character color number bit (N0CHCN2 to N0CHCN0, N1CHCN1, N1CHCN0, N2CHCN, N3CHCN,
R0CHCN2 to R0CHCN0)
Designates the character color count of each screen, and the bit map color count
when displaying by the bit map format.
N0CHCN2~N0CHCN0 180028H Bit 6~4 For NBG0 (or RBG1)
N1CHCN1,N1CHCN0 180028H Bit 13,12 For NBG1 (or EXBG)
N2CHCN 18002AH Bit 1 For NBG2
N3CHCN 18002AH Bit 5 For NBG3
R0CHCN2~R0CHCN0 18002AH Bit 14~12 For RBG0
N0CHCN2 N0CHCN1 N0CHCN0 TV Screen Mode Color
Normal Hi-Res Exclusive Format
Monitor
0 0 0 16 colors 16 colors 16 colors Palette Format
0 0 1 256 colors 256 colors 256 colors Palette Format
0 1 0 2048 colors 2048 colors 2048 colors Palette Format
0 1 1 32,786 colors 32,786 colors 32,786 colors RGB Format
1 0 0 16,770,000 Setting not Setting not RGB Format
colors allowed allowed
1 0 1 Setting not allowed (Please do not set.)
1 1 0 Setting not allowed (Please do not set.)
1 1 1 Setting not allowed (Please do not set.)
Note: Cannot be displayed by the exclusive monitor mode when used as RBG1.
60
N1CHCN1 N1CHCN0 TV Screen Mode Color Format
Normal Hi-Res Exclusive
Monitor
0 0 16 colors 16 colors 16 colors Palette Format
0 1 256 colors 256 colors 256 colors Palette Format
1 0 2048 colors 2048 colors 2048 colors Palette Format
1 1 32,786 colors 32,786 colors 32,786 colors RGB Format
Note: When used as EXBG, and when the set values are N1CHCN1 = 1, N1CHCN0 = 1 there are
16,770,000 colors
NnCHCN0 TV Screen Mode Color Format
Normal Hi-Res Exclusive
Monitor
0 16 colors 16 colors 16 colors Palette Format
1 256 colors 256 colors 256 colors Palette Format
Note: 2 or 3 is entered in bit name for n.
R0CHCN2 R0CHCN1 R0CHCN0 TV Screen Mode Color
Normal Hi-Res Exclusive Format
Monitor
0 0 0 16 colors 16 colors Cannot Display Palette Format
0 0 1 256 colors 256 colors Cannot Display Palette Format
0 1 0 2048 colors 2048 colors Cannot Display Palette Format
0 1 1 32,786 colors 32,786 colors Cannot Display RGB Format
1 0 0 16,770,000 Setting not Cannot Display RGB Format
colors allowed
1 0 1 Setting not allowed (Please do not set.)
1 1 0 Setting not allowed (Please do not set.)
1 1 1 Setting not allowed (Please do not set.)
Depending on the color count of NBG0 and NBG1, the scroll screen that cannot be
displayed will appear. When NBG0 is set at 2048 or 32,768 colors, NBG2 can no
longer be displayed. When NBG0 is set at 16,770,000 colors, NBG1 to NBG3 can no
longer be displayed. When NBG1 is set at 2048 or 32,768 colors, NBG3 can no longer
be displayed.
ST-58-R2 61
Bit map size bit (N0BMSZ1, N0BMSZ0, N1BMSZ1, N1BMSZ0, R0BMSZ)
Designates the bit map size of each screen when display is in a bit map format.
N0BMSZ1,N0BMSZ0 180028H Bit 3,2 For NBG0
N1BMSZ1,N1BMSZ0 180028H Bit 11,10 For NBG1
R0BMSZ 18002AH Bit 10 For RBG0
NnBMSZ1 NnBMSZ0 Bitmap Size
0 0 512 H dots X 256 V dots
0 1 512 H dots X 512 V dots
1 0 1024 H dots X 256 V dots
1 1 1024 H dots X 512 V dots
Note: 0 or 1 is entered in bit name for n.
ROBMSZ Bitmap Size
0 512 H dots X 256 V dots
1 512 H dots X 512 V dots
Bit map enable bit (N0BMEN, N1BMEN, R0BMEN)
Designates whether to display the scroll screen in a bit map format.
N0BMEN 180028H Bit 1 For NBG0
N1BMEN 180028H Bit 9 For NBG1
R0BMEN 18002AH Bit 9 For RBG0
xxBMEN Screen Display Format
0 Cell Format
1 Bitmap Format
Note: N0, N1, or R0 is entered in bit name for xx.
62
Character size bit (N0CHSZ, N1CHSZ, N2CHSZ, N3CHSZ, R0CHSZ)
Designates the character size when the scroll screen is in a cell format.
N0CHSZ 180028H Bit 0 For NBG0 (or RBG1)
N1CHSZ 180028H Bit 8 For NBG1
N2CHSZ 18002AH Bit 0 For NBG2
N3CHSZ 18002AH Bit 4 For NBG3
ROCHSZ 18002AH Bit 8 For RBG0
xxCHSZ Character Pattern Size
0 1 H Cell X 1 V Cell
1 2 H Cells X 2 V Cells
Note: N0, N1, N2, N3, or R0 is entered in bit name for xx.
ST-58-R2 63
4.6 Pattern Name Table (Page)
Pattern name table (or page) stores the method of arrangement when the character
pattern is in a square the size of a 64 X 64 cell in the VRAM. It also arranges pattern
name data in table form and stores it in VRAM. Pattern name data selects the lead
address of the character pattern stored in VRAM and the control information for
each character pattern. Pattern name data in a pattern name table is in one-word or
two-word. When in one-word, auxiliary data of the least significant 10 bits of the
pattern name control register is added to make up for insufficient bits.
Pattern Name Table Data Configuration
The boundary stored in VRAM and VRAM capacity required in a pattern name table
of 64 X 64 cells (1 page) change depending on the pattern name data size (word
count) and character size. The capacity and data configuration of pattern name
tables are shown in Table 4.4 and Figure 4.8.
Table 4.4 Pattern name table capacity and page boundary of one page
Pattern Name Data Character Size Contents of 1 Boundary During
Size Page VRAM Storage
1 Word 1 H Cell X 1 V Cell 8192 Bytes 2000H
2 H Cells X 2 V Cells 2048 Bytes 800H
2 Words 1 H Cell X 1 V Cell 16,384 Bytes 4000H
2 H Cells X 2 V Cells 4096 Bytes 1000H
64
(1) Pat tern Nam e Dat a Size : 1 wor d
Char act er Pat ter n Size : 1 H cel l X 1 V cel l
Pattern Nam e Ta bl e (V RA M)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00 00H Cha ract er Pat ter n 0- 0 Pat ter n Name Dat a
+00 02H Char act er Patter n 0- 1 Pat ter n Na me Dat a
+1F FEH Char act er Pattern 63- 63 Patter n Nam e Data
Ch ar act er
Pattern 0 1 2 61 62 63
Char act er
Pat ter n 0 +000 0 +0002 +000 4 +007A +007C +007E
+0080 +0082 +0084 +00FA +00FC +00F E
1
Page
62 +1F0 0 +1F0 2 +1F0 4 +1F7 A +1F7 C +1F7 E
63 +1F8 0 +1F8 2 +1F8 4 +1F FA +1FFC +1F FE
No te 1: The up per -lef t no tat ion in the page is ch ar act er pa ttern 0- 0; to the right ar e
char act er pat terns 0-1 , 0-2 , 0-3 , ...
No te 2: Num be rs in the pag es are VRAM adr addresses
esse s (He
(Hexadecimal)
xad eci mal ) ofofpapattern
ttern naname
me da
data
ta
of ch ar act er pa ttern s, with VRAM addr ess of cha ra ct er pat ter n 0-0 pat ter n nam e
dat a as the ref er en ce.
Figure 4.8 Data configuration of pattern name tables
ST-58-R2 65
(2) Pat tern Nam e Dat a Size : 1 wor d
Char act er Pat ter n Size : 2 H cel ls X 2 V cel ls
Pattern Nam e Ta bl e (V RA M)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00 0H Cha ract er Pat ter n 0- 0 Pat ter n Name Dat a
+00 2H Char act er Pattern 0-1 Pattern Nam e Da ta
+7FE H Cha ra ct er Pat ter n 31- 31 Pattern Nam e Da ta
Cha ract er
Pat ter n 0 1 2 29 30 31
Cha ra ct er +000 +002 +004 +03A +03C +03E
Pat ter n 0
+040 +042 +044 +07A +07C +07E
1
Pag e
30 +780 +782 +784 +7BA +7BC +7BE
31 +7C0 +7C2 +7C4 +7FA +7FC +7FE
No te 1: The up pe r- lef t no tat io n in the pag e is ch ar act er pa ttern 0- 0; to the righ t ar e
cha ra ct er pat ter ns 0-1 , 0-2 , 0-3 , ...
No te 2: Num be rs in the pag es are VRAM adr addresses
esse s (Hexad
(Hexadecimal)
eci mal ) ofofpapattern
ttern naname
me
da ta of ch ar act er pa ttern s, with VRAM ad dr ess of char act er pat tern 0-0
pa tter n na me da ta as the re fere nce .
Figure 4.8 Data configuration of pattern name tables (continued)
66
(3) Pat tern Nam e Dat a Size : 2 wor ds
Char act er Pat ter n Size : 1 H cel l X 1 V cel l
Pattern Nam e Ta bl e (V RA M)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+000 0H Ch ar act er Pattern 0- 0 Patter n Nam e Data (Most sig ni fica nt word )
+000 2H Cha ract er Pat ter n 0- 0 Pat ter n Name Dat a (Le ast si gni fican t word )
+000 4H Char act er Pat ter n 0- 1 Pat ter n Name Dat a (Mo st si gni fican t wor d)
+3F FCH Char act er Patter n 63 -6 3 Pat ter n Name Dat a (Most si gni fican t wor d)
+3F FEH Char act er Pat ter n 63 -6 3 Pat ter n Name Dat a (Le ast sig ni fican t word )
Ch ar act er
Pattern 0 1 2 61 62 63
Cha ra ct er
+0000 +0004 +0008 +00F4 +00F8 +00FC
Pat ter n 0 +0002
+0006 +000A +00F6 +00FA +00FE
+0100 +0104 +0108 + 01 F 4 + 01 F 8 +01FC
1 +0102 +0106 +010A + 01 F 6 +01FA +01FE
Pag e
+3E00 +3E04 +3E0 8 +3EF 4 +3EF8 +3EFC
62 +3E02 +3E06 +3E0A +3EF 6 +3EFA +3EFE
+3F0 0 + 3F 04 +3F0 8 +3FF4 +3F F8 +3FF C
63 +3F0 2 + 3F 06 +3F0 A +3FF6 +3FFA +3F FE
No te 1: The up pe r- lef t no tat io n in the pag e is ch ar act er pa ttern 0- 0; to the righ t ar e
cha ra ct er pat ter ns 0-1 , 0-2 , 0-3 , ...
No te 2: Num be rs in the pag es are VRAM adr addresses
esse s (Hexad
(Hexadecimal)
eci mal ) of ofpapattern
ttern naname
me
da ta of ch ar act er pa ttern s, with VRAM ad dr ess of char act er pat tern 0-0
pa tter n na me da ta as the re fere nce .
Figure 4.8 Data configuration of pattern name tables (continued)
ST-58-R2 67
(4) Pat tern Nam e Dat a Size : 2 wor ds
Char act er Pat ter n Size : 2 H cel ls X 2 V cel ls
Pattern Nam e Ta bl e (V RA M)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0 00 H Cha ra ct er Pat ter n 0-0 Pat tern Nam e Dat a (Mo st si gn ificant wor d)
+0 02 H Char act er Patter n 0- 0 Pat ter n Na me Dat a (Le ast si gni fica nt wo rd )
+0 04 H Ch ar act er Pattern 0- 1 Pat ter n Na me Data (Most sig ni fica nt word )
+FFCH Ch ar act er Pattern 31 -3 1 Pat ter n Na me Dat a (Most si gni fican t word )
+FFEH Char act er Patter n 31 -3 1 Pat ter n Name Dat a (Le ast sig ni fica nt word )
Ch ar act er
Pattern 0 1 2 29 30 31
Char act er +000 +004 +008 +074 +078 +07C
Pat ter n 0 +002 +006 +00A +076 +07A +07E
+080 +084 +088 + 0F 4 +0F8 +0F C
1 +082 +086 +08A + 0F 6 +0FA +0FE
Pag e
+ F0 0 + F0 4 + F0 8 +F7 4 + F7 8 +F 7C
30 + F0 2 +F7 E
+ F0 6 +F0 A +F7 6 +F7 A
+F8 0 + F8 4 +F8 8 +F F4 +FF8 +F FC
31 +F8 2 + F8 6 +F8 A +F F6 +F FA +F FE
No te 1: The up pe r- lef t no tat io n in the pag e is ch ar act er pa ttern 0- 0; to the righ t ar e
cha ra ct er pat ter ns 0-1 , 0-2 , 0-3 , ...
No te 2: Num be rs in the pag es are VRAM adr addresses
esse s (Hexad
(Hexadecimal)
eci mal ) of ofpapattern
ttern naname
me
da ta of ch ar act er pa ttern s, with VRAM ad dr ess of char act er pat tern 0-0
pa tter n na me da ta as the re fere nce .
Figure 4.8 Data configuration of pattern name tables (continued)
68
Pattern Name Data
Pattern name data is composed of the following four fields, for a total of 26 bits.
• Character number 15 bits
• Palette number 7 bits
• Special function bits 2 bits
• Reverse function bits 2 bits
The character number designates the address of the character pattern (VRAM).
The palette number designates the address of the palette (color RAM) used by the
character. The special function bits designate whether that character will use the
special function. The reverse function bits designate whether to use the up-down
reverse or left-right reverse functions.
The size of the pattern name data in the pattern name table can select either 1-word
or 2-word. Because all required pattern name data cannot be designated when 1
word is selected, it is supplemented by auxiliary data of the least significant 10 bits
of the pattern name control register. The composition of pattern name data changes
depending on character size, character number color, and the character number
auxiliary mode. The character number auxiliary mode designates the number of bits
per character number when the pattern name table size in the pattern name table is
1-word, and whether that character can use the reverse function. Table 4.5 shows the
character number auxiliary mode. Figure 4.9 shows the configuration of 2-word
pattern name data, and Figure 4.10 shows the configuration of 1 word pattern name
data.
Table 4.5 Character number auxiliary mode
Character Number Process
Auxiliary Mode
0 Character number that can be specified in pattern name data is 10 bits.
Flip function can be specified in character units.
1 Character number that can be specified in pattern name data is 12 bits.
Flip function cannot be used.
Special Function
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Flip
Function Palette Number
Vertical PR CC 6 5 4 3 2 1 0
Horizontal
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Character Number
.
14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Note: Shaded bits are ignored
PR: Special Priority Bit
CC: Special Color Calculation Bit
Figure 4.9 Bit configuration when the pattern name data is 2 word
ST-58-R2 69
Table 4.6 shows the bit configuration when the pattern name data is 1 word.
Table 4.6 Bit configuration when pattern name data is 1 word.
Character Character Auxiliary Character Palette Special Flip Function
Size Color Count Mode Number Number Function
1X1 16 0 15 * 1 7 2 2
1X1 16 1 15 * 2 7 2 -
1X1 other than 16 0 15 * 1 3 2 2
1X1 other than 16 1 15 * 2 3 2 -
2X2 16 0 15 * 3 7 2 2
2X2 16 1 15 * 4 7 2 -
2X2 other than 16 0 15 * 3 3 2 2
2X2 other than 16 1 15 * 4 3 2 -
2 Words 15 7 2 2
Note: *1 Designates bits 9 to 0 in pattern name data.
*2 Designates bits 11 to 0 in pattern name data.
*3 Designates bits 11 to 2 in pattern name data.
*4 Designates bits 13 to 2 in pattern name data.
70
(1) Ch ar act er Size : 1 H cel l X 1 V cel l
Char act er Col or Coun t: 16 co lor s
Char act er Num be r Suppl eme nt Mo de : Mod e 0
Fli p Fun ct ion
Pattern Nam e Data in Pattern Nam e Ta bl e
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Palet te Num be r Cha ra ct er Num ber
3 2 1 0 9 8 7 6 5 4 3 2 1 0
Vert ica l Hori zon tal
Supp le me nt al Dat a in Pat ter n Na me Con trol Reg ist er
Bit 9 8 7 6 5 4 3 2 1 0
Spe ci al Pale tte No. Cha ra ct er Numb er PR: Sp ecia l Pr io ri ty Bit
Funct io n
CC: Speci al Color Calc ula tion Bit
PR CC 6 5 4 14 13 12 11 10
(2) Ch ar act er Size : 1 H cel l X 1 V cel l
Char act er Col or Coun t: 16 co lor s
Char act er Num be r Suppl eme nt Mo de : Mod e 1
Pattern Nam e Data in Pattern Nam e Ta bl e
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Palet te Num be r Cha ra ct er Num ber
3 2 1 0 11 10 9 8 7 6 5 4 3 2 1 0
Not e: Bot h ve rt ica l an d hor izont al flip fun ct ion bi ts are se t to 0.
Supp le me nt al Dat a in Pat ter n Na me Con trol Reg ist er
Bit 9 8 7 6 5 4 3 2 1 0
Speci al Pale tte No. Ch ar act er Num be r PR: Speci al Pri ori ty Bit
Fun ct ion CC: Sp ecia l Colo r Calcu latio n Bit
PR CC 6 5 4 14 13 12
Not e: Sha de d bit s ar e ig no re d
(3) Ch ar act er Size : 1 H cel l X 1 V cel l
Char act er Col or Coun t:16
Char act er Num be r Suppl eme nt Mo de : Mod e 0
Pattern Nam e Data in Pattern Nam e Ta bl e Fl ip Funct io n
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Palet te Num be r Cha ra ct er Num ber
6 5 4 9 8 7 6 5 4 3 2 1 0
Ver tical Hor izon tal
Not e: Sha de d bit is ign or ed
Sup pl em ent al Da ta in Pat tern Nam e Cont ro l Regi st er
Bit 9 8 7 6 5 4 3 2 1 0
Speci al Pal ette No . Ch ar act er Num be r
Fun ct ion PR: Spec ial Prio rit y Bi t
PR CC 14 13 12 11 10 C C: Speci al Color Calc ula tion Bi t
Not e: Sha de d bits ar e ign or ed
Figure 4.10 Configuration when pattern name data is one word
ST-58-R2 71
(4 ) Cha ra ct er Size : 1 H ce l X 1 V ce l
Cha ra ct er Colo r Coun t : Exce pt 16 col or s
Cha ra ct er Num ber Supp le me nt Mo de : Mod e 1
Pattern Nam e Da ta in Pat tern Name Tab le
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Pal et te Numb er Cha ra ct er Numb er
6 5 4 11 10 9 8 7 6 5 4 3 2 1 0
Not e: Bot h ver tica l and hor izo nt al flip fun ct ion bi ts are se t to 0.
Shad ed bi t is ig no re d
Suppl eme nt al Dat a in Pat t er n Na me Con trol Reg ist er
Bit 9 8 7 6 5 4 3 2 1 0
Speci al Pal et te No. Cha ra ct er Num ber
PR: Sp ecia l Pr io ri ty Bit
Fun ct ion
PR CC 14 13 12 CC: Spec ial Colo r Calc ul atio n Bit
No te: Shad ed bi ts ar e igno re d
(5 ) Cha ra ct er Size : 2 H ce l s X 2 V ce l s
Cha ra ct er Colo r Coun t : 16 Col or s
Cha ra ct er Num ber Supp le me nt Mo de : Mod e 0
Flip Fun ct ion
Pattern Nam e Da ta in Pat tern Name Tab le
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Pal et te Numb er Cha ra ct er Numb er
3 2 1 0 11 10 9 8 7 6 5 4 3 2
Vert ica l Ho ri zo nt al
Supp le me nt al Dat a in Pat ter n Na me Con trol Reg ist er
Bit 9 8 7 6 5 4 3 2 1 0
Speci al Pal et te No. Cha ra ct er Num ber
Fun ct ion PR : Speci al Pri orit y Bi t
PR CC 6 5 4 14 13 12 1 0 CC: Sp ecia l C ol or Calcu lat ion Bi t
(6 ) Cha ra ct er Size : 2 H ce l s X 2 V ce l s
Cha ra ct er Colo r Coun t : 16 Col or s
Cha ract er Nu mb er Supp lem en t Mod e: Mo de 1
Pattern Nam e Da ta in Pat tern Name Tab le
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Pal et te Numb er Char act er Nu mber
3 2 1 0 13 12 11 10 9 8 7 6 5 4 3 2
Not e: Bot h ve rt ica l an d hor izon tal f li p fun ct ion bi ts ar e set t o 0.
Sup pl em ent al Da ta in Pat t er n Name Con tro l Reg ist er
Bit 9 8 7 6 5 4 3 2 1 0
Spe cia l Pal et te No. Cha ra ct er Num ber
Funct ion PR : Speci al Pri orit y Bi t
PR CC 6 5 4 14 1 0 CC: Sp ecia l C ol or Calcu lat ion Bi t
No te: Shad ed bi ts ar e igno re d
Figure 4.10 Configuration when pattern name data is one word (continued)
72
(7 ) Cha ra ct er Size : 2 H ce l s X 2 V ce l s
Cha ract er Co lor Cou nt : Exce pt 16 col or s
Cha ract er Nu mb er Supp lem en t Mod e: Mo de 0
Flip Funct ion
Pattern Nam e Da ta in Pattern Nam e Tabl e
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Palet te Num be r Cha ra ct er Nu mb er
6 5 4 11 10 9 8 7 6 5 4 3 2
Ver tical Hor izo nt al
Note: Shad ed bi t is ig no re d
Suppl eme nt al Dat a in Pat ter n Na me Con trol Reg ist er
Bit 9 8 7 6 5 4 3 2 1 0
Speci al Pal et t e No. Cha ra ct er Nu mb er PR: Sp ecia l Pr io ri ty Bit
Fun ct ion
PR CC 14 13 12 1 0 CC: Spec ial Colo r Calc ula tio n Bit
Not e: Sha ded bit s ar e ig no re d
(8 ) Cha ra ct er Size : 2 H ce l s X 2 V ce l s
Cha ract er Co lor Cou nt : Exce pt 16 col or s
Cha ract er Nu mb er Supp lem en t Mod e: Mo de 1
Pattern Nam e Da ta in Pattern Nam e Tabl e
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Palet t e Numb er Cha ra ct er Nu mb er
6 5 4 13 12 11 10 9 8 7 6 5 4 3 2
Not e: Bot h ve rt ica l an d hor izon tal f li p fun ct ion bi ts ar e se t t o 0.
Sha de d bit is ign or ed
Suppl eme nt al Dat a in Pat ter n Na me Con trol Reg ist er
Bit 9 8 7 6 5 4 3 2 1 0
Speci al Pal et t e No. Char act er Num be r PR: Sp ecia l Pr io ri ty Bit
Fun ct ion
PR CC 14 1 0 CC: Spec ial Colo r Calc ula tio n Bit
Not e: Shade d bi ts are ign or ed
Figure 4.10 Configuration when pattern name data is one word (continued)
ST-58-R2 73
Character Number
The character number is 15-bit data, and designates the address of the character
pattern being displayed in that position. The boundary of the character pattern from
this character number is always 20H. Moreover, when the VRAM size is 4M bits, the
most significant bit of the character number (bit 14) is not used.
Palette Number
The palette number is 7-bit data, and designates the address of the color palette used
in the character pattern being displayed in that position. This data can be used only
when the color format is the palette format, not the RGB format. The palette number
is added to the dot color code of the character pattern. Because there is a total of 11
bits of dot color data, the bits that are used change depending on the character color
number. Figure 4.11 shows the configuration of 11-bit dot color data.
Cha ra ct er Colo r Co un t : 16 Col or s
Pal ette Nu mbe r Dot Col or Cod e
6 5 4 3 2 1 0 3 2 1 0
Cha ra ct er Colo r Coun t : 25 6 Colo rs
Pal ette No . Dot Col or Code
6 5 4 7 6 5 4 3 2 1 0
Cha ra ct er Colo r Coun t : 20 48 Col or s
Do t Colo r Co de
10 9 8 7 6 5 4 3 2 1 0
Figure 4.11 Dot color data by character color number
Special Function Bit
The special function bit is 2-bit data, and designates whether to use the special
function for the character pattern being displayed at that position. The special
function bit has a special priority bit that controls the priority number, and a special
color calculation bit that controls color operation. See “11.2 Special Priority Func-
tion” for more about the special priority bit, and “12.3 Special Color Calculation
Function” for more about the special color calculation bit.
74
Reverse (Flip) Function Bit
The reverse function bit is 2-bit data, and designates whether to use the reverse
function for the character pattern being displayed at that position. The reverse
function bit has a top-bottom reverse bit that reverses the top and bottom of a char-
acter pattern, and a left-right reverse bit that reverses left and right. The reverse
function bit is shown in Table 4.7, and a reverse display of a character pattern in
shown in Figure 4.12.
Table 4.7 Reverse Function Bit
Vertical Flip Bit Horizontal Flip Bit Process
0 0 Cannot flip vertically or horizontally
0 1 Horizontal flipping only
1 0 Vertical flipping only
1 1 Can flip both vertically and horizontally
Hori z. Flip
Ver tical Flip Bit =0 Ver tical Flip Bit =0
Hor izon tal Flip Bit =0 Hor izo nt al Flip Bit =1
Hori z. and Ver t. Fli p
Ve rt. Flip
Ver tica l Fl ip Bit =1 Vert ica l Fli p Bit =1
Hor izon tal Flip Bit =0 Hori zon tal Fl ip Bit =1
Figure 4.12 Reverse display of character patterns
ST-58-R2 75
Pattern Name Control Register
The pattern name control register assigns pattern name data size, character number
supplement mode, and pattern name supplement data. This register is a write only
16-bit register located in addresses 180030H to 180038H. Because the value of the
register is cleared to 0 after the power is turned on or reset, the value must be set.
15 14 13 12 11 10 9 8
PNCN0 N0PNB N0CNSM ~ ~ ~ ~ N0SPR N0SCC
180030H 7 6 5 4 3 2 1 0
N0SPLT6 N0SPLT5 N0SPLT4 N0SCN4 N0SCN3 N0SCN2 N0SCN1 N0SCN0
15 14 13 12 11 10 9 8
PNCN1 N1PNB N1CNSM ~ ~ ~ ~ N1SPR N1SCC
180032H 7 6 5 4 3 2 1 0
N1SPLT6 N1SPLT5 N1SPLT4 N1SCN4 N1SCN3 N1SCN2 N1SCN1 N1SCN0
15 14 13 12 11 10 9 8
PNCN2 N2PNB N2CNSM ~ ~ ~ ~ N2SPR N2SCC
180034H 7 6 5 4 3 2 1 0
N2SPLT6 N2SPLT5 N2SPLT4 N2SCN4 N2SCN3 N2SCN2 N2SCN1 N2SCN0
15 14 13 12 11 10 9 8
PNCN3 N3PNB N3CNSM ~ ~ ~ ~ N3SPR N3SCC
180036H 7 6 5 4 3 2 1 0
N3SPLT6 N3SPLT5 N3SPLT4 N3SCN4 N3SCN3 N3SCN2 N3SCN1 N3SCN0
15 14 13 12 11 10 9 8
PNCR R0PNB R0CNSM ~ ~ ~ ~ R0SPR R0SCC
180038H 7 6 5 4 3 2 1 0
R0SPLT6 R0SPLT5 R0SPLT4 R0SCN4 R0SCN3 R0SCN2 R0SCN1 R0SCN0
Pattern name data size bit (N0PNB, N1PNB, N2PNB, N3PNB, R0PNB)
Designates the pattern name data size when displaying in the cell format.
N0PNB 180030H Bit 15 For NBG0 (or RBG 1)
N1PNB 180032H Bit 15 For NBG1
N2PNB 180034H Bit 15 For NBG2
N3PNB 180036H Bit 15 For NBG3
R0PNB 180038H Bit 15 For RBG0
76
xxPNB Pattern Name Data Size
0 2 Words
1 1 Word
Note: N0, N1, N3, or R0 is entered in bit name for xx.
Character number supplement bit (N0CNSM, N1CNSM, N2CNSM, N3CNSM, R0CNSM)
Designates the character number supplement mode when the pattern name data size
in the pattern name table is 1-word.
N0CNSM 180030H Bit 14 For NBG0 (or RBG 1)
N1CNSM 180032H Bit 14 For NBG1
N2CNSM 180034H Bit 14 For NBG2
N3CNSM 180036H Bit 14 For NBG3
R0CNSM 180038H Bit 14 For RBG0
xxCNSM Character Number Process
Auxiliary Mode
0 0 Character number in pattern name data is 10 bits.
Flip function can be selected in character units.
1 1 Character number in pattern name data is 12 bits.
Flip function cannot be used.
Note: N0, N1, N2, N3, or R0 is entered in bit name for xx.
Special priority bit (for pattern name supplement data): Supplementary special priority bit
(N0SPR, N1SPR, N2SPR, N3SPR, R0SPR)
Designates the pattern name supplement data as the special priority bit when the
pattern name data size is 1-word.
N0SPR 180030H Bit 9 For NBG0 (or RBG 1)
N1SPR 180032H Bit 9 For NBG1
N2SPR 180034H Bit 9 For NBG2
N3SPR 180036H Bit 9 For NBG3
R0SPR 180038H Bit 9 For RBG0
See “11.2 Special Color Priority Function” for how this bit is used.
ST-58-R2 77
Special color calculation bit (for pattern name supplement data): Supplementary special color
calculation bit (N0SCC, N1SCC, N2SCC, N3SCC, R0SCC)
The special color calculation bit is designated as pattern name supplement data
when the pattern name data size is 1-word.
N0SCC 180030H Bit 8 For NBG0 (or RBG 1)
N1SCC 180032H Bit 8 For NBG1
N2SCC 180034H Bit 8 For NBG2
N3SCC 180036H Bit 8 For NBG3
R0SCC 180038H Bit 8 For RBG0
See “12.2 Special Color Calculation Function” to learn how this bit is used.
Supplementary palette number bit (N0SPLT6 to N0SPLT4, N1SPLT6 to N1SPLT4, N2SPLT6 to
N2SPLT4, N3SPLT6 to N3SPLT4, R0SPLT6 to R0SPLT4)
Designates the palette number bit as pattern name supplement data when the pat-
tern name data size is 1-word. Three bits are added to the palette number bit of the
pattern name data for the supplementary palette number bit.
N0SPLT6~N0SPLT4 180030H Bit 7~5 For NBG0 (or RBG 1)
N1SPLT6~N1SPLT4 180032H Bit 7~5 For NBG1
N2SPLT6~N2SPLT4 180034H Bit 7~5 For NBG2
N3SPLT6~N3SPLT4 180036H Bit 7~5 For NBG3
R0SPLT6~R0SPLT4 180038H Bit 7~5 For RBG0
Supplementary character number bit (N0SCN4 to N0SCN0, N1SCN4 to N1SCN0, N2SCN4 to
N2SCN0, N3SCN4 to N3SCN0, R0SCN4 to R0SCN0)
Designates the character number bit as the pattern name supplement data when the
pattern name data size is 1-word. Five bits are added to the palette number bit of
the pattern name data for the supplementary palette number bit.
N0SCN4~N0SCN0 180030H Bit 4~0 For NBG0 (or RBG 1)
N1SCN4~N1SCN0 180032H Bit 4~0 For NBG1
N2SCN4~N2SCN0 180034H Bit 4~0 For NBG2
N3SCN4~N3SCN0 180036H Bit 4~0 For NBG3
R0SCN4~R0SCN0 180038H Bit 4~0 For RBG0
78
4.7 Planes
Plane arranges the pattern name table (page) in sizes of 1 x 1, 2 x 1, or 2 x 2. Size is
designated in its respective register.
Plane Size
When the plane consists of more than one pattern name table (page), the pattern
name table used by one plane should be linked to VRAM and stored. Figure 4.13
shows the relationship of the pattern name table arranged by plane size (number of
plane page) and pattern name table.
Pat ter n Na me Tab le
Select ed Whe n 1 H page X 1 V pa ge
Pattern Nam e
Tab le Heade r
Addr ess Pag e 0
Page 0 64 Cel ls
64 Cel ls
Pag e 1
Whe n 2 H pa ge s X 1 V pa ge
Pag e 2 Pag e 0 Pag e 1 64 Ce lls
12 8 Cel ls
Pag e 3 Wh en 2 H pag es X 2 V page s
Pag e 0 Pag e 1
Pag e 4
12 8 Cel ls
Pag e 2 Pag e 3
12 8 Cel ls
Figure 4.13 Arrangement of pattern name table by plane size
ST-58-R2 79
Plane Size Register
The plane size register controls the plane size and setting of the screen-over process
of the rotation scroll surface. This register is a write only 16-bit register located at
address 18003AH. Because the value of the register is cleared to 0 after the power is
turned on or reset, the value must be set.
15 14 13 12 11 10 9 8
PLSZ RBOVR1 RBOVR0 RBPLSZ1 RBPLSZ0 RAOVR1 RAOVR0 RAPLSZ1 RAPLSZ0
18003AH 7 6 5 4 3 2 1 0
N3PLSZ1 N3PLSZ0 N2PLSZ1 N2PLSZ0 N1PLSZ1 N1PLSZ0 N0PLSZ1 N0PLSZ0
Plane size bit (N0PLSZ1, N0PLSZ0, N1PLSZ1, N1PLSZ0, N2PLSZ1, N2PLSZ0, N3PLSZ1,
N3PLSZ0, RAPLSZ1, RAPLSZ0, RBPLSZ1, RBPLSZ0)
Designates the plane size (number of pages) of each scroll screen.
N0PLSZ1, N0PLSZ0 18003AH Bit 1,0 For NBG0
N1PLSZ1, N1PLSZ0 18003AH Bit 3,2 For NBG1
N2PLSZ1, N2PLSZ0 18003AH Bit 5,4 For NBG2
N3PLSZ1, N3PLSZ0 18003AH Bit 7,6 For NBG3
RAPLSZ1, RAPLSZ0 18003AH Bit 9,8 For Rotation Parameter A
RBPLSZ1, RBPLSZ0 18003AH Bit 13,12 For Rotation Parameter B
xxPLSZ1 xxPLSZ0 Plane Size
0 0 1 H Page X 1 V Page
0 1 2 H Pages X 1 V Page
1 0 Invalid (Do not set.)
1 1 2 H Pages X 2 V Pages
Note: N0, N1, N2, N3, RA, or RB is entered in bit name for xx.
When the reduction display is set up to a factor of 1/4 in NBG0 and NBG1, do not
set the plane size of that screen to 2 H pages x 2 V pages.
80
Screen-over process bit: Over bit (RAOVR1, RAOVR0, RBOVR1, RBOVR0)
Designates control (screen-over process) when the display coordinate value exceeds
the display area in the rotation scroll surface.
RAOVR1, RAOVR0 18003AH Bit 11,10 For Rotation Parameter A
RBOVR1, RBOVR0 18003AH Bit 15,14 For Rotation Parameter B
RxOVR1 RxOVR0 Screen Over Process
0 0 Outside the display area, the image set in the display area is repeated
0 1 Outside the display area, the character pattern specified by screen ove
pattern name register is repeated. (Only when the rotation scroll
surface is in cell format.)
1 0 Outside the display area, the scroll screen is transparent,
1 1 Set the display area as 0≤X≤512, 0≤Y≤512 regardless of plane size or
bitmap size and make that area transparent.
Note: A or B is entered in bit name for x.
When the rotation scroll surface is in bit map, the character pattern designated by
the screen-over pattern name register must not be set to repeat process. With the
rotation scroll surface in bit map, and when the length of the bit map is 256 dots, if
the display area is set to 0 ≤ X < 512 and 0 ≤ Y < 512 and all the outer area is set to be
transparent, two of the same images will be displayed for each 256 V dots.
ST-58-R2 81
4.8 Maps
Maps are square patterns consisting of 2 x 2 or 4 x 4 planes. A map of a Normal
scroll screen consists of a 2 x 2 plane, and a map of a rotation scroll surface consists
of a 4 x 4 plane. The method of arranging the plane is made by selecting the pattern
name table lead address in various plane registers.
Map Selection Register
Maps are organized into four planes (normal scroll screen) or 16 planes (rotation
scroll surface). Each screen has for each plane number a 6-bit map register to select
the pattern name table lead address for various planes. It also has a map offset
register of three bits added to the highest map register. The total 9-bit map selection
register changes the bit used and the register displaying the address value, depend-
ing on the pattern name data size and character size. Figure 4.14 shows the relation-
ship of the map register and map offset register.
Map Offse t Reg ist er Map Reg ist er A
8 7 6 5 4 3 2 1 0
Ma p Re gi st er B
5 4 3 2 1 0
Map Offse t Regi st er Ma p Re gi st er
8 7 6 5 4 3 2 1 0
Figure 4.14 Map selection register
Table 4.8 shows the address values of register and bits that are used for the map
selection register by the pattern name data size and character size.
82
Table 4.8 Address value of map designated register by setting
Plane Size Pattern Name Character Size Bits and Addresses
Data Size
1 Word 1 H Cell X 1 V Cell (Value of bit 6~0) X 2000H
1 H page X 2 H Cells X 2 V Cells (Value of bit 8~0) X 800H
1 V page 2 Words 1 H Cell X 1 V Cell (Value of bit 5~0) X 4000H
2 H Cells X 2 V Cells (Value of bit 7~0) X 1000H
1 Word 1 H Cell X 1 V Cell (Value of bit 6~1) X 4000H
2 H pages X 2 H Cells X 2 V Cells (Value of bit 8~1) X 1000H
1 V page 2 Words 1 H Cell X 1 V Cell (Value of bit 5~1) X 8000H
2 H Cells X 2 V Cells (Value of bit 7~1) X 2000H
1 Word 1 H Cell X 1 V Cell (Value of bit 6~2) X 8000H
2 H pages X 2 V Cells X 2 V Cells (Value of bit 8~2) X 2000H
2 V pages 2 Words 1 H Cell X 1 V Cell (Value of bit 5~2) X 10000H
2 H Cells X 2 V Cells (Value of bit 7~2) X 4000H
Note: When the VRAM capacity is set at 4M bits, the most significant bit among the bits used is not
used.
ST-58-R2 83
Map Size
Map size (number of planes in the map) will change depending on if the screen is a
normal scroll screen or rotation scroll surface. The normal scroll screen has a map 2
H planes X 2 V planes in each screen. The rotation scroll surface has a map 4 H
planes X 4 V planes in both of rotation parameters A and B. Figure 4.15 shows the
plane arrangements of different map sizes.
Normal Scroll Screen
Plane Plane
A B
Plane Plane
C D
Rotation Scroll Screen
Plane Plane Plane Plane
A B C D
Plane Plane Plane Plane
E F G H
Plane Plane Plane Plane
I J K L
Plane Plane Plane Plane
M N O P
Figure 4.15 Map size
84
When NBG0 and NBG1 enable bits (N0ZMQT and N1ZMQT) are set to allow reduc-
tion up to a factor of 1/4, the map size of NBG0 and NBG1 become normal. A set
screen plane size, that can be reduced up to 1/4 should not be 2 H pages X 2 V
pages. Figure 4.16 shows the map size by the reduction setting.
When se tting NBG0, ca n Whe n se tting NBG1, ca n
be red uce d up to 1/4. be red uce d up to 1/4.
Plan e A Plan e B Plane A Plane B
For NB G0 Fo r NBG0 For NBG1 For NBG1
Plane C Pla ne D Plan e C Plane D
For NBG0 For NBG0 For NB G1 For NBG1
Plan e A Plan e B
Plane A Plane B
For NB G2 Fo r NBG2
For NBG3 For NBG3
Plane C Pla ne D
For NBG2 For NBG2 Plan e C Plane D
For NB G3 For NBG3
Figure 4.16 Plane arrangement of map by reduction settings
Map Offset Register
The map offset register designates the map offset value. This is a write-only 16-bit
register, with addresses located at 18003CH to 18003EH. Because the value of the
register is cleared to 0 after the power is turned on or reset, the value must be set.
15 14 13 12 11 10 9 8
MPOFN ~ N3MP8 N3MP7 N3MP6 ~ N2MP8 N2MP7 N2MP6
18003CH 7 6 5 4 3 2 1 0
~ N1MP8 N1MP7 N1MP6 ~ N0MP8 N0MP7 N0MP6
15 14 13 12 11 10 9 8
MPOFR ~ ~ ~ ~ ~ ~ ~ ~
18003EH 7 6 5 4 3 2 1 0
~ RBMP8 RBMP7 RBMP6 ~ RAMP8 RAMP7 RAMP6
ST-58-R2 85
Map offset bit (N0MP8 to N0MP6, N1MP8 to N1MP6, N2MP8 to N2MP6, N3MP8 to N3MP6,
RAMP8 to RAMP6, RBMP8 to RBMP6)
When the scroll screen display format is the cell format, the map offset value of 3 bits
is added to the highest 6 bits of the map register. This designates the bit map pattern
boundary when in the bit map format.
N0MP8~N0MP6 18003CH Bit 2~0 For NBG0
N1MP8~N1MP6 18003CH Bit 6~4 For NBG1
N2MP8~N2MP6 18003CH Bit 10~8 For NBG2
N3MP8~N3MP6 18003CH Bit 14~12 For NBG3
RAMP8~RAMP6 18003EH Bit 2~0 For Rotation Parameter A
RBMP8~RBMP6 18003EH Bit 6~4 For Rotation Parameter B
Boundary address of the bit map pattern is shown below:
(boundary address value of the bit map pattern) = (map offset register value 3 bit) x
20000H.
86
Normal Scroll Screen Map Register
Normal scroll screen map register designates the lead address of the pattern name
table of each plane when the normal scroll screen is displayed in the cell format.
This register is a write-only 16-bit register, with addresses located at 180040H to
18004EH. Because the value of the register is cleared to 0 after the power is turned
on or reset, the value must be set.
15 14 13 12 11 10 9 8
MPABN0 ~ ~ N0MPB5 N0MPB4 N0MPB3 N0MPB2 N0MPB1 N0MPB0
180040H 7 6 5 4 3 2 1 0
~ ~ N0MPA5 N0MPA4 N0MPA3 N0MPA2 N0MPA1 N0MPA0
15 14 13 12 11 10 9 8
MPCDN0 ~ ~ N0MPD5 N0MPD4 N0MPD3 N0MPD2 N0MPD1 N0MPD0
180042H 7 6 5 4 3 2 1 0
~ ~ N0MPC5 N0MPC4 N0MPC3 N0MPC2 N0MPC1 N0MPC0
15 14 13 12 11 10 9 8
MPABN1 ~ ~ N1MPB5 N1MPB4 N1MPB3 N1MPB2 N1MPB1 N1MPB0
180044H 7 6 5 4 3 2 1 0
~ ~ N1MPA5 N1MPA4 N1MPA3 N1MPA2 N1MPA1 N1MPA0
15 14 13 12 11 10 9 8
MPCDN1 ~ ~ N1MPD5 N1MPD4 N1MPD3 N1MPD2 N1MPD1 N1MPD0
180046H 7 6 5 4 3 2 1 0
~ ~ N1MPC5 N1MPC4 N1MPC3 N1MPC2 N1MPC1 N1MPC0
15 14 13 12 11 10 9 8
MPABN2 ~ ~ N2MPB5 N2MPB4 N2MPB3 N2MPB2 N2MPB1 N2MPB0
180048H 7 6 5 4 3 2 1 0
~ ~ N2MPA5 N2MPA4 N2MPA3 N2MPA2 N2MPA1 N2MPA0
15 14 13 12 11 10 9 8
MPCDN2 ~ ~ N2MPD5 N2MPD4 N2MPD3 N2MPD2 N2MPD1 N2MPD0
18004AH 7 6 5 4 3 2 1 0
~ ~ N2MPC5 N2MPC4 N2MPC3 N2MPC2 N2MPC1 N2MPC0
15 14 13 12 11 10 9 8
MPABN3 ~ ~ N3MPB5 N3MPB4 N3MPB3 N3MPB2 N3MPB1 N3MPB0
18004CH 7 6 5 4 3 2 1 0
~ ~ N3MPA5 N3MPA4 N3MPA3 N3MPA2 N3MPA1 N3MPA0
15 14 13 12 11 10 9 8
MPCDN3 ~ ~ N3MPD5 N3MPD4 N3MPD3 N3MPD2 N3MPD1 N3MPD0
18004EH 7 6 5 4 3 2 1 0
~ ~ N3MPC5 N3MPC4 N3MPC3 N3MPC2 N3MPC1 N3MPC0
ST-58-R2 87
Map bit (for normal scroll): (N0MPA5 to N0MPA0, N0MPB5 to N0MPB0,
N0MPC5 to N0MPC0, N0MPD5 to N0MPD0, N1MPA5 to N1MPA0, N1MPB5 to N1MPB0, N1MPC5
to N1MPC0, N1MPD5 to N1MPD0, N2MPA5 to N2MPA0, N2MPB5 to N2MPB0, N2MPC5 to
N2MPC0, N2MPD5 to N2MPD0, N3MPA5 to N3MPA0, N3MPB5 to N3MPB0, N3MPC5 to N3MPC0,
N3MPD5 to N3MPD0)
The lead address for the pattern name table is designated for each plane, when the
Normal scroll screen is displayed by the cell format.
N0MPA5~N0MPA0 180040H Bit 5~0 For NBG0 Plane A
N0MPB5~N0MPB0 180040H Bit 13~8 For NBG0 Plane B
N0MPC5~N0MPC0 180042H Bit 5~0 For NBG0 Plane C
N0MPD5~N0MPD0 180042H Bit 13~8 For NBG0 Plane D
N1MPA5~N1MPA0 180044H Bit 5~0 For NBG1 Plane A
N1MPB5~N1MPB0 180044H Bit 13~8 For NBG1 Plane B
N1MPC5~N1MPC0 180046H Bit 5~0 For NBG1 Plane C
N1MPD5~N1MPD0 180046H Bit 13~8 For NBG1 Plane D
N2MPA5~N2MPA0 180048H Bit 5~0 For NBG2 Plane A
N2MPB5~N2MPB0 180048H Bit 13~8 For NBG2 Plane B
N2MPC5~N2MPC0 18004AH Bit 5~0 For NBG2 Plane C
N2MPD5~N2MPD0 18004AH Bit 13~8 For NBG2 Plane D
N3MPA5~N3MPA0 18004CH Bit 5~0 For NBG3 Plane A
N3MPB5~N3MPB0 18004CH Bit 13~8 For NBG3 Plane B
N3MPC5~N3MPC0 18004EH Bit 5~0 For NBG3 Plane C
N3MPD5~N3MPD0 18004EH Bit 13~8 For NBG3 Plane D
88
Rotation Scroll Surface Map Register
The Rotation Scroll Surface Map Register designates the lead address of the pattern
name table arranged in each plane by rotation parameters A and B. When a write-
only 16-bit register, with addresses located at 180050H to 18006EH. Because the
value of the register is cleared to 0 after the power is turned on or reset, the value
must be set.
15 14 13 12 11 10 9 8
MPABRA ~ ~ RAMPB5 RAMPB4 RAMPB3 RAMPB2 RAMPB1 RAMPB0
180050H 7 6 5 4 3 2 1 0
~ ~ RAMPA5 RAMPA4 RAMPA3 RAMPA2 RAMPA1 RAMPA0
15 14 13 12 11 10 9 8
MPCDRA ~ ~ RAMPD5 RAMPD4 RAMPD3 RAMPD2 RAMPD1 RAMPD0
180052H 7 6 5 4 3 2 1 0
~ ~ RAMPC5 RAMPC4 RAMPC3 RAMPC2 RAMPC1 RAMPC0
15 14 13 12 11 10 9 8
MPEFRA ~ ~ RAMPF5 RAMPF4 RAMPF3 RAMPF2 RAMPF1 RAMPF0
180054H 7 6 5 4 3 2 1 0
~ ~ RAMPE5 RAMPE4 RAMPE3 RAMPE2 RAMPE1 RAMPE0
15 14 13 12 11 10 9 8
MPGHRA ~ ~ RAMPH5 RAMPH4 RAMPH3 RAMPH2 RAMPH1 RAMPH0
180056H 7 6 5 4 3 2 1 0
~ ~ RAMPG5 RAMPG4 RAMPG3 RAMPG2 RAMPG1 RAMPG0
15 14 13 12 11 10 9 8
MPIJRA ~ ~ RAMPJ5 RAMPJ4 RAMPJ3 RAMPJ2 RAMPJ1 RAMPJ0
180058H 7 6 5 4 3 2 1 0
~ ~ RAMPI5 RAMPI4 RAMPI3 RAMPI2 RAMPI1 RAMPI0
15 14 13 12 11 10 9 8
MPKLRA ~ ~ RAMPL5 RAMPL4 RAMPL3 RAMPL2 RAMPL1 RAMPL0
18005AH 7 6 5 4 3 2 1 0
~ ~ RAMPK5 RAMPK4 RAMPK3 RAMPK2 RAMPK1 RAMPK0
15 14 13 12 11 10 9 8
MPMNRA ~ ~ RAMPN5 RAMPN4 RAMPN3 RAMPN2 RAMPN1 RAMPN0
18005CH 7 6 5 4 3 2 1 0
~ ~ RAMPM5 RAMPM4 RAMPM3 RAMPM2 RAMPM1 RAMPM0
15 14 13 12 11 10 9 8
MPOPRA ~ ~ RAMPP5 RAMPP4 RAMPP3 RAMPP2 RAMPP1 RAMPP0
18005EH 7 6 5 4 3 2 1 0
~ ~ RAMPO5 RAMPO4 RAMPO3 RAMPO2 RAMPO1 RAMPO0
ST-58-R2 89
15 14 13 12 11 10 9 8
MPABRB ~ ~ RBMPB5 RBMPB4 RBMPB3 RBMPB2 RBMPB1 RBMPB0
180060H 7 6 5 4 3 2 1 0
~ ~ RBMPA5 RBMPA4 RBMPA3 RBMPA2 RBMPA1 RBMPA0
15 14 13 12 11 10 9 8
MPCDRB ~ ~ RBMPD5 RBMPD4 RBMPD3 RBMPD2 RBMPD1 RBMPD0
180062H 7 6 5 4 3 2 1 0
~ ~ RBMPC5 RBMPC4 RBMPC3 RBMPC2 RBMPC1 RBMPC0
15 14 13 12 11 10 9 8
MPEFRB ~ ~ RBMPF5 RBMPF4 RBMPF3 RBMPF2 RBMPF1 RBMPF0
180064H 7 6 5 4 3 2 1 0
~ ~ RBMPE5 RBMPE4 RBMPE3 RBMPE2 RBMPE1 RBMPE0
15 14 13 12 11 10 9 8
MPGHRB ~ ~ RBMPH5 RBMPH4 RBMPH3 RBMPH2 RBMPH1 RBMPH0
180066H 7 6 5 4 3 2 1 0
~ ~ RBMPG5 RBMPG4 RBMPG3 RBMPG2 RBMPG1 RBMPG0
15 14 13 12 11 10 9 8
MPIJRB ~ ~ RBMPJ5 RBMPJ4 RBMPJ3 RBMPJ2 RBMPJ1 RBMPJ0
180068H 7 6 5 4 3 2 1 0
~ ~ RBMPI5 RBMPI4 RBMPI3 RBMPI2 RBMPI1 RBMPI0
15 14 13 12 11 10 9 8
MPKLRB ~ ~ RBMPL5 RBMPL4 RBMPL3 RBMPL2 RBMPL1 RBMPL0
18006AH 7 6 5 4 3 2 1 0
~ ~ RBMPK5 RBMPK4 RBMPK3 RBMPK2 RBMPK1 RBMPK0
15 14 13 12 11 10 9 8
MPMNRB ~ ~ RBMPN5 RBMPN4 RBMPN3 RBMPN2 RBMPN1 RBMPN0
18006CH 7 6 5 4 3 2 1 0
~ ~ RBMPM5 RBMPM4 RBMPM3 RBMPM2 RBMPM1 RBMPM0
15 14 13 12 11 10 9 8
MPOPRB ~ ~ RBMPP5 RBMPP4 RBMPP3 RBMPP2 RBMPP1 RBMPP0
18006EH 7 6 5 4 3 2 1 0
~ ~ RBMPO5 RBMPO4 RBMPO3 RBMPO2 RBMPO1 RBMPO0
90
Map bit (for rotation scroll): Map bit (RAMPA5 to RAMPA0, RAMPB5 to RAMPB0,
RAMPC5 to RAMPC0, RAMPD5 to RAMPD0, RAMPE5 to RAMPE0,
RAMPF5 to RAMPF0, RAMPG5 to RAMPG0, RAMPH5 to RAMPH0,
RAMPI5 to RAMPI0, RAMPJ5 to RAMPJ0, RAMPK5 to RAMPK0,
RAMPL5 to RAMPL0, RAMPM5 to RAMPM0, RAMPN5 to RAMPN0,
RAMPO5 to RAMPO0, RAMPP5 to RAMPP0, RBMPA5 to RBMPA0,
RBMPB5 to RBMPB0, RBMPC5 to RBMPC0, RBMPD5 to RBMPD0,
RBMPE5 to RBMPE0, RBMPF5 to RBMPF0, RBMPG5 to RBMPG0,
RBMPH5 to RBMPH0, RAMPI5 to RBMPI0, RBMPJ5 to RBMPJ0,
RBMPK5 to RBMPK0, RBMPL5 to RBMPL0, RBMPM5 to RBMPM0,
RBMPN5 to RBMPN0, RBMPO5 to RBMPO0, RBMPP5 to RBMPP0)
When a rotation scroll surface is displayed in the cell format, it designates the lead
address of the pattern name table being arranged in each plane .
ST-58-R2 91
RAMPA5~RAMPA0 180050H Bit 5~0 Rotation Parameter A for Screen Plane A
RAMPB5~RAMPB0 180050H Bit 13~8 Rotation Parameter A for Screen Plane B
RAMPC5~RAMPC0 180052H Bit 5~0 Rotation Parameter A for Screen Plane C
RAMPD5~RAMPD0 180052H Bit 13~8 Rotation Parameter A for Screen Plane D
RAMPE5~RAMPE0 180054H Bit 5~0 Rotation Parameter A for Screen Plane E
RAMPF5~RAMPF0 180054H Bit 13~8 Rotation Parameter A for Screen Plane F
RAMPG5~RAMPG0 180056H Bit 5~0 Rotation Parameter A for Screen Plane G
RAMPH5~RAMPH0 180056H Bit 13~8 Rotation Parameter A for Screen Plane H
RAMPI5~RAMPI0 180058H Bit 5~0 Rotation Parameter A for Screen Plane I
RAMPJ5~RAMPJ0 180058H Bit 13~8 Rotation Parameter A for Screen Plane J
RAMPK5~RAMPK0 18005AH Bit 5~0 Rotation Parameter A for Screen Plane K
RAMPL5~RAMPL0 18005AH Bit 13~8 Rotation Parameter A for Screen Plane L
RAMPM5~RAMPM0 18005CH Bit 5~0 Rotation Parameter A for Screen Plane M
RAMPN5~RAMPN0 18005CH Bit 13~8 Rotation Parameter A for Screen Plane N
RAMPO5~RAMPO0 18005EH Bit 5~0 Rotation Parameter A for Screen Plane O
RAMPP5~RAMPP0 18005EH Bit 13~8 Rotation Parameter A for Screen Plane P
RBMPA5~RBMPA0 180060H Bit 5~0 Rotation Parameter B for Screen Plane A
RBMPB5~RBMPB0 180060H Bit 13~8 Rotation Parameter B for Screen Plane B
RBMPC5~RBMPC0 180062H Bit 5~0 Rotation Parameter B for Screen Plane C
RBMPD5~RBMPD0 180062H Bit 13~8 Rotation Parameter B for Screen Plane D
RBMPE5~RBMPE0 180064H Bit 5~0 Rotation Parameter B for Screen Plane E
RBMPF5~RBMPF0 180064H Bit 13~8 Rotation Parameter B for Screen Plane F
RBMPG5~RBMPG0 180066H Bit 5~0 Rotation Parameter B for Screen Plane G
RBMPH5~RBMPH0 180066H Bit 13~8 Rotation Parameter B for Screen Plane H
RBMPI5~RBMPI0 180068H Bit 5~0 Rotation Parameter B for Screen Plane I
RBMPJ5~RBMPJ0 180068H Bit 13~8 Rotation Parameter B for Screen Plane J
RBMPK5~RBMPK0 18006AH Bit 5~0 Rotation Parameter B for Screen Plane K
RBMPL5~RBMPL0 18006AH Bit 13~8 Rotation Parameter B for Screen Plane L
RBMPM5~RBMPM0 18006CH Bit 5~0 Rotation Parameter B for Screen Plane M
RBMPN5~RBMPN0 18006CH Bit 13~8 Rotation Parameter B for Screen Plane N
RBMPO5~RBMPO0 18006EH Bit 5~0 Rotation Parameter B for Screen Plane O
RBMPP5~RBMPP0 18006EH Bit 13~8 Rotation Parameter B for Screen Plane P
92
4.9 Bit Maps
When displaying the bit map format, select from sizes, 512 H dots x 256 V dots, 512
H dots x 512 V dots, 1024 H dots x 256 V dots, or 1024 H dots X 512 V dots. All dot
bit map pattern data is stored in the VRAM.
Bit Map Size
Different types of bit map sizes can be selected by the normal scroll screen and
rotation scroll surface. When a high-resolution graphics mode that is greater than
512 H pixels is selected in a Normal scroll screen, if a 512 H dot bit map size is se-
lected, the same picture is repeated in the horizontal direction. Furthermore, when
the vertical resolution selects the exclusive monitor mode or double-density interlace
mode with more than 256 pixels when a 256 V dot bit map size is selected, the same
picture is repeated in the vertical direction. Table 4.9 shows bit map sizes.
Table 4.9 Bit map size
Screen Bitmap Size Selections
512 H dots X 256 V dots
Normal 512 H dots X 512 V dots
Scroll Screen 1024 H dots X 256 V dots
1024 H dots X 512 V dots
Rotation 512 H dots X 256 V dots
Scroll Screen 512 H dots X 512 V dots
Bit Map Color Number
The color format for displaying the bit map format screen combines the bit map
palette number and dot color code within bit map pattern data. It has a palette
format, which designates the color RAM address, and RGB format that directly
designates display RGB data. Table 4.10 shows, in various color formats the bit map
surface per color number and the bit number per dot of the bit map pattern data.
Furthermore, the bit map color count is set to the character color count bit of the
character control register.
ST-58-R2 93
Table 4.10 Bit map color count
Color Format Bitmap Color Count Bitmap Pattern Data Bit Count For 1
Dot
16 colors 4 bits
Palette 256 colors 8 bits
2048 colors 16 bits (only use lower 11 bits)
RGB 32,768 colors 16 bits
16,770,000 colors 32 bits (only use MSB and lower 24 bits)
Note: 2028 colors become 1024 colors when the color RAM mode is 0 or 2.
94
Bit Map Pattern
The required VRAM capacity in a 1-bit map pattern surface depends upon the bit
map size and bit map color count (bit map pattern data size). Changes in the data
configuration of each bit map pattern stored in VRAM are identical. The bit map
size and bit map color count can be set to exceed the VRAM capacity, but the same
picture would be repeated in the vertically. Table 4.11 shows bit map pattern capaci-
ties and Figure 4.17 shows the bit map pattern configuration.
The boundary that stores bit map patterns in the VRAM is 20000H, and is indepen-
dent of the bit map size and the bit map color count. The designation is performed
in the map offset register.
Table 4.11 Bit map pattern capacity per 1 surface
Bitmap Size Bitmap Pattern Bitmap Color Count Size per Surface
Data Size
4 bits/dot 16 colors 64K bytes (512K bits)
512 H dots X 8 bits/dot 256 colors 128K bytes (1M bits)
256 V dots 16 bits/dot 2048 colors, 32,768 colors 256K bytes (2M bits)
32 bits/dot 16,770,000 colors 512K bytes (4M bits)
4 bits/dot 16 colors 128K bytes (1M bits)
512 H dots X 8 bits/dot 256 colors 256K bytes (2M bits)
512 V dots 16 bits/dot 2048 colors, 32,768 colors 512K bytes (4M bits)
32 bits/dot 16,770,000 colors 1024K bytes (8M bits)
4 bits/dot 16 colors 128K bytes (1M bits)
1024 H dots X 8 bits/dot 256 colors 256K bytes (2M bits)
256 V dots 16 bits/dot 2048 colors, 32,768 colors 512K bytes (4M bits)
32 bits/dot 16,770,000 colors 1024K bytes (8M bits)
1024 H dots X 4 bits/dot 16 colors 256K bytes (2M bits)
512 V dots 8 bits/dot 256 colors 512K bytes (4M bits)
16 bits/dot 2048 colors, 32,768 colors 1024K bytes (8M bits)
ST-58-R2 95
(1) Bit ma p Size : 512 H dot s X 25 6 V dot s
Bit ma p Colo r Coun t : 4 bits/ dot (1 6 co lor s)
Bit ma p Pat ter n (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0 00 0H Dot 0- 0 Dot 0- 1 Dot 0- 2 Dot 0- 3
+0 00 2H Dot 0- 4 Dot 0- 5 Dot 0- 6 Dot 0- 7
+FFFEH Dot 25 5- 50 8 Dot 25 5- 50 9 Dot 25 5- 51 0 Dot 25 5- 511
Dot 0 1 2 3 50 8 50 9 51 0 511
Dot 0 + 00 00 +0001 +00FE +00F F
+0100 +0101 +01FE +01FF
1
Bitmap
25 4 +F E0 0 +FE 01 +FE FE +FE FE
25 5 +F F0 0 +F F0 1 +FFF E +FF FF
Note 1: The upp er lef t not ation in the cel l is do t 0-0 ; to the righ t are do t 0-1 ,
dot 0- 2, do t 0-3 , ...
Note 2: Nu mber s in the ce l s are VRAM ad dr esse s (h exa de cim al) of dot (2
dot s) dat a, with VRAM add re ss of do t 0-0 , 0-1 da ta as the
refer en ce.
Figure 4.17 Bit map pattern configuration
96
(2 ) Bitmap Size : 512 H do ts X 25 6 V do ts
Bitmap Col or Coun t : 8 bit s/ do t (25 6 co lor s)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00 00 0H Dot 0- 0 Do t 0-1
+00 00 2H Do t 0-2 Do t 0-3
+1F FFEH Do t 255 -5 10 Do t 255 -5 11
Do t 0 1 2 3 508 509 510 511
Dot 0 +000 00 +0 000 1 +000 02 +0 000 3 +0 01F C +00 1F D +001 FE +0 01F F
+002 00 +0 020 1 +002 02 +0 020 3 +0 03F C +00 3F D +003 FE +0 03F F
1
Bitmap
25 4 +1F C0 0 +1F C01 +1F C0 2 +1F C03 +1F DF C +1 FD FD +1F DF E +1F DF F
25 5 +1 FE0 0 +1F E01 +1 FE0 2 +1F E03 +1F FFC +1F FF D +1 FF FE +1F FFF
Note 1: The upp er lef t no tation in the cel l is do t 0-0 ; to the righ t are do t 0-1 ,
dot 0- 2, do t 0-3 , ...
Note 2: Nu mb er s in the ce l s are VRAM add re sses (h exadeci mal ) of do t
dat a, with VRAM add re ss of do t 0-0 da ta as the re fer ence.
Figure 4.17 Bit map pattern configuration (continued)
ST-58-R2 97
(3) Bit ma p Size : 512 H dot s X 25 6 V dot s
Bit ma p Colo r Coun t : 16 bi ts/ dot (204 8 col or s, 327 68 col ors)
Bitmap Pat ter n (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00 00 0H Dot 0- 0
+00 00 2H Dot 0-1
+3F FFEH Do t 255 -5 11
Dot 0 1 2 3 50 8 50 9 51 0 511
Do t 0 +00 000 +000 02 +00 004 +000 06 +0 03F 8 +0 03F A +003 FC +0 03F E
+00 400 +004 02 +00 404 +004 06 +0 07F 8 +0 07F A +007 FC +0 07F E
1
Bitmap
25 4 +3F 80 0 +3 F8 02 +3F 80 4 +3 F8 06 +3F BF8 +3F BFA +3 FBF C +3F BF E
25 5 +3 FC 00 +3F C0 2 +3 FC 04 +3F C0 6 +3F FF8 +3F FFA +3 FF FC +3F FFE
Not e 1: The upp er lef t no tat io n in the ce ll is dot 0- 0; to the righ t ar e do t 0-1 ,
dot 0- 2, dot 0- 3, ...
Not e 2: Numb er s in the cel ls are VRAM add re sses (hexad eci mal ) of do t
dat a, with VRAM ad dr ess of dot 0- 0 da ta as the re fer en ce.
Figure 4.17 Bit map pattern configuration (continued)
98
(4) Bit ma p Size : 512 H dot s X 25 6 V dot s
Bit ma p Colo r Coun t : 32 bi ts/ do t (16 ,77 0, 000 col ors)
Bitmap Pat ter n (V RA M)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0 00 00 H Dot 0-0 (upp er wor d)
+0 00 02 H Dot 0- 0 (l ow er wo rd )
+0000 4H Dot 0-1 (upp er wor d)
Do t 255 -5 11 (up pe r wo rd )
+7 FFFCH
+7F FFEH Dot 25 5- 511 (lo wer wor d)
Dot 0 1 2 3 508 509 510 511
Dot 0 +0 000 0 +00 004 +0 000 8 +0 000 C +007 F0 +00 7F 4 +007 F8 +007 FC
+0 080 0 +00 804 +0 080 8 +0 080 C +0 0F F0 +00 FF 4 +0 0F F8 +0 0F FC
1
Bitma p
254 +7 F0 00 +7F 004 +7 F0 08 +7 F0 0C +7F 7F 0 +7F 7F 4 +7 F7 F8 +7 F7 FC
255 +7 F8 00 +7F 804 +7 F8 08 +7 F8 0C +7 FF F0 +7F FF 4 +7 FF F8 +7 FF FC
No te 1: The up per left not ation in the cel l is do t 0-0 ; to the ri gh t are dot 0-1,
dot 0- 2, do t 0-3 , ...
No te 2: Num be rs in the ce lls ar e VRA M ad dr esse s (h exa de cim al) of dot
dat a (up pe r wo rd) , with VRAM ad dr ess of dot 0- 0 da ta (uppe r wor d) as
the ref ere nce .
Figure 4.17 Bit map pattern configuration (continue)
ST-58-R2 99
(5 ) Bitmap Size : 512 H do ts X 51 2 V do ts
Bitmap Col or Coun t : 4 bit s/ do t (16 col ors)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0 00 00H Do t 0-0 Do t 0-1 Do t 0-2 Do t 0-3
+0 00 02H Do t 0-4 Do t 0-5 Do t 0-6 Do t 0-7
+1F FFEH Do t 511- 50 8 Do t 511- 50 9 Do t 511- 51 0 Do t 511- 511
Do t 0 1 2 3 50 8 50 9 51 0 511
Dot 0 +00000 +00001 +000FE +000FF
+00100 +00101 +001FE +001FF
1
Bitmap
510 +1F E0 0 +1F E0 1 +1F EFE + 1F EF F
511 +1FF0 0 +1FF0 1 + 1F FFE +1FFFF
Not e 1: The upp er lef t no tat io n in the ce l is dot 0- 0; to the right ar e do t 0- 1,
dot 0-2, dot 0- 3, ...
Not e 2: Numb er s in the cel ls ar e VRAM add re sses (hexadeci mal ) of do t (2
dot s) dat a, with VRAM ad dr ess of dot 0- 0, 0- 1 da ta as the
ref erence .
Figure 4.17 Bit map pattern configuration (continued)
100
(6) Bitmap Size : 512 H dots X 512 V dots
Bitmap Color Count : 8 bits/dot (256 colors)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00000H Dot 0-0 Dot 0-1
+00002H Dot 0-2 Dot 0-3
+3FFFEH Dot 511-510 Dot 511-511
Dot 0 1 2 3 508 509 510 511
Dot 0 +00000 +00001 +00002 +00003 +001FC +001FD +001FE +001FF
+00200 +00201 +00202 +00203 +003FC +003FD +003FE +003FF
1
Bitmap
510 +3FC00 +3FC01 +3FC02 +3FC03 +3FDFC +3FDFD +3FDFE +3FDFF
511 +3FE00 +3FE01 +3FE02 +3FE03 +3FFFC +3FFFD +3FFFE +3FFFF
Note 1: The upper left notation in the cell is dot 0-0; to the right are dot 0-1,
dot 0-2, dot 0-3, ...
Note 2: Numbers in the cells are VRAM addresses (hexadecimal) of dot
data, with VRAM address of dot 0-0 data as the reference.
Figure 4.17 Bit map pattern configuration (continued)
ST-58-R2 101
(7) Bitmap Size : 512 H dots X 512 V dots
Bitmap Color Count : 16 bits/dot (2048 colors, 32768 colors)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00000H Dot 0-0
+00002H Dot 0-1
+7FFFEH Dot 511-511
Dot 0 1 2 3 508 509 510 511
Dot 0 +00000 +00002 +00004 +00006 +003F8 +003FA +003FC +003FE
+00400 +00402 +00404 +00406 +007F8 +007FA +007FC +007FE
1
Bitmap
510 +7F800 +7F802 +7F804 +7F806 +7FBF8 +7FBFA +7FBFC +7FBFE
511 +7FC00 +7FC02 +7FC04 +7FC06 +7FFF8 +7FFFA +7FFFC +7FFFE
Note 1: The upper left notation in the cell is dot 0-0; to the right are dot 0-1,
dot 0-2, dot 0-3, ...
Note 2: Numbers in the cells are VRAM addresses (hexadecimal) of dot
data, with VRAM address of dot 0-0 data as the reference.
Figure 4.17 Bit map pattern configuration (continued)
102
(8) Bitmap Size : 512 H dots X 512 V dots
Bitmap Color Count : 32 bits/dot (16,770,000 colors)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00000H Dot 0-0 (upper word)
+00002H Dot 0-0 (lower word)
+00004H Dot 0-1 (upper word)
Dot 511-511 (upper word)
+FFFFCH
+FFFFEH Dot 511-511 (lower word)
Dot 0 1 2 3 508 509 510 511
Dot 0 +00000 +00004 +00008 +0000C +007F0 +007F4 +007F8 +007FC
+00800 +00804 +00808 +0080C +00FF0 +00FF4 +00FF8 +00FFC
1
Bitmap
510 +FF000 +FF004 +FF008 +FF00C +FF7F0 +FF7F4 +FF7F8 +FF7FC
511 +FF800 +FF804 +FF808 +FF80C +FFFF0 +FFFF4 +FFFF8 +FFFFC
Note 1: The upper left notation in the cell is dot 0-0; to the right are dot 0-1,
dot 0-2, dot 0-3, ...
Note 2: Numbers in the cells are VRAM addresses (hexadecimal) of dot
data (upper word), with VRAM address of dot 0-0 data (upper word) as
the reference.
Figure 4.17 Bit map pattern configuration (continued)
ST-58-R2 103
(9) Bitmap Size : 1024 H dots X 256 V dots
Bitmap Color Count : 4 bits/dot (16 colors)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00000H Dot 0-0 Dot 0-1 Dot 0-2 Dot 0-3
+00002H Dot 0-4 Dot 0-5 Dot 0-6 Dot 0-7
+1FFFEH Dot 255-1020 Dot 255-1021 Dot 255-1022 Dot 255-1023
Dot 0 1 2 3 1020 1021 1022 1023
Dot 0 +00000 +00001 +001FE +001FF
+00200 +00201 +003FE +003FF
1
Bitmap
254 +1FC00 +1FC01 +1FDFE +1FDFF
255 +1FE00 +1FE01 +1FFFE +1FFFF
Note 1: The upper left notation in the cell is dot 0-0; to the right are dot 0-1,
dot 0-2, dot 0-3, ...
Note 2: Numbers in the cells are VRAM addresses (hexadecimal) of dot (2
dots) data, with VRAM address of dot 0-0, 0-1 data as the
reference.
Figure 4.17 Bit map pattern configuration (continued)
104
(10) Bitmap Size : 1024 H dots X 256 V dots
Bitmap Color Count : 8 bits/dot (256 colors)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00000H Dot 0-0 Dot 0-1
+00002H Dot 0-2 Dot 0-3
+3FFFEH Dot 255-1022 Dot 255-1023
Dot 0 1 2 3 1020 1021 1022 1023
Dot 0 +00000 +00001 +00002 +00003 +003FC +003FD +003FE +003FF
+00400 +00401 +00402 +00403 +007FC +007FD +007FE +007FF
1
Bitmap
254 +3F800 +3F801 +3F802 +3F803 +3FBFC +3FBFD +3FBFE +3FBFF
255 +3FC00 +3FC01 +3FC02 +3FC03 +3FFFC +3FFFD +3FFFE +3FFFF
Note 1: The upper left notation in the cell is dot 0-0; to the right are dot 0-1,
dot 0-2, dot 0-3, ...
Note 2: Numbers in the cells are VRAM addresses (hexadecimal) of dot
data, with VRAM address of dot 0-0 data as the reference.
Figure 4.17 Bit map pattern configuration (continued)
ST-58-R2 105
(11) Bitmap Size : 1024 H dots X 256 V dots
Bitmap Color Count : 16 bits/dot (2048 colors, 32768 colors)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00000H Dot 0-0
+00002H Dot 0-1
+7FFFEH Dot 255-1023
Dot 0 1 2 3 1020 1021 1022 1023
Dot 0 +00000 +00002 +00004 +00006 +007F8 +007FA +007FC +007FE
+00800 +00802 +00804 +00806 +00FF8 +00FFA +00FFC +00FFE
1
Bitmap
254 +7F000 +7F002 +7F004 +7F006 +7F7F8 +7F7FA +7F7FC +7F7FE
255 +7F800 +7F802 +7F804 +7F806 +7FFF8 +7FFFA +7FFFC +7FFFE
Note 1: The upper left notation in the cell is dot 0-0; to the right are dot 0-1,
dot 0-2, dot 0-3, ...
Note 2: Numbers in the cells are VRAM addresses (hexadecimal) of dot
data, with VRAM address of dot 0-0 data as the reference.
Figure 4.17 Bit map pattern configuration (continued)
106
(12) Bitmap Size : 1024 H dots X 256 V dots
Bitmap Color Count : 32 bits/dot (16,770,000 colors)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00000H Dot 0-0 (upper word)
+00002H Dot 0-0 (lower word)
+00004H Dot 0-1 (upper word)
Dot 255-1023 (upper word)
+FFFFCH
+FFFFEH Dot 255-1023 (lower word)
Dot 0 1 2 3 1020 1021 1022 1023
Dot 0 +00000 +00004 +00008 +0000C +00FF0 +00FF4 +00FF8 +00FFC
+01000 +01004 +01008 +0100C +01FF0 +01FF4 +01FF8 +01FFC
1
Bitmap
254 +FE000 +FE004 +FE008 +FE00C +FEFF0 +FEFF4 +FEFF8 +FEFFC
255 +FF000 +FF004 +FF008 +FF00C +FFFF0 +FFFF4 +FFFF8 +FFFFC
Note 1: The upper left notation in the cell is dot 0-0; to the right are dot 0-1,
dot 0-2, dot 0-3, ...
Note 2: Numbers in the cells are VRAM addresses (hexadecimal) of dot
data (upper word), with VRAM address of dot 0-0 data (upper word)
as the reference.
Figure 4.17 Bit map pattern configuration (continued)
ST-58-R2 107
(13) Bitmap Size : 1024 H dots X 512 V dots
Bitmap Color Count : 4 bits/dot (16 colors)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00000H Dot 0-0 Dot 0-1 Dot 0-2 Dot 0-3
+00002H Dot 0-4 Dot 0-5 Dot 0-6 Dot 0-7
+3FFFEH Dot 511-1020 Dot 511-1021 Dot 511-1022 Dot 511-1023
Dot 0 1 2 3 1020 1021 1022 1023
Dot 0 +00000 +00001 +001FE +001FF
+00200 +00201 +003FE +003FF
1
Bitmap
510 +3FC00 +3FC01 +3FDFE +3FDFF
511 +3FE00 +3FE01 +3FFFE +3FFFF
Note 1: The upper left notation in the cell is dot 0-0; to the right are dot 0-1,
dot 0-2, dot 0-3, ...
Note 2: Numbers in the cells are VRAM addresses (hexadecimal) of dot (2
dots) data, with VRAM address of dot 0-0, 0-1 data as the
reference.
Figure 4.17 Bit map pattern configuration (continued)
108
(14) Bitmap Size : 1024 H dots X 512 V dots
Bitmap Color Count : 8 bits/dot (256 colors)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00000H Dot 0-0 Dot 0-1
+00002H Dot 0-2 Dot 0-3
+7FFFEH Dot 511-1022 Dot 511-1023
Dot 0 1 2 3 1020 1021 1022 1023
Dot 0 +00000 +00001 +00002 +00003 +003FC +003FD +003FE +003FF
+00400 +00401 +00402 +00403 +007FC +007FD +007FE +007FF
1
Bitmap
510 +7F800 +7F801 +7F802 +7F803 +7FBFC +7FBFD +7FBFE +7FBFF
511 +7FC00 +7FC01 +7FC02 +7FC03 +7FFFC +7FFFD +7FFFE +7FFFF
Note 1: The upper left notation in the cell is dot 0-0; to the right are dot 0-1,
dot 0-2, dot 0-3, ...
Note 2: Numbers in the cells are VRAM addresses (hexadecimal) of dot
data, with VRAM address of dot 0-0 data as the reference.
Figure 4.17 Bit map pattern configuration (continued)
ST-58-R2 109
(15) Bitmap Size : 1024 H dots X 512 V dots
Bitmap Color Count : 16 bits/dot (2048 colors, 32768 colors)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00000H Dot 0-0
+00002H Dot 0-1
+FFFFEH Dot 511-1023
Dot 0 1 2 3 1020 1021 1022 1023
Dot 0 +00000 +00002 +00004 +00006 +007F8 +007FA +007FC +007FE
+00800 +00802 +00804 +00806 +00FF8 +00FFA +00FFC +00FFE
1
Bitmap
510 +FF000 +FF002 +FF004 +FF006 +FF7F8 +FF7FA +FF7FC +FF7FE
511 +FF800 +FF802 +FF804 +FF806 +FFFF8 +FFFFA +FFFFC +FFFFE
Note 1: The upper left notation in the cell is dot 0-0; to the right are dot 0-1,
dot 0-2, dot 0-3, ...
Note 2: Numbers in the cells are VRAM addresses (hexadecimal) of dot
data, with VRAM address of dot 0-0 data as the reference.
Figure 4.17 Bit map pattern configuration (continued)
110
Bit Map Palette Number
The bit map palette number designates the lead address of the palette used in the bit
map pattern. With the 3-bit data designated by the bit map palette number register,
the bit map palette number can only be used when the color format is in the palette
format. It cannot be used when in the RGB format. Because the palette number is
added to the dot color code of the bit map pattern to make an 11 bit dot color code, the
bit count that is used by the color count on each surface changes. Figure 4.18 shows
dot color data by bit map number colors.
Bitmap Color Count : 16 colors
Palette Number Dot Color Code
6 5 4 3 2 1 0 3 2 1 0
Fixed at 0
Bitmap Palette Number Register Setting
Bitmap Color Count : 256 colors
Palette No. Dot Color Code
6 5 4 7 6 5 4 3 2 1 0
Bitmap Palette Number Register Setting
Bitmap Color Count : 2048 colors
Dot Color Code
10 9 8 7 6 5 4 3 2 1 0
Figure 4.18 Dot color data by bit map color numbers
Special Function Bit
The special function bit designates whether to use the special function for bit map
patterns. The special function bit has a special priority bit that controls the priority
number and the special color calculation bit that controls color calculation. For more
information on the special priority bit see “11.2 Special Priority Function.” For more
information on the color calculation bit see “12.2 Special Color Calculation Function.”
ST-58-R2 111
Bit Map Palette Number Register
Bit map palette number register selects the palette number when the scroll screen is
displayed by the bit map format and special function bit. This register is a write-
only 16-bit register located in addresses 18002CH to 18002EH. Because the value is
cleared to 0 after the power is turned on or reset, make sure the value is set.
15 14 13 12 11 10 9 8
BMPNA ~ ~ N1BMPR N1BMCC ~ N1BMP6 N1BMP5 N1BMP4
18002CH 7 6 5 4 3 2 1 0
~ ~ N0BMPR N0BMCC ~ N0BMP6 N0BMP5 N0BMP4
15 14 13 12 11 10 9 8
BMPNB ~ ~ ~ ~ ~ ~ ~ ~
18002EH 7 6 5 4 3 2 1 0
~ ~ R0BMPR R0BMCC ~ R0BMP6 R0BMP5 R0BMP4
Special priority bit (for bit map): Bit map special priority bit (N0BMPR, N1BMPR, R0BMPR)
Designates the special priority bit when the scroll screen is displayed by the bit map
format.
N0BMPR 18002CH Bit 5 For NBG0
N1BMPR 18002CH Bit 13 For NBG1
R0BMPR 18002EH Bit 5 For RBG0
See section “11.2 Special Priority Function” on how to use this bit.
Special color calculation bit (for bit map): Bit map special color calculation bit (N0BMCC,
N1BMCC, R0BMCC)
Designates the special color calculation bit when the scroll screen is displayed by the
bit map format.
N0BMCC 18002CH Bit 4 For NBG0
N1BMCC 18002CH Bit 12 For NBG1
R0BMCC 18002EH Bit 4 For RBG0
See section “12.2 Special Color Calculation Function” on how to use this bit.
112
Palette number bit (for bit map): Bit map palette number bit (N0BMP2 to N0BMP0, N1BMP2 to
N1BMP0, R0BMP2 to R0BMP0)
Designates the highest three bits of the palette number when the scroll screen is
displayed in the bit map format.
N0BMP6~N0BMP4 18002CH Bit 2~0 For NBG0
N1BMP6~N1BMP4 18002CH Bit 10~8 For NBG1
R0BMP6~R0BMP4 18002EH Bit 2~0 For RBG0
When the bit map color count is 16 colors, a “0” is attached to the lowest four bits
and used as the 7-bit palette number.
ST-58-R2 113
4.10 Display Area
The display area of the scroll screen changes depending on the register setting. The
display area image is repeated and displayed when display coordinate values ex-
ceed the display area in the Normal scroll screen. Control is executed by the register
setting when display coordinate values exceed the display area in the rotation scroll
surface.
Display Area
The display area changes according to the plane size when scroll screen display
format is the cell format, and according to the bit map size when in the bit map
format. NBG0 and NBG1 also change by setting the reduction display up to 1/4.
Tables 4.12 and 4.13 show the display areas.
Table 4.12 Normal scroll screen display area
Display Reduction Plane Size Bitmap Size Display Area
Format Setting
1 H page X - 0≤X<1024, 0≤Y<1024
1 V page
No reduction~ 1/2 2 H pages X - 0≤X<2048, 0≤Y<1024
reduction 1 V page
Cell format 2 H pages X - 0≤X<2048, 0≤Y<2048
2 V pages
Up to 1/4 1 H page X - 0≤X<1024, 0≤Y<2048
reduction 1 V page
2 H pages X - 0≤X<2048, 0≤Y<2048
1 V page
- 512 H dots X 0≤X<512, 0≤Y<256
256 V dots
Bitmap Format - - 512 H dots X 0≤X<512, 0≤Y<512
512 V dots
- 1024 H dots X 0≤X<1024, 0≤Y<256
256 V dots
- 1024 H dots X 0≤X<1024, 0≤Y<512
512 V dots
Table 4.13 Rotation Scroll Surface display area
Display Format Plane Size Bitmap Size Display Area
1 H page X - 0≤X<2048, 0≤Y<2048
1 V page
Cell format 2 H pages X - 0≤X<4096, 0≤Y<2048
1 V page
2 H pages X - 0≤X<4096, 0≤Y<4096
2 V pages
Bitmap Format - 512 H dots X 0≤X<512, 0≤Y<256
256 V dots
- 512 H dots X 0≤X<512, 0≤Y<512
512 V dots
114
Screen-Over Process
While the rotation scroll surface is displayed, and if the calculated results of display
coordinate values of an display area have been exceeded, select one of the four below
and set it to the register. The setting of the screen-over process is not performed for
RBG0 and RBG1, but is performed for the scroll screen by rotation parameter A and
the scroll screen by rotation parameter B.
1. The outside of the display area repeats the image set in the display area.
2. The outside of the display area repeats the character pattern designated by the
screen-over pattern name register (only when the rotation scroll surface is in the
cell format).
3. The outside of the display area is transparent.
4. With no relationship to the plane size and bit map size, the display area is at
0 ≤ X < 512 and 0 ≤ Y < 512. The outside of the display area is all made to be
transparent.
Display-Over Pattern Name
When the designated character pattern is made to be repeated, pattern name data
selects the screen-over control setting in a16-bit screen-over pattern name register.
The screen-over pattern name data selected in the register is handled the same as
when the data size of the scroll surface pattern name table is 1-word; it uses supple-
mental data in the lowest 10 bits of the pattern name control register, supplements
insufficient bits, and does screen-over pattern name data of a total 26 bits. The bit
configuration of the screen-over pattern name register is the same as when the pattern
name data size is 1-word, as in “Pattern Name Table” of section 4.6; and changes
depending on character size, character color number, and the character number
supplement mode. The size of the repeated character pattern follows the setting of
the character size.
16-bit screen over pattern name data designates for the scroll screen by rotation pa-
rameter A and scroll screen by rotation parameter B, but you should be careful when
designating for RBG0 and RBG1 by 10-bit supplement data designated by the pattern
name control register. Besides, screen-over pattern name data cannot be used when
the rotation scroll screen is displayed in the bit map format.
ST-58-R2 115
Screen-Over Pattern Name Register
In the screen-over process of the rotation scroll surface, the screen-over pattern name
register selects pattern name data when the repetition of the character pattern is set.
This register is a write-only 16-bit register and is in addresses 1800B8H to 1800BAH.
Because the value is cleared to 0 after the power is turned on or reset, be sure to set
the value.
15 14 13 12 11 10 9 8
OVPNRA RAOPN15 RAOPN14 RAOPN13 RAOPN12 RAOPN11 RAOPN10 RAOPN9 RAOPN8
1800B8H 7 6 5 4 3 2 1 0
RAOPN7 RAOPN6 RAOPN5 RAOPN4 RAOPN3 RAOPN2 RAOPN1 RAOPN0
15 14 13 12 11 10 9 8
OVPNRB RBOPN15 RBOPN14 RBOPN13 RBOPN12 RBOPN11 RBOPN10 RBOPN9 RBOPN8
1800BAH 7 6 5 4 3 2 1 0
RBOPN7 RBOPN6 RBOPN5 RBOPN4 RBOPN3 RBOPN2 RBOPN1 RBOPN0
Over pattern name bit (RAOPN15 to RAOPN0, RBOPN15 to RBOPN0)
Designates pattern name data when the screen-over process repeating the character
pattern is set.
RAOPN15~RAOPN0 1800B8H Bit 15~0 For Rotation Parameter A
RBOPN15~RBOPN0 1800BAH Bit 15~0 For Rotation Parameter B
The bit configuration is the same as when the data size of the pattern name table is
one-word; and changes depending on the settings of the character size, character
color number, and character number supplement mode.
This register action is executed for the scroll screen by rotation parameter A and B,
but the character size that decides the bit configuration as well as the character
number supplement mode performs in RBG0 and RBG1. Therefore, be careful when
simultaneously displaying screens by rotation parameter A and B in RBG0.
116
4.11 Mosaic Process
The mosaic process can be done for each screen using the scroll surface. The mosaic
size can be set for the respective horizontal and vertical directions. The mosaic
process divides each scroll screen into several areas of pre-determined size. This
function displays all dots within various areas of colored dots in the upper left. The
mosaic pattern can be achieved by aligning different color areas. The size of the
mosaic area can be individually selected. Size in the horizontal direction can select
from 1 to 16 dots in single dot units. Size in the vertical direction can select from 1 to
16 dots in the non-interlace mode in single dot units, and 2 to 32 dots in the interlace
mode in two-dot units. If the register is set to do mosaic processing when in the
double-density interlace mode, the screen is made to display in the single-density
interlace mode.
When using the mosaic process in NBG0 or NBG1, the vertical cell scroll function
can no longer be used. Also, mosaic processing of RBG0 and RBG1 can only be done
in the horizontal direction. Figure 4.19 shows the mosaic pattern.
The color of dots in the upper-left corner of
Horizontal each area is used for all dots in that area.
Mosaic Size
Vertical Area A Area B
Mosaic Size
Area C Area D
Figure 4.19 Mosaic Pattern
ST-58-R2 117
Mosaic Control Register
The mosaic control register selects whether to perform the mosaic process. It is a
write-only 16-bit register and is in address 180022H. Because the value is cleared to
0 after the power is turned on or reset, be sure to set the value.
15 14 13 12 11 10 9 8
MZCTL MZSZV3 MZSZV2 MZSZV1 MZSZV0 MZSZH3 MZSZH2 MZSZH1 MZSZH0
180022H 7 6 5 4 3 2 1 0
~ ~ ~ R0MZE N3MZE N2MZE N1MZE N0MZE
Mosaic size bit (MZSZH3 to MZSZH0, MZSZV3 to MZSZV0)
Designates the horizontal and vertical mosaic size.
MZSZV3~MZSZV0 180022H Bit 15~12 For vertical mosaic size
MZSZH3~MZSZH0 180022H Bit 11~8 For horizontal mosaic size
MZSZH3 MZSZH2 MZSZH1 MZSZH0 Horizontal Mosaic Size
0 0 0 0 1 dot
0 0 0 1 2 dots
0 0 1 0 3 dots
0 0 1 1 4 dots
0 1 0 0 5 dots
0 1 0 1 6 dots
0 1 1 0 7 dots
0 1 1 1 8 dots
1 0 0 0 9 dots
1 0 0 1 10 dots
1 0 1 0 11 dots
1 0 1 1 12 dots
1 1 0 0 13 dots
1 1 0 1 14 dots
1 1 1 0 15 dots
1 1 1 1 16 dots
118
MZSZV3 MZSZV2 MZSZV1 MZSZV0 Vertical Mosaic Size
Non-Interlace Interlace
0 0 0 0 1 dot 2 dots
0 0 0 1 2 dots 4 dots
0 0 1 0 3 dots 6 dots
0 0 1 1 4 dots 8 dots
0 1 0 0 5 dots 10 dots
0 1 0 1 6 dots 12 dots
0 1 1 0 7 dots 14 dots
0 1 1 1 8 dots 16 dots
1 0 0 0 9 dots 18 dots
1 0 0 1 10 dots 20 dots
1 0 1 0 11 dots 22 dots
1 0 1 1 12 dots 24 dots
1 1 0 0 13 dots 26 dots
1 1 0 1 14 dots 28 dots
1 1 1 0 15 dots 30 dots
1 1 1 1 16 dots 32 dots
Note: There is no relationship with the interlace setting.
Mosaic enable bit (N0MZE, N1MZE, N2MZE, N3MZE, R0MZE)
Designates the screen performing mosaic process.
N0MZE 180022H Bit 0 For NBG0 (or RBG1)
N1MZE 180022H Bit 1 For NBG1
N2MZE 180022H Bit 2 For NBG2
N3MZE 180022H Bit 3 For NBG3
R0MZE 180022H Bit 4 For RBG0
xxMZE Process
0 Does not execute mosaic process
1 Processes mosaic process
Note: N0, N1, N2, N3, or R0 is entered in bit name for xx.
Only horizontal mosaic processing is performed when the mosaic process is in the
rotation scroll surface. If performing mosaic processing in the double-density inter-
lace mode, the screen is made to be displayed by the single-density interlace mode.
If performing mosaic processing in NBG0 or NBG1, the mosaic screen will not be
able to use the vertical cell-scroll function. As a result, the mosaic process is done on
the display screen for screens that don’t cell-scroll vertically.
ST-58-R2 119
(This page was blank in the original Japanese document)
120
Chapter 5 Normal Scroll Screen
Introduction.......................................................................... 122
5.1 Screen Scroll Function .................................................. 122
Screen Scroll Value Register ...................................... 123
5.2 Expansion/Contraction Function ................................... 126
Coordinate Increment Register .................................. 127
Reduction Enable Register ......................................... 129
5.3 Line and Vertical Cell Scroll Function ............................ 131
Line Scroll Function .................................................... 131
Vertical Cell Scroll Function ........................................ 134
Line and Vertical Cell Scroll Control Register............. 137
Line Scroll Table Address Register............................. 140
Vertical Cell Scroll Table Address Register ................ 141
ST-58-R2 121
Introduction
The normal scroll screen has four surfaces, NBG0 to NBG3; each surface can be
scrolled up and down, left and right. NBG0 and NBG1 can be expanded and re-
duced, line scrolled, and cell scrolled vertically.
5.1 Screen Scroll Function
All four surfaces of the normal scroll screen can dot scroll up, down, left, or right in
surface units. The screen scroll value selects, in the screen scroll value register, the
dot coordinates displayed in the upper left of the TV screen. The screen scroll value
is in effect up to and including values that don’t exceed the display area set for each
screen. The display area of the screen is repeated when a value that exceeds the
display area is selected. The fractional part of the screen scroll value for NBG0 and
NBG1 is used only in calculating coordinates; the final display coordinate values are
discarded. The horizontal (X) coordinate is selected by the horizontal screen scroll
value integer part bit and horizontal screen scroll value fractional part bit. The
vertical (Y) coordinate is selected by the vertical screen scroll value integer part bit
and vertical screen scroll value fractional part bit. The fractional part bit is added
immediately below the integer bit. Figure 5.1 shows the bit configuration.
Horizontal and Vertical Screen Scroll Value Register (NBG0, NBG1)
Bit 31 26 15 8 0
Integer Part Fractional Part
Horizontal and Vertical Screen Scroll Value Register (NBG2, NBG3)
Bit 15 10 0
Integer part
Figure 5.1 Screen scroll value bit configuration
122
Screen Scroll Value Register
The screen scroll value register designates the screen scroll value. It is a write-only
16- or 32-bit register located at addresses 180070H to 180076H, 180080H to 180086H,
and 180090H to 180096H. Because the value is cleared to 0, it must be set after
power on or reset.
15 14 13 12 11 10 9 8
SCXIN0 ~ ~ ~ ~ ~ N0SCXI10 N0SCXI9 N0SCXI8
180070H 7 6 5 4 3 2 1 0
N0SCXI7 N0SCXI6 N0SCXI5 N0SCXI4 N0SCXI3 N0SCXI2 N0SCXI1 N0SCXI0
15 14 13 12 11 10 9 8
SCXDN0 N0SCXD1 N0SCXD2 N0SCXD3 N0SCXD4 N0SCXD5 N0SCXD6 N0SCXD7 N0SCXD8
180072H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
15 14 13 12 11 10 9 8
SCYIN0 ~ ~ ~ ~ ~ N0SCYI10 N0SCYI9 N0SCYI8
180074H 7 6 5 4 3 2 1 0
N0SCYI7 N0SCYI6 N0SCYI5 N0SCYI4 N0SCYI3 N0SCYI2 N0SCYI1 N0SCYI0
15 14 13 12 11 10 9 8
SCYDN0 N0SCYD1 N0SCYD2 N0SCYD3 N0SCYD4 N0SCYD5 N0SCYD6 N0SCYD7 N0SCYD8
180076H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
15 14 13 12 11 10 9 8
SCXIN1 ~ ~ ~ ~ ~ N1SCXI10 N1SCXI9 N1SCXI8
180080H 7 6 5 4 3 2 1 0
N1SCXI7 N1SCXI6 N1SCXI5 N1SCXI4 N1SCXI3 N1SCXI2 N1SCXI1 N1SCXI0
15 14 13 12 11 10 9 8
SCXDN1 N1SCXD1 N1SCXD2 N1SCXD3 N1SCXD4 N1SCXD5 N1SCXD6 N1SCXD7 N1SCXD8
180082H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
15 14 13 12 11 10 9 8
SCYIN1 ~ ~ ~ ~ ~ N1SCYI10 N1SCYI9 N1SCYI8
180084H 7 6 5 4 3 2 1 0
N1SCYI7 N1SCYI6 N1SCYI5 N1SCYI4 N1SCYI3 N1SCYI2 N1SCYI1 N1SCYI0
15 14 13 12 11 10 9 8
SCYDN1 N1SCYD1 N1SCYD2 N1SCYD3 N1SCYD4 N1SCYD5 N1SCYD6 N1SCYD7 N1SCYD8
180086H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
ST-58-R2 123
15 14 13 12 11 10 9 8
SCXN2 ~ ~ ~ ~ ~ N2SCX10 N2SCX9 N2SCX8
180090H 7 6 5 4 3 2 1 0
N2SCX7 N2SCX6 N2SCX5 N2SCX4 N2SCX3 N2SCX2 N2SCX1 N2SCX0
15 14 13 12 11 10 9 8
SCYN2 ~ ~ ~ ~ ~ N2SCY10 N2SCY9 N2SCY8
180092H 7 6 5 4 3 2 1 0
N2SCY7 N2SCY6 N2SCY5 N2SCY4 N2SCY3 N2SCY2 N2SCY1 N2SCY0
15 14 13 12 11 10 9 8
SCXN3 ~ ~ ~ ~ ~ N3SCX10 N3SCX9 N3SCX8
180094H 7 6 5 4 3 2 1 0
N3SCX7 N3SCX6 N3SCX5 N3SCX4 N3SCX3 N3SCX2 N3SCX1 N3SCX0
15 14 13 12 11 10 9 8
SCYN3 ~ ~ ~ ~ ~ N3SCY10 N3SCY9 N3SCY8
180096H 7 6 5 4 3 2 1 0
N3SCY7 N3SCY6 N3SCY5 N3SCY4 N3SCY3 N3SCY2 N3SCY1 N3SCY0
Screen scroll value bit: Scroll bit (N0SCXI10 to N0SCXI0, N0SCXD1 to
N0SCXD8, N0SCYI10 to N0SCYI0, N0SCYD1 to N0SCYD8, N1SCXI10 to N1SCXI0, N1SCXD1 to
N1SCXD8, N1SCYI10 to N1SCYI0, N1SCYD1 to N1SCYD8, N2SCX10 to N2SCX0, N2SCY10 to
N2SCY0, N3SCX10 to N3SCX0, N3SCY10 to N3SCY0)
Designates the horizontal and vertical screen scroll values (coordinate values) of the
Normal scroll screen.
N0SCXI10~N0SCXI0 180070H Bit 10~0 For NBG0 horizontal direction (integer part)
N0SCXD1~N0SCXD8 180072H Bit 15~8 For NBG0 horizontal direction (fractional part)
N0SCYI10~N0SCYI0 180074H Bit 10~0 For NBG0 vertical direction (integer part)
N0SCYD1~N0SCYD8 180076H Bit 15~8 For NBG0 vertical direction (fractional part)
N1SCXI10~N1SCXI0 180080H Bit 10~0 For NBG1 horizontal direction (integer part)
N1SCXD1~N1SCXD8 180082H Bit 15~8 For NBG1 horizontal direction (fractional part)
N1SCYI10~N1SCYI0 180084H Bit 10~0 For NBG1 vertical direction (integer part)
N1SCYD1~N1SCYD8 180086H Bit 15~8 For NBG1 vertical direction (fractional part)
N2SCX10~N2SCX0 180090H Bit 10~0 For NBG2 horizontal direction
N2SCY10~N2SCY0 180092H Bit 10~0 For NBG2 vertical direction
N3SCX10~N3SCX0 180094H Bit 10~0 For NBG3 horizontal direction
N3SCY10~N3SCY0 180096H Bit 10~0 For NBG3 vertical direction
124
The value of the screen scroll value register is effective up to a range not exceeding
the display area of each screen. When the display area is exceeded, the screen of the
display area is repeatedly displayed. All screen scroll values must be identified as
positive values. By changing the value during the horizontal retrace, the scroll value
can also be changed in the middle of the image screen.
ST-58-R2 125
5.2 Expansion/Contraction Function
NBG0 and NBG1 can expand and reduce the entire screen both horizontally and
vertically. Controlling expansion and reduction is done by selecting horizontal and
vertical coordinate increments required in display coordinate calculations. When
reducing in horizontally, the reduction enable register must be set as certain screens
cannot be displayed, depending on this setting.
Display coordinates are calculated by the expressions below.
Note: the fractional part of the calculated results are discarded.
(display coordinate value X) = (coordinate increment X) X (H counter value) + (screen scroll value X)
(display coordinate value Y) = (coordinate increment Y) X (V counter value) + (screen scroll value Y)
Screen expansion and reduction are controlled by setting the horizontal and vertical
coordinate increments in the coordinate increment register. The horizontal coordi-
nate increment is selected by the horizontal coordinate increment integer part bit
and horizontal coordinate increment fractional part bit. The vertical coordinate
increment is selected by the vertical coordinate increment integer part bit and hori-
zontal coordinate increment fractional part bit.
The fractional part bit is added immediately below the integer bit part. Figure 5.2
shows the bit configuration
Hor izon tal and Ver tical Coo rdi na te Incr em ent s
Bit 31 18 15 8 0
Int ege r Part Fr act iona l Part
Figure 5.2 Configuration of coordinate increment register.
126
Coordinate Increment Register
The coordinate increment register designates the coordinate increment when calcu-
lating the coordinates of the scroll screen. This is a write-only 32-bit register located
at addresses 180078H to 18007EH, and 180088H to 18008EH. Because the value of
the register is cleared to 0 after power on or reset, the value must be set.
15 14 13 12 11 10 9 8
ZMXIN0 ~ ~ ~ ~ ~ ~ ~ ~
180078H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N0ZMXI2 N0ZMXI1 N0ZMXI0
15 14 13 12 11 10 9 8
ZMXDN0 N0ZMXD1 N0ZMXD2 N0ZMXD3 N0ZMXD4 N0ZMXD5 N0ZMXD6 N0ZMXD7 N0ZMXD8
18007AH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
15 14 13 12 11 10 9 8
ZMYIN0 ~ ~ ~ ~ ~ ~ ~ ~
18007CH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N0ZMYI2 N0ZMYI1 N0ZMYI0
15 14 13 12 11 10 9 8
ZMYDN0 N0ZMYD1 N0ZMYD2 N0ZMYD3 N0ZMYD4 N0ZMYD5 N0ZMYD6 N0ZMYD7 N0ZMYD8
18007EH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
15 14 13 12 11 10 9 8
ZMXIN1 ~ ~ ~ ~ ~ ~ ~ ~
180088H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N1ZMXI2 N1ZMXI1 N1ZMXI0
15 14 13 12 11 10 9 8
ZMXDN1 N1ZMXD1 N1ZMXD2 N1ZMXD3 N1ZMXD4 N1ZMXD5 N1ZMXD6 N1ZMXD7 N1ZMXD8
18008AH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
15 14 13 12 11 10 9 8
ZMYIN1 ~ ~ ~ ~ ~ ~ ~ ~
18008CH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N1ZMYI2 N1ZMYI1 N1ZMYI0
15 14 13 12 11 10 9 8
ZMYDN1 N1ZMYD1 N1ZMYD2 N1ZMYD3 N1ZMYD4 N1ZMYD5 N1ZMYD6 N1ZMYD7 N1ZMYD8
18008EH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
ST-58-R2 127
Coordinate increment bit: Zoom bit (N0ZMXI2 to N0ZMXI0, N0ZMXD1 to
N0ZMXD8, N0ZMYI2 to N0ZMYI0, N0ZMYD1 to N0ZMYD8, N1ZMXI2 to N1ZMXI0, N1ZMXD1 to
N1ZMXD8, N1ZMYI2 to N1ZMYI0, N1ZMYD1 to N1ZMYD8)
Designates horizontal and vertical coordinate increments for calculating display
coordinates when expanding and reducing all Normal scroll screens.
N0ZMXI2~N0ZMXI0 180078H Bit 2~0 For NBG0 horizontal direction (integer part)
N0ZMXD1~N0ZMXD8 18007AH Bit 15~8 For NBG0 horizontal direction (fractional part)
N0ZMYI2~N0ZMYI0 18007CH Bit 2~0 For NBG0 vertical direction (integer part)
N0ZMYD1~N0ZMYD8 18007EH Bit 15~8 For NBG0 vertical direction (fractional part)
N1ZMXI2~N1ZMXI0 180088H Bit 2~0 For NBG1 horizontal direction (integer part)
N1ZMXD1~N1ZMXD8 18008AH Bit 15~8 For NBG1 horizontal direction (fractional part)
N1ZMYI2~N1ZMYI0 18008CH Bit 2~0 For NBG1 vertical direction (integer part)
N1ZMYD1~N1ZMYD8 18008EH Bit 15~8 For NBG1 vertical direction (fractional part)
The coordinate increment should be a value smaller than “1” in the expansion dis-
play, and larger than “1” in the reduction display. The normal display is when the
coordinate increment is 1. Selections are all by positive values. The coordinate parts
of NBG2 and NBG3 are fixed at “1”.
By changing the value during the horizontal retrace, the coordinate increment value
can also be changed.
The reduction enable register must be set when reduction display is horizontal.
Depending on the setting of the reduction enable bit, do not set horizontal coordi-
nate increment to a value other than the set range decided upon. Table 5.1 shows
coordinate increments and reduction settings in the horizontal direction.
Table 5.1 Horizontal coordinate increments and reduction settings
Horizontal Reduction Display Setting Horizontal Coordinate Increment Setting Range
Not allowed 0 ≤ (Horizontal Coordinate Increment) ≤ 1
Up to 1/2 0 ≤ (Horizontal Coordinate Increment) ≤ 2
Up to 1/4 0 ≤ (Horizontal Coordinate Increment) ≤ 4
128
Reduction Enable Register
The reduction enable register is a write-only 16 bit register that controls the horizon-
tal reduction display, and is located at address 180098H. Because the value of the
register is cleared to 0 after power on or reset, the value must be set.
15 14 13 12 11 10 9 8
ZMCTL ~ ~ ~ ~ ~ ~ N1ZMQT N1ZMHF
180098H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ N0ZMQT N0ZMHF
Reduction enable bit: Zoom quarter/half bit (N1ZMQT, N1ZMHF, N0ZMQT, N0ZMHF)
Designates the maximum reducible range of each Normal scroll screen in the hori-
zontal direction.
N0ZMHF 180098H Bit 0 For NBG0
N0ZMQT 180098H Bit 1 For NBG0
N1ZMHF 180098H Bit 8 For NBG1
N1ZMQT 180098H Bit 9 For NBG1
NxZMQT NxZMHF Horizontal Reduction Display Restriction Items
0 0 Not allowed None
0 1 Up to 1/2 The number of character colors can be
set for 16 or 256 colors only.
1 0 Up to 1/4 The number of character colors can be
set for 16 colors only.
1 1 Up to 1/4 The number of character colors can be
set for 16 colors only.
Note: 0 or 1 is entered in bit name for x.
For reduction of up to 1/2, set the corresponding screen character color count (bit
map pattern color count) to 16 or 256 colors. For reduction of up to 1/4, set to 16
colors. The horizontal coordinate increment should not exceed the set range of these
bits.
ST-58-R2 129
Certain screens cannot display depending on the reduction setting. Limits are
shown in Table 5.2.
Table 5.2 Display screen limits by setting of reduction enable bit
Screen Character Color Count Reduction Enable Setting Screens That Cannot
(Bitmap Color Count) Display
16 Colors Up to 1/2 None
NBG0 Up to 1/4 NBG2
256 Colors Up to 1/2 NBG2
16 Colors Up to 1/2 None
NBG1 Up to 1/4 NBG3
256 Colors Up to 1/2 NBG3
130
5.3 Line and Vertical Cell Scroll Function
Within the Normal scroll screen, there is a line scroll function and vertical cell scroll
function in NBG0 and NBG1. The line scroll function selects the horizontal and
vertical screen scroll value and horizontal coordinate increment in line units. The
vertical cell scroll function selects the vertical screen scroll value in horizontal cell
units. Both functions can be used without relationship to the cell format and bit map
format.
Line Scroll Function
The line scroll function selects the horizontal and vertical screen scroll value and
horizontal coordinate increment in line units, and specifies by line scroll tables
stored in VRAM. Data values of line scroll tables are designated by relative values.
To values stored in line scroll tables, values selected in the screen scroll value register
are added, becoming display coordinates. The table data read interval can be se-
lected from four types, one line, two line, four line, and eight line. Values of the
vertical coordinate increment register are used for vertical coordinate calculations
when two-line intervals or greater are selected.
The horizontal coordinate increment should not set a value that the exceeds the
setting of the reduction enable register. The line scroll function is shown in Figure
5.3.
Horizontal
Line Scroll Table (VRAM) Coordinate
Horizontal Screen Scroll value Increment Scroll Screen
for 1st line
1st Line
Vertical Screen Scroll value for
1st line 2nd Line
Horiz. Coordinate 3rd Line
increment for 1st line
4th Line
Horizontal Screen Scroll value 5th Line
for 2nd line
Vertical Screen Scroll value
for 2nd line
Horiz. Coordinate
increment for 2nd line
Figure 5.3 Line scroll function
Line scroll tables store from small addresses in order of the horizontal screen scroll
value, vertical screen scroll value, and horizontal coordinate increments. Stored line
scroll data is only composed of data required by the line scroll register setting.
ST-58-R2 131
Each horizontal screen scroll value, vertical screen scroll value, and horizontal coor-
dinate increment configuration is identical to the data configuration set in each
register. Figure 5.4 shows the bit configuration of line scroll table data. Table 5.5
shows the configuration of line scroll tables.
Hor izon tal , Vert ica l Scr ee n Scro ll Va lue
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+OH Intege r Part : 11 b its
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+2H Fr act iona l Part : 8 bit s
Hor izon tal Coo rdi na te Incr em en t
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0H Integ er Part : 3 bi ts
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+2H Fr act iona l Part : 8 bi ts
No te: Shad ed ar ea s ar e ig no re d
Figure 5.4 Bit configuration of line scroll table data
132
When selecting horizontal and vertical screen scroll values and
horizontal coordinate increment for every 1 line.
Bit 15 Line Scroll Table (VRAM) 0
Line Scroll Table +00H Line 1 Horiz. Screen Scroll Value (Integer Part)
Address
+02H Line 1 Horiz. Screen Scroll Value (Fractional Part)
+04H Line 1 Vertical Screen Scroll Value (Integer Part)
+06H Line 1 Vertical Screen Scroll Value (Fractional Part)
+08H Line 1 Horiz. Coordinate Increment (Integer Part)
+0AH Line 1 Horiz. Coordinate Increment (Fractional Part)
+0CH Line 2 Horiz. Screen Scroll Value (Integer Part)
+0EH Line 2 Horiz. Screen Scroll Value (Fractional Part)
+10H Line 2 Vertical Screen Scroll Value (Integer Part)
+12H Line 2 Vertical Screen Scroll Value (Fractional Part)
+14H Line 2 Horiz. Coordinate Increment (Integer Part)
+16H Line 2 Horiz. Coordinate Increment (Fractional Part)
When selecting vertical screen scroll value and horizontal coordinate
increment for every 2 lines (no horizontal line scroll).
Bit 15 Line Scroll Table (VRAM) 0
Line Scroll Table +00H Line 1 Vertical Screen Scroll Value (Integer Part)
Address
+02H Line 1 Vertical Screen Scroll Value (Fractional Part)
+04H Line 1, 2 Horiz. Coordinate Increment (Integer Part)
+06H Line 1, 2 Horiz. Coordinate Increment (Fractional Part)
+08H Line 3 Vertical Screen Scroll Value (Integer Part)
+0AH Line 3 Vertical Screen Scroll Value (Fractional Part)
+0CH Line 3, 4 Horiz. Coordinate Increment (Integer Part)
+0EH Line 3, 4 Horiz. Coordinate Increment (Fractional Part)
Note: Display coordinates in the vertical direction for lines not
specified are obtained by adding coordinate increments in the
vertical direction to the vertical screen scroll values for the lines
specified.
When selecting horizontal screen scroll value and horizontal
coordinate increment for every 4 lines (no horizontal line scroll).
Bit 15 Line Scroll Table (VRAM) 0
Line Scroll Table +00H Line 1~4 Horiz. Screen Scroll Value (Integer Part)
Address
+02H Line 1~4 Horiz. Screen Scroll Value (Fractional Part)
+04H Line 1~4 Horiz. Coordinate Increment (Integer Part)
+06H Line 1~4 Horiz. Coordinate Increment (Fractional Part)
+08H Line 5~8 Horiz. Screen Scroll Value (Integer Part)
+0AH Line 5~8 Horiz. Screen Scroll Value (Fractional Part)
+0CH Line 5~8 Lines Horiz. Coordinate Increment (Integer Part)
+0EH Line 5~8 Lines Horiz. Coordinate Increment (Fractional Part)
Figure 5.5 Line scroll table
ST-58-R2 133
Vertical Cell Scroll Function
The vertical cell scroll function selects the vertical screen scroll value in horizontal
cell units in each vertically separated area, and is selected by the vertical cell scroll
table stored in VRAM. The data value of the vertical cell scroll table is designated by
relative values. The value selected by the screen scroll value register is added to the
screen scroll value stored in the vertical cell scroll table, becoming the display coor-
dinate. Selection can be done in horizontal 8 dot units when displaying in bit map
format.
NBG0 and NBG1 have the only vertical cell scroll functions inside the Normal scroll
screen. This vertical cell scroll function and mosaic function can not be used simul-
taneously; the mosaic function has priority. Figure 5.6 shows the vertical cell scroll
function.
Ver tical Cell Scro ll Tabl e (VRAM)
1st Cel l Ver tica l
Scr een Scr ol l Val ue
2nd Cel l Ver tical
Scre en Scr ol l Val ue
3r d Cel l Ver tical
Scr ee n Scr ol l Val ue
TV Scr een
Vert ica l Scr ee n Scro l va lue -e na bl ed ar ea for the 1st cel l
Figure 5.6 Vertical cell scroll function
The bit configuration of the vertical screen scroll value is the same when set in all
registers. Data of the vertical cell scroll table is treated as a table in the order from
data in the left side cell of the TV screen.
When both NBG0 and NBG1 use the vertical cell scroll function, the various vertical
cell scroll table data should be alternately stored in NBG0 and NBG1, one cell at a
time.
134
Figure 5.7 shows the bit configuration of the vertical cell scroll table data. Figure 5.8
shows the vertical cell scroll table configuration.
Vertical Screen Scroll Value
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0H 11 bit integer part
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+2H 8 bit fractional part
Note: Shaded area is ignored
Figure 5.7 Data configuration on the vertical cell scroll table
ST-58-R2 135
NBG0 Vertical Cell Scroll
Bit 15 Vertical Cell Scroll Table (VRAM) 0
Vertical Cell Scroll +00H NBG0 1st cell vertical screen scroll value (integer part)
Table Address
+02H NBG0 1st cell vertical screen scroll value (fractional part)
+04H NBG0 2nd cell vertical screen scroll value (integer part)
+06H NBG0 2nd cell vertical screen scroll value (fractional part)
+08H NBG0 3rd cell vertical screen scroll value (integer part)
+0AH NBG0 3rd cell vertical screen scroll value (fractional part)
+0CH NBG0 4th cell vertical screen scroll value (integer part)
+0EH NBG0 4th cell vertical screen scroll value (fractional part)
+10H NBG0 5th cell vertical screen scroll value (integer part)
+12H NBG0 5th cell vertical screen scroll value (fractional part)
NBG1 Vertical Cell Scroll
Bit 15 Vertical Cell Scroll Table (VRAM) 0
Vertical Cell Scroll +00H NBG1 1st cell vertical screen scroll value (integer part)
Table Address
+02H NBG1 1st cell vertical screen scroll value (fractional part)
+04H NBG1 2nd cell vertical screen scroll value (integer part)
+06H NBG1 2nd cell vertical screen scroll value (fractional part)
+08H NBG1 3rd cell vertical screen scroll value (integer part)
+0AH NBG1 3rd cell vertical screen scroll value (fractional part)
+0CH NBG1 4th cell vertical screen scroll value (integer part)
+0EH NBG1 4th cell vertical screen scroll value (fractional part)
+10H NBG1 5th cell vertical screen scroll value (integer part)
+12H NBG1 5th cell vertical screen scroll value (fractional part)
NBG0 and NBG1 Vertical Cell Scroll
Bit 15 Vertical Cell Scroll Table (VRAM) 0
Vertical Cell Scroll +00H NBG0 1st cell vertical screen scroll value (integer part)
Table Address
+02H NBG0 1st cell vertical screen scroll value (fractional part)
+04H NBG1 1st cell vertical screen scroll value (integer part)
+06H NBG1 1st cell vertical screen scroll value (fractional part)
+08H NBG0 2nd cell vertical screen scroll value (integer part)
+0AH NBG0 2nd cell vertical screen scroll value (fractional part)
+0CH NBG1 2nd cell vertical screen scroll value (integer part)
+0EH NBG1 2nd cell vertical screen scroll value (fractional part)
+10H NBG0 3rd cell vertical screen scroll value (integer part)
+12H NBG0 3rd cell vertical screen scroll value (fractional part)
Figure 5.8 Vertical cell scroll table
136
Line and Vertical Cell Scroll Control Register
The line and vertical cell scroll control register is a write-only 16-bit register that
controls the line scroll function and vertical cell scroll function, and is at address
18009AH. Because the value of the register is cleared to 0 after the power is turned
on or reset, the value must be set.
15 14 13 12 11 10 9 8
SCRCTL ~ ~ N1LSS1 N1LSS0 N1LZMX N1LSCY N1LSCX N1VCSC
18009AH 7 6 5 4 3 2 1 0
~ ~ N0LSS1 N0LSS0 N0LZMX N0LSCY N0LSCX N0VCSC
Line Scroll Interval Bit: Line scroll select bit (N0LSS1, N0LSS0, N1LSS1, N1LSS0)
Designates the interval that reads line scroll table data from the table. The interval
changes depending on the interlace of the TV screen.
N0LSS1, N0LSS0 18009AH Bit 5, 4 For NBG0
N1LSS1, N1LSS0 18009AH Bit 13,12 For NBG1
NxLSS1 NxLSS0 Interlace Setting
Non-Interlace Single-Density Interlace Double-Density Interlace
0 0 Each line Every 2 lines Each line
0 1 Every 2 lines Every 4 lines Every 2 lines
1 0 Every 4 lines Every 8 lines Every 4 lines
1 1 Every 8 lines Every 16 lines Every 8 lines
Note: 0 or 1 is entered in bit name for x.
When reading line scroll table data at intervals of two lines or greater, line horizontal
scroll screen value not read and horizontal coordinate increments use line scroll data
that has been previously read. The vertical scroll screen value is calculated from
vertical coordinate increment register value and line scroll data that was previously
read.
ST-58-R2 137
Line zoom enable bit: Line zoom X enable bit (N1LZMX, N0LZMX)
Designates whether expansion-reduction is done horizontally in line units.
N0LZMX 18009AH Bit 3 For NBG0
N1LSCX 18009AH Bit 11 For NBG1
NxLZMX Process
0 Does not scale horizontally per line units
1 Scales horizontally per line units
Note: 0 or 1 is entered in bit name for x.
When using this function, the horizontal coordinate increment must be stored in the
line scroll table of VRAM. Make sure that the horizontal coordinate increment does
not exceed the reduction setting.
Line scroll enable bit (for the vertical screen scroll value): Line scroll Y enable bit (N1LSCY,
N0LSCY)
Designates whether scroll is performed by vertical line units.
N0LSCY 18009AH Bit 2 For NBG0
N1LSCY 18009AH Bit 10 For NBG1
NxLSCY Process
0 Does not scroll vertically per line units
1 Scrolls vertically per line units
Note: 0 or 1 is entered in bit name for x.
When using this function, the vertical screen scroll value must be stored in the line
scroll table of VRAM.
138
Line scroll enable bit (for the horizontal screen scroll value): Line scroll X enable bit (N1LSCX,
N0LSCX)
Designates whether scroll is performed by horizontal line units.
N0LSCX 18009AH Bit 1 For NBG0
N1LSCX 18009AH Bit 9 For NBG1
NxLSCX Process
0 Does not scroll horizontally per line units
1 Scrolls horizontally per line units
Note: 0 or 1 is entered in bit name for x.
When using this function, be sure to store the horizontal scroll screen value in the
VRAM line scroll table.
Vertical cell scroll enable bit (N1VCSC, N0VCSC)
Designates whether to perform vertical cell scroll.
N0VCSC 18009AH Bit 0 For NBG0
N1VCSC 18009AH Bit 8 For NBG1
NxVCSC Process
0 Does not cell-scroll vertically
1 Cell-scrolls vertically
Note: 0 or 1 is entered in bit name for x.
When using the vertical cell scroll function, make sure the access command of the
vertical cell scroll table data read is designated in the VRAM cycle pattern register.
In addition, vertical cell scroll data must be stored in VRAM. The vertical cell scroll
function cannot be used simultaneously with the mosaic function; the mosaic func-
tion has priority.
ST-58-R2 139
Line Scroll Table Address Register
The line scroll table address register is a write-only 32-bit register that selects the
lead address of the line scroll table, and is at addresses 1800A0H to 1800A6H. Be-
cause the value of the register is cleared to 0 after power on or reset, the value must
be set.
15 14 13 12 11 10 9 8
LSTA0U ~ ~ ~ ~ ~ ~ ~ ~
1800A0H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N0LSTA18 N0LSTA17 N0LSTA16
15 14 13 12 11 10 9 8
LSTA0L N0LSTA15 N0LSTA14 N0LSTA13 N0LSTA12 N0LSTA11 N0LSTA10 N0LSTA9 N0LSTA8
1800A2H 7 6 5 4 3 2 1 0
N0LSTA7 N0LSTA6 N0LSTA5 N0LSTA4 N0LSTA3 N0LSTA2 N0LSTA1 ~
15 14 13 12 11 10 9 8
LSTA1U ~ ~ ~ ~ ~ ~ ~ ~
1800A4H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N1LSTA18 N1LSTA17 N1LSTA16
15 14 13 12 11 10 9 8
LSTA1L N1LSTA15 N1LSTA14 N1LSTA13 N1LSTA12 N1LSTA11 N1LSTA10 N1LSTA9 N1LSTA8
1800A6H 7 6 5 4 3 2 1 0
N1LSTA7 N1LSTA6 N1LSTA5 N1LSTA4 N1LSTA3 N1LSTA2 N1LSTA1 ~
Line scroll table address bit (N0LSTA18 to N0LSTA16, N0LSTA15 to N0LSTA1, N1LSTA18 to
N1LSTA16, N1LSTA15 to N1LSTA1)
Designates the lead address of the line scroll table on the VRAM.
N0LSTA18~N0LSTA16 1800A0H Bit 2~0 For NBG0 (upper bit)
N0LSTA15~N0LSTA1 1800A2H Bit 15~1 For NBG0 (lower bit)
N1LSTA18~N1LSTA16 1800A4H Bit 2~0 For NBG1 (upper bit)
N1LSTA15~N1LSTA1 1800A6H Bit 15~1 For NBG1 (lower bit)
The actual lead VRAM address is calculated by the expression below. When the
VRAM has a 4 Mbit capacity, the address of the most significant bit is ignored.
(line scroll table lead address)
= (line scroll table address register value 18 bit) X 4H
140
Vertical Cell Scroll Table Address Register
The vertical cell scroll table address register is a write-only 32-bit register that selects
the lead address of the vertical cell scroll table, and is at addresses 18009CH to
18009EH. Because the value of the register is cleared to 0 after power on or reset, the
value must be set.
15 14 13 12 11 10 9 8
VCSTAU ~ ~ ~ ~ ~ ~ ~ ~
18009CH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ VCSTA18 VCSTA17 VCSTA16
15 14 13 12 11 10 9 8
VCSTAL VCSTA15 VCSTA14 VCSTA13 VCSTA12 VCSTA11 VCSTA10 VCSTA9 VCSTA8
18009EH 7 6 5 4 3 2 1 0
VCSTA7 VCSTA6 VCSTA5 VCSTA4 VCSTA3 VCSTA2 VCSTA1 ~
Vertical cell scroll table address bit (VCSTA18 to VCSTA1),
Designates the lead address of the vertical cell scroll table on the VRAM.
VCSTA18~VCSTA16 18009CH Bit 2~0
VCSTA15~VCSTA1 18009EH Bit 15~1
The actual lead VRAM address is calculated by the expression below. When the
VRAM has a 4 Mbit capacity, the address of the most significant bit is ignored.
(vertical cell scroll table lead address)
= (vertical cell scroll table address register value 18 bit) X 4H
ST-58-R2 141
(This page is blank in the original Japanese document)
142
Chapter 6 Rotation Scroll Screen
Introduction ............................................................................. 144
6.1 Rotation Scroll Coordinate Operation ............................... 144
6.2 Rotation Scroll Screen Display Control ............................ 148
RAM Control Register ................................................... 148
6.3 Rotation Parameter Control .............................................. 151
Data Configuration of the Rotation Parameter Table .... 153
Rotation Parameter Table ............................................. 155
Rotation Parameter Read Control Register .................. 157
Rotation Parameter Table Address Register ................. 158
Rotation Read Out of the Frame Buffer ........................ 159
Rotation Parameter Change ......................................... 160
Rotation Parameter Mode Register .............................. 162
6.4 Coefficient Table Control ................................................... 163
Line Color Screen Data ................................................. 164
Bit Configuration of Coefficient Table Data ................... 165
Coefficient Table Lead Address..................................... 165
Most Significant Bit of Coefficient Data ......................... 166
RAM Control Register ................................................... 167
Coefficient Table Control Register................................. 168
Coefficient Table Address Offset Register ..................... 170
ST-58-R2 143
Introduction
The rotation scroll screen has two sets of parameter tables called “Rotation param-
eter A” and “Rotation parameter B” that can be simultaneously displayed by various
parameter tables. Besides being stored as rotation parameters in VRAM, the two
sets of parameters can hold various correlated coefficient tables in VRAM.
There are two sets of rotation parameters, rotation parameter A and rotation param-
eter B, each stored in a table. RBG0 can simultaneously display one screen selected
by rotation parameter A or rotation parameter B, or two screens selected by rotation
parameter A and rotation parameter B. RBG1 can display only the screen desig-
nated by rotation parameter B. Table 6.1 shows the relationship between the rotation
scroll screen and rotation parameters.
Table 6.1 Rotation scroll screen
Screen Single Display In Relation to Rotation Parameters
RBG0 Allowed Screen specified by either rotation parameter
A or B, or 2 screens specified by rotation
parameters A and B are displayed concurrently
RBG1 Not allowed (RBG0 must also be Screen specified by rotation parameter B is
displayed) displayed
Rotation parameter A and rotation parameter B can each have a coefficient table;
there can be multiple displays by reading the coefficient data in each line or each
dot. Using rotation parameter A, expansion-reduction rotation of sprite frame
buffers can also be done.
6.1 Rotation Scroll Coordinate Calculation
The display screen of the rotation scroll screen, which causes rotational conversion
(including parallel moving) of the viewpoint reference center point and TV screen, is
a collection of points intersecting the line of vision that passes through the TV screen
from the viewpoint after conversion with the fixed scroll map. Figure 6.1 shows
display method of the rotation scroll screen.
144
Z
View po in t after conve rsio n (Xp, Yp, Zp)
Vie wpoi nt bef ore con ver si on (Px, Py, Pz)
Cent ra l po in t (Cx, Cy, Cz)
Point on the scr een after
con ver si on (Xs, Ys, Zs)
X Y
Poi nt on the scr ee n bef or e Poin t disp laye d on the scro ll ma p
co nve rsi on (Sx, Sy, Sz) (X , Y, Z)
Not e: X axi s run s ve rt ica l y thr ou gh the pag e to the back.
Figure 6.1 Rotation scroll screen display method
From the rotation conversion formula, view coordinates and TV screen coordinates
after conversion are expressed by the following equations.
Xp A B C Px - Cx Cz Mx
Yp = D E F Py - Cy + Cy + My
Zp G H I Pz - Cz Cz Mz
Xs A B C Sx - Cx Cz Mx
Ys = D E F Sy - Cy Cy + My
+
Zs G H I Sz - Cz Cz Mz
A, B, C, D, E, F, G, H, I: Rotational matrix parameter
Px, Py, Pz: View coordinate before rotational conversion
Sx, Sy, Sz: TV screen coordinates before rotational conversion
Cx, Cy, Cz: Rotational center coordinate
Mx, My, Mz: Amount of parallel movement
Xp, Yp, Zp: View coordinate after rotational conversion
Xs, Ys, Zs: TV screen coordinates after rotational conversion
ST-58-R2 145
The line of vision that passes through the TV screen after rotational conversion, from
the viewpoint after rotational conversion, is expressed by the equation below.
X - Xp Y - Yp Z - Zp
Xs - Xp = Ys - Yp = Zs - Zp
Because the scroll map is fixed by the XY plane (Z = 0), display coordinates (X, Y) on
the scroll map are found by the equation below.
X = k (Xs – Xp) + Xp
Y = k (Ys – Yp) + Yp
However,
-Zp
k =
Zs - Zp
This “k”, called the perspective conversion coefficient, rotates only in the vertical
direction of the TV screen along the X axis rotation and is fixed in the horizontal
direction. Furthermore, the Y axis rotation only changes in the horizontal direction
of the TV screen, and is fixed in the vertical direction. Z axis rotation is always fixed.
Because the screen prior to rotational conversion is normally identical to the TV
screen, Sx is the horizontal coordinate value (H counter value) in the TV screen, Sy is
the vertical coordinate value (V counter value) in the TV screen, and Sz is 0. The
screen coordinate value when the screen rotates in the vertical axis (SZ axis) is found
by the equations below.
Sx a b 0 Hcnt - Csx Csx Msx
Sy = c d 0 Vcnt - Csy + Csy + Msy
Sz 0 0 1 0 0 Msz
a, b, c, d: TV screen rotation matrix parameter
Hcnt, Vcnt: HV counter value
Csx, Csy: TV screen rotation center coordinate
Msx, Msy, Msz: TV screen parallel movement amount
The previously mentioned expression is as shown below.
Sx = Xst + DX • Hcnt + DXst • Vcnt
Sy = Yst + DY • Hcnt + DYst • Vcnt
Sz = Zst
However, Xst = –a • Csx – b • Csy + Csx + Msx
Yst = –c • Csx – d • Csy + Csy + Msy
146
Zst = Msz
∆X = a
∆Y = c
∆Xst = b
∆Yst = d
Xst, Yst, Zst: TV screen start coordinate
DX, DY: TV screen horizontal coordinate increment
DXst, DYst: TV screen vertical coordinate increment
Below are the calculation equations of the display coordinates (X, Y) when perform-
ing both TV screen 3 axis rotation and TV screen rotation from the equations above.
X = kx (Xsp + dX • Hcnt) + Xp
Y = ky (Ysp + dY • Hcnt) + Yp
However,
Xsp = A{(Xst + ∆Xst • Vcnt) – Px} + B{(Yst + ∆Yst • Vcnt) – Py} + C(Zst – Pz)
Ysp = D{(Xst + ∆Xst • Vcnt) – Px} + E{(Yst + ∆Yst • Vcnt) – Py} + F(Zst – Pz)
Xp = A(Px – Cx) + B(Py – Cy) + C(Pz – Cz) + Cx + Mx
Yp = D(Px – Cx) + E(Py – Cy) + F(Pz – Cz) + Cy + My
dX = A • ∆X + B • ∆Y
dY = D • ∆X + E • ∆Y
Xst, Yst, Zst: TV screen start coordinates
∆Xst, ∆ Yst: TV screen vertical coordinate increments
∆X, ∆Y: TV screen horizontal coordinate increments
A, B, C, D, E, F: Rotational matrix parameter
Px, Py, Pz: View coordinates
Cx, Cy, Cz: Center coordinates
Mx, My: Amount of parallel movement
kx, ky: Expansion reduction coefficient
Hcnt, Vcnt: HV counter value
VDP2 reads per line all parameters from the rotation parameter table stored on
VRAM, calculates Xsp, Ysp, Xp, Yp, dX, dY used for the above calculation equation,
and uses these results to find the display coordinates (X, Y) of each dot. Expansion
reduction coefficients kx and ky usually use values read from the rotational param-
eter table. By using the coefficient table, values in all lines and dots can be changed.
ST-58-R2 147
6.2 Rotation Scroll Screen Display Control
The rotation scroll screen has two surfaces, RBG0 and RBG1. When RBG1 is dis-
played, RBG0 must also be displayed (RBG0 appears when only one surface is
displayed.) The Normal scroll screens can no longer be displayed at that time.
The image data (pattern name table or bitmap pattern) being displayed in the rota-
tion scroll screen cannot be with image data of the Normal scroll screen; neither can
image data of RBG0 and RBG1 be used in common. Furthermore, image data of the
rotation scroll screen must be stored in separate VRAM. Among image data, the
RBG1 pattern name table is stored in VRAM-B1, and character pattern table is stored
in VRAM-B0.
When RBG0 needs coefficient only data with lines, the coefficient table can be stored
in any VRAM bank. Image data must be stored in different banks when required
with dots.
The register that controls the display of the rotation scroll screen has a screen display
enable register and RAM control register. The screen display enable register controls
the screen display and transparency code. The register content is the same as the
Normal scroll screen. See “4.1 Screen Display Control” for details.
RAM Control Register
The RAM control register selects the VRAM bank partition, the objective for using
the rotation scroll screen VRAM, and the color RAM mode. It is a read-write 16 bit
register and is at address 18000EH. Because the value of the register is cleared to 0
after power on or reset, you must set the value.
15 14 13 12 11 10 9 8
RAMCTL CRKTE ~ CRMD1 CRMD0 ~ ~ VRBMD VRAMD
18000EH 7 6 5 4 3 2 1 0
RDBSB11 RDBSB10 RDBSB01 RDBSB00 RDBSA11 RDBSA10 RDBSA01 RDBSA00
Color RAM Coefficient Table Enable bit (CRKTE)
See “6.4 Coefficient Table Control.”
148
Color RAM mode bit (CRMD1, CRMD0)
See “3.4 Color RAM mode.”
Set the Color RAM mode to mode 1 when the CRKTE bit is 1. At that time, color
data can no longer be stored because the second half of the color RAM (100800H ~
100FFFH) is used for the coefficient table data.
VRAM mode bit (VRAMD, VRBMD)
See “3.2 VRAM Bank Partition.”
Rotation data bank select bit: Data bank select bit (RDBSA01, RDBSA00, RDBSA11,
RDBSA10, RDBSB01, RDBSB00, RDBSB11, RDBSB10)
Designates the use objective of the VRAM of the rotation scroll screen. This bit is
only in effect when the rotation scroll screen is displayed.
RDBSA00, RDBSA01 18000EH Bit 1,0 For VRAM-A0 (or VRAM-A)
RDBSA10, RDBSA11 18000EH Bit 3,2 For VRAM-A1
RDBSB00, RDBSB01 18000EH Bit 5,4 For VRAM-B0 (or VRAM-B)
RDBSB10, RDBSB11 18000EH Bit 7,6 For VRAM-B1
RDBSx1 RDBSx0 VRAM Use
0 0 Not used as RBG0 RAM
0 1 RAM for RBG0 End table
1 0 RAM for RGB0 Pattern Name table
1 1 RAM for RBG0 Character Pattern table (or Bitmap Pattern)
Note: A0, A1, B0, or B1 is entered in bit name for x.
When there are no bank partitions in VRAM, the VRAM-A0 bit is used for VRAM-A,
and the VRAM-B0 bit is used for VRAM-B. When coefficient data is not treated as
being needed in all dots, there is no need to set the coefficient table RAM (01B).
When displaying by the bit map format, do not set the pattern name table RAM
(10B). VRAM cycle pattern register settings of the VRAM bank selected in RAM
used for the rotational scroll are ignored. Data will not be read out when there is no
image data read-out address in the selected bank. Therefore, the correct screen can
no longer be displayed.
ST-58-R2 149
When displaying RBG1, 00B must be set in bits used for VRAM-B0 and VRAM-B1.
When the coefficient data read address is not the address within the selected bank,
the coefficient data can not be read properly and therefore correct screen image can
not be displayed. In addition, when storing the coefficient table in the color RAM,
RBG0 coefficient table RAM (01B) must not be set.
150
6.3 Rotation Parameter Control
When displaying the rotation scroll screen, be sure to store the rotation parameter on
which control is performed as a table in VRAM. The rotation scroll screen reads the
rotation parameter tables stored in VRAM for each line. The screen is displayed
according to that value. The rotation parameter is shown below.
Table 6.2 Rotation Parameters
Rotation Parameter Definition
Xst Screen upper left corner (or left edge) X coordinate
Screen Start Coordinate Yst Screen upper left corner (or left edge) Y coordinate
Zst Screen upper left corner (or left edge) Z coordinate
Screen Vertical Coordinate ∆ Xst Screen coordinates X increment per each line
Increments ∆ Yst Screen coordinates Y increment per each line
Screen Horizontal Coordinate ∆ X Screen coordinates X increment per each dot
Increments ∆Y Screen coordinates Y increment per each dot
Rotation Matrix Parameter A These parameters are include in 3X3 rotation matrix.
B
C ABC
D DEF
E GHI
F
Px Viewpoint X coordinate
Viewpoint Coordinates Py Viewpoint Y coordinate
Pz Viewpoint Z coordinate
Cx Center X coordinate
Center Coordinates Cy Center Y coordinate
Cz Center Z coordinate
Amount of Horizontal Mx Shift in X direction for screen, viewpoint, and center
Shift My Shift in Y direction for screen, viewpoint, and center
Scaling Coefficients kx Scale coefficient of display screen in X direction
ky Scale coefficient of display screen in Y direction
Coefficient Table Start Address KAst Table start address when using coefficients table
Coefficient Table Vertical ∆KAst Address increment per each line when using
Address Increment coefficients table
Coefficient Table Horizontal ∆ KAx Address increment when using coefficients table per
Address Increment each dot
Note: * denotes when reading to each line.
ST-58-R2 151
Only Xst, Yst, and KAst among rotation parameters can be read by the first line of
the display screen. The value of Xst, Yst, and KAst (when ∆Xst, ∆Yst, ∆ X, ∆Y, ∆KAst,
and ∆KAx don’t change inside one screen) are expressed by the equation below.
(Screen X coordinate)
= Xst + ∆Xst x (V counter value) + ∆X x (H counter value)
(Screen Y coordinate)
= Yst + ∆Yst x (V counter value) + ∆Y x (H counter value)
(coefficient table address)
= KAst + ∆KAst x (V counter value) + ∆KAx x (H counter value)
Moreover, the first line can be read (in addition to Xst, Yst, and KAst) by setting the
rotation parameter read control register. Values on and after the second lines of Xst,
Yst, and KAst (when ∆Xst, ∆Yst, ∆ X, ∆Y, ∆KAst, and ∆KAx do not change within
screen one) are expressed by the equation below.
(Screen X coordinate)
= Xst
+ ∆Xst x {(V counter value) – (V counter value when Xst is read out)}
+ ∆X x (H counter value)
(Screen Y coordinate)
= Yst
+ ∆Yst x {(V counter value) – (V counter value when Yst is read out)}
+ ∆Y x (H counter value)
(coefficient table address)
= KAst
+ ∆KAst x {(V counter value) – (V counter value when KAst is read out)}
+ ∆KAx x (H counter value)
The rotation scroll screen has two sets of parameter tables, called “Rotation Param-
eter A” and “Rotation Parameter B.” The display screen of RBG1 is carried out by
rotation parameter B. RBG0 selects which of the two sets of parameter tables is
used, and can change within the display screen. Through this, RBG0 can simulta-
neously display two different rotation scroll screens on one screen.
152
In addition, the rotation parameter table moves by storing rotation parameter tables
using RBG0 and RBG1, and does not always have to store two sets of rotation pa-
rameter tables.
Data Configuration of the Rotation Parameter Table
Figure 6.2 shows various bit configurations of rotation parameters. Negative num-
bers indicate by two complements. The shaded part of the bit is ignored.
Scre en Star t Coo rd ina tes (Xst , Yst , Zst )
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0 H Sig n 12 bi t integ er par t
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+2 H 10 bi t fract ion al par t
Scr ee n Vert ica l Coor din at e Incre ment s (∆X st , ∆Yst )
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0 H Sign 2 bi t
int eg er
par t
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+2 H 10 bi t fract ion al par t
Scre en Hor izo nt al Coo rd ina te Incr em en ts (∆X, ∆Y )
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0 H Sign 2 bi t
integ er
pa rt
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+2 H 10 bi t fract ion al par t
Not e: Sha ded are as are ign or ed .
Figure 6.2 Rotation parameter data configuration
ST-58-R2 153
Rotation Matrix Parameter (A, B, C, D, E, F)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Sign 3 bit
+0H
integer part
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+2H 10 bit fractional part
Viewpoint Coordinates (Px, Py, Pz)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Sign 13 bit integer part
Center Coordinates (Cx, Cy, Cz)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Sign 13 bit integer part
Amount of horizontal shift (Mx, My)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0H Sign 13 bit integer part
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+2H 10 bit fractional part
Scaling Coefficients (kx, ky)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0H Sign 7 bit integer part
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+2H 16 bit fractional part
Coefficient Table Start Address (KAst)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0H 16 bit integer part
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+2H 10 bit fractional part
Note: Shaded areas are ignored.
Figure 6.2 Rotation parameter data configuration (continued)
154
Coef fici en t tabl e ver tical add re ss incr em en t (∆KAst )
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0 H Sig n 9 bit int eg er pa rt
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+2 H 10 bi t fra ct ion al par t
Coe ffici en t tabl e hor izon tal add re ss incr em ent (∆KAx)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0 H Sign 9 bi t int eg er pa rt
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+2 H 10 bi t fra ct ion al par t
Not e: Sha ded are as are ign or ed
Figure 6.2 Rotation parameter data configuration (continued)
Rotation Parameter Table
One set of rotation parameter tables at a size of 60H is stored in VRAM. Figure 6.3
shows the configuration of one set of tables.
ST-58-R2 155
+00H Screen Start Coordinate Xst (Integer Part)
+02H (Fractional Part)
+04H Screen Start Coordinate Yst (Integer Part)
+06H (Fractional Part)
+08H Screen Start Coordinate Zst (Integer Part)
+0AH (Fractional Part)
+0CH Screen Vertical Coordinate Increment ∆Xst (Integer Part)
+0EH (Fractional Part)
+10H Screen Vertical Coordinate Increment ∆Yst (Integer Part)
+12H (Fractional Part)
+14H Screen Horiz. Coordinate Increment ∆X (Integer Part)
+16H (Fractional Part)
+18H Screen Horiz. Coordinate Increment ∆Y (Integer Part)
+1AH (Fractional Part)
+1CH Rotation Matrix Parameter A (Integer Part)
+1EH (Fractional Part)
+20H Rotation Matrix Parameter B (Integer Part)
+22H (Fractional Part)
+24H Rotation Matrix Parameter C (Integer Part)
+26H (Fractional Part)
+28H Rotation Matrix Parameter D (Integer Part)
+2AH (Fractional Part)
+2CH Rotation Matrix Parameter E (Integer Part)
+2EH (Fractional Part)
+30H Rotation Matrix Parameter F (Integer Part)
+32H (Fractional Part)
+34H Viewpoint Coordinate Px (Integer Part)
+36H Viewpoint Coordinate Py (Integer Part)
+38H Viewpoint Coordinate Pz (Integer Part)
+3AH This data is ignored
+3CH Center Point Coordinate Cx (Integer Part)
+3EH Center Point Coordinate Cy (Integer Part)
+40H Center Point Coordinate Cz (Integer Part)
+42H This data is ignored
+44H Horizontal Shift Mx (Integer Part)
+46H (Fractional Part)
+48H Horizontal Shift My (Integer Part)
+4AH (Fractional Part)
+4CH Scaling Coefficient kx (Integer Part)
+4EH (Fractional Part)
+50H Scaling Coefficient ky (Integer Part)
+52H (Fractional Part)
+54H Coefficient Table Start Address KAst (Integer Part)
+56H (Fractional Part)
+58H Coefficient Table Vertical Address Increment ∆KAst (Integer Part)
+5AH (Fractional Part)
+5CH Coefficient Table Horiz. Address Increment ∆KAx (Integer Part)
+5EH (Fractional Part)
Figure 6.3 Rotation parameter table
156
When storing two sets of tables of rotation parameter A and rotation parameter B,
store the rotation parameter A from the lead address of the rotation parameter table,
then enter the 20H part of invalid data and store tables of rotation parameter B. The
rotation parameter table does not always have to store two sets, but can store only
the tables needed. Figure 6.4 shows the method of storing two sets of tables from
rotation parameters A and B.
Rot ation Para met er A To p Addr ess
+00H
Rotat ion Par am et er A Ta bl e
+5E H
+60 H The da ta in this ar ea is not used as
rot ation pa ra met er
+7E H
+80 H
Rotat ion Par am et er B Ta bl e
+DE H
+EOH
Figure 6.4 How to store to the rotation parameter table VRAM
Rotation Parameter Read Control Register
The rotation parameter read control register is a write-only 16 bit register that indi-
cates whether to read Xst, Yst, and KAst in each line, and is at address 1800B2H.
Because the value is cleared to 0, it must be set after power on or reset.
15 14 13 12 11 10 9 8
RPRCTL ~ ~ ~ ~ ~ RBKASTRE RBYSTRE RBXSTRE
1800B2H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ RAKASTRE RAYSTRE RAXSTRE
ST-58-R2 157
Parameter read enable bit (RAXSTRE, RBXSTRE, RAYSTRE, RBYSTRE, RAKASTRE,
RBKASTRE)
Designates the coefficient table start address KAst and TV screen start coordinates
Xst and Yst, and whether to read from the rotation parameter table in that line.
RAXSTRE 1800B2H Bit 0 For Xst of Rotation Parameter A
RBXSTRE 1800B2H Bit 8 For Xst of Rotation Parameter B
RAYSTRE 1800B2H Bit 1 For Yst of Rotation Parameter A
RBYSTRE 1800B2H Bit 9 For Yst of Rotation Parameter B
RAKASTRE 1800B2H Bit 2 For KAst of Rotation Parameter A
RBKASTRE 1800B2H Bit 10 For KAst of Rotation Parameter B
RxSTRE Process
0 Selected parameters are not read for that line
1 Selected parameters are read for that line
Note: AX, BX, AY, BY, AKA, or BKA is entered in bit name for x.
If this bit is 1, selected parameters are read when the next rotation parameters are
read. At the same time, this bit is cleared to 0. Therefore, to read parameters for
each 1 line, this bit must be set to 1 for each line.
Rotation Parameter Table Address Register
The rotation parameter table address register is a write-only 16-bit register that
selects the lead address of the rotation parameter table, and is at address 1800BCH to
1800BEH. Because the value is cleared to 0, it must be set after power on or reset.
15 14 13 12 11 10 9 8
RPTAU ~ ~ ~ ~ ~ ~ ~ ~
1800BCH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ RPTA18 RPTA17 RPTA16
15 14 13 12 11 10 9 8
RPTAL RPTA15 RPTA14 RPTA13 RPTA12 RPTA11 RPTA10 RPTA9 RPTA8
1800BEH 7 6 5 4 3 2 1 0
RPTA7 RPTA6 RPTA5 RPTA4 RPTA3 RPTA2 RPTA1 ~
158
Rotation parameters table address bit (RPT
A18 to RPTA1)
Designates the lead address of rotation parameter tables.
RPTA18~RPTA16 1800BCH Bit 2~0
RPTA15~RPTA1 1800BEH Bit 15~1
RPTA6 bit is ignored even if data is written. The bit is set at 0 for rotation parameter
A, and fixed at 1 for rotation parameter B.
The actual lead address of a rotation parameter table is calculated as shown in the
equation below. When the VRAM size is 4 Mbit, the most significant bit of the
address is ignored.
(Lead address of rotation parameter A)
= (rotation parameter table address register value highest 12 bit) X 100H
+ (rotation parameter table address register value lowest 5 bit) X 4H
(Lead address of rotation parameter B)
= (rotation parameter table address register value highest 12 bit) X 100H
+ (rotation parameter table address register value lowest 5 bit) X 4H + 80H
For example, when 00170H or 00130H is selected, the lead address of rotation pa-
rameter A is 00260H, and the lead address of rotation parameter B is 002E0H.
Rotation Read Out of the Frame Buffer
Rotation reading of the frame buffer is executed using the TV screen start coordi-
nates (Xst, Yst) of rotation parameter A, TV screen vertical coordinate increments
(∆Xst, ∆ Yst), and TV screen horizontal coordinate increments (∆X, ∆Y). If the image
selected by rotation parameter A in the rotation scroll screen is to be displayed, the
entire sprite and rotation scroll screen can be made to rotate identically. If the image
selected by rotation parameter B in the rotation scroll screen is to be displayed, the
entire sprite and rotation scroll screen can be made to rotate separately.
The frame buffer display coordinate value calculates from the TV screen starting
coordinate, the display coordinate of the left end of the line calculated in each line
from the TV screens vertical coordinate increment and horizontal coordinate. The
bit will be discarded and calculated from the coordinate range of the frame buffer so
that the display coordinate value of the line’s left end is calculated in 20 bits
(code+integer10-bit +decimal part 9-bit), and the horizontal coordinate increment in
a total of 12 bits (code+integer part 2-bit+decimal part 9-bit).
Note: In order to read frame buffer rotation using rotation parameter A, VDP1 TV mode must be set
to rotation 16 or rotation 8. For details, please refer to VDP1 user manual.
ST-58-R2 159
Rotation parameters
Rotation Parameter Changetable address bit (RPTA18 to RPTA1)
Designates the lead address of rotation parameter tables.
RBG0 indicates which of two sets of rotation parameter tables is used, and can
change in part the rotation parameter on one screen display. The method of using
the rotation parameter can be selected from the four rotation parameter modes
below.
RPTA6 bit is ignored even if data is written. The bit is set at 0 for rotation parameter
A, and
Mode 0:
fixed at 1 for rotation parameter B.
Uses rotation parameter A
Mode 1: Uses rotation parameter B
The actual lead address of a rotation parameter table is calculated as shown in the
Mode 2: Changes the image by coefficient data read from the coefficient table of rotation
equation below.
parameter A When the VRAM size is 4 Mbit, the most significant bit of the
address
Mode 3: is ignored.
Changes by the rotation parameter window.
(Lead address ofthe
rotation parameter A) through each rotation parameter table set.
Modes 0 and 1 display image obtained
= (rotation parameter table address register value highest 12 bit) X 100H
Modes 2 and 3 display the parameter
+ (rotation images within one screen
table address registerobtained through
value lowest 5 bit) Xrotation
4H
parameters A and B.
(Lead address of rotation parameter B)
Set Mode 2 to use=the coefficient
(rotation table
parameter ofaddress
table rotation parameter
register A by setting
value highest 12 bit) X the RAKTE
100H
bit of the coefficient table control
+ (rotation parameterregister to 1. The
table address value
register oflowest
value the most
5 bit)significant
X 4H + 80H bit
of coefficient data read from the coefficient table displays the image obtained by
rotation parameter A when
For example, when it is 0, but or
00170H displays
00130H the
is image obtained
selected, byaddress
the lead rotationofpa-rotation pa-
rameter B rameter
as an RBG0
A isimage
00260H, whenanditthe
is 1.
leadWhen set to
address ofread coefficient
rotation parameterdataBused for
is 002E0H.
rotation parameter A in each dot, two images can also be changed in each dot, but
coefficientRotation
data usedRead
for rotation
Out of parameter
the FrameBBuffer
cannot be read in each dot.
Rotation
Mode 3 changes tworeading
imagesofaccording
the frametobuffer is used
the bit executed using
in the the TV
rotation screen start coordi-
parameter
nates (Xst, Yst) of rotation parameter A, TV screen vertical
window of the rotation window control register. When the window is used as the coordinate increments
(∆Xst,
transparent ∆ Yst),
process and TVthe
window, screen
part horizontal coordinate
of the screen that is cutincrements
off and made(∆X,transpar-
∆Y). If the image
ent displays the image obtained by rotation parameter B; the remaining part isdisplayed, the
selected by rotation parameter A in the rotation scroll screen is to be
displayed entire sprite image
as an RBG0 and rotation scroll
obtained screen can
by rotation be madeA.
parameter to rotate identically. If the image
selected by rotation parameter B in the rotation scroll screen is to be displayed, the
entire sprite and rotation scroll screen can be made to rotate separately.
The frame buffer display coordinate value calculates from the TV screen starting
coordinate, the display coordinate of the left end of the line calculated in each line
from the TV screens vertical coordinate increment and horizontal coordinate. The
bit will be discarded and calculated from the coordinate range of the frame buffer so
that the display coordinate value of the line’s left end is calculated in 20 bits
(code+integer10-bit +decimal part 9-bit), and the horizontal coordinate increment in
a total of 12 bits (code+integer part 2-bit+decimal part 9-bit).
160 ST-58-R2 159
An example of image display from above modes 0 to 3 is shown in Figure 6.5.
When Rot at ion Param et er Mo de 0
Image ob tai ne d thr ou gh
rot at ion par am et erA
When Rot at ion Param et er Mo de 1
Image ob tai ne d thr ou gh
rot at ion par am et er B
Whe n Rotat ion Par am et er Mode 2
Imag e obt ai ne d thr ou gh The MSB=1 pa rt of the coe ffici en t
ro tation pa ra me ter B tabl e for rot ation pa ram et er A.
Image ob tai ne d
throug h ro tat io n The MSB=0 par t of the co ef fici ent
par am et er A tab le for ro tat io n par am eter A.
Rot ation Para met er Mo de 3: Switche d thr ou gh Rot ation Para me ter Wind ow an d di spl aye d.
The pa rt cut from the scr een an d mad e tra nsp ar en t in
Ima ge obt ain ed thro ug h tran spa re nt pr oce ssin g wi ndo w.
ro tat io n par ame ter B
Ima ge ob tai ned thr ough The pa rt di sp la yed witho ut cut tin g the scre en in
rot at ion par am et er A tran spa re nt pr oce ssin g wi ndo w.
Figure 6.5 Rotation parameter change
ST-58-R2 161
Rotation Parameter Mode Register
The rotation parameter mode register is a write-only 16 bit register that controls
rotation parameter tables used in RBG0, and is at address 1800B0H. Because the
value is cleared to 0, it must be set after power on or reset.
15 14 13 12 11 10 9 8
RPMD ~ ~ ~ ~ ~ ~ ~ ~
1800B0H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ RPMD1 RPMD0
Rotation parameters mode bit (RPMD1, RPMD0), bits 1 and 0
When displaying RGB0, designates which rotation parameter of A or B will be used.
RPMD1 RPMD0 Mode Rotation Parameter
0 0 0 Rotation Parameter A
0 1 1 Rotation Parameter B
1 0 2 A screen and B screen are switched via
coefficient data read from rotation parameter A
coefficient table.
1 1 3 A screen and B screen are switched via
rotation parameter window
The value of this bit is always in effect, therefore, be careful in timing reloading.
When mode 2 is selected, coefficient data cannot be read to each dot from the coeffi-
cient table for rotation parameter B while coefficient data for rotation parameter A is
being read to each dot. Therefore, the designation is ignored even if a register is
designated so that coefficient data is read to each dot from the coefficient table used
for rotation parameter B.
In mode 3, coefficient data can be read to each dot in both coefficient tables for
rotation parameter A and B.
Mode 0 must be set when displaying RBG1.
162
6.4 Coefficient Table Control
The rotation scroll screen stores parameters used in calculating display coordinates
in VRAM or color RAM in a table separate from the rotation parameter table, and
can express various images by reading parameters per line or per dot. This table is
referred to as “coefficient table.”
The timing required for the coefficient table data, depending on how display coordi-
nates are calculated, falls under the following cases:
1. Required per line
2. Required per dot
When coefficient table data is required per line, the coefficient table must be stored
in VRAM. The VRAM address to read the stored coefficient table data is specified
via KAst, ∆KAst, and ∆KAx in rotation parameter table and coefficient table address
offset register.
When coefficient table data is required per dot, the coefficient table must be stored in
either VRAM or color VRAM. When stored in VRAM, at least 1 bank in RAM control
register “rotation data bank selection” must be selected to become coefficient table.
The VRAM address to read the stored coefficient table data is specified via KAst,
∆KAst, and ∆KAx in rotation parameter table and coefficient table address offset
register. Also, when storing coefficient table in color RAM, it should be stored in the
latter half of color RAM (100800H to 100FFFH). The color RAM address to read the
stored coefficient table data is specified via KAst, ∆KAst, and ∆KAx in rotation
parameter table. As for the address to read coefficient table data, only the lower 10
bits in the integer part of the calculated coefficient table address become valid.
To select parameters for which the data read from the coefficient table are to be used,
the following 4 modes (coefficient data modes) are provided:
Mode 0: Used as Scale coefficient kx and ky
Mode 1: Used as Scale coefficient kx
Mode 2: Used as Scale coefficient ky
Mode 3: Used as viewpoint coordinate Xp after rotation conversion
In mode 0, kx and ky read from the rotation parameter table become invalid; data
read from the coefficient table is used as kx and ky.
When mode 1 is selected, ky read from the rotation parameter table is used, but data
read from the coefficient table is used for kx.
ST-58-R2 163
When mode 2 is selected, kx read from the rotation parameter table is used, but data
read from the coefficient table is used for ky.
When mode 3 is selected, X direction viewpoint coordinate Xp, converted
rotationally as data read from the rotation parameter table, becomes invalid. Data
read from the coefficient table is used for Xp.
Line Color Screen Data
Coefficient data can be used not only as rotation parameters, but as part of line color
screen data. In this case, the highest 4-bit data read from the line color screen table is
added to the highest of 7-bit data that is part of coefficient data. Figure 6.6 shows
line color screen data using coefficient data.
Re ad from Lin e Co lor Scr ee n Read from Coe fficie nt Tab le
Li ne Col or Scre en Dat a (11 bit ) Line Co lor Scr ee n Da ta (7 bit )
Li ne Colo r Scr ee n Data after com po sit io n
Figure 6.6 Line color screen data using coefficient data
When specifying mode 0 for rotation parameter mode, line color screen per rotation
parameter A coefficient table is used. When specifying mode 1, line color screen per
rotation parameter B coefficient table is used.
When specifying mode 2, for both rotation parameter A graphics and rotation pa-
rameter B graphics, line color screen per rotation parameter A coefficient table is
used.
When specifying mode 3, for rotation parameter A graphics, line color screen per
rotation parameter A coefficient table is used, whereas for rotation parameter B
graphics, line color screen per rotation parameter B coefficient table is used.
Also, when displaying RBG1, for both RBG0 and RBG1, line color screen per rotation
parameter A coefficient table is used.
164
Bit Configuration of Coefficient Table Data
Either “1-word” or “2-word” can be chosen as the data size on the coefficient table.
The data configuration changes depending on this coefficient data size and coeffi-
cient data mode. Figure 6.7 shows the bit configuration of coefficient table data.
Coe ffici en t Dat a Mod e 0~2
Coe ffici en t Dat a Size : 2 wor ds
Tra nsp ar en cy
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0 H 7 bi t line col or scre en da ta Sign 7 bi t integ er par t
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+2 H 16 bi t fra ct ion al par t
Coe ffici en t Dat a Size : 1 wor d
Tra nsp ar en cy
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0 H Sign 4 bit int ege r pa rt 10 bi t fra ct ion al pa rt
No te: The MS B are si gn -e xpa nd ed by 3 bit s an d the LS B are 0- exp an de d
by 6 bi ts to be of equ al to the num ber of bi ts as in the case of 2 wo rd s.
Coe ffici ent Dat a Mod e 3
Coe ffici ent Dat a Size : 2 wo rds
Tr an spa re ncy
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0 H 7 bi t line col or scre en da ta Sign Integ er par t MSB 7 bits
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+2 H Int eg er pa rt LS B 8 bi ts 8 bi t fra ct ion al par t
Coe ffici ent Dat a Size : 1 wo rd
Tr an spa re ncy
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0 H Sign 12 bit int ege r pa rt 2 bit fract iona l pa rt
Not e: The MSB ar e sig n- exp an de d by 3 bi ts and the LSB ar e 0-expa nd ed
by 6 bits to be of eq ua l to the nu mbe r of bits as in the ca se of 2 wor ds.
Figure 6.7 Bit configuration of coefficient table data
ST-58-R2 165
Coefficient Table Lead Address
The coefficient table lead address is obtained from the coefficient table start address
(KAst integer part 16-bit) read from the coefficient table address offset register and
rotation parameter table. The coefficient table vertical address increment (∆KAst
integer part 9-bit) and coefficient table horizontal address increment (∆KA integer
part 9-bit) are also read from the rotation parameter table.
The address value of the address offset, start address and address increment change
according to the data size of the coefficient table. Table 6.3 shows the address value
showing the least significant bit of each value. For example, when 4H is 2-word (the
least significant bit of integer KAst signifies the expression of the 4H address value),
it can be calculated as shown below.
(Coefficient table start address) = (KAst integer part 16 bit) X 4H
Table 6.3 Address values shown by the least significant bits of coefficient parameter data
of separate coefficient data sizes
Coefficient Address Value Indicated by the LSB
Data Size Coefficient Table Address KAst, ∆KAst, ∆KAx Integer
Offset Register Value part value
2 Words 40000H 4H
1 Word 20000H 2H
Most Significant Bit of Coefficient Data
The most significant bit of coefficient data is usually used as transparent bits; dots
that used coefficient data in which this bit is 1 are forced to be transparent dots.
However, when rotation parameter mode 2 is selected by RBG0, the most significant
bit of data read from the coefficient table used for rotation parameter A is used for
switching rotation parameters. When the most significant bit is 0, the designated
image is displayed by rotation parameter A. When the most significant bit is 1, the
designated image is displayed by rotation parameter B. Here, the most significant
bit of coefficient data read from the coefficient table used for rotation parameter B is
used as a transparent bit. The most significant bit of coefficient data for RBG1 is
always used as a transparent bit. Table 6.4 shows image processing by the most
significant bit values of coefficient data.
166
Table 6.4 Image processing using RBG0 coefficient data MSB value
Rotation Rotation MSB Function MSB Value Image Process
Parameter Parameter
Mode
A Transparent 0 Displays image obtained using the
coefficient data
0 1 Forces the dot to be transparent
using the coefficient data
B Not Used - -
A Not Used - -
1 B Transparent 0 Displays image obtained using the
coefficient data
1 Forces the dot to be transparent
using the coefficient data
A Parameter 0 Displays image obtained using the
coefficient data
2 Switching 1 Invalidates the coefficient data and
displays image obtained using
rotation parameter B
B Transparent 0 Displays image obtained using the
coefficient data
1 Forces the dot to be transparent
using the coefficient data
3 A, B Transparent 0 Displays image obtained using the
coefficient data
1 Forces the dot to be transparent
using the coefficient data
RAM Control Register
The RAM control register is a read/write 16-bit register that selects the VRAM bank
partition, rotation scroll screen VRAM use, and color RAM mode. After power-on or
reset, the value will be cleared and therefore must be set.
15 14 13 12 11 10 9 8
RAMCTL CRKTE ~ CRMD1 CRMD0 ~ ~ VRBMD VRAMD
18000EH 7 6 5 4 3 2 1 0
RDBSB11 RDBSB10 RDBSB01 RBBSB00 RDBSA11 RDBSA10 RDBSA01 RBBSA00
Color RAM Coefficient Table Enable (CRKTE), bit 15.
Selects whether to store the coefficient table in the color RAM.
CRKTE Function
0 Coefficient table is stored in VRAM
1 Coefficient table is stored in color RAM
ST-58-R2 167
Color RAM Mode Bit: (CRMD1, CRMD0), bits 13 and 12
Please see color RAM mode in 3.4.
When CRKTE is set to 1, please set color RAM mode to 1. Here, the latter half of the
color RAM (100800H-100FFFH) will be used for coefficient table data, therefore, the
color data cannot be stored.
VRAM Mode Bit: (VRAMD, VRBMD), bits 9 and 8
Please see VRAM bank partition in 3.2.
Rotation Data Bank Select Bit: (RDBSA00-11, RDBSB00-11), bits 7 through 0
Please see rotation scroll display control in 6.2.
When CRKTE is set to 1, VRAM bank 4 may not be selected to be used as coefficient
table data RAM.
Coefficient Table Control Register
The coefficient table control register is a write-only 16-bit register that controls the
coefficient table, and is at address 1800B4H. Because the value is cleared to 0, it
must be set after power on or reset.
15 14 13 12 11 10 9 8
KTCTL ~ ~ ~ RBKLCE RBKMD1 RBKMD0 RBKDBS RBKTE
1800B4H 7 6 5 4 3 2 1 0
~ ~ ~ RAKLCE RAKMD1 RAKMD0 RAKDBS RAKTE
Coefficient line color enable bit (RAKLCE, RBKLCE)
Designates whether to use line color screen data in coefficient data.
RAKLCE 1800B4H Bit 4 For Rotation Parameter A
RBKLCE 1800B4H Bit 12 For Rotation Parameter B
This bit uses the corresponding coefficient table and is effective only when the data
size is 2-word.
RxKLCE Process
0 Line color screen data within coefficient data is not used
1 Line color screen data within coefficient data is used
Note: A or B is entered in the bit name for x.
168
Coefficient data mode bit: Coefficient mode bit (RAKMD1, RAKMD0, RBKMD1, RBKMD0)
Designates what parameters the coefficient data is used as.
RAKMD1, RAKMD0 1800B4H Bit 3,2 For Rotation Parameter A
RBKMD1, RBKMD0 1800B4H Bit 11,10 For Rotation Parameter B
Because this bit is always in effect, be careful in rewriting timing.
RxKMD1 RxKMD0 Mode Coefficient Data Function
0 0 0 Use as scale coefficient kx, ky
0 1 1 Use as scale coefficient kx
1 0 2 Use as scale coefficient ky
1 1 3 Use as viewpoint Xp after rotation conversion
Note: A or B is entered in the bit name for x.
Coefficient data size bit (RAKDBS, RBKDBS)
Designates the size of the coefficient data.
RAKDBS 1800B4H Bit 1 For Rotation Parameter A
RBKDBS 1800B4H Bit 9 For Rotation Parameter B
This bit is in effect only when the corresponding coefficient table is used.
RxKDBS Coefficient Data Size
0 2 Words
1 1 Word
Note: A or B is entered in the bit name for x.
Coefficient table enable bit (RAKTE, RBKTE)
Designates whether the coefficient table is used.
RAKTE 1800B4H Bit 0 For Rotation Parameter A
RBKTE 1800B4H Bit 8 For Rotation Parameter B
RxKTE Process
0 Do not use coefficient table
1 Use coefficient table
Note: A or B is entered in the bit name for x.
ST-58-R2 169
Coefficient Table Address Offset Register
Coefficient table address offset register is a write-only 16-bit register that designates
the coefficient table lead address offset value, and is at address 1800B6H. Because
the value is cleared to 0, it must be set after power on or reset.
15 14 13 12 11 10 9 8
KTAOF ~ ~ ~ ~ ~ RBKTAOS2 RBKTAOS1 RBKTAOS0
1800B6H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ RAKTAOS2 RAKTAOS1 RAKTAOS0
Coefficient table address offset bit (RAKTAOS2 to RAKTAOS0, RBKTAOS2 to RBKTAOS0)
Designates the lead address offset value of the coefficient table stored in the rotation
parameter table.
RAKTAOS2~RAKTAOS0 1800B6H Bit 2~0 For Rotation Parameter A
RBKTAOS2~RBKTAOS0 1800B6H Bit 10~8 For Rotation Parameter B
These bits are added to the highest coefficient table start address (KAst) read from
the rotation parameter table. The actual lead address of the coefficient table changes
according to the size of the coefficient data, and is calculated by the expression
below. When VRAM size is 4 Mbits, the most significant bit of the address is ig-
nored.
When the coefficient data size is 2 word:
(coefficient table lead address)
= (coefficient table address offset register value lowest 2 bits)
X 40000H + (KAst integer part 16 bit) X 4H
When the coefficient data size is 1 word:
(coefficient table lead address)
= (coefficient table address offset register value 3 bits)
X 20000H + (KAst integer part 16 bit) X 2H
170
Chapter 7 Line Screen
Introduction ..........................................................................172
7.1 Line Color Screen .......................................................172
Line Color Screen Table Address Register .............. 174
7.2 Back Screen ................................................................175
Back Screen Table Address Register ....................... 176
ST-58-R2 171
Introduction
There are two line screen surfaces: the line color screen (LNCL) and the back screen
(BACK). The line screen designates the color in each line, or the entire screen in a
single color. Unlike the scroll screen, the line screen cannot display characters. The
line color screen stores the data of each line in VRAM as a line color screen table. If
single colored, lead data of the table is used in the entire screen. The line screen is
shown in Figure 7.1.
Line Screen Table (VRAM) Line Screen
Line Screen Data for
1st Line 1st Line
Line Screen Data for 2nd Line
2nd Line 3rd Line
Line Screen Data for
3rd Line
Note: In the case of single color, the 1st line data is used in the entire screen.
Figure 7.1 Line Screen
7.1 Line Color Screen
The line color screen is used only for color calculations, and chooses whether to
designate the entire screen in a single color, or designate the color for each line. The
color RAM address of the color used is stored in VRAM as line color screen data.
The line number designated by one line color screen data changes, depending on the
interlace setting. The non-interlace and double-density interlace modes can desig-
nate the color for each line; the single-density interlace mode can designate for each
two lines.
The line color screen can also be made to rotate if line color screen data is used
within coefficient data. For more about coefficient data see section “6.4 Coefficient
Table Control.” Figure 7.2 shows the configuration of the line color screen table
separate of the interlace mode. Figure 7.3 shows the configuration of data on the
line color screen table.
172
Non-interlace and double-density interlace mode
Bit 15 Line Color Screen Table (VRAM) 0
+00H 1st Line Color RAM Address
+02H 2nd Line Color RAM Address
+04H 3rd Line Color RAM Address
+06H 4th Line Color RAM Address
+08H 5th Line Color RAM Address
+0AH 6th Line Color RAM Address
Note: In the case of single color, the first line color RAM
address is used in the entire line color screen. In th
case of double-density interlace, line data of odd an
even fields are stored together.
Single-density interlace mode
Bit 15 Line Color Screen Table (VRAM) 0
+00H 1st and 2nd Line Color Ram Address
+02H 3rd and 4th Line Color Ram Address
+04H 5th and 6th Line Color Ram Address
+06H 7th and 8th Line Color Ram Address
+08H 9th and 10th Line Color Ram Address
+0AH 11th and 12th Line Color Ram Address
Note: In the case of single color, the first and second line
color RAM addresses are used in the entire line
color screen.
Figure 7.2 Configuration of line color screen table
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
11 bit color Ram address
Note: Shaded areas are ignored. Also, when color RAM is in mode 0 or mode 2,
the MSB of the address is ignored.
Figure 7.3 Bit configuration of line color screen table data
ST-58-R2 173
Line Color Screen Table Address Register
The line color screen table address register is a 32-bit register, and designates the
lead address of the table and the color mode of the line color screen. Its addresses
are 1800A8H through 1800AAH. Because the value is cleared to 0, it must be set
after power on, or reset.
15 14 13 12 11 10 9 8
LCTAU LCCLMD ~ ~ ~ ~ ~ ~ ~
1800A8H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ LCTA18 LCTA17 LCTA16
15 14 13 12 11 10 9 8
LCTAL LCTA15 LCTA14 LCTA13 LCTA12 LCTA11 LCTA10 LCTA9 LCTA8
1800AAH 7 6 5 4 3 2 1 0
LCTA7 LCTA6 LCTA5 LCTA4 LCTA3 LCTA2 LCTA1 LCTA0
Line color screen mode bit: LNCL color mode bit (LCCLMD), bit 15
Designates the color mode of the line color screen.
LCCLMD Line Color Screen Color
0 Single color
1 Select per each line
Line color screen table address bit: LNCL table address bit (LCTA18 to LCTA0)
Designates the lead address of the line color screen table on the VRAM.
LCTA18~LCTA16 1800A8H Bit 2~0
LCTA15~LCTA0 1800AAH Bit 15~0
The actual lead VRAM address is calculated by the expression below. When the
VRAM size is 4 Mbits, the most significant bit of the address is ignored.
(Line color screen table lead address)
= (Line color screen table address register value 19 bit) X 2H
174
7.2 Back Screen
The back screen (BACK) is displayed only when other screens aren’t, and chooses
whether to designate a single color for the entire screen or for each line. Color data
used by a line is designated by each 5-bit RGB. The non-interlace and double-den-
sity interlace mode designates the color in each line, but the single-density interlace
mode can designate only in each two lines. Figure 7.4 shows the configuration of the
back screen table by the interlace mode. Figure 7.5 shows the configuration of data
on the back screen table.
Non-interlace and double-density interlace mode
Bit 15 Back Screen Table (VRAM) 0
+00H 1st Line RGB Data
+02H 2nd Line RGB Data
+04H 3rd Line RGB Data
+06H 4th Line RGB Data
+08H 5th Line RGB Data
+0AH 6th Line RGB Data
Note: In the case of single color, the first line RGB data is us
in the entire line color screen. In the case of
double-density interlace, line data of odd and even fiel
are stored together.
Single-density interlace mode
Bit 15 Back Screen Table (VRAM) 0
+00H 1st and 2nd Line RGB Data
+02H 3rd and 4th Line RGB Data
+04H 5th and 6th Line RGB Data
+06H 7th and 8th Line RGB Data
+08H 9th and 10th Line RGB Data
+0AH 11th and 12th Line RGB Data
Note: In the case of single color, the first and second line RGB
data are used in the entire line color screen.
Figure 7.4 Configuration of back screen table
ST-58-R2 175
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
5 bit Blue Data 5 bit Green Data 5 bit Red Data
Note: Shaded area is ignored. Add 0 bit 3 bits at a time to the lower bits of
RGB to make 8 bits.
Figure 7.5 Bit configuration of back screen table data
Back Screen Table Address Register
Back screen table address register is a write-only 32-bit registers, and selects the back
screen color mode and table lead address. Its addresses are 1800ACH through
1800AEH. Because the value is cleared to 0, it must be set after power on or reset.
15 14 13 12 11 10 9 8
BKTAU BKCLMD ~ ~ ~ ~ ~ ~ ~
1800ACH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ BKTA18 BKTA17 BKTA16
15 14 13 12 11 10 9 8
BKTAL BKTA15 BKTA14 BKTA13 BKTA12 BKTA11 BKTA10 BKTA9 BKTA8
1800AEH 7 6 5 4 3 2 1 0
BKTA7 BKTA6 BKTA5 BKTA4 BKTA3 BKTA2 BKTA1 BKTA0
Back screen color mode bit: BACK color mode bit (BKCLMD), bit 15
Designates color mode of the back screen.
BKCLMD Back Screen Color
0 Single color
1 Select per each line
Back screen table address bit: BACK color table address bit (BKTA18 to BKTA0)
Designates the lead address of the back screen table on the VRAM.
BKTA18~BKTA16 1800ACH Bit 2~0
BKTA 15~BKTA0 1800AEH Bit 15~0
176
The actual lead VRAM address is calculated by the expression below. When the
VRAM capacity is 4 Mbits, the most significant bit of the address is ignored.
(Back screen table lead address)
= (Back screen table address register value 19 bit) X 2H
When the back screen color mode bit is set to “single color”, color data selected by
the back screen table address bit is used in the entire screen.
ST-58-R2 177
(This page is blank in the original Japanese document)
178
Chapter 8 Windows
8.1 Window Area ......................................................... 180
Normal Rectangular Window ............................. 180
Window Position Register .................................. 181
Normal Line Window .......................................... 184
Line Window Table Address Register ................ 186
Sprite Window .................................................... 187
Sprite Control Register ....................................... 188
Window Active Area in the Screen ..................... 189
8.2 Window Process ................................................... 190
Window Process Register .................................. 193
ST-58-R2 179
8.1 Window Area
The scroll IC window has two Normal windows, W0 and W1, and one sprite win-
dow, SW. The Normal window selects start and end coordinates on the TV screen;
the sprite window designates the most significant bit value of sprite data written to
the frame buffer. Various windows can designate which scroll screen is to be put
into effect, and whether the inside or outside of the area will go into effect. More-
over, when more than one window is used, they can be overlapped other by AND or
OR logic.
The Normal window selects the Normal rectangular window designated through
the horizontal and vertical start and end coordinates, and selects the Normal line
window designated through horizontal start and end coordinates in each line. The
start and end coordinates set the coordinate values on the TV screen in each register,
and not on the scroll screen.
Normal Rectangular Window
The normal rectangular window is obtained by selecting the start coordinates in the
upper left corner in the window position register, and the end coordinates in the
lower right corner of the window. The area surrounded by selected coordinates is
inside, the rest of area is outside. The border line of the window is considered part
of the inside.
If the start coordinate of either the horizontal or vertical direction is larger than the
end coordinate, then the whole screen is considered an area outside the window.
Figure 8.1 shows the Normal rectangular window.
Start Point Coordinates
TV Screen
Start Point Coordinates
Window
Inside
Outside End Point
Coordinates
Window Boundary
Figure 8.1 Normal rectangular window
180
Window Position Register
The window position register is a write-only 16-bit register that selects the horizon-
tal and vertical start and end coordinates of the Normal window, and is located from
addresses 1800C0H through 1800CEH. Because the value is cleared to 0, it must be
set after power on or reset.
15 14 13 12 11 10 9 8
WPSX0 ~ ~ ~ ~ ~ ~ W0SX9 W0SX8
1800C0H 7 6 5 4 3 2 1 0
W0SX7 W0SX6 W0SX5 W0SX4 W0SX3 W0SX2 W0SX1 W0SX0
15 14 13 12 11 10 9 8
WPSY0 ~ ~ ~ ~ ~ ~ ~ W0SY8
1800C2H 7 6 5 4 3 2 1 0
W0SY7 W0SY6 W0SY5 W0SY4 W0SY3 W0SY2 W0SY1 W0SY0
15 14 13 12 11 10 9 8
WPEX0 ~ ~ ~ ~ ~ ~ W0EX9 W0EX8
1800C4H 7 6 5 4 3 2 1 0
W0EX7 W0EX6 W0EX5 W0EX4 W0EX3 W0EX2 W0EX1 W0EX0
15 14 13 12 11 10 9 8
WPEY0 ~ ~ ~ ~ ~ ~ ~ W0EY8
1800C6H 7 6 5 4 3 2 1 0
W0EY7 W0EY6 W0EY5 W0EY4 W0EY3 W0EY2 W0EY1 W0EY0
15 14 13 12 11 10 9 8
WPSX1 ~ ~ ~ ~ ~ ~ W1SX9 W1SX8
1800C8H 7 6 5 4 3 2 1 0
W1SX7 W1SX6 W1SX5 W1SX4 W1SX3 W1SX2 W1SX1 W1SX0
15 14 13 12 11 10 9 8
WPSY1 ~ ~ ~ ~ ~ ~ ~ W1SY8
1800CAH 7 6 5 4 3 2 1 0
W1SY7 W1SY6 W1SY5 W1SY4 W1SY3 W1SY2 W1SY1 W1SY0
15 14 13 12 11 10 9 8
WPEX1 ~ ~ ~ ~ ~ ~ W1EX9 W1EX8
1800CCH 7 6 5 4 3 2 1 0
W1EX7 W1EX6 W1EX5 W1EX4 W1EX3 W1EX2 W1EX1 W1EX0
15 14 13 12 11 10 9 8
WPEY1 ~ ~ ~ ~ ~ ~ ~ W1EY8
1800CEH 7 6 5 4 3 2 1 0
W1EY7 W1EY6 W1EY5 W1EY4 W1EY3 W1EY2 W1EY1 W1EY0
ST-58-R2 181
Window position bit (for horizontal coordinates): Window start/end X bit (W0SX9 to W0SX0,
W0EX9 to W0EX0, W1SX9 to W1SX0, W1EX9 to W1EX0)
Designates the horizontal start and end coordinates. Designated coordinate value is
the coordinate value (H counter value) on the TV screen.
W0SX9~W0SX0 1800C0H Bit 9~0 For W0 start point coordinates
W0EX9~W0EX0 1800C4H Bit 9~0 For W0 end point coordinates
W1SX9~W1SX0 1800C8H Bit 9~0 For W1 start point coordinates
W1EX9~W1EX0 1800CCH Bit 9~0 For W1 end point coordinates
The bit configuration of the register changes according to the setting of the graphics
mode. For normal graphics, the least significant bit becomes invalid data. For
exclusive normal graphics, the most significant bit becomes invalid data; moreover,
for special high-resolution graphics, the most significant bit becomes invalid data.
Since it doesn’t have an HO bit, values are in 2 pixel units. Table 8.1 shows the bit
content of the window position register by graphic mode setting.
Table 8.1 Bit content of window position register for horizontal coordinates
Graphics WxxX9 WxxX8 WxxX7 WxxX6 WxxX5 WxxX4 WxxX3 WxxX2 WxxX1 WxxX0
Mode
Normal H8 H7 H6 H5 H4 H3 H2 H1 H0 Invalid
Hi-Res H9 H8 H7 H6 H5 H4 H3 H2 H1 H0
Exclusive Invalid H8 H7 H6 H5 H4 H3 H2 H1 H0
Normal
Exclusive Invalid H9 H8 H7 H6 H5 H4 H3 H2 H1
Hi-Res
Note: 0S, 0E, 1S, or 1E is entered in bit name for xx.
Window position bit (for vertical coordinates): Window start/end Y bit (W0SY8 to W0SY0,
W0EY8 to W0EY0, W1SY8 to W1SY0, W1EY8 to W1EY0)
Designates the vertical start and end coordinates. The designated coordinate value
is the coordinate value (V counter value) on the TV screen.
W0SY8~W0SY0 1800C2H Bit 8~0 For W0 start point coordinates
W0EY8~W0EY0 1800C6H Bit 8~0 For W0 end point coordinates
W1SY8~W1SY0 1800CAH Bit 8~0 For W1 start point coordinates
W1EY8~W1EY0 1800CEH Bit 8~0 For W1 end point coordinates
The bit configuration of the register changes according to the screen mode setting.
Single-density interlace of Normal and high-resolution modes designate the V
counter value in the respective even-numbered and odd-numbered fields.
182
The lowest significant bit is invalid for the double-density interlace of Normal and
high-resolution modes. Remaining bits designate the V counter value in various
fields. Bit content of the window position register by setting of the screen mode is
shown in Table 8.2.
Table 8.2 Bit content of the window position register used for vertical coordinates
TV Screen WxxY8 WxxY7 WxxY6 WxxY5 WxxY4 WxxY3 WxxY2 WxxY1 WxxY0
(Interlace) Mode
Normal, Hi-Res V8 V7 V6 V5 V4 V3 V2 V1 V0
(Non-interlace,
Single-Density
Interlace)
Normal, Hi-Res V7 V6 V5 V4 V3 V2 V1 V0 Invalid
(Double-Density
Interlace)
Exclusive Monitor V8 V7 V6 V5 V4 V3 V2 V1 V0
Note: 0S, 0E, 1S or 1E is entered in bit name for xx.
ST-58-R2 183
Normal Line Window
The Normal line window stores the horizontal start and end coordinates of each
window line as a table in VRAM, and is obtained by designating the vertical start
and end coordinates in the window position register. The area surrounded by se-
lected coordinates is inside, the rest of the area is outside. The border line of the
window is considered part of the inside. The Normal line window is illustrated in
Figure 8.2.
The bit configuration of data stored in the line window table of horizontal start and
end coordinates is shown in Figure 8.3.
Coordinates in each line can be selected in the non-interlace and double-density
interlace modes, and in the single-density interlace mode for each two lines. Con-
figuration of the Normal line window table is shown in Figure 8.4.
If the start coordinate of either the horizontal or vertical direction is larger than the
end coordinate, then the whole screen is considered an area outside the window.
Horizontal Start Point Coordinates
TV Screen
Outside
Vertical Start
Point
Window Coordinates
Inside
Vertical End
Point
Coordinates
Horizontal End Point Coordinates for Each Line
Horizontal Start Point Coordinates for Each Line
Window Boundary
Figure 8.2 Normal line window
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0H Horizontal Start Point Coordinates (10 bits)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+2H Horizontal End Point Coordinates (10 bits)
Note: Shaded areas are ignored
Figure 8.3 Bit configuration of Normal line window table data
184
Non-interlace or double-density interlace
Bit 15 Line Window Table (VRAM) 0
+00H 1st line horizontal start point coordinates
+02H 1st line horizontal end point coordinates
+04H 2nd line horizontal start point coordinates
+06H 2nd line horizontal end point coordinates
+08H 3rd line horizontal start point coordinates
+0AH 3rd line horizontal end point coordinates
Note: In the case of double-density interlace, store line data of
both even and odd fields.
Single-density interlace
Bit 15 Line Window Table (VRAM) 0
+00H 1st & 2nd line horizontal start point coordinates
+02H 1st & 2nd line horizontal end point coordinates
+04H 3rd & 4th line horizontal start point coordinates
+06H 3rd & 4th line horizontal end point coordinates
+08H 5th & 6th line horizontal start point coordinates
+0AH 5th & 6th line horizontal end point coordinates
Figure 8.4 Configuration of Normal line window table
ST-58-R2 185
Line Window Table Address Register
The line window table address register is a write-only 16-bit register that designates
whether to make the Normal window the line window, as well as the lead address of
that table. It is located from addresses 1800D8H through 1800DEH. Because the
value is cleared to 0, it must be set after power on or reset.
15 14 13 12 11 10 9 8
LWTA0U W0LWE ~ ~ ~ ~ ~ ~ ~
1800D8H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ W0LWTA18 W0LWTA17 W0LWTA16
15 14 13 12 11 10 9 8
LWTA0L W0LWTA15 W0LWTA14 W0LWTA13 W0LWTA12 W0LWTA11 W0LWTA10 W0LWTA9 W0LWTA8
1800DAH 7 6 5 4 3 2 1 0
W0LWTA7 W0LWTA6 W0LWTA5 W0LWTA4 W0LWTA3 W0LWTA2 W0LWTA1 ~
15 14 13 12 11 10 9 8
LWTA1U W1LWE ~ ~ ~ ~ ~ ~ ~
1800DCH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ W1LWTA18 W1LWTA17 W1LWTA16
15 14 13 12 11 10 9 8
LWTA1L W1LWTA15 W1LWTA14 W1LWTA13 W1LWTA12 W1LWTA11 W1LWTA10 W1LWTA9 W1LWTA8
1800DEH 7 6 5 4 3 2 1 0
W1LWTA7 W1LWTA6 W1LWTA5 W1LWTA4 W1LWTA3 W1LWTA2 W1LWTA1 ~
Line window enable bit (W0LWE, W1LWE)
Designates whether to make the Normal window a line window.
W0LWE 1800D8H Bit 15 For W0
W1LWE 1800DCH Bit 15 For W1
WxLWE Process
0 Does not process Normal Window to Line Window
1 Processes Normal Window to Line Window
Note: 0 or 1 is entered in bit name for x.
When this bit is “1”, the line window table must be stored in VRAM.
186
Line window table address bit (W0LWTA18 to W0LWTA1, W1LWTA18 to W1LWTA1)
Designates the lead address of the line window table in VRAM.
W0LWTA18~W0LWTA16 1800D8H Bit 2~0 For W0
W0LWTA15~W0LWTA1 1800DAH Bit 15~1 For W0
W1LWTA18~W1LWTA16 1800DCH Bit 2~0 For W1
W1LWTA15~W1LWTA1 1800DEH Bit 15~1 For W1
The actual lead address is calculated by the expression below. The most significant
bit of the address is ignored when VRAM is 4 Mbits.
(Lead address of the line window table)
= (Line window table address register value 18 bits) X 4H
Sprite Window
The sprite window is obtained by selecting the most significant bit of data when all
frame buffer data of the sprite is palette format data and sprite types are 2 through 7.
The most significant single bit is inside, and the rest of the area is outside. For more
about sprite types see “Sprite types” in section “9.1 Sprite Data.” Figure 8.5 shows a
sprite window.
Frame Buffer
MSB
TV Screen
1 1 0 0 0 0 1 1
1 1 1 0 0 1 1 1 Window
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 Inside
1 1 1 1 1 1 1 1
1 1 1 0 0 1 1 1
1 1 0 0 0 0 1 1 Outside
Figure 8.5 Sprite Window
ST-58-R2 187
Sprite Control Register
The sprite control register controls sprites. This is a write-only 16-bit register that is
at address 1800E0H. Because the value is cleared to 0, it must be set after power on
or reset.
15 14 13 12 11 10 9 8
SPCTL ~ ~ SPCCCS1 SPCCCS0 ~ SPCCN2 SPCCN1 SPCCN0
1800E0H 7 6 5 4 3 2 1 0
~ ~ SPCLMD SPWINEN SPTYPE3 SPTYPE2 SPTYPE1 SPTYPE0
Sprite color calculation condition bit (SPCCCS1, SPCCCS0)
See “9.2 Priority and Color Calculation”
Sprite color calculation condition number bit (SPCCN2 to SPCCN0)
See “9.2 Priority and Color Calculation”
Sprite color mode bit (SPCLMD)
See “9.1 Sprite Data”
Sprite window enable bit: SW enable bit (SPWINEN), bit 4
Designates whether to use the sprite window SW.
SPWINEN Process
0 Does not use sprite window
1 Uses sprite window
This bit is only effective when the sprite color mode is mode 0, and for only sprites
2 to 7. WHen this bit is “1”, the most significant bit of the sprite frame buffer is used
as the bit for the sprite window. As a result, MSB shadow can no longer be used.
For more about shadows see “14.1 Shadow Process.”
Do not set this bit to 1, when setting SPCLMD bit to 1.
Sprite type bit (SPTYPE3 to SPTYPE0)
See “9.1 Sprite Data”
188
Window’s Active Area for the Screen
Normal and sprite windows can designate whether to use a window in each scroll
screen. The window being used can select inside or outside, in each window, as well
as perform color calculation and transparent processes in active areas. When using
multiple windows, the method of overlap can be selected from AND or OR logic.
Figure 8.6 shows the active area when normal and sprite windows are overlaid by
AND or OR logic.
TV Screen TV Screen TV Screen
Inside Outside
Outside
Inside
Outside Inside
Normal Window (W0) Normal Window (W1) Normal Window (SW)
W0 and SW overlap W1 and SW overlap
•AND •OR
W0: Outside the area W0: Not Used
is valid W1: Inside the area
W1: Not used is valid
SW: Inside the area SW: Inside the area
is valid is valid
Valid Area Valid Area
Figure 8.6 Active area of window
ST-58-R2 189
8.2 Window Process
The three window processes are:
1. Transparency process window
2. Rotation parameter window
3. Color calculation window
The transparency process window forces the selected window effective area to be
transparent, and can be used in each screen.
When displaying the RBG0 screen, the rotation parameter window designates the
area displaying the image obtained by rotation parameter A, and designates which
image obtained by rotation parameter B is displayed. Images obtained by rotation
parameter B are displayed in the active area of the designated window; images
obtained by rotation parameter A are displayed outside the window’s active area.
The color calculation window is a window in which color calculation in the active
area of the designated window is not performed, and is effective for screens using
the color calculation function.
190
Window process is shown in Figure 8.7.
Transparency Processing Window
ABCDEFGHIJKLMNOPQ
Transparent RSTUVWXYZABCDEFGH
IJKLMNOPQRSTUVWXY
ZABCDEFGHIJKLMNOP
QRSTUVWXYZABCDEFG
HIJKLMNOPQRSTUVWX
Screen A Screen B
ABCDEFGHIJKLMNOPQ
RSTUVWXYZABCDEFGH
IJKLMNOPQRSTUVWXY
ZABCDEFGHIJKLMNOP
QRSTUVWXYZABCDEFG
HIJKLMNOPQRSTUVWX
Window
Enabled
Area
ABCDEFGHIJKLMNOPQ
RSTUVWXYZABCDEFGH
IJKLMNOPQRSTUVWXY Screen A Transparency
ZABCDEFGHIJKLMNOP Processing Window
QRSTUVWXYZABCDEFG
HIJKLMNOPQRSTUVWX
Display Image
Rotation Parameter Window
Image acquired via Image acquired via
rotation parameter A rotation parameter B
Window
Enabled
Area
Rotation Parameter
Window
Image A Image B
Display Image
Figure 8.7 Window Process
ST-58-R2 191
Color Calculation Window
Transparent
Screen that uses
Color Calculation
Function
Window
Enabled
Area
Color Calculation Window
Area that does not
calculate color
Display Image
Figure 8.7 Window Process (continued)
192
Window Control Register
Window control register designates the method for using windows in each screen,
and is a write-only 16-bit register that is located from addresses 1800D0H through
1800D6H. Because the value is cleared to 0, it must be set after power on or reset.
15 14 13 12 11 10 9 8
WCTLA N1LOG ~ N1SWE N1SWA N1W1E N1W1A N1W0E N1W0A
1800D0H 7 6 5 4 3 2 1 0
N0LOG ~ N0SWE N0SWA N0W1E N0W1A N0W0E N0W0A
15 14 13 12 11 10 9 8
WCTLB N3LOG ~ N3SWE N3SWA N3W1E N3W1A N3W0E N3W0A
1800D2H 7 6 5 4 3 2 1 0
N2LOG ~ N2SWE N2SWA N2W1E N2W1A N2W0E N2W0A
15 14 13 12 11 10 9 8
WCTLC SPLOG ~ SPSWE SPSWA SPW1E SPW1A SPW0E SPW0A
1800D4H 7 6 5 4 3 2 1 0
R0LOG ~ R0SWE R0SWA R0W1E R0W1A R0W0E R0W0A
15 14 13 12 11 10 9 8
WCTLD CCLOG ~ CCSWE CCSWA CCW1E CCW1A CCW0E CCW0A
1800D6H 7 6 5 4 3 2 1 0
RPLOG ~ ~ ~ RPW1E RPW1A RPW0E RPW0A
Window logic bit: Logic bit (N0LOG, N1LOG, N2LOG, N3LOG, R0LOG, SPLOG, RPLOG, CCLOG)
Designates the method of overlapping windows used in each screen.
N0LOG 1800D0H Bit 7 Transparent Process Window for NBG0 (or RBG1)
N1LOG 1800D0H Bit 15 Transparent Process Window for NBG1 (or EXBG)
N2LOG 1800D2H Bit 7 Transparent Process Window for NBG2
N3LOG 1800D2H Bit 15 Transparent Process Window for NBG3
R0LOG 1800D4H Bit 7 Transparent Process Window for RBG0
SPLOG 1800D4H Bit 15 Transparent Process Window for Sprite
RPLOG 1800D6H Bit 7 For Rotation Parameter Window
CCLOG 1800D6H Bit 15 For Color Calculation Window
ST-58-R2 193
xxLOG Overlaid Logic
0 OR
1 AND
Note: N0, N1, N2, N3, R0, SP, RP or CC is entered in bit name for xx.
When W0, W1, and SW window enable bits are all 0, with this bit set to 0, the whole
screen will be window disabled area, and with this bit set to 1, the whole screen will
become window enabled area.
Window enable bit (for W0): W0 enable bit (N0W0E, N1W0E, N2W0E, N3W0E, R0W0E, SPW0E,
RPW0E, CCW0E)
Designates whether to use the Normal window W0 in each screen.
N0W0E 1800D0H Bit 1 Transparent Process Window for NBG0 (or RBG1)
N1W0E 1800D0H Bit 9 Transparent Process Window for NBG1 (or EXBG)
N2W0E 1800D2H Bit 1 Transparent Process Window for NBG2
N3W0E 1800D2H Bit 9 Transparent Process Window for NBG3
R0W0E 1800D4H Bit 1 Transparent Process Window for RBG0
SPW0E 1800D4H Bit 9 Transparent Process Window for Sprite
RPW0E 1800D6H Bit 1 For Rotation Parameter Window
CCW0E 1800D6H Bit 9 For Color Calculation Window
xxW0E Process
0 Does not use W0 window
1 Uses W0 window
Note: N0, N1, N2, N3, R0, SP, RP, or CC is entered in bit name for xx.
Window enable bit (for W1): W1 enable bit (N0W1E, N1W1E, N2W1E, N3W1E, R0W1E, SPW1E,
RPW1E, CCW1E)
Designates whether to use the Normal window W1 in each screen.
194
N0W1E 1800D0H Bit 3 Transparent Process Window for NBG0 (or RBG1)
N1W1E 1800D0H Bit 11 Transparent Process Window for NBG1 (or EXBG)
N2W1E 1800D2H Bit 3 Transparent Process Window for NBG2
N3W1E 1800D2H Bit 11 Transparent Process Window for NBG3
R0W1E 1800D4H Bit 3 Transparent Process Window for RBG0
SPW1E 1800D4H Bit 11 Transparent Process Window for Sprite
RPW1E 1800D6H Bit 3 For Rotation Parameter Window
CCW1E 1800D6H Bit 11 For Color Calculation Window
xxW1E Process
0 Does not use W1 window
1 Uses W1 window
Note: N0, N1, N2, N3, R0, SP, RP, or CC is entered in bit name for xx.
Window enable bit (for SW): SW enable bit (N0SWE, N1SWE, N2SWE, N3SWE, R0SWE,
SPSWE, CCSWE)
Designates whether to use the sprite window SW in each screen.
N0SWE 1800D0H Bit 5 Transparent Process Window for NBG0 (or RBG1)
N1SWE 1800D0H Bit 13 Transparent Process Window for NBG1 (or EXBG)
N2SWE 1800D2H Bit 5 Transparent Process Window for NBG2
N3SWE 1800D2H Bit 13 Transparent Process Window for NBG3
R0SWE 1800D4H Bit 5 Transparent Process Window for RBG0
SPSWE 1800D4H Bit 13 Transparent Process Window for Sprite
CCSWE 1800D6H Bit 13 For Color Calculation Window
xxSWE Process
0 Does not use SW window
1 Uses SW window
Note: N0, N1, N2, N3, R0, SP, or CC is entered in bit name for xx.
When using the sprite window, set the sprite window enable bit (SPWINEN) of the
sprite control register to 1.
Window area bit (for W0): W0 area bit (N0W0A, N1W0A, N2W0A, N3W0A, R0W0A, SPW0A,
RPW0A, CCW0A)
Designates the valid area of the Normal window W0 used in each screen.
ST-58-R2 195
N0W0A 1800D0H Bit 0 Transparent Process Window for NBG0 (or RBG1)
N1W0A 1800D0H Bit 8 Transparent Process Window for NBG1 (or EXBG)
N2W0A 1800D2H Bit 0 Transparent Process Window for NBG2
N3W0A 1800D2H Bit 8 Transparent Process Window for NBG3
R0W0A 1800D4H Bit 0 Transparent Process Window for RBG0
SPW0A 1800D4H Bit 8 Transparent Process Window for Sprite
RPW0A 1800D6H Bit 0 For Rotation Parameter Window
CCW0A 1800D6H Bit 8 For Color Calculation Window
xxW0A Process
0 Enables the inside of W0 window
1 Enables the outside of W0 window
Note: N0, N1, N2, N3, R0, SP, RP, or CC is entered in bit name for xx.
Window area bit (for W1): W1 area bit (N0W1A, N1W1A, N2W1A, N3W1A, R0W1A, SPW1A,
RPW1A, CCW1A)
Designates the valid area of the Normal window W1 used in each screen.
N0W1A 1800D0H Bit 2 Transparent Process Window for NBG0 (or RBG1)
N1W1A 1800D0H Bit 10 Transparent Process Window for NBG1 (or EXBG)
N2W1A 1800D2H Bit 2 Transparent Process Window for NBG2
N3W1A 1800D2H Bit 10 Transparent Process Window for NBG3
R0W1A 1800D4H Bit 2 Transparent Process Window for RBG0
SPW1A 1800D4H Bit 10 Transparent Process Window for Sprite
RPW1A 1800D6H Bit 2 For Rotation Parameter Window
CCW1A 1800D6H Bit 10 For Color Calculation Window
xxW1A Process
0 Enables the inside of W1 window
1 Enables the outside of W1 window
Note: N0, N1, N2, N3, R0, SP, RP, or CC is entered in bit name for xx.
Window area bit (for SW): SW area bit (N0SWA, N1SWA, N2SWA, N3SWA, R0SWA, SPSWA,
CCSWA)
Designates the valid area of the sprite window SW used in each screen.
196
N0SWA 1800D0H Bit 4 Transparent Process Window for NBG0 (or RBG1)
N1SWA 1800D0H Bit 12 Transparent Process Window for NBG1 (or EXBG)
N2SWA 1800D2H Bit 4 Transparent Process Window for NBG2
N3SWA 1800D2H Bit 12 Transparent Process Window for NBG3
R0SWA 1800D4H Bit 4 Transparent Process Window for RBG0
SPSWA 1800D4H Bit 12 Transparent Process Window for Sprite
CCSWA 1800D6H Bit 12 For Color Calculation Window
xxSWA Process
0 Enables the inside of SW window
1 Enables the outside of SW window
Note: N0, N1, N2, N3, R0, SP or CC is entered in bit name for xx.
ST-58-R2 197
(This page was blank in the original Japanese document)
198
Chapter 9 Sprite Data
9.1 Sprite Data ............................................................200
Sprite Types ....................................................... 200
Sprite Color Mode .............................................. 203
9.2 Priority and Color Calculation ............................... 204
Priority Number Selection .................................. 204
Color Calculation Enable Conditions ................. 205
Color Calculation Ratio Selection ...................... 206
Sprite Control Register ....................................... 207
Priority Number Register .................................... 209
Color Calculation Ratio Registers ...................... 210
ST-58-R2 199
9.1 Sprite Data
Sprite frame buffer data received from VDP1 may be either 8-bit pixel or 16-bit
pixels. When the 16-bit pixel format is read, the data may be either RGB or palette
format, but the frame buffer must be either all 8-bit pixel or all 16-bit pixels.
Sprite Types
When VDP2 receives palette format sprite data written by VDP1 in the frame buffer,
there are eight types of bit configurations for 16 bits per pixel and eight types of bit
configurations for 8 bits per pixel, for a total of 16 types. These are called sprite
types. Data per one dot consists of dot color data, priority bit, color calculation ratio
bit, and shadow bit composed from dot color code and palette number. Each bit
number changes depending on the sprite type. The value of a bit not having a high
enough order in the various bits is regarded as 0.
Sprite data of RGB format is composed of data of RGB for each 5-bit and color for-
mat discriminator bit. Priority bits, color calculation ratio bits, and shadow bits are
considered to be 0.
Sprite data, when 16-bit per pixel, designates types 0 through 7; when 8 bit per pixel,
designates types 8 through F. When types C through F are designated, priority bit,
color calculation ratio bit, and dot color data bit have a shared bit. The shared bits
are shown in Table 9.1.
Table 9.1 Shared Bits
Sprite Type Shared Bits
SP1 SP0 SC1 SC0
Tpye C - PR0 and DC7 - -
Type D - PR0 and DC7 - CC0 and DC6
Type E PR1 and DC7 PR0 and DC6 - -
Type F - - CC1 and DC7 CC0 and DC6
SP: Priority bit, color RAM address shared bit
SC: Color calculation ratio bit, color RAM address shared bit
PR: Priority bit
DC: Dot color data
CC: Color calculation ratio bit
200
Sprite types are shown in Figure 9.1.
• Type 0
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PR1 PR0 CC2 CC1 CC0 DC10 DC9 DC8 DC7 DC6 DC5 DC4 DC3 DC2 DC1 DC0
• Type 1
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PR2 PR1 PR0 CC1 CC0 DC10 DC9 DC8 DC7 DC6 DC5 DC4 DC3 DC2 DC1 DC0
• Type 2
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SD PR0 CC2 CC1 CC0 DC10 DC9 DC8 DC7 DC6 DC5 DC4 DC3 DC2 DC1 DC0
• Type 3
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SD PR1 PR0 CC1 CC0 DC10 DC9 DC8 DC7 DC6 DC5 DC4 DC3 DC2 DC1 DC0
• Type 4
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SD PR1 PR0 CC2 CC1 CC0 DC9 DC8 DC7 DC6 DC5 DC4 DC3 DC2 DC1 DC0
• Type 5
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SD PR2 PR1 PR0 CC0 DC10 DC9 DC8 DC7 DC6 DC5 DC4 DC3 DC2 DC1 DC0
• Type 6
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SD PR2 PR1 PR0 CC1 CC0 DC9 DC8 DC7 DC6 DC5 DC4 DC3 DC2 DC1 DC0
• Type 7
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SD PR2 PR1 PR0 CC2 CC1 CC0 DC8 DC7 DC6 DC5 DC4 DC3 DC2 DC1 DC0
SD : For Shadow Bit (or for Sprite Window Bit)
PR : For Priority Bit
CC : For Color Calculation Ratio Bit
DC : Dot Color Data
Figure 9.1 Sprite types
ST-58-R2 201
• Type 8
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PR0 DC6 DC5 DC4 DC3 DC2 DC1 DC0
• Type 9
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PR0 CC0 DC5 DC4 DC3 DC2 DC1 DC0
• Type A
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PR1 PR0 DC5 DC4 DC3 DC2 DC1 DC0
• Type B
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CC1 CC0 DC5 DC4 DC3 DC2 DC1 DC0
• Type C
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SP0 DC6 DC5 DC4 DC3 DC2 DC1 DC0
• Type D
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SP0 SC0 DC5 DC4 DC3 DC2 DC1 DC0
• Type E
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SP1 SP0 DC5 DC4 DC3 DC2 DC1 DC0
• Type F
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SC1 SC0 DC5 DC4 DC3 DC2 DC1 DC0
SD : For Shadow Bit (or for Sprite Window Bit)
PR : For Priority Bit
CC : For Color Calculation Ratio Bit
DC : Dot Color Data
SP : For Priority Bit, Color RAM address shared bits
SC : For Color Calculation Ratio Bit, Color RAM address shared bits
Note: Shaded areas are ignored.
Figure 9.1 Sprite types (continued)
202
Sprite Color Mode
Sprite character data has a palette and RGB format, the same as the scroll screen.
When the bit count per one dot is 16 (bits), all 16-bits composed of bits selected by
the sprite type can be used when data inside the frame buffer is only the palette
format. However, when data of the palette and RGB formats are mixed (because the
most significant bit is used to discriminate the color format,) palette format data is
be set to 0 and RGB format set to “1”. Palette format data is then processed with the
value of the selected sprite type MSB (priority bit or shadow bit) as 0. Sprite data
when data of palette and RGB formats are mixed is shown in Figure 9.2.
Palette Bank Format
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 15 bits other than dot color data
RGB Code Format
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 5 Bit Blue Data 5 Bit Green Data 5 Bit Red Data
Figure 9.2 Sprite data when palette format and RGB format data are mixed
ST-58-R2 203
9.2 Priority and Color Calculation
The priority of sprite and scroll screen is selected according to the size of 3-bit value
called the priority number. Sprites can designate a maximum of eight priority num-
bers and can select one for each character according to the priority bit within sprite
data.
When using the color calculation function between the sprite and scroll screen, it can
be determined whether to perform color calculation by the value of priority number
selected by sprite character. Up to eight color calculation ratios can be selected; with
one of each character being selected by color calculation ratio in sprite data.
Priority Number Selection
Sprite priority number selects one from among eight priority numbers in each sprite
character by the priority bit of the selected sprite type. When the priority bit of the
selected sprite type is 2 bits or less, bits lower than 2 are read as 0, and a 3-bit with-
out a priority number bit are read as 0. When sprite data is in an RGB format, sprite
register 0 is selected. The priority number register selected through the value of the
priority bit is shown in Table 9.2.
Table 9.2 Selection of sprite priority number register
For Priority Bits Priority Number Register Selection
PR2 PR1 PR0
0 0 0 For Sprite Register 0 (1800F0H bit 2~0)
0 0 1 For Sprite Register 1 (1800F0H bit 10~8)
0 1 0 For Sprite Register 2 (1800F2H bit 2~0)
0 1 1 For Sprite Register 3 (1800F2H bit 10~8)
1 0 0 For Sprite Register 4 (1800F4H bit 2~0)
1 0 1 For Sprite Register 5 (1800F4H bit 10~8)
1 1 0 For Sprite Register 6 (1800F6H bit 2~0)
1 1 1 For Sprite Register 7 (1800F6H bit 10~8)
204
Color Calculation Enable Conditions
A sprite not only designates whether to do color calculation by the entire sprite, but
can also designate by the value of the priority number selected in each character and
the value of the most significant bit of color data selected in each dot. There are four
conditions that can be selected.
1. When (priority number) ≤ (color calculation condition number)
2. When (priority number) = (color calculation condition number)
3. When (priority number) ≥ (color calculation condition number)
4. When color data most significant bit is 1
The color calculation condition number is designated in the sprite control register by
the value of the priority number selected in each sprite character, and the 3-bit value
for comparing size. These conditions are in effect only when the SPCCEN bit of the
color calculation control register is 1; color calculation will not be done when the
register is 0.
ST-58-R2 205
Color Calculation Ratio Selection
The color calculation ratio of sprites select one of eight color calculation ratios in
each sprite character by the color calculation ratio bit of the designated sprite type
data. When two or less bits are used for color calculation ratio of the designated
sprite type, the low bit is read as 0. When there is no color calculation ratio bit, 8-bit
is also read as 0. When sprite data is in an RGB format, the sprite register 0 is se-
lected.
Selection of the color calculation ratio register through the value of the color calcula-
tion ratio bit is shown in Table 9.3.
Table 9.3 Selection of sprite color calculation ratio register
For Color Calculation Ratio Bits Color Calculation Ratio Register Selection
CC2 CC1 CC0
0 0 0 For Sprite Register 0 (180100H bit 4~0)
0 0 1 For Sprite Register 1 (180100H bit 12~8)
0 1 0 For Sprite Register 2 (180102H bit 4~0)
0 1 1 For Sprite Register 3 (180102H bit 12~8)
1 0 0 For Sprite Register 4 (180104H bit 4~0)
1 0 1 For Sprite Register 5 (180104H bit 12~8)
1 1 0 For Sprite Register 6 (180106H bit 4~0)
1 1 1 For Sprite Register 7 (180106H bit 12~8)
206
Sprite Control Register
The sprite control register controls sprite data, and is a write-only 16-bit register
located at address 1800E0H. Because the value is cleared to 0 after power on or
reset, it must be set.
15 14 13 12 11 10 9 8
SPCTL ~ ~ SPCCCS1 SPCCCS0 ~ SPCCN2 SPCCN1 SPCCN0
1800E0H 7 6 5 4 3 2 1 0
~ ~ SPCLMD SPWINEN SPTYPE3 SPTYPE2 SPTYPE1 SPTYPE0
Sprite color calculation condition bit (SPCCCS1, SPCCCS0), bits 13, 12
Designates the color calculation condition of sprites.
SPCCCS SPCCCS1 SPCCCS0 Condition
0 0 0 (Priority number) ≤ (Color calculation condition number) only
1 0 1 (Priority number) = (Color calculation condition number) only
2 1 0 (Priority number) ≥ (Color calculation condition number) only
3 1 1 Only when Color Data MSB is 1.
When the sprite color format is RGB, color calculation is always performed if
SPCCCS is set to “3”.
Sprite color calculation number bit (SPCCN2 to SPCCN0), bits 10 to 8
Designates the color calculation condition number of sprites.
This value is ignored when SPCCCS is set to “3”.
Sprite color mode bit (SPCLMD), bit 5
Designates the sprite color mode.
SPCLMD Sprite Color Format Data
0 Sprite data is all in palette format
1 Sprite data is in palette format and RGB format
Do not designate a “1” when sprite data are 8-bit pixels.
ST-58-R2 207
Sprite window enable bit (SPWINEN), bit 4
See “8.1 Window Area”
Sprite type bit (STYPE3 to STYPE0), bits 3 to 0
Designates the sprite type.
STYPE3 STYPE2 STYPE1 STYPE0 Sprite Data Type
0 0 0 0 Type 0
0 0 0 1 Type 1
0 0 1 0 Type 2
0 0 1 1 Type 3
0 1 0 0 Type 4
0 1 0 1 Type 5
0 1 1 0 Type 6
0 1 1 1 Type 7
1 0 0 0 Type 8
1 0 0 1 Type 9
1 0 1 0 Type A
1 0 1 1 Type B
1 1 0 0 Type C
1 1 0 1 Type D
1 1 1 0 Type E
1 1 1 1 Type F
When sprite data are 16-bit pixels, designate type 0 to 7; and when 8-bit pixels,
designate type 8 to F.
208
Priority Number Register
The priority number register designates the priority number, and is a write-only 16-
bit register located at addresses 1800F0H through 1800F6H. Because the value is
cleared to 0 after power on or reset, it must be set.
15 14 13 12 11 10 9 8
PRISA ~ ~ ~ ~ ~ S1PRIN2 S1PRIN1 S1PRIN0
1800F0H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ S0PRIN2 S0PRIN1 S0PRIN0
15 14 13 12 11 10 9 8
PRISB ~ ~ ~ ~ ~ S3PRIN2 S3PRIN1 S3PRIN0
1800F2H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ S2PRIN2 S2PRIN1 S2PRIN0
15 14 13 12 11 10 9 8
PRISC ~ ~ ~ ~ ~ S5PRIN2 S5PRIN1 S5PRIN0
1800F4H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ S4PRIN2 S4PRIN1 S4PRIN0
15 14 13 12 11 10 9 8
PRISD ~ ~ ~ ~ ~ S7PRIN2 S7PRIN1 S7PRIN0
1800F6H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ S6PRIN2 S6PRIN1 S6PRIN0
Sprite priority number bit (for sprite) (S0PRIN2 to S0PRIN0, S1PRIN2 to S1PRIN0, S2PRIN2 to
S2PRIN0, S3PRIN2 to S3PRIN0, S4PRIN2 to S4PRIN0, S5PRIN2 to S5PRIN0, S6PRIN2 to
S6PRIN0, S7PRIN2 to S7PRIN0)
Designates the sprite priority number.
S0PRIN2~S0PRIN0 1800F0H Bit 2~0 For Sprite Register 0
S1PRIN2~S1PRIN0 1800F0H Bit 10~8 For Sprite Register 1
S2PRIN2~S2PRIN0 1800F2H Bit 2~0 For Sprite Register 2
S3PRIN2~S3PRIN0 1800F2H Bit 10~8 For Sprite Register 3
S4PRIN2~S4PRIN0 1800F4H Bit 2~0 For Sprite Register 4
S5PRIN2~S5PRIN0 1800F4H Bit 10~8 For Sprite Register 5
S6PRIN2~S6PRIN0 1800F6H Bit 2~0 For Sprite Register 6
S7PRIN2~S7PRIN0 1800F6H Bit 10~8 For Sprite Register 7
ST-58-R2 209
Display priority order increases with the size of the priority number. Sprite charac-
ters that use the register set to a priority number value of 0 are treated as transparent
and are not displayed.
Color Calculation Ratio Registers
The color calculation ratio registers selects the color calculation ratio, and are write-
only 16-bit registers located at addresses 180100H through 180106H. Because they
are cleared to 0 after power on or reset, they must be set.
15 14 13 12 11 10 9 8
CCRSA ~ ~ ~ S1CCRT4 S1CCRT3 S1CCRT2 S1CCRT1 S1CCRT0
180100H 7 6 5 4 3 2 1 0
~ ~ ~ S0CCRT4 S0CCRT3 S0CCRT2 S0CCRT1 S0CCRT0
15 14 13 12 11 10 9 8
CCRSB ~ ~ ~ S3CCRT4 S3CCRT3 S3CCRT2 S3CCRT1 S3CCRT0
180102H 7 6 5 4 3 2 1 0
~ ~ ~ S2CCRT4 S2CCRT3 S2CCRT2 S2CCRT1 S2CCRT0
15 14 13 12 11 10 9 8
CCRSC ~ ~ ~ S5CCRT4 S5CCRT3 S5CCRT2 S5CCRT1 S5CCRT0
180104H 7 6 5 4 3 2 1 0
~ ~ ~ S4CCRT4 S4CCRT3 S4CCRT2 S4CCRT1 S4CCRT0
15 14 13 12 11 10 9 8
CCRSD ~ ~ ~ S7CCRT4 S7CCRT3 S7CCRT2 S7CCRT1 S7CCRT0
180106H 7 6 5 4 3 2 1 0
~ ~ ~ S6CCRT4 S6CCRT3 S6CCRT2 S6CCRT1 S6CCRT0
Sprite color calculation ratio bit (S0CCRT4 to S0CCRT0, S1CCRT4 to
S1CCRT0, S2CCRT4 to S2CCRT0, S3CCRT4 to S3CCRT0, S4CCRT4 to S4CCRT0, S5CCRT4 to
S5CCRT0, S6CCRT4 to S6CCRT0, S7CCRT4 to S7CCRT0)
Designates the sprite color calculation ratio. The color calculation ratio is for a value
1/32 of RGB various color data.
210
S0CCRT4~S0CCRT0 180100H Bit 4~0 For Sprite Register 0
S1CCRT4~S1CCRT0 180100H Bit 12~8 For Sprite Register 1
S2CCRT4~S2CCRT0 180102H Bit 4~0 For Sprite Register 2
S3CCRT4~S3CCRT0 180102H Bit 12~8 For Sprite Register 3
S4CCRT4~S4CCRT0 180104H Bit 4~0 For Sprite Register 4
S5CCRT4~S5CCRT0 180104H Bit 12~8 For Sprite Register 5
S6CCRT4~S6CCRT0 180106H Bit 4~0 For Sprite Register 6
S7CCRT4~S7CCRT0 180106H Bit 12~8 For Sprite Register 7
ST-58-R2 211
xxCCRT4 xxCCRT3 xxCCRT2 xxCCRT1 xxCCRT0 Color Calculation Ratio
Top Image : Second Image
0 0 0 0 0 31:1
0 0 0 0 1 30:2
0 0 0 1 0 29:3
0 0 0 1 1 28:4
0 0 1 0 0 27:5
0 0 1 0 1 26:6
0 0 1 1 0 25:7
0 0 1 1 1 24:8
0 1 0 0 0 23:9
0 1 0 0 1 22:10
0 1 0 1 0 21:11
0 1 0 1 1 20:12
0 1 1 0 0 19:13
0 1 1 0 1 18:14
0 1 1 1 0 17:15
0 1 1 1 1 16:16
1 0 0 0 0 15:17
1 0 0 0 1 14:18
1 0 0 1 0 13:19
1 0 0 1 1 12:20
1 0 1 0 0 11:21
1 0 1 0 1 10:22
1 0 1 1 0 9:23
1 0 1 1 1 8:24
1 1 0 0 0 7:25
1 1 0 0 1 6:26
1 1 0 1 0 5:27
1 1 0 1 1 4:28
1 1 1 0 0 3:29
1 1 1 0 1 2:30
1 1 1 1 0 1:31
1 1 1 1 1 0:32
Note: S0 to S7 are entered in bit name for xx.
This register is in effect only when the CCMD bit of the color calculation control
register is 0, and is ignored when “1”.
212
Chapter 10 Pixels
Introduction .................................................................... 214
10.1 Palette Format Pixels ........................................... 214
Sprite Dot Pixels ............................................... 214
Scroll Dot Pixels ................................................ 216
Color RAM Address Offset Register ................. 217
10.2 RGB Format Pixels .............................................. 218
Sprite Pixels ...................................................... 218
Scroll Pixels ...................................................... 218
10.3 Special Function Code ......................................... 220
Special Function Code Select Register ............ 221
Special Function Code Register ....................... 222
ST-58-R2 213
Introduction
When sprites and dot color data of each scroll screen are in a palette format, the
color RAM address offset register value added to the dot color data (configured from
the palette number and dot color code) becomes the color RAM address. Color data
of that address is output as color data. In the RGB format, dot color data composed
of individual red, green and blue values are pixels.
Scroll screen dot color data in a palette format designates whether to use special
priority and special color calculation functions according to the lowest 4-bit color
data.
10.1 Palette Format Pixels
Palette format pixels are 11 bits wide, and is the color RAM addresses that store pixel
data—the value of the color RAM address offset register of the corresponding screen
added to the highest 3-bits.
Sprite Dot Pixels
Palette format sprite pixels change according to the sprite type that has been desig-
nated. When pixels designate sprite types that are 10-bit or lower, missing high-
order bits are taken as 0, and the sprite color RAM address offset value is added to
the highest 3 bits and is treated as the color RAM address of that dot. When the
color RAM mode is set to mode 0 or mode 2, the highest bit of the color RAM ad-
dress will be ignored.
214
Palette format sprite pixels are shown in Figure 10.1. The sprite color RAM address
is shown in Figure 10.2.
•When Sprite Type 0~3, 5
Bit 10 9 8 7 6 5 4 3 2 1 0
11 Bit pixel
•When Sprite Type 4, 6
Bit 10 9 8 7 6 5 4 3 2 1 0
0 10 Bit pixel
•When Sprite Type 7
Bit 10 9 8 7 6 5 4 3 2 1 0
0 0 9 Bit pixel
•When Sprite Type C~F
Bit 10 9 8 7 6 5 4 3 2 1 0
0 0 0 8 Bit pixel
•When Sprite Type 8
Bit 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 7 Bit pixel
•When Sprite Type 9~B
Bit 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 6 Bit pixel
Figure 10.1 Palette format sprite dot color data
Sprite 11 Bit pixel
Dot Color Data
+
Offset Value
Color RAM Address
Offset Value for Sprite 3 Bit 0 0 0 0 0 0 0 0
Dot Color RAM 11 Bit Color RAM Address
Address
Note: When Color RAM is in mode 0 or mode 2, the MSB of the color
RAM address is ignored.
Figure 10.2 Sprite Color RAM Address
ST-58-R2 215
Scroll Dot Pixels
Scroll pixels in a palette format changes according to the designated character color
count. The color RAM address offset value corresponding to each surface is added
to the highest 3 bits of 11-bit dot color data, and is treated as the color RAM address
of that dot. When color RAM mode is set to mode 0 or mode 2, the highest bit of
color RAM address will be ignored.
Because the line color screen doesn’t have a corresponding color RAM address offset
value, the 11-bit value read from line color screen table becomes the color RAM
address. Palette format scroll dot color data is shown in Figure 10.3. The scroll
screen color RAM address is shown in Figure 10.4.
• When Character Color count is 16 Colors
Bit 10 9 8 7 6 5 4 3 2 1 0
7 Bit Palette Number 4 Bit Dot Color Code
• When Character Color count is 256 Colors
Bit 10 9 8 7 6 5 4 3 2 1 0
8 Bit Dot Color Code
3 Bit Palette No.
• When Character Color count is 2048 Colors
Bit 10 9 8 7 6 5 4 3 2 1 0
11 Bit Dot Color Code
Figure 10.3 Palette format scroll dot color data
Scroll 11 Bit Dot Color Data
Dot Color Data
+
Color RAM Address Offset Value
Offset Value For Each 3 Bit 0 0 0 0 0 0 0 0
Scroll
Dot Color RAM 11 Bit Color Ram Address
Address
Note: When the color RAM mode is 0 or 2, the color RAM address MSB is
ignored.
Figure 10.4 Scroll Color RAM Address
216
Color RAM Address Offset Register
The color RAM address offset register is a write only 16-bit register that designates
the sprite and color RAM address offset values corresponding to each scroll screen.
It is located at addresses 1800E4H through 1800E7. Because the value is cleared to 0
after power on or reset, you must set it.
15 14 13 12 11 10 9 8
CRAOFA ~ N3CAOS2 N3CAOS1 N3CAOS0 ~ N2CAOS2 N2CAOS1 N2CAOS0
1800E4H 7 6 5 4 3 2 1 0
~ N1CAOS2 N1CAOS1 N1CAOS0 ~ N0CAOS2 N0CAOS1 N0CAOS0
15 14 13 12 11 10 9 8
CRAOFB ~ ~ ~ ~ ~ ~ ~ ~
1800E6H 7 6 5 4 3 2 1 0
~ SPCAOS2 SPCAOS1 SPCAOS0 ~ R0CAOS2 R0CAOS1 R0CAOS0
Color RAM address offset bit (N0CAOS2 to N0CAOS0, N1CAOS2 to
N1CAOS0, N2CAOS2 to N2CAOS0, N3CAOS2 to N3CAOS0, R0CAOS2 to
R0CAOS0, SPCAOS2 to SPCAOS0)
Designates color RAM address offset values with respect to the sprite and each scroll
screen.
N0CAOS0~N0CAOS2 1800E4H Bit 2~0 For NBG0 (or RBG1)
N1CAOS0~N1CAOS2 1800E4H Bit 6~4 For NBG1 (or EXBG)
N2CAOS0~N2CAOS2 1800E4H Bit 10~8 For NBG2
N3CAOS0~N3CAOS3 1800E4H Bit 14~12 For NBG3
R0CAOS0~R0CAOS2 1800E6H Bit 2~0 For RBG0
SPCAOS0~SPCAOS2 1800E6H Bit 6~4 For Sprite
The actual color RAM address offset value is calculated by the expression below.
When the color RAM mode is set to mode 0 or mode 2, the highest bit of color RAM
address that calculated the color RAM address offset value will be ignored.
When color RAM mode is mode 0 or mode 2:
(color RAM address offset value [= offsetReg << 9] )
= (color RAM address offset register 3-bit value) X 200H
When color RAM mode is mode L:
(color RAM address offset value [= offsetReg << 10] )
= (color RAM address offset register 3-bit value) X 400H
ST-58-R2 217
10.2 RGB Format Pixels
RGB format dot color data is 15-bit in sprite and 15-bit or 24-bit data, depending on
character color count in scroll, and becomes dot color data without going through
color RAM. When dot color data is 15-bit, the lowest three bits of each individual is
fixed at 0 and used.
Sprite Pixels
RGB format sprite dot color data is RGB 5-bit data that outputs each of the lowest 3
bits fixed at 0. RGB format sprite dot color data is shown in Figure 10.5.
Bit 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Sprite 5 Bit Red Data
5 Bit Blue Data 5 Bit Green Data
Dot Color Data
Output Blue Data 5 Bit Blue Data 0 0 0
Output Green Data 5 Bit Green Data 0 0 0
Output Red Data 5 Bit Red Data 0 0 0
Figure 10.5 RGB format sprite dot color data
Scroll Pixels
RGB format scroll dot color data changes according to the character color count.
When 15-bit, the lowest three bits of each individual RGB is fixed at 0 and output.
The back screen is output by fixing the lower 3-bit of each RGB at 0, the same as
when the character color count of the scroll screen is 32,768 colors.
218
Scroll dot color data of the RGB format is shown in Figure 10.6.
• When Character Color Count is 32768 Colors
Bit 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Scroll
Sprite 5 Bit Blue Data 5 Bit Green Data 5 Bit Red Data
Dot Color Data
Output Blue Data 5 Bit Blue Data 0 0 0
Output Green Data 5 Bit Green Data 0 0 0
Output Red Data 5 Bit Red Data 0 0 0
• When Character Color Count is 16,770,000 Colors
Bit 23 22 21 20 19 18 17 16
Scroll 8 Bit Blue Data
Dot Color Data
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
8 Bit Green Data 8 Bit Red Data
Output Blue Data 8 Bit Blue Data
Output Green Data 8 Bit Green Data
Output Red Data 8 Bit Red Data
Figure 10.6 RGB Format Scroll Dot Color Data
ST-58-R2 219
10.3 Special Function Code
The special function, which performs in all scroll screens, has two functions: the
special priority function, and the special color calculation function. When used in
every dot, the dot color code that activates the special function can designate two
special function code registers. Also, each scroll screen designates which of the two
special function code registers will be used.
The special function code register has two 8-bit registers: special function code A,
and special function code B. Each bit corresponds to two dot color code lower 4-bit
values using the special function. The dot color code changes the bit number ac-
cording to the character color count of each scroll screen. However, each bit of the
special function code register will always correspond to the value of the lowest four
bits of the dot color code. Moreover, the special function code is used only when the
color format of scroll screen is the palette format.
See “11.2 Special Priority Function” and “12.2 Special Color Calculation Function”
for using the special function. Figure 10.7 shows the dot color code that corresponds
to special function code.
• When Character Color Count is 16 Colors
Bit 3 2 1 0
Corresponding 4 bits
• When Character Color Count is 256 Colors
Bit 7 6 5 4 3 2 1 0
Corresponding 4 bits
• When Character Color Count is 2048 Colors
Bit 10 9 8 7 6 5 4 3 2 1 0
Corresponding 4 bits
Figure 10.7 Dot Color Data Corresponding to Special Function Code
220
Special Function Code Select Register
The special function code select register is a write-only 16-bit register that designates
the special function code that activates all scroll screens. It is located at address
180024H. Because the value is cleared to 0 after power on or reset, it must be set.
15 14 13 12 11 10 9 8
SFSEL ~ ~ ~ ~ ~ ~ ~ ~
180024H 7 6 5 4 3 2 1 0
~ ~ ~ R0SFCS N3SFCS N2SFCS N1SFCS N0SFCS
Special function code select bit (N0SFCS, N1SFCS, N2SFCS, N3SFCS,
R0SFCS)
Designates the special function code effecting every scroll screen.
N0SFCS 180024H Bit 0 For NBG0 (or RBG1)
N1SFCS 180024H Bit 1 For NBG1
N2SFCS 180024H Bit 2 For NBG2
N3SFCS 180024H Bit 3 For NBG3
R0SFCS 180024H Bit 4 For RBG0
xxSFCS Process
0 Enables special function code A
1 Enables special function code B
Note: N0, N1, N2, N3, or R0 is entered in bit name for xx.
ST-58-R2 221
Special Function Code Register
The special function code register is a write-only 16-bit register that designates
special function code A and special function code B. It is located at address
180026H. Because the value is cleared to 0 after power on or reset, it must be set.
15 14 13 12 11 10 9 8
SFCODE SFCDB7 SFCDB6 SFCDB5 SFCDB4 SFCDB3 SFCDB2 SFCDB1 SFCDB0
180026H 7 6 5 4 3 2 1 0
SFCDA7 SFCDA6 SFCDA5 SFCDA4 SFCDA3 SFCDA2 SFCDA1 SFCDA0
Special function code bit (SFCDA7 to SFCDA0, SFCDB7 to SFCDB0)
Designates special function codes A and B.
SFCDA7~SFCDA0 180026H Bit 7~0 For Special Function Code A
SFCDB7~SFCDB0 180026H Bit 15~8 For Special Function Code B
Bit Name Dot Color Code
SFCDx0 When lower 4 bits of dot color code are, 0H or 1H
SFCDx1 When lower 4 bits of dot color code are, 2H or 3H
SFCDx2 When lower 4 bits of dot color code are, 4H or 5H
SFCDx3 When lower 4 bits of dot color code are, 6H or 7H
SFCDx4 When lower 4 bits of dot color code are, 8H or 9H
SFCDx5 When lower 4 bits of dot color code are, AH or BH
SFCDx6 When lower 4 bits of dot color code are, CH or DH
SFCDx7 When lower 4 bits of dot color code are, EH or FH
Note: A or B is entered in bit name x.
Settings Process
0 Does not use special functions
1 Uses special functions
The special function code is used when mode 2 is designated in the special priority
mode registers or when designating mode 2 in the special color calculation mode
register. For more information see “11.2 Special Priority Function” or “12.2 Special
Color Calculation Function.”
222
Chapter 11 Priority Function
Introduction ....................................................................224
11.1 Priority Function ................................................... 224
Priority Number ................................................. 224
Priority Number Register .................................. 225
11.2 Special Priority Function ...................................... 227
Special Priority Mode Register ......................... 229
11.3 Insertion of Line Color Screen ............................. 230
Line Color Screen Enable Register .................. 231
ST-58-R2 223
Introduction
VDP2 compares the priority number values of sprites and scroll screens and decides
the display priority order from the top three. The priority number of a sprite then
selects each character from a maximum of eight values. The priority number of all
scroll screens can also change the value of each dot and character by using the spe-
cial priority function.
The line color screen can be inserted into the number two position, one below the
screen, when the designated screen is at the highest priority.
11.1 Priority Function
The priority (display priority order) of sprites and scroll screens compares sizes of
the values of the screen priority number without transparent dots positioned in the
same TV screen coordinates for each dot. The screen priority increases as the value
of the priority number increases. The top image is made of the highest priority dots;
the second image is made of the second highest dots; and the third image is made of
the third highest dots. All sprite and scroll screen dots display the back screen in the
transparent position. Figure 11.1 shows the priority function.
Priority Priority Priority Priority
Number= 6 Number= 4 Number= 2 Number= 1
Transparent Transparent
Transparent
Back Screen Back Screen
Top Image Second Image Third Image
Figure 11.1 Priority Function
Priority Number
The scroll screen has one 3-bit priority number register in each screen. This priority
number normally is used in the entire surface, but can change the value of the least
significant bit in each dot and character according to the special priority mode. The
sprite priority number can select one of eight 3-bit priority number registers for each
character. For information about selecting a sprite priority number register see
“Priority Number Selection” in section “9.2 Priority and Color Calculation.”
224
Screen priority increases when the value of the priority number increases. When
priority numbers are equal, they follow the order shown in Table 11.1. When the
value of a priority number is OH, it is read as transparent.
Table 11.1 Priority when the priority numbers are equal
Priority Normal When inputting When displaying 2 When inputting external
external image data screens of the rotation images per 2 screens of
scroll screen the rotation scroll screen
Highest Sprite Sprite Sprite Sprite
: RBG0 RBG0 RBG0 RBG0
: NBG0 NBG0 RBG1 RBG1
: NBG1 EXBG - EXBG
: NBG2 NBG2 - -
Lowest NBG3 NBG3 - -
Priority Number Register
The priority number register designates the priority number. This is a write-only 16-
bit register located at addresses 1800F8H to 1800FCH. Because the value is cleared
to 0 after power on or reset, it must be set.
15 14 13 12 11 10 9 8
PRINA ~ ~ ~ ~ ~ N1PRIN2 N1PRIN1 N1PRIN0
1800F8H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N0PRIN2 N0PRIN1 N0PRIN0
15 14 13 12 11 10 9 8
PRINB ~ ~ ~ ~ ~ N3PRIN2 N3PRIN1 N3PRIN0
1800FAH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N2PRIN2 N2PRIN1 N2PRIN0
15 14 13 12 11 10 9 8
PRIR ~ ~ ~ ~ ~ ~ ~ ~
1800FCH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ R0PRIN2 R0PRIN1 R0PRIN0
ST-58-R2 225
Priority number bit (for scroll screen) (N0PRIN2 to N0PRIN0, N1PRIN2 to
N1PRIN0, N2PRIN2 to N2PRIN0, N3PRIN2 to N3PRIN0, R0PRIN2 to R0PRIN0)
Designates the priority number of each screen scroll.
N0PRIN2~N0PRIN0 1800F8H Bit 2~0 For NBG0 (or RBG1)
N1PRIN2~N1PRIN0 1800F8H Bit 10~8 For NBG1 (or EXBG)
N2PRIN2~N2PRIN0 1800FAH Bit 2~0 For NBG2
N3PRIN2~N3PRIN0 1800FAH Bit 10~8 For NBG3
R0PRIN2~R0PRIN0 1800FCH Bit 2~0 For RBG0
Larger priority numbers are given a higher display priority order. When the value
of the priority number is 0, it is treated as transparent and not displayed. For more
about priority number register of sprites, see “Priority Number Register” of “9.2
Priority and Color Calculation.”
226
11.2 Special Priority Function
The special priority function changes the least significant bit of the 3-bit priority
number corresponding to every scroll screen in each character and dot. Using this
function to change the priority of a portion of the scroll screen displays one surface
as multiple screens. Furthermore, the least significant bit of the priority number
changes only by the special priority function; the highest 2 bits are used with the
register values. The special priority function has the following three modes.
1. Designates the least significant bit of the priority number in each screen
2. Designates the least significant bit of the priority number in each character
3. Designates the least significant bit of the priority number in each dot
When designating the least significant bit of the priority number in each screen, the
value of the priority number register in each scroll screen is used unchanged.
When designating each character, the value of a special priority bit within pattern
name data is used as the least significant bit of the priority number. For more infor-
mation about special priority bits, see “4.6 Pattern Name Table (Page).”
When designating each dot in character patterns designating 1 (the special priority
bit within pattern name data), only dots that coincide with the dot color code are
designated in the special function code. The least significant bit of the priority
number is set to 1, the rest are fixed at 0. Do not set this mode when the color format
of scroll screen is RGB. For more about the dot color code see “10.3 Special Function
Code.”
When the 3-bit priority number value obtained by the special priority function is
OH, that screen, character, or dots are treated as transparent. Table 11.2 shows the
special priority function by mode.
ST-58-R2 227
Table 11.2 Special priority function by mode
Special Priority Special Priority Color Format Priority Number LSB Value
Mode Selection
Mode 0 Selected per each Palette Format or RGB Priority number register LSB
screen Format value
Mode 1 Select per each Palette Format or RGB Value of the special priority bit
character Format in the pattern name data
Mode 2 Setting not allowed Palette Format When the special priority bit in
the pattern name data is equal
to one, only the dot coinciding
with the dot color code
selected for special function
code becomes 1, while the
rest become 0.
RGB Format Setting Invalid
When the display format designates mode 1 or 2 in the scroll screen of the bit map
format, it is not the special priority bit within the pattern name data, but the special
priority bit of the bit map palette number register that is used.
228
Special Priority Mode Register
The special priority mode register is a write-only 16-bit register that designates the
mode of the special priority function corresponding to each scroll screen, and is
located at address 1800EA. Because the value clears to 0 after power on or reset, it
must be set.
15 14 13 12 11 10 9 8
SFPRMD ~ ~ ~ ~ ~ ~ R0SPRM1 R0SPRM0
1800EAH 7 6 5 4 3 2 1 0
N3SPRM1 N3SPRM0 N2SPRM1 N2SPRM0 N1SPRM1 N1SPRM0 N0SPRM1 N0SPRM0
Special priority mode bit (N0SPRM1, N0SPRM0, N1SPRM1, N1SPRM0,
N2SPRM1, N2SPRM0, N3SPRM1, N3SPRM0, R0SPRM1, R0SPRM0)
Designates the special priority function mode of each screen scroll.
N0SPRM1, N0SPRM0 1800EAH Bit 1,0 For NBG0 (or RBG1)
N1SPRM1, N1SPRM0 1800EAH Bit 3,2 For NBG1 (or EXBG)
N2SPRM1, N2SPRM0 1800EAH Bit 5,4 For NBG2
N3SPRM1, N3SPRM0 1800EAH Bit 7,6 For NBG3
R0SPRM1, R0SPRM0 1800EAH Bit 9,8 For RBG0
xxSPRM1 xxSPRM0 Mode Process
0 0 Mode 0 Select the priority number LSB per each screen
0 1 Mode 1 Select the priority number LSB per each character
1 0 Mode 2 Select the priority number LSB per each dot
1 1 - Selection not allowed
Note: N0, N1, N2, N3, or R0 is entered in bit name for xx.
Do not set mode 2 when the scroll screen color format is the RGB mode.
Do not set in EXBG any other mode but 0.
Character or dot in which priority number is 0 is considered transparent.
ST-58-R2 229
11.3 Insertion of Line Color Screen
The line color screen does not have a priority number register; it forcefully inserts
the top image as the second image, and calculates color. Meanwhile, the original
second image becomes the new third image, and the old third image becomes the
fourth image. Figure 11.2 shows insertion of the line color screen.
Priority Priority Priority Priority
Number= 6 Number= 4 Number= 2 Number= 1
Transparent Transparent
Transparent
Screen that forces Screen that forces
the insertion of the insertion of line
line color screen color screen
Line Color Screen
Back Screen Back Screen Back Screen
Top Image Second Image Third Image Fourth Image
Figure 11.2 Line Color Screen Insertion
230
Line Color Screen Enable Register
The line color screen enable register designates whether to insert the line color
screen when each screen is a top image. This is a write-only 16-bit register located at
address 1800E8H. Because the value is cleared to 0 after power on or reset, you must
set it.
15 14 13 12 11 10 9 8
LNCLEN ~ ~ ~ ~ ~ ~ ~ ~
1800E8H 7 6 5 4 3 2 1 0
~ ~ SPLCEN R0LCEN N3LCEN N2LCEN N1LCEN N0LCEN
Line color enable bit (N0LCEN, N1LCEN, N2LCEN, N3LCEN, R0LCEN,
SPLCEN)
Designates whether to insert the line color screen when each screen is a top image.
N0LCEN 1800E8H Bit 0 For NBG0 (or RBG1)
N1LCEN 1800E8H Bit 1 For NBG1 (or EXBG)
N2LCEN 1800E8H Bit 2 For NBG2
N3LCEN 1800E8H Bit 3 For NBG3
R0LCEN 1800E8H Bit 4 For RBG0
SPLCEN 1800E8H Bit 5 For Sprite
xxLCEN Process
0 Does not insert the line color screen when
corresponding screen is top image
1 Inserts the line color screen when corresponding
screen is top image
Note: N0, N1, N2, N3, R0, or SP is entered in the bit name for xx.
A line color screen is inserted only in the second image section of the screen desig-
nated for insertion, thus becoming the top image. Sprites can only be designated in
their entirety. To designate each character, they must be controlled by their color
calculation ratio value. This register cannot be used at the same time as the grada-
tion calculation function.
ST-58-R2 231
(This is page was blank in the original Japanese document)
232
Chapter 12 Color Calculations
Introduction ....................................................................234
12.1 Color Calculation Function................................... 234
Normal Color Calculation .................................. 234
Extended Color Calculation Function ............... 236
12.2 Gradation Calculation Function ........................... 238
Color Calculation Control Register ................... 240
Color Calculation Ratio Register....................... 243
12.3 Special Color Calculation Function ...................... 245
Special Color Calculation Mode Register ......... 247
ST-58-R2 233
Introduction
VDP2 calculates, by a designated ratio, color data of second and top images obtained
comparing priorities of sprite and each scroll screen. The sprite and color calcula-
tion ratio can select each character from one of eight values. The color calculation
enable of every scroll screen can designate each character and dot by using the
special color calculation function.
With the second and third images at a fixed ratio, the colors of up to four screens can
be calculated by doing color calculations in the second image. In addition, distant
backgrounds can be shaded causing the gradation calculation function to be en-
abled.
12.1 Color Calculation Function
The color calculation function calculates with a ratio designating the top and second
images (or three images, the second image, third image, forth image, images calcu-
lated at a set ratio) by individual RGB color, and is able to produce an effect of over-
lapping a group of semi-transparent screens. The color calculation function is
shown in Figure 12.1.
Priority Number = 4 Priority Number = 2
Transparent Transparent
Back
Screen
F igure 12.1 Color calculation function
Normal Color Calculation
There are two types of modes when calculating color by the top and second images:
1. Top and second images add according to the value of the color calculation ratio.
2. Top and second images add by the value unchanged.
234
The value of the color calculation ratio of each screen is designated in the register
when using the color calculation mode to add in proportion to the value of color
calculation ratio. The color calculation ratio of the sprite can designate one register
from a maximum of eight for each character; the scroll screen color calculation ratio
designates to the register of each screen. For more about sprite color calculation
ratio see “Color Calculation Ratio Register” in “9.2 Priority and Color Calculation.”
The color calculation ratio of each screen is designated by 5 bits, and a total of 32
steps: top image : second image = 31 : 1 to 0 : 32 can be selected. There are two kinds
of modes for designating the value of that ratio.
1. Designates by the top image
2. Designates by the second image
When designating with the top image, the sprite that becomes the top image or the
color calculation ratio value of the scroll screen is used without any relation to the
second image screen. When designating with the second image, the color calcula-
tion ratio can be changed by the screen of the second image. The sprite, scroll screen
values, line color screen, and back screen color calculation ratio values can be used.
When using the color calculation mode to add by the value, gradually rewrite from
the top image color data from 00H to the original color to create a fade-in effect of
the top image over the second image. Be aware that doing so may result in color
that is concurrent with fade-in becoming brighter than the original. Addition results
that exceed FFH are treated as FFH. Figure 12.2 shows the color calculation ratio
mode.
ST-58-R2 235
Priority Number = 6 Priority Number = 4 Priority Number = 2
Screen B Transparent
Back Screen
Screen
C
Screen A Transparent
Color Calculation Ratio Color Calculation Ratio Color Calculation Ratio Color Calculation Ratio
16:16 20:12 24:8 28:4
When selecting the top screen image When selecting the second screen image
Screen B Back Screen B Back
Screen Screen
Screen C Screen C
Screen A : Screen B =16 : 16 Screen A : Screen B = 20 : 12
Screen A : Screen C =16 : 16 Screen A : Screen C = 24 : 8
Screen A : Back =16 : 16 Screen A : Back = 28 : 4
Figure 12.2 Color calculation ratio mode
There is no limitation in calculating color when the TV screen mode is the Normal
mode. But when the TV screen mode is the high resolution mode or Exclusive moni-
tor mode, the color RAM mode and second image color format hav limitations.
Table 12.1 shows limitations of the color calculation function.
Table 12.1 Color calculation function when in the high resolution mode or special monitor mode
Color RAM Mode Second Image Color Format Color Calculation Function
Mode 0 Palette format or RGB format Can be used
Mode 1 Palette format Cannot be used
RGB format Can be used
Mode 2 Palette format Cannot be used
RGB format Can be used
Extended Color Calculation Function
The extended color calculation function makes second image data of the result of the
second and third images calculated by a fixed ratio. Calculating the color of the
second and top images makes possible three screen color calculation. Inserting a
line color screen creates third image data resulting from color calculation of the third
and fourth images calculated by a fixed ratio, and makes second image data by
adding the third image and line color data calculated by a fixed ratio. Therefore, four
screen color calculation is possible. The extended color calculation function can be
used only when in the TV screen mode is the Normal mode.
236
When performing extended color calculation, whether to add the third and fourth
images complies with the screen color calculation enable bit of the third image
screen, and whether to add the second and third images complies with the color
calculation enable bit of the second image screen.
When the extended color calculation function is used, the extended color calculation
ratio changes according to the color RAM mode, the line color screen insertion, the
color calculation enable bit value of second and third images and color format, and
the color format of the fourth image.
Figure 12.3 shows the extended color calculation function; Table 12.2 shows the
extended color calculation ratios.
Normal Case When inserting line color screen
When second When second When line color When line color
image screen image screen calculation calculation
color calculation color calculation enable bit =1, enable bit =1,
enable bit =0 enable bit =1 third image third image
screen color screen color
calculation calculation
enable bit =0 enable bit =1
Second image Second image Second image Second image
after expanded after expanded after expanded after expanded
color color color color
calculation calculation calculation calculation
Line Color Line Color
Second image Second Image Screen Screen
+ + +
Third image Third image Third image
+
Fourth Image
Figure 12.3 Extended Color Calculation Function
ST-58-R2 237
Table 12.2 Extended Color Calculation Ratio
Color Line Color Color Format Color Calculation Extended Color
RAM Screen Enable Bit Value Calculation Ratio
Mode
2nd Image 3rd Image 4th Image 2nd Image 3rd Image 2nd:3rd:4th (Image)
Does not Palette or Palette or - 0 - 4:0:0
Mode Insert RGB format RGB format 1 - 2:2:0
0 Palette Palette 0 0 or 1 4:0:0
Inserts - or RGB or RGB 1 0 2:2:0
format format 1 1 2:1:0
Does not Palette Palette - 0 or 1 - 4:0:0
Insert or RGB format
format RGB - 0 - 4:0:0
Mode format 1 - 2:2:0
1 Palette Palette or 0 or 1 0 or 1 4:0:0
or format RGB format
Mode Palette 0 0 or 1 4:0:0
2 Inserts - RGB format 1 0 or 1 2:2:0
format RGB 0 0 or 1 4:0:0
format 1 0 2:2:0
1 1 2:1:1
Note: The extended color calculation function cannot be used when the TV screen mode in is the
high-resolution or Exclusive monitor mode. When inserting the line color screen, the color
format of the second image becomes the palette format. The extended color calculation ratio
is for a value that is 1/4 times the individual RGB data.
12.2 Gradation Calculation Function
The gradation calculation function calculates the horizontal color data of the desig-
nated one screen by a fixed ratio, and can create a gradation effect of the distant
background. This function can only be used when the TV screen mode is the Nor-
mal mode, and the color RAM mode is mode 0. Gradation Calculation adds color
data of a designated screen for values 1/4 times that of individual RGB by the ratio
below.
(2 dots left display coordinates : (1 dot left display coordinates : (display coordinates = 1:1:2
color data) color data) color data)
Here, the added results of the area in which the designated screen becomes the top
or second images is forced to be the second image. By calculating color of the sec-
ond and top images, it is possible to display pictures in which gradation calculations
have been done. The second image of the area, in which the gradation calculation
designated screen is not a top or second image, becomes the image determined by
normal priority.
238
Screens using gradation calculation have no transparent dots. If gradation calcula-
tion is performed for screens having transparent dots, correct calculation cannot be
done by that boundary. If the gradation calculation function is used, yit is not pos-
sible to insert the line color screen. In addition, the extended color calculation func-
tion can no longer be used. Figure 12.4 shows the gradation calculation function.
Priority number = 6 Priority number = 4 Priority number = 2
transparent transparent
Screen A Screen B Screen C
Screen designated to be shaded
Top Image Second Image
Screen C Back Screen
ScreenB ScreenC
Screen A Screen B
The area in screen C that
is the top image or second
image is forced to switch to
shaded screen C
Second Image
Shaded
Screen C
Screen B
Color Operation
Color Function used in Screen C
Display Image
Shaded
Screen C
ScreenB
Screen A
Figure 12.4 Gradation Calculation Function
ST-58-R2 239
Color Calculation Control Register
The color calculation control register is a write-only 16-bit register that controls color
calculation, and is located at address 1800ECH. Because the value is cleared to 0
after power on or reset, the value must be set.
15 14 13 12 11 10 9 8
1800ECH BOKEN BOKN2 BOKN1 BOKN0 ~ EXCCEN CCRTMD CCMD
7 6 5 4 3 2 1 0
~ SPCCEN LCCCEN R0CCEN N3CCEN N2CCEN N1CCEN N0CCEN
Gradation enable bit (BOKEN), bit 15
Determines whether to use the gradation function.
BOKEN Process
0 Do not use gradation calculation function
1 Use gradation calculation function
If this bit is 1, the extended color calculation function can no longer be used.
The gradation calculation function can only be used when the TV screen mode is the
Normal mode, and the color RAM mode is mode 0.
Gradation screen number bit: Gradation number bit (BOKN2 to BOKN0), bits 14 to 12
Designates the screen using the gradation (shading) calculation function.
BOKN2 BOKN1 BOKN0 Screen Using Gradation Calculation Function
0 0 0 Sprite
0 0 1 RBG0
0 1 0 NBG0 or RBG1
0 1 1 Invalid
1 0 0 NBG1 or EXBG
1 0 1 NBG2
1 1 0 NBG3
1 1 1 Invalid
Extended color calculation enable bit (EXCCEN), bit 10
Determines whether to use the extended color calculation function.
240
EXCCEN Process
0 Do not use extended color calculation
1 Use extended color calculation
The above calculation function cannot be used at the same time as the gradation
calculation function. When the BOKEN bit is 1, this bit is ignored. The extended
color calculation function can only be used when in the TV screen and Normal
modes, and cannot be used when in the high-resolution mode or Exclusive monitor
mode.
Color calculation ratio mode bit (CCRTMD), bit 9
Designates the color calculation ratio mode.
CCRTMD Mode Process
0 0 For color calculation ratio, select per top screen side
1 1 For color calculation ratio, select per second screen side
The top image always designates whether to perform normal color calculation.
Color calculation mode bit (CCMD), bit 8
Designates the color calculation mode.
CCMD Mode Process
0 0 Add according to the color calculation register value
1 1 Add as is
When in mode 1, the values of the color calculation ratio registers of each screen are
ignored.
ST-58-R2 241
Color calculation enable bit (N0CCEN, N1CCEN, N2CCEN, N3CCEN,
R0CCEN, LCCCEN, SPCCEN)
Designates whether to perform color calculation (color calculation enable)
N0CCEN 1800ECH Bit 0 For NBG0 (or RBG1)
N1CCEN 1800ECH Bit 1 For NBG1 (or EXBG)
N2CCEN 1800ECH Bit 2 For NBG2
N3CCEN 1800ECH Bit 3 For NBG3
R0CCEN 1800ECH Bit 4 For RBG0
LCCCEN 1800ECH Bit 5 For LNCL
SPCCEN 1800ECH Bit 6 For Sprite
xxCCEN Process
0 Does not color-calculate
1 Color-calculates
Note: N0, N1, N2, N3, R0, LC, or SP is entered in bit name for xx.
When calculating color between the top and second images, calculation is controlled
by the color calculation enable bit of the top image. When using the extended color
calculation function, control between the second and third images is done by the
color calculation enable bit of the second image, and control between the third and
fourth images is done by the color calculation enable bit of the third image.
242
Color Calculation Ratio Register
The color calculation ratio register is a write-only 16-bit register that designates the
color calculation ratio, and is located at addresses 180108H to 18010EH. Because the
value is cleared to 0 after power on or reset, the value must be set.
15 14 13 12 11 10 9 8
CCRNA ~ ~ ~ N1CCRT4 N1CCRT3 N1CCRT2 N1CCRT1 N1CCRT0
180108H 7 6 5 4 3 2 1 0
~ ~ ~ N0CCRT4 N0CCRT3 N0CCRT2 N0CCRT1 N0CCRT0
15 14 13 12 11 10 9 8
CCRNB ~ ~ ~ N3CCRT4 N3CCRT3 N3CCRT2 N3CCRT1 N3CCRT0
18010AH 7 6 5 4 3 2 1 0
~ ~ ~ N2CCRT4 N2CCRT3 N2CCRT2 N2CCRT1 N2CCRT0
15 14 13 12 11 10 9 8
CCRR ~ ~ ~ ~ ~ ~ ~ ~
18010CH 7 6 5 4 3 2 1 0
~ ~ ~ R0CCRT4 R0CCRT3 R0CCRT2 R0CCRT1 R0CCRT0
15 14 13 12 11 10 9 8
CCRLB ~ ~ ~ BKCCRT4 BKCCRT3 BKCCRT2 BKCCRT1 BKCCRT0
18010EH 7 6 5 4 3 2 1 0
~ ~ ~ LCCCRT4 LCCCRT3 LCCCRT2 LCCCRT1 LCCCRT0
Color calculation ratio bit (for scroll screens): (N0CCRT4 to N0CCRT0,
N1CCRT4 to N1CCRT0, N2CCRT4 to N2CCRT0, N3CCRT4 to N3CCRT0, R0CCRT4 to R0CCRT0,
LCCCRT4 to LCCCRT0, BKCCRT4 to BKCCRT0)
Designates the color calculation ratio of each scroll screen. The color calculation
ratio corresponds to a value 1/32 times R,G,B color data.
N0CCRT4~NOCCRT0 180108H Bit 4~0 For NBG0 (or RBG1)
N1CCRT4~N1CCRT0 180108H Bit 12~8 For NBG1 (or EXBG)
N2CCRT4~N2CCRT0 18010AH Bit 4~0 For NBG2
N3CCRT4~N3CCRT0 18010AH Bit 12~8 For NBG3
R0CCRT4~R0CCRT0 18010CH Bit 4~0 For RBG0
LCCCRT4~LCCCRT0 18010EH Bit 4~0 For LNCL
BKCCRT4~BKCCRT0 18010EH Bit 12~8 For Back
ST-58-R2 243
xxCCRT4 xxCCRT3 xxCCRT2 xxCCRT1 xxCCRT0 Color Calculation Ratio
Top Image : Second Image
0 0 0 0 0 31:1
0 0 0 0 1 30:2
0 0 0 1 0 29:3
0 0 0 1 1 28:4
0 0 1 0 0 27:5
0 0 1 0 1 26:6
0 0 1 1 0 25:7
0 0 1 1 1 24:8
0 1 0 0 0 23:9
0 1 0 0 1 22:10
0 1 0 1 0 21:11
0 1 0 1 1 20:12
0 1 1 0 0 19:13
0 1 1 0 1 18:14
0 1 1 1 0 17:15
0 1 1 1 1 16:16
1 0 0 0 0 15:17
1 0 0 0 1 14:18
1 0 0 1 0 13:19
1 0 0 1 1 12:20
1 0 1 0 0 11:21
1 0 1 0 1 10:22
1 0 1 1 0 9:23
1 0 1 1 1 8:24
1 1 0 0 0 7:25
1 1 0 0 1 6:26
1 1 0 1 0 5:27
1 1 0 1 1 4:28
1 1 1 0 0 3:29
1 1 1 0 1 2:30
1 1 1 1 0 1:31
1 1 1 1 1 0:32
Note: N0, N1, N2, N3, R0, LC, or BK is entered in bit name for xx.
For more about the color calculation ratio register of sprites see “Color Calculation
Ratio Register” in “9.2 Priority and Color Calculation.”
244
12.3 Special Color Calculation Function
The special color calculation function designates the color calculation enable not
only by the entire screen but by character units and dot units. See the four modes
below.
1. Color calculation enable designates each screen.
2. Color calculation enable designates each character.
3. Color calculation enable designates each dot.
4. Color calculation enable designates by the most significant bit of color data.
When designating color calculation enable for each screen, color calculation is per-
formed when the color calculation enable bit value in the color calculation control
register that corresponds to each scroll screen is 1.
When designating each character in a scroll screen that the color calculation enable
bit has designated 1, color calculation is performed only in character patterns of a
special color calculation bit value of 1 in pattern name data. For more about the
special color calculation bit in pattern name data see “4.6 Pattern Name Table.”
When designating each dot, color calculation is performed only in dots that agree
with the dot color code designated in the special function code, and in the character
pattern designated 1 in which the value of the special color calculation bit within the
pattern name data of the scroll screen has a color calculation enable bit of 1. Do not
set this mode when the color format of the scroll screen is the RGB format. For more
about the special function code see “10.3 Special Function Code.”
When designating with the most significant bit of color data, color calculation is
performed only in dots that used color data when the most significant bit is set at 1,
and when the scroll screen where the color calculation enable bit is designated 1 is in
a palette format. Color calculation will always be performed if this mode is desig-
nated when the scroll screen, where the color calculation enable bit is designated 1,
is in the RGB format.
When mode 1 or 2 is designated in a bit map format scroll screen, the special color
calculation bit of the bit map number register is used, not the special color calcula-
tion bit within pattern name data. Table 12.3 shows the special color calculation
mode.
ST-58-R2 245
Table 12.3 Special Color Calculation Mode
Special Color Special Color Color Format Color Calculation Enable
Calculation Mode Calculation Selection Condition
Mode 0 Select per screen Palette format or RGB Color calculation enable bit =1
format
Mode 1 Select per character Palette format or RGB Color calculation bit = 1 and
format pattern name data special
color calculation bit = 1
Mode 2 Select per dot Palette format Color calculation bit = 1 and
pattern name data special
color calculation bit = 1 and
The dot that matches dot color
code selected per special
function code
RGB format Invalid
Mode 3 Select with color data Palette format Color calculation bit = 1 and
MSB The dot using color data
where MSB = 1
RGB format Color calculation enable bit =1
The special color calculation mode can designate only for top images. Otherwise, it
is fixed at 0.
246
Special Color Calculation Mode Register
The special color calculation mode register is a write-only 16-bit register that desig-
nates the special color calculation function mode for each scroll screen, and is lo-
cated at address 1800EEH. Because the value is cleared to 0 after power on or reset,
you must set the value.
15 14 13 12 11 10 9 8
SFCCMD ~ ~ ~ ~ ~ ~ R0SCCM1 R0SCCM0
1800EEH 7 6 5 4 3 2 1 0
N3SCCM1 N3SCCM0 N2SCCM1 N2SCCM0 N1SCCM1 N1SCCM0 N0SCCM1 N0SCCM0
Special color calculation mode bit (N0SCCM1, N0SCCM0, N1SCCM1,
N1SCCM0, N2SCCM1, N2SCCM0, N3SCCM1, N3SCCM0, R0SCCM1, R0SCCM0)
Designates the special color calculation function mode of each scroll screen.
N0SCCM1, N0SCCM0 1800EEH Bit 1,0 For NBG0 (or RBG1)
N1SCCM1, N1SCCM0 1800EEH Bit 3,2 For NBG1 (or EXBG)
N2SCCM1, N2SCCM0 1800EEH Bit 5,4 For NBG2
N3SCCM1, N3SCCM0 1800EEH Bit 7,6 For NBG3
R0SCCM1, R0SCCM0 1800EEH Bit 9,8 For RBG0
xxSCCM1 xxSCCM0 Mode Process
0 0 0 Select color calculation enable per screen
0 1 1 Select color calculation enable per character
1 0 2 Select color calculation enable per dot
1 1 3 Select color calculation enable with color data MSB
Note: N0, N1, N2, N3, or R0 is entered in bit name for xx.
Special color calculation mode designation is effective only when each screen is a top
image. Otherwise, the mode must be set at 0. When the color format of scroll screen
is the RGB format, do not fixed at mode 2. Color is calculated by all dots when
mode 3 has been designated. Finally, do not designate modes 1 and 2 in EXBG.
ST-58-R2 247
(This page was blank in the original Japanese document)
248
Chapter 13 Color Offset Function
Introduction ....................................................................250
13.1 Color Offset Selection .......................................... 250
Color Offset Enable Register ............................ 251
Color Offset Select Register ............................. 252
Color Offset Register ........................................ 253
ST-58-R2 249
Introduction
The color offset function causes a change in the screen color without changing color
RAM data by adding the offset value when sprite and data of each screen are output.
Can also be used for fade-in and fade-out.
13.1 Color Offset Selection
The color offset value can set two values, color offset A and color offset B in each
RGB, and can designate which of the two values to use for each screen. The color
offset value is 9-bit data corresponding to individual RGB. When resulting color
data added to individual RGB is smaller than 00H, the data is treated as 00H; when
larger than FFH, the data is treated as FFH.
Because the color offset function process follows the color calculation function pro-
cess, the color offset value is added to the color data resulting from color calcula-
tions. In addition, because the result screen of color calculation is treated as the top
image screen, designation of the color offset enable register is done with the screen
bit of that top image. Figure 13.1 shows the color offset data.
Bit 7 6 5 4 3 2 1 0
8 Bit Color Data
+
Bit 8 7 6 5 4 3 2 1 0
Color Offset A
Sign 8 Bit Color Offset Data
Color Offset B
Select per screen
Bit 7 6 5 4 3 2 1 0
8 Bit Output Color Data
Figure 13.1 Color Offset Data
250
Color Offset Enable Register
The color offset enable register is a write-only 16-bit register that designates whether
to use the color offset function for each screen, and is located at address 180110H.
Because the value is cleared to 0 after power on or reset, it must be set.
15 14 13 12 11 10 9 8
CLOFEN ~ ~ ~ ~ ~ ~ ~ ~
180110H 7 6 5 4 3 2 1 0
~ SPCOEN BKCOEN R0COEN N3COEN N2COEN N1COEN N0COEN
Color offset enable bit (N0COEN, N1COEN, N2COEN, N3COEN, R0COEN,
BKCOEN, SPCOEN)
Designates whether to use the color offset function.
N0COEN 180110H Bit 0 For NBG0 (or RBG1)
N1COEN 180110H Bit 1 For NBG1 (or EXBG)
N2COEN 180110H Bit 2 For NBG2
N3COEN 180110H Bit 3 For NBG3
R0COEN 180110H Bit 4 For RBG0
BKCOEN 180110H Bit 5 For Back
SPCOEN 180110H Bit 6 For Sprite
xxCOEN Process
0 Do not use color offset function
1 Use color offset function
Note: N0, N1, N2, N3, R0, BK, or SP is entered in bit name for xx.
Using the color calculation function designates the color offset enable bit of the top
image screen.
ST-58-R2 251
Color Offset Select Register
The color offset select register designates the color offset register used for each
screen. This is a write-only 16-bit register located at address 180112H. Because the
value is cleared to 0 after power on or reset, it must be set.
15 14 13 12 11 10 9 8
CLOFSL ~ ~ ~ ~ ~ ~ ~ ~
180112H 7 6 5 4 3 2 1 0
~ SPCOSL BKCOSL R0COSL N3COSL N2COSL N1COSL N0COSL
Color offset select bit (N0COSL, N1COSL, N2COSL, N3COSL, R0COSL,
BKCOSL, SPCOSL)
Designates the color offset register to use when using the color offset function.
N0COSL 180112H Bit 0 For NBG0 (or RBG1)
N1COSL 180112H Bit 1 For NBG1 (or EXBG)
N2COSL 180112H Bit 2 For NBG2
N3COSL 180112H Bit 3 For NBG3
R0COSL 180112H Bit 4 For RBG0
BKCOSL 180112H Bit 5 For Back
SPCOSL 180112H Bit 6 For Sprite
xxCOSL Process
0 Use color offset A value
1 Use color offset B value
Note: N0, N1, N2, N3, R0, BK, or SP is entered in bit name for xx.
When using the color calculation function, designates with the color offset select bit
of the top image screen.
252
Color Offset Register
The color offset register is a write-only 16-bit register that designates RGB individual
values of the color offset value, and is located at addresses 180114H to 18011EH.
Because the value is cleared to 0 after power on or reset, it must be set.
15 14 13 12 11 10 9 8
COAR ~ ~ ~ ~ ~ ~ ~ COARD8
180114H 7 6 5 4 3 2 1 0
COARD7 COARD6 COARD5 COARD4 COARD3 COARD2 COARD1 COARD0
15 14 13 12 11 10 9 8
COAG ~ ~ ~ ~ ~ ~ ~ COAGR8
180116H 7 6 5 4 3 2 1 0
COAGR7 COAGR6 COAGR5 COAGR4 COAGR3 COAGR2 COAGR1 COAGR0
15 14 13 12 11 10 9 8
COAB ~ ~ ~ ~ ~ ~ ~ COABL8
180118H 7 6 5 4 3 2 1 0
COABL7 COABL6 COABL5 COABL4 COABL3 COABL2 COABL1 COABL0
15 14 13 12 11 10 9 8
COBR ~ ~ ~ ~ ~ ~ ~ COBRD8
18011AH 7 6 5 4 3 2 1 0
COBRD7 COBRD6 COBRD5 COBRD4 COBRD3 COBRD2 COBRD1 COBRD0
15 14 13 12 11 10 9 8
COBG ~ ~ ~ ~ ~ ~ ~ COBGR8
18011CH 7 6 5 4 3 2 1 0
COBGR7 COBGR6 COBGR5 COBGR4 COBGR3 COBGR2 COBGR1 COBGR0
15 14 13 12 11 10 9 8
COBB ~ ~ ~ ~ ~ ~ ~ COBBL8
18011EH 7 6 5 4 3 2 1 0
COBBL7 COBBL6 COBBL5 COBBL4 COBBL3 COBBL2 COBBL1 COBBL0
Color offset value bit: Color offset data bit (COARD8 to COARD0, COAGR8 to
COAGR0, COABL8 to COABL0, COBRD8 to COBRD0, COBGR8 to COBGR0, COBBL8 to
COBBL0)
Sets the RGB individual value of color offset A and B. Negative numbers should be
set by two’s- complement values.
ST-58-R2 253
COARD8~COARD0 180114H Bit 8~0 For color offset A RED data
COAGR8~COAGR0 180116H Bit 8~0 For color offset A GREEN data
COABL8~COABL0 180118H Bit 8~0 For color offset A BLUE data
COBRD8~COBRD0 18011AH Bit 8~0 For color offset B RED data
COBGR8~COBGR0 18011CH Bit 8~0 For color offset B GREEN data
COBBL8~COBBL0 18011EH Bit 8~0 For color offset B BLUE data
254
Chapter 14 Shadow Function
Introduction ....................................................................256
14.1 Shadow Process .................................................. 256
Normal Shadow ................................................ 256
MSB Shadow .................................................... 258
Shadow Control Register .................................. 259
ST-58-R2 255
Introduction
This function projects a shadow on a sprite or scroll screen by using a sprite. There
are two types of sprite shadows: the Normal shadow and the MSB shadow. The
MSB shadow is used when the sprite is type 2 through 7, and is used when the sprite
shadow priority is highest. The shadow function is processed after the color calcula-
tion and color offset functions. The shadow function is shown in Figure 14.1.
Frame Buffer Data Scroll Screen Output Image
Transparent
+ =
Shadow Sprite
Normal Sprite
Figure 14.1 Shadow Function
14.1 Shadow Process
When the sprite priority of the Normal shadow or MSB shadow is highest, the
shadow process makes the sprite transparent and divides in half the brightness of
the part of the sprite in the top image.
Normal Shadow
With Normal shadow sprite, the number of bits to be determined by the sprite type
changes with dot color data of the least significant bit in the designated sprite type at
0, and all other dot color data at 1.
Sprite data of a Normal shadow designates the color control word such that all bits
of dot color data remaining from the dot color code are 1, with only the least signifi-
cant bit at 0. Also, sprite data of a Normal shadow is created by writing sprite char-
acters of the dot color code whose remaining bits are 1 to the frame buffer. In Figure
14.1, a shadow cannot be projected because it has already been directed to the frame
buffer. As a result, write to the frame buffer first. For more about color control
word, see “VDP1 User’s Manual.”
The scroll screen and back screen, which project a shadow by the Normal shadow
sprite, can designate in all screens.
256
A Normal shadow is shown in Figure 14.2 and sprite data of a Normal shadow is
shown in Figure 14.3.
Normal Shadow Sprite
Normal Shadow
Transparent Transparent
Frame Buffer Before Write Frame Buffer After Write
Figure 14.2 Sprite data write of a Normal shadow
• When Sprite Type 0~3, 5
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 1 1 1 1 1 1 1 0
• When Sprite Type 4, 6
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 1 1 1 1 1 1 0
• When Sprite Type 7
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 1 1 1 1 1 0
• When Sprite Type C~F
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 1 1 1 1 0
• When Sprite Type 8
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 1 1 1 0
• When Sprite Type 9~B
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 1 1 0
Note: The bits in the shaded areas are used in judging the normal shadow.
Figure 14.3 Sprite data of a Normal shadow
ST-58-R2 257
MSB Shadow
MSB shadow is enabled only when sprite types are type 2 through 7, with sprite
data MSB at 1. Depending on the value of 15 bits other than MSB, there are two
types of shadow: sprite shadow and the transparent shadow. The sprite shadow
MSB is 1 and all the values of 15 bits, other than the MSB, not 0. The transparent
shadow MSB is 1, with all the values of 15 bits, other than the MSB, at 0. When dot
color data satisfies Normal shadow conditions, it is judged to be a Normal shadow
even if sprite shadow conditions are satisfied.
MSB shadow sprite data is created by changing only MSB to 1 in the form of an MSB
shadow sprite for frame buffer data that the VDP1 has already written to. (See
“MSB On” in the “VDP1 User’s Manual.”) A shadow is added to the sprite charac-
ter when all frame buffer data bits before the MSB changes are not 0; i.e., when a
normal sprite that has already been written becomes a sprite shadow.
A shadow is added for a scroll screen priority that is one less than the sprite of the
transparent shadow when all frame buffer data bits before the MSB is changed are 0;
i.e., a transparent shadow will result when transparent. Scroll screen and back
screen that add shadows by sprites of the transparent shadow sprites can be selected
on each screen.
The MSB shadow can not be used when using the sprite window. For more details
about the sprite window, see “8.1 Window Area.” The sprite shadow and transpar-
ent shadow are shown in Figure 14.4. Sprite data of the MSB shadow is shown in
Figure 14.5.
MSB Shadow Sprite
Sprite Shadow
Transparent Shadow
Transparent Transparent
Frame Buffer before changing MSB Frame Buffer after changing MSB
Figure 14.4 Sprite shadow and transparent shadow
258
Sprite Shadow
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 X X X X X X X X X X X X X X X
The Xed bits could be either 0 or 1 as long as the dot color data in the selected sprite
type does not meet the conditions of Normal Shadow.
Transparent Shadow
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 14.5 Sprite data of MSB shadow
Shadow Control Register
The shadow control register is a write-only 16-bit register that designates whether to
use the shadow function for the scroll screen and back screen, and is located at
address 1800E2H. Because the value is cleared to 0 after power on or reset, the value
must be set.
15 14 13 12 11 10 9 8
SDCTL ~ ~ ~ ~ ~ ~ ~ TPSDSL
1800E2H 7 6 5 4 3 2 1 0
~ ~ BKSDEN R0SDEN N3SDEN N2SDEN N1SDEN N0SDEN
Shadow enable bit (N0SDEN, N1SDEN, N2SDEN, N3SDEN, R0SDEN,
BKSDEN)
This bit determines in sprites of the Normal shadow and transparent shadow
whether to use the shadow function for the scroll screen and back screen.
N0SDEN 1800E2H Bit 0 For NBG0 (or RBG1)
N1SDEN 1800E2H Bit 1 For NBG1 (or EXBG)
N2SDEN 1800E2H Bit 2 For NBG2
N3SDEN 1800E2H Bit 3 For NBG3
R0SDEN 1800E2H Bit 4 For RBG0
BKSDEN 1800E2H Bit 5 For Back
The sprite of a sprite shadow always uses the shadow function for itself.
ST-58-R2 259
xxSDEN Process
0 Does not use shadow function (shadow not added)
1 Uses shadow function (shadow added)
Note: N0, N1, N2, N3, R0, or BK is entered in bit name for xx.
Transparent shadow select bit (TPSDSL), bit 8
Determines whether to activate the sprite of the transparent shadow.
TPSDSL Process
0 Disables transparent shadow sprite
1 Enables transparent shadow sprite
When the sprite of a transparent shadow is nullified, a shadow will no longer be
projected on a screen by the transparent shadow sprite.
260
Chapter 15 How to Use VDP2
15.1 Operation Flow ......................................................... 262
15.2 How to Use RAM ...................................................... 264
15.3 Bit Configuration Map ............................................. 267
ST-58-R2 261
15.1 Operation Flow
Below is an overview of the steps for defining and setting VDP2 data.
Step 1 Set the TV screen mode.
• Select normal graphics, high-resolution graphic, or exclusive monitor
• Set interlace mode
• Set vertical and horizontal resolution
Step 2 Select the scroll screen to be used.
• Normal scroll screen (NBG0, NBG1, NBG2, NBG3)
• Rotation scroll screen (RBG0, RBG1)
• External input screen (EXBG)
• Line color screen (LNCL)
• Back screen (BACK)
Step 3 Select the functions of each screen.
• Select cell format or bit map format
(A) Cell format
• Character color count
• Character size
• Pattern name data size
• Plane size
• Scaling function
• Line scroll function
• Vertical cell scroll function
• Mosaic process function
(B) Bit map format
• Bit map color count
• Bit map size
• Scaling function
• Rotation function
• Mosaic process function
Step 4 Select the color RAM mode.
Step 5 Select the window to be used.
When using the Normal window, store the line window table in VRAM.
262
Step 6 Calculate the size of VRAM to determine whether the tables can be stored
there.
• VRAM size
• Character pattern (number and size)
• Pattern name table (number and size)
• Bit map pattern (number and size)
• Line scroll table
• Vertical cell scroll table
• Rotation parameter table
• Coefficient table
• Line color screen table
• Back screen table
• Line window table
Step 7 Select VRAM use.
• VRAM bank partition
• VRAM access method
Step 8 Create character pattern and pattern name table.
• Select the character number supplement mode.
• Set reverse function bit.
Creates a bit map pattern when in the bit map format.
Step 9 Create other VRAM tables.
Step 10 Define priority and color calculation in terms of sprite data.
Step 11 Set special functions.
• Special function code
• Special priority function
• Extended color calculation function
• Gradation calculation function
• Color offset function
• Shadow function (Normal, MSB)
Step 12 Reset the screen, redefine and reset VRAM and registers in terms of story.
ST-58-R2 263
15.2 How to Use RAM
When using VDP2, data is defined and set in VRAM, color RAM, and the register.
• VRAM
Data defined in VRAM differs depending on the scroll screen to be used, screen
format, screen size, and the image process functions to be used. Data is defined in
VRAM according to the register setting; defined addresses are set in the various
address registers. Table 15.1 shows the main register connected with data defined in
VRAM.
264
Table 15.1 Register connected with data defined in VRAM
Data Definition Register Setting Data
Pattern Name Control Register Pattern Name Data Size,
(180030H~180038H) Character Number
Supplementary Mode, Pattern
Name Supplementary Data
Plane size register (18003AH) Plane size when in displaying
in cell format
Pattern name Character pattern lead Normal scroll screen map Pattern Name Data lead
table address register (180040H~18004EH) address for each plane
Rotation scroll screen map Pattern Name Data lead
register (180050H~18006EH) address for each plane
Map offset register 3 bits map offset value
(18003CH~18003EH) attached to map register upper
bits
Character Dot data of cell Character control register Character color count,
pattern (180028H, 18002AH) character size
Bitmap pattern Bitmap pattern data Character control register Character color count (bitmap
(180028H, 18002AH) color count), bitmap size,
bitmap enable
Map offset register Boundary address of bitmap
(18003CH~18003EH) pattern
Line scroll Horizontal and vertical Line scroll table address Line scroll table lead address
table screen scroll value, register (1800A0H~1800A6H)
horizontal coordinate Line & vertical cell scroll Scroll configuration control
increment control register (18009AH) data
Vertical cell Vertical screen scroll Vertical cell scroll table Vertical cell scroll table lead
scroll table value address register (18009CH, address
18009EH)
Line & vertical cell scroll Scroll configuration control
control register (18009AH) data
RAM control register VRAM use per rotation scroll
Rotation Parameter, (18000EH) screen
Rotation Coefficient Table Rotation parameter table Parameter table lead address
parameter Related Registers address register (1800BCH,
table 1800BEH)
Rotation parameter mode Rotation parameter mode
register (1800B0H) setting
Coefficient table data RAM control register VRAM use per rotation scroll
(Zoom Coefficients kx, (18000EH) screen
Coefficient ky, and start point Coefficient table control Coefficient data mode, data
table coordinate Xp after register (1800B4H) size of coefficient data,
rotation conversion) coefficient table enable
Coefficient table address Coefficient table lead address
offset register (1800B6H) offset value
Line color Color RAM address Line color screen table Line color screen color mode,
screen table address register (1800A8H, line color screen table lead
1800AAH) address
Back screen RGB color data Back screen table address Back screen color mode, back
table register (1800ACH, screen table lead address
1800AEH)
Line window Horizontal start point Line window table address Line window enable, line
table coordinate, horizontal register window table lead address
end point coordinate (1800D8H~1800DEH)
ST-58-R2 265
• Color RAM Definition
Defines the sprite of the palette format and scroll screen color data. Color data
stored in color RAM is in RGB format and has three modes. Mode selection desig-
nates in the color RAM mode (CRMD1, CRMD0, bits 13 and 12) of the RAM control
register (18000EH).
The most significant bit of color data stored in color RAM is the enable bit when the
special color calculation mode is mode 3. Color is calculated in dot units for dots
using color data when the most significant bit color data is 1, the special color calcu-
lation mode is mode 3, the color format is the palette format, and the color calcula-
tion enable bit is 1.
• Color RAM Reference
Color RAM is referred from character patterns, bit map patterns, and line color
screen table data. The color RAM address is expressed by 11 bits. When the charac-
ter color count or bit map color count is 16-color, the 7-bit palette number added to
the host becomes 11 bits; when 256-color, the 3-bit palette number added to the host
becomes 11 bits. The palette number of the character pattern is in pattern name data
and supplement data of the pattern name control register; the palette number of the
bit map pattern is in the bit map palette number register.
• Register
The register is, as a rule, a write-only, 16-bit register that designates the VDP2 func-
tion. One function may extend in several registers, and several functions may be
arrange in one register. Set registers corresponding to the functions to be used when
needed.
266
15.3 Bit Configuration Map
Every register bit register is related to various other bits. The bit map configuration
of separate scroll screens and separate priority functions is shown in the bit map
configuration below.
TV Screen Mode
TV Screen Display (DISP, 180000H, bit 15 )
0 : Does not display picture on TV screen
1 : Displays picture
Boarder Color Mode (BDCLMD, 180000H, bit 8)
0 : Displays Black
1 : Displays Back Screen
Interlace mode (LSMD, 180000H, bit 7~6 )
00 : Non-interlace
10 : Single-density Interlace
11 : Double-density Interlace
Vertical Resolution (VRESO, 180000H, bit 5~4)
00 : 224 Lines (NTSC format or PAL format TV)
01 : 240 Lines (NTSC format or PAL format TV)
10 : 256 Lines (PAL format TV)
Horizontal Resolution (HRESO, 180000H, bit 2~0 )
000 : 320 Pixels (Normal Graphics A, NTSC format or PAL format TV)
001 : 352 Pixels (Normal Graphics B, NTSC format or PAL format TV)
010 : 640 Pixels (Hi-Res Graphics A, NTSC format or PAL format TV)
011 : 704 Pixels (Hi-Res Graphics B, NTSC format or PAL format TV)
100 : 320 Pixels (Exclusive Normal Graphics A, 31kHz monitor)
101 : 352 Pixels (Exclusive Normal Graphics B, Hi-Vision monitor)
110 : 640 Pixels (Exclusive Hi-Res Graphics A, 31kHz monitor)
111 : 704 Pixels (Exclusive Hi-Res Graphics B, Hi-Vision monitor)
External Signal Enable
External Latch Enable (EXLTEN, 180002H, bit 9)
0 : Latch when External Enable Register is read
1 : Latches via external signal
External Synchronization Enable (EXSYEN, 180002H, bit 8)
0 : Does not input External Sync. Signal
1 : Inputs External Sync. Signal and synchronizes TV screen display externally
Image Display Area Select (DASEL, 180002H, bit 1)
0 : Displays image in set display area only
1 : Displays image in specified display area only
External Screen Enable (EXBGEN, 180002H, bit 0)
0 : Does not input External Screen Data
1 : Inputs External Screen Data
ST-58-R2 267
Screen Status
External Latch Flag (EXLTFG, 180004H, bit 9)
0 : Register is not latched (Register will be cleared when status is read)
1 : HV Counter Value is latched in register
External Synchronization Flag (EXSYFG, 180004H, bit 8)
0 : Does not synchronize (Register will be cleared when status is read)
1 : Internal Circuitry Synchronized
V-Blank (VBLANK, 180004H, bit 3)
0 : Scans during vertical display
1 : Scans during vertical retrace (VBLANK)
H-Blank ( HBLANK, 180004H, bit 2)
0 : Scans during horizontal display
1 : Scans during horizontal retrace (HBLANK)
Scan Field Flag (ODD, 180004H, bit 1 )
0 : Scans during even fields
1 : Scans during odd fields
TV Format Flag (PAL, 180004H, bit 0 )
0 : NTSC Format
1 : PAL Format
H-Counter Value (HCT, 180008H, bit 9~0)
V-Counter Value (VCT, 18000AH, bit 9~0)
268
RAM
VRAM
VRAM Size (VRAMSZ, 180006H, bit 15)
0 : 4 Mbit
1 : 8 Mbit
VRAM Change Enable (VRAMCE, 18000CH, bit 8 )
0 : Does not use change function (uses both VRAM-A and VRAM-B as display VRAM)
1 : Uses change function (uses either VRAM-A or VRAM-B as display VRAM)
VRAM Select (VRAMSL, 18000CH, bit 0)
0 : Uses VRAM-A for CPU VRAM
1 : Uses VRAM-B for CPU VRAM
VRAM Mode (VRAMD, 18000EH, bit 8)
VRAM Mode (VRBMD, 18000EH, bit 9)
0 : Does not make 2 bank partitions
1 : Makes 2 bank partitions
VRAM Cycle Pattern (For VRAM-A0 (or VRAM-A )) (VCPnA0, 180010H, 180012H )
VRAM Cycle Pattern (For VRAM-A1 ) (VCPnA1, 180014H, 180016H )
VRAM Cycle Pattern (For VRAM-B0 (or VRAM-B )) (VCPnB0, 180018H, 18001AH )
VRAM Cycle Pattern (For VRAM-B1 ) (VCPnB1, 18001CH, 18001EH )
For Timing T0 (VCP0xx, 18001yH, bit 15~12 )
For Timing T1 (VCP1xx, 18001yH, bit 11~8 )
For Timing T2 (VCP2xx, 18001yH, bit 7~4 )
For Timing T3 (VCP3xx, 18001yH, bit 3~0 )
For Timing T4 (VCP4xx, 18001zH, bit 15~12 )
For Timing T5 (VCP5xx, 18001zH, bit 11~8 )
For Timing T6 (VCP6xx, 18001zH, bit 7~4 )
For Timing T7 (VCP7xx, 18001zH, bit 3~0 )
0000 : NBG0 Pattern Name Data Read
0001 : NBG1 Pattern Name Data Read
0010 : NBG2 Pattern Name Data Read
0011 : NBG3 Pattern Name Data Read
0100 : NBG0 Character Pattern Data Read
0101 : NBG1 Character Pattern Data Read
0110 : NBG2 Character Pattern Data Read
0111 : NBG3 Character Pattern Data Read
1100 : Vertical Cell Scroll Table Data Read for NBG0
1101 : Vertical Cell Scroll Table Data Read for NBG1
1110 : CPU Read/Write
1111 : No Access
Color RAM
Color RAM Mode (CRMD, 18000EH, bit 13~12)
00 : Mode 0 : RGB, each 5 bits; 1024 color settings
01 : Mode 1 : RGB, each 5 bits; 2048 color settings
10 : Mode 2 : RGB, each 5 bits; 1024 color settings
ST-58-R2 269
Scroll Screen
Normal Scroll Screen
NBG0
NBG1
NBG2
NBG3
Rotation Scroll Screen
RBG0
RBG1
External Input Screen : EXBG
Line Screen
Line Color Screen : LNCL
Back Screen : BACK
Normal Scroll Screen (NBG0)
Transparent Display Enable (N0TPON, 180020H, bit 8)
0 : Enables Transparent Code
(Transparent coded dots become transparent)
1 : Disables Transparent Code
(Transparent coded dots are displayed according to their data value)
Screen Display Enable (N0ON, 180020H, bit 0)
0 : Cannot Display (Does not access VRAM)
1 : Can Display
Character Color Count (N0CHCN, 180028H, bit 6~4)
000 : 16 colors (Palette Format)
001 : 256 colors (Palette Format)
010 : 2048 colors (Palette Format)
011 : 32,768 colors (RGB Format)
100 : 16,770,000 colors (RGB Format)
Bitmap Enable (N0BMEN, 180028H, bit 1)
0 : Display in Cell Format See Cell Format (NBG0)
1 : Display in Bitmap Format See Bitmap Format (NBG0 )
Mosaic Enable (N0MZE, 180022H, bit 0)
0 : Does not execute Mosaic Process
1 : Executes Mosaic Process
Mosaic Size (MZSZx, 180022H )
Horizontal Mosaic Size (MZSZH, 180022H, bit 11~8 )
Vertical Mosaic Size (MZSZV, 180022H, bit 15~12)
(Continued)
270
Cell Format (NBG0 )
Character Size (N0CHSZ, 180028H, bit 0 )
0 : 1 H Cell X 1 V Cell
1 : 2 H Cells X 2 V Cells
Pattern Name Data Size (N0PNB, 180030H, bit 15)
0 : 2 Words
1 : 1 Word
1 Word (Pattern Name Data Size)
Character Number Supplementary Mode (N0CNSM, 180030H, bit 14 )
0 : Character number in pattern name data is 10 bits; reverse function
can be selected in character units
1 : Character number in pattern name data is 12 bits; reverse function
cannot be selected.
Special Priority (N0SPR, 180030H, bit 9)
(For Pattern Name Supplementary Data)
Special Color Calculation (N0SCC, 180030H, bit 8)
(For Pattern Name Supplementary Data)
Supplementary Palette Number (N0SPLT, 180030H, bit 7~5 )
Supplementary Character Number (N0SCN, 180030H, bit 4~0)
Plane Size (N0PLSZ, 18003AH, bit 1~0)
00 : 1 H Page X 1 V Page
01 : 2 H Pages X 1 V Page
10 : 2 H Pages X 2 V Pages
Map Offset (N0MP, 18003CH, bit 2~0)
Map (N0MPx, 180040H~180042H )
For Plane A (N0MPA, 180040H, bit 5~0 )
For Plane B (N0MPB, 180040H, bit 13~8 )
For Plane C ( N0MPC, 180042H, bit 5~0)
For Plane D ( N0MPD, 180042H, bit 13~8)
Bitmap Format (NBG0)
Bitmap Size (N0BMSZ, 180028H, bit 3~2)
00 : 512 H Dots X 256 V Dots
01 : 512 H Dots X 512 V Dots
10 : 1024 H Dots X 256 V Dots
11 : 1024 H Dots X 512 V Dots
Special Priority (N0BMPR, 18002CH, bit 5)
Special Color Calculation (N0BMCC, 18002CH, bit 4)
Supplementary Palette Number (N0BMP, 18002CH, bit 2~0)
Map Offset (N0MP, 18003CH, bit 2~0)
ST-58-R2 271
Normal Scroll Screen (NBG0) (continued)
Screen Scroll Value (N0SCx, 180070H~180076H)
For Horizontal Direction (N0SCX, 180070H, bit 10~180072H, bit 8)
For Vertical Direction (N0SCY, 180074H, bit 10~180076H, bit 8)
Coordinate Increment (N0ZMx, 180078H~18007EH)
For Horizontal Direction (N0ZMX, 180078H, bit 2~18007AH, bit 8 )
For Vertical Direction (N0ZMY, 18007CH, bit 2~18007EH, bit 8)
Reduction Enable (N0ZMQT, N0ZMHF, 180098H, bit 1~0)
00 : Reduction can not be displayed horizontally
01 : Reduction can be displayed up to 1/2 horizontally
10 : Reduction can be displayed up to 1/4 horizontally
11 : Reduction can be displayed up to 1/4 horizontally
Line Scroll Space (N0LSS, 18009AH, bit 5~4)
00 : Every 1 Line (Non-interlace, Double-density Interlace),
Every 2 Lines (Single-density Interlace)
01 : Every 2 Lines (Non-interlace, Double-density Interlace),
Every 4 Lines (Single-density Interlace)
10 : Every 4 Line (Non-interlace, Double-density Interlace),
Every 8 Lines (Single-density Interlace)
11 : Every 8 Line (Non-interlace, Double-density Interlace),
Every 16 Lines (Single-density Interlace)
Line Zoom Enable (N0LZMX, 18009AH, bit 3)
0 : Does not scale horizontally in line units
1 : Scales horizontally in line units
Line Scroll Enable (N0LSCY, 18009AH, bit 2 )
(For Vertical Screen Scroll Values)
0 : Does not scroll vertically in line units
1 : Scrolls vertically in line units
Line Scroll Enable (N0LSCX, 18009AH, bit 1 )
(For Horizontal Screen Scroll Values)
0 : Does not scroll horizontally in line units
1 : Scrolls horizontally in line units
Vertical Cell Scroll Enable (N0VCSC, 18009AH, bit 0)
0 : No vertical cell scroll
1 : Allows vertical cell scroll
Line Scroll Table Address (N0LSTA, 1800A0H, bit 2~1800A2H, bit 1)
Vertical Cell Scroll Table Address (VCSTA, 18009CH, bit 2~18009EH, bit 1 )
272
Normal Scroll Screen (NBG1)
Transparent Display Enable (N1TPON, 180020H, bit 9)
0 : Turns on Transparent Code
(Transparent coded dots become transparent)
1 : Turns off Transparent Code
(Transparent coded dots are displayed as per their data value)
Screen Display Enable (N1ON, 180020H, bit 1)
0 : Cannot Display (Cannot access VRAM during display)
1 : Can Display
Character Color Count (N1CHCN, 180028H, bit 13~12)
00 : 16 colors (Palette Format)
01 : 256 colors (Palette Format)
10 : 2048 colors (Palette Format)
11 : 32,768 colors (RGB Format)
Bitmap Enable (N1BMEN, 180028H, bit 9)
0 : Display in Cell Format See Cell Format (NBG1)
1 : Display in Bitmap Format See Bitmap Format (NBG1 )
Mosaic Enable (N1MZE, 180022H, bit 1)
0 : Does not execute Mosaic Process
1 : Executes Mosaic Process
Mosaic Size (MZSZx, 180022H )
Horizontal Mosaic Size (MZSZH, 180022H, bit 11~8 )
Vertical Mosaic Size (MZSZV, 180022H, bit 15~12)
(Continued)
ST-58-R2 273
Cell Format (NBG1 )
Character Size (N1CHSZ, 180028H, bit 8 )
0 : 1 H Cell X 1 V Cell
1 : 2 H Cells X 2 V Cells
Pattern Name Data Size (N1PNB, 180032H, bit 15)
0 : 2 Words
1 : 1 Word
1 Word (Pattern Name Data Size)
Character Number Supplementary Mode (N1CNSM, 180032H, bit 14)
0 : Character number in pattern name data is 10 bits; reverse function can be
selected in character units
1 : Character number in pattern name data is 12 bits; reverse function cannot be
selected.
Special Priority (N1SPR, 180032H, bit 9)
(For Pattern Name Supplementary Data)
Special Color Calculation (N1SCC, 180032H, bit 8)
(For Pattern Name Supplementary Data)
Supplementary Palette Number (N1SPLT, 180032H, bit 7~5 )
Supplementary Character Number (N1SCN, 180032H, bit 4~0)
Plane Size (N1PLSZ, 18003AH, bit 3~2)
00 : 1 H Page X 1 V Page
01 : 2 H Pages X 1 V Page
10 : 2 H Pages X 2 V Pages
Map Offset (N1MP, 18003CH, bit 6~4)
Map (N1MPx, 180044H~180046H )
For Plane A (N1MPA, 180044H, bit 5~0 )
For Plane B (N1MPB, 180044H, bit 13~8 )
For Plane C ( N1MPC, 180046H, bit 5~0)
For Plane D ( N1MPD, 180046H, bit 13~8)
Bitmap Format (NBG1)
Bitmap Size (N1BMSZ, 180028H, bit 11~10)
00 : 512 H Dots X 256 V Dots
01 : 512 H Dots X 512 V Dots
10 : 1024 H Dots X 256 V Dots
11 : 1024 H Dots X 512 V Dots
Special Priority (N1BMPR, 18002CH, bit 13)
Special Color Calculation (N1BMCC, 18002CH, bit 12)
Supplementary Palette Number (N1BMP, 18002CH, bit 10~8)
Map Offset (N1MP, 18003CH, bit 6~4)
274
Normal Scroll Screen (NBG1) (Continued)
Screen Scroll Value (N1SCx, 180080H~180086H)
For Horizontal Direction (N1SCX, 180080H, bit 10~180082H, bit 8)
For Vertical Direction (N1SCY, 180084H, bit 10~180086H, bit 8)
Coordinate Increment (N1ZMx, 180088H~18008EH)
For Horizontal Direction (N1ZMX, 180088H, bit 2~18008AH, bit 8 )
For Vertical Direction (N1ZMY, 18008CH, bit 2~18008EH, bit 8)
Reduction Enable (N1ZMQT, N1ZMHF, 180098H, bit 9~8)
00 : Reduction can not be displayed horizontally
01 : Reduction can be displayed up to 1/2 horizontally
10 : Reduction can be displayed up to 1/4 horizontally
11 : Reduction can be displayed up to 1/4 horizontally
Line Scroll Space (N1LSS, 18009AH, bit 13~12)
00 : Every 1 Line (Non-interlace, Double-density Interlace),
Every 2 Lines (Single-density Interlace)
01 : Every 2 Lines (Non-interlace, Double-density Interlace),
Every 4 Lines (Single-density Interlace)
10 : Every 4 Line (Non-interlace, Double-density Interlace),
Every 8 Lines (Single-density Interlace)
11 : Every 8 Line (Non-interlace, Double-density Interlace),
Every 16 Lines (Single-density Interlace)
Line Zoom Enable (N1LZMX, 18009AH, bit 11)
0 : No zoom horizontally in line units
1 : Allows zoom horizontally in line units
Line Scroll Enable (N1LSCY, 18009AH, bit 10 )
(For Vertical Screen Scroll Values)
0 : No zoom vertically in line units
1 : Allows zoom vertically in line units
Line Scroll Enable (N1LSCX, 18009AH, bit 9 )
(For Horizontal Screen Scroll Values)
0 : No scroll horizontally in line units
1 : Allows scroll horizontally in line units
Vertical Cell Scroll Enable (N1VCSC, 18009AH, bit 8)
0 : No vertical cell scroll
1 : Allows vertical cell scroll
Line Scroll Table Address (N1LSTA, 1800A4H, bit 2~1800A6H, bit 1)
Vertical Cell Scroll Table Address (VCSTA, 18009CH, bit 2~18009EH, bit 1 )
ST-58-R2 275
Normal Scroll Screen (NBG2)
Transparent Display Enable (N2TPON, 180020H, bit 10)
0 : Turns on Transparent Code
(Transparent coded dots become transparent)
1 : Turns off Transparent Code
(Transparent coded dots are displayed as per their data value)
Screen Display Enable (N2ON, 180020H, bit 2)
0 : Cannot Display (Cannot access VRAM during display)
1 : Can Display
Character Color Count (N2CHCN, 18002AH, bit 1)
0 : 16 colors (Palette Format)
1 : 256 colors (Palette Format)
(Display in Cell Format) See Cell Format (NBG2)
Mosaic Enable (N2MZE, 180022H, bit 2)
0 : Does not execute Mosaic Process
1 : Executes Mosaic Process
Mosaic Size (MZSZx, 180022H )
Horizontal Mosaic Size (MZSZH, 180022H, bit 11~8 )
Vertical Mosaic Size (MZSZV, 180022H, bit 15~12)
Screen Scroll Value (N2SCx, 180090H~180092H)
For Horizontal Direction (N2SCX, 180090H, bit 10~0 )
For Vertical Direction (N2SCY, 180092H, bit 10~0)
276
Cell Format (NBG2 )
Character Size (N2CHSZ, 18002AH, bit 0 )
0 : 1 H Cell X 1 V Cell
1 : 2 H Cells X 2 V Cells
Pattern Name Data Size (N2PNB, 180034H, bit 15)
0 : 2 Words
1 : 1 Word
1 Word (Pattern Name Data Size)
Character Number Supplementary Mode (N2CNSM, 180034H, bit 14)
0 : Character number in pattern name data is 10 bits; reverse function can
be selected in character units
1 : Character number in pattern name data is 12 bits; reverse function
cannot be selected
Special Priority (N2SPR, 180034H, bit 9)
(For Pattern Name Supplementary Data)
Special Color Calculation (N2SCC, 180034H, bit 8)
(For Pattern Name Supplementary Data)
Supplementary Palette Number (N2SPLT, 180034H, bit 7~5 )
Supplementary Character Number (N2SCN, 180034H, bit 4~0)
Plane Size (N2PLSZ, 18003AH, bit 5~4)
00 : 1 H Page X 1 V Page
01 : 2 H Pages X 1 V Page
10 : 2 H Pages X 2 V Pages
Map Offset (N2MP, 18003CH, bit 10~8)
Map (N2MPx, 180048H~18004AH )
For Plane A (N2MPA, 180048H, bit 5~0 )
For Plane B (N2MPB, 180048H, bit 13~8 )
For Plane C ( N2MPC, 18004AH, bit 5~0)
For Plane D ( N2MPD, 18004AH, bit 13~8)
ST-58-R2 277
Normal Scroll Screen (NBG3)
Transparent Display Enable (N3TPON, 180020H, bit 11)
0 : Turns on Transparent Code
(Transparent coded dots become transparent)
1 : Turns off Transparent Code
(Transparent coded dots are displayed as per their data value)
Screen Display Enable (N3ON, 180020H, bit 3)
0 : Cannot Display (Cannot access VRAM during display)
1 : Can Display
Character Color Count (N3CHCN, 18002AH, bit 5)
0 : 16 colors (Palette Format)
1 : 256 colors (Palette Format)
(Display in Cell Format) See Cell Format (NBG3)
Mosaic Enable (N3MZE, 180022H, bit 3)
0 : Does not execute Mosaic Process
1 : Executes Mosaic Process
Mosaic Size (MZSZx, 180022H )
Horizontal Mosaic Size (MZSZH, 180022H, bit 11~8 )
Vertical Mosaic Size (MZSZV, 180022H, bit 15~12)
Screen Scroll Value (N3SCx, 180094H~180096H)
For Horizontal Direction (N3SCX, 180094H, bit 10~0 )
For Vertical Direction (N3SCY, 180096H, bit 10~0)
278
Cell Format (NBG3 )
Character Size (N3CHSZ, 18002AH, bit 4 )
0 : 1 H Cell X 1 V Cell
1 : 2 H Cells X 2 V Cells
Pattern Name Data Size (N3PNB, 180036H, bit 15)
0 : 2 Words
1 : 1 Word
1 Word (Pattern Name Data Size)
Character Number Supplementary Mode (N3CNSM, 180036H, bit 14)
0 : Character number in pattern name data is 10 bits; reverse function can
be selected in character units
1 : Character number in pattern name data is 12 bits; reverse function
cannot be selected
Special Priority (N3SPR, 180036H, bit 9)
(For Pattern Name Supplementary Data)
Special Color Calculation (N3SCC, 180036H, bit 8)
(For Pattern Name Supplementary Data)
Supplementary Palette Number (N3SPLT, 180036H, bit 7~5 )
Supplementary Character Number (N3SCN, 180036H, bit 4~0)
Plane Size (N3PLSZ, 18003AH, bit 7~6)
00 : 1 H Page X 1 V Page
01 : 2 H Pages X 1 V Page
10 : 2 H Pages X 2 V Pages
Map Offset (N3MP, 18003CH, bit 14~12)
Map (N3MPx, 18004CH~18004EH)
For Plane A (N3MPA, 18004CH, bit 5~0)
For Plane B (N3MPB, 18004CH, bit 13~8)
For Plane C ( N3MPC, 18004EH, bit 5~0)
For Plane D ( N3MPD, 18004EH, bit 13~8)
ST-58-R2 279
Rotation Scroll Screen (RBG0 )
Transparent Display Enable (R0TPON, 180020H, bit 12)
0 : Turns on Transparent Code
(Transparent coded dots become transparent)
1 : Turns off Transparent Code
(Transparent coded dots are displayed as per their data value)
Screen Display Enable (R0ON, 180020H, bit 4)
0 : Cannot Display (Cannot access VRAM during display)
1 : Can Display
Character Color Count (R0CHCN, 18002AH, bit 14~12)
000 : 16 colors (Palette Format)
001 : 256 colors (Palette Format)
010 : 2048 colors (Palette Format)
011 : 32,768 colors (RGB Format)
100 : 16,770,000 colors (RGB Format)
Bitmap Enable (R0BMEN, 18002AH, bit 9)
0 : Display in Cell Format See Cell Format (RBG0)
1 : Display in Bitmap Format See Bitmap Format (RBG0 )
Mosaic Enable (R0MZE, 180022H, bit 4)
0 : Does not execute Mosaic Process
1 : Executes Mosaic Process
Mosaic Size (MZSZx, 180022H )
Horizontal Mosaic Size (MZSZH, 180022H, bit 11~8 )
Vertical Mosaic Size (MZSZV, 180022H, bit 15~12)
(Continued)
280
Cell Format (RBG0 )
Character Size (R0CHSZ, 18002AH, bit 8 )
0 : 1 H Cell X 1 V Cell
1 : 2 H Cells X 2 V Cells
Pattern Name Data Size (R0PNB, 180038H, bit 15)
0 : 2 Words
1 : 1 Word
1 Word (Pattern Name Data Size)
Character Number Supplementary Mode (R0CNSM, 180038H, bit 14)
0 : Character number in pattern name data is 10 bits; reverse function can
be selected in character units
1 : Character number in pattern name data is 12 bits; reverse function
cannot be selected
Special Priority (R0SPR, 180038H, bit 9)
(For Pattern Name Supplementary Data)
Special Color Calculation (R0SCC, 180038H, bit 8)
(For Pattern Name Supplementary Data)
Supplementary Palette Number (R0SPLT, 180038H, bit 7~5 )
Supplementary Character Number (R0SCN, 180038H, bit 4~0)
Rotation Parameter Mode (RPMD, 1800B0H, bit 1~0)
00 : Mode 0 : Use for Rotation Parameter A See Rotation Parameter A (RBG0 )
01 : Mode 1 : Use for Rotation Parameter B See Rotation Parameter B (RBG0 )
ST-58-R2 281
For Rotation Parameter A (RBG0 )
Plane Size (RAPLSZ, 18003AH, bit 9~8)
00 : 1 H Page X 1 V Page
01 : 2 H Pages X 1 V Page
10 : 2 H Pages X 2 V Pages
Screen Over Process (RAOVR, 18003AH, bit 11~10 )
00 : Outside the display area it repeats the image set in the display area
01 : Outside the display area it repeats the image set in the
Screen Over Pattern Register
10 : Everything outside the display area is transparent
11 : Sets display area to 0 ≤ x < 512 and 0 ≤ y <512 regardless of the plane size or bitmap size.
Everything outside the display area is transparent.
Screen Over Pattern Name (RAOPN, 1800B8H, bit 15~0 )
Map Offset (RAMP, 18003EH, bit 2~0)
Map (RAMPx, 180050H~18005EH )
For Plane A (RAMPA, 180050H, bit 5~0 )
For Plane B (RAMPB, 180050H, bit 13~8 )
For Plane C (RAMPC, 180052H, bit 5~0 )
For Plane D (RAMPD, 180052H, bit 13~8 )
For Plane E (RAMPE, 180054H, bit 5~0 )
For Plane F (RAMPF, 180054H, bit 13~8 )
For Plane G (RAMPG, 180056H, bit 5~0 )
For Plane H (RAMPH, 180056H, bit 13~8 )
For Plane I (RAMPI, 180058H, bit 5~0)
For Plane J (RAMPJ, 180058H, bit 13~8 )
For Plane K (RAMPK, 18005AH, bit 5~0 )
For Plane L (RAMPL, 18005AH, bit 13~8 )
For Plane M (RAMPM, 18005CH, bit 5~0 )
For Plane N (RAMPN, 18005CH, bit 13~8 )
For Plane O (RAMPO, 18005EH, bit 5~0 )
For Plane P (RAMPP, 18005EH, bit 13~8 )
282
For Rotation Parameter B (RBG0 )
Plane Size (RBPLSZ, 18003AH, bit 13~12)
00 : 1 H Page X 1 V Page
01 : 2 H Pages X 1 V Page
10 : 2 H Pages X 2 V Pages
Screen Over Process (RBOVR, 18003AH, bit 15~14 )
00 : Outside the display area it repeats the image set in the display area
01 : Outside the display area it repeats the image set in the
Screen Over Pattern Register
10 : Everything outside the display area is transparent
11 : Sets display area to 0 ≤ x < 512 and 0 ≤ y <512 regardless of the plane size or bitmap size.
Everything outside the display area is transparent.
Screen Over Pattern Name (RBOPN, 1800BAH, bit 15~0 )
Map Offset (RBMP, 18003EH, bit 6~4)
Map (RBMPx, 180060H~18006EH )
For Plane A (RBMPA, 180060H, bit 5~0 )
For Plane B (RBMPB, 180060H, bit 13~8 )
For Plane C (RBMPC, 180062H, bit 5~0 )
For Plane D (RBMPD, 180062H, bit 13~8 )
For Plane E (RBMPE, 180064H, bit 5~0 )
For Plane F (RBMPF, 180064H, bit 13~8 )
For Plane G (RBMPG, 180066H, bit 5~0 )
For Plane H (RBMPH, 180066H, bit 13~8 )
For Plane I (RBMPI, 180068H, bit 5~0)
For Plane J (RBMPJ, 180068H, bit 13~8 )
For Plane K (RBMPK, 18006AH, bit 5~0 )
For Plane L (RBMPL, 18006AH, bit 13~8 )
For Plane M (RBMPM, 18006CH, bit 5~0 )
For Plane N (RBMPN, 18006CH, bit 13~8 )
For Plane O (RBMPO, 18006EH, bit 5~0 )
For Plane P (RBMPP, 18006EH, bit 13~8 )
Bitmap Format (RBG0)
Bitmap Size (R0BMSZ, 18002AH, bit 10)
0 : 512 H Dots X 256 V Dots
1 : 512 H Dots X 512 V Dots
Special Priority (R0BMPR, 18002EH, bit 5)
Special Color Calculation (R0BMCC, 18002EH, bit 4 )
Supplementary Palette Number (R0BMP, 18002EH, bit 2~0 )
Rotation Parameter Mode (RPMD, 1800B0H, bit 1~0)
00 : Mode 0 : Use for Rotation Parameter A
01 : Mode 1 : Use for Rotation Parameter B
Map Offset (For Rotation Parameter A) (RAMP, 18003EH, bit 2~0 )
Map Offset (For Rotation Parameter B) (RBMP, 18003EH, bit 6~4 )
ST-58-R2 283
Rotation Scroll Screen (RBG0 ) (Continued)
Rotation Data Bank Setting (RDBSxx, 18000EH )
For VRAM-A0 (or VRAM-A ) (RDBSA0, 18000EH, bit 1~0 )
For VRAM-A1 (RDBSA1, 18000EH, bit 3~2 )
For VRAM-B0 (or VRAM-B ) (RDBSB0, 18000EH, bit 5~4 )
For VRAM-B1 (RDBSB1, 18000EH, bit 7~6 )
00 : Not used as RAM for RBG0
01 : RAM for RBG0 Coefficient Data Table
10 : RAM for RBG0 Pattern Name Table
11 : RAM for RBG0 Character Pattern Table
(or Bitmap Pattern)
Parameter Read Enable (RxxxSTRE, 1800B2H )
For Rotation Parameter A Xst (RAXSTRE, 1800B2H, bit 0)
For Rotation Parameter B Xst (RBXSTRE, 1800B2H, bit 8)
For Rotation Parameter A Yst (RAYSTRE, 1800B2H, bit 1)
For Rotation Parameter B Yst (RBYSTRE, 1800B2H, bit 9)
For Rotation Parameter A KAst (RAKASTRE, 1800B2H, bit 2)
For Rotation Parameter B KAst (RBKASTRE, 1800B2H, bit 10)
0 : Selected parameter is not read per line
1 : Selected parameter is read per line
Rotation Parameter Table Address (RPTA, 1800BCH, bit 2~1800BEH, bit 1)
Rotation Parameter Mode (RPMD, 1800B0H, bit 1~0)
00 : Mode 0 : Rotation Parameter A
01 : Mode 1 : Rotation Parameter B
10 : Mode 2 : A image and B image are switched according to coefficient data read
from rotation parameter A coefficient table
11 : Mode 3 : A image and B image are switched according to rotation parameter window
Coefficient Line Color Enable (RxKLCE, 1800B4H)
For Rotation Parameter A (RAKLCE, 1800B4H, bit 4 )
For Rotation Parameter B (RBKLCE, 1800B4H, bit 12 )
0 : Line color screen data in coefficient data is not used
1 : Line color screen data in coefficient data is used
Coefficient Data Mode (RxKMD, 1800B4H)
For Rotation Parameter A (RAKMD, 1800B4H, bit 3~2)
For Rotation Parameter B (RBKMD, 1800B4H, bit 11~10)
00 : Mode 0 : Used as zoom coefficients kx and ky
01 : Mode 1 : Used as zoom coefficient kx
10 : Mode 2 : Used as zoom coefficient ky
11 : Mode 3 : Used as viewpoint coordinate Xp after conversion
Coefficient Data Size (RxKDBS, 1800B4H)
For Rotation Parameter A (RAKDBS, 1800B4H, bit 1 )
For Rotation Parameter B (RBKDBS, 1800B4H, bit 9 )
0 : 2 Words
1 : 1 Word
Coefficient Table Enable (RxKTE, 1800B4H)
For Rotation Parameter A (RAKTE, 1800B4H, bit 0 )
For Rotation Parameter B (RBKTE, 1800B4H, bit 8 )
0 : Does not use Coefficient Table
1 : Uses Coefficient Table
Coefficient Table Address Offset (RxKTAOS, 1800B6H)
For Rotation Parameter A (RAKTAOS, 1800B6H, bit 2~0 )
For Rotation Parameter B (RBKTAOS, 1800B6H, bit 10~8 )
284
Rotation Scroll Screen (RBG1 )
Transparent Display Enable (For NBG0) (N0TPON, 180020H, bit 8)
0 : Turns on Transparent Code
(Transparent coded dots become transparent)
1 : Turns off Transparent Code
(Transparent coded dots are displayed as per their data value)
Screen Display Enable (R1ON, 180020H, bit 5)
0 : Cannot Display (Cannot access VRAM during display)
1 : Can Display
Character Color Count (For NBG0) (N0CHCN, 180028H, bit 6~4)
000 : 16 colors (Palette Format)
001 : 256 colors (Palette Format)
010 : 2048 colors (Palette Format)
011 : 32786 colors (RGB Format)
100 : 16,770,000 colors (RBG Format)
(Display in Cell Format) See Cell Format (RBG1)
Mosaic Enable (For NBG0) (N0MZE, 180022H, bit 0)
0 : Does not execute Mosaic Process
1 : Executes Mosaic Process
Mosaic Size (MZSZx, 180022H )
Horizontal Mosaic Size (MZSZH, 180022H, bit 11~8 )
Vertical Mosaic Size (MZSZV, 180022H, bit 15~12)
ST-58-R2 285
Cell Format (RBG1 )
Character Size (For NBG0 ) (N0CHSZ, 180028H, bit 0 )
0 : 1 H Cell X 1 V Cell
1 : 2 H Cells X 2 V Cells
Pattern Name Data Size (For NBG0) (N0PNB, 180030H, bit 15)
0 : 2 Words
1 : 1 Word
1 Word (Pattern Name Data Size)
Character Number Supplementary Mode (For NBG0) (N0CNSM, 180030H, bit 14)
0 : Character number in pattern name data is 10 bits, reverse function
can be selected per character unit
1 : Character number in pattern name data is 12 bits, reverse function
cannot be selected
Special Priority (For NBG0) (N0SPR, 180030H, bit 9)
(For Pattern Name Supplementary Data)
Special Color Calculation (For NBG0 ) (N0SCC, 180030H, bit 8)
(For Pattern Name Supplementary Data)
Supplementary Palette Number (For NBG0 ) (N0SPLT, 180030H, bit 7~5 )
Supplementary Character Number (For NBG0) (N0SCN, 180030H, bit 4~0)
(For use of Rotation Parameter B) See Rotation Parameter B (RBG1)
For Rotation Parameter B (RBG1 )
Plane Size (RBPLSZ, 18003AH, bit 13~12)
00 : 1 H Page X 1 V Page
01 : 2 H Pages X 1 V Page
10 : 2 H Pages X 2 V Pages
Screen Over Process (RBOVR, 18003AH, bit 15~14 )
00 : Outside the display area it repeats the image set in the display area
01 : Outside the display area it repeats the image set in the
Screen Over Pattern Register
10 : Everything outside the display area is transparent
11 : Sets display area to 0 ≤ x < 512 and 0 ≤ y <512 regardless of the plane size or bitmap size.
Everything outside the display area is transparent.
Screen Over Pattern Name (RBOPN, 1800BAH, bit 15~0 )
Map Offset (RBMP, 18003EH, bit 6~4)
Map (RBMPx, 180060H~18006EH )
For Plane A (RBMPA, 180060H, bit 5~0 )
For Plane B (RBMPB, 180060H, bit 13~8 )
For Plane C (RBMPC, 180062H, bit 5~0 )
For Plane D (RBMPD, 180062H, bit 13~8 )
For Plane E (RBMPE, 180064H, bit 5~0 )
For Plane F (RBMPF, 180064H, bit 13~8 )
For Plane G (RBMPG, 180066H, bit 5~0 )
For Plane H (RBMPH, 180066H, bit 13~8 )
For Plane I (RBMPI, 180068H, bit 5~0)
For Plane J (RBMPJ, 180068H, bit 13~8 )
For Plane K (RBMPK, 18006AH, bit 5~0 )
For Plane L (RBMPL, 18006AH, bit 13~8 )
For Plane M (RBMPM, 18006CH, bit 5~0 )
For Plane N (RBMPN, 18006CH, bit 13~8 )
For Plane O (RBMPO, 18006EH, bit 5~0 )
For Plane P (RBMPP, 18006EH, bit 13~8 )
286
Line Color Screen (LNCL)
Line Color Screen Color Mode (LCCLMD, 1800A8H, bit 15)
0 : Single Color
1 : Select per line
Line Color Screen Table Address (LCTA, 1800A8H, bit 2~1800AAH, bit 0)
Back Screen (BACK)
Back Screen Color Mode (BKCLMD, 1800ACH, bit 15)
0 : Single Color
1 : Set each line
Back Screen Table Address (BKTA, 1800ACH, bit 2~1800AEH, bit 0)
Window
Normal Rectangular Window
W0
W1
Normal Line Window
Sprite Window : SW
Normal Rectangular Window
Window Position (For Horizontal Coordinate) (WxxX, 1800C0H~1800CCH )
W0 Start Point Coordinate (W0SX, 1800C0H, bit 9~0)
W0 End Point Coordinate (W0EX, 1800C4H, bit 9~0)
W1 Start Point Coordinate (W1SX, 1800C8H, bit 9~0)
W1 End Point Coordinate (W1EX, 1800CCH, bit 9~0)
Window Position (For Vertical Coordinate) (WxxY, 1800C2H~1800CEH )
W0 Start Point Coordinate (W0SY, 1800C2H, bit 8~0)
W0 End Point Coordinate (W0EY, 1800C6H, bit 8~0)
W1 Start Point Coordinate (W1SY, 1800CAH, bit 8~0)
W1 End Point Coordinate (W1EY, 1800CEH, bit 8~0)
Normal Line Window
Line Window Enable (WxLWE, 1800D8H~1800DCH)
For W0 (W0LWE, 1800D8H, bit 15)
For W1 (W1LWE, 1800DCH, bit 15 )
0 : Does not set normal window to line window
1 : Sets normal window to line window
Line Window Table Address (WxLWTA, 1800D8H~1800DEH)
For W0 (W0LWTA, 1800D8H, bit 2~1800DAH, bit 1 )
For W1 (W1LWTA, 1800DCH, bit 2~1800DEH, bit 1)
Sprite Window
Sprite Window Enable (SPWINEN, 1800E0H, bit 4)
0 : Does not use Sprite Window
1 : Uses Sprite Window
ST-58-R2 287
Window Control
Window Logic (xxLOG, 1800D0H~1800D6H)
For NBG0 of Transparent Process Window (or RBG1 ) (N0L0G, 1800D0H, bit 7)
For NBG1 of Transparent Process Window (or EXBG) (N1L0G, 1800D0H, bit 15)
For NBG2 of Transparent Process Window (N2L0G, 1800D2H, bit 7)
For NBG3 of Transparent Process Window (N3L0G, 1800D2H, bit 15)
For RBG0 of Transparent Process Window (R0L0G, 1800D4H, bit 7)
For Sprite of Transparent Process Window (SPL0G, 1800D4H, bit 15)
For Rotation Parameter Window (RPL0G, 1800D6H, bit 7)
For Color Calculation Window (CCL0G, 1800D6H, bit 15)
0 : OR
1 : AND
Window Enable (For W0 ) (xxW0E, 1800D0H~1800D6H )
For NBG0 of Transparent Process Window (or RBG1 ) (N0W0E, 1800D0H, bit 1)
For NBG1 of Transparent Process Window (or EXBG) (N1W0E, 1800D0H, bit 9)
For NBG2 of Transparent Process Window (N2W0E, 1800D2H, bit 1)
For NBG3 of Transparent Process Window (N3W0E, 1800D2H, bit 9)
For RBG0 of Transparent Process Window (R0W0E, 1800D4H, bit 1)
For Sprite of Transparent Process Window (SPW0E, 1800D4H, bit 9)
For Rotation Parameter Window (RPW0E, 1800D6H, bit 1)
For Color Calculation Window (CCW0E, 1800D6H, bit 9)
0 : Does not use W0 Window
1 : Uses W0 Window
Window Enable (For W1 ) (xxW1E, 1800D0H~1800D6H )
For NBG0 of Transparent Process Window (or RBG1 ) (N0W1E, 1800D0H, bit 3)
For NBG1 of Transparent Process Window (or EXBG) (N1W1E, 1800D0H, bit 11)
For NBG2 of Transparent Process Window (N2W1E, 1800D2H, bit 3)
For NBG3 of Transparent Process Window (N3W1E, 1800D2H, bit 11)
For RBG0 of Transparent Process Window (R0W1E, 1800D4H, bit 3)
For Sprite of Transparent Process Window (SPW1E, 1800D4H, bit 11)
For Rotation Parameter Window (RPW1E, 1800D6H, bit 3)
For Color Calculation Window (CCW1E, 1800D6H, bit 11)
0 : Does not use W1 Window
1 : Uses W1 Window
Window Enable (For SW ) (xxSWE, 1800D0H~1800D6H )
For NBG0 of Transparent Process Window (or RBG1 ) (N0SWE, 1800D0H, bit 5)
For NBG1 of Transparent Process Window (or EXBG) (N1SWE, 1800D0H, bit 13)
For NBG2 of Transparent Process Window (N2SWE, 1800D2H, bit 5)
For NBG3 of Transparent Process Window (N3SWE, 1800D2H, bit 13)
For RBG0 of Transparent Process Window (R0SWE, 1800D4H, bit 5)
For Sprite of Transparent Process Window (SPSWE, 1800D4H, bit 13)
For Color Calculation Window (CCSWE, 1800D6H, bit 13)
0 : Does not use SW Window
1 : Uses SW Window
(Continued)
288
Window Control (Continued)
Window Area (For W0 ) (xxW0A, 1800D0H~1800D6H )
For NBG0 of Transparent Process Window (or RBG1 ) (N0W0A, 1800D0H, bit 0)
For NBG1 of Transparent Process Window (or EXBG) (N1W0A, 1800D0H, bit 8)
For NBG2 of Transparent Process Window (N2W0A, 1800D2H, bit 0)
For NBG3 of Transparent Process Window (N3W0A, 1800D2H, bit 8)
For RBG0 of Transparent Process Window (R0W0A, 1800D4H, bit 0)
For Sprite of Transparent Process Window (SPW0A, 1800D4H, bit 8)
For Rotation Parameter Window (RPW0A, 1800D6H, bit 0)
For Color Calculation Window (CCW0A, 1800D6H, bit 8)
0 : Activates Inside of W0 Window
1 : Activates Outside of W0 Window
Window Area (For W1 ) (xxW1A, 1800D0H~1800D6H )
For NBG0 of Transparent Process Window (or RBG1 ) (N0W1A, 1800D0H, bit 2)
For NBG1 of Transparent Process Window (or EXBG) (N1W1A, 1800D0H, bit 10)
For NBG2 of Transparent Process Window (N2W1A, 1800D2H, bit 2)
For NBG3 of Transparent Process Window (N3W1A, 1800D2H, bit 10)
For RBG0 of Transparent Process Window (R0W1A, 1800D4H, bit 2)
For Sprite of Transparent Process Window (SPW1A, 1800D4H, bit 10)
For Rotation Parameter Window (RPW1A, 1800D6H, bit 2)
For Color Calculation Window (CCW1A, 1800D6H, bit 10)
0 : Activates Inside of W1 Window
1 : Activates Outside of W1 Window
Window Area (For SW ) (xxSWA, 1800D0H~1800D6H )
For NBG0 of Transparent Process Window (or RBG1 ) (N0SWA, 1800D0H, bit 4)
For NBG1 of Transparent Process Window (or EXBG) (N1SWA, 1800D0H, bit 12)
For NBG2 of Transparent Process Window (N2SWA, 1800D2H, bit 4)
For NBG3 of Transparent Process Window (N3SWA, 1800D2H, bit 12)
For RBG0 of Transparent Process Window (R0SWA, 1800D4H, bit 4)
For Sprite of Transparent Process Window (SPSWA, 1800D4H, bit 12)
For Color Calculation Window (CCSWA, 1800D6H, bit 12)
0 : Activates Inside of SW Window
1 : Activates Outside of SW Window
ST-58-R2 289
Sprite
Sprite Color Calculation Condition (SPCCCS, 1800E0H, bit 13~12)
00 : When (Priority Number) ≤ (Color Calculation Condition Number)
01 : When (Priority Number) = (Color Calculation Condition Number)
10 : When (Priority Number) ≥ (Color Calculation Condition Number)
11 : When the MSB of the Color Data is 1
Sprite Color Calculation Condition Number (SPCCN, 1800E0H, BIT 10~8)
Sprite Color Mode (SPCLMD, 1800E0H, bit 5)
0 : All sprite data is palette format only
1 : Sprite data is a combination of palette format and RGB format
Sprite Window Enable (SPWINEN, 1800E0H, bit 4 )
0 : Does not use Sprite Window
1 : Uses Sprite Window
Sprite Type (SPTYPE, 1800E0H, bit 3~0)
Priority Number (For Sprite) (SxPRIN, 1800F0H~1800F6H)
For Sprite Register 0 (S0PRIN, 1800F0H, bit 2~0)
For Sprite Register 1 (S1PRIN, 1800F0H, bit 10~8)
For Sprite Register 2 (S2PRIN, 1800F2H, bit 2~0)
For Sprite Register 3 (S3PRIN, 1800F2H, bit 10~8)
For Sprite Register 4 (S4PRIN, 1800F4H, bit 2~0)
For Sprite Register 5 (S5PRIN, 1800F4H, bit 10~8)
For Sprite Register 6 (S6PRIN, 1800F6H, bit 2~0)
For Sprite Register 7 (S7PRIN, 1800F6H, bit 10~8)
Color Calculation Ratio (For Sprite) (SxCCRT, 180100H~180106H)
For Sprite Register 0 (S0CCRT, 180100H, bit 4~0)
For Sprite Register 1 (S1CCRT, 180100H, bit 12~8)
For Sprite Register 2 (S2CCRT, 180102H, bit 4~0)
For Sprite Register 3 (S3CCRT, 180102H, bit 12~8)
For Sprite Register 4 (S4CCRT, 180104H, bit 4~0)
For Sprite Register 5 (S5CCRT, 180104H, bit 12~8)
For Sprite Register 6 (S6CCRT, 180106H, bit 4~0)
For Sprite Register 7 (S7CCRT, 180106H, bit 12~8)
290
Do t Col or Dat a
Co lor RAM Addr es s Offs et (xx CAOS, 1800E4H ~1800E6H )
FoNBG0
r ( or RBG1) (N0 CAOS, 1800E4H , bi t 2~0)
Fo rNBG1 ( or EXBG) (N1 CAOS, 1800E4H , bi t 6~4)
Fo rNBG2 (N2 CAOS, 1800E4H , bi t 10~8)
Fo rNBG3 (N3 CAOS, 1800E4H , bi t 14~12)
Fo rRBG0 (R0 CAOS, 1800E6H , bi t 2~0)
Fo r Spr ite (SPC AOS, 1800E6H, bi t 4~0)
Spec ial F unct ion C ode Sel ec t (xx SFC S, 180024H)
Fo rNBG0 ( or RBG1) (N0 SFC S, 180024H, bi t 0)
Fo r NBG1 ( or EXBG) (N1 SFC S, 180024H, bi t 1)
Fo r NBG2 (N2 SFC S, 180024H, bi t 2)
Fo r NBG3 (N3 SFC S, 180024H, bi t 3)
Fo r RBG0 (R0 SFC S, 180024H, bi t 4)
0 : Act ivat es Speci al Func ti on
Code A
1 : Act ivat es Speci al Func ti on
Code B
Spec ial F unct ion C ode ( SF CD xx , 180026H)
Fo r Spec ial F unct ion Code A (SFC DAx , 180026H, bi t 7~0)
Fo r Spec ial F unct ion Code B (SFC DBx , 180026H, bi t 15~8)
SF CDx 0 : Wh en D ot Col or Code' s ower
l 4 bi ts ar e 0H or 1H
SF CDx 1 : Wh en D ot Col or Code' s ower
l 4 bi ts ar e 2H or 3H
SF CDx 2 : Wh en D ot Col or Code' s ower
l 4 bi ts ar e 4H or 5H
SF CDx 3 : Wh en D ot Col or Code' s ower
l 4 bi ts ar e 6H or 7H
SF CDx 4 : Wh en D ot Col or Code' s ower
l 4 bi ts ar e 8H or 9H
SF CDx 5 : Wh en D ot Col or Code' s ower
l 4 bi ts ar e AH or BH
SF CDx 6 : Wh en D ot Col or Code' s ower
l 4 bi ts ar e CH or D H
SF CDx 7 : Wh en D ot Col or Code' s ower
l 4 bi ts ar e EH or FH
0 : Do es not use Speci al Func ti on
1 : Us es Spec ial F unct ion
ST-58-R2 291
Priority
Line Color Screen Insert Enable (xxLCEN, 1800E8H )
For NBG0 (or RBG1) (N0LCEN, 1800E8H, bit 0)
For NBG1 (or EXBG) (N1LCEN, 1800E8H, bit 1)
For NBG2 (N2LCEN, 1800E8H, bit 2)
For NBG3 (N3LCEN, 1800E8H, bit 3)
For RBG0 (R0LCEN, 1800E8H, bit 4)
For Sprite (SPLCEN, 1800E8H, bit 5 )
0 : Does not insert line color screen when the corresponding screen is the top image
1 : Inserts line color screen when the corresponding screen is the top image
Special Priority Mode (xxSPRM, 1800EAH)
For NBG0 (or RBG1) (N0SPRM, 1800EAH, bit 1~0)
For NBG1 (or EXBG) (N1SPRM, 1800EAH, bit 3~2)
For NBG2 (N2SPRM, 1800EAH, bit 5~4)
For NBG3 (N3SPRM, 1800EAH, bit 7~6)
For RBG0 (R0SPRM, 1800EAH, bit 9~8)
00 : Mode 0 : Selects number LSB per screen
01 : Mode 1 : Selects number LSB per character
10 : Mode 2 : Selects number LSB per dot
Special Priority Number (For Scroll Screen) (xxPRIN, 1800F8H~1800FCH)
For NBG0 (or RBG1) (N0PRIN, 1800F8H, bit 2~0)
For NBG1 (or EXBG) (N1PRIN, 1800F8H, bit 10~8)
For NBG2 (N2PRIN, 1800FAH, bit 2~0)
For NBG3 (N3PRIN, 1800FAH, bit 10~8)
For RBG0 (R0PRIN, 1800FCH, bit 2~0)
292
Color Calculation
Gradation Calculation Enable (BOKEN, 1800ECH, bit 15)
0 : Does not use Gradation Calculation Function
1 : Uses Gradation Calculation Function
Gradation Screen Number (BOKN, 1800ECH, bit 14~12)
000 : Sprite
001 : RBG0
010 : NBG0 or RBG1
100 : NBG1 or EXBG
101 : NBG2
110 : NBG3
Expanded Color Calculation Enable (EXCCEN, 1800ECH, bit 10)
0 : Does not use Expanded Color Calculation
1 : Uses Expanded Color Calculation
Color Calculation Ratio Mode (CCRTMD, 1800ECH, bit 9 )
0 : Mode 0 : In the case of color calculation, select per top image side
1 : Mode 1 : In the case of color calculation, select per second image side
Color Calculation Mode (CCMD, 1800ECH, bit 8)
0 : Mode 0 : Add according to the register value color calculation ratio
1 : Mode 1 : Add as is
Color Calculation Enable (xxCCEN, 1800ECH)
For NBG0 (or RBG1) (N0CCEN, 1800ECH, bit 0)
For NBG1 (or EXBG) (N1CCEN, 1800ECH, bit 1)
For NBG2 (N2CCEN, 1800ECH, bit 2)
For NBG3 (N3CCEN, 1800ECH, bit 3)
For RBG0 (R0CCEN, 1800ECH, bit 4)
For LNCL (LCCCEN, 1800ECH, bit 5)
For Sprite (SPCCEN, 1800ECH, bit 6 )
0 : Does not do Color Calculation
1 : Does Color Calculation
Special Color Calculation Mode (xxSCCM, 1800EEH)
For NBG0 (or RBG1) (N0SCCM, 1800EEH, bit 1~0)
For NBG1 (or EXBG) (N1SCCM, 1800EEH, bit 3~2)
For NBG2 (N2SCCM, 1800EEH, bit 5~4)
For NBG3 (N3SCCM, 1800EEH, bit 7~6)
For RBG0 (R0SCCM, 1800EEH, bit 9~8)
00 : Mode 0 : Select color calculation enable per screen
01 : Mode 1 : Select color calculation enable per character
10 : Mode 2 : Select color calculation enable per dot
11 : Mode 3 : Select color calculation enable per MSB of color data
Color Calculation Ratio (For Scroll Screen) (xxCCRT, 180108H~18010EH)
For NBG0 (or RBG1) (N0CCRT, 180108H, bit 4~0)
For NBG1 (or EXBG) (N1CCRT, 180108H, bit 12~8)
For NBG2 (N2CCRT, 18010AH, bit 4~0)
For NBG3 (N3CCRT, 18010AH, bit 12~8)
For RBG0 (R0CCRT, 18010CH, bit 4~0)
For LNCL (LCCCRT, 18010EH, bit 4~0)
For BACK (BKCCRT, 18010EH, bit 12~8 )
ST-58-R2 293
Color Offset
Color Offset Enable (xxCOEN, 180110H )
For NBG0 (or RBG1) (N0COEN, 180110H, bit 0)
For NBG1 (or EXBG) (N1COEN, 180110H, bit 1)
For NBG2 (N2COEN, 180110H, bit 2)
For NBG3 (N3COEN, 180110H, bit 3)
For RBG0 (R0COEN, 180110H, bit 4)
For BACK (BKCOEN, 180110H, bit 5)
For Sprite (SPCOEN, 180110H, bit 6 )
0 : Does not use Color Offset Function
1 : Uses Color Offset Function
Color Offset Select (xxCOSL, 180112H)
For NBG0 (or RBG1) (N0COSL, 180112H, bit 0)
For NBG1 (or EXBG) (N1COSL, 180112H, bit 1)
For NBG2 (N2COSL, 180112H, bit 2)
For NBG3 (N3COSL, 180112H, bit 3)
For RBG0 (R0COSL, 180112H, bit 4)
For BACK (BKCOSL, 180112H, bit 5)
For Sprite (SPCOSL, 180112H, bit 6)
0 : Uses value of Color Offset A
1 : Uses value of Color Offset B
Color Offset Value (COxxx, 180114H~18011EH)
For Color Offset A Red Data (COARD, 180114H, bit 8~0 )
For Color Offset A Green Data (COAGR, 180116H, bit 8~0 )
For Color Offset A Blue Data (COABL, 180118H, bit 8~0 )
For Color Offset B Red Data (COARD, 18011AH, bit 8~0 )
For Color Offset B Green Data (COAGR, 18011CH, bit 8~0 )
For Color Offset B Blue Data (COABL, 18011EH, bit 8~0 )
Shadow Function
Shadow Enable (xxSDEN, 1800E2H)
For NBG0 (or RBG1) (N0SDEN, 1800E2H, bit 0)
For NBG1 (or EXBG) (N1SDEN, 1800E2H, bit 1)
For NBG2 (N2SDEN, 1800E2H, bit 2)
For NBG3 (N3SDEN, 1800E2H, bit 3)
For RBG0 (R0SDEN, 1800E2H, bit 4)
For BACK (BKSDEN, 1800E2H, bit 5 )
0 : Does not use Shadow Function (Does not add shadow)
1 : Uses Shadow Function (Adds shadow)
Transparent Shadow Select (TPSDSL, 1800E2H)
0 : Disables Transparent Shadow Sprite
1 : Enables Transparent Shadow Sprite
294
Chapter 16 Quick Reference
16.1 Register Map.......................... . 296
16.2 Register Bit List...................... . 315
16.3 Register Bit Functions........... .. 328
16.4 Table List................................. 389
ST-58-R2 295
Quick reference contains registers and VRAM tables as follows:
(1) Register Map: Shows registers in order of addresses; shows
register bit abbreviations.
(2) Register Bit List: Shows in order of register names; shows register
bit names, bit abbreviations, addresses and bit
positions.
(3) Register Bit Functions: Shows register bit functions in order of register
address.
(4) Table List: Shows VRAM table configuration.
16.1 Register Map
(A listing of the register maps begin on the next page.)
296
• TV SCREEN MODE (READ ALLOWED)
15 14 13 12 11 10 9 8
TVMD DISP ~ ~ ~ ~ ~ ~ BDCLMD
180000H 7 6 5 4 3 2 1 0
LSMD1 LSMD0 VRESO1 VRESO0 ~ HRESO2 HRESO1 HRESO0
• EXTERNAL SIGNAL ENABLE REGISTER (READ ALLOWED)
15 14 13 12 11 10 9 8
EXTEN ~ ~ ~ ~ ~ ~ EXLTEN EXSYEN
180002H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ DASEL EXBGEN
• SCREEN STATUS (READ ONLY)
15 14 13 12 11 10 9 8
TVSTAT ~ ~ ~ ~ ~ ~ EXLTFG EXSYFG
180004H 7 6 5 4 3 2 1 0
~ ~ ~ ~ VBLANK HBLANK ODD PAL
• VRAM SIZE (READ ALLOWED)
15 14 13 12 11 10 9 8
VRSIZE VRAMSZ ~ ~ ~ ~ ~ ~ ~
180006H 7 6 5 4 3 2 1 0
~ ~ ~ ~ VER3 VER2 VER1 VER0
• H-COUNTER (READ ONLY)
15 14 13 12 11 10 9 8
HCNT ~ ~ ~ ~ ~ ~ HCT9 HCT8
180008H 7 6 5 4 3 2 1 0
HCT7 HCT6 HCT5 HCT4 HCT3 HCT2 HCT1 HCT0
• V-COUNTER (READ ONLY)
15 14 13 12 11 10 9 8
VCNT ~ ~ ~ ~ ~ ~ VCT9 VCT8
18000AH 7 6 5 4 3 2 1 0
VCT7 VCT6 VCT5 VCT4 VCT3 VCT2 VCT1 VCT0
• RESERVE
15 14 13 12 11 10 9 8
~ ~ ~ ~ ~ ~ ~ ~
18000CH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
• RAM CONTROL (READ ALLOWED)
15 14 13 12 11 10 9 8
RAMCTL ~ ~ CRMD1 CRMD0 ~ ~ VRBMD VRAMD
18000EH 7 6 5 4 3 2 1 0
RDBSB11 RDBSB10 RDBSB01 RDBSB00 RDBSA11 RDBSA10 RDBSA01 RDBSA00
ST-58-R2 297
• VRAM CYCLE PATTERN (BANK A0)
15 14 13 12 11 10 9 8
CYCA0L VCP0A03 VCP0A02 VCP0A01 VCP0A00 VCP1A03 VCP1A02 VCP1A01 VCP1A00
180010H 7 6 5 4 3 2 1 0
VCP2A03 VCP2A02 VCP2A01 VCP2A00 VCP3A03 VCP3A02 VCP3A01 VCP3A00
• VRAM CYCLE PATTERN (BANK A0)
15 14 13 12 11 10 9 8
CYCA0U VCP4A03 VCP4A02 VCP4A01 VCP4A00 VCP5A03 VCP5A02 VCP5A01 VCP5A00
180012H 7 6 5 4 3 2 1 0
VCP6A03 VCP6A02 VCP6A01 VCP6A00 VCP7A03 VCP7A02 VCP7A01 VCP7A00
• VRAM CYCLE PATTERN (BANK A1)
15 14 13 12 11 10 9 8
CYCA1L VCP0A13 VCP0A12 VCP0A11 VCP0A10 VCP1A13 VCP1A12 VCP1A11 VCP1A10
180014H 7 6 5 4 3 2 1 0
VCP2A13 VCP2A12 VCP2A11 VCP2A10 VCP3A13 VCP3A12 VCP3A11 VCP3A10
• VRAM CYCLE PATTERN (BANK A1)
15 14 13 12 11 10 9 8
CYCA1U VCP4A13 VCP4A12 VCP4A11 VCP4A10 VCP5A13 VCP5A12 VCP5A11 VCP5A10
180016H 7 6 5 4 3 2 1 0
VCP6A13 VCP6A12 VCP6A11 VCP6A10 VCP7A13 VCP7A12 VCP7A11 VCP7A10
• VRAM CYCLE PATTERN (BANK BO)
15 14 13 12 11 10 9 8
CYCB0L VCP0B03 VCP0B02 VCP0B01 VCP0B00 VCP1B03 VCP1B02 VCP1B01 VCP1B00
180018H 7 6 5 4 3 2 1 0
VCP2B03 VCP2B02 VCP2B01 VCP2B00 VCP3B03 VCP3B02 VCP3B01 VCP3B00
• VRAM CYCLE PATTERN (BANK BO)
15 14 13 12 11 10 9 8
CYCB0U VCP4B03 VCP4B02 VCP4B01 VCP4B00 VCP5B03 VCP5B02 VCP5B01 VCP5B00
18001AH 7 6 5 4 3 2 1 0
VCP6B03 VCP6B02 VCP6B01 VCP6B00 VCP7B03 VCP7B02 VCP7B01 VCP7B00
• VRAM CYCLE PATTERN (BANK B1)
15 14 13 12 11 10 9 8
CYCB1L VCP0B13 VCP0B12 VCP0B11 VCP0B10 VCP1B13 VCP1B12 VCP1B11 VCP1B10
18001CH 7 6 5 4 3 2 1 0
VCP2B13 VCP2B12 VCP2B11 VCP2B10 VCP3B13 VCP3B12 VCP3B11 VCP3B10
• VRAM CYCLE PATTERN (BANK B1)
15 14 13 12 11 10 9 8
CYCB1U VCP4B13 VCP4B12 VCP4B11 VCP4B10 VCP5B13 VCP5B12 VCP5B11 VCP5B10
18001EH 7 6 5 4 3 2 1 0
VCP6B13 VCP6B12 VCP6B11 VCP6B10 VCP7B13 VCP7B12 VCP7B11 VCP7B10
298
• SCREEN DISPLAY ENABLE
15 14 13 12 11 10 9 8
BGON ~ ~ ~ R0TPON N3TPON N2TPON N1TPON N0TPON
180020H 7 6 5 4 3 2 1 0
~ ~ R1ON R0ON N3ON N2ON N1ON N0ON
• MOSAIC CONTROL
15 14 13 12 11 10 9 8
MZCTL MZSZV3 MZSZV2 MZSZV1 MZSZV0 MZSZH3 MZSZH2 MZSZH1 MZSZH0
180022H 7 6 5 4 3 2 1 0
~ ~ ~ R0MZE N3MZE N2MZE N1MZE N0MZE
• SPECIAL FUNCTION CODE SELECT
15 14 13 12 11 10 9 8
SFSEL ~ ~ ~ ~ ~ ~ ~ ~
180024H 7 6 5 4 3 2 1 0
~ ~ ~ R0SFCS N3SFCS N2SFCS N1SFCS N0SFCS
• SPECIAL FUNCTION CODE
15 14 13 12 11 10 9 8
SFCODE SFCDB7 SFCDB6 SFCDB5 SFCDB4 SFCDB3 SFCDB2 SFCDB1 SFCDB0
180026H 7 6 5 4 3 2 1 0
SFCDA7 SFCDA6 SFCDA5 SFCDA4 SFCDA3 SFCDA2 SFCDA1 SFCDA0
• CHARACTER CONTROL (NBG0, NBG1)
15 14 13 12 11 10 9 8
CHCTLA ~ ~ N1CHCN1 N1CHCN0 N1BMSZ1 N1BMSZ0 N1BMEN N1CHSZ
180028H 7 6 5 4 3 2 1 0
~ N0CHCN2 N0CHCN1 N0CHCN0 N0BMSZ1 N0BMSZ0 N0BMEN N0CHSZ
• CHARACTER CONTROL (NBG2, NBG3, RBG0)
15 14 13 12 11 10 9 8
CHCTLB ~ R0CHCN2 R0CHCN1 R0CHCN0 ~ R0BMSZ R0BMEN R0CHSZ
18002AH 7 6 5 4 3 2 1 0
~ ~ N3CHCN N3CHSZ ~ ~ N2CHCN N2CHSZ
• BITMAP PALETTE NUMBER (NBGO, NBG1)
15 14 13 12 11 10 9 8
BMPNA ~ ~ N1BMPR N1BMCC ~ N1BMP6 N1BMP5 N1BMP4
18002CH 7 6 5 4 3 2 1 0
~ ~ N0BMPR N0BMCC ~ N0BMP6 N0BMP5 N0BMP4
• BITMAP PALETTE NUMBER (RBG0)
15 14 13 12 11 10 9 8
BMPNB ~ ~ ~ ~ ~ ~ ~ ~
18002EH 7 6 5 4 3 2 1 0
~ ~ R0BMPR R0BMCC ~ R0BMP6 R0BMP5 R0BMP4
ST-58-R2 299
• PATTERN NAME CONTROL (NBG0)
15 14 13 12 11 10 9 8
PNCN0 N0PNB N0CNSM ~ ~ ~ ~ N0SPR N0SCC
180030H 7 6 5 4 3 2 1 0
N0SPLT6 N0SPLT5 N0SPLT4 N0SCN4 N0SCN3 N0SCN2 N0SCN1 N0SCN0
• PATTERN NAME CONTROL (NBG1)
15 14 13 12 11 10 9 8
PNCN1 N1PNB N1CNSM ~ ~ ~ ~ N1SPR N1SCC
180032H 7 6 5 4 3 2 1 0
N1SPLT6 N1SPLT5 N1SPLT4 N1SCN4 N1SCN3 N1SCN2 N1SCN1 N1SCN0
• PATTERN NAME CONTROL (NBG2)
15 14 13 12 11 10 9 8
PNCN2 N2PNB N2CNSM ~ ~ ~ ~ N2SPR N2SCC
180034H 7 6 5 4 3 2 1 0
N2SPLT6 N2SPLT5 N2SPLT4 N2SCN4 N2SCN3 N2SCN2 N2SCN1 N2SCN0
• PATTERN NAME CONTROL (NBG3)
15 14 13 12 11 10 9 8
PNCN3 N3PNB N3CNSM ~ ~ ~ ~ N3SPR N3SCC
180036H 7 6 5 4 3 2 1 0
N3SPLT6 N3SPLT5 N3SPLT4 N3SCN4 N3SCN3 N3SCN2 N3SCN1 N3SCN0
• PATTERN NAME CONTROL (RBG0)
15 14 13 12 11 10 9 8
PNCR R0PNB R0CNSM ~ ~ ~ ~ R0SPR R0SCC
180038H 7 6 5 4 3 2 1 0
R0SPLT6 R0SPLT5 R0SPLT4 R0SCN4 R0SCN3 R0SCN2 R0SCN1 R0SCN0
• PLANE SIZE
15 14 13 12 11 10 9 8
PLSZ RBOVR1 RBOVR0 RBPLSZ1 RBPLSZ0 RAOVR1 RAOVR0 RAPLSZ1 RAPLSZ0
18003AH 7 6 5 4 3 2 1 0
N3PLSZ1 N3PLSZ0 N2PLSZ1 N2PLSZ0 N1PLSZ1 N1PLSZ0 N0PLSZ1 N0PLSZ0
• MAP OFFSET (NBG0~NBG3)
15 14 13 12 11 10 9 8
MPOFN ~ N3MP8 N3MP7 N3MP6 ~ N2MP8 N2MP7 N2MP6
18003CH 7 6 5 4 3 2 1 0
~ N1MP8 N1MP7 N1MP6 ~ N0MP8 N0MP7 N0MP6
• MAP OFFSET (ROTATION PARAMETER A,B)
15 14 13 12 11 10 9 8
MPOFR ~ ~ ~ ~ ~ ~ ~ ~
18003EH 7 6 5 4 3 2 1 0
~ RBMP8 RBMP7 RBMP6 ~ RAMP8 RAMP7 RAMP6
300
• MAP (NBG0, PLANE A,B)
15 14 13 12 11 10 9 8
MPABN0 ~ ~ N0MPB5 N0MPB4 N0MPB3 N0MPB2 N0MPB1 N0MPB0
180040H 7 6 5 4 3 2 1 0
~ ~ N0MPA5 N0MPA4 N0MPA3 N0MPA2 N0MPA1 N0MPA0
• MAP (NBG0, PLANE C,D)
15 14 13 12 11 10 9 8
MPCDN0 ~ ~ N0MPD5 N0MPD4 N0MPD3 N0MPD2 N0MPD1 N0MPD0
180042H 7 6 5 4 3 2 1 0
~ ~ N0MPC5 N0MPC4 N0MPC3 N0MPC2 N0MPC1 N0MPC0
• MAP (NBG1, PLANE A,B)
15 14 13 12 11 10 9 8
MPABN1 ~ ~ N1MPB5 N1MPB4 N1MPB3 N1MPB2 N1MPB1 N1MPB0
180044H 7 6 5 4 3 2 1 0
~ ~ N1MPA5 N1MPA4 N1MPA3 N1MPA2 N1MPA1 N1MPA0
• MAP (NBG1, PLANE C,D)
15 14 13 12 11 10 9 8
MPCDN1 ~ ~ N1MPD5 N1MPD4 N1MPD3 N1MPD2 N1MPD1 N1MPD0
180046H 7 6 5 4 3 2 1 0
~ ~ N1MPC5 N1MPC4 N1MPC3 N1MPC2 N1MPC1 N1MPC0
• MAP (NBG2, PLANE A,B)
15 14 13 12 11 10 9 8
MPABN2 ~ ~ N2MPB5 N2MPB4 N2MPB3 N2MPB2 N2MPB1 N2MPB0
180048H 7 6 5 4 3 2 1 0
~ ~ N2MPA5 N2MPA4 N2MPA3 N2MPA2 N2MPA1 N2MPA0
• MAP (NBG2, PLANE C,D)
15 14 13 12 11 10 9 8
MPCDN2 ~ ~ N2MPD5 N2MPD4 N2MPD3 N2MPD2 N2MPD1 N2MPD0
18004AH 7 6 5 4 3 2 1 0
~ ~ N2MPC5 N2MPC4 N2MPC3 N2MPC2 N2MPC1 N2MPC0
• MAP (NBG3, PLANE A,B)
15 14 13 12 11 10 9 8
MPABN3 ~ ~ N3MPB5 N3MPB4 N3MPB3 N3MPB2 N3MPB1 N3MPB0
18004CH 7 6 5 4 3 2 1 0
~ ~ N3MPA5 N3MPA4 N3MPA3 N3MPA2 N3MPA1 N3MPA0
• MAP (NBG3, PLANE C,D)
15 14 13 12 11 10 9 8
MPCDN3 ~ ~ N3MPD5 N3MPD4 N3MPD3 N3MPD2 N3MPD1 N3MPD0
18004EH 7 6 5 4 3 2 1 0
~ ~ N3MPC5 N3MPC4 N3MPC3 N3MPC2 N3MPC1 N3MPC0
ST-58-R2 301
• MAP (ROTATION PARAMETER A, PLANE A,B)
15 14 13 12 11 10 9 8
MPABRA ~ ~ RAMPB5 RAMPB4 RAMPB3 RAMPB2 RAMPB1 RAMPB0
180050H 7 6 5 4 3 2 1 0
~ ~ RAMPA5 RAMPA4 RAMPA3 RAMPA2 RAMPA1 RAMPA0
• MAP (ROTATION PARAMETER A, PLANE C,D)
15 14 13 12 11 10 9 8
MPCDRA ~ ~ RAMPD5 RAMPD4 RAMPD3 RAMPD2 RAMPD1 RAMPD0
180052H 7 6 5 4 3 2 1 0
~ ~ RAMPC5 RAMPC4 RAMPC3 RAMPC2 RAMPC1 RAMPC0
• MAP (ROTATION PARAMETER A, PLANE E,F)
15 14 13 12 11 10 9 8
MPEFRA ~ ~ RAMPF5 RAMPF4 RAMPF3 RAMPF2 RAMPF1 RAMPF0
180054 7 6 5 4 3 2 1 0
~ ~ RAMPE5 RAMPE4 RAMPE3 RAMPE2 RAMPE1 RAMPE0
• MAP (ROTATION PARAMETER A, PLANE G,H)
15 14 13 12 11 10 9 8
MPGHRA ~ ~ RAMPH5 RAMPH4 RAMPH3 RAMPH2 RAMPH1 RAMPH0
180056H 7 6 5 4 3 2 1 0
~ ~ RAMPG5 RAMPG4 RAMPG3 RAMPG2 RAMPG1 RAMPG0
• MAP (ROTATION PARAMETER A, PLANE I,J)
15 14 13 12 11 10 9 8
MPIJRA ~ ~ RAMPJ5 RAMPJ4 RAMPJ3 RAMPJ2 RAMPJ1 RAMPJ0
180058H 7 6 5 4 3 2 1 0
~ ~ RAMPI5 RAMPI4 RAMPI3 RAMPI2 RAMPI1 RAMPI0
• MAP (ROTATION PARAMETER A, PLANE K,L)
15 14 13 12 11 10 9 8
MPKLRA ~ ~ RAMPL5 RAMPL4 RAMPL3 RAMPL2 RAMPL1 RAMPL0
18005AH 7 6 5 4 3 2 1 0
~ ~ RAMPK5 RAMPK4 RAMPK3 RAMPK2 RAMPK1 RAMPK0
• MAP (ROTATION PARAMETER A, PLANE M,N)
15 14 13 12 11 10 9 8
MPMNRA ~ ~ RAMPN5 RAMPN4 RAMPN3 RAMPN2 RAMPN1 RAMPN0
18005CH 7 6 5 4 3 2 1 0
~ ~ RAMPM5 RAMPM4 RAMPM3 RAMPM2 RAMPM1 RAMPM0
• MAP (ROTATION PARAMETER A, PLANE O,P)
15 14 13 12 11 10 9 8
MPOPRA ~ ~ RAMPP5 RAMPP4 RAMPP3 RAMPP2 RAMPP1 RAMPP0
18005EH 7 6 5 4 3 2 1 0
~ ~ RAMPO5 RAMPO4 RAMPO3 RAMPO2 RAMPO1 RAMPO0
302
• MAP (ROTATION PARAMETER B, PLANE A,B)
15 14 13 12 11 10 9 8
MPABRB ~ ~ RBMPB5 RBMPB4 RBMPB3 RBMPB2 RBMPB1 RBMPB0
180060H 7 6 5 4 3 2 1 0
~ ~ RBMPA5 RBMPA4 RBMPA3 RBMPA2 RBMPA1 RBMPA0
• MAP (ROTATION PARAMETER B, PLANE C,D)
15 14 13 12 11 10 9 8
MPCDRB ~ ~ RBMPD5 RBMPD4 RBMPD3 RBMPD2 RBMPD1 RBMPD0
180062H 7 6 5 4 3 2 1 0
~ ~ RBMPC5 RBMPC4 RBMPC3 RBMPC2 RBMPC1 RBMPC0
• MAP (ROTATION PARAMETER B, PLANE E,F)
15 14 13 12 11 10 9 8
MPEFRB ~ ~ RBMPF5 RBMPF4 RBMPF3 RBMPF2 RBMPF1 RBMPF0
180064 7 6 5 4 3 2 1 0
~ ~ RBMPE5 RBMPE4 RBMPE3 RBMPE2 RBMPE1 RBMPE0
• MAP (ROTATION PARAMETER B, PLANE G,H)
15 14 13 12 11 10 9 8
MPGHRB ~ ~ RBMPH5 RBMPH4 RBMPH3 RBMPH2 RBMPH1 RBMPH0
180066H 7 6 5 4 3 2 1 0
~ ~ RBMPG5 RBMPG4 RBMPG3 RBMPG2 RBMPG1 RBMPG0
• MAP (ROTATION PARAMETER B, PLANE I,J)
15 14 13 12 11 10 9 8
MPIJRB ~ ~ RBMPJ5 RBMPJ4 RBMPJ3 RBMPJ2 RBMPJ1 RBMPJ0
180068H 7 6 5 4 3 2 1 0
~ ~ RBMPI5 RBMPI4 RBMPI3 RBMPI2 RBMPI1 RBMPI0
• MAP (ROTATION PARAMETER B, PLANE K,L)
15 14 13 12 11 10 9 8
MPKLRB ~ ~ RBMPL5 RBMPL4 RBMPL3 RBMPL2 RBMPL1 RBMPL0
18006AH 7 6 5 4 3 2 1 0
~ ~ RBMPK5 RBMPK4 RBMPK3 RBMPK2 RBMPK1 RBMPK0
• MAP (ROTATION PARAMETER B, PLANE M,N)
15 14 13 12 11 10 9 8
MPMNRB ~ ~ RBMPN5 RBMPN4 RBMPN3 RBMPN2 RBMPN1 RBMPN0
18006CH 7 6 5 4 3 2 1 0
~ ~ RBMPM5 RBMPM4 RBMPM3 RBMPM2 RBMPM1 RBMPM0
• MAP (ROTATION PARAMETER B, PLANE O,P)
15 14 13 12 11 10 9 8
MPOPRB ~ ~ RBMPP5 RBMPP4 RBMPP3 RBMPP2 RBMPP1 RBMPP0
18006EH 7 6 5 4 3 2 1 0
~ ~ RBMPO5 RBMPO4 RBMPO3 RBMPO2 RBMPO1 RBMPO0
ST-58-R2 303
• SCREEN SCROLL VALUE (NBG0, HORIZONTAL INTEGER PART)
15 14 13 12 11 10 9 8
SCXIN0 ~ ~ ~ ~ ~ N0SCXI10 N0SCXI9 N0SCXI8
180070H 7 6 5 4 3 2 1 0
N0SCXI7 N0SCXI6 N0SCXI5 N0SCXI4 N0SCXI3 N0SCXI2 N0SCXI1 N0SCXI0
• SCREEN SCROLL VALUE (NBG0, HORIZONTAL FRACTIONAL PART)
15 14 13 12 11 10 9 8
SCXDN0 N0SCXD1 N0SCXD2 N0SCXD3 N0SCXD4 N0SCXD5 N0SCXD6 N0SCXD7 N0SCXD8
180072H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
• SCREEN SCROLL VALUE (NBG0, VERTICAL INTEGER PART)
15 14 13 12 11 10 9 8
SCYIN0 ~ ~ ~ ~ ~ N0SCYI10 N0SCYI9 N0SCYI8
180074H 7 6 5 4 3 2 1 0
N0SCYI7 N0SCYI6 N0SCYI5 N0SCYI4 N0SCYI3 N0SCYI2 N0SCYI1 N0SCYI0
• SCREEN SCROLL VALUE (NBG0, VERTICAL FRACTIONAL PART)
15 14 13 12 11 10 9 8
SCYDN0 N0SCYD1 N0SCYD2 N0SCYD3 N0SCYD4 N0SCYD5 N0SCYD6 N0SCYD7 N0SCYD8
180076H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
• COORDINATE INCREMENT (NBG0, HORIZONTAL INTEGER PART)
15 14 13 12 11 10 9 8
ZMXIN0 ~ ~ ~ ~ ~ ~ ~ ~
180078H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N0ZMXI2 N0ZMXI1 N0ZMXI0
• COORDINATE INCREMENT (NBG0, HORIZONTAL FRACTIONAL PART)
15 14 13 12 11 10 9 8
ZMXDN0 N0ZMXD1 N0ZMXD2 N0ZMXD3 N0ZMXD4 N0ZMXD5 N0ZMXD6 N0ZMXD7 N0ZMXD8
18007AH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
• COORDINATE INCREMENT (NBG0, VERTICAL INTEGER PART)
15 14 13 12 11 10 9 8
ZMYIN0 ~ ~ ~ ~ ~ ~ ~ ~
18007CH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N0ZMYI2 N0ZMYI1 N0ZMYI0
• COORDINATE INCREMENT (NBG0, VERTICAL FRACTIONAL PART)
15 14 13 12 11 10 9 8
ZMYDN0 N0ZMYD1 N0ZMYD2 N0ZMYD3 N0ZMYD4 N0ZMYD5 N0ZMYD6 N0ZMYD7 N0ZMYD8
18007EH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
304
• SCREEN SCROLL VALUE (NBG1, HORIZONTAL INTEGER PART)
15 14 13 12 11 10 9 8
SCXIN1 ~ ~ ~ ~ ~ N1SCXI10 N1SCXI9 N1SCXI8
180080H 7 6 5 4 3 2 1 0
N1SCXI7 N1SCXI6 N1SCXI5 N1SCXI4 N1SCXI3 N1SCXI2 N1SCXI1 N1SCXI0
• SCREEN SCROLL VALUE (NBG1, HORIZONTAL FRACTIONAL PART)
15 14 13 12 11 10 9 8
SCXDN1 N1SCXD1 N1SCXD2 N1SCXD3 N1SCXD4 N1SCXD5 N1SCXD6 N1SCXD7 N1SCXD8
180082H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
• SCREEN SCROLL VALUE (NBG1, VERTICAL INTEGER PART)
15 14 13 12 11 10 9 8
SCYIN1 ~ ~ ~ ~ ~ N1SCYI10 N1SCYI9 N1SCYI8
180084H 7 6 5 4 3 2 1 0
N1SCYI7 N1SCYI6 N1SCYI5 N1SCYI4 N1SCYI3 N1SCYI2 N1SCYI1 N1SCYI0
• SCREEN SCROLL VALUE (NBG1, VERTICAL FRACTIONAL PART)
15 14 13 12 11 10 9 8
SCYDN1 N1SCYD1 N1SCYD2 N1SCYD3 N1SCYD4 N1SCYD5 N1SCYD6 N1SCYD7 N1SCYD8
180086H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
• COORDINATE INCREMENT (NBG1, HORIZONTAL INTEGER PART)
15 14 13 12 11 10 9 8
ZMXIN1 ~ ~ ~ ~ ~ ~ ~ ~
180088H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N1ZMXI2 N1ZMXI1 N1ZMXI0
• COORDINATE INCREMENT (NBG1, HORIZONTAL FRACTIONAL PART)
15 14 13 12 11 10 9 8
ZMXDN1 N1ZMXD1 N1ZMXD2 N1ZMXD3 N1ZMXD4 N1ZMXD5 N1ZMXD6 N1ZMXD7 N1ZMXD8
18008AH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
• COORDINATE INCREMENT (NBG1, VERTICAL INTEGER PART)
15 14 13 12 11 10 9 8
ZMYIN1 ~ ~ ~ ~ ~ ~ ~ ~
18008CH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N1ZMYI2 N1ZMYI1 N1ZMYI0
• COORDINATE INCREMENT (NBG1, VERTICAL FRACTIONAL PART)
15 14 13 12 11 10 9 8
ZMYDN1 N1ZMYD1 N1ZMYD2 N1ZMYD3 N1ZMYD4 N1ZMYD5 N1ZMYD6 N1ZMYD7 N1ZMYD8
18008EH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
ST-58-R2 305
• SCREEN SCROLL VALUE (NBG2, HORIZONTAL)
15 14 13 12 11 10 9 8
SCXN2 ~ ~ ~ ~ ~ N2SCX10 N2SCX9 N2SCX8
180090H 7 6 5 4 3 2 1 0
N2SCX7 N2SCX6 N2SCX5 N2SCX4 N2SCX3 N2SCX2 N2SCX1 N2SCX0
• SCREEN SCROLL VALUE (NBG2, VERTICAL)
15 14 13 12 11 10 9 8
SCYN2 ~ ~ ~ ~ ~ N2SCY10 N2SCY9 N2SCY8
180092H 7 6 5 4 3 2 1 0
N2SCY7 N2SCY6 N2SCY5 N2SCY4 N2SCY3 N2SCY2 N2SCY1 N2SCY0
• SCREEN SCROLL VALUE (NBG3, HORIZONTAL)
15 14 13 12 11 10 9 8
SCXN3 ~ ~ ~ ~ ~ N3SCX10 N3SCX9 N3SCX8
180094H 7 6 5 4 3 2 1 0
N3SCX7 N3SCX6 N3SCX5 N3SCX4 N3SCX3 N3SCX2 N3SCX1 N3SCX0
• SCREEN SCROLL VALUE (NBG3, VERTICAL)
15 14 13 12 11 10 9 8
SCYN3 ~ ~ ~ ~ ~ N3SCY10 N3SCY9 N3SCY8
180096H 7 6 5 4 3 2 1 0
N3SCY7 N3SCY6 N3SCY5 N3SCY4 N3SCY3 N3SCY2 N3SCY1 N3SCY0
• REDUCTION ENABLE
15 14 13 12 11 10 9 8
ZMCTL ~ ~ ~ ~ ~ ~ N1ZMQT N1ZMHF
180098H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ N0ZMQT N0ZMHF
• LINE AND VERTICAL CELL SCROLL CONTROL (NBGO, NBG1)
15 14 13 12 11 10 9 8
SCRCTL ~ ~ N1LSS1 N1LSS0 N1LZMX N1LSCY N1LSCX N1VCSC
18009AH 7 6 5 4 3 2 1 0
~ ~ N0LSS1 N0LSS0 N0LZMX N0LSCY N0LSCX N0VCSC
• VERTICAL CELL SCROLL TABLE ADDRESS (NBGO, NBG1)
15 14 13 12 11 10 9 8
VCSTAU ~ ~ ~ ~ ~ ~ ~ ~
18009CH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ VCSTA18 VCSTA17 VCSTA16
• VERTICAL CELL SCROLL TABLE ADDRESS (NBGO, NBG1)
15 14 13 12 11 10 9 8
VCSTAL VCSTA15 VCSTA14 VCSTA13 VCSTA12 VCSTA11 VCSTA10 VCSTA9 VCSTA8
18009EH 7 6 5 4 3 2 1 0
VCSTA7 VCSTA6 VCSTA5 VCSTA4 VCSTA3 VCSTA2 VCSTA1 ~
306
• LINE SCROLL TABLE ADDRESS (NBGO)
15 14 13 12 11 10 9 8
LSTA0U ~ ~ ~ ~ ~ ~ ~ ~
1800A0H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N0LSTA18 N0LSTA17 N0LSTA16
• LINE SCROLL TABLE ADDRESS (NBGO)
15 14 13 12 11 10 9 8
LSTA0L N0LSTA15 N0LSTA14 N0LSTA13 N0LSTA12 N0LSTA11 N0LSTA10 N0LSTA9 N0LSTA8
1800A2H 7 6 5 4 3 2 1 0
N0LSTA7 N0LSTA6 N0LSTA5 N0LSTA4 N0LSTA3 N0LSTA2 N0LSTA1 ~
• LINE SCROLL TABLE ADDRESS (NBG1)
15 14 13 12 11 10 9 8
LSTA1U ~ ~ ~ ~ ~ ~ ~ ~
1800A4H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N1LSTA18 N1LSTA17 N1LSTA16
• LINE SCROLL TABLE ADDRESS (NBG1)
15 14 13 12 11 10 9 8
LSTA1L N1LSTA15 N1LSTA14 N1LSTA13 N1LSTA12 N1LSTA11 N1LSTA10 N1LSTA9 N1LSTA8
1800A6H 7 6 5 4 3 2 1 0
N1LSTA7 N1LSTA6 N1LSTA5 N1LSTA4 N1LSTA3 N1LSTA2 N1LSTA1 ~
• LINE COLOR SCREEN TABLE ADDRESS
15 14 13 12 11 10 9 8
LCTAU LCCLMD ~ ~ ~ ~ ~ ~ ~
1800A8H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ LCTA18 LCTA17 LCTA16
• LINE COLOR SCREEN TABLE ADDRESS
15 14 13 12 11 10 9 8
LCTAL LCTA15 LCTA14 LCTA13 LCTA12 LCTA11 LCTA10 LCTA9 LCTA8
1800AAH 7 6 5 4 3 2 1 0
LCTA7 LCTA6 LCTA5 LCTA4 LCTA3 LCTA2 LCTA1 LCTA0
• BACK SCREEN TABLE ADDRESS
15 14 13 12 11 10 9 8
BKTAU BKCLMD ~ ~ ~ ~ ~ ~ ~
1800ACH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ BKTA18 BKTA17 BKTA16
• BACK SCREEN TABLE ADDRESS
15 14 13 12 11 10 9 8
BKTAL BKTA15 BKTA14 BKTA13 BKTA12 BKTA11 BKTA10 BKTA9 BKTA8
1800AEH 7 6 5 4 3 2 1 0
BKTA7 BKTA6 BKTA5 BKTA4 BKTA3 BKTA2 BKTA1 BKTA0
ST-58-R2 307
• ROTATION PARAMETER MODE
15 14 13 12 11 10 9 8
RPMD ~ ~ ~ ~ ~ ~ ~ ~
1800B0H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ RPMD1 RPMD0
• ROTATION PARAMETER READ CONTROL
15 14 13 12 11 10 9 8
RPRCTL ~ ~ ~ ~ ~ RBKASTRE RBYSTRE RBXSTRE
1800B2H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ RAKASTRE RAYSTRE RAXSTRE
• COEFFICIENT TABLE CONTROL
15 14 13 12 11 10 9 8
KTCTL ~ ~ ~ RBKLCE RBKMD1 RBKMD0 RBKDBS RBKTE
1800B4H 7 6 5 4 3 2 1 0
~ ~ ~ RAKLCE RAKMD1 RAKMD0 RAKDBS RAKTE
• COEFFICIENT TABLE ADDRESS OFFSET (ROTATION PARAMETER A, B)
15 14 13 12 11 10 9 8
KTAOF ~ ~ ~ ~ ~ RBKTAOS2 RBKTAOS1 RBKTAOS0
1800B6H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ RAKTAOS2 RAKTAOS1 RAKTAOS0
• SCREEN OVER PATTERN NAME (ROTATION PARAMETER A)
15 14 13 12 11 10 9 8
OVPNRA RAOPN15 RAOPN14 RAOPN13 RAOPN12 RAOPN11 RAOPN10 RAOPN9 RAOPN8
1800B8H 7 6 5 4 3 2 1 0
RAOPN7 RAOPN6 RAOPN5 RAOPN4 RAOPN3 RAOPN2 RAOPN1 RAOPN0
• SCREEN OVER PATTERN NAME (ROTATION PARAMETER B)
15 14 13 12 11 10 9 8
OVPNRB RBOPN15 RBOPN14 RBOPN13 RBOPN12 RBOPN11 RBOPN10 RBOPN9 RBOPN8
1800BAH 7 6 5 4 3 2 1 0
RBOPN7 RBOPN6 RBOPN5 RBOPN4 RBOPN3 RBOPN2 RBOPN1 RBOPN0
• ROTATION PARAMETER TABLE ADDRESS (ROTATION PARAMETER A,B)
15 14 13 12 11 10 9 8
RPTAU ~ ~ ~ ~ ~ ~ ~ ~
1800BCH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ RPTA18 RPTA17 RPTA16
• ROTATION PARAMETER TABLE ADDRESS (ROTATION PARAMETER A, B)
15 14 13 12 11 10 9 8
RPTAL RPTA15 RPTA14 RPTA13 RPTA12 RPTA11 RPTA10 RPTA9 RPTA8
1800BEH 7 6 5 4 3 2 1 0
RPTA7 RPTA6 RPTA5 RPTA4 RPTA3 RPTA2 RPTA1 ~
308
• WINDOW POSITION (W0, HORIZONTAL START POINT)
15 14 13 12 11 10 9 8
WPSX0 ~ ~ ~ ~ ~ ~ W0SX9 W0SX8
1800C0H 7 6 5 4 3 2 1 0
W0SX7 W0SX6 W0SX5 W0SX4 W0SX3 W0SX2 W0SX1 W0SX0
• WINDOW POSITION (W0, VERTICAL START POINT)
15 14 13 12 11 10 9 8
WPSY0 ~ ~ ~ ~ ~ ~ ~ W0SY8
1800C2H 7 6 5 4 3 2 1 0
W0SY7 W0SY6 W0SY5 W0SY4 W0SY3 W0SY2 W0SY1 W0SY0
• WINDOW POSITION (W0, HORIZONTAL END POINT)
15 14 13 12 11 10 9 8
WPEX0 ~ ~ ~ ~ ~ ~ W0EX9 W0EX8
1800C4H 7 6 5 4 3 2 1 0
W0EX7 W0EX6 W0EX5 W0EX4 W0EX3 W0EX2 W0EX1 W0EX0
• WINDOW POSITION (W0, VERTICAL END POINT)
15 14 13 12 11 10 9 8
WPEY0 ~ ~ ~ ~ ~ ~ ~ W0EY8
1800C6H 7 6 5 4 3 2 1 0
W0EY7 W0EY6 W0EY5 W0EY4 W0EY3 W0EY2 W0EY1 W0EY0
• WINDOW POSITION (W1, HORIZONTAL START POINT)
15 14 13 12 11 10 9 8
WPSX1 ~ ~ ~ ~ ~ ~ W1SX9 W1SX8
1800C8H 7 6 5 4 3 2 1 0
W1SX7 W1SX6 W1SX5 W1SX4 W1SX3 W1SX2 W1SX1 W1SX0
• WINDOW POSITION (W1, VERTICAL START POINT)
15 14 13 12 11 10 9 8
WPSY1 ~ ~ ~ ~ ~ ~ ~ W1SY8
1800CAH 7 6 5 4 3 2 1 0
W1SY7 W1SY6 W1SY5 W1SY4 W1SY3 W1SY2 W1SY1 W1SY0
• WINDOW POSITION (W1, HORIZONTAL END POINT)
15 14 13 12 11 10 9 8
WPEX1 ~ ~ ~ ~ ~ ~ W1EX9 W1EX8
1800CCH 7 6 5 4 3 2 1 0
W1EX7 W1EX6 W1EX5 W1EX4 W1EX3 W1EX2 W1EX1 W1EX0
• WINDOW POSITION (W1, VERTICAL END POINT)
15 14 13 12 11 10 9 8
WPEY1 ~ ~ ~ ~ ~ ~ ~ W1EY8
1800CEH 7 6 5 4 3 2 1 0
W1EY7 W1EY6 W1EY5 W1EY4 W1EY3 W1EY2 W1EY1 W1EY0
ST-58-R2 309
• WINDOW CONTROL (NBG0, NBG1)
15 14 13 12 11 10 9 8
WCTLA N1LOG ~ N1SWE N1SWA N1W1E N1W1A N1W0E N1W0A
1800D0H 7 6 5 4 3 2 1 0
N0LOG ~ N0SWE N0SWA N0W1E N0W1A N0W0E N0W0A
• WINDOW CONTROL (NBG2, NBG3)
15 14 13 12 11 10 9 8
WCTLB N3LOG ~ N3SWE N3SWA N3W1E N3W1A N3W0E N3W0A
1800D2H 7 6 5 4 3 2 1 0
N2LOG ~ N2SWE N2SWA N2W1E N2W1A N2W0E N2W0A
• WINDOW CONTROL (RBG0, SPRITE)
15 14 13 12 11 10 9 8
WCTLC SPLOG ~ SPSWE SPSWA SPW1E SPW1A SPW0E SPW0A
1800D4H 7 6 5 4 3 2 1 0
R0LOG ~ R0SWE R0SWA R0W1E R0W1A R0W0E R0W0A
• WINDOW CONTROL (PARAMETER WINDOW, COLOR CALC. WINDOW)
15 14 13 12 11 10 9 8
WCTLD CCLOG ~ CCSWE CCSWA CCW1E CCW1A CCW0E CCW0A
1800D6H 7 6 5 4 3 2 1 0
RPLOG ~ ~ ~ RPW1E RPW1A RPW0E RPW0A
• LINE WINDOW TABLE ADDRESS (W0)
15 14 13 12 11 10 9 8
LWTA0U W0LWE ~ ~ ~ ~ ~ ~ ~
1800D8H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ W0LWTA18 W0LWTA17 W0LWTA16
• LINE WINDOW TABLE ADDRESS (W0)
15 14 13 12 11 10 9 8
LWTA0L W0LWTA15 W0LWTA14 W0LWTA13 W0LWTA12 W0LWTA11 W0LWTA10 W0LWTA9 W0LWTA8
1800DAH 7 6 5 4 3 2 1 0
W0LWTA7 W0LWTA6 W0LWTA5 W0LWTA4 W0LWTA3 W0LWTA2 W0LWTA1 ~
• LINE WINDOW TABLE ADDRESS (W1)
15 14 13 12 11 10 9 8
LWTA1U W1LWE ~ ~ ~ ~ ~ ~ ~
1800DCH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ W1LWTA18 W1LWTA17 W1LWTA16
• LINE WINDOW TABLE ADDRESS (W1)
15 14 13 12 11 10 9 8
LWTA1L W1LWTA15 W1LWTA14 W1LWTA13 W1LWTA12 W1LWTA11 W1LWTA10 W1LWTA9 W1LWTA8
1800DEH 7 6 5 4 3 2 1 0
W1LWTA7 W1LWTA6 W1LWTA5 W1LWTA4 W1LWTA3 W1LWTA2 W1LWTA1 ~
310
• SPRITE CONTROL
15 14 13 12 11 10 9 8
SPCTL ~ ~ SPCCCS1 SPCCCS0 ~ SPCCN2 SPCCN1 SPCCN0
1800E0H 7 6 5 4 3 2 1 0
~ ~ SPCLMD SPWINEN SPTYPE3 SPTYPE2 SPTYPE1 SPTYPE0
• SHADOW CONTROL
15 14 13 12 11 10 9 8
SDCTL ~ ~ ~ ~ ~ ~ ~ TPSDSL
1800E2H 7 6 5 4 3 2 1 0
~ ~ BKSDEN R0SDEN N3SDEN N2SDEN N1SDEN N0SDEN
• COLOR RAM ADDRESS OFFSET (NBG0~NBG3)
15 14 13 12 11 10 9 8
CRAOFA ~ N3CAOS2 N3CAOS1 N3CAOS0 ~ N2CAOS2 N2CAOS1 N2CAOS0
1800E4H 7 6 5 4 3 2 1 0
~ N1CAOS2 N1CAOS1 N1CAOS0 ~ N0CAOS2 N0CAOS1 N0CAOS0
• COLOR RAM ADDRESS OFFSET (RBG0, SPRITE)
15 14 13 12 11 10 9 8
CRAOFB ~ ~ ~ ~ ~ ~ ~ ~
1800E6H 7 6 5 4 3 2 1 0
~ SPCAOS2 SPCAOS1 SPCAOS0 ~ R0CAOS2 R0CAOS1 R0CAOS0
• LINE COLOR SCREEN ENABLE
15 14 13 12 11 10 9 8
LNCLEN ~ ~ ~ ~ ~ ~ ~ ~
1800E8H 7 6 5 4 3 2 1 0
~ ~ SPLCEN R0LCEN N3LCEN N2LCEN N1LCEN N0LCEN
• SPECIAL PRIORITY MODE
15 14 13 12 11 10 9 8
SFPRMD ~ ~ ~ ~ ~ ~ R0SPRM1 R0SPRM0
1800EAH 7 6 5 4 3 2 1 0
N3SPRM1 N3SPRM0 N2SPRM1 N2SPRM0 N1SPRM1 N1SPRM0 N0SPRM1 N0SPRM0
• COLOR CALCULATION CONTROL
15 14 13 12 11 10 9 8
CCCTL BOKEN BOKN2 BOKN1 BOKN0 ~ EXCCEN CCRTMD CCMD
1800ECH 7 6 5 4 3 2 1 0
~ SPCCEN LCCCEN R0CCEN N3CCEN N2CCEN N1CCEN N0CCEN
• SPECIAL COLOR CALCULATION MODE
15 14 13 12 11 10 9 8
SFCCMD ~ ~ ~ ~ ~ ~ R0SCCM1 R0SCCM0
1800EEH 7 6 5 4 3 2 1 0
N3SCCM1 N3SCCM0 N2SCCM1 N2SCCM0 N1SCCM1 N1SCCM0 N0SCCM1 N0SCCM0
ST-58-R2 311
• PRIORITY NUMBER (SPRITE 0,1)
15 14 13 12 11 10 9 8
PRISA ~ ~ ~ ~ ~ S1PRIN2 S1PRIN1 S1PRIN0
1800F0H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ S0PRIN2 S0PRIN1 S0PRIN0
• PRIORITY NUMBER (SPRITE 2,3)
15 14 13 12 11 10 9 8
PRISB ~ ~ ~ ~ ~ S3PRIN2 S3PRIN1 S3PRIN0
1800F2H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ S2PRIN2 S2PRIN1 S2PRIN0
• PRIORITY NUMBER (SPRITE 4,5)
15 14 13 12 11 10 9 8
PRISC ~ ~ ~ ~ ~ S5PRIN2 S5PRIN1 S5PRIN0
1800F4H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ S4PRIN2 S4PRIN1 S4PRIN0
• PRIORITY NUMBER (SPRITE 6,7)
15 14 13 12 11 10 9 8
PRISD ~ ~ ~ ~ ~ S7PRIN2 S7PRIN1 S7PRIN0
1800F6H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ S6PRIN2 S6PRIN1 S6PRIN0
• PRIORITY NUMBER (NBG0, NBG1)
15 14 13 12 11 10 9 8
PRINA ~ ~ ~ ~ ~ N1PRIN2 N1PRIN1 N1PRIN0
1800F8H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N0PRIN2 N0PRIN1 N0PRIN0
• PRIORITY NUMBER (NBG2, NBG3)
15 14 13 12 11 10 9 8
PRINB ~ ~ ~ ~ ~ N3PRIN2 N3PRIN1 N3PRIN0
1800FAH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N2PRIN2 N2PRIN1 N2PRIN0
• PRIORITY NUMBER (RBG0)
15 14 13 12 11 10 9 8
PRIR ~ ~ ~ ~ ~ ~ ~ ~
1800FCH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ R0PRIN2 R0PRIN1 R0PRIN0
• RESERVE
15 14 13 12 11 10 9 8
~ ~ ~ ~ ~ ~ ~ ~
1800FEH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
312
• COLOR CALCULATION RATIO (SPRITE 0,1)
15 14 13 12 11 10 9 8
CCRSA ~ ~ ~ S1CCRT4 S1CCRT3 S1CCRT2 S1CCRT1 S1CCRT0
180100H 7 6 5 4 3 2 1 0
~ ~ ~ S0CCRT4 S0CCRT3 S0CCRT2 S0CCRT1 S0CCRT0
• COLOR CALCULATION RATIO (SPRITE 2,3)
15 14 13 12 11 10 9 8
CCRSB ~ ~ ~ S3CCRT4 S3CCRT3 S3CCRT2 S3CCRT1 S3CCRT0
180102H 7 6 5 4 3 2 1 0
~ ~ ~ S2CCRT4 S2CCRT3 S2CCRT2 S2CCRT1 S2CCRT0
• COLOR CALCULATION RATIO (SPRITE 4,5)
15 14 13 12 11 10 9 8
CCRSC ~ ~ ~ S5CCRT4 S5CCRT3 S5CCRT2 S5CCRT1 S5CCRT0
180104H 7 6 5 4 3 2 1 0
~ ~ ~ S4CCRT4 S4CCRT3 S4CCRT2 S4CCRT1 S4CCRT0
• COLOR CALCULATION RATIO (SPRITE 6,7)
15 14 13 12 11 10 9 8
CCRSD ~ ~ ~ S7CCRT4 S7CCRT3 S7CCRT2 S7CCRT1 S7CCRT0
180106H 7 6 5 4 3 2 1 0
~ ~ ~ S6CCRT4 S6CCRT3 S6CCRT2 S6CCRT1 S6CCRT0
• COLOR CALCULATION RATIO (NBG0, NBG1)
15 14 13 12 11 10 9 8
CCRNA ~ ~ ~ N1CCRT4 N1CCRT3 N1CCRT2 N1CCRT1 N1CCRT0
180108H 7 6 5 4 3 2 1 0
~ ~ ~ N0CCRT4 N0CCRT3 N0CCRT2 N0CCRT1 N0CCRT0
• COLOR CALCULATION RATIO (NBG2, NBG3)
15 14 13 12 11 10 9 8
CCRNB ~ ~ ~ N3CCRT4 N3CCRT3 N3CCRT2 N3CCRT1 N3CCRT0
18010AH 7 6 5 4 3 2 1 0
~ ~ ~ N2CCRT4 N2CCRT3 N2CCRT2 N2CCRT1 N2CCRT0
• COLOR CALCULATION RATIO (RBG0)
15 14 13 12 11 10 9 8
CCRR ~ ~ ~ ~ ~ ~ ~ ~
18010CH 7 6 5 4 3 2 1 0
~ ~ ~ R0CCRT4 R0CCRT3 R0CCRT2 R0CCRT1 R0CCRT0
• COLOR CALCULATION RATIO (LINE COLOR SCREEN, BACK SCREEN)
15 14 13 12 11 10 9 8
CCRLB ~ ~ ~ BKCCRT4 BKCCRT3 BKCCRT2 BKCCRT1 BKCCRT0
18010EH 7 6 5 4 3 2 1 0
~ ~ ~ LCCCRT4 LCCCRT3 LCCCRT2 LCCCRT1 LCCCRT0
ST-58-R2 313
• COLOR OFFSET ENABLE
15 14 13 12 11 10 9 8
CLOFEN ~ ~ ~ ~ ~ ~ ~ ~
180110H 7 6 5 4 3 2 1 0
~ SPCOEN BKCOEN R0COEN N3COEN N2COEN N1COEN N0COEN
• COLOR OFFSET SELECT
15 14 13 12 11 10 9 8
CLOFSL ~ ~ ~ ~ ~ ~ ~ ~
180112H 7 6 5 4 3 2 1 0
~ SPCOSL BKCOSL R0COSL N3COSL N2COSL N1COSL N0COSL
• COLOR OFFSET A (RED)
15 14 13 12 11 10 9 8
COAR ~ ~ ~ ~ ~ ~ ~ COARD8
180114H 7 6 5 4 3 2 1 0
COARD7 COARD6 COARD5 COARD4 COARD3 COARD2 COARD1 COARD0
• COLOR OFFSET A (GREEN)
15 14 13 12 11 10 9 8
COAG ~ ~ ~ ~ ~ ~ ~ COAGR8
180116H 7 6 5 4 3 2 1 0
COAGR7 COAGR6 COAGR5 COAGR4 COAGR3 COAGR2 COAGR1 COAGR0
• COLOR OFFSET A (BLUE)
15 14 13 12 11 10 9 8
COAB ~ ~ ~ ~ ~ ~ ~ COABL8
180118H 7 6 5 4 3 2 1 0
COABL7 COABL6 COABL5 COABL4 COABL3 COABL2 COABL1 COABL0
• COLOR OFFSET B (RED)
15 14 13 12 11 10 9 8
COBR ~ ~ ~ ~ ~ ~ ~ COBRD8
18011AH 7 6 5 4 3 2 1 0
COBRD7 COBRD6 COBRD5 COBRD4 COBRD3 COBRD2 COBRD1 COBRD0
• COLOR OFFSET B (GREEN)
15 14 13 12 11 10 9 8
COBG ~ ~ ~ ~ ~ ~ ~ COBGR8
18011CH 7 6 5 4 3 2 1 0
COBGR7 COBGR6 COBGR5 COBGR4 COBGR3 COBGR2 COBGR1 COBGR0
• COLOR OFFSET B (BLUE)
15 14 13 12 11 10 9 8
COBB ~ ~ ~ ~ ~ ~ ~ COBBL8
18011EH 7 6 5 4 3 2 1 0
COBBL7 COBBL6 COBBL5 COBBL4 COBBL3 COBBL2 COBBL1 COBBL0
314
16.2 Register Bit List
Bit Name Bit Address Bit Application
Abbreviation
• TV Screen Mode
TV Screen Display DISP 180000H 15
Boarder Color Mode BDCLMD 180000H 8
Interlace Mode LSMD 180000H 7,6
Vertical Definition VRESO 180000H 5,4
Horizontal Definition HRESO 180000H 2~0
• External Signal Enable
External Latch Enable EXLTEN 180002H 9
External Sync Enable EXSYEN 180002H 8
Image Display Area Select DASEL 180002H 1
External Screen Enable EXBGEN 180002H 0
• Screen Status (Read Only)
External Latch Flag EXLTFG 180004H 9
External Sync Flag EXSYFG 180004H 8
V Blank Flag VBLANK 180004H 3
H Blank Flag HBLANK 180004H 2
Scan Field Flag ODD 180004H 1
TV System Flag PAL 180004H 0
• VRAM Size (Version Number is Read Only)
VRAM Size VRAMSZ 180006H 15
Version Number VER 180006H 3~0
• H-Counter (Read Only)
H Counter Value HCT 180008H 9~0
• V-Counter (Read Only)
V Counter Value VCT 18000AH 9~0
• RAM Control
Color RAM Mode CRMD 18000EH 13,12
VRAM Mode VRAMD 18000EH 8 For VRAM-A
VRAM Mode VRBMD 18000EH 9 For VRAM-B
Rotation Data Bank Selection RDBSA0 18000EH 1,0 For VRAM-A0 (or VRAM-A)
Rotation Data Bank Selection RDBSA1 18000EH 3,2 For VRAM-A1
Rotation Data Bank Selection RDBSB0 18000EH 5,4 For VRAM-B0 (or VRAM-B)
Rotation Data Bank Selection RDBSB1 18000EH 7,6 For VRAM-B1
ST-58-R2 315
Bit Name Bit Address Bit Application
Abbreviation
• VRAM Cycle Pattern
VRAM Cycle Pattern VCPA0 180010H 15~0 For VRAM-A0
180012H 15~0 For VRAM-A0
VRAM Cycle Pattern VCPA1 180014H 15~0 For VRAM-A1
180016H 15~0 For VRAM-A1
VRAM Cycle Pattern VCPB0 180018H 15~0 For VRAM-B0
18001AH 15~0 For VRAM-B0
VRAM Cycle Pattern VCPB1 18001CH 15~0 For VRAM-B1
18001EH 15~0 For VRAM-B1
• Screen Display Enable
Transparent Display Enable N0TPON 180020H 8 For NBG0 (or RBG0)
Transparent Display Enable N1TPON 180020H 9 For NBG1 (or EXBG)
Transparent Display Enable N2TPON 180020H 10 For NBG2
Transparent Display Enable N3TPON 180020H 11 For NBG3
Transparent Display Enable R0TPON 180020H 12 For RBG0
Screen Display Enable N0ON 180020H 0 For NBG0
Screen Display Enable N1ON 180020H 1 For NBG1
Screen Display Enable N2ON 180020H 2 For NBG2
Screen Display Enable N3ON 180020H 3 For NBG3
Screen Display Enable R0ON 180020H 4 For RBG0
Screen Display Enable R1ON 180020H 5 For RBG1
• Mosaic Control
Mosaic Enable N0MZE 180022H 0 For NBG0 (or RBG1)
Mosaic Enable N1MZE 180022H 1 For NBG1
Mosaic Enable N2MZE 180022H 2 For NBG2
Mosaic Enable N3MZE 180022H 3 For NBG3
Mosaic Enable R0MZE 180022H 4 For RBG0
Mosaic Size MZSZH 180022H 11~8 For Horizontal Mosaic Size
Mosaic Size MZSZV 180022H 15~12 For Vertical Mosaic Size
• Special Function Code Select
Special Function Code Select N0SFCS 180024H 0 For NBG0 (or RBG1)
Special Function Code Select N1SFCS 180024H 1 For NBG1
Special Function Code Select N2SFCS 180024H 2 For NBG2
Special Function Code Select N3SFCS 180024H 3 For NBG3
Special Function Code Select R0SFCS 180024H 4 For RBG0
• Special Function Code
Special Function SFCDA 180026H 7~0 For Special Function Code A
Special Function SFCDB 180026H 15~8 For Special Function Code B
316
Bit Name Bit Address Bit Application
Abbreviation
• Character Control
Character Size N0CHSZ 180028H 0 For NBG0 (or RBG1)
Character Size N1CHSZ 180028H 8 For NBG1
Character Size N2CHSZ 18002AH 0 For NBG2
Character Size N3CHSZ 18002AH 4 For NBG3
Character Size R0CHSZ 18002AH 8 For RBG0
Bitmap Enable N0BMEN 180028H 1 For NBG0
Bitmap Enable N1BMEN 180028H 9 For NBG1
Bitmap Enable R0BMEN 18002AH 9 For RBG0
Bitmap Size N0BMSZ 180028H 3,2 For NBG0
Bitmap Size N1BMSZ 180028H 11,10 For NBG1
Bitmap Size R0BMSZ 18002AH 10 For RBG0
Number of Character Colors N0CHCN 180028H 6~4 For NBG0 (or RBG1)
Number of Character Colors N1CHCN 180028H 13,12 For NBG1 (or EXBG)
Number of Character Colors N2CHCN 18002AH 1 For NBG2
Number of Character Colors N3CHCN 18002AH 5 For NBG3
Number of Character Colors R0CHCN 18002AH 14,12 For RBG0
• Bitmap Palette Number
Special Priority (for Bitmap) N0BMPR 18002CH 5 For NBG0
Special Priority (for Bitmap) N1BMPR 18002CH 13 For NBG1
Special Priority (for Bitmap) R0BMPR 18002EH 5 For RBG0
Special Color Calculation (for Bitmap) N0BMCC 18002CH 4 For NBG0
Special Color Calculation (for Bitmap) N1BMCC 18002CH 12 For NBG1
Special Color Calculation (for Bitmap) R0BMCC 18002EH 4 For RBG0
Palette Number (for Bitmap) N0BMP 18002CH 2~0 For NBG0
Palette Number (for Bitmap) N1BMP 18002CH 10~8 For NBG1
Palette Number (for Bitmap) R0BMP 18002EH 2~0 For RBG0
• Pattern Name Control
Pattern Name Data Size N0PNB 180030H 15 For NBG0 (or RBG1)
Pattern Name Data Size N1PNB 180032H 15 For NBG1
Pattern Name Data Size N2PNB 180034H 15 For NBG2
Pattern Name Data Size N3PNB 180036H 15 For NBG3
Pattern Name Data Size R0PNB 180038H 15 For RBG0
Character Number N0CNSM 180030H 14 For NBG0 (or RBG1)
Supplement Mode
Character Number N1CNSM 180032H 14 For NBG1
Supplement Mode
Character Number N2CNSM 180034H 14 For NBG2
Supplement Mode
Character Number N3CNSM 180036H 14 For NBG3
Supplement Mode
Character Number R0CNSM 180038H 14 For RBG0
Supplement Mode
ST-58-R2 317
• Pattern Name Control (Continued)
Special Priority (For Pattern N0SPR 180030H 9 For NBG0 (or RBG1)
Name Supplement Data)
Special Priority (For Pattern N1SPR 180032H 9 For NBG1
Name Supplement Data)
Special Priority (For Pattern N2SPR 180034H 9 For NBG2
Name Supplement Data)
Special Priority (For Pattern N3SPR 180036H 9 For NBG3
Name Supplement Data)
Special Priority (For Pattern R0SPR 180038H 9 For RBG0
Name Supplement Data)
Special Color Calculation N0SCC 180030H 8 For NBG0 (or RBG1)
(For Pattern Name
Supplement Data)
Special Color Calculation N1SCC 180032H 8 For NBG1
(For Pattern Name Supplement
Data)
Special Color Calculation N2SCC 180034H 8 For NBG2
(For Pattern Name Supplement
Data)
Special Color Calculation N3SCC 180036H 8 For NBG3
(For Pattern Name Supplement
Data)
Special Color Calculation R0SCC 180038H 8 For RBG0
(For Pattern Name Supplement
Data)
Supplement Palette Number N0SPLT 180030H 7~5 For NBG0 (or RBG1)
Supplement Palette Number N1SPLT 180032H 7~5 For NBG1
Supplement Palette Number N2SPLT 180034H 7~5 For NBG2
Supplement Palette Number N3SPLT 180036H 7~5 For NBG3
Supplement Palette Number R0SPLT 180038H 7~5 For RBG0
Supplement Character Number N0SCN 180030H 4~0 For NBG0 (or RBG1)
Supplement Character Number N1SCN 180032H 4~0 For NBG1
Supplement Character Number N2SCN 180034H 4~0 For NBG2
Supplement Character Number N3SCN 180036H 4~0 For NBG3
Supplement Character Number R0SCN 180038H 4~0 For RBG0
• Plane Size
Plane Size N0PLSZ 18003AH 1,0 For NBG0
Plane Size N1PLSZ 18003AH 3,2 For NBG1
Plane Size N2PLSZ 18003AH 5,4 For NBG2
Plane Size N3PLSZ 18003AH 7,6 For NBG3
Plane Size RAPLSZ 18003AH 9,8 For Rotation Parameter A
Plane Size RBPLSZ 18003AH 13,12 For Rotation Parameter B
Screen Over Processing RAOVR 18003AH 11,10 For Rotation Parameter A
Screen Over Processing RBOVR 18003AH 15,14 For Rotation Parameter B
• Map Offset
Map Offset N0MP 18003CH 2~0 For NBG0
Map Offset N1MP 18003CH 6~4 For NBG1
Map Offset N2MP 18003CH 10~8 For NBG2
Map Offset N3MP 18003CH 14~12 For NBG3
Map Offset RAMP 18003EH 2~0 For Rotation Parameter A
Map Offset RBMP 18003EH 6~4 For Rotation Parameter B
318
Bit Name Bit Address Bit Application
Abbreviation
• Map
Map (For Normal Scroll) N0MPA 180040H 5~0 For NBG0 Plane A
Map (For Normal Scroll) N0MPB 180040H 13~8 For NBG0 Plane B
Map (For Normal Scroll) N0MPC 180042H 5~0 For NBG0 Plane C
Map (For Normal Scroll) N0MPD 180042H 13~8 For NBG0 Plane D
Map (For Normal Scroll) N1MPA 180044H 5~0 For NBG1 Plane A
Map (For Normal Scroll) N1MPB 180044H 13~8 For NBG1 Plane B
Map (For Normal Scroll) N1MPC 180046H 5~0 For NBG1 Plane C
Map (For Normal Scroll) N1MPD 180046H 13~8 For NBG1 Plane D
Map (For Normal Scroll) N2MPA 180048H 5~0 For NBG2 Plane A
Map (For Normal Scroll) N2MPB 180048H 13~8 For NBG2 Plane B
Map (For Normal Scroll) N2MPC 18004AH 5~0 For NBG2 Plane C
Map (For Normal Scroll) N2MPD 18004AH 13~8 For NBG2 Plane D
Map (For Normal Scroll) N3MPA 18004CH 5~0 For NBG3 Plane A
Map (For Normal Scroll) N3MPB 18004CH 13~8 For NBG3 Plane B
Map (For Normal Scroll) N3MPC 18004EH 5~0 For NBG3 Plane C
Map (For Normal Scroll) N3MPD 18004EH 13~8 For NBG3 Plane D
Map (For Rotation Scroll) RAMPA 180050H 5~0 Rotation Parameter-A Screen Plane-A
Map (For Rotation Scroll) RAMPB 180050H 13~8 Rotation Parameter-A Screen Plane-B
Map (For Rotation Scroll) RAMPC 180052H 5~0 Rotation Parameter-A Screen Plane-C
Map (For Rotation Scroll) RAMPD 180052H 13~8 Rotation Parameter-A Screen Plane-D
Map (For Rotation Scroll) RAMPE 180054H 5~0 Rotation Parameter-A Screen Plane-E
Map (For Rotation Scroll) RAMPF 180054H 13~8 Rotation Parameter-A Screen Plane-F
Map (For Rotation Scroll) RAMPG 180056H 5~0 Rotation Parameter-A Screen Plane-G
Map (For Rotation Scroll) RAMPH 180056H 13~8 Rotation Parameter-A Screen Plane-H
Map (For Rotation Scroll) RAMPI 180058H 5~0 Rotation Parameter-A Screen Plane-I
Map (For Rotation Scroll) RAMPJ 180058H 13~8 Rotation Parameter-A Screen Plane-J
Map (For Rotation Scroll) RAMPK 18005AH 5~0 Rotation Parameter-A Screen Plane-K
Map (For Rotation Scroll) RAMPL 18005AH 13~8 Rotation Parameter-A Screen Plane-L
Map (For Rotation Scroll) RAMPM 18005CH 5~0 Rotation Parameter-A Screen Plane-M
Map (For Rotation Scroll) RAMPN 18005CH 13~8 Rotation Parameter-A Screen Plane-N
Map (For Rotation Scroll) RAMPO 18005EH 5~0 Rotation Parameter-A Screen Plane-O
Map (For Rotation Scroll) RAMPP 18005EH 13~8 Rotation Parameter-A Screen Plane-P
Map (For Rotation Scroll) RBMPA 180060H 5~0 Rotation Parameter-B Screen Plane-A
Map (For Rotation Scroll) RBMPB 180060H 13~8 Rotation Parameter-B Screen Plane-B
Map (For Rotation Scroll) RBMPC 180062H 5~0 Rotation Parameter-B Screen Plane-C
Map (For Rotation Scroll) RBMPD 180062H 13~8 Rotation Parameter-B Screen Plane-D
Map (For Rotation Scroll) RBMPE 180064H 5~0 Rotation Parameter-B Screen Plane-E
Map (For Rotation Scroll) RBMPF 180064H 13~8 Rotation Parameter-B Screen Plane-F
Map (For Rotation Scroll) RBMPG 180066H 5~0 Rotation Parameter-B Screen Plane-G
Map (For Rotation Scroll) RBMPH 180066H 13~8 Rotation Parameter-B Screen Plane-H
Map (For Rotation Scroll) RBMPI 180068H 5~0 Rotation Parameter-B Screen Plane-I
Map (For Rotation Scroll) RBMPJ 180068H 13~8 Rotation Parameter-B Screen Plane-J
ST-58-R2 319
Bit Name Bit Address Bit Application
Abbreviation
• Map (Continued)
Map (For Rotation Scroll) RBMPK 18006AH 5~0 Rotation Parameter-B Screen Plane-K
Map (For Rotation Scroll) RBMPL 18006AH 13~8 Rotation Parameter-B Screen Plane-L
Map (For Rotation Scroll) RBMPM 18006CH 5~0 Rotation Parameter-B Screen Plane-M
Map (For Rotation Scroll) RBMPN 18006CH 13~8 Rotation Parameter-B Screen Plane-N
Map (For Rotation Scroll) RBMPO 18006EH 5~0 Rotation Parameter-B Screen Plane-O
Map (For Rotation Scroll) RBMPP 18006EH 13~8 Rotation Parameter-B Screen Plane-P
• Screen Scroll Value
Screen Scroll Value N0SCXI 180070H 10~0 For NBG0 Horizontal (Integer Part)
Screen Scroll Value N0SCXD 180072H 15~8 For NBG0 Horizontal (Fractional Part)
Screen Scroll Value N0SCYI 180074H 10~0 For NBG0 Vertical (Integer Part)
Screen Scroll Value N0SCYD 180076H 15~8 For NBG0 Vertical (Fractional Part)
Screen Scroll Value N1SCXI 180080H 10~0 For NBG1 Horizontal (Integer Part)
Screen Scroll Value N1SCXD 180082H 15~8 For NBG1 Horizontal (Fractional Part)
Screen Scroll Value N1SCYI 180084H 10~0 For NBG1 Vertical (Integer Part)
Screen Scroll Value N1SCYD 180086H 15~8 For NBG1 Vertical (Fractional Part)
Screen Scroll Value N2SCX 180090H 10~0 For NBG2 Horizontal
Screen Scroll Value N2SCX 180092H 10~0 For NBG2 Vertical
Screen Scroll Value N3SCY 180094H 10~0 For NBG3 Horizontal
Screen Scroll Value N3SCY 180096H 10~0 For NBG3 Vertical
• Coordinate Increment
Coordinate Increment N0ZMXI 180078H 2~0 For NBG0 Horizontal (Integer Part)
Coordinate Increment N0ZMXD 18007AH 15~8 For NBG0 Horizontal (Fractional Part)
Coordinate Increment N0ZMYI 18007CH 2~0 For NBG0 Vertical (Integer Part)
Coordinate Increment N0ZMYD 18007EH 15~8 For NBG0 Vertical (Fractional Part)
Coordinate Increment N1ZMXI 180088H 2~0 For NBG1 Horizontal (Integer Part)
Coordinate Increment N1ZMXD 18008AH 15~8 For NBG1 Horizontal (Fractional Part)
Coordinate Increment N1ZMYI 18008CH 2~0 For NBG1 Vertical (Integer Part)
Coordinate Increment N1ZMYD 18008EH 15~8 For NBG1 Vertical (Fractional Part)
• Reduction Enable
Reduction Enable N0ZMHF 180098H 0 For NBG0
Reduction Enable N0ZMQT 180098H 1 For NBG0
Reduction Enable N1ZMHF 180098H 8 For NBG1
Reduction Enable N1ZMQT 180098H 9 For NBG1
• Line & Vertical Cell Scroll Control
Vertical Cell Scroll Enable N0VCSC 18009AH 0 For NBG0
Vertical Cell Scroll Enable N1VCSC 18009AH 8 For NBG1
Line Scroll Enable (For Horiz - N0LSCX 18009AH 1 For NBG0
ontal Screen Scroll Values)
Line Scroll Enable (For Horiz - N1LSCX 18009AH 9 For NBG1
ontal Screen Scroll Values)
Line Scroll Enable (For Vertical N0LSCY 18009AH 2 For NBG0
Screen Scroll Values)
320
Bit Name Bit Address Bit Application
Abbreviation
• Line & Vertical Cell Scroll Control (Continued)
Line Scroll Enable (For Vertical N1LSCY 18009AH 10 For NBG1
Screen Scroll Values)
Line Zoom Enable N0LZMX 18009AH 3 For NBG0
Line Zoom Enable N1LZMX 18009AH 11 For NBG1
Line Scroll Space N0LSS 18009AH 5,4 For NBG0
Line Scroll Space N1LSS 18009AH 13,12 For NBG1
• Vertical Cell Scroll Table Address
Vert. Cell Scroll Table Address VCSTA 18009CH 2~0
18009EH 15~1
• Line Scroll Table Address
Line Scroll Table Address N0LSTA 1800A0H 2~0 For NBG0 (Most Significant Bits)
1800A2H 15~1 For NBG0 (Least Significant Bits)
Line Scroll Table Address N1LSTA 1800A4H 2~0 For NBG1 (Most Significant Bits)
1800A6H 15~1 For NBG1 (Least Significant Bits)
• Line Color Screen Table Address
Line Color Screen Color Mode LCCLMD 1800A8H 15
Line Color Screen Table Add. LCTA 1800A8H 2~0
1800AAH 15~0
• Back Screen Table Address
Back Screen Color Mode BKCLMD 1800ACH 15
Back Screen Table Address BKTA 1800ACH 2~0
1800AEH 15~0
• Rotation Parameter Mode
Rotation Parameter Mode RPMD 1800B0H 1,0
• Rotation Parameter Read Control
Parameter Read Enable RAXSTRE 1800B2H 0 For Rotation Parameter-A Xst
Parameter Read Enable RBXSTRE 1800B2H 8 For Rotation Parameter-B Xst
Parameter Read Enable RAYSTRE 1800B2H 1 For Rotation Parameter-A Yst
Parameter Read Enable RBYSTRE 1800B2H 9 For Rotation Parameter-B Yst
Parameter Read Enable RAKASTRE 1800B2H 2 For Rotation Parameter-A KAst
Parameter Read Enable RBKASTRE 1800B2H 10 For Rotation Parameter-B KAst
• Coefficient Table Control
Coefficient Table Enable RAKTE 1800B4H 0 For Rotation Parameter-A
Coefficient Table Enable RBKTE 1800B4H 8 For Rotation Parameter-B
Coefficient Data Size RAKDBS 1800B4H 1 For Rotation Parameter-A
Coefficient Data Size RBKDBS 1800B4H 9 For Rotation Parameter-B
Coefficient Data Mode RAKMD 1800B4H 3,2 For Rotation Parameter-A
Coefficient Data Mode RBKMD 1800B4H 11,10 For Rotation Parameter-B
Coefficient Line Color Enable RAKLCE 1800B4H 4 For Rotation Parameter-A
Coefficient Line Color Enable RBKLCE 1800B4H 12 For Rotation Parameter-B
ST-58-R2 321
Bit Name Bit Address Bit Application
Abbreviation
• Coefficient Table Address Offset
Coefficient Table Add. Offset RAKTAOS 1800B6H 2~0 For Rotation Parameter-A
Coefficient Table Add. Offset RBKTAOS 1800B6H 10~8 For Rotation Parameter-B
• Screen Over Pattern Name
Screen Over Pattern Name RAOPN 1800B8H 15~0 For Rotation Parameter-A
Screen Over Pattern Name RBOPN 1800BAH 15~0 For Rotation Parameter-B
• Rotation Parameter Table Address
Rotation Parameter Table Add. RPTA 1800BCH 2~0
1800BEH 15~1
• Window Position
Window Position W0SX 1800C0H 9~0 For W0 Start Point Coordinates
(For Horizontal Coordinates)
Window Position W0SY 1800C2H 8~0 For W0 Start Point Coordinates
(For Vertical Coordinates)
Window Position W0EX 1800C4H 9~0 For W0 End Point Coordinates
(For Horizontal Coordinates)
Window Position W0EY 1800C6H 8~0 For W0 End Point Coordinates
(For Vertical Coordinates)
Window Position W1SX 1800C8H 9~0 For W1 Start Point Coordinates
(For Horizontal Coordinates)
Window Position W1SY 1800CAH 8~0 For W1 Start Point Coordinates
(For Vertical Coordinates)
Window Position W1EX 1800CCH 9~0 For W1 End Point Coordinates
(For Horizontal Coordinates)
Window Position W1EY 1800CEH 8~0 For W1 End Point Coordinates
(For Vertical Coordinates)
• Window Control
W0 Enable N0W0E 1800D0H 1 For Transparent Processing Window NBGO
(or RBG1)
W0 Enable N1W0E 1800D0H 9 For Transparent Processing Window NBG1
(or EXBG)
W0 Enable N2W0E 1800D2H 1 For Transparent Processing Window NBG2
W0 Enable N3W0E 1800D2H 9 For Transparent Processing Window NBG3
W0 Enable R0W0E 1800D4H 1 For Transparent Processing Window RBG0
W0 Enable SPW0E 1800D4H 9 For Transparent Processing Window Sprite
W0 Enable RPW0E 1800D6H 1 For Rotation Parameter Window
W0 Enable CCW0E 1800D6H 9 For Color Calculation Window
W0 Area N0W0A 1800D0H 0 For Transparent Processing Window NBGO
(or RBG1)
W0 Area N1W0A 1800D0H 8 For Transparent Processing Window NBG1
(or EXBG)
W0 Area N2W0A 1800D2H 0 For Transparent Processing Window NBG2
W0 Area N3W0A 1800D2H 8 For Transparent Processing Window NBG3
W0 Area R0W0A 1800D4H 0 For Transparent Processing Window RBG0
W0 Area SPW0A 1800D4H 8 For Transparent Processing Window Sprite
W0 Area RPW0A 1800D6H 0 For Rotation Parameter Window
W0 Area CCW0A 1800D6H 8 For Color Calculation Window
322
Bit Name Bit Address Bit Application
Abbreviation
• Window Control (Continued)
W1 Enable N0W1E 1800D0H 3 For Transparent Processing Window NBG0
(or RBG1)
W1 Enable N1W1E 1800D0H 11 For Transparent Processing Window NBG1
(or EXBG)
W1 Enable N2W1E 1800D2H 3 For Transparent Processing Window NBG2
W1 Enable N3W1E 1800D2H 11 For Transparent Processing Window NBG3
W1 Enable R0W1E 1800D4H 3 For Transparent Processing Window RBG0
W1 Enable SPW1E 1800D4H 11 For Transparent Processing Window Sprite
W1 Enable RPW1E 1800D6H 3 For Rotation Parameter Window
W1 Enable CCW1E 1800D6H 11 For Color Calculation Window
W1 Area N0W1A 1800D0H 2 For Transparent Processing Window NBG0
(or RBG1)
W1 Area N1W1A 1800D0H 10 For Transparent Processing Window NBG1
(or EXBG)
W1 Area N2W1A 1800D2H 2 For Transparent Processing Window NBG2
W1 Area N3W1A 1800D2H 10 For Transparent Processing Window NBG3
W1 Area R0W1A 1800D4H 2 For Transparent Processing Window RBG0
W1 Area SPW1A 1800D4H 10 For Transparent Processing Window Sprite
W1 Area RPW1A 1800D6H 2 For Rotation Parameter Window
W1 Area CCW1A 1800D6H 10 For Color Calculation Window
SW Enable N0SWE 1800D0H 5 For Transparent Processing Window NBG0
(or RBG1)
SW Enable N1SWE 1800D0H 13 For Transparent Processing Window NBG1
(or EXBG)
SW Enable N2SWE 1800D2H 5 For Transparent Processing Window NBG2
SW Enable N3SWE 1800D2H 13 For Transparent Processing Window NBG3
SW Enable R0SWE 1800D4H 5 For Transparent Processing Window RBG0
SW Enable SPSWE 1800D4H 13 For Transparent Processing Window Sprite
SW Enable CCSWE 1800D6H 13 For Color Calculation Window
SW Area N0SWA 1800D0H 4 For Transparent Processing Window NBG0
(or RBG1)
SW Area N1SWA 1800D0H 12 For Transparent Processing Window NBG1
(or EXBG)
SW Area N2SWA 1800D2H 4 For Transparent Processing Window NBG2
SW Area N3SWA 1800D2H 12 For Transparent Processing Window NBG3
SW Area R0SWA 1800D4H 4 For Transparent Processing Window RBG0
SW Area SPSWA 1800D4H 12 For Transparent Processing Window Sprite
SW Area CCSWA 1800D6H 12 For Color Calculation Window
Window Logic N0LOG 1800D0H 7 For Transparent Processing Window NBG0
(or RBG1)
Window Logic N1LOG 1800D0H 15 For Transparent Processing Window NBG1
(or EXBG)
Window Logic N2LOG 1800D2H 7 For Transparent Processing Window NBG2
Window Logic N3LOG 1800D2H 15 For Transparent Processing Window NBG3
Window Logic R0LOG 1800D4H 7 For Transparent Processing Window RBG0
Window Logic SPLOG 1800D4H 15 For Transparent Processing Window Sprite
ST-58-R2 323
Bit Name Bit Address Bit Application
Abbreviation
• Window Control (Continued)
Window Logic RPLOG 1800D6H 7 For Rotation Parameter Window
Window Logic CCLOG 1800D6H 15 For Color Calculation Window
• Line Window Table Address
Line Window Enable W0LWE 1800D8H 15 For W0
Line Window Enable W1LWE 1800DCH 15 For W1
Line Window Table Address W 0LWTA 1800D8H 2~0 For W0
1800DAH 15~1 For W0
Line Window Table Address W 1LWTA 1800DCH 2~0 For W1
1800DEH 15~1 For W1
• Sprite Control
Sprite Type SPTYPE 1800E0H 3~0
Sprite Window Enable SPWINEN 1800E0H 4
Sprite Color Mode SPCLMD 1800E0H 5
Sprite Color Calculation SPCCCS 1800E0H 13,12
Condition
Sprite Color Calculation SPCCN 1800E0H 10~8
Number
• Shadow Control
Transparent Shadow Select TPSDSL 1800E2H 8
Shadow Enable N0SDEN 1800E2H 0 For NBG0 (or RBG1)
Shadow Enable N1SDEN 1800E2H 1 For NBG1 (or EXBG)
Shadow Enable N2SDEN 1800E2H 2 For NBG2
Shadow Enable N3SDEN 1800E2H 3 For NBG3
Shadow Enable R0SDEN 1800E2H 4 For RBG0
Shadow Enable BKSDEN 1800E2H 5 For Back
• Color RAM Address Offset
Color RAM Address Offset N0CAOS 1800E4H 2~0 For NBG0 (or RBG1)
Color RAM Address Offset N1CAOS 1800E4H 6~4 For NBG1 (or EXBG)
Color RAM Address Offset N2CAOS 1800E4H 10~8 For NBG2
Color RAM Address Offset N3CAOS 1800E4H 14~12 For NBG3
Color RAM Address Offset R0CAOS 1800E6H 2~0 For RBG0
Color RAM Address Offset SPCAOS 1800E6H 6~4 For Sprite
• Line Color Screen Enable
Line Color Screen Insertion N0LCEN 1800F8H 0 For NBG0 (or RBG1)
Enable
Line Color Screen Insertion N1LCEN 1800F8H 1 For NBG1 (or EXBG)
Enable
Line Color Screen Insertion N2LCEN 1800F8H 2 For NBG2
Enable
Line Color Screen Insertion N3LCEN 1800F8H 3 For NBG3
Enable
Line Color Screen Insertion R0LCEN 1800F8H 4 For RBG0
Enable
Line Color Screen Insertion SPLCEN 1800F8H 5 For Sprite
Enable
324
Bit Name Bit Address Bit Application
Abbreviation
• Special Priority Mode
Special Priority Mode N0SPRM 1800EAH 1,0 For NBG0 (or RBG1)
Special Priority Mode N1SPRM 1800EAH 3,2 For NBG1 (or EXBG)
Special Priority Mode N2SPRM 1800EAH 5,4 For NBG2
Special Priority Mode N3SPRM 1800EAH 7,6 For NBG3
Special Priority Mode R0SPRM 1800EAH 9,8 For RBG0
• Color Calculation Control
Color Calculation Enable N0CCEN 1800ECH 0 For NBG0 (or RBG1)
Color Calculation Enable N1CCEN 1800ECH 1 For NBG1 (or EXBG)
Color Calculation Enable N2CCEN 1800ECH 2 For NBG2
Color Calculation Enable N3CCEN 1800ECH 3 For NBG3
Color Calculation Enable R0CCEN 1800ECH 4 For RBG0
Color Calculation Enable LCCCEN 1800ECH 5 For LNCL
Color Calculation Enable SPCCEN 1800ECH 6 For Sprite
Color Calculation Mode CCMD 1800ECH 8
Color Calculation Ratio Mode CCRTMD 1800ECH 9
Extended Color Calculation EXCCEN 1800ECH 10
Enable
Gradation Calculation Enable BOKEN 1800ECH 15
Gradation Screen Number BOKN 1800ECH 14~12
• Special Color Calculation Mode
Special Color Calculation Mode N0SCCM 1800EEH 1,0 For NBG0 (or RBG1)
Special Color Calculation Mode N1SCCM 1800EEH 3,2 For NBG1 (or EXBG)
Special Color Calculation Mode N2SCCM 1800EEH 5,4 For NBG2
Special Color Calculation Mode N3SCCM 1800EEH 7,6 For NBG3
Special Color Calculation Mode R0SCCM 1800EEH 9,8 For RBG0
• Priority Number
Priority Number (for Sprite) S0PRIN 1800F0H 2~0 For Sprite Register 0
Priority Number (for Sprite) S1PRIN 1800F0H 10~8 For Sprite Register 1
Priority Number (for Sprite) S2PRIN 1800F2H 2~0 For Sprite Register 2
Priority Number (for Sprite) S3PRIN 1800F2H 10~8 For Sprite Register 3
Priority Number (for Sprite) S4PRIN 1800F4H 2~0 For Sprite Register 4
Priority Number (for Sprite) S5PRIN 1800F4H 10~8 For Sprite Register 5
Priority Number (for Sprite) S6PRIN 1800F6H 2~0 For Sprite Register 6
Priority Number (for Sprite) S7PRIN 1800F6H 10~8 For Sprite Register 7
ST-58-R2 325
Bit Name Bit Address Bit Application
Abbreviation
• Priority Number (Continued)
Priority Number N0PRIN 1800F8H 2~0 For NBG0 (or RBG1)
(for Scroll Screen)
Priority Number for N1PRIN 1800F8H 10~8 For NBG1 (or EXBG)
(for Scroll Screen)
Priority Number for N2PRIN 1800FAH 2~0 For NBG2
(for Scroll Screen)
Priority Number for N3PRIN 1800FAH 10~8 For NBG3
(for Scroll Screen)
Priority Number for R0PRIN 1800FCH 2~0 For RBG0
(for Scroll Screen)
• Color Calculation Ratio
Color Calculation Ratio (For Sprite) S0CCRT 180100H 4~0 For Sprite Register 0
Color Calculation Ratio (For Sprite) S1CCRT 180100H 12~8 For Sprite Register 1
Color Calculation Ratio (For Sprite) S2CCRT 180102H 4~0 For Sprite Register 2
Color Calculation Ratio (For Sprite) S3CCRT 180102H 12~8 For Sprite Register 3
Color Calculation Ratio (For Sprite) S4CCRT 180104H 4~0 For Sprite Register 4
Color Calculation Ratio (For Sprite) S5CCRT 180104H 12~8 For Sprite Register 5
Color Calculation Ratio (For Sprite) S6CCRT 180106H 4~0 For Sprite Register 6
Color Calculation Ratio (For Sprite) S7CCRT 180106H 12~8 For Sprite Register 7
Color Calculation Ratio (For Scroll N0CCRT 180108H 4~0 For NBG0 (or RBG1)
Screen)
Color Calculation Ratio (For Scroll N1CCRT 180108H 12~8 For NBG1 (or EXBG)
Screen)
Color Calculation Ratio (For Scroll N2CCRT 18010AH 4~0 For NBG2
Screen)
Color Calculation Ratio (For Scroll N3CCRT 18010AH 12~8 For NBG3
Screen)
Color Calculation Ratio (For Scroll R0CCRT 18010CH 4~0 For RBG0
Screen)
Color Calculation Ratio (For Scroll LCCCRT 18010EH 4~0 For LNCL
Screen)
Color Calculation Ratio (For Scroll BKCCRT 18010EH 12~8 For BACK
Screen)
• Color Offset Enable
Color Offset Enable N0COEN 180110H 0 For NBG0 (or RBG1)
Color Offset Enable N1COEN 180110H 1 For NBG1 (or EXBG)
Color Offset Enable N2COEN 180110H 2 For NBG2
Color Offset Enable N3COEN 180110H 3 For NBG3
Color Offset Enable R0COEN 180110H 4 For RBG0
Color Offset Enable BKCOEN 180110H 5 For BACK
Color Offset Enable SPCOEN 180110H 6 For Sprite
• Color Offset Select
Color Offset Select N0COSL 180112H 0 For NBG0 (or RBG1)
Color Offset Select N1COSL 180112H 1 For NBG1 (or EXBG)
Color Offset Select N2COSL 180112H 2 For NBG2
Color Offset Select N3COSL 180112H 3 For NBG3
Color Offset Select R0COSL 180112H 4 For RBG0
Color Offset Select BKCOSL 180112H 5 For BACK
Color Offset Select SPCOSL 180112H 6 For Sprite
326
Bit Name Bit Address Bit Application
Abbreviation
• Color Offset
Color Offset Value COARD 180114H 8~0 For Color Offset A Red Data
Color Offset Value COAGR 180116H 8~0 For Color Offset A Green Data
Color Offset Value COABL 180118H 8~0 For Color Offset A Blue Data
Color Offset Value COBRD 18011AH 8~0 For Color Offset B Red Data
Color Offset Value COBGR 18011CH 8~0 For Color Offset B Green Data
Color Offset Value COBBL 18011EH 8~0 For Color Offset B Blue Data
ST-58-R2 327
16.3 Register Bit Functions
• TV Mode (Read Allowed)
15 14 13 12 11 10 9 8
TVMD DISP ~ ~ ~ ~ ~ ~ BDCLMD
180000H 7 6 5 4 3 2 1 0
LSMD1 LSMD0 VRESO1 VRESO0 ~ HRESO2 HRESO1 HRESO0
TV screen display bit : Display bit (DISP), bit 15
Controls picture display to the TV screen.
DISP Process
0 Picture is not displayed on TV screen
1 Picture is displayed on TV screen
Border color mode bit (BDCLMD), bit 8
Controls colors displayed by the border area.
BDCLMD Process
0 Displays black
1 Display back screen
Interlace mode bit (LSMD1, LSMD0) bits 7 and 6
Designates the interlace mode.
LSMD1 LSMD0 Process
0 0 Non-Interlace
0 1 Setting not allowed
1 0 Single-density interlace
1 1 Double-density interlace
Vertical resolution bit (VRESO1, VRESO0), bit 5, 4
Designates vertical resolution when a picture is displayed on the TV screen.
VRESO1 VRESO0 Vertical Resolution Display Monitor
0 0 224 Lines NTSC or PAL format TV
0 1 240 Lines NTSC or PAL format TV
1 0 256 Lines PAL format TV
1 1 Not Allowed -
328
Horizontal resolution bit (HRESO2 to HRESO0), bit 2 to 0
Selects the horizontal resolution when a picture is displayed on the TV screen.
HRESO2 HRESO1 HRESO0 Horizontal Graphic Mode Display
Resolution Monitor
0 0 0 320 Pixels Normal
Graphic A
0 0 1 352 Pixels Normal NTSC
Graphic B Format or
0 1 0 640 Pixels Hi-Res PAL
Graphic A Format TV
0 1 1 704 Pixels Hi-Res
Graphic B
1 0 0 320 Pixels Exclusive Normal 31kHz Monitor
Graphic A
1 0 1 352 Pixels Exclusive Normal Hi-Vision Monitor
Graphic B
1 1 0 640 Pixels Exclusive Normal 31kHz Monitor
Graphic A
1 1 1 704 Pixels Exclusive Normal Hi-Vision Monitor
Graphic B
• External Signal Enable Register (Read Allowed)
15 14 13 12 11 10 9 8
EXTEN ~ ~ ~ ~ ~ ~ EXLTEN EXSYEN
180002H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ DASEL EXBGEN
External latch enable bit (EXLTEN), bit 9
Selects the condition for latching the HV counter value to the HV counter register.
EXLTEN Condition
0 Latches when reading external signal enable register
1 Latches through external signal
EXSYNC enable bit (EXSYEN), bit 8
Controls input to the internal synchronous circuit of the external sync signal.
EXSYEN Process
0 Does not input external sync signal
1 Inputs external sync signal, and synchronizes TV screen display with the
external
ST-58-R2 329
Display area select bit (DASEL), bit1
Designates the image display area. Valid only when the EXBGEN bit is 1.
DASEL Process
0 Displays screen image only in the set display area
1 Displays screen in the standard display area
EXBG enable bit (EXBGEN), bit 0
Controls input of external screen data.
EXBGEN Process
0 Does not input external screen data
1 Inputs external screen data
• Screen Status (Read Only)
15 14 13 12 11 10 9 8
TVSTAT ~ ~ ~ ~ ~ ~ EXLTFG EXSYFG
180004H 7 6 5 4 3 2 1 0
~ ~ ~ ~ VBLANK HBLANK ODD PAL
External latch flag (EXLTFG), bit 9
Through external signals, this displays whether the HV counter value is latched to
the HV counter register. Clears to 0 when the screen status register reads out.
EXLTFG HV Counter Value Status
0 Not latched in register
1 Latched in register
External SYNC flag (EXSYFG), bit 8
Displays whether the internal routes through External SYNC flag are in sync.
Clears to 0 when the screen status register reads out.
EXSYFG External Sync Status
0 Not synchronized
1 Internal circuit synchronized
330
Vertical blank flag (VBLANK), bit 3
Displays the vertical scan status of the TV screen.
VBLANK Vertical Scan Status
0 During vertical scan
1 During vertical re-trace (VBLANK)
Horizontal blank flag (HBLANK), bit 2
Displays the horizontal scan status of the TV screen.
HBLANK Horizontal Scan Status
0 During horizontal scan
1 During horizontal re-trace (HBLANK)
Scan Field Flag : Odd/even field flag (ODD), bit 1
Scan conditions are shown when the TV screen mode is the interlace mode. The
non-interlace mode is always 1.
ODD Display
0 During even field scan
1 During odd field scan
TV standard flags : PAL/NTSC flag (PAL), bit 0
Displays TV standards.
PAL Display
0 NTSC standard
1 PAL standard
• VRAM Size (Read Allowed)
15 14 13 12 11 10 9 8
VRSIZE VRAMSZ ~ ~ ~ ~ ~ ~ ~
180006H 7 6 5 4 3 2 1 0
~ ~ ~ ~ VER3 VER2 VER1 VER0
ST-58-R2 331
VRAM size bit (VRAMSZ), bit 15.
Indicates the VRAM capacity used in the system.
VRAMSZ VRAM Size
0 4M bit
1 8M bit
Version Number Bit (VER3 to VER0), Bits 3 to 0
Shows the VDP2 version number; the first is 0.
• H Counter (Read Only)
15 14 13 12 11 10 9 8
HCNT ~ ~ ~ ~ ~ ~ HCT9 HCT8
180008H 7 6 5 4 3 2 1 0
HCT7 HCT6 HCT5 HCT4 HCT3 HCT2 HCT1 HCT0
H counter bit (HCT9 to HCT0), bits 9 to 0
Signals controlled through EXLTEN external signal enable register show the latched
H counter values.
Graphic HCT9 HCT8 HCT7 HCT6 HCT5 HCT4 HCT3 HCT2 HCT1 HCT0
Mode
Normal H8 H7 H6 H5 H4 H3 H2 H1 H0 Invalid
Hi-Res H9 H8 H7 H6 H5 H4 H3 H2 H1 H0
Exclusive Invalid H8 H7 H6 H5 H4 H3 H2 H1 H0
Normal
Exclusive Invalid H9 H8 H7 H6 H5 H4 H3 H2 H1
Hi-Res
• V Counter (Read Only)
15 14 13 12 11 10 9 8
VCNT ~ ~ ~ ~ ~ ~ VCT9 VCT8
18000AH 7 6 5 4 3 2 1 0
VCT7 VCT6 VCT5 VCT4 VCT3 VCT2 VCT1 VCT0
332
V counter value bit : V counter bit (VCT9~VCT0), bit 9 to 0
Signals controlled through EXLTEN external signal enable register show the latched
V counter values.
TV Screen VCT9 VCT8 VCT7 VCT6 VCT5 VCT4 VCT3 VCT2 VCT1 VCT0
(Interlace) Mode
Normal Hi-Res V8 V7 V6 V5 V4 V3 V2 V1 V0 Invalid
(Non-Interlace,
Single-Density
Interlace)
Normal Hi-Res V8 V7 V6 V5 V4 V3 V2 V1 V0 0: Odd fields
(Double-Density 1: Even fields
Interlace)
Exclusive V9 V8 V7 V6 V5 V4 V3 V2 V1 V0
Monitor
• RAM Control (Read Allowed)
15 14 13 12 11 10 9 8
RAMCTL CRKTE ~ CRMD1 CRMD0 ~ ~ VRBMD VRAMD
18000EH 7 6 5 4 3 2 1 0
RDBSB11 RDBSB10 RDBSB01 RDBSB00 RDBSA11 RDBSA10 RDBSA01 RDBSA00
Color RAM coefficient table enable bit (CRKTE), bit 15
Designates whether to store the coefficient table in color RAM.
CRKTE Process
0 Coefficient table is stored in VRAM.
1 Coefficient table is stored in color RAM.
Color RAM mode bit (CRMD1, CRMD0), bits 13 and 12
Selects the color RAM mode
CRMD1 CRMD0 Mode Process
0 0 0 RGB each 5 bits, 1024 color settings
0 1 1 RGB each 5 bits, 2048 color settings
1 0 2 RGB each 8 bits, 1024 color settings
1 1 - Setting not allowed
VRAM Mode Bit (VRBMD, VRAMD), Bits 9 and 8
Controls VRAM bank partitions
ST-58-R2 333
VRAMD 18000EH Bit 8 For VRAM-A
VRBMD 18000EH Bit 9 For VRAM-B
VRxMD Process
0 Do not partition in 2 banks
1 Partition in 2 banks
Note: Enter A or B into bit name for x.
Rotation data bank select bit: Data bank select bit (RDBSA01, RDBSA00, RDBSA11,
RDBSA10, RDBSB01, RDBSB00, RDBSB11, RDBSB10)
Designates the use objective of the VRAM of the rotation scroll screen. This bit is
only in effect when the rotation scroll screen is displayed.
RDBSA00, RDBSA01 18000EH Bit 1,0 For VRAM-A0 (or VRAM-A)
RDBSA10, RDBSA11 18000EH Bit 3,2 For VRAM-A1
RDBSB00, RDBSB01 18000EH Bit 5,4 For VRAM-B0 (or VRAM-B)
RDBSB10, RDBSB11 18000EH Bit 7,6 For VRAM-B1
RDBSx1 RDBSx0 VRAM Use
0 0 Not used as RAM for RBG0
0 1 RAM for RBG0 End table
1 0 RAM for RBG0 Pattern Name table
1 1 RAM for RBG0 Character Pattern table (or Bitmap Pattern)
Note: A0, A1, B0, or B1 is entered in bit name for x.
• VRAM Cycle Pattern (Bank A0)
15 14 13 12 11 10 9 8
CYCA0L VCP0A03 VCP0A02 VCP0A01 VCP0A00 VCP1A03 VCP1A02 VCP1A01 VCP1A00
180010H 7 6 5 4 3 2 1 0
VCP2A03 VCP2A02 VCP2A01 VCP2A00 VCP3A03 VCP3A02 VCP3A01 VCP3A00
VRAM Cycle Pattern (Bank A0)
15 14 13 12 11 10 9 8
CYCA0U VCP4A03 VCP4A02 VCP4A01 VCP4A00 VCP5A03 VCP5A02 VCP5A01 VCP5A00
180012H 7 6 5 4 3 2 1 0
VCP6A03 VCP6A02 VCP6A01 VCP6A00 VCP7A03 VCP7A02 VCP7A01 VCP7A00
VRAM cycle pattern (for VRAM-A0) bit: VRAM cycle pattern bit (VCP0A00 to
VCP0A03, VCP1A00 to VCP1A03, VCP2A00 to VCP2A03, VCP3A00 to VCP3A03,
VCP4A00 to VCP4A03, VCP5A00 to VCP5A03, VCP6A00 to VCP6A03, VCP7A00 to
VCP7A03)
334
Sets the access command of VRAM access that performs in VRAM-A0 (or VRAM-
A) timing T0 to T7.
VCP0A00~VCP0A03 180010H Bit 12~15 VRAM-A0 (or VRAM-A) Timing for T0
VCP1A00~VCP1A03 180010H Bit 8~11 VRAM-A0 (or VRAM-A) Timing for T1
VCP2A00~VCP2A03 180010H Bit 4~7 VRAM-A0 (or VRAM-A) Timing for T2
VCP3A00~VCP3A03 180010H Bit 0~3 VRAM-A0 (or VRAM-A) Timing for T3
VCP4A00~VCP4A03 180012H Bit 12~15 VRAM-A0 (or VRAM-A) Timing for T4
VCP5A00~VCP5A03 180012H Bit 8~11 VRAM-A0 (or VRAM-A) Timing for T5
VCP6A00~VCP6A03 180012H Bit 4~7 VRAM-A0 (or VRAM-A) Timing for T6
VCP7A00~VCP7A03 180012H Bit 0~3 VRAM-A0 (or VRAM-A) Timing for T7
• VRAM Cycle Pattern (Bank A1)
15 14 13 12 11 10 9 8
CYCA1L VCP0A13 VCP0A12 VCP0A11 VCP0A10 VCP1A13 VCP1A12 VCP1A11 VCP1A10
180014H 7 6 5 4 3 2 1 0
VCP2A13 VCP2A12 VCP2A11 VCP2A10 VCP3A13 VCP3A12 VCP3A11 VCP3A10
• VRAM Cycle Pattern (Bank A1)
15 14 13 12 11 10 9 8
CYCA1U VCP4A13 VCP4A12 VCP4A11 VCP4A10 VCP5A13 VCP5A12 VCP5A11 VCP5A10
180016H 7 6 5 4 3 2 1 0
VCP6A13 VCP6A12 VCP6A11 VCP6A10 VCP7A13 VCP7A12 VCP7A11 VCP7A10
VRAM cycle pattern (for VRAM-A1) bit: VRAM cycle pattern bit (VCP0A10 to
VCP0A13, VCP1A10 to VCP1A13, VCP2A10 to VCP2A13, VCP3A10 to VCP3A13,
VCP4A10 to VCP4A13, VCP5A10 to VCP5A13, VCP6A10 to VCP6A13, VCP7A10 to
VCP7A13)
Sets the access command of the VRAM access that performs in VRAM-A1 timing T0
to T7.
VCP0A10~VCP0A13 180014H Bit 12~15 VRAM-A1 Timing for T0
VCP1A10~VCP1A13 180014H Bit 8~11 VRAM-A1 Timing for T1
VCP2A10~VCP2A13 180014H Bit 4~7 VRAM-A1 Timing for T2
VCP3A10~VCP3A13 180014H Bit 0~3 VRAM-A1 Timing for T3
VCP4A10~VCP4A13 180016H Bit 12~15 VRAM-A1 Timing for T4
VCP5A10~VCP5A13 180016H Bit 8~11 VRAM-A1 Timing for T5
VCP6A10~VCP6A13 180016H Bit 4~7 VRAM-A1 Timing for T6
VCP7A10~VCP7A13 180016H Bit 0~3 VRAM-A1 Timing for T7
ST-58-R2 335
• VRAM Cycle Pattern (Bank B0)
15 14 13 12 11 10 9 8
CYCB0L VCP0B03 VCP0B02 VCP0B01 VCP0B00 VCP1B03 VCP1B02 VCP1B01 VCP1B00
180018H 7 6 5 4 3 2 1 0
VCP2B03 VCP2B02 VCP2B01 VCP2B00 VCP3B03 VCP3B02 VCP3B01 VCP3B00
• VRAM Cycle Pattern (Bank B0)
15 14 13 12 11 10 9 8
CYCB0U VCP4B03 VCP4B02 VCP4B01 VCP4B00 VCP5B03 VCP5B02 VCP5B01 VCP5B00
18001AH 7 6 5 4 3 2 1 0
VCP6B03 VCP6B02 VCP6B01 VCP6B00 VCP7B03 VCP7B02 VCP7B01 VCP7B00
VRAM cycle pattern (for VRAM-B0) bit: VRAM cycle pattern bit
(VCP0B00 to VCP0B03, VCP1B00 to VCP1B03, VCP2B00 to VCP2B03, VCP3B00 to
VCP3B03, VCP4B00 to VCP4B03, VCP5B00 to VCP5B03, VCP6B00 to VCP6B03,
VCP7B00 to VCP7B03)
Sets the access command of VRAM access that performs in VRAM-B0 (or VRAM-B)
timing T0 to T7.
VCP0B00~VCP0B03 180018H Bit 12~15 VRAM-B0 (or VRAM-B) Timing for T0
VCP1B00~VCP1B03 180018H Bit 8~11 VRAM-B0 (or VRAM-B) Timing for T1
VCP2B00~VCP2B03 180018H Bit 4~7 VRAM-B0 (or VRAM-B) Timing for T2
VCP3B00~VCP3B03 180018H Bit 0~3 VRAM-B0 (or VRAM-B) Timing for T3
VCP4B00~VCP4B03 18001AH Bit 12~15 VRAM-B0 (or VRAM-B) Timing for T4
VCP5B00~VCP5B03 18001AH Bit 8~11 VRAM-B0 (or VRAM-B) Timing for T5
VCP6B00~VCP6B03 18001AH Bit 4~7 VRAM-B0 (or VRAM-B) Timing for T6
VCP7B00~VCP7B03 18001AH Bit 0~3 VRAM-B0 (or VRAM-B) Timing for T7
• VRAM Cycle Pattern (Bank B1)
15 14 13 12 11 10 9 8
CYCB1L VCP0B13 VCP0B12 VCP0B11 VCP0B10 VCP1B13 VCP1B12 VCP1B11 VCP1B10
18001CH 7 6 5 4 3 2 1 0
VCP2B13 VCP2B12 VCP2B11 VCP2B10 VCP3B13 VCP3B12 VCP3B11 VCP3B10
• VRAM Cycle Pattern (Bank B1)
15 14 13 12 11 10 9 8
CYCB1U VCP4B13 VCP4B12 VCP4B11 VCP4B10 VCP5B13 VCP5B12 VCP5B11 VCP5B10
18001EH 7 6 5 4 3 2 1 0
VCP6B13 VCP6B12 VCP6B11 VCP6B10 VCP7B13 VCP7B12 VCP7B11 VCP7B10
336
VRAM cycle pattern (for VRAM-B1) bit: VRAM cycle pattern bit
(VCP0B10 to VCP0B13, VCP1B10 to VCP1B13, VCP2B10 to VCP2B13, VCP3B10 to
VCP3B13, VCP4B10 to VCP4B13, VCP5B10 to VCP5B13, VCP6B10 to VCP6B13,
VCP7B10 to VCP7B13).
Sets the access command of VRAM access that performs in VRAM-B1 timing T0 to
T7.
VCP0B10~VCP0B13 18001CH Bit 12~15 VRAM-B1 Timing for T0
VCP1B10~VCP1B13 18001CH Bit 8~11 VRAM-B1 Timing for T1
VCP2B10~VCP2B13 18001CH Bit 4~7 VRAM-B1 Timing for T2
VCP3B10~VCP3B13 18001CH Bit 0~3 VRAM-B1 Timing for T3
VCP4B10~VCP4B13 18001EH Bit 12~15 VRAM-B1 Timing for T4
VCP5B10~VCP5B13 18001EH Bit 8~11 VRAM-B1 Timing for T5
VCP6B10~VCP6B13 18001EH Bit 4~7 VRAM-B1 Timing for T6
VCP7B10~VCP7B13 18001EH Bit 0~3 VRAM-B1 Timing for T7
Access Command Value VRAM Access
VCPnxx3 VCPnxx2 VCPnxx1 VCPnxx0
0 0 0 0 NBG0 Pattern Name Data Read
0 0 0 1 NBG1 Pattern Name Data Read
0 0 1 0 NBG2 Pattern Name Data Read
0 0 1 1 NBG3 Pattern Name Data Read
0 1 0 0 NBG0 Character Pattern Data Read
0 1 0 1 NBG1 Character Pattern Data Read
0 1 1 0 NBG2 Character Pattern Data Read
0 1 1 1 NBG3 Character Pattern Data Read
1 0 0 0 Setting not allowed
1 0 0 1 Setting not allowed
1 0 1 0 Setting not allowed
1 0 1 1 Setting not allowed
1 1 0 0 NBG0 Vertical Cell Scroll Table Data Read
1 1 0 1 NBG1 Vertical Cell Scroll Table Data Read
1 1 1 0 CPU Read/Write
1 1 1 1 No Access
Note: n: 0 to 7 (corresponds to access timing T0 to T7)
xx: A0, A1, B0, B1 (corresponds to VRAM-A0, VRAM-A1, VRAM-B0, VRAM-B1)
ST-58-R2 337
• Screen Display Enable
15 14 13 12 11 10 9 8
BGON ~ ~ ~ R0TPON N3TPON N2TPON N1TPON N0TPON
180020H 7 6 5 4 3 2 1 0
~ ~ R1ON R0ON N3ON N2ON N1ON N0ON
Transparent display enable bit (N0TPON, N1TPON, N2TPON, N3TPON, R0TPON)
Designates whether to nullify the transparency code.
N0TPON 180020H Bit 8 For NBG0 (or RBG1)
N1TPON 180020H Bit 9 For NBG1 (or EXBG)
N2TPON 180020H Bit 10 For NBG2
N3TPON 180020H Bit 11 For NBG3
R0TPON 180020H Bit 12 For RBG0
xxTPON Process
0 Validates transparency code (transparency code dots become transparent)
1 Invalidates transparency code (transparency code dots are displayed according to data
values)
Note: N0, N1, N2, N3, or R0 is entered into bit name for xx.
Screen display enable bit: On bit (N0ON, N1ON, N2ON, N3ON, R0ON, R1ON)
Designates whether to display each scroll screen.
N0ON 180020H Bit 0 For NBG0
N1ON 180020H Bit 1 For NBG1
N2ON 180020H Bit 2 For NBG2
N3ON 180020H Bit 3 For NBG3
R0ON 180020H Bit 4 For RBG0
R1ON 180020H Bit 5 For RBG1
xxON Process
0 Cannot display (Does not execute VRAM access for display)
1 Can display
Note: N0, N1, N2, N3, R0, or R1 is entered into bit name xx.
• Mosaic Control
15 14 13 12 11 10 9 8
MZCTL MZSZV3 MZSZV2 MZSZV1 MZSZV0 MZSZH3 MZSZH2 MZSZH1 MZSZH0
180022H 7 6 5 4 3 2 1 0
~ ~ ~ R0MZE N3MZE N2MZE N1MZE N0MZE
338
Mosaic size bit (MZSZH3 to MZSZH0, MZSZV3 to MZSZV0)
Designates the horizontal and vertical mosaic size.
MZSZV3~MZSZV0 180022H Bit 15~12 For vertical mosaic size
MZSZH3~MZSZH0 180022H Bit 11~8 For horizontal mosaic size
MZSZH3 MZSZH2 MZSZH1 MZSZH0 Horizontal Mosaic Size
0 0 0 0 1 dot
0 0 0 1 2 dots
0 0 1 0 3 dots
0 0 1 1 4 dots
0 1 0 0 5 dots
0 1 0 1 6 dots
0 1 1 0 7 dots
0 1 1 1 8 dots
1 0 0 0 9 dots
1 0 0 1 10 dots
1 0 1 0 11 dots
1 0 1 1 12 dots
1 1 0 0 13 dots
1 1 0 1 14 dots
1 1 1 0 15 dots
1 1 1 1 16 dots
Note: There is no relationship with the interlace setting.
MZSZV3 MZSZV2 MZSZV1 MZSZV0 Vertical Mosaic Size
Non-Interlace Interlace
0 0 0 0 1 dot 2 dots
0 0 0 1 2 dots 4 dots
0 0 1 0 3 dots 6 dots
0 0 1 1 4 dots 8 dots
0 1 0 0 5 dots 10 dots
0 1 0 1 6 dots 12 dots
0 1 1 0 7 dots 14 dots
0 1 1 1 8 dots 16 dots
1 0 0 0 9 dots 18 dots
1 0 0 1 10 dots 20 dots
1 0 1 0 11 dots 22 dots
1 0 1 1 12 dots 24 dots
1 1 0 0 13 dots 26 dots
1 1 0 1 14 dots 28 dots
1 1 1 0 15 dots 30 dots
1 1 1 1 16 dots 32 dots
ST-58-R2 339
Mosaic enable bit (N0MZE, N1MZE, N2MZE, N3MZE, R0MZE)
Designates the screen performing mosaic process.
N0MZE 180022H Bit 0 For NBG0 (or RBG1)
N1MZE 180022H Bit 1 For NBG1
N2MZE 180022H Bit 2 For NBG2
N3MZE 180022H Bit 3 For NBG3
R0MZE 180022H Bit 4 For RBG0
xxMZE Process
0 Does not execute mosaic process
1 Processes mosaic process
Note: N0, N1, N2, N3, or R0 is entered in bit name for xx.
• Special Function Code Select
15 14 13 12 11 10 9 8
SFSEL ~ ~ ~ ~ ~ ~ ~ ~
180024H 7 6 5 4 3 2 1 0
~ ~ ~ R0SFCS N3SFCS N2SFCS N1SFCS N0SFCS
Special function code select bit (N0SFCS, N1SFCS, N2SFCS, N3SFCS,
R0SFCS)
Designates the special function code effecting every scroll screen.
N0SFCS 180024H Bit 0 For NBG0 (or RBG1)
N1SFCS 180024H Bit 1 For NBG1
N2SFCS 180024H Bit 2 For NBG2
N3SFCS 180024H Bit 3 For NBG3
R0SFCS 180024H Bit 4 For RBG0
xxSFCS Process
0 Enables special function code A
1 Enables special function code B
Note: N0, N1, N2, N3, or R0 is entered in bit name for xx.
340
• Special Function Code
15 14 13 12 11 10 9 8
SFCODE SFCDB7 SFCDB6 SFCDB5 SFCDB4 SFCDB3 SFCDB2 SFCDB1 SFCDB0
180026H 7 6 5 4 3 2 1 0
SFCDA7 SFCDA6 SFCDA5 SFCDA4 SFCDA3 SFCDA2 SFCDA1 SFCDA0
Special function code bit (SFCDA7 to SFCDA0, SFCDB7 to SFCDB0)
Designates special function codes A and B.
SFCDA7~SFCDA0 180026H Bit 7~0 For Special Function Code A
SFCDB7~SFCDB0 180026H Bit 15~8 For Special Function Code B
Bit Name Dot Color Code
SFCDx0 When lower 4 bits of dot color code are, 0H or 1H
SFCDx1 When lower 4 bits of dot color code are, 2H or 3H
SFCDx2 When lower 4 bits of dot color code are, 4H or 5H
SFCDx3 When lower 4 bits of dot color code are, 6H or 7H
SFCDx4 When lower 4 bits of dot color code are, 8H or 9H
SFCDx5 When lower 4 bits of dot color code are, AH or BH
SFCDx6 When lower 4 bits of dot color code are, CH or DH
SFCDx7 When lower 4 bits of dot color code are, EH or FH
Note: A or B is entered in bit name x.
Settings Process
0 Does not use special functions
1 Uses special functions
• Character Control (NBG0, NBG1)
15 14 13 12 11 10 9 8
CHCTLA ~ ~ N1CHCN1 N1CHCN0 N1BMSZ1 N1BMSZ0 N1BMEN N1CHSZ
180028H 7 6 5 4 3 2 1 0
~ N0CHCN2 N0CHCN1 N0CHCN0 N0BMSZ1 N0BMSZ0 N0BMEN N0CHSZ
• Character Control (NBG2, NBG3, RBG0)
15 14 13 12 11 10 9 8
CHCTLB ~ R0CHCN2 R0CHCN1 R0CHCN0 ~ R0BMSZ R0BMEN R0CHSZ
18002AH 7 6 5 4 3 2 1 0
~ ~ N3CHCN N3CHSZ ~ ~ N2CHCN N2CHSZ
ST-58-R2 341
Character color number bit (N0CHCN2 to N0CHCN0, N1CHCN1, N1CHCN0, N2CHCN,
N3CHCN, R0CHCN2 to R0CHCN0)
Designates the character color count of each screen and the bit map color count
when displaying by the bit map format.
N0CHCN2~N0CHCN0 180028H Bit 6~4 For NBG0 (or RBG1)
N1CHCN1,N1CHCN0 180028H Bit 13,12 For NBG1 (or EXBG)
N2CHCN 18002AH Bit 1 For NBG2
N3CHCN 18002AH Bit 5 For NBG3
R0CHCN2~R0CHCN0 18002AH Bit 14~12 For RBG0
N0CHCN2 N0CHCN1 N0CHCN0 TV Screen Mode Color
Exclusive Monitor
Normal Hi-Res Format
0 0 0 16 colors 16 colors 16 colors Palette Format
0 0 1 256 colors 256 colors 256 colors Palette Format
0 1 0 2048 colors 2048 colors 2048 colors Palette Format
0 1 1 32,786 colors 32,786 colors 32,786 colors RGB Format
1 0 0 16,770,000 Setting not Setting not RGB Format
colors allowed allowed
1 0 1 Setting not allowed (Please do not set.)
1 1 0 Setting not allowed (Please do not set.)
1 1 1 Setting not allowed (Please do not set.)
Note: Cannot be displayed by the exclusive monitor mode when used as RBG1.
N1CHCN1 N1CHCN0 TV Screen Mode Color Format
Exclusive Monitor
Normal Hi-Res
0 0 16 colors 16 colors 16 colors Palette Format
0 1 256 colors 256 colors 256 colors Palette Format
1 0 2048 colors 2048 colors 2048 colors Palette Format
1 1 32,786 colors 32,786 colors 32,786 colors RGB Format
Note: When used as EXBG, and when the set values are N1CHCN1 = 1, N1CHCN0 = 1 there are
16,770,000 colors
NnCHCN0 TV Screen Mode Color Format
Exclusive Monitor
Normal Hi-Res
0 16 colors 16 colors 16 colors Palette Format
1 256 colors 256 colors 256 colors Palette Format
Note: 2 or 3 is entered in bit name for n.
342
R0CHCN2 R0CHCN1 R0CHCN0 TV Screen Mode Color
Exclusive Monitor
Normal Hi-Res Format
0 0 0 16 colors 16 colors Cannot Display Palette Format
0 0 1 256 colors 256 colors Cannot Display Palette Format
0 1 0 2048 colors 2048 colors Cannot Display Palette Format
0 1 1 32,786 colors 32,786 colors Cannot Display RGB Format
1 0 0 16,770,000 Setting not Cannot Display RGB Format
colors allowed
1 0 1 Setting not allowed (Please do not set.)
1 1 0 Setting not allowed (Please do not set.)
1 1 1 Setting not allowed (Please do not set.)
Bit map size bit (N0BMSZ1, N0BMSZ0, N1BMSZ1, N1BMSZ0, R0BMSZ)
Designates the bit map size of each screen when display is in a bit map format.
N0BMSZ1,N0BMSZ0 180028H Bit 3,2 For NBG0
N1BMSZ1,N1BMSZ0 180028H Bit 11,10 For NBG1
R0BMSZ 18002AH Bit 10 For RBG0
NnBMSZ1 NnBMSZ0 Bitmap Size
0 0 512 H dots X 512 V dots
0 1 512 H dots X 512 V dots
1 0 512 H dots X 512 V dots
1 1 512 H dots X 512 V dots
Note: 0 or 1 is entered in bit name for n.
ROBMSZ Bitmap Size
0 512 H dots X 256 V dots
1 512 H dots X 512 V dots
Bit map enable bit (N0BMEN, N1BMEN, R0BMEN)
Designates whether to display the scroll screen in a bit map format.
N0BMEN 180028H Bit 1 For NBG0
N1BMEN 180028H Bit 9 For NBG1
R0BMEN 18002AH Bit 9 For RBG0
ST-58-R2 343
xxBMEN Screen Display Format
0 Cell Format
1 Bitmap Format
Note: N0, N1, or R0 is entered in bit name for xx.
Character size bit (N0CHSZ, N1CHSZ, N2CHSZ, N3CHSZ, R0CHSZ)
Designates the character size when the scroll screen is in a cell format.
N0CHSZ 180028H Bit 0 For NBG0 (or RBG1)
N1CHSZ 180028H Bit 8 For NBG1
N2CHSZ 18002AH Bit 0 For NBG2
N3CHSZ 18002AH Bit 4 For NBG3
ROCHSZ 18002AH Bit 8 For RBG0
xxCHSZ Character Pattern Size
0 1 H Cell X 1 V Cell
1 2 H Cells X 2 V Cells
Note: N0, N1, N2, N3, or R0 is entered in bit name for xx.
• Bit Map Palette Number (NBG0, NBG1)
15 14 13 12 11 10 9 8
BMPNA ~ ~ N1BMPR N1BMCC ~ N1BMP6 N1BMP5 N1BMP4
18002CH 7 6 5 4 3 2 1 0
~ ~ N0BMPR N0BMCC ~ N0BMP6 N0BMP5 N0BMP4
• Bit Map Palette Number (RBG0)
15 14 13 12 11 10 9 8
BMPNB ~ ~ ~ ~ ~ ~ ~ ~
18002EH 7 6 5 4 3 2 1 0
~ ~ R0BMPR R0BMCC ~ R0BMP6 R0BMP5 R0BMP4
Special priority bit (for bit map): Bit map special priority bit (N0BMPR, N1BMPR,
R0BMPR)
Designates the special priority bit when the scroll screen is displayed by the bit map
format.
N0BMPR 18002CH Bit 5 For NBG0
N1BMPR 18002CH Bit 13 For NBG1
R0BMPR 18002EH Bit 5 For RBG0
344
Special color calculation bit (for bit map): Bit map special color calculation bit
(N0BMCC, N1BMCC, R0BMCC)
Designates the special color calculation bit when the scroll screen is displayed by the
bit map format.
N0BMCC 18002CH Bit 4 For NBG0
N1BMCC 18002CH Bit 12 For NBG1
R0BMCC 18002EH Bit 4 For RBG0
Palette number bit (for bit map): Bit map palette number bit (N0BMP6 to N0BMP4,
N1BMP6 to N1BMP4, R0BMP6 to R0BMP4)
Designates the highest 3 bits of the palette number when the scroll screen is
displayed in the bit map format.
N0BMP6~N0BMP4 18002CH Bit 2~0 For NBG0
N1BMP6~N1BMP4 18002CH Bit 10~8 For NBG1
R0BMP6~R0BMP4 18002EH Bit 2~0 For RBG0
• Pattern Name Control (NBG0)
15 14 13 12 11 10 9 8
PNCN0 N0PNB N0CNSM ~ ~ ~ ~ N0SPR N0SCC
180030H 7 6 5 4 3 2 1 0
N0SPLT6 N0SPLT5 N0SPLT4 N0SCN4 N0SCN3 N0SCN2 N0SCN1 N0SCN0
• Pattern Name Control (NBG1)
15 14 13 12 11 10 9 8
PNCN1 N1PNB N1CNSM ~ ~ ~ ~ N1SPR N1SCC
180032H 7 6 5 4 3 2 1 0
N1SPLT6 N1SPLT5 N1SPLT4 N1SCN4 N1SCN3 N1SCN2 N1SCN1 N1SCN0
• Pattern Name Control (NBG2)
15 14 13 12 11 10 9 8
PNCN2 N2PNB N2CNSM ~ ~ ~ ~ N2SPR N2SCC
180034H 7 6 5 4 3 2 1 0
N2SPLT6 N2SPLT5 N2SPLT4 N2SCN4 N2SCN3 N2SCN2 N2SCN1 N2SCN0
• Pattern Name Control (NBG3)
15 14 13 12 11 10 9 8
PNCN3 N3PNB N3CNSM ~ ~ ~ ~ N3SPR N3SCC
180036H 7 6 5 4 3 2 1 0
N3SPLT6 N3SPLT5 N3SPLT4 N3SCN4 N3SCN3 N3SCN2 N3SCN1 N3SCN0
ST-58-R2 345
• Pattern Name Control (RBG0)
15 14 13 12 11 10 9 8
PNCR R0PNB R0CNSM ~ ~ ~ ~ R0SPR R0SCC
180038H 7 6 5 4 3 2 1 0
R0SPLT6 R0SPLT5 R0SPLT4 R0SCN4 R0SCN3 R0SCN2 R0SCN1 R0SCN0
Pattern name data size bit (N0PNB, N1PNB, N2PNB, N3PNB, R0PNB)
Designates the pattern name data size when displaying in the cell format.
N0PNB 180030H Bit 15 For NBG0 (or RBG1)
N1PNB 180032H Bit 15 For NBG1
N2PNB 180034H Bit 15 For NBG2
N3PNB 180036H Bit 15 For NBG3
R0PNB 180038H Bit 15 For RBG0
xxPNB Pattern Name Data Size
0 2 Words
1 1 Word
Note: N0, N1, N3, or R0 is entered in bit name for xx.
Character number supplement bit (N0CNSM, N1CNSM, N2CNSM, N3CNSM, R0CNSM)
Designates the character number supplement mode when the pattern name data
size in the pattern name table is 1-word.
N0CNSM 180030H Bit 14 For NBG0 (or RBG1)
N1CNSM 180032H Bit 14 For NBG1
N2CNSM 180034H Bit 14 For NBG2
N3CNSM 180036H Bit 14 For NBG3
R0CNSM 180038H Bit 14 For RBG0
xxCNSM Character Number Process
Auxiliary Mode
0 0 Character number in pattern name data is 10 bits.
Flip function can be selected in character units.
1 1 Character number in pattern name data is 12 bits.
Flip function cannot be used.
Note: N0, N1, N2, N3, or R0 is entered in bit name for xx.
346
Special priority bit (for pattern name supplement data): Supplement special priority bit
(N0SPR, N1SPR, N2SPR, N3SPR, R0SPR)
Designates the pattern name supplement data as the special priority bit when the
pattern name data size is 1-word.
N0SPR 180030H Bit 9 For NBG0 (or RBG1)
N1SPR 180032H Bit 9 For NBG1
N2SPR 180034H Bit 9 For NBG2
N3SPR 180036H Bit 9 For NBG3
R0SPR 180038H Bit 9 For RBG0
Special color calculation bit (for pattern name supplement data): Supplementary
special color calculation bit (N0SCC, N1SCC, N2SCC, N3SCC, R0SCC)
The special color calculation bit is designated as pattern name supplement data
when the pattern name data size is 1-word.
N0SCC 180030H Bit 8 For NBG0 (or RBG 1)
N1SCC 180032H Bit 8 For NBG1
N2SCC 180034H Bit 8 For NBG2
N3SCC 180036H Bit 8 For NBG3
R0SCC 180038H Bit 8 For RBG0
Supplementary palette number bit (N0SPLT6 to N0SPLT4, N1SPLT6 to N1SPLT4,
N2SPLT6 to N2SPLT4, N3SPLT6 to N3SPLT4, R0SPLT6 to R0SPLT4)
Designates the palette number bit as pattern name supplement data when the
pattern name data size is 1-word. Three bits are added to the palette number bit of
the pattern name data for the supplementary palette number bit.
N0SPLT6~N0SPLT4 180030H Bit 7~5 For NBG0 (or RBG 1)
N1SPLT6~N1SPLT4 180032H Bit 7~5 For NBG1
N2SPLT6~N2SPLT4 180034H Bit 7~5 For NBG2
N3SPLT6~N3SPLT4 180036H Bit 7~5 For NBG3
R0SPLT6~R0SPLT4 180038H Bit 7~5 For RBG0
Supplementary character number bit (N0SCN4 to N0SCN0, N1SCN4 to N1SCN0,
N2SCN4 to N2SCN0, N3SCN4 to N3SCN0, R0SCN4 to R0SCN0)
ST-58-R2 347
Designates the character number bit as the pattern name supplement data when the
pattern name data size is 1-word. Five bits are added to the palette number bit of the
pattern name data for the supplementary palette number bit.
N0SCN4~N0SCN0 180030H Bit 4~0 For NBG0 (or RBG 1)
N1SCN4~N1SCN0 180032H Bit 4~0 For NBG1
N2SCN4~N2SCN0 180034H Bit 4~0 For NBG2
N3SCN4~N3SCN0 180036H Bit 4~0 For NBG3
R0SCN4~R0SCN0 180038H Bit 4~0 For RBG0
Plane Size
15 14 13 12 11 10 9 8
PLSZ RBOVR1 RBOVR0 RBPLSZ1 RBPLSZ0 RAOVR1 RAOVR0 RAPLSZ1 RAPLSZ0
18003AH 7 6 5 4 3 2 1 0
N3PLSZ1 N3PLSZ0 N2PLSZ1 N2PLSZ0 N1PLSZ1 N1PLSZ0 N0PLSZ1 N0PLSZ0
Plane size bit (N0PLSZ1, N0PLSZ0, N1PLSZ1, N1PLSZ0, N2PLSZ1, N2PLSZ0,
N3PLSZ1, N3PLSZ0, RAPLSZ1, RAPLSZ0, RBPLSZ1, RBPLSZ0)
Designates the plane size (number of pages) of each scroll screen.
N0PLSZ1, N0PLSZ0 18003AH Bit 1,0 For NBG0
N1PLSZ1, N1PLSZ0 18003AH Bit 3,2 For NBG1
N2PLSZ1, N2PLSZ0 18003AH Bit 5,4 For NBG2
N3PLSZ1, N3PLSZ0 18003AH Bit 7,6 For NBG3
RAPLSZ1, RAPLSZ0 18003AH Bit 9,8 For Rotation Parameter A
RBPLSZ1, RBPLSZ0 18003AH Bit 13,12 For Rotation Parameter B
xxPLSZ1 xxPLSZ0 Plane Size
0 0 1 H Page X 1 V Page
0 1 2 H Pages X 1 V Page
1 0 Invalid (Do not set.)
1 1 2 H Pages X 2 V Pages
Note: N0, N1, N2, N3, RA, or RB is entered in bit name for xx.
348
Screen-over process bit: Over bit (RAOVR1, RAOVR0, RBOVR1, RBOVR0)
Designates control (screen-over process) when the display coordinate value exceeds
the display area in the rotation scroll screen.
RAOVR1, RAOVR0 18003AH Bit 11,10 For Rotation Parameter A
RBOVR1, RBOVR0 18003AH Bit 15,14 For Rotation Parameter B
RxOVR1 RxOVR0 Screen Over Process
0 0 Outside the display area, the image set in the display area is repeated.
0 1 Outside the display area, the character pattern specified by screen over
pattern name register is repeated. (Only when the rotation scroll screen
is in cell format.)
1 0 Outside the display area, the scroll screen is transparent,
1 1 Set the display area as 0≤X≤512, 0≤Y≤512 regardless of plane size or
bitmap size and make that area transparent.
Note: A or B is entered in bit name for x.
• Map Offset (NBG0~NBG3)
15 14 13 12 11 10 9 8
MPOFN ~ N3MP8 N3MP7 N3MP6 ~ N2MP8 N2MP7 N2MP6
18003CH 7 6 5 4 3 2 1 0
~ N1MP8 N1MP7 N1MP6 ~ N0MP8 N0MP7 N0MP6
• Map Offset (Rotation Parameter A, B)
15 14 13 12 11 10 9 8
MPOFR ~ ~ ~ ~ ~ ~ ~ ~
18003EH 7 6 5 4 3 2 1 0
~ RBMP8 RBMP7 RBMP6 ~ RAMP8 RAMP7 RAMP6
Map offset bit (N0MP8 to N0MP6, N1MP8 to N1MP6, N2MP8 to N2MP6, N3MP8 to
N3MP6, RAMP8 to RAMP6, RBMP8 to RBMP6)
When the scroll screen display format is the cell format, the map offset value of 3
bits is added to the highest 6 bits of the map register. This designates the bit map
pattern boundary when in the bit map format.
N0MP8~N0MP6 18003CH Bit 2~0 For NBG0
N1MP8~N1MP6 18003CH Bit 6~4 For NBG1
N2MP8~N2MP6 18003CH Bit 10~8 For NBG2
N3MP8~N3MP6 18003CH Bit 14~12 For NBG3
RAMP8~RAMP6 18003EH Bit 2~0 For Rotation Parameter A
RBMP8~RBMP6 18003EH Bit 6~4 For Rotation Parameter B
ST-58-R2 349
• Map (NBG0, Plane A, B)
15 14 13 12 11 10 9 8
MPABN0 ~ ~ N0MPB5 N0MPB4 N0MPB3 N0MPB2 N0MPB1 N0MPB0
180040H 7 6 5 4 3 2 1 0
~ ~ N0MPA5 N0MPA4 N0MPA3 N0MPA2 N0MPA1 N0MPA0
• Map (NBG0, Plane C, D)
15 14 13 12 11 10 9 8
MPCDN0 ~ ~ N0MPD5 N0MPD4 N0MPD3 N0MPD2 N0MPD1 N0MPD0
180042H 7 6 5 4 3 2 1 0
~ ~ N0MPC5 N0MPC4 N0MPC3 N0MPC2 N0MPC1 N0MPC0
• Map (NBG1, Plane A, B)
15 14 13 12 11 10 9 8
MPABN1 ~ ~ N1MPB5 N1MPB4 N1MPB3 N1MPB2 N1MPB1 N1MPB0
180044H 7 6 5 4 3 2 1 0
~ ~ N1MPA5 N1MPA4 N1MPA3 N1MPA2 N1MPA1 N1MPA0
• Map (NBG1, Plane C, D)
15 14 13 12 11 10 9 8
MPCDN1 ~ ~ N1MPD5 N1MPD4 N1MPD3 N1MPD2 N1MPD1 N1MPD0
180046H 7 6 5 4 3 2 1 0
~ ~ N1MPC5 N1MPC4 N1MPC3 N1MPC2 N1MPC1 N1MPC0
• Map (NBG2, Plane A, B)
15 14 13 12 11 10 9 8
MPABN2 ~ ~ N2MPB5 N2MPB4 N2MPB3 N2MPB2 N2MPB1 N2MPB0
180048H 7 6 5 4 3 2 1 0
~ ~ N2MPA5 N2MPA4 N2MPA3 N2MPA2 N2MPA1 N2MPA0
• Map (NBG2, Plane C, D)
15 14 13 12 11 10 9 8
MPCDN2 ~ ~ N2MPD5 N2MPD4 N2MPD3 N2MPD2 N2MPD1 N2MPD0
18004AH 7 6 5 4 3 2 1 0
~ ~ N2MPC5 N2MPC4 N2MPC3 N2MPC2 N2MPC1 N2MPC0
• Map (NBG3, Plane A, B)
15 14 13 12 11 10 9 8
MPABN3 ~ ~ N3MPB5 N3MPB4 N3MPB3 N3MPB2 N3MPB1 N3MPB0
18004CH 7 6 5 4 3 2 1 0
~ ~ N3MPA5 N3MPA4 N3MPA3 N3MPA2 N3MPA1 N3MPA0
350
• Map (NBG3, Plane C, D)
15 14 13 12 11 10 9 8
MPCDN3 ~ ~ N3MPD5 N3MPD4 N3MPD3 N3MPD2 N3MPD1 N3MPD0
18004EH 7 6 5 4 3 2 1 0
~ ~ N3MPC5 N3MPC4 N3MPC3 N3MPC2 N3MPC1 N3MPC0
Map bit (for normal scroll): (N0MPA5 to N0MPA0, N0MPB5 to N0MPB0,
N0MPC5 to N0MPC0, N0MPD5 to N0MPD0, N1MPA5 to N1MPA0, N1MPB5 to
N1MPB0, N1MPC5 to N1MPC0, N1MPD5 to N1MPD0, N2MPA5 to N2MPA0, N2MPB5
to N2MPB0, N2MPC5 to N2MPC0, N2MPD5 to N2MPD0, N3MPA5 to N3MPA0,
N3MPB5 to N3MPB0, N3MPC5 to N3MPC0, N3MPD5 to N3MPD0)
When the Normal scroll screen is displayed by the cell format, the lead address for
the pattern name table is designated for each plane.
N0MPA5~N0MPA0 180040H Bit 5~0 For NBG0 Plane A
N0MPB5~N0MPB0 180040H Bit 13~8 For NBG0 Plane B
N0MPC5~N0MPC0 180042H Bit 5~0 For NBG0 Plane C
N0MPD5~N0MPD0 180042H Bit 13~8 For NBG0 Plane D
N1MPA5~N1MPA0 180044H Bit 5~0 For NBG1 Plane A
N1MPB5~N1MPB0 180044H Bit 13~8 For NBG1 Plane B
N1MPC5~N1MPC0 180046H Bit 5~0 For NBG1 Plane C
N1MPD5~N1MPD0 180046H Bit 13~8 For NBG1 Plane D
N2MPA5~N2MPA0 180048H Bit 5~0 For NBG2 Plane A
N2MPB5~N2MPB0 180048H Bit 13~8 For NBG2 Plane B
N2MPC5~N2MPC0 18004AH Bit 5~0 For NBG2 Plane C
N2MPD5~N2MPD0 18004AH Bit 13~8 For NBG2 Plane D
N3MPA5~N3MPA0 18004CH Bit 5~0 For NBG3 Plane A
N3MPB5~N3MPB0 18004CH Bit 13~8 For NBG3 Plane B
N3MPC5~N3MPC0 18004EH Bit 5~0 For NBG3 Plane C
N3MPD5~N3MPD0 18004EH Bit 13~8 For NBG3 Plane D
ST-58-R2 351
• Map (Rotation Parameter A, Plane A, B)
15 14 13 12 11 10 9 8
MPBRAB ~ ~ RAMPB5 RAMPB4 RAMPB3 RAMPB2 RAMPB1 RAMPB0
180050H 7 6 5 4 3 2 1 0
~ ~ RAMPA5 RAMPA4 RAMPA3 RAMPA2 RAMPA1 RAMPA0
• Map (Rotation Parameter A, Plane C, D)
15 14 13 12 11 10 9 8
MPCDRA ~ ~ RAMPD5 RAMPD4 RAMPD3 RAMPD2 RAMPD1 RAMPD0
180052H 7 6 5 4 3 2 1 0
~ ~ RAMPC5 RAMPC4 RAMPC3 RAMPC2 RAMPC1 RAMPC0
• Map (Rotation Parameter A, Plane E, F)
15 14 13 12 11 10 9 8
MPEFRA ~ ~ RAMPF5 RAMPF4 RAMPF3 RAMPF2 RAMPF1 RAMPF0
180054H 7 6 5 4 3 2 1 0
~ ~ RAMPE5 RAMPE4 RAMPE3 RAMPE2 RAMPE1 RAMPE0
• Map (Rotation Parameter A, Plane G, H)
15 14 13 12 11 10 9 8
MPGHRA ~ ~ RAMPH5 RAMPH4 RAMPH3 RAMPH2 RAMPH1 RAMPH0
180056H 7 6 5 4 3 2 1 0
~ ~ RAMPG5 RAMPG4 RAMPG3 RAMPG2 RAMPG1 RAMPG0
• Map (Rotation Parameter A, Plane I, J)
15 14 13 12 11 10 9 8
MPIJRA ~ ~ RAMPJ5 RAMPJ4 RAMPJ3 RAMPJ2 RAMPJ1 RAMPJ0
180058H 7 6 5 4 3 2 1 0
~ ~ RAMPI5 RAMPI4 RAMPI3 RAMPI2 RAMPI1 RAMPI0
• Map (Rotation Parameter A, Plane K, L)
15 14 13 12 11 10 9 8
MPKLRA ~ ~ RAMPL5 RAMPL4 RAMPL3 RAMPL2 RAMPL1 RAMPL0
18005AH 7 6 5 4 3 2 1 0
~ ~ RAMPK5 RAMPK4 RAMPK3 RAMPK2 RAMPK1 RAMPK0
• Map (Rotation Parameter A, Plane M, N)
15 14 13 12 11 10 9 8
MPMNRA ~ ~ RAMPN5 RAMPN4 RAMPN3 RAMPN2 RAMPN1 RAMPN0
18005CH 7 6 5 4 3 2 1 0
~ ~ RAMPM5 RAMPM4 RAMPM3 RAMPM2 RAMPM1 RAMPM0
352
• Map (Rotation Parameter A, Plane O, P)
15 14 13 12 11 10 9 8
MPOPRA ~ ~ RAMPP5 RAMPP4 RAMPP3 RAMPP2 RAMPP1 RAMPP0
18005EH 7 6 5 4 3 2 1 0
~ ~ RAMPO5 RAMPO4 RAMPO3 RAMPO2 RAMPO1 RAMPO0
• Map (Rotation Parameter B, Plane A, B)
15 14 13 12 11 10 9 8
MPABRB ~ ~ RBMPB5 RBMPB4 RBMPB3 RBMPB2 RBMPB1 RBMPB0
180060H 7 6 5 4 3 2 1 0
~ ~ RBMPA5 RBMPA4 RBMPA3 RBMPA2 RBMPA1 RBMPA0
• Map (Rotation Parameter B, Plane C, D)
15 14 13 12 11 10 9 8
MPCDRB ~ ~ RBMPD5 RBMPD4 RBMPD3 RBMPD2 RBMPD1 RBMPD0
180062H 7 6 5 4 3 2 1 0
~ ~ RBMPC5 RBMPC4 RBMPC3 RBMPC2 RBMPC1 RBMPC0
• Map (Rotation Parameter B, Plane E, F)
15 14 13 12 11 10 9 8
MPEFRB ~ ~ RBMPF5 RBMPF4 RBMPF3 RBMPF2 RBMPF1 RBMPF0
180064H 7 6 5 4 3 2 1 0
~ ~ RBMPE5 RBMPE4 RBMPE3 RBMPE2 RBMPE1 RBMPE0
• Map (Rotation Parameter B, Plane G, H)
15 14 13 12 11 10 9 8
MPGHRB ~ ~ RBMPH5 RBMPH4 RBMPH3 RBMPH2 RBMPH1 RBMPH0
180066H 7 6 5 4 3 2 1 0
~ ~ RBMPG5 RBMPG4 RBMPG3 RBMPG2 RBMPG1 RBMPG0
• Map (Rotation Parameter B, Plane I, J)
15 14 13 12 11 10 9 8
MPIJRB ~ ~ RBMPJ5 RBMPJ4 RBMPJ3 RBMPJ2 RBMPJ1 RBMPJ0
180068H 7 6 5 4 3 2 1 0
~ ~ RBMPI5 RBMPI4 RBMPI3 RBMPI2 RBMPI1 RBMPI0
• Map (Rotation Parameter B, Plane K, L)
15 14 13 12 11 10 9 8
MPKLRB ~ ~ RBMPL5 RBMPL4 RBMPL3 RBMPL2 RBMPL1 RBMPL0
18006AH 7 6 5 4 3 2 1 0
~ ~ RBMPK5 RBMPK4 RBMPK3 RBMPK2 RBMPK1 RBMPK0
ST-58-R2 353
• Map (Rotation Parameter B, Plane M, N)
15 14 13 12 11 10 9 8
MPMNRB ~ ~ RBMPN5 RBMPN4 RBMPN3 RBMPN2 RBMPN1 RBMPN0
18006CH 7 6 5 4 3 2 1 0
~ ~ RBMPM5 RBMPM4 RBMPM3 RBMPM2 RBMPM1 RBMPM0
• Map (Rotation Parameter B, Plane O, P)
15 14 13 12 11 10 9 8
MPOPRB ~ ~ RBMPP5 RBMPP4 RBMPP3 RBMPP2 RBMPP1 RBMPP0
18006EH 7 6 5 4 3 2 1 0
~ ~ RBMPO5 RBMPO4 RBMPO3 RBMPO2 RBMPO1 RBMPO0
Map bit (for rotation scroll): Map bit (RAMPA5 to RAMPA0, RAMPB5 to RAMPB0,
RAMPC5 to RAMPC0, RAMPD5 to RAMPD0, RAMPE5 to RAMPE0,
RAMPF5 to RAMPF0, RAMPG5 to RAMPG0, RAMPH5 to RAMPH0,
RAMPI5 to RAMPI0, RAMPJ5 to RAMPJ0, RAMPK5 to RAMPK0,
RAMPL5 to RAMPL0, RAMPM5 to RAMPM0, RAMPN5 to RAMPN0,
RAMPO5 to RAMPO0, RAMPP5 to RAMPP0, RBMPA5 to RBMPA0,
RBMPB5 to RBMPB0, RBMPC5 to RBMPC0, RBMPD5 to RBMPD0,
RBMPE5 to RBMPE0, RBMPF5 to RBMPF0, RBMPG5 to RBMPG0,
RBMPH5 to RBMPH0, RAMPI5 to RBMPI0, RBMPJ5 to RBMPJ0,
RBMPK5 to RBMPK0, RBMPL5 to RBMPL0, RBMPM5 to RBMPM0,
RBMPN5 to RBMPN0, RBMPO5 to RBMPO0, RBMPP5 to RBMPP0)
Designates the lead address of the pattern name table being arranged in each plane
when a rotation scroll screen is displayed in the cell format.
354
RAMPA5~RAMPA0 180050H Bit 5~0 Rotation Parameter A for Screen Plane A
RAMPB5~RAMPB0 180050H Bit 13~8 Rotation Parameter A for Screen Plane B
RAMPC5~RAMPC0 180052H Bit 5~0 Rotation Parameter A for Screen Plane C
RAMPD5~RAMPD0 180052H Bit 13~8 Rotation Parameter A for Screen Plane D
RAMPE5~RAMPE0 180054H Bit 5~0 Rotation Parameter A for Screen Plane E
RAMPF5~RAMPF0 180054H Bit 13~8 Rotation Parameter A for Screen Plane F
RAMPG5~RAMPG0 180056H Bit 5~0 Rotation Parameter A for Screen Plane G
RAMPH5~RAMPH0 180056H Bit 13~8 Rotation Parameter A for Screen Plane H
RAMPI5~RAMPI0 180058H Bit 5~0 Rotation Parameter A for Screen Plane I
RAMPJ5~RAMPJ0 180058H Bit 13~8 Rotation Parameter A for Screen Plane J
RAMPK5~RAMPK0 18005AH Bit 5~0 Rotation Parameter A for Screen Plane K
RAMPL5~RAMPL0 18005AH Bit 13~8 Rotation Parameter A for Screen Plane L
RAMPM5~RAMPM0 18005CH Bit 5~0 Rotation Parameter A for Screen Plane M
RAMPN5~RAMPN0 18005CH Bit 13~8 Rotation Parameter A for Screen Plane N
RAMPO5~RAMPO0 18005EH Bit 5~0 Rotation Parameter A for Screen Plane O
RAMPP5~RAMPP0 18005EH Bit 13~8 Rotation Parameter A for Screen Plane P
RBMPA5~RBMPA0 180060H Bit 5~0 Rotation Parameter B for Screen Plane A
RBMPB5~RBMPB0 180060H Bit 13~8 Rotation Parameter B for Screen Plane B
RBMPC5~RBMPC0 180062H Bit 5~0 Rotation Parameter B for Screen Plane C
RBMPD5~RBMPD0 180062H Bit 13~8 Rotation Parameter B for Screen Plane D
RBMPE5~RBMPE0 180064H Bit 5~0 Rotation Parameter B for Screen Plane E
RBMPF5~RBMPF0 180064H Bit 13~8 Rotation Parameter B for Screen Plane F
RBMPG5~RBMPG0 180066H Bit 5~0 Rotation Parameter B for Screen Plane G
RBMPH5~RBMPH0 180066H Bit 13~8 Rotation Parameter B for Screen Plane H
RBMPI5~RBMPI0 180068H Bit 5~0 Rotation Parameter B for Screen Plane I
RBMPJ5~RBMPJ0 180068H Bit 13~8 Rotation Parameter B for Screen Plane J
RBMPK5~RBMPK0 18006AH Bit 5~0 Rotation Parameter B for Screen Plane K
RBMPL5~RBMPL0 18006AH Bit 13~8 Rotation Parameter B for Screen Plane L
RBMPM5~RBMPM0 18006CH Bit 5~0 Rotation Parameter B for Screen Plane M
RBMPN5~RBMPN0 18006CH Bit 13~8 Rotation Parameter B for Screen Plane N
RBMPO5~RBMPO0 18006EH Bit 5~0 Rotation Parameter B for Screen Plane O
RBMPP5~RBMPP0 18006EH Bit 13~8 Rotation Parameter B for Screen Plane P
ST-58-R2 355
• Screen Scroll Value (NBG0, Horizontal Integer Part)
15 14 13 12 11 10 9 8
SCXIN0 ~ ~ ~ ~ ~ N0SCXI10 N0SCXI9 N0SCXI8
180070H 7 6 5 4 3 2 1 0
N0SCXI7 N0SCXI6 N0SCXI5 N0SCXI4 N0SCXI3 N0SCXI2 N0SCXI1 N0SCXI0
• Screen Scroll Value (NBG0, Horizontal Fractional Part)
15 14 13 12 11 10 9 8
SCXDN0 N0SCXD1 N0SCXD2 N0SCXD3 N0SCXD4 N0SCXD5 N0SCXD6 N0SCXD7 N0SCXD8
180072H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
• Screen Scroll Value (NBG0, Vertical Integer Part)
15 14 13 12 11 10 9 8
SCYIN0 ~ ~ ~ ~ ~ N0SCYI10 N0SCYI9 N0SCYI8
180074H 7 6 5 4 3 2 1 0
N0SCYI7 N0SCYI6 N0SCYI5 N0SCYI4 N0SCYI3 N0SCYI2 N0SCYI1 N0SCYI0
• Screen Scroll Value (NBG0, Vertical Fractional Part)
15 14 13 12 11 10 9 8
SCYDN0 N0SCYD1 N0SCYD2 N0SCYD3 N0SCYD4 N0SCYD5 N0SCYD6 N0SCYD7 N0SCYD8
180076H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
• Coordinate Increment (NBG0, Horizontal Integer Part)
15 14 13 12 11 10 9 8
ZMXIN0 ~ ~ ~ ~ ~ ~ ~ ~
180078H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N0ZMXI2 N0ZMXI1 N0ZMXI0
• Coordinate Increment (NBG0, Horizontal Fractional Part)
15 14 13 12 11 10 9 8
ZMXDN0 N0ZMXD1 N0ZMXD2 N0ZMXD3 N0ZMXD4 N0ZMXD5 N0ZMXD6 N0ZMXD7 N0ZMXD8
18007AH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
• Coordinate Increment (NBG0, Vertical Integer Part)
15 14 13 12 11 10 9 8
ZMYIN0 ~ ~ ~ ~ ~ ~ ~ ~
18007CH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N0ZMYI2 N0ZMYI1 N0ZMYI0
356
• Coordinate Increment (NBG0, Vertical Fractional Part)
15 14 13 12 11 10 9 8
ZMYDN0 N0ZMYD1 N0ZMYD2 N0ZMYD3 N0ZMYD4 N0ZMYD5 N0ZMYD6 N0ZMYD7 N0ZMYD8
18007EH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
• Screen Scroll Value (NBG1, Horizontal Integer Part)
15 14 13 12 11 10 9 8
SCXIN1 ~ ~ ~ ~ ~ N1SCXI10 N1SCXI9 N1SCXI8
180080H 7 6 5 4 3 2 1 0
N1SCXI7 N1SCXI6 N1SCXI5 N1SCXI4 N1SCXI3 N1SCXI2 N1SCXI1 N1SCXI0
• Screen Scroll Value (NBG1, Horizontal Fractional Part)
15 14 13 12 11 10 9 8
SCXDN1 N1SCXD1 N1SCXD2 N1SCXD3 N1SCXD4 N1SCXD5 N1SCXD6 N1SCXD7 N1SCXD8
180082H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
• Screen Scroll Value (NBG1, Vertical Integer Part)
15 14 13 12 11 10 9 8
SCYIN1 ~ ~ ~ ~ ~ N1SCYI10 N1SCYI9 N1SCYI8
180084H 7 6 5 4 3 2 1 0
N1SCYI7 N1SCYI6 N1SCYI5 N1SCYI4 N1SCYI3 N1SCYI2 N1SCYI1 N1SCYI0
• Screen Scroll Value (NBG1, Vertical Fractional Part)
15 14 13 12 11 10 9 8
SCYDN1 N1SCYD1 N1SCYD2 N1SCYD3 N1SCYD4 N1SCYD5 N1SCYD6 N1SCYD7 N1SCYD8
180086H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
• Coordinate Increment (NBG1, Horizontal Integer Part)
15 14 13 12 11 10 9 8
ZMXIN1 ~ ~ ~ ~ ~ ~ ~ ~
180088H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N1ZMXI2 N1ZMXI1 N1ZMXI0
• Coordinate Increment (NBG1, Horizontal Fractional Part)
15 14 13 12 11 10 9 8
ZMXDN1 N1ZMXD1 N1ZMXD2 N1ZMXD3 N1ZMXD4 N1ZMXD5 N1ZMXD6 N1ZMXD7 N1ZMXD8
18008AH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
ST-58-R2 357
• Coordinate Increment (NBG1, Vertical Integer Part)
15 14 13 12 11 10 9 8
ZMYIN1 ~ ~ ~ ~ ~ ~ ~ ~
18008CH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N1ZMYI2 N1ZMYI1 N1ZMYI0
• Coordinate Increment (NBG1, Vertical Fractional Part)
15 14 13 12 11 10 9 8
ZMYDN1 N1ZMYD1 N1ZMYD2 N1ZMYD3 N1ZMYD4 N1ZMYD5 N1ZMYD6 N1ZMYD7 N1ZMYD8
18008EH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
• Screen Scroll Value (NBG2, Horizontal)
15 14 13 12 11 10 9 8
SCXN2 ~ ~ ~ ~ ~ N2SCX10 N2SCX9 N2SCX8
180090H 7 6 5 4 3 2 1 0
N2SCX7 N2SCX6 N2SCX5 N2SCX4 N2SCX3 N2SCX2 N2SCX1 N2SCX0
• Screen Scroll Value (NBG2, Vertical)
15 14 13 12 11 10 9 8
SCYN2 ~ ~ ~ ~ ~ N2SCY10 N2SCY9 N2SCY8
180092H 7 6 5 4 3 2 1 0
N2SCY7 N2SCY6 N2SCY5 N2SCY4 N2SCY3 N2SCY2 N2SCY1 N2SCY0
• Screen Scroll Value (NBG3, Horizontal)
15 14 13 12 11 10 9 8
SCXN3 ~ ~ ~ ~ ~ N3SCX10 N3SCX9 N3SCX8
180094H 7 6 5 4 3 2 1 0
N3SCX7 N3SCX6 N3SCX5 N3SCX4 N3SCX3 N3SCX2 N3SCX1 N3SCX0
• Screen Scroll Value (NBG3, Vertical)
15 14 13 12 11 10 9 8
SCYN3 ~ ~ ~ ~ ~ N3SCY10 N3SCY9 N3SCY8
180096H 7 6 5 4 3 2 1 0
N3SCY7 N3SCY6 N3SCY5 N3SCY4 N3SCY3 N3SCY2 N3SCY1 N3SCY0
Screen scroll value bit: Scroll bit (N0SCXI10 to N0SCXI0, N0SCXD1 to
N0SCXD8, N0SCYI10 to N0SCYI0, N0SCYD1 to N0SCYD8, N1SCXI10 to N1SCXI0,
N1SCXD1 to N1SCXD8, N1SCYI10 to N1SCYI0, N1SCYD1 to N1SCYD8, N2SCX10 to
N2SCX0, N2SCY10 to N2SCY0, N3SCX10 to N3SCX0, N3SCY10 to N3SCY0)
Designates the horizontal and vertical screen scroll values (coordinate values) of the
Normal scroll screen.
358
N0SCXI10~N0SCXI0 180070H Bit 10~0 For NBG0 horizontal direction (integer part)
N0SCXD1~N0SCXD8 180072H Bit 15~8 For NBG0 horizontal direction (fractional part)
N0SCYI10~N0SCYI0 180074H Bit 10~0 For NBG0 vertical direction (integer part)
N0SCYD1~N0SCYD8 180076H Bit 15~8 For NBG0 vertical direction (fractional part)
N1SCXI10~N1SCXI0 180080H Bit 10~0 For NBG1 horizontal direction (integer part)
N1SCXD1~N1SCXD8 180082H Bit 15~8 For NBG1 horizontal direction (fractional part)
N1SCYI10~N1SCYI0 180084H Bit 10~0 For NBG1 vertical direction (integer part)
N1SCYD1~N1SCYD8 180086H Bit 15~8 For NBG1 vertical direction (fractional part)
N2SCX10~N2SCX0 180090H Bit 10~0 For NBG2 horizontal direction
N2SCY10~N2SCY0 180092H Bit 10~0 For NBG2 vertical direction
N3SCX10~N3SCX0 180094H Bit 10~0 For NBG3 horizontal direction
N3SCY10~N3SCY0 180096H Bit 10~0 For NBG3 vertical direction
Coordinate increment bit: Zoom bit (N0ZMXI2 to N0ZMXI0, N0ZMXD1 to
N0ZMXD8, N0ZMYI2 to N0ZMYI0, N0ZMYD1 to N0ZMYD8, N1ZMXI2 to N1ZMXI0,
N1ZMXD1 to N1ZMXD8, N1ZMYI2 to N1ZMYI0, N1ZMYD1 to N1ZMYD8)
Designates horizontal and vertical coordinate increments for calculating display
coordinates when expanding and reducing all Normal scroll screens.
N0ZMXI2~N0ZMXI0 180078H Bit 2~0 For NBG0 horizontal direction (integer part)
N0ZMXD1~N0ZMXD8 18007AH Bit 15~8 For NBG0 horizontal direction (fractional part)
N0ZMYI2~N0ZMYI0 18007CH Bit 2~0 For NBG0 vertical direction (integer part)
N0ZMYD1~N0ZMYD8 18007EH Bit 15~8 For NBG0 vertical direction (fractional part)
N1ZMXI2~N1ZMXI0 180088H Bit 2~0 For NBG1 horizontal direction (integer part)
N1ZMXD1~N1ZMXD8 18008AH Bit 15~8 For NBG1 horizontal direction (fractional part)
N1ZMYI2~N1ZMYI0 18008CH Bit 2~0 For NBG1 vertical direction (integer part)
N1ZMYD1~N1ZMYD8 18008EH Bit 15~8 For NBG1 vertical direction (fractional part)
• Reduction Enable
15 14 13 12 11 10 9 8
ZMCTL ~ ~ ~ ~ ~ ~ N1ZMQT N1ZMHF
180098H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ N0ZMQT N0ZMHF
Reduction enable bit: Zoom quarter/half bit (N1ZMQT, N1ZMHF, N0ZMQT, N0ZMHF)
Designates the maximum reducible range of each Normal scroll screen in the
horizontal direction.
ST-58-R2 359
N0ZMHF 180098H Bit 0 For NBG0
N0ZMQT 180098H Bit 1 For NBG0
N1ZMHF 180098H Bit 8 For NBG1
N1ZMQT 180098H Bit 9 For NBG1
NxZMQT NxZMHF Horizontal Reduction Display Restriction Items
0 0 Not allowed None
0 1 Up to 1/2 The number of character colors can be
set for 16 or 256 colors only.
1 0 Up to 1/4 The number of character colors can be
set for 16 colors only.
1 1 Up to 1/4 The number of character colors can be
set for 16 colors only.
Note: 0 or 1 is entered in bit name for x.
• Line and Vertical Cell Scroll Control (NBG0, NBG1)
15 14 13 12 11 10 9 8
SCRCTL ~ ~ N1LSS1 N1LSS0 N1LZMX N1LSCY N1LSCX N1VCSC
18009AH 7 6 5 4 3 2 1 0
~ ~ N0LSS1 N0LSS0 N0LZMX N0LSCY N0LSCX N0VCSC
Line Scroll Interval Bit: Line scroll select bit (N0LSS1, N0LSS0, N1LSS1, N1LSS0)
Designates the interval that reads line scroll table data from the table. The interval
changes depending on the interlace of the TV screen.
N0LSS1, N0LSS0 18009AH Bit 5, 4 For NBG0
N1LSS1, N1LSS0 18009AH Bit 13,12 For NBG1
NxLSS1 NxLSS0 Interlace Setting
Non-Interlace Single-Density Interlace Double-Density Interlace
0 0 Each line Every 2 lines Each line
0 1 Every 2 lines Every 4 lines Every 2 lines
1 0 Every 4 lines Every 8 lines Every 4 lines
1 1 Every 8 lines Every 16 lines Every 8 lines
Note: 0 or 1 is entered in bit name for x.
Line zoom enable bit: Line zoom X enable bit (N1LZMX, N0LZMX)
Designates whether expansion-reduction is done horizontally in line units.
N0LZMX 18009AH Bit 3 For NBG0
N1LSCX 18009AH Bit 11 For NBG1
360
NxLZMX Process
0 Does not scale horizontally per line units
1 Scales horizontally per line units
Note: 0 or 1 is entered in bit name for x.
Line scroll enable bit (for the vertical screen scroll value): Line scroll Y enable bit
(N1LSCY, N0LSCY)
Designates whether scroll is performed by vertical line units.
N0LSCY 18009AH Bit 2 For NBG0
N1LSCY 18009AH Bit 10 For NBG1
NxLSCY Process
0 Does not scroll vertically per line units
1 Scrolls vertically per line units
Note: 0 or 1 is entered in bit name for x.
Line scroll enable bit (for the horizontal screen scroll value): Line scroll X enable bit
(N1LSCX, N0LSCX)
Designates whether scroll is performed by horizontal line units.
N0LSCX 18009AH Bit 1 For NBG0
N1LSCX 18009AH Bit 9 For NBG1
NxLSCX Process
0 Does not scroll horizontally per line units
1 Scrolls horizontally per line units
Note: 0 or 1 is entered in bit name for x.
Vertical cell scroll enable bit (N1VCSC, N0VCSC)
Designates whether to perform vertical cell scroll.
N0VCSC 18009AH Bit 0 For NBG0
N1VCSC 18009AH Bit 8 For NBG1
NxVCSC Process
0 Does not cell-scroll vertically
1 Cell-scrolls vertically
Note: 0 or 1 is entered in bit name for x.
ST-58-R2 361
• Vertical Cell Scroll Table Address (NBG0, NBG1)
15 14 13 12 11 10 9 8
VCSTAU ~ ~ ~ ~ ~ ~ ~ ~
18009CH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ VCSTA18 VCSTA17 VCSTA16
• Vertical Cell Scroll Table Address (NBG0, NBG1)
15 14 13 12 11 10 9 8
VCSTAL VCSTA15 VCSTA14 VCSTA13 VCSTA12 VCSTA11 VCSTA10 VCSTA9 VCSTA8
18009EH 7 6 5 4 3 2 1 0
VCSTA7 VCSTA6 VCSTA5 VCSTA4 VCSTA3 VCSTA2 VCSTA1 ~
Vertical cell scroll table address bit (VCSTA18 to VCSTA1),
Designates the lead address of the vertical cell scroll table on the VRAM.
VCSTA18~VCSTA16 18009CH Bit 2~0
VCSTA15~VCSTA1 18009EH Bit 15~1
• Line Scroll Table Address (NBG0)
15 14 13 12 11 10 9 8
LSTA0U ~ ~ ~ ~ ~ ~ ~ ~
1800A0H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N0LSTA18 N0LSTA17 N0LSTA16
• Line Scroll Table Address (NBG0)
15 14 13 12 11 10 9 8
LSTA0L N0LSTA15 N0LSTA14 N0LSTA13 N0LSTA12 N0LSTA11 N0LSTA10 N0LSTA9 N0LSTA8
1800A2H 7 6 5 4 3 2 1 0
N0LSTA7 N0LSTA6 N0LSTA5 N0LSTA4 N0LSTA3 N0LSTA2 N0LSTA1 ~
• Line Scroll Table Address (NBG1)
15 14 13 12 11 10 9 8
LSTA1U ~ ~ ~ ~ ~ ~ ~ ~
1800A4H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N1LSTA18 N1LSTA17 N1LSTA16
• Line Scroll Table Address (NBG1)
15 14 13 12 11 10 9 8
LSTA1L N1LSTA15 N1LSTA14 N1LSTA13 N1LSTA12 N1LSTA11 N1LSTA10 N1LSTA9 N1LSTA8
1800A6H 7 6 5 4 3 2 1 0
N1LSTA7 N1LSTA6 N1LSTA5 N1LSTA4 N1LSTA3 N1LSTA2 N1LSTA1 ~
362
Line scroll table address bit (N0LSTA18 to N0LSTA16, N0LSTA15 to N0LSTA1,
N1LSTA18 to N1LSTA16, N1LSTA15 to N1LSTA1)
Designates the lead address of the line scroll table on the VRAM.
N0LSTA18~N0LSTA16 1800A0H Bit 2~0 For NBG0 (upper bit)
N0LSTA15~N0LSTA1 1800A2H Bit 15~1 For NBG0 (lower bit)
N1LSTA18~N1LSTA16 1800A4H Bit 2~0 For NBG1 (upper bit)
N1LSTA15~N1LSTA1 1800A6H Bit 15~1 For NBG1 (lower bit)
• Line Color Screen Table Address
15 14 13 12 11 10 9 8
LCTAU LCCLMD ~ ~ ~ ~ ~ ~ ~
1800A8H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ LCTA18 LCTA17 LCTA16
• Line Color Screen Table Address
15 14 13 12 11 10 9 8
LCTAL LCTA15 LCTA14 LCTA13 LCTA12 LCTA11 LCTA10 LCTA9 LCTA8
1800AAH 7 6 5 4 3 2 1 0
LCTA7 LCTA6 LCTA5 LCTA4 LCTA3 LCTA2 LCTA1 LCTA0
Line color screen mode bit: LNCL color mode bit (LCCLMD), bit 15
Designates the color mode of the line color screen.
LCCLMD Line Color Screen Color
0 Single color
1 Select per each line
Line color screen table address bit: LNCL table address bit (LCTA18 to LCTA0)
Designates the lead address of the line color screen table on the VRAM.
LCTA18~LCTA16 1800A8H Bit 2~0
LCTA15~LCTA0 1800AAH Bit 15~0
• Back Screen Table Address
15 14 13 12 11 10 9 8
BKTAU BKCLMD ~ ~ ~ ~ ~ ~ ~
1800ACH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ BKTA18 BKTA17 BKTA16
ST-58-R2 363
• Back Screen Table Address
15 14 13 12 11 10 9 8
BKTAL BKTA15 BKTA14 BKTA13 BKTA12 BKTA11 BKTA10 BKTA9 BKTA8
1800AEH 7 6 5 4 3 2 1 0
BKTA7 BKTA6 BKTA5 BKTA4 BKTA3 BKTA2 BKTA1 BKTA0
Back screen color mode bit: BACK color mode bit (BKCLMD), bit 15
Designates color mode of the back screen.
BKCLMD Back Screen Color
0 Single color
1 Select per each line
Back screen table address bit: BACK color table address bit (BKTA18 to BKTA0)
Designates the lead address of the back screen table on the VRAM.
BKTA18~BKTA16 1800ACH Bit 2~0
BKTA 15~BKTA0 1800AEH Bit 15~0
• Rotation Parameter Mode
15 14 13 12 11 10 9 8
RPMD ~ ~ ~ ~ ~ ~ ~ ~
1800B0H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ RPMD1 RPMD0
Rotation parameters mode bit (RPMD1, RPMD0), bits 1 and 0
When displaying RGB0, designates which rotation parameter of A or B will be used.
RPMD1 RPMD0 Mode Rotation Parameter
0 0 0 Rotation Parameter A
0 1 1 Rotation Parameter B
1 0 2 A screen and B screen are switched via
coefficient data read from rotation parameter A
coefficient table.
1 1 3 A screen and B screen are switched via
rotation parameter window
• Rotation Parameter Read Control
15 14 13 12 11 10 9 8
RPRCTL ~ ~ ~ ~ ~ RBKASTRE RBYSTRE RBXSTRE
1800B2H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ RAKASTRE RAYSTRE RAXSTRE
364
Parameter read enable bit (RAXSTRE, RBXSTRE, RAYSTRE, RBYSTRE, RAKASTRE,
RBKASTRE)
Designates the coefficient table start address KAst and TV screen start coordinates Xst
and Yst and whether to read from the rotation parameter table in that line.
RAXSTRE 1800B2H Bit 0 For Xst of Rotation Parameter A
RBXSTRE 1800B2H Bit 8 For Xst of Rotation Parameter B
RAYSTRE 1800B2H Bit 1 For Yst of Rotation Parameter A
RBYSTRE 1800B2H Bit 9 For Yst of Rotation Parameter B
RAKASTRE 1800B2H Bit 2 For KAst of Rotation Parameter A
RBKASTRE 1800B2H Bit 10 For KAst of Rotation Parameter B
RxSTRE Process
0 Selected parameters are not read for that line
1 Selected parameters are read for that line
Note: AX, BX, AY, BY, AKA, or BKA is entered in bit name for x.
• Coefficient Table Control
15 14 13 12 11 10 9 8
KTCTL ~ ~ ~ RBKLCE RBKMD1 RBKMD0 RBKDBS RBKTE
1800B4H 7 6 5 4 3 2 1 0
~ ~ ~ RAKLCE RAKMD1 RAKMD0 RAKDBS RAKTE
Coefficient line color enable bit (RAKLCE, RBKLCE)
Designates whether to use line color screen data in coefficient data.
RAKLCE 1800B4H Bit 4 For Rotation Parameter A
RBKLCE 1800B4H Bit 12 For Rotation Parameter B
RxKLCE Process
0 Line color screen data within coefficient data is not used
1 Line color screen data within coefficient data is used
Note: A or B is entered in the bit name for x.
Coefficient data mode bit: Coefficient mode bit (RAKMD1, RAKMD0, RBKMD1,
RBKMD0)
Designates what parameters the coefficient data is used as.
RAKMD1, RAKMD0 1800B4H Bit 3,2 For Rotation Parameter A
RBKMD1, RBKMD0 1800B4H Bit 11,10 For Rotation Parameter B
ST-58-R2 365
RxKMD1 RxKMD0 Mode Coefficient Data Function
0 0 0 Use as scale coefficient kx, ky
0 1 1 Use as scale coefficient kx
1 0 2 Use as scale coefficient ky
1 1 3 Use as viewpoint Xp after rotation conversion
Note: A or B is entered in the bit name for x.
Coefficient data size bit (RAKDBS, RBKDBS)
Designates the size of the coefficient data.
RAKDBS 1800B4H Bit 1 For Rotation Parameter A
RBKDBS 1800B4H Bit 9 For Rotation Parameter B
RxKDBS Coefficient Data Size
0 2 Words
1 1 Word
Note: A or B is entered in the bit name for x.
Coefficient table enable bit (RAKTE, RBKTE)
Designates whether the coefficient table is used.
RAKTE 1800B4H Bit 0 For Rotation Parameter A
RBKTE 1800B4H Bit 8 For Rotation Parameter B
RxKTE Process
0 Do not use coefficient table
1 Use coefficient table
Note: A or B is entered in the bit name for x.
• Coefficient Table Address Offset (Rotation Parameter A, B)
15 14 13 12 11 10 9 8
KTAOF ~ ~ ~ ~ ~ RBKTAOS2 RBKTAOS1 RBKTAOS0
1800B6H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ RAKTAOS2 RAKTAOS1 RAKTAOS0
Coefficient table address offset bit (RAKTAOS2 to RAKTAOS0, RBKTAOS2 to
RBKTAOS0)
Designates the lead address offset value of the coefficient table stored in the rotation
parameter table.
366
RAKTAOS2~RAKTAOS0 1800B6H Bit 2~0 For Rotation Parameter A
RBKTAOS2~RBKTAOS0 1800B6H Bit 10~8 For Rotation Parameter B
• Screen-over Pattern Name (Rotation Parameter A)
15 14 13 12 11 10 9 8
OVPNRA RAOPN15 RAOPN14 RAOPN13 RAOPN12 RAOPN11 RAOPN10 RAOPN9 RAOPN8
1800B8H 7 6 5 4 3 2 1 0
RAOPN7 RAOPN6 RAOPN5 RAOPN4 RAOPN3 RAOPN2 RAOPN1 RAOPN0
• Screen-over Pattern Name (Rotation Parameter B)
15 14 13 12 11 10 9 8
OVPNRB RBOPN15 RBOPN14 RBOPN13 RBOPN12 RBOPN11 RBOPN10 RBOPN9 RBOPN8
1800BAH 7 6 5 4 3 2 1 0
RBOPN7 RBOPN6 RBOPN5 RBOPN4 RBOPN3 RBOPN2 RBOPN1 RBOPN0
Over pattern name bit (RAOPN15 to RAOPN0, RBOPN15 to RBOPN0)
Designates pattern name data when the screen-over process repeating the character
pattern is set.
RAOPN15~RAOPN0 1800B8H Bit 15~0 For Rotation Parameter A
RBOPN15~RBOPN0 1800BAH Bit 15~0 For Rotation Parameter B
• Rotation Parameter Table Address (Rotation Parameter A, B)
15 14 13 12 11 10 9 8
RPYAU ~ ~ ~ ~ ~ ~ ~ ~
1800BCH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ RPTA18 RPTA17 RPTA16
• Rotation Parameter Table Address (Rotation Parameter A, B)
15 14 13 12 11 10 9 8
RPTAL RPTA15 RPTA14 RPTA13 RPTA12 RPTA11 RPTA10 RPTA9 RPTA8
1800BEH 7 6 5 4 3 2 1 0
RPTA7 RPTA6 RPTA5 RPTA4 RPTA3 RPTA2 RPTA1 ~
Rotation parameters table address bit (RPTA18 to RPTA1)
Designates the lead address of rotation parameter tables.
RPTA18~RPTA16 1800BCH Bit 2~0
RPTA15~RPTA1 1800BEH Bit 15~1
ST-58-R2 367
• Window Position (W0, Horizontal Start Point)
15 14 13 12 11 10 9 8
WPSX0 ~ ~ ~ ~ ~ ~ W0SX9 W0SX8
1800C0H 7 6 5 4 3 2 1 0
W0SX7 W0SX6 W0SX5 W0SX4 W0SX3 W0SX2 W0SX1 W0SX0
• Window Position (W0, Vertical Start Point)
15 14 13 12 11 10 9 8
WPSY0 ~ ~ ~ ~ ~ ~ ~ W0SY8
1800C2H 7 6 5 4 3 2 1 0
W0SY7 W0SY6 W0SY5 W0SY4 W0SY3 W0SY2 W0SY1 W0SY0
• Window Position (W0, Horizontal End Point)
15 14 13 12 11 10 9 8
WPEX0 ~ ~ ~ ~ ~ ~ W0EX9 W0EX8
1800C4H 7 6 5 4 3 2 1 0
W0EX7 W0EX6 W0EX5 W0EX4 W0EX3 W0EX2 W0EX1 W0EX0
• Window Position (W0, Vertical End Point)
15 14 13 12 11 10 9 8
WPEY0 ~ ~ ~ ~ ~ ~ ~ W0EY8
1800C6H 7 6 5 4 3 2 1 0
W0EY7 W0EY6 W0EY5 W0EY4 W0EY3 W0EY2 W0EY1 W0EY0
• Window Position (W1, Horizontal Start Point)
15 14 13 12 11 10 9 8
WPSX1 ~ ~ ~ ~ ~ ~ W1SX9 W1SX8
1800C8H 7 6 5 4 3 2 1 0
W1SX7 W1SX6 W1SX5 W1SX4 W1SX3 W1SX2 W1SX1 W1SX0
• Window Position (W1, Vertical Start Point)
15 14 13 12 11 10 9 8
WPSY1 ~ ~ ~ ~ ~ ~ ~ W1SY8
1800CAH 7 6 5 4 3 2 1 0
W1SY7 W1SY6 W1SY5 W1SY4 W1SY3 W1SY2 W1SY1 W1SY0
• Window Position (W1, Horizontal End Point)
15 14 13 12 11 10 9 8
WPEX1 ~ ~ ~ ~ ~ ~ W1EX9 W1EX8
1800CCH 7 6 5 4 3 2 1 0
W1EX7 W1EX6 W1EX5 W1EX4 W1EX3 W1EX2 W1EX1 W1EX0
368
• Window Position (W1, Vertical End Point)
15 14 13 12 11 10 9 8
WPEY1 ~ ~ ~ ~ ~ ~ ~ W1EY8
1800CEH 7 6 5 4 3 2 1 0
W1EY7 W1EY6 W1EY5 W1EY4 W1EY3 W1EY2 W1EY1 W1EY0
Window position bit (for horizontal coordinates): Window start/end X bit (W0SX9 to
W0SX0, W0EX9 to W0EX0, W1SX9 to W1SX0, W1EX9 to W1EX0)
Designates the horizontal start and end coordinates. Designated coordinate value is
the coordinate value (H counter value) on the TV screen
W0SX9~W0SX0 1800C0H Bit 9~0 For W0 start point coordinates
W0EX9~W0EX0 1800C4H Bit 9~0 For W0 end point coordinates
W1SX9~W1SX0 1800C8H Bit 9~0 For W1 start point coordinates
W1EX9~W1EX0 1800CCH Bit 9~0 For W1 end point coordinates
Graphics WxxX9 WxxX8 WxxX7 WxxX6 WxxX5 WxxX4 WxxX3 WxxX2 WxxX1 WxxX0
Mode
Normal H8 H7 H6 H5 H4 H3 H2 H1 H0 Invalid
Hi-Res H9 H8 H7 H6 H5 H4 H3 H2 H1 H0
Exclusive Invalid H8 H7 H6 H5 H4 H3 H2 H1 H0
Normal
Exclusive Invalid H9 H8 H7 H6 H5 H4 H3 H2 H1
Hi-Res
Note: 0S, 0E, 1S, or 1E is entered in bit name for xx.
Window position bit (for vertical coordinates): Window start/end Y bit (W0SY8 to
W0SY0, W0EY8 to W0EY0, W1SY8 to W1SY0, W1EY8 to W1EY0)
Designates the vertical start and end coordinates. The designated coordinate value
is the coordinate value (V counter value) on the TV screen.
W0SY8~W0SY0 1800C2H Bit 8~0 For W0 start point coordinates
W0EY8~W0EY0 1800C6H Bit 8~0 For W0 end point coordinates
W1SY8~W1SY0 1800CAH Bit 8~0 For W1 start point coordinates
W1EY8~W1EY0 1800CEH Bit 8~0 For W1 end point coordinates
ST-58-R2 369
TV Screen WxxY8 WxxY7 WxxY6 WxxY5 WxxY4 WxxY3 WxxY2 WxxY1 WxxY0
(Interlace) Mode
Normal, Hi-Res V8 V7 V6 V5 V4 V3 V2 V1 V0
(Non-interlace,
Single-Density
Interlace)
Normal, Hi-Res V7 V6 V5 V4 V3 V2 V1 V0 Invalid
(Double-Density
Interlace)
Exclusive Monitor V8 V7 V6 V5 V4 V3 V2 V1 V0
Note: 0S, 0E, 1S or 1E is entered in bit name for xx.
• Window Control (NBG0, NBG1)
15 14 13 12 11 10 9 8
WCTLA N1LOG ~ N1SWE N1SWA N1W1E N1W1A N1W0E N1W0A
1800D0H 7 6 5 4 3 2 1 0
N0LOG ~ N0SWE N0SWA N0W1E N0W1A N0W0E N0W0A
• Window Control (NBG2, NBG3)
15 14 13 12 11 10 9 8
WCTLB N3LOG ~ N3SWE N3SWA N3W1E N3W1A N3W0E N3W0A
1800D2H 7 6 5 4 3 2 1 0
N2LOG ~ N2SWE N2SWA N2W1E N2W1A N2W0E N2W0A
• Window Control (RBG0, Sprite)
15 14 13 12 11 10 9 8
WCTLC SPLOG ~ SPSWE SPSWA SPW1E SPW1A SPW0E SPW0A
1800D4H 7 6 5 4 3 2 1 0
R0LOG ~ R0SWE R0SWA R0W1E R0W1A R0W0E R0W0A
• Window Control (Rotation Window, Color Calculation Window)
15 14 13 12 11 10 9 8
WCTLD CCLOG ~ CCSWE CCSWA CCW1E CCW1A CCW0E CCW0A
1800D6H 7 6 5 4 3 2 1 0
RPLOG ~ ~ ~ RPW1E RPW1A RPW0E RPW0A
Window logic bit: Logic bit (N0LOG, N1LOG, N2LOG, N3LOG, R0LOG, SPLOG,
RPLOG, CCLOG)
Designates the method of overlapping windows used in each screen.
370
N0LOG 1800D0H Bit 7 Transparent Process Window for NBG0 (or RBG1)
N1LOG 1800D0H Bit 15 Transparent Process Window for NBG1 (or EXBG)
N2LOG 1800D2H Bit 7 Transparent Process Window for NBG2
N3LOG 1800D2H Bit 15 Transparent Process Window for NBG3
R0LOG 1800D4H Bit 7 Transparent Process Window for RBG0
SPLOG 1800D4H Bit 15 Transparent Process Window for Sprite
RPLOG 1800D6H Bit 7 For Rotation Parameter Window
CCLOG 1800D6H Bit 15 For Color Calculation Window
xxLOG Overlaid Logic
0 OR
1 AND
Note: N0, N1, N2, N3, R0, SP, RP or CC is entered in bit name for xx.
Window enable bit (for W0): W0 enable bit (N0W0E, N1W0E, N2W0E, N3W0E, R0W0E,
SPW0E, RPW0E, CCW0E)
Designates whether to use the Normal window W0 in each screen.
N0W0E 1800D0H Bit 1 Transparent Process Window for NBG0 (or RBG1)
N1W0E 1800D0H Bit 9 Transparent Process Window for NBG1 (or EXBG)
N2W0E 1800D2H Bit 1 Transparent Process Window for NBG2
N3W0E 1800D2H Bit 9 Transparent Process Window for NBG3
R0W0E 1800D4H Bit 1 Transparent Process Window for RBG0
SPW0E 1800D4H Bit 9 Transparent Process Window for Sprite
RPW0E 1800D6H Bit 1 For Rotation Parameter Window
CCW0E 1800D6H Bit 9 For Color Calculation Window
xxW0E Process
0 Does not use W0 window
1 Uses W0 window
Note: N0, N1, N2, N3, R0, SP, RP, or CC is entered in bit name for xx.
Window enable bit (for W1): W1 enable bit (N0W1E, N1W1E, N2W1E, N3W1E, R0W1E,
SPW1E, RPW1E, CCW1E)
Designates whether to use the Normal window W1 in each screen.
ST-58-R2 371
N0W1E 1800D0H Bit 3 Transparent Process Window for NBG0 (or RBG1)
N1W1E 1800D0H Bit 11 Transparent Process Window for NBG1 (or EXBG)
N2W1E 1800D2H Bit 3 Transparent Process Window for NBG2
N3W1E 1800D2H Bit 11 Transparent Process Window for NBG3
R0W1E 1800D4H Bit 3 Transparent Process Window for RBG0
SPW1E 1800D4H Bit 11 Transparent Process Window for Sprite
RPW1E 1800D6H Bit 3 For Rotation Parameter Window
CCW1E 1800D6H Bit 11 For Color Calculation Window
xxW1E Process
0 Does not use W1 window
1 Uses W1 window
Note: N0, N1, N2, N3, R0, SP, RP, or CC is entered in bit name for xx.
Window enable bit (for SW): SW enable bit (N0SWE, N1SWE, N2SWE, N3SWE,
R0SWE, SPSWE, CCSWE)
Designates whether to use the sprite window SW in each screen.
N0SWE 1800D0H Bit 5 Transparent Process Window for NBG0 (or RBG1)
N1SWE 1800D0H Bit 13 Transparent Process Window for NBG1 (or EXBG)
N2SWE 1800D2H Bit 5 Transparent Process Window for NBG2
N3SWE 1800D2H Bit 13 Transparent Process Window for NBG3
R0SWE 1800D4H Bit 5 Transparent Process Window for RBG0
SPSWE 1800D4H Bit 13 Transparent Process Window for Sprite
CCSWE 1800D6H Bit 13 For Color Calculation Window
xxSWE Process
0 Does not use SW window
1 Uses SW window
Note: N0, N1, N2, N3, R0, SP, or CC is entered in bit name for xx.
Window area bit (for W0): W0 area bit (N0W0A, N1W0A, N2W0A, N3W0A, R0W0A,
SPW0A, RPW0A, CCW0A)
Designates which area is the valid area of the Normal window W0 used in each
screen.
372
N0W0A 1800D0H Bit 0 Transparent Process Window for NBG0 (or RBG1)
N1W0A 1800D0H Bit 8 Transparent Process Window for NBG1 (or EXBG)
N2W0A 1800D2H Bit 0 Transparent Process Window for NBG2
N3W0A 1800D2H Bit 8 Transparent Process Window for NBG3
R0W0A 1800D4H Bit 0 Transparent Process Window for RBG0
SPW0A 1800D4H Bit 8 Transparent Process Window for Sprite
RPW0A 1800D6H Bit 0 For Rotation Parameter Window
CCW0A 1800D6H Bit 8 For Color Calculation Window
xxW0A Process
0 Enables the inside of W0 window
1 Enables the outside of W0 window
Note: N0, N1, N2, N3, R0, SP, RP, or CC is entered in bit name for xx.
Window area bit (for W1): W1 area bit (N0W1A, N1W1A, N2W1A, N3W1A, R0W1A,
SPW1A, RPW1A, CCW1A)
Designates which area is the valid area of the Normal window W1 used in each
screen.
N0W1A 1800D0H Bit 2 Transparent Process Window for NBG0 (or RBG1)
N1W1A 1800D0H Bit 10 Transparent Process Window for NBG1 (or EXBG)
N2W1A 1800D2H Bit 2 Transparent Process Window for NBG2
N3W1A 1800D2H Bit 10 Transparent Process Window for NBG3
R0W1A 1800D4H Bit 2 Transparent Process Window for RBG0
SPW1A 1800D4H Bit 10 Transparent Process Window for Sprite
RPW1A 1800D6H Bit 2 For Rotation Parameter Window
CCW1A 1800D6H Bit 10 For Color Calculation Window
xxW1A Process
0 Enables the inside of W1 window
1 Enables the outside of W1 window
Note: N0, N1, N2, N3, R0, SP, RP, or CC is entered in bit name for xx.
Window area bit (for SW): SW area bit (N0SWA, N1SWA, N2SWA, N3SWA, R0SWA,
SPSWA, CCSWA)
Designates which area is the valid area of the sprite window SW used in each
screen.
ST-58-R2 373
N0SWA 1800D0H Bit 4 Transparent Process Window for NBG0 (or RBG1)
N1SWA 1800D0H Bit 12 Transparent Process Window for NBG1 (or EXBG)
N2SWA 1800D2H Bit 4 Transparent Process Window for NBG2
N3SWA 1800D2H Bit 12 Transparent Process Window for NBG3
R0SWA 1800D4H Bit 4 Transparent Process Window for RBG0
SPSWA 1800D4H Bit 12 Transparent Process Window for Sprite
CCSWA 1800D6H Bit 12 For Color Calculation Window
xxSWA Process
0 Enables the inside of SW window
1 Enables the outside of SW window
Note: N0, N1, N2, N3, R0, SP or CC is entered in bit name for xx.
• Line Window Table Address (W0)
15 14 13 12 11 10 9 8
LWTA0U W0LWE ~ ~ ~ ~ ~ ~ ~
1800D8H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ W0LWTA18 W0LWTA17 W0LWTA16
• Line Window Table Address (W0)
15 14 13 12 11 10 9 8
LWTA0L W0LWTA15 W0LWTA14 W0LWTA13 W0LWTA12 W0LWTA11 W0LWTA10 W0LWTA9 W0LWTA8
1800DAH 7 6 5 4 3 2 1 0
W0LWTA7 W0LWTA6 W0LWTA5 W0LWTA4 W0LWTA3 W0LWTA2 W0LWTA1 ~
• Line Window Table Address (W1)
15 14 13 12 11 10 9 8
LWTA1U W1LWE ~ ~ ~ ~ ~ ~ ~
1800DCH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ W1LWTA18 W1LWTA17 W1LWTA16
• Line Window Table Address (W1)
15 14 13 12 11 10 9 8
LWTA1L W1LWTA15 W1LWTA14 W1LWTA13 W1LWTA12 W1LWTA11 W1LWTA10 W1LWTA9 W1LWTA8
1800DEH 7 6 5 4 3 2 1 0
W1LWTA7 W1LWTA6 W1LWTA5 W1LWTA4 W1LWTA3 W1LWTA2 W1LWTA1 ~
Line window enable bit (W0LWE, W1LWE)
Designates whether to make the Normal window a line window.
W0LWE 1800D8H Bit 15 For W0
W1LWE 1800DCH Bit 15 For W1
374
WxLWE Process
0 Does not process Normal Window to Line Window
1 Processes Normal Window to Line Window
Note: 0 or 1 is entered in bit name for x.
Line window table address bit (W0LWTA18 to W0LWTA1, W1LWTA18 to W1LWTA1)
Designates the lead address of the line window table in VRAM.
W0LWTA18~W0LWTA16 1800D8H Bit 2~0 For W0
W0LWTA15~W0LWTA1 1800DAH Bit 15~1 For W0
W1LWTA18~W1LWTA16 1800DCH Bit 2~0 For W1
W1LWTA15~W1LWTA1 1800DEH Bit 15~1 For W1
• Sprite Control
15 14 13 12 11 10 9 8
SPCTL ~ ~ SPCCCS1 SPCCCS0 ~ SPCCN2 SPCCN1 SPCCN0
1800E0H 7 6 5 4 3 2 1 0
~ ~ SPCLMD SPWINEN SPTYPE3 SPTYPE2 SPTYPE1 SPTYPE0
Sprite color calculation condition bit (SPCCCS1, SPCCCS0), bits 13, 12
Designates the color calculation condition of sprites.
SPCCCS1 SPCCCS0 Condition
0 0 (Priority number) ≤ (Color calculation condition number) only
0 1 (Priority number) = (Color calculation condition number) only
1 0 (Priority number) ≥ (Color calculation condition number) only
1 1 Only when Color Data MSB is 1
Sprite color calculation number bit (SPCCN2 to SPCCN0), bits 10 to 8
Designates the color calculation condition number of sprites.
This value is ignored when the color calculation condition is set to perform color
calculations only if the most significant bit of color data is 1.
Sprite color mode bit (SPCLMD), bit 5
Designates the sprite color mode.
ST-58-R2 375
SPCLMD Sprite Color Format Data
0 Sprite data is all in palette format
1 Sprite data is in palette format and RGB format
Sprite window enable bit: SW enable bit (SPWINEN), bit 4
Designates whether to use the sprite window SW.
SPWINEN Process
0 Does not use sprite window
1 Uses sprite window
Sprite type bit (STYPE3 to STYPE0), bits 3 to 0
Designates the sprite type.
STYPE3 STYPE2 STYPE1 STYPE0 Sprite Data Type
0 0 0 0 Type 0
0 0 0 1 Type 1
0 0 1 0 Type 2
0 0 1 1 Type 3
0 1 0 0 Type 4
0 1 0 1 Type 5
0 1 1 0 Type 6
0 1 1 1 Type 7
1 0 0 0 Type 8
1 0 0 1 Type 9
1 0 1 0 Type A
1 0 1 1 Type B
1 1 0 0 Type C
1 1 0 1 Type D
1 1 1 0 Type E
1 1 1 1 Type F
• Shadow Control
15 14 13 12 11 10 9 8
SDCTL ~ ~ ~ ~ ~ ~ ~ TPSDSL
1800E2H 7 6 5 4 3 2 1 0
~ ~ BKSDEN R0SDEN N3SDEN N2SDEN N1SDEN N0SDEN
Shadow enable bit (N0SDEN, N1SDEN, N2SDEN, N3SDEN, R0SDEN,
BKSDEN)
This bit designates in sprites of the Normal shadow and transparent shadow
whether to use the shadow function for the scroll screen and back screen.
376
N0SDEN 1800E2H Bit 0 For NBG0 (or RBG1)
N1SDEN 1800E2H Bit 1 For NBG1 (or EXBG)
N2SDEN 1800E2H Bit 2 For NBG2
N3SDEN 1800E2H Bit 3 For NBG3
R0SDEN 1800E2H Bit 4 For RBG0
BKSDEN 1800E2H Bit 5 For Back
xxSDEN Process
0 Does not use shadow function (shadow not added)
1 Uses shadow function (shadow added)
Note: N0, N1, N2, N3, R0, or BK is entered in bit name for xx.
Transparent shadow select bit (TPSDSL), bit 8
Designates whether to activate the sprite of the transparent shadow.
TPSDSL Process
0 Disables transparent shadow sprite
1 Enables transparent shadow sprite
• Color RAM Address Offset (NBG0~NBG3)
15 14 13 12 11 10 9 8
CRAOFA ~ N3CAOS2 N3CAOS1 N3CAOS0 ~ N2CAOS2 N2CAOS1 N2CAOS0
1800E4H 7 6 5 4 3 2 1 0
~ N1CAOS2 N1CAOS1 N1CAOS0 ~ N0CAOS2 N0CAOS1 N0CAOS0
• Color RAM Address Offset (RBG0, Sprite)
15 14 13 12 11 10 9 8
CRAOFB ~ ~ ~ ~ ~ ~ ~ ~
1800E6H 7 6 5 4 3 2 1 0
~ SPCAOS2 SPCAOS1 SPCAOS0 ~ R0CAOS2 R0CAOS1 R0CAOS0
Color RAM address offset bit (N0CAOS2 to N0CAOS0, N1CAOS2 to
N1CAOS0, N2CAOS2 to N2CAOS0, N3CAOS2 to N3CAOS0, R0CAOS2 to R0CAOS0,
SPCAOS2 to SPCAOS0)
Designates color RAM address offset values with respect to the sprite and each scroll
screen.
ST-58-R2 377
N0CAOS2~N0CAOS0 1800E4H Bit 2~0 For NBG0 (or RBG1)
N1CAOS2~N1CAOS0 1800E4H Bit 6~4 For NBG1 (or EXBG)
N2CAOS2~N2CAOS0 1800E4H Bit 10~8 For NBG2
N3CAOS2~N3CAOS0 1800E4H Bit 14~12 For NBG3
R0CAOS2~R0CAOS0 1800E6H Bit 2~0 For RBG0
SPCAOS2~SPCAOS0 1800E6H Bit 6~4 For Sprite
• Line Color Screen Enable
15 14 13 12 11 10 9 8
LNCLEN ~ ~ ~ ~ ~ ~ ~ ~
1800E8H 7 6 5 4 3 2 1 0
~ ~ SPLCEN R0LCEN N3LCEN N2LCEN N1LCEN N0LCEN
Line color enable bit (N0LCEN, N1LCEN, N2LCEN, N3LCEN, R0LCEN,
SPLCEN)
Designates whether to insert the line color screen when each screen is a top image.
N0LCEN 1800E8H Bit 0 For NBG0 (or RBG1)
N1LCEN 1800E8H Bit 1 For NBG1 (or EXBG)
N2LCEN 1800E8H Bit 2 For NBG2
N3LCEN 1800E8H Bit 3 For NBG3
R0LCEN 1800E8H Bit 4 For RBG0
SPLCEN 1800E8H Bit 5 For Sprite
xxLCEN Process
0 Does not insert the line color screen when
corresponding screen is top image
1 Inserts the line color screen when corresponding
screen is top image
Note: N0, N1, N2, N3, R0, or SP is entered in the bit name for xx.
• Special Priority Mode
15 14 13 12 11 10 9 8
SFPRMD ~ ~ ~ ~ ~ ~ R0SPRM1 R0SPRM0
1800EAH 7 6 5 4 3 2 1 0
N3SPRM1 N3SPRM0 N2SPRM1 N2SPRM0 N1SPRM1 N1SPRM0 N0SPRM1 N0SPRM0
Special priority mode bit (N0SPRM1, N0SPRM0, N1SPRM1, N1SPRM0,
N2SPRM1, N2SPRM0, N3SPRM1, N3SPRM0, R0SPRM1, R0SPRM0)
Designates the special priority function mode of each screen scroll.
378
N0SPRM1, N0SPRM0 1800EAH Bit 1,0 For NBG0 (or RBG1)
N1SPRM1, N1SPRM0 1800EAH Bit 3,2 For NBG1 (or EXBG)
N2SPRM1, N2SPRM0 1800EAH Bit 5,4 For NBG2
N3SPRM1, N3SPRM0 1800EAH Bit 7,6 For NBG3
R0SPRM1, R0SPRM0 1800EAH Bit 9,8 For RBG0
xxSPRM1 xxSPRM0 Mode Process
0 0 Mode 0 Select the priority number LSB per each screen
0 1 Mode 1 Select the priority number LSB per each character
1 0 Mode 2 Select the priority number LSB per each dot
1 1 - Selection not allowed
Note: N0, N1, N2, N3, or R0 is entered in bit name for xx.
• Color Calculation Control
15 14 13 12 11 10 9 8
CCCTL BOKEN BOKN2 BOKN1 BOKN0 ~ EXCCEN CCRTMD CCMD
1800ECH 7 6 5 4 3 2 1 0
~ SPCCEN LCCCEN R0CCEN N3CCEN N2CCEN N1CCEN N0CCEN
Gradation enable bit (BOKEN), bit 15
Designates whether to use the gradation function.
BOKEN Process
0 Do not use gradation calculation function
1 Use gradation calculation function
Gradation screen number bit: Gradation number bit (BOKN2 to BOKN0), bits 14 to 12
Designates the screen using the gradation (shading) calculation function
BOKN2 BOKN1 BOKN0 Screen Using Gradation Calculation Function
0 0 0 Sprite
0 0 1 RBG0
0 1 0 NBG0 or RBG1
0 1 1 Invalid
1 0 0 NBG1 or EXBG
1 0 1 NBG2
1 1 0 NBG3
1 1 1 Invalid
ST-58-R2 379
Extended color calculation enable bit (EXCCEN), bit 10
Designates whether to use the extended color calculation function
EXCCEN Process
0 Do not use extended color calculation
1 Use extended color calculation
Color calculation ratio mode bit (CCRTMD), bit 9
Designates the color calculation ratio mode.
CCRTMD Mode Process
0 0 For color calculation ratio, select per top screen side
1 1 For color calculation ratio, select per second screen side
Color calculation mode bit (CCMD), bit 8
Designates the color calculation mode.
CCMD Mode Process
0 0 Add according to the color calculation register value
1 1 Add as is
Color calculation enable bit (N0CCEN, N1CCEN, N2CCEN, N3CCEN,
R0CCEN, LCCCEN, SPCCEN)
Designates whether to perform color calculation (color calculation enable)
N0CCEN 1800ECH Bit 0 For NBG0 (or RBG1)
N1CCEN 1800ECH Bit 1 For NBG1 (or EXBG)
N2CCEN 1800ECH Bit 2 For NBG2
N3CCEN 1800ECH Bit 3 For NBG3
R0CCEN 1800ECH Bit 4 For RBG0
LCCCEN 1800ECH Bit 5 For LNCL
SPCCEN 1800ECH Bit 6 For Sprite
xxCCEN Process
0 Does not color-calculate
1 Color-calculates
Note : N0, N1, N2, N3, R0, LC, or SP is entered in bit name for xx.
380
• Special Color Calculation Mode
15 14 13 12 11 10 9 8
SFCCMD ~ ~ ~ ~ ~ ~ R0SCCM1 R0SCCM0
1800EEH 7 6 5 4 3 2 1 0
N3SCCM1 N3SCCM0 N2SCCM1 N2SCCM0 N1SCCM1 N1SCCM0 N0SCCM1 N0SCCM0
Special color calculation mode bit (N0SCCM1, N0SCCM0, N1SCCM1,
N1SCCM0, N2SCCM1, N2SCCM0, N3SCCM1, N3SCCM0, R0SCCM1, R0SCCM0)
Designates the special color calculation function mode of each scroll screen.
N0SCCM1, N0SCCM0 1800EEH Bit 1,0 For NBG0 (or RBG1)
N1SCCM1, N1SCCM0 1800EEH Bit 3,2 For NBG1 (or EXBG)
N2SCCM1, N2SCCM0 1800EEH Bit 5,4 For NBG2
N3SCCM1, N3SCCM0 1800EEH Bit 7,6 For NBG3
R0SCCM1, R0SCCM0 1800EEH Bit 9,8 For RBG0
xxSCCM1 xxSCCM0 Mode Process
0 0 0 Select color calculation enable per screen
0 1 1 Select color calculation enable per character
1 0 2 Select color calculation enable per dot
1 1 3 Select color calculation enable with color data MSB
Note: N0, N1, N2, N3, or R0 is entered in bit name for xx.
• Priority Number (Sprite 0, 1)
15 14 13 12 11 10 9 8
PRISA ~ ~ ~ ~ ~ S1PRIN2 S1PRIN1 S1PRIN0
1800F0H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ S0PRIN2 S0PRIN1 S0PRIN0
• Priority Number (Sprite 2, 3)
15 14 13 12 11 10 9 8
PRISB ~ ~ ~ ~ ~ S3PRIN2 S3PRIN1 S3PRIN0
1800F2H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ S2PRIN2 S2PRIN1 S2PRIN0
• Priority Number (Sprite 4, 5)
15 14 13 12 11 10 9 8
PRISC ~ ~ ~ ~ ~ S5PRIN2 S5PRIN1 S5PRIN0
1800F4H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ S4PRIN2 S4PRIN1 S4PRIN0
ST-58-R2 381
• Priority Number (Sprite 6, 7)
15 14 13 12 11 10 9 8
PRISD ~ ~ ~ ~ ~ S7PRIN2 S7PRIN1 S7PRIN0
1800F6H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ S6PRIN2 S6PRIN1 S6PRIN0
Sprite priority number bit (for sprite) (S0PRIN2 to S0PRIN0, S1PRIN2 to S1PRIN0,
S2PRIN2 to S2PRIN0, S3PRIN2 to S3PRIN0, S4PRIN2 to S4PRIN0, S5PRIN2 to
S5PRIN0, S6PRIN2 to S6PRIN0, S7PRIN2 to S7PRIN0)
Designates the sprite priority number.
S0PRIN2~S0PRIN0 1800F0H Bit 2~0 For Sprite Register 0
S1PRIN2~S1PRIN0 1800F0H Bit 10~8 For Sprite Register 1
S2PRIN2~S2PRIN0 1800F2H Bit 2~0 For Sprite Register 2
S3PRIN2~S3PRIN0 1800F2H Bit 10~8 For Sprite Register 3
S4PRIN2~S4PRIN0 1800F4H Bit 2~0 For Sprite Register 4
S5PRIN2~S5PRIN0 1800F4H Bit 10~8 For Sprite Register 5
S6PRIN2~S6PRIN0 1800F6H Bit 2~0 For Sprite Register 6
S7PRIN2~S7PRIN0 1800F6H Bit 10~8 For Sprite Register 7
• Priority Number (NBG0, NBG1)
15 14 13 12 11 10 9 8
PRINA ~ ~ ~ ~ ~ N1PRIN2 N1PRIN1 N1PRIN0
1800F8H 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N0PRIN2 N0PRIN1 N0PRIN0
• Priority Number (NBG2, NBG3)
15 14 13 12 11 10 9 8
PRINB ~ ~ ~ ~ ~ N3PRIN2 N3PRIN1 N3PRIN0
1800FAH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ N2PRIN2 N2PRIN1 N2PRIN0
• Priority Number (RBG0)
15 14 13 12 11 10 9 8
PRIR ~ ~ ~ ~ ~ ~ ~ ~
1800FCH 7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ R0PRIN2 R0PRIN1 R0PRIN0
Priority number bit (for scroll screen) (N0PRIN2 to N0PRIN0, N1PRIN2 to N1PRIN0,
N2PRIN2 to N2PRIN0, N3PRIN2 to N3PRIN0, R0PRIN2 to R0PRIN0)
Designates the priority number of each screen scroll.
382
N0PRIN2~N0PRIN0 1800F8H Bit 2~0 For NBG0 (or RBG1)
N1PRIN2~N1PRIN0 1800F8H Bit 10~8 For NBG1 (or EXBG)
N2PRIN2~N2PRIN0 1800FAH Bit 2~0 For NBG2
N3PRIN2~N3PRIN0 1800FAH Bit 10~8 For NBG3
R0PRIN2~R0PRIN0 1800FCH Bit 2~0 For RBG0
• Reserve
15 14 13 12 11 10 9 8
1800FEH ~ ~ ~ ~ ~ ~ ~ ~
7 6 5 4 3 2 1 0
~ ~ ~ ~ ~ ~ ~ ~
• Color Calculation Ratio (Sprite 0, 1)
15 14 13 12 11 10 9 8
CCRSA ~ ~ ~ S1CCRT4 S1CCRT3 S1CCRT2 S1CCRT1 S1CCRT0
180100H 7 6 5 4 3 2 1 0
~ ~ ~ S0CCRT4 S0CCRT3 S0CCRT2 S0CCRT1 S0CCRT0
• Color Calculation Ratio (Sprite 2, 3)
15 14 13 12 11 10 9 8
CCRSB ~ ~ ~ S3CCRT4 S3CCRT3 S3CCRT2 S3CCRT1 S3CCRT0
180102H 7 6 5 4 3 2 1 0
~ ~ ~ S2CCRT4 S2CCRT3 S2CCRT2 S2CCRT1 S2CCRT0
• Color Calculation Ratio (Sprite 4, 5)
15 14 13 12 11 10 9 8
CCRSC ~ ~ ~ S5CCRT4 S5CCRT3 S5CCRT2 S5CCRT1 S5CCRT0
180104H 7 6 5 4 3 2 1 0
~ ~ ~ S4CCRT4 S4CCRT3 S4CCRT2 S4CCRT1 S4CCRT0
• Color Calculation Ratio (Sprite 6, 7)
15 14 13 12 11 10 9 8
CCRSD ~ ~ ~ S7CCRT4 S7CCRT3 S7CCRT2 S7CCRT1 S7CCRT0
180106H 7 6 5 4 3 2 1 0
~ ~ ~ S6CCRT4 S6CCRT3 S6CCRT2 S6CCRT1 S6CCRT0
Sprite color calculation ratio bit (S0CCRT4 to S0CCRT0, S1CCRT4 to S1CCRT0,
S2CCRT4 to S2CCRT0, S3CCRT4 to S3CCRT0, S4CCRT4 to S4CCRT0, S5CCRT4 to
S5CCRT0, S6CCRT4 to S6CCRT0, S7CCRT4 to S7CCRT0)
Designates the sprite color calculation ratio. The color calculation ratio is for a value
1/32 of RGB various color data.
ST-58-R2 383
S0CCRT4~S0CCRT0 180100H Bit 4~0 For Sprite Register 0
S1CCRT4~S1CCRT0 180100H Bit 12~8 For Sprite Register 1
S2CCRT4~S2CCRT0 180102H Bit 4~0 For Sprite Register 2
S3CCRT4~S3CCRT0 180102H Bit 12~8 For Sprite Register 3
S4CCRT4~S4CCRT0 180104H Bit 4~0 For Sprite Register 4
S5CCRT4~S5CCRT0 180104H Bit 12~8 For Sprite Register 5
S6CCRT4~S6CCRT0 180106H Bit 4~0 For Sprite Register 6
S7CCRT4~S7CCRT0 180106H Bit 12~8 For Sprite Register 7
• Color Calculation Ratio (NBG0, NBG1)
15 14 13 12 11 10 9 8
CCRNA ~ ~ ~ N1CCRT4 N1CCRT3 N1CCRT2 N1CCRT1 N1CCRT0
180108H 7 6 5 4 3 2 1 0
~ ~ ~ N0CCRT4 N0CCRT3 N0CCRT2 N0CCRT1 N0CCRT0
• Color Calculation Ratio (NBG2, NBG3)
15 14 13 12 11 10 9 8
CCRNB ~ ~ ~ N3CCRT4 N3CCRT3 N3CCRT2 N3CCRT1 N3CCRT0
18010AH 7 6 5 4 3 2 1 0
~ ~ ~ N2CCRT4 N2CCRT3 N2CCRT2 N2CCRT1 N2CCRT0
• Color Calculation Ratio (RBG0)
15 14 13 12 11 10 9 8
CCRR ~ ~ ~ ~ ~ ~ ~ ~
18010CH 7 6 5 4 3 2 1 0
~ ~ ~ R0CCRT4 R0CCRT3 R0CCRT2 R0CCRT1 R0CCRT0
• Color Calculation Ratio (Line Color Screen, Back Screen)
15 14 13 12 11 10 9 8
CCRLB ~ ~ ~ BKCCRT4 BKCCRT3 BKCCRT2 BKCCRT1 BKCCRT0
18010EH 7 6 5 4 3 2 1 0
~ ~ ~ LCCCRT4 LCCCRT3 LCCCRT2 LCCCRT1 LCCCRT0
Color calculation ratio bit (for scroll screens): (N0CCRT4 to N0CCRT0, N1CCRT4 to
N1CCRT0, N2CCRT4 to N2CCRT0, N3CCRT4 to N3CCRT0, R0CCRT4 to R0CCRT0,
LCCCRT4 to LCCCRT0, BKCCRT4 to BKCCRT0)
Designates the color calculation ratio of each scroll screen. The color calculation
ratio corresponds to a value 1/32 times R,G,B color data.
384
N0CCRT4~NOCCRT0 180108H Bit 4~0 For NBG0 (or RBG1)
N1CCRT4~N1CCRT0 180108H Bit 12~8 For NBG1 (or EXBG)
N2CCRT4~N2CCRT0 18010AH Bit 4~0 For NBG2
N3CCRT4~N3CCRT0 18010AH Bit 12~8 For NBG3
R0CCRT4~R0CCRT0 18010CH Bit 4~0 For RBG0
LCCCRT4~LCCCRT0 18010EH Bit 4~0 For LNCL
BKCCRT4~BKCCRT0 18010EH Bit 12~8 For Back
xxCCRT4 xxCCRT3 xxCCRT2 xxCCRT1 xxCCRT0 Color Calculation Ratio
Top Image : Second Image
0 0 0 0 0 31:1
0 0 0 0 1 30:2
0 0 0 1 0 29:3
0 0 0 1 1 28:4
0 0 1 0 0 27:5
0 0 1 0 1 26:6
0 0 1 1 0 25:7
0 0 1 1 1 24:8
0 1 0 0 0 23:9
0 1 0 0 1 22:10
0 1 0 1 0 21:11
0 1 0 1 1 20:12
0 1 1 0 0 19:13
0 1 1 0 1 18:14
0 1 1 1 0 17:15
0 1 1 1 1 16:16
1 0 0 0 0 15:17
1 0 0 0 1 14:18
1 0 0 1 0 13:19
1 0 0 1 1 12:20
1 0 1 0 0 11:21
1 0 1 0 1 10:22
1 0 1 1 0 9:23
1 0 1 1 1 8:24
1 1 0 0 0 7:25
1 1 0 0 1 6:26
1 1 0 1 0 5:27
1 1 0 1 1 4:28
1 1 1 0 0 3:29
1 1 1 0 1 2:30
1 1 1 1 0 1:31
1 1 1 1 1 0:32
Note: N0, N1, N2, N3, R0, LC, or BK is entered in bit name for xx.
ST-58-R2 385
• Color Offset Enable
15 14 13 12 11 10 9 8
CLOFEN ~ ~ ~ ~ ~ ~ ~ ~
180110H 7 6 5 4 3 2 1 0
~ SPCOEN BKCOEN R0COEN N3COEN N2COEN N1COEN N0COEN
Color offset enable bit (N0COEN, N1COEN, N2COEN, N3COEN, R0COEN,
BKCOEN, SPCOEN)
Designates whether to use the color offset function.
N0COEN 180110H Bit 0 For NBG0 (or RBG1)
N1COEN 180110H Bit 1 For NBG1 (or EXBG)
N2COEN 180110H Bit 2 For NBG2
N3COEN 180110H Bit 3 For NBG3
R0COEN 180110H Bit 4 For RBG0
BKCOEN 180110H Bit 5 For Back
SPCOEN 180110H Bit 6 For Sprite
xxCOEN Process
0 Do not use color offset function
1 Use color offset function
Note: N0, N1, N2, N3, R0, BK, or SP is entered in bit name for xx.
• Color Offset Select
15 14 13 12 11 10 9 8
CLOFSL ~ ~ ~ ~ ~ ~ ~ ~
180112H 7 6 5 4 3 2 1 0
~ SPCOSL BKCOSL R0COSL N3COSL N2COSL N1COSL N0COSL
Color offset select bit (N0COSL, N1COSL, N2COSL, N3COSL, R0COSL,
BKCOSL, SPCOSL)
Designates the color offset register to use when using the color offset function.
386
N0COSL 180112H Bit 0 For NBG0 (or RBG1)
N1COSL 180112H Bit 1 For NBG1 (or EXBG)
N2COSL 180112H Bit 2 For NBG2
N3COSL 180112H Bit 3 For NBG3
R0COSL 180112H Bit 4 For RBG0
BKCOSL 180112H Bit 5 For Back
SPCOSL 180112H Bit 6 For Sprite
xxCOSL Process
0 Use color offset A value
1 Use color offset B value
Note: N0, N1, N2, N3, R0, BK, or SP is entered in bit name for xx.
• Color Offset A (RED)
15 14 13 12 11 10 9 8
COAR ~ ~ ~ ~ ~ ~ ~ COARD8
180114H 7 6 5 4 3 2 1 0
COARD7 COARD6 COARD5 COARD4 COARD3 COARD2 COARD1 COARD0
• Color Offset A (GREEN)
15 14 13 12 11 10 9 8
COAG ~ ~ ~ ~ ~ ~ ~ COAGR8
180116H 7 6 5 4 3 2 1 0
COAGR7 COAGR6 COAGR5 COAGR4 COAGR3 COAGR2 COAGR1 COAGR0
• Color Offset A (BLUE)
15 14 13 12 11 10 9 8
COAB ~ ~ ~ ~ ~ ~ ~ COABL8
180118H 7 6 5 4 3 2 1 0
COABL7 COABL6 COABL5 COABL4 COABL3 COABL2 COABL1 COABL0
• Color Offset B (RED)
15 14 13 12 11 10 9 8
COBR ~ ~ ~ ~ ~ ~ ~ COBRD8
18011AH 7 6 5 4 3 2 1 0
COBRD7 COBRD6 COBRD5 COBRD4 COBRD3 COBRD2 COBRD1 COBRD0
• Color Offset B (GREEN)
15 14 13 12 11 10 9 8
COBG ~ ~ ~ ~ ~ ~ ~ COBGR8
18011CH 7 6 5 4 3 2 1 0
COBGR7 COBGR6 COBGR5 COBGR4 COBGR3 COBGR2 COBGR1 COBGR0
ST-58-R2 387
• Color Offset B (BLUE)
15 14 13 12 11 10 9 8
COBB ~ ~ ~ ~ ~ ~ ~ COBBL8
18011EH 7 6 5 4 3 2 1 0
COBBL7 COBBL6 COBBL5 COBBL4 COBBL3 COBBL2 COBBL1 COBBL0
Color offset value bit: Color offset data bit (COARD8 to COARD0, COAGR8 to
COAGR0, COABL8 to COABL0, COBRD8 to COBRD0, COBGR8 to COBGR0, COBBL8
to COBBL0)
Sets the RGB individual value of color offset A and color offset B. Negative
numbers should be set by two complements.
COARD8~COARD0 180114H Bit 8~0 For color offset A RED data
COAGR8~COAGR0 180116H Bit 8~0 For color offset A GREEN data
COABL8~COABL0 180118H Bit 8~0 For color offset A BLUE data
COBRD8~COBRD0 18011AH Bit 8~0 For color offset B RED data
COBGR8~COBGR0 18011CH Bit 8~0 For color offset B GREEN data
COBBL8~COBBL0 18011EH Bit 8~0 For color offset B BLUE data
388
16.4 Table List
The following tables are shown in the table list:
(1) Character Pattern Tables
(2) Pattern Name Tables
(3) Bitmap Pattern Tables
(4) Line Scroll Tables
(5) Vertical Cell Scroll Tables
(6) Rotation Parameter Tables
(7) Coefficient Tables
(8) Line Color Screen Tables
(9) Back Screen Tables
(10) Normal Line Window Tables
ST-58-R2 389
• Character Pattern Table Data Specifications
Bit Count for 1 Dot Cell Data Bou ndary
4 bits/dot 32 bytes/cell 20H byte
8 bits/dot 64 bytes/cell 20H byte
16 bits/dot 128 bytes/cell 20H byte
32 bits/dot 256 bytes/cell 20H byte
• Character Pattern Table
(1) 4 bi ts/ dot (32 byt es/ cel l)
Cha ra ct er Pat ter n Ta bl e (V RA M)
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Dot 0- 0 Dat a Dot 0- 1 Da ta Dot 0- 2 Da ta Dot 0- 3 Da ta
+00H
+02H Do t 0-4 Dat a Dot 0-5 Dat a Dot 0- 6 Da ta Dot 0- 7 Da ta
+1E H Do t 7-4 Dat a Dot 7- 5 Da ta Do t 7-6 Dat a Dot 7- 7 Da ta
Dot 0 1 2 3 4 5 6 7
Dot 0 +00 +01 +02 +03
1 +04 +05 +06 +07
2 +08 +09 +0A +0B
3 + 0C + 0D +0E +0F Cel l
4 +10 +11 +12 +13
5 +14 +15 +16 +17
6 +18 +19 +1A +1B
7 + 1C + 1D +1E +1F
Not e 1: The up pe r le ft not at ion in the cel l is dot 0- 0; to the rig ht ar e dot 0- 1,
do t 0-2 , dot 0- 3, ...
Not e 2: Num be rs in the cel ls ar e VRAM addr esses (Hexa de cim al ) of do t (2
do ts) da ta, wit h VRA M ad dr ess of dot 0- 0, 0- 1 dat a as the
ref ere nce .
390
• Character Pattern Table (Continued)
(2) 8 bi ts/ dot (64 byt es/ cel l)
Cha ra ct er Pat ter n Ta bl e (V RA M)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00H Dot 0- 0 Dat a Dot 0- 1 Dat a
+02H Dot 0- 2 Da ta Do t 0-3 Dat a
+3E H Dot 7- 6 Da ta Dot 7- 7 Dat a
Dot 0 1 2 3 4 5 6 7
Dot 0 +00 +01 +02 +03 +04 +05 +06 +07
1 +08 +09 +0A +0B +0C +0D +0E +0F
2 +10 +11 +12 +13 +14 +15 +16 +17
3 +18 +19 +1A +1B +1C +1D +1E +1F Cel l
4 +20 +21 +22 +23 +24 +25 +26 +27
5 +28 +29 +2A +2B +2C +2D +2E +2F
6 +30 +31 +32 +33 +34 +35 +36 +37
7 +38 +39 +3A +3B + 3C + 3D +3E +3F
Not e 1: The uppe r lef t no tat ion in the ce l is dot 0- 0; to the rig ht ar e dot 0- 1,
do t 0-2 , dot 0- 3, ...
Not e 2: Num ber s in the cel ls ar e VRAM ad dr esse s (Hexad eci mal ) of do t
da ta, with VRAM ad dr ess of dot 0- 0 dat a as the ref er en ce.
ST-58-R2 391
• Character Pattern Table (Continued)
(3) 16 bits/ do t (1 28 byt es/ ce l )
Cha ra ct er Pat ter n Ta bl e (V RA M)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00H Dot 0- 0 Dat a
+02H Dot 0- 1 Dat a
+7 EH Dot 7- 7 Dat a
Dot 0 1 2 3 4 5 6 7
Dot 0 +00 +02 +04 +06 +08 +0A +0C +0E
1 +10 +12 +14 +16 +18 +1A + 1C +1E
2 +20 +22 +24 +26 +28 +2A + 2C +2E
3 +30 +32 +34 +36 +38 +3A + 3C +3E Cel l
4 +40 +42 +44 +46 +48 +4A + 4C +4E
5 +50 +52 +54 +56 +58 +5A + 5C +5E
6 +60 +62 +64 +66 +68 +6A + 6C +6E
7 +70 +72 +74 +76 +78 +7A +7C +7E
Not e 1: The upp er lef t no tat io n in the ce ll is dot 0- 0; to the righ t ar e do t 0-1 ,
dot 0- 2, dot 0- 3, ...
Not e 2: Numb er s in the cel ls are VRAM add re sses (Hexa de cim al) of dot
dat a, with VRAM ad dr ess of dot 0- 0 da ta as the re fer en ce.
• Vertical Cell Scroll Table Data Bit Configuration
Vertical Screen Scroll Value
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0H 11 bit integer part
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+2H 8 bit fractional part
Note: Shaded area is ignored
392
• Character Pattern Table (Continued)
(4) 32 bits/ do t (2 56 byt es/ ce l )
Cha ra ct er Pat ter n Ta bl e (V RA M)
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00H Dot 0- 0 Da ta (M ost si gn fi ica nt wor d)
+02H Dot 0- 0 Da ta (L ea st si gn ificant wor d)
+0 4H Dot 0- 1 Da ta (M ost si gn fi ica nt wor d)
+FCH Dot 7- 7 Da ta (M ost si gn fi ica nt wor d)
+F EH Dot 7- 7 Da ta (L ea st si gn ificant wor d)
Do t 0 1 2 3 4 5 6 7
Do t 0 +00 +04 +08 +0C +10 +14 +18 +1C
1 +20 +24 +28 + 2C +30 +34 +38 +3C
2 +40 +44 +48 + 4C +50 +54 +58 +5C
3 +60 +64 +68 + 6C +70 +74 +78 +7C Cel l
4 +80 +84 +88 + 8C +90 +94 +98 +9C
5 +A0 +A4 +A8 +AC +B0 +B4 +B8 +BC
6 +C0 + C4 + C8 +CC + D0 +D4 +D8 +D C
7 +E0 +E4 +E8 + EC +F 0 +F 4 +F 8 +F C
Not e 1: The uppe r lef t no tat io n in the ce l is dot 0- 0; to the rig ht ar e dot 0- 1,
do t 0-2 , dot 0- 3, ...
Not e 2: Numb er s in the cel ls ar e VRAM addr esses (Hexadeci mal ) of do t
da ta (M SW), with VRAM ad dr ess of dot 0- 0 da ta (MSW) as the
ref ere nce .
ST-58-R2 393
• Pattern Name Table Data Specifications
Pattern Name Data Size Character Size Contents of 1 Page Boundary During VRAM
Storage
1 Word 1 H Cell X 1 V Cell 8192 Bytes 2000H
2 H Cells X 2 V Cells 2048 Bytes 800H
2 Words 1 H Cell X 1 V Cell 16,384 Bytes 4000H
2 H Cells X 2 V Cells 4096 Bytes 1000H
• Pattern Name Table
(1) Pat tern Nam e Dat a Size : 1 wor d
Char act er Pat ter n Size : 1 H cel l X 1 V cel l
Pattern Nam e Ta bl e (V RA M)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00 00H Cha ract er Pat ter n 0- 0 Pat ter n Name Dat a
+00 02H Char act er Patter n 0- 1 Pat ter n Na me Dat a
+1F FEH Char act er Pattern 63- 63 Patter n Nam e Data
Ch ar act er
Pattern 0 1 2 61 62 63
Char act er
Pat ter n 0 +000 0 +0002 +000 4 +007A +007C +007E
+0080 +0082 +0084 +00FA +00FC +00F E
1
Page
62 +1F0 0 +1F0 2 +1F0 4 +1F7 A +1F7 C +1F7 E
63 +1F8 0 +1F8 2 +1F8 4 +1F FA +1FFC +1F FE
No te 1: The up per -lef t no tat ion in the page is ch ar act er pa ttern 0- 0; to the right ar e
char act er pat terns 0-1 , 0-2 , 0-3 , ...
No te 2: Num be rs in the pag es are VRAM adr esse s (He xad eci mal ) of pa ttern na me dat a
of ch ar act er pa ttern s, with VRAM addr ess of cha ra ct er pat ter n 0-0 pat ter n nam e
dat a as the ref er en ce.
394
• Pattern Name Table (Continued)
(2) Pat tern Nam e Dat a Size : 1 wor d
Char act er Pat ter n Size : 2 H cel ls X 2 V cel ls
Pattern Nam e Ta bl e (V RA M)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00 0H Cha ract er Pat ter n 0- 0 Pat ter n Name Dat a
+00 2H Char act er Pattern 0-1 Pattern Nam e Da ta
+7FE H Cha ra ct er Pat ter n 31- 31 Pattern Nam e Da ta
Cha ract er
Pat ter n 0 1 2 29 30 31
Cha ra ct er
+000 +002 +004 +03A +03C +03E
Pat ter n 0
+040 +042 +044 +07A +07C +07E
1
Pag e
30 +780 +782 +784 +7BA +7BC +7BE
31 +7C0 +7C2 +7C4 +7FA +7FC +7FE
No te 1: The up pe r- lef t no tat io n in the pag e is ch ar act er pa ttern 0- 0; to the righ t ar e
cha ra ct er pat ter ns 0-1 , 0-2 , 0-3 , ...
No te 2: Num be rs in the pag es are VRAM adr esse s (Hexad eci mal ) of pa ttern na me
da ta of ch ar act er pa ttern s, with VRAM ad dr ess of char act er pat tern 0-0
pa tter n na me da ta as the re fere nce .
ST-58-R2 395
• Pattern Name Table (Continued)
(3) Pat tern Nam e Dat a Size : 2 wor ds
Char act er Pat ter n Size : 1 H cel l X 1 V cel l
Pattern Nam e Ta bl e (V RA M)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+000 0H Ch ar act er Pattern 0- 0 Patter n Nam e Data (Most sig ni fica nt word )
+000 2H Cha ract er Pat ter n 0- 0 Pat ter n Name Dat a (Le ast si gni fican t word )
+000 4H Char act er Pat ter n 0- 1 Pat ter n Name Dat a (Mo st si gni fican t wor d)
+3F FCH Char act er Patter n 63 -6 3 Pat ter n Name Dat a (Most si gni fican t wor d)
+3F FEH Char act er Pat ter n 63 -6 3 Pat ter n Name Dat a (Le ast sig ni fican t word )
Ch ar act er
Pattern 0 1 2 61 62 63
Cha ra ct er
+0000 +0004 +0008 +00F4 +00F8 +00FC
Pat ter n 0 +0002
+0006 +000A +00F6 +00FA +00FE
+0100 +0104 +0108 + 01 F 4 + 01 F 8 +01FC
1 +0102 +0106 +010A + 01 F 6 +01FA +01FE
Pag e
+3E00 +3E04 +3E0 8 +3EF 4 +3EF8 +3EFC
62 +3E02 +3E06 +3E0A +3EF 6 +3EFA +3EFE
+3F0 0 + 3F 04 +3F0 8 +3FF4 +3F F8 +3FF C
63 +3F0 2 + 3F 06 +3F0 A +3FF6 +3FFA +3F FE
No te 1: The up pe r- lef t no tat io n in the pag e is ch ar act er pa ttern 0- 0; to the righ t ar e
cha ra ct er pat ter ns 0-1 , 0-2 , 0-3 , ...
No te 2: Num be rs in the pag es are VRAM adr esse s (Hexad eci mal ) of pa ttern na me
da ta of ch ar act er pa ttern s, with VRAM ad dr ess of char act er pat tern 0-0
pa tter n na me da ta as the re fere nce .
396
• Pattern Name Table (Continued)
(4) Pat tern Nam e Dat a Size : 2 wor ds
Char act er Pat ter n Size : 2 H cel ls X 2 V cel ls
Pattern Nam e Ta bl e (V RA M)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0 00 H Cha ra ct er Pat ter n 0-0 Pat tern Nam e Dat a (Mo st si gn ificant wor d)
+0 02 H Char act er Patter n 0- 0 Pat ter n Na me Dat a (Le ast si gni fica nt wo rd )
+0 04 H Ch ar act er Pattern 0- 1 Pat ter n Na me Data (Most sig ni fica nt word )
+FFCH Ch ar act er Pattern 31 -3 1 Pat ter n Na me Dat a (Most si gni fican t word )
+FFEH Char act er Patter n 31 -3 1 Pat ter n Name Dat a (Le ast sig ni fica nt word )
Ch ar act er
Pattern 0 1 2 29 30 31
Char act er +000 +004 +008 +074 +078 +07C
Pat ter n 0 +002 +006 +00A +076 +07A +07E
+080 +084 +088 + 0F 4 +0F8 +0F C
1 +082 +086 +08A + 0F 6 +0FA +0FE
Pag e
+ F0 0 + F0 4 + F0 8 +F7 4 + F7 8 +F 7C
30 + F0 2 + F0 6 +F0 A +F7 6 +F7 A +F7 E
+F8 0 + F8 4 +F8 8 +F F4 +FF8 +F FC
31 +F8 2 +F FE
+ F8 6 +F8 A +F F6 +F FA
No te 1: The up pe r- lef t no tat io n in the pag e is ch ar act er pa ttern 0- 0; to the righ t ar e
cha ra ct er pat ter ns 0-1 , 0-2 , 0-3 , ...
No te 2: Num be rs in the pag es are VRAM adr esse s (Hexad eci mal ) of pa ttern na me
da ta of ch ar act er pa ttern s, with VRAM ad dr ess of char act er pat tern 0-0
pa tter n na me da ta as the re fere nce .
ST-58-R2 397
• Bitmap Pattern Data Specifications
Bitmap Size Bitmap Pattern Bitmap Color Count Size per Surface
Data Size
4 bits/dot 16 colors 64K bytes (512K bits)
512 H dots X 8 bits/dot 256 colors 128K bytes (1M bits)
256 V dots 16 bits/dot 2048 colors, 32,768 colors 256K bytes (2M bits)
32 bits/dot 16,770,000 colors 512K bytes (4M bits)
4 bits/dot 16 colors 128K bytes (1M bits)
512 H dots X 8 bits/dot 256 colors 256K bytes (2M bits)
512 V dots 16 bits/dot 2048 colors, 32,768 colors 512K bytes (4M bits)
32 bits/dot 16,770,000 colors 1024K bytes (8M bits)
4 bits/dot 16 colors 128K bytes (1M bits)
1024 H dots X 8 bits/dot 256 colors 256K bytes (2M bits)
256 V dots 16 bits/dot 2048 colors, 32,768 colors 512K bytes (4M bits)
32 bits/dot 16,770,000 colors 1024K bytes (8M bits)
1024 H dots X 4 bits/dot 16 colors 256K bytes (2M bits)
512 V dots 8 bits/dot 256 colors 512K bytes (4M bits)
16 bits/dot 2048 colors, 32,768 colors 1024K bytes (8M bits)
398
• Bitmap Pattern
(1) Bit ma p Size : 512 H dot s X 25 6 V dot s
Bit ma p Colo r Coun t : 4 bits/ dot (1 6 co lor s)
Bit ma p Pat ter n (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0 00 0H Dot 0- 0 Dot 0- 1 Dot 0- 2 Dot 0- 3
+0 00 2H Dot 0- 4 Dot 0- 5 Dot 0- 6 Dot 0- 7
+FFFEH Dot 25 5- 50 8 Dot 25 5- 50 9 Dot 25 5- 51 0 Dot 25 5- 511
Dot 0 1 2 3 50 8 50 9 51 0 511
Dot 0 + 00 00 +0001 +00FE +00F F
+0100 +0101 +01FE +01FF
1
Bitmap
25 4 +F E0 0 +FE 01 +FE FE +FE FE
25 5 +F F0 0 +F F0 1 +FFF E +FF FF
Note 1: The upp er lef t not ation in the cel l is do t 0-0 ; to the righ t are do t 0-1 ,
dot 0- 2, do t 0-3 , ...
Note 2: Nu mber s in the ce l s are VRAM ad dr esse s (h exa de cim al) of dot (2
dot s) dat a, with VRAM add re ss of do t 0-0 , 0-1 da ta as the
refer en ce.
ST-58-R2 399
Bitmap Pattern (Continued)
(2 ) Bitmap Size : 512 H do ts X 25 6 V do ts
Bitmap Col or Coun t : 8 bit s/ do t (25 6 co lor s)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00 00 0H Dot 0- 0 Do t 0-1
+00 00 2H Do t 0-2 Do t 0-3
+1F FFEH Do t 255 -5 10 Do t 255 -5 11
Do t 0 1 2 3 508 509 510 511
Dot 0 +000 00 +0 000 1 +000 02 +0 000 3 +0 01F C +00 1F D +001 FE +0 01F F
+002 00 +0 020 1 +002 02 +0 020 3 +0 03F C +00 3F D +003 FE +0 03F F
1
Bitmap
25 4 +1F C0 0 +1F C01 +1F C0 2 +1F C03 +1F DF C +1 FD FD +1F DF E +1F DF F
25 5 +1 FE0 0 +1F E01 +1 FE0 2 +1F E03 +1F FFC +1F FF D +1 FF FE +1F FFF
Note 1: The upp er lef t no tation in the cel l is do t 0-0 ; to the righ t are do t 0-1 ,
dot 0- 2, do t 0-3 , ...
Note 2: Nu mb er s in the ce l s are VRAM add re sses (h exadeci mal ) of do t
dat a, with VRAM add re ss of do t 0-0 da ta as the re fer ence.
400
• Bitmap Pattern (Continued)
(3) Bit ma p Size : 512 H dot s X 25 6 V dot s
Bit ma p Colo r Coun t : 16 bi ts/ dot (204 8 col or s, 327 68 col ors)
Bitmap Pat ter n (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00 00 0H Dot 0- 0
+00 00 2H Dot 0-1
+3F FFEH Do t 255 -5 11
Dot 0 1 2 3 50 8 50 9 51 0 511
Do t 0 +00 000 +000 02 +00 004 +000 06 +0 03F 8 +0 03F A +003 FC +0 03F E
+00 400 +004 02 +00 404 +004 06 +0 07F 8 +0 07F A +007 FC +0 07F E
1
Bitmap
25 4 +3F 80 0 +3 F8 02 +3F 80 4 +3 F8 06 +3F BF8 +3F BFA +3 FBF C +3F BF E
25 5 +3 FC 00 +3F C0 2 +3 FC 04 +3F C0 6 +3F FF8 +3F FFA +3 FF FC +3F FFE
Not e 1: The upp er lef t no tat io n in the ce ll is dot 0- 0; to the righ t ar e do t 0-1 ,
dot 0- 2, dot 0- 3, ...
Not e 2: Numb er s in the cel ls are VRAM add re sses (hexad eci mal ) of do t
dat a, with VRAM ad dr ess of dot 0- 0 da ta as the re fer en ce.
ST-58-R2 401
• Bitmap Pattern (Continued)
(4) Bit ma p Size : 512 H dot s X 25 6 V dot s
Bit ma p Colo r Coun t : 32 bi ts/ do t (16 ,77 0, 000 col ors)
Bitmap Pat ter n (V RA M)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0 00 00 H Dot 0-0 (upp er wor d)
+0 00 02 H Dot 0- 0 (l ow er wo rd )
+0000 4H Dot 0-1 (upp er wor d)
Do t 255 -5 11 (up pe r wo rd )
+7 FFFCH
+7F FFEH Dot 25 5- 511 (lo wer wor d)
Dot 0 1 2 3 508 509 510 511
Dot 0 +0 000 0 +00 004 +0 000 8 +0 000 C +007 F0 +00 7F 4 +007 F8 +007 FC
+0 080 0 +00 804 +0 080 8 +0 080 C +0 0F F0 +00 FF 4 +0 0F F8 +0 0F FC
1
Bitma p
254 +7 F0 00 +7F 004 +7 F0 08 +7 F0 0C +7F 7F 0 +7F 7F 4 +7 F7 F8 +7 F7 FC
255 +7 F8 00 +7F 804 +7 F8 08 +7 F8 0C +7 FF F0 +7F FF 4 +7 FF F8 +7 FF FC
No te 1: The up per left not ation in the cel l is do t 0-0 ; to the ri gh t are dot 0-1,
dot 0- 2, do t 0-3 , ...
No te 2: Num be rs in the ce lls ar e VRA M ad dr esse s (h exa de cim al) of dot
dat a (up pe r wo rd) , with VRAM ad dr ess of dot 0- 0 da ta (uppe r wor d) as
the ref ere nce .
402
• Bitmap Pattern (Continued)
(5 ) Bitmap Size : 512 H do ts X 51 2 V do ts
Bitmap Col or Coun t : 4 bit s/ do t (16 col ors)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0 00 00H Do t 0-0 Do t 0-1 Do t 0-2 Do t 0-3
+0 00 02H Do t 0-4 Do t 0-5 Do t 0-6 Do t 0-7
+1F FFEH Do t 511- 50 8 Do t 511- 50 9 Do t 511- 51 0 Do t 511- 511
Do t 0 1 2 3 50 8 50 9 51 0 511
Dot 0 +00000 +00001 +000FE +000FF
+00100 +00101 +001FE +001FF
1
Bitmap
510 +1F E0 0 +1F E0 1 +1F EFE + 1F EF F
511 +1FF0 0 +1FF0 1 + 1F FFE +1FFFF
Not e 1: The upp er lef t no tat io n in the ce l is dot 0- 0; to the right ar e do t 0- 1,
dot 0-2, dot 0- 3, ...
Not e 2: Numb er s in the cel ls ar e VRAM add re sses (hexadeci mal ) of do t (2
dot s) dat a, with VRAM ad dr ess of dot 0- 0, 0- 1 da ta as the
ref erence .
ST-58-R2 403
• Bitmap Pattern (Continued)
(6) Bitmap Size : 512 H dots X 512 V dots
Bitmap Color Count : 8 bits/dot (256 colors)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00000H Dot 0-0 Dot 0-1
+00002H Dot 0-2 Dot 0-3
+3FFFEH Dot 511-510 Dot 511-511
Dot 0 1 2 3 508 509 510 511
Dot 0 +00000 +00001 +00002 +00003 +001FC +001FD +001FE +001FF
+00200 +00201 +00202 +00203 +003FC +003FD +003FE +003FF
1
Bitmap
510 +3FC00 +3FC01 +3FC02 +3FC03 +3FDFC +3FDFD +3FDFE +3FDFF
511 +3FE00 +3FE01 +3FE02 +3FE03 +3FFFC +3FFFD +3FFFE +3FFFF
Note 1: The upper left notation in the cell is dot 0-0; to the right are dot 0-1,
dot 0-2, dot 0-3, ...
Note 2: Numbers in the cells are VRAM addresses (hexadecimal) of dot
data, with VRAM address of dot 0-0 data as the reference.
404
• Bitmap Pattern (Continued)
(7) Bitmap Size : 512 H dots X 512 V dots
Bitmap Color Count : 16 bits/dot (2048 colors, 32768 colors)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00000H Dot 0-0
+00002H Dot 0-1
+7FFFEH Dot 511-511
Dot 0 1 2 3 508 509 510 511
Dot 0 +00000 +00002 +00004 +00006 +003F8 +003FA +003FC +003FE
+00400 +00402 +00404 +00406 +007F8 +007FA +007FC +007FE
1
Bitmap
510 +7F800 +7F802 +7F804 +7F806 +7FBF8 +7FBFA +7FBFC +7FBFE
511 +7FC00 +7FC02 +7FC04 +7FC06 +7FFF8 +7FFFA +7FFFC +7FFFE
Note 1: The upper left notation in the cell is dot 0-0; to the right are dot 0-1,
dot 0-2, dot 0-3, ...
Note 2: Numbers in the cells are VRAM addresses (hexadecimal) of dot
data, with VRAM address of dot 0-0 data as the reference.
ST-58-R2 405
• Bitmap Pattern (Continued)
(8) Bitmap Size : 512 H dots X 512 V dots
Bitmap Color Count : 32 bits/dot (16,770,000 colors)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00000H Dot 0-0 (upper word)
+00002H Dot 0-0 (lower word)
+00004H Dot 0-1 (upper word)
+FFFFCH Dot 511-511 (upper word)
+FFFFEH Dot 511-511 (lower word)
Dot 0 1 2 3 508 509 510 511
Dot 0 +00000 +00004 +00008 +0000C +007F0 +007F4 +007F8 +007FC
+00800 +00804 +00808 +0080C +00FF0 +00FF4 +00FF8 +00FFC
1
Bitmap
510 +FF000 +FF004 +FF008 +FF00C +FF7F0 +FF7F4 +FF7F8 +FF7FC
511 +FF800 +FF804 +FF808 +FF80C +FFFF0 +FFFF4 +FFFF8 +FFFFC
Note 1: The upper left notation in the cell is dot 0-0; to the right are dot 0-1,
dot 0-2, dot 0-3, ...
Note 2: Numbers in the cells are VRAM addresses (hexadecimal) of dot
data (upper word), with VRAM address of dot 0-0 data (upper word) as
the reference.
406
• Bitmap Pattern (Continued)
(9) Bitmap Size : 1024 H dots X 256 V dots
Bitmap Color Count : 4 bits/dot (16 colors)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00000H Dot 0-0 Dot 0-1 Dot 0-2 Dot 0-3
+00002H Dot 0-4 Dot 0-5 Dot 0-6 Dot 0-7
+1FFFEH Dot 255-1020 Dot 255-1021 Dot 255-1022 Dot 255-1023
Dot 0 1 2 3 1020 1021 1022 1023
Dot 0 +00000 +00001 +001FE +001FF
+00200 +00201 +003FE +003FF
1
Bitmap
254 +1FC00 +1FC01 +1FDFE +1FDFF
255 +1FE00 +1FE01 +1FFFE +1FFFF
Note 1: The upper left notation in the cell is dot 0-0; to the right are dot 0-1,
dot 0-2, dot 0-3, ...
Note 2: Numbers in the cells are VRAM addresses (hexadecimal) of dot (2
dots) data, with VRAM address of dot 0-0, 0-1 data as the
reference.
ST-58-R2 407
• Bitmap Pattern (Continued)
(10) Bitmap Size : 1024 H dots X 256 V dots
Bitmap Color Count : 8 bits/dot (256 colors)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00000H Dot 0-0 Dot 0-1
+00002H Dot 0-2 Dot 0-3
+3FFFEH Dot 255-1022 Dot 255-1023
Dot 0 1 2 3 1020 1021 1022 1023
Dot 0 +00000 +00001 +00002 +00003 +003FC +003FD +003FE +003FF
+00400 +00401 +00402 +00403 +007FC +007FD +007FE +007FF
1
Bitmap
254 +3F800 +3F801 +3F802 +3F803 +3FBFC +3FBFD +3FBFE +3FBFF
255 +3FC00 +3FC01 +3FC02 +3FC03 +3FFFC +3FFFD +3FFFE +3FFFF
Note 1: The upper left notation in the cell is dot 0-0; to the right are dot 0-1,
dot 0-2, dot 0-3, ...
Note 2: Numbers in the cells are VRAM addresses (hexadecimal) of dot
data, with VRAM address of dot 0-0 data as the reference.
408
• Bitmap Pattern (Continued)
(11) Bitmap Size : 1024 H dots X 256 V dots
Bitmap Color Count : 16 bits/dot (2048 colors, 32768 colors)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00000H Dot 0-0
+00002H Dot 0-1
+7FFFEH Dot 255-1023
Dot 0 1 2 3 1020 1021 1022 1023
Dot 0 +00000 +00002 +00004 +00006 +007F8 +007FA +007FC +007FE
+00800 +00802 +00804 +00806 +00FF8 +00FFA +00FFC +00FFE
1
Bitmap
254 +7F000 +7F002 +7F004 +7F006 +7F7F8 +7F7FA +7F7FC +7F7FE
255 +7F800 +7F802 +7F804 +7F806 +7FFF8 +7FFFA +7FFFC +7FFFE
Note 1: The upper left notation in the cell is dot 0-0; to the right are dot 0-1,
dot 0-2, dot 0-3, ...
Note 2: Numbers in the cells are VRAM addresses (hexadecimal) of dot
data, with VRAM address of dot 0-0 data as the reference.
ST-58-R2 409
• Bitmap Pattern (Continued)
(12) Bitmap Size : 1024 H dots X 256 V dots
Bitmap Color Count : 32 bits/dot (16,770,000 colors)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00000H Dot 0-0 (upper word)
+00002H Dot 0-0 (lower word)
+00004H Dot 0-1 (upper word)
+FFFFCH Dot 255-1023 (upper word)
+FFFFEH Dot 255-1023 (lower word)
Dot 0 1 2 3 1020 1021 1022 1023
Dot 0 +00000 +00004 +00008 +0000C +00FF0 +00FF4 +00FF8 +00FFC
+01000 +01004 +01008 +0100C +01FF0 +01FF4 +01FF8 +01FFC
1
Bitmap
254 +FE000 +FE004 +FE008 +FE00C +FEFF0 +FEFF4 +FEFF8 +FEFFC
255 +FF000 +FF004 +FF008 +FF00C +FFFF0 +FFFF4 +FFFF8 +FFFFC
Note 1: The upper left notation in the cell is dot 0-0; to the right are dot 0-1,
dot 0-2, dot 0-3, ...
Note 2: Numbers in the cells are VRAM addresses (hexadecimal) of dot
data (upper word), with VRAM address of dot 0-0 data (upper word)
as the reference.
410
• Bitmap Pattern (Continued)
(13) Bitmap Size : 1024 H dots X 512 V dots
Bitmap Color Count : 4 bits/dot (16 colors)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00000H Dot 0-0 Dot 0-1 Dot 0-2 Dot 0-3
+00002H Dot 0-4 Dot 0-5 Dot 0-6 Dot 0-7
+3FFFEH Dot 511-1020 Dot 511-1021 Dot 511-1022 Dot 511-1023
Dot 0 1 2 3 1020 1021 1022 1023
Dot 0 +00000 +00001 +001FE +001FF
+00200 +00201 +003FE +003FF
1
Bitmap
510 +3FC00 +3FC01 +3FDFE +3FDFF
511 +3FE00 +3FE01 +3FFFE +3FFFF
Note 1: The upper left notation in the cell is dot 0-0; to the right are dot 0-1,
dot 0-2, dot 0-3, ...
Note 2: Numbers in the cells are VRAM addresses (hexadecimal) of dot (2
dots) data, with VRAM address of dot 0-0, 0-1 data as the
reference.
ST-58-R2 411
• Bitmap Pattern (Continued)
(14) Bitmap Size : 1024 H dots X 512 V dots
Bitmap Color Count : 8 bits/dot (256 colors)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00000H Dot 0-0 Dot 0-1
+00002H Dot 0-2 Dot 0-3
+7FFFEH Dot 511-1022 Dot 511-1023
Dot 0 1 2 3 1020 1021 1022 1023
Dot 0 +00000 +00001 +00002 +00003 +003FC +003FD +003FE +003FF
+00400 +00401 +00402 +00403 +007FC +007FD +007FE +007FF
1
Bitmap
510 +7F800 +7F801 +7F802 +7F803 +7FBFC +7FBFD +7FBFE +7FBFF
511 +7FC00 +7FC01 +7FC02 +7FC03 +7FFFC +7FFFD +7FFFE +7FFFF
Note 1: The upper left notation in the cell is dot 0-0; to the right are dot 0-1,
dot 0-2, dot 0-3, ...
Note 2: Numbers in the cells are VRAM addresses (hexadecimal) of dot
data, with VRAM address of dot 0-0 data as the reference.
412
• Bitmap Pattern (Continued)
(15) Bitmap Size : 1024 H dots X 512 V dots
Bitmap Color Count : 16 bits/dot (2048 colors, 32768 colors)
Bitmap Pattern (VRAM)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+00000H Dot 0-0
+00002H Dot 0-1
+FFFFEH Dot 511-1023
Dot 0 1 2 3 1020 1021 1022 1023
Dot 0 +00000 +00002 +00004 +00006 +007F8 +007FA +007FC +007FE
+00800 +00802 +00804 +00806 +00FF8 +00FFA +00FFC +00FFE
1
Bitmap
510 +FF000 +FF002 +FF004 +FF006 +FF7F8 +FF7FA +FF7FC +FF7FE
511 +FF800 +FF802 +FF804 +FF806 +FFFF8 +FFFFA +FFFFC +FFFFE
Note 1: The upper left notation in the cell is dot 0-0; to the right are dot 0-1,
dot 0-2, dot 0-3, ...
Note 2: Numbers in the cells are VRAM addresses (hexadecimal) of dot
data, with VRAM address of dot 0-0 data as the reference.
ST-58-R2 413
• Line Scroll Table Data Bit Configuration
Hor izon tal , Vert ica l Scr ee n Scro ll Va lue
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+OH Intege r Part : 11 b its
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+2H Fr act iona l Part : 8 bit s
Hor izon tal Coo rdi na te Incr em en t
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0H Integ er Part : 3 bi ts
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+2H Fr act iona l Part : 8 bi ts
No te: Shad ed ar ea s ar e ig no re d
414
• Example of Line Scroll Table
When selecting horizontal and vertical screen scroll values and
horizontal coordinate increment for every 1 line.
Bit 15 Line Scroll Table (VRAM) 0
Line Scroll Table +00H Line 1 Horiz. Screen Scroll Value (Integer Part)
Address
+02H Line 1 Horiz. Screen Scroll Value (Fractional Part)
+04H Line 1 Vertical Screen Scroll Value (Integer Part)
+06H Line 1 Vertical Screen Scroll Value (Fractional Part)
+08H Line 1 Horiz. Coordinate Increment (Integer Part)
+0AH Line 1 Horiz. Coordinate Increment (Fractional Part)
+0CH Line 2 Horiz. Screen Scroll Value (Integer Part)
+0EH Line 2 Horiz. Screen Scroll Value (Fractional Part)
+10H Line 2 Vertical Screen Scroll Value (Integer Part)
+12H Line 2 Vertical Screen Scroll Value (Fractional Part)
+14H Line 2 Horiz. Coordinate Increment (Integer Part)
+16H Line 2 Horiz. Coordinate Increment (Fractional Part)
When selecting vertical screen scroll value and horizontal coordinate
increment for every 2 lines (no horizontal line scroll).
Bit 15 Line Scroll Table (VRAM) 0
Line Scroll Table +00H Line 1 Vertical Screen Scroll Value (Integer Part)
Address
+02H Line 1 Vertical Screen Scroll Value (Fractional Part)
+04H Line 1, 2 Horiz. Coordinate Increment (Integer Part)
+06H Line 1, 2 Horiz. Coordinate Increment (Fractional Part)
+08H Line 3 Vertical Screen Scroll Value (Integer Part)
+0AH Line 3 Vertical Screen Scroll Value (Fractional Part)
+0CH Line 3, 4 Horiz. Coordinate Increment (Integer Part)
+0EH Line 3, 4 Horiz. Coordinate Increment (Fractional Part)
Note: Display coordinates in the vertical direction for lines not
specified are obtained by adding coordinate increments in the
vertical direction to the vertical screen scroll values for the lines
specified.
When selecting horizontal screen scroll value and horizontal
coordinate increment for every 4 lines (no horizontal line scroll).
Bit 15 Line Scroll Table (VRAM) 0
Line Scroll Table +00H Line 1~4 Horiz. Screen Scroll Value (Integer Part)
Address
+02H Line 1~4 Horiz. Screen Scroll Value (Fractional Part)
+04H Line 1~4 Horiz. Coordinate Increment (Integer Part)
+06H Line 1~4 Horiz. Coordinate Increment (Fractional Part)
+08H Line 5~8 Horiz. Screen Scroll Value (Integer Part)
+0AH Line 5~8 Horiz. Screen Scroll Value (Fractional Part)
+0CH Line 5~8 Lines Horiz. Coordinate Increment (Integer Part)
+0EH Line 5~8 Lines Horiz. Coordinate Increment (Fractional Part)
ST-58-R2 415
• Vertical Cell Scroll Table Data Bit Configuration
Vertical Screen Scroll Value
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0H 11 bit integer part
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+2H 8 bit fractional part
Note: Shaded area is ignored
416
• Example of Vertical Cell Scroll Table
NBG0 Vertical Cell Scroll
Bit 15 Vertical Cell Scroll Table (VRAM) 0
Vertical Cell Scroll +00H NBG0 1st cell vertical screen scroll value (integer part)
Table Address
+02H NBG0 1st cell vertical screen scroll value (fractional part)
+04H NBG0 2nd cell vertical screen scroll value (integer part)
+06H NBG0 2nd cell vertical screen scroll value (fractional part)
+08H NBG0 3rd cell vertical screen scroll value (integer part)
+0AH NBG0 3rd cell vertical screen scroll value (fractional part)
+0CH NBG0 4th cell vertical screen scroll value (integer part)
+0EH NBG0 4th cell vertical screen scroll value (fractional part)
+10H NBG0 5th cell vertical screen scroll value (integer part)
+12H NBG0 5th cell vertical screen scroll value (fractional part)
NBG1 Vertical Cell Scroll
Bit 15 Vertical Cell Scroll Table (VRAM) 0
Vertical Cell Scroll +00H NBG1 1st cell vertical screen scroll value (integer part)
Table Address
+02H NBG1 1st cell vertical screen scroll value (fractional part)
+04H NBG1 2nd cell vertical screen scroll value (integer part)
+06H NBG1 2nd cell vertical screen scroll value (fractional part)
+08H NBG1 3rd cell vertical screen scroll value (integer part)
+0AH NBG1 3rd cell vertical screen scroll value (fractional part)
+0CH NBG1 4th cell vertical screen scroll value (integer part)
+0EH NBG1 4th cell vertical screen scroll value (fractional part)
+10H NBG1 5th cell vertical screen scroll value (integer part)
+12H NBG1 5th cell vertical screen scroll value (fractional part)
NBG0 and NBG1 Vertical Cell Scroll
Bit 15 Vertical Cell Scroll Table (VRAM) 0
Vertical Cell Scroll +00H NBG0 1st cell vertical screen scroll value (integer part)
Table Address
+02H NBG0 1st cell vertical screen scroll value (fractional part)
+04H NBG1 1st cell vertical screen scroll value (integer part)
+06H NBG1 1st cell vertical screen scroll value (fractional part)
+08H NBG0 2nd cell vertical screen scroll value (integer part)
+0AH NBG0 2nd cell vertical screen scroll value (fractional part)
+0CH NBG1 2nd cell vertical screen scroll value (integer part)
+0EH NBG1 2nd cell vertical screen scroll value (fractional part)
+10H NBG0 3rd cell vertical screen scroll value (integer part)
+12H NBG0 3rd cell vertical screen scroll value (fractional part)
ST-58-R2 417
• Rotation Parameter Table
+00H Screen Start Coordinate Xst (Integer Part)
+02H (Fractional Part)
+04H Screen Start Coordinate Yst (Integer Part)
+06H (Fractional Part)
+08H Screen Start Coordinate Zst (Integer Part)
+0AH (Fractional Part)
+0CH Screen Vertical Coordinate Increment ∆Xst (Integer Part)
+0EH (Fractional Part)
+10H Screen Vertical Coordinate Increment ∆Yst (Integer Part)
+12H (Fractional Part)
+14H Screen Horiz. Coordinate Increment ∆X (Integer Part)
+16H (Fractional Part)
+18H Screen Horiz. Coordinate Increment ∆Y (Integer Part)
+1AH (Fractional Part)
+1CH Rotation Matrix Parameter A (Integer Part)
+1EH (Fractional Part)
+20H Rotation Matrix Parameter B (Integer Part)
+22H (Fractional Part)
+24H Rotation Matrix Parameter C (Integer Part)
+26H (Fractional Part)
+28H Rotation Matrix Parameter D (Integer Part)
+2AH (Fractional Part)
+2CH Rotation Matrix Parameter E (Integer Part)
+2EH (Fractional Part)
+30H Rotation Matrix Parameter F (Integer Part)
+32H (Fractional Part)
+34H Viewpoint Coordinate Px (Integer Part)
+36H Viewpoint Coordinate Py (Integer Part)
+38H Viewpoint Coordinate Pz (Integer Part)
+3AH This data is ignored
+3CH Center Point Coordinate Cx (Integer Part)
+3EH Center Point Coordinate Cy (Integer Part)
+40H Center Point Coordinate Cz (Integer Part)
+42H This data is ignored
+44H Horizontal Shift Mx (Integer Part)
+46H (Fractional Part)
+48H Horizontal Shift My (Integer Part)
+4AH (Fractional Part)
+4CH Scaling Coefficient kx (Integer Part)
+4EH (Fractional Part)
+50H Scaling Coefficient ky (Integer Part)
+52H (Fractional Part)
+54H Coefficient Table Start Address KAst (Integer Part)
+56H (Fractional Part)
+58H Coefficient Table Vertical Address Increment ∆KAst (Integer Part)
+5AH (Fractional Part)
+5CH Coefficient Table Horiz. Address Increment ∆KAx (Integer Part)
+5EH (Fractional Part)
418
Mode 0: Used as Scale Coefficients kx and ky
Mode 1: Used as Scale Coefficients coefficient kx
Mode 2: Used as Scale Coefficients coefficient ky
Mode 3: Used as viewpoint coordinate Xp after rotation conversion
• Coefficient Table Data Bit Configuration
Coe ffici en t Dat a Mod e 0~2
Coe ffici en t Dat a Size : 2 wor ds
Tra nsp ar en cy
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0 H 7 bi t line col or scre en da ta Sign 7 bi t integ er par t
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+2 H 16 bi t fra ct ion al par t
Coe ffici en t Dat a Size : 1 wor d
Tra nsp ar en cy
Bit 15
14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0 H Sign 4 bit int ege r pa rt 10 bi t fra ct ion al pa rt
No te: The MS B are si gn -e xpa nd ed by 3 bit s an d the LS B are 0- exp an de d
by 6 bi ts to be of equ al to the num ber of bi ts as in the case of 2 wo rd s.
Coe ffici ent Dat a Mod e 3
Coe ffici ent Dat a Size : 2 wo rds
Tr an spa re ncy
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0 H 7 bi t line col or scre en da ta Sign Integ er par t MSB 7 bits
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+2 H Int eg er pa rt LS B 8 bi ts 8 bi t fra ct ion al par t
Coe ffici ent Dat a Size : 1 wo rd
Tr an spa re ncy
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0 H Sign 12 bit int ege r pa rt 2 bit fract iona l pa rt
Not e: The MSB ar e sig n- exp an de d by 3 bi ts and the LSB ar e 0-expa nd ed
by 6 bits to be of eq ua l to the nu mbe r of bits as in the ca se of 2 wor ds.
ST-58-R2 419
• Line Color Screen Table Data Bit Configuration
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
11 bit color Ram address
Note: Shaded are is ignored. Also, when color RAM is in mode 0 or mode 2, the
MSB of the address is ignored.
• Line Color Screen Table
Non-interlace and double-density interlace mode
Bit 15 Line Color Screen Table (VRAM) 0
+00H 1st Line Color RAM Address
+02H 2nd Line Color RAM Address
+04H 3rd Line Color RAM Address
+06H 4th Line Color RAM Address
+08H 5th Line Color RAM Address
+0AH 6th Line Color RAM Address
Note: In the case of single color, the 1st line color RAM
address is used in the entire line color screen. In the case of
double-density interlace, line data of odd and even fields are
stored together.
Single-density interlace mode
Bit 15 Line Color Screen Table (VRAM) 0
+00H 1st and 2nd Line Color Ram Address
+02H 3rd and 4th Line Color Ram Address
+04H 5th and 6th Line Color Ram Address
+06H 7th and 8th Line Color Ram Address
+08H 9th and 10th Line Color Ram Address
+0AH 11th and 12th Line Color Ram Address
Note: In the case of single color, the 1st and 2nd line color
RAM addresses are used in the entire line color screen.
420
• Back Screen Table Data Bit Configuration
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
5 bit Blue Data 5 bit Green Data 5 bit Red Data
Note: Shaded area is ignored. Add 0 bit 3 bits at a time to the lower bits
of RGB to make 8 bits.
• Back Screen Table
Non-interlace and double-density interlace mode
Bit 15 Back Screen Table (VRAM) 0
+00H 1st Line RGB Data
+02H 2nd Line RGB Data
+04H 3rd Line RGB Data
+06H 4th Line RGB Data
+08H 5th Line RGB Data
+0AH 6th Line RGB Data
Note: In the case of single color, the 1st line RGB data is used
in the entire line color screen. In the case of double-density
interlace, line data of odd and even fields are stored together.
Single-density interlace mode
Bit 15 Back Screen Table (VRAM) 0
+00H 1st and 2nd Line RGB Data
+02H 3rd and 4th Line RGB Data
+04H 5th and 6th Line RGB Data
+06H 7th and 8th Line RGB Data
+08H 9th and 10th Line RGB Data
+0AH 11th and 12th Line RGB Data
Note: In the case of single color, the 1st and 2nd line RGB data
are used in the entire line color screen.
ST-58-R2 421
• Normal Line Window Table Data Bit Configuration
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+0H Horizontal Start Point Coordinates (10 bits)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+2H Horizontal End Point Coordinates (10 bits)
Note: Shaded areas are ignored
• Normal Line Window Table
Non-interlace or double-density interlace
Bit 15 Line Window Table (VRAM) 0
+00H 1st line horizontal start point coordinates
+02H 1st line horizontal end point coordinates
+04H 2nd line horizontal start point coordinates
+06H 2nd line horizontal end point coordinates
+08H 3rd line horizontal start point coordinates
+0AH 3rd line horizontal end point coordinates
Note: In the case of double-density interlace, store line data of
both even and odd fields.
Single-density interlace
Bit 15 Line Window Table (VRAM) 0
+00H 1st & 2nd line horizontal start point coordinates
+02H 1st & 2nd line horizontal end point coordinates
+04H 3rd & 4th line horizontal start point coordinates
+06H 3rd & 4th line horizontal end point coordinates
+08H 5th & 6th line horizontal start point coordinates
+0AH 5th & 6th line horizontal end point coordinates
422
TM
SEGA SATURN
SCU Final Specifications:
Precautions
(Version 1)
Doc. # ST-210-110194
© 1994-5 SEGA. All Rights Reserved.
REFERENCES
In translating/creating this document, certain technical words and/or phrases were interpreted
with the assistance of the technical literature listed below.
1. KenKyusha New Japanese-English Dictionary
1974 Edition
2. Nelson’s Japanese-English Character Dictionary
2nd revised version
3. Microsoft Computer Dictionary
4. Japanese-English Computer Terms Dictionary
Nichigai Associates
4th version
0. Introduction
This document contains the final specifications and items of note about the SEGA
Saturn SCU. Since it consists of material which is not included in the previous
manual, be sure to check the contents against this newest manual.
[Revision History]
Sept. 20, 1994 Provisional version issued
Oct. 11, 1994 2nd provisional version (added No. 35 and No. 36)
Oct. 16, 1994 1st version issued (revised No. 35 and No. 36)
SATURN SCU Final Specs: Precautions 1
1. SCU Final Specifications List
No. 01 Write to the A-Bus by SCU-DMA is prohibited.
No. 02 Read from the VDP2 area by SC-DMA is prohibited.
No. 03 VDP1 register write access must be in word units (2 bytes).
No. 04 Do not use SCU-DMA to WORK RAM-L (Caution).
No. 05 Must use the cache through address to access the SCU register .
No. 06 Reads and writes to unused areas (address 25FE00ACH) are prohibited.
No. 07 Writes to interrupt status register (25FE00A4H) are prohibited.
No. 08 ← → B-Bus is
Access to A-Bus and B-Bus from the CPU during DMA operation of A-Bus
prohibited.
No. 09 Setting the A-Bus preread significant bit is prohibited.
No. 10 A-Bus interrupt acknowledge register address change (address 25FE00A8H).
No. 11 A-Bus set register write restriction (addresses 25FE00B0H and 25FE00B4H).
No. 12 A-Bus ← → B-Bus SCU-DMA start standby when CPU writes to the A-Bus and B-Bus.
No. 13 Delete the DMA status register (addresses 25FE0070H ~ 25FE007CH).
No. 14 Delete the DMA forced quit register function (address 25FE0060
H).
No. 15 Read of DMA transfer register transfer byte number is prohibited (write only).
No. 16 Restrictions by the address accessing the DMA read address add value.
No. 17 Value of the address add value bit when setting the DMA read address update bit.
No. 18 Restrictions by the address accessing the DMA write address add value.
No. 19 Value of the address add value bit when setting the DMA write address update bit.
No. 20 2 channels can be used for simultaneous use of DMA.
No. 21 DMA activation method specification change.
No. 22 Specification when DMA start trigger occurs during DMA execution.
No. 23 Writing to the register of the corresponding level while activating DMA is prohibited.
No. 24 DMA illegal interrupt does not occur during DMA execution in the indirect mode.
No. 25 DMA indirect mode table specification change.
No. 26 Clears the program end interrupt flag when starting DSP.
No. 27 Address add value restriction when transferring from the DSP DMA command B-Bus to the
DSP Data RAM.
No. 28 When debugging with ICE, starting DMA operation is delayed if a BREAK is performed.
No. 29 Must be the BREQ enable condition when debugging in ICE.
No. 30 Caution when using the Timer 0 compare register (address 25FE0090
H).
No. 31 Caution when using the Timer 1 set data register (address 25FE0094
H).
No. 32 Caution during read access of A-Bus and B-Bus areas (2000000H ~ 5FFFFFFH).
No. 33 A-Bus refresh initial value when Power ON is reset (address 25FE00B8
H).
No. 34 Initial value of the SDRAM selection bit (address 25FE00C4
H).
No. 35 Start of DMA level 2 is prohibited during execution of DMA level 1.
No. 36 Caution when reading the DSP program control port (address 25FE0080
H).
2
2. SCU Final Specification Reference Items
1. Items concerning the entire DMA .
Item No. 01, 02, 04, 08, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29 and 3
2. DMA indirect mode specific items.
Item No. 24 and 25
3. Items relating to the DSP.
Item No. 16, 20, 26, 27 and 36
4. Items regarding external areas (A-Bus).
Item No. 01, 08, 09, 10, 11, 12, 17, 18, 19 and 32
5. Items regarding B-Bus areas (VDP1, VDP2, SCSP).
Item No. 02, 03, 08, 12, 17, 18, 19 and 32
6. Items regarding interrupt.
Item No. 07, 30 and 31
7. SCU register specification change items.
Item No. 07, 09, 10, 11, 13, 14, 15, 23 and 24
8. Items relating to debugging.
Item No. 28 and 29
SATURN SCU Final Specs: Precautions 3
3. SCU Final Specification Contents
No. 01 Write to the A-Bus by the SCU-DMA is prohibited.
Write to the A-Bus by SCU-DMA cannot be used.
No. 02 Read from the VDP2 area by SCU-DMA is prohibited.
Read by SCU-DMA from the VDP2 area cannot be used.
No. 03 VDP1 register write access must be in word units (2 bytes).
VDP1 register write access must be in word (2 byte) units. Access in long word (4 bytes) byte units is
prohibited. VDP1 read access can be in byte and long word units.
No. 04 Use of SCU-DMA to WORK RAM-L is not able (Caution).
Work RAM-H (SDRAM: 1 Mbyte) is the only Work RAM that can be used with SCU-DMA. Work RAM-L
(DRAM: 1 Mbyte) cannot be used.
No. 05 Access to the SCU register must use the cache through address.
Register access to the SCU must be done by the cache-through address. This is because a register i
which read is prohibited may be accessed if the cache address is used since the CPU runs in the
following way when the cache is full.
• When 0H address data is read by the cache address
4H address read→ 8H address read→ CH address read→ 0H address read→ cache register
• When 4H address data is read by the cache address
8H address read→ CH address read→ 0H address read→ 4H address read→ cache register
• When 8H address data is read by the cache address
CH address read→ 0H address read→ 4H address read→ 8H address read→ cache register
• When CH address data is read by the cache address
0H address read→ 4H address read→ 8H address read→ CH address read→ cache register
No. 06 Read and write to unused areas (address 25FE00AC
H etc. ) is prohibited.
Reading and writing to unused areas are prohibited. Reading and writing to address 25FE00AC
H is
especially prohibited.
No. 07 Write to the interrupt status register (25FE00A4
H) is prohibited.
When writing to the interrupt status register, the bit used to create interrupt may not be active.
Therefore, writing to the interrupt status register is prohibited.
4
No. 08 ← → B-Bus is prohibited.
Access to A-Bus and B-Bus from the CPU during DMA operation of A-Bus
During the DMA operation of A-Bus to B-Bus and B-Bus to A-Bus, access from the CPU to the A-Bus
and B-Bus is prohibited. Refresh is not generated for SDRAM while waiting and may hang up.
No. 09 Setting the A-Bus preread significant bit is prohibited.
The A-Bus preread function was deleted. The following register bits listed in the 2nd version manual
(May 31, 1994) must be set to 0.
1. A-Bus set register [CS0, 1 space] (address: 25FE00B0H, register: ASR0)
→ [bit 31] and [bit 15] must be set to 0.
2. A-Bus set register [CS2, reserved space] (address: 25FE00B4 H, register: ASR1)
→ [bit 31] and [bit 15] must be set to 0.
No. 10 Address change of the A-Bus interrupt acknowledge register (address 25FE00A8
H).
The address of the A-Bus interrupt acknowledge register is changed to 25FE00A8
H. The contents of
change is reflected in the 2nd version manual (May 31, 1994).
No. 11 A-Bus set register write restriction (addresses 25FE00B0
H and 25FE00B4H).
The A-Bus set register enables to write to the A-Bus only when not accessing. Write after completing
read of the A-Bus (dummy).
No. 12 A-Bus ← → B-Bus SCU-DMA start standby when the CPU writes to the A-Bus and B-Bus.
The write process by the CPU to the A-Bus and B-Bus is higher in priority than the SCU-DMA start
between the A-Bus and B-Bus. For example, while continuous write is performed by the CPU to VDP
(B-Bus), SCU-DMA does not start until continuous write ends even if SCU-DMA initial activation for
VDP2 (B-Bus) from the A-Bus. However, while starting SCU-DMA, CPU access to A-Bus and B-Bus is
on standby.
No. 13 Delete the DMA status register (addresses 25FE0070
H ~ 25FE007CH).
The function that returns the address set value of DMA while stopped and the status of levels 0, 1, 2
been deleted. Part of the specification change is reflected in the 2nd version manual (May 31, 1994)
(The DMA read address, write address, and transfer byte number while stopped were deleted.)
No. 14 Delete the DMA forced quit register function. (Address 25FE0060
H).
DMA forced quit register functions was deleted. Writing to this register is prohibited.
SATURN SCU Final Specs: Precautions 5
No. 15 Read of DMA transfer register transfer byte is prohibited (write only).
The value reading the number of transfer bytes number of the DMA transfer register is not guarantee
This register cannot be read. This is a write-only register. (address, level 0, 25FE0008
H : D0C, level 1,
25FE0028H : D1C, level 2, 25FE0048 H : D2C).
No. 16 Restrictions by the address accessing the DMA read address add value.
The value that can be set in the read address add value changes by the address that is to be access
This applies to DMA commands of the DSP.
External area 4 (A-Bus I/O area) → Able to set 0B and 1B .
Other → Able to set 1B only.
(Address: level 0, 25FE000CH: D0RA, level 1, 25FE002C H: D1RA, level 2, 25FE004CH: D2RA)
No. 17 Value of the address add value bit when setting the DMA read address update bit.
1 is 1, the read address add value bit*
When the read address update bit* 2 must be 1.
*1 Read address update bit
Address: level 0, 25FE0014H: D0RUP, level 1, 25FE0034H: D1RUP, level 2, 25FE0054H: D2RUP
*2 Read address add value bit
Address: level 0, 25FE000CH: D0RA, level 1, 25FE002C H: D1RA, level 2, 25FE004C
H: D2RA
No. 18 Restrictions by the address accessing the DMA write address add value.
Values that can be set in the write address add value change according to the address that is access
This applies to DMA commands of the DSP.
WORK RAM-H → Able to set 010B
External area 1 ~ 3 → Able to set 010B
External area 4 (A-Bus I/O area) → Able to set 000B and 010B .
VDP1, VDP2, SCSP → All settings are possible.
(Address: level 0, 25FE000CH: D0WA, level 1, 25FE002C H: D1WA, level 2, 25FE004C H: D2WA)
No. 19 Value of the address add value bit when setting the DMA write address refresh bit.
When the write address update bit1 *is 1, the write address add value bit2 *must be set by the bus space
to be accessed as shown below.
External area 1 ~ 4 (A-Bus) → Able to set 010B
VDP1, VDP2, and SCSP (B-Bus) → Able to set 001B
Work RAM-H ((C-Bus) → Able to set 010B
*1 Write address update bit
Address: level 0, 25FE0014H: D0WUP, level 1, 25FE0034 H: D1WUP, level 2, 25FE0054 H: D2WUP
*2 Write address add value bit
Address: level 0, 25FE000CH: D0WA, level 1, 25FE002C H: D1WA, level 2, 25FE004C H: D2WA
6
No. 20 2 channels are available for the simultaneous use of DMA.
Up to 2 channels can be used concurrently which guarantee the priority order of DMA . If 3 channels
used concurrently, the priority order is ignored. (The DSP DMA command is also counted as 1 chann
No. 21 DMA activation method specification changes.
The start method of DMA has been changed and a DMA enable bit has been provided separately.
Start Factor DMA Start Conditions
000 Enable bit =1 AND V-BLANK-IN
001 Enable bit =1 AND V-BLANK-OUT
010 Enable bit =1 AND H-BLANK-IN
011 Enable bit =1 AND TIMER 0
100 Enable bit =1 AND TIMER 1
101 Enable bit =1 AND SCSP Request
110 Enable bit =1 AND Sprite draw end
111 Enable bit =1 AND DMA Start Bit = 1
These changes are reflected in the 2nd version manual (May 31, 1994.)
No. 22 Specification when a DMA start trigger occurred during DMA execution.
If a DMA start trigger occurs while DMA is being executed, and it holds the trigger, then execute
activation after DMA ends. For example, when set so that DMA starts at H-Blank, operation becomes
unstable if the set data size is larger than the size enabling transfer within 1 line (until the next H-blank
When such DMA start is executed in this way, please note the transfer data size. The trigger hold hol
only for 1 time.
No. 23 Writing to the register of the corresponding level while starting DMA is prohibited.
Rewriting the contents of DMA mode, address update, activation factor selection register*1 and DMA
set register*2 is not allowed during DMA activation at this level. Hang up occurs if rewritten.
*1 DMA mode, address update, start factor select register
Address: Level 0, 25FE0014H, level 1 25FE0034H, level 2 25FE0054H
*2 DMA set register
Address: Level 0, 25FE000CH, level 1 25FE002CH, level 2 25FE004CH
No. 24 DMA illegal interrupt does not occur during DMA execution in the indirect mode.
The DMA illegal interrupt status bit [bit 12] of the DMA status register (address 25FE00A4
H) does not
occur in the indirect mode while DMA is executing. When DMA is used in the indirect mode, do not re
to the DMA illegal interrupt status bit.
SATURN SCU Final Specs: Precautions 7
No. 25 DMA indirect mode table specification change.
Tables of DMA indirect mode have been changed as shown below.
[Points of Change]
1. The 4 long word configuration has been changed to a 3 long word configuration.
2. The write address and read address have been reversed.
3. The table address (m value in the table below) must place the beginning address in 32, 64 128, 2
512,1024, . . .byte boundaries according to table size (n X 12 bytes). An example is shown below
• Table size is 24 bytes or less → place at the start address 32 byte boundary.
• Table size is 252 bytes or less → place at the start address 256 byte boundary.
• Table size is 1020 bytes or less→ place at the start address 1024 byte boundary.
4. A 1 must be set to the 31st bit of the read address of the final address (n th).
Address is set in the write → m first transfer byte number
address register m+4 first write address
m+8 first read address
.
.
.
nth transfer byte number
nth write address
Set 1 in the 31st bit of the nth read→ nth read address
address
(Address: level 0, 25FE0004H, level 1, 25FE0024H, level 2, 25FE0044H)
No. 26 Clears the program end interrupt flag when starting DSP.
Be sure the program end interrupt flag [bit 18 : E] of the DSP program control port (address 25FE00
H) 8
is 0 when starting DSP. If the flag is 1, DSP program end interrupt does not occur even if the DSP
program ends by the ENDI command.
No. 27 Address add value restriction when transferring from the DMA command B-Bus of the DSP
to the Data RAM of the DSP.
The address add value must be 010
B when transferring from the B-Bus to the Data RAM of DSP with th
DSP DMA command (DMA and DMAH).
No. 28 When debugging in ICE, starting DMA operation is delayed if a BREAK is performed.
SCU DMA must be executed by the CPU. If there is a break while debugging in ICE, the start of the
SCU-DMA operation will be delayed. Operation of the SCU-DMA is normally performed when the IC E
execution condition is the parallel mode (prompt is the # condition).
8
No. 29 Must be the BREQ enable condition when debugging in ICE.
When SCU-DMA is used in ICE, the input condition of the EXECUTION_MODE (EM) command BREQ
(bus right request) signal must be E (always enabled). Changing the E7000 system of ICE is
unnecessary because BREQ is E by default.
No. 30 Caution when using the Timer 0 compare register (address 25FE0090
H)
It is possible to set up to 10 bits of data, but if data that does not exist, interrupt won't occur . Be sure
set a value within a range that can be used. In case of an NTSC non-interface (1 screen 263 lines,
effective screen 224 lines), for example, interrupt will occur as follows:
T0C9–0 = 1 → Occurs at the start of H-Blank-IN just before the first 1 line of the effective scree
T0C9–0 = 2 → Occurs at the start of H-Blank-IN just before the first 2 line of the effective scree
T0C9–0 = 224 → Occurs at the start of H-Blank-IN just before the last 1 line of the effective scree
T0C9–0 = 225 → Occurs at the start of H-Blank-IN just after the effective screen ends.
T0C9–0 = 263 → Occurs at the start of H-Blank-IN just 1 line before the beginning of the effectiv e
screen.
T0C9–0 = 264 ~ 1023 → Interrupt does not occur.
T0C9–0 = 0 → Interrupt occurs with the same timing as V-Blank-OUT.
No. 31 Caution when using the Timer 1 set data register (address 25FE0094
H)
Loading the value of Timer 1 set data register to Timer 1 occurs "when Timer 1 is stopped and H-Blan
occurs." If data larger than the count number of 1 line is set to the Timer 1 set data register, Timer 1
interrupt no longer occurs for each line.
[Count Number Range]
For 1 line 320 dots: 1 ~ 1AAH
For 352 dots 1 ~ 1C6H
For 424 dots 1 ~ D3H
For 426 dots 1 ~ D4H
(Be aware that this becomes 512 when a count number of 0 is specified)
No. 32 Caution during read access of A-Bus and B-Bus areas (2000000
H ~ 5FFFFFFH)
The internal CPU operation and external operation are different for read access of the A-Bus and B-B
areas (2000000H ~ 5FFFFFFH). Even for byte or word (2 bytes) read access from the SH2, the externa
is accessed by long word (4 bytes) units. When performing byte unit read of a continuous area in -the
Bus and B-Bus areas, more process time than for byte unit write is required. Internal operations and
external operations are the same for write access. (External access becomes byte access when
accessed in byte units.)
SATURN SCU Final Specs: Precautions 9
No. 33 A-Bus refresh initial value when Power ON is reset (address 25FE00B8
H).
The initial value of the A-Bus refresh output effective bit when resetting power on is changed to an
effective condition (ARFEN = 1). This bit should not be changed by the user.
No. 34 Initial value of the SDRAM selection bit (address 25FE00C4
H).
The SDRAM selection bit becomes 2 Mbits X 2 (RSEL = 0) by resetting the power on. Reset to RSEL
1 and change to 4 Mbits X 2. This change in setting is done within the Boot ROM and requires no
change by the user.
No. 35 Start of DMA level 2 is prohibited during execution of DMA level 1.
A malfunction can occur when DMA level 2 is activated while starting DMA at level 1. Do not start DM
level 2 while DMA level 1 is activated.
No. 36 Caution when reading the DSP program control port (address 25FE0080
H).
Be aware that the following phenomenon occurs when reading the DSP program control port.
1. V-Flag (overflow flag) is cleared away.
A check of the V-Flag cannot be done while executing DSP.
2. The DSP end interrupt factor may not occur.
Because the DSP end interrupt may not occur when the program end interrupt flag is read while
DSP is being executed, please do not read this address for the program obtained by DSP end
interrupt.
10
TM
The SATURN
SCU DSP Simulator
User's Manual
Addendum
Doc. # ST-240-B-SP1-052295
© 1994-95 SEGA. All Rights Reserved.
The SATURN SCU DSP Simulator
User's Manual Addendum
by Dennis Caswell
5/17/95
Introduction
The DSP simulator (dspsim.exe) is a simple, command-line-oriented software emulator which makes
it possible to load, execute, and debug programs written for the DSP that is a part of the SATURN
System Control Unit (SCU).
Types of Memory Supported by the Simulator
The DSP simulator emulates the two types of memory found within the DSP itself (program RAM
and the four banks of data RAM), and it also simulates a 256-megabyte external memory space,
which can be used as a source or destination for DMA transfers performed by a DSP program. It is
not clear how this simulated memory is actually implemented or what would happen if you tried to
use all of it.
Addresses in the DSP’s internal memory are 32-bit-word-addresses, while addresses in external
memory are byte addresses. Nonetheless, the simulator will only access external memory in 32-bit
chunks that are aligned on 32-bit boundaries, so all external memory addresses used in commands to
the simulator should be divisible by 4.
Command Summary
A Mini-assembler
B Breakpoints
D Dump memory
E Enter one or more values into memory
F Fill a range of memory with a specified value
G Go
H Execution history
L Load a binary or S-record file
M Move memory
P Set program memory size
Q Quit
R Display and set registers
S Single step
U Disassemble (unassemble)
W Write a binary or S-record file
^ Command history
!! Repeat last command
! Repeat specified command
? Display on-line command summary
The SATURN SCU DSP Simulator 1
User's Manual Addendum
Command Descriptions
A [<prog addr>]
Activate the mini-assembler, storing instructions starting at the specified address. The assembler
accepts all DSP mnemonics, but it does not accept labels, assembler directives, or expressions.
Exit the mini-assembler by entering a blank line.
B <prog addr>, B, B-, BX [<n>]
B <prog addr> sets an execution breakpoint at the specified address in program memory.
B lists all current breakpoints.
B- deletes all breakpoints.
BX [<n>] deletes the breakpoint that occupies the specified position in the list of breakpoints. If the
parameter is omitted, BX is the same as B-.
D [[<ram>] [<addr1> [<addr2>]]]
Dump memory from <addr1> through <addr2>. The <ram> parameter specifies the type of
memory to be dumped. Substitute p for program RAM, m for external RAM, or r0, r1, r2, or r3
for one of the DSP’s four banks of data RAM. If <ram> is omitted, it defaults to the most-recently-
referenced memory area. If <addr2> is omitted, it defaults to <addr1> + 0x3f for program or data
memory and <addr1> + 0xff for external memory. If all of the parameters are omitted, the next 64
32-bit words are displayed.
E [<ram>] <addr1> [<value>]
Enter one or more 32-bit numbers into memory. The <ram> parameter specifies the type of memory
to use. Substitute p for program RAM, m for external RAM, or r0, r1, r2, or r3 for one of the DSP’s
four banks of data RAM. If <ram> is omitted, it defaults to the most-recently-referenced memory
area. If <value> is omitted, then the simulator enters a command mode in which a series of values
may be entered into consecutive memory addresses. When in this mode, the simulator prompts with
an address and accepts one of the following commands:
<value> Store the value to the current address and go to the next address.
@ Go to the next address without altering the contents of the current address.
^ Back up to the previous address without altering the contents of the current address.
. Exit the data-entry mode and return to the simulator’s main command prompt.
<enter> Same as @.
F [<ram>] <addr1> <addr2> <value>
Fill a range of memory with a single 32-bit value. The <ram> parameter specifies the type of memory
to be filled. Substitute p for program RAM, m for external RAM, or r0, r1, r2, or r3 for one of
the DSP’s four banks of data RAM. If <ram> is omitted, it defaults to the most-recently-referenced
memory area.
G [<prog addr1> [<prog addr2>]
Start executing instructions at the specified address in program memory. If a second address is
specified, execution terminates at that address.
2
H [<n>], H+, H-, H@
H [<n>] displays a history of register values extending back for the specified number of instruc-
tions. The default is 10.
H+ enables the history mechanism (the default).
H- disables the history mechanism.
H@ clears the history buffer.
L <ram> <file> <addr>
Load a binary or S-record file. File names having the extensions “.s” or “.mot” are presumed to be S-
record files. Files having other extensions are presumed to be binary files. The <ram> parameter
specifies the type of memory to be loaded. Substitute p for program RAM, m for external RAM, or
r0, r1, r2, or r3 for one of the DSP’s four banks of data RAM. When loading an S-record file,
the <addr> parameter is added to the addresses contained in the S-record file.
M <ram1> <addr1> <addr2> [<ram2>] <addr3>
Move a range of memory to the specified address. The <ram1> and <ram2> parameters specify the
types of memory to be read and written. Substitute p for program RAM, m for external RAM, or r0,
r1, r2, or r3 for one of the DSP’s four banks of data RAM. If <ram2> is omitted, it defaults to
<ram1>. Overlapping source and destination ranges are handled correctly.
P, PE, PR
P displays current program size setting.
PE sets size of simulated program memory to 2048 32-bit words.
PR sets size of program memory to 256 32-bit words (the default).
Quit to DOS (no confirmation).
R, R@, R {<reg>|<flag>} <value>
R display the contents of all of the registers and processor flags.
R@ sets all registers and flags to zero.
R {<reg>|<flag>} <value> sets the specified register or processor flag to the specified value. To
set one of the registers, substitute one of the following for the <reg> parameter: PC, TP, LP,
CT0, CT1, CT2, CT3, TN, RA, WA, RX, RY, PH, PL, ACH, or ACL. The following table
shows how to specify the various processor flags, along with the symbol used to label each flag in the
simulator’s register display.
Specified as Labeled as Definition Specified as Labeled as Definition
PR P Pause reset V V Overflow
EP e Execute pause E E End interrupt
T0 T Transfer 0 (D0 DMA flag) ES s Execute step
S S Sign EX x Execution control
Z Z Zero LE L PC load enable
C C Carry
The SATURN SCU DSP Simulator 3
User's Manual Addendum
Note that version 2.11 of the simulator contains a bug in the implementation of the V flag (see Bugs,
below).
S [<n>]
Execute the specified number of instructions (the default is 1).
U [<prog addr1> [<prog addr2>]]
Disassemble (unassemble) the specified range of program memory. If <prog addr2> is omitted, it
defaults to <prog addr1> + 0xf. The disassembled data is formatted so that the so-called “Opera-
tion Commands” (instructions controlling the ALU, the X-bus, the Y-bus, and the D1-bus) are aligned
in columns according to which subcomponent of the DSP they use. This makes it easier to see which
subcomponents are idle at any given time, which in turn makes it easier to increase parallelism.
V, VM, VS
V displays current emulation mode (Model M or Model S).
VM sets midbox (Model M) emulation mode.
VS sets small box (Model S) emulation mode (the default).
W <ram> <addr1> <addr2> <file>
Write the specified range of memory to a binary or S-record file. File names having the extensions
“.s” or “.mot” will be written as S-record files. Files having other extensions will be written as binary
files. The <ram> parameter specifies the type of memory to be written. Substitute p for program
RAM, m for external RAM, or r0, r1, r2, or r3 for one of the DSP’s four banks of data RAM. The
S-record files produced by this command are UNIX-flavored, i.e. they contain no carriage returns,
only linefeeds, so you may wish to convert them with a utility such as unix2dos.exe.
^ [<n>]
Display the last n entries in the command history (default is 20). The command history buffer holds
the most recent 50 commands.
!!
Repeat the last command.
! <n>
Repeat the nth command in the command history.
Display an on-line command summary.
<enter>
If the last command was S, D, or U (with or without parameters), then pressing <enter> is equiva-
lent to typing S, D, or U without parameters, i.e. it executes the next instruction, or it dumps or
disassembles the next chunk of memory. Otherwise, it does nothing.
4
Notes
Memory addresses and values to be stored in memory must be expressed in hexadecimal. Other
numerical parameters must be expressed in decimal.
Any address parameter may be appended with the letter L, which causes it to be multiplied by four.
This is intended as a convenience in addressing external memory. For example, to move the second
32-bit word (word 1) of program memory to the third 32-bit word (bytes 8 through 11) of external
memory, you could say either M P 1 1 M 8 or M P 1 1 M 2L. For what it’s worth, this notation
can be used with memory data parameters as well.
Commands and parameters may be typed in either upper or lower case.
You can create a batch file of simulator commands that will be executed when the simulator is
launched. Create a text file containing one simulator command per line, then invoke the simulator
with a command of the form dspsim batchfil.
Bugs
Version 2.11 of the simulator contains a bug in the implementation of the V flag, which is used to
detect signed arithmetic overflows caused by the ADD, AD2, and SUB instructions. In the actual
DSP, the V flag is set when addition or subtraction results in a signed arithmetic overflow (e.g. adding
two positive numbers and getting a negative result). If there is no overflow, the V flag is cleared. In
the simulator, the V flag is set whenever the C flag is set as a result of addition or subtraction, and it is
never cleared. To clear it, you must issue the command r v 0.
The SATURN SCU DSP Simulator 5
User's Manual Addendum
TM
SEGA SATURN
SMPC Sample Program
(tentative title)
User's Manual
Ver. 0.56/Edition 0.2
Doc. # ST-214-111594
© 1994-95 SEGA. All Rights Reserved.
REFERENCES
In translating/creating this document, certain technical words and/or phrases were interpreted
with the assistance of the technical literature listed below.
1. Dictionary of Science and Engineering, 350,000 words, 3rd Edition
Inter Press
Tokyo, Japan
1990
2. Computer Dictionary
Kyoritsu Publishing Co., LTD.
Tokyo, Japan
1978
3. IBM Dictionary of Computing
McGraw-Hill, Inc.
New York, New York
1994
SEGA SATURN
SMPC Sample Program
(Tentative Title)
Version 0.56
User’s Manual
Edition 0.2
SATURN SMPC Sample Program 1
Contents
0. Introduction
0.1 Terms Used in This Manual ......................................... 3
0.2 Changes from Version 0.50 ......................................... 3
1. Program Overview ................................................................ 4
1.1 Program Objective ....................................................... 4
1.2 Program Functions ...................................................... 4
2. Main Menu .............................................................................. 5
2.1 Main Menu Screen ...................................................... 5
2.2 Menu Operation........................................................... 5
3. Peripheral Port Monitor ........................................................ 6
3.1 Peripheral Port Monitor Screen ................................... 6
3.2 Sprite Version Operation ............................................. 8
3.3 RBG Version Operation ............................................... 9
4. SMPC Status Display .......................................................... 10
5. Game (Tentative Title) ..........................................................11
6. Paint Tools (Tentative Title) .................................................11
7. SMPC Command Test ......................................................... 12
7.1 SMPC Command Test Screen .................................. 12
7.2 SMPC Command Test Operation .............................. 13
2
0. Introduction
This manual explains the SMPC sample program (tentative title).
0.1 Terms Used in This Manual
The terms used in this manual are explained below.
Peripheral: General term for control pads, joysticks, etc., which are connected
into the port(s) at the front of the Saturn unit and are primarily
used to control characters, etc., in games.
Port: Refers to the connectors on the front of the Saturn unit. Looking at
the front of the Saturn unit, the connector on the left is port 1 and
the connector on the right is port 2.
Port Number: This is 1 or 2 when a peripheral is connected directly to a port. If a
Multi-tap, etc., for expanding the number of ports is connected,
then the numbers are 1-1, 2-3, and etc.
0.2 Changes from Version 0.50
1. Addition of a SMPC command test mode.
Enables issuing of all types of SMPC commands.
2. Expantion of the maximum number of peripherals.
Expands the number of peripherals that can handle from 12 to 30.
3. Addition of the peripherals which are compatible with the port monitor.
Improved compatibility for the clocked serial peripherals.
SATURN SMPC Sample Program 3
1. Program Overview
1.1 Program Objective
The primary purpose of this program is to issue commands to the SMPC, acquire
peripheral data, etc. It enables to check peripherals by using connected peripherals
to move sprites on the screen.
1.2 Program Functions
This program has the following functions (modes).
1. Peripheral port monitor (sprite version).
Monitors information of the peripherals connected to each port. Also moves
sprites on the screen.
2. Peripheral port monitor (RBG (rotation scroll) version).
Monitors peripheral information as well. Moves the scroll screen plane on which
information is displayed.
3. SMPC status display.
Displays the status returned from the SMPC by INTBACK.
4. GAME (tentative title).
Cannot be used for this version.
5. Paint Tools (tentative title).
Enables the drawing of simple figures on screen using the mouse.
6. SMPC Command Test (added in this version).
Issues the various kinds of SMPC commands.
4
2. Main Menu
2.1 Main Menu Screen
The following menu is displayed first once the program is executed.
>PORT MONITOR(SPRITE)
PORT MONITOR(RBG)
SMPC STATUS DISPLAY
GAME
PAINT TOOL
COMMAND TEST
Select the functions to be executed from the menu using the pad.
2.2 Menu Operation
1. The peripherals that can be used in menu operation are either the standard
Saturn pad, the Mega Drive 3-button pad, the Mega Drive 6-button pad, analog
joysticks, steering controllers, or the Saturn keyboard (these are referred to as
“peripherals that are used in menu operation” hereafter).
2. Of the peripherals that are used in menu operations, the peripheral connected to
the port with the smallest number is the one that actually operates menu screens.
The peripherals that are used in screen operations are confirmed in the small
window at the bottom right corner of the screen.
3B PAD Indicates Mega Drive 3-button
P2-1 pad connected to port 2-1.
3. If no peripherals that can be used in menu operation are connected, then a mes-
sage is displayed in the window at the bottom right of the screen indicating that
the unit is waiting for a peripheral to be connected.
NOT This message is displayed when a
READY! peripheral is not connected.
4. If another peripheral that can be used in menu screens is connected, pressing the
peripheral start button permits operation of menus on that peripheral.
5. If a peripheral that is being used to operate menu screens is disconnected when
other peripherals that are used to operate menu screens are still connected, the
control shifts to the peripheral connected to the port with the smallest number.
6. The triangular cursor is moved by pressing the top or bottom of the + key and
selection is made by pressing the A or C button. If the selected menu item cannot
be executed, then “NOT AVAILABLE” is displayed and returns to the menu.
7. To return to the main menu from any menu other than the main menu, press the
C button and START button at the same time on any peripheral that is connected.
Menu operations are then performed by the peripheral on which the C button
and START button were pressed.
SATURN SMPC Sample Program 5
3. Peripheral Port Monitor
The port monitor displays data from the various types of peripherals connected to
the peripheral ports of the Saturn unit. With this version, the maximum number of
peripherals that can be used is 30 (when a clocked serial 15P is connected to both
ports 1 and 2). However, the peripherals displayed on the screen are only the first
seven connected to each of ports 1 and 2.
3.1 Peripheral Port Monitor Screen
The following screen is displayed when “PORT MONITOR(SPRITE)” or “PORT
MONITOR(RBG)” is selected from the main menu.
PORT 1 : DIRECT (F1)
• SATURN PAD (02) FF FF
PORT 2 : SEGA TAP (04)
• 1 MD 3B PAD (E2) FF
• 2 MD 6B PAD (E3) FF FF
3 ----------------------- (FF)
• 4 SEGA MOUSE (E3) 00 00 00
1994/01/01 [SAT] ML VI VO PD S TO MENU
00:00:30 23 10 10 15 2 (C) SEGA '94
Port Monitor Screen
1. Port Status Display Area
Displays the status of each of ports 1 and 2.
Display (Port Status) Status
UNKNOWN OR NO DEVICE(F0) Nothing is connected or a device that SMPC does not
recognize is connected.
DIRECT(F1) Peripheral is connected directly.
MULTI-TERMINAL 6(16) Multi-Terminal 6 is connected.
SEGA TAP(04) SEGA Tap is connected.
CLOCKED SERIAL (21-2F) Clocked serial peripheral is connected.
ILLEGAL PORT ID(xx) Displayed when the correct port status cannot be
obtained for some reason. This may also be displayed
when some non-compatible peripherals are connected.
"xx" will change depending on the status.
6
2. Peripheral Name Display Area
Displays the types and ID of connected peripherals. When multi-terminal 6 or
SEGA tap is connected, a number is affixed at the beginning of the peripheral
name.
Display (Saturn ID) Peripheral
------------------------------- (FF) Nothing is connected or a device that SMPC does not
identify is connected.
SATURN PAD (02) Saturn standard pad
ANALOG STICK (15) Analog joy stick
KEY BOARD (14) Saturn keyboard
STEERING CTRL (13) Steering controller
MD 3B PAD (E1) Mega Drive 3-button pad
MD 6B PAD (E2) Mega Drive 6-button pad
SEGA MOUSE (E3) SEGA mouse
Peripherals not listed in the above table are not compatible with this version.
3. Peripheral Data Display Area
Displays data returned by peripherals. Refer to the SMPC manual for the details
of the peripheral data.
4. Time Display Area
Displays the date and time based on the real-time clock of the SMPC.
5. Program Status Area
Displays the main loop count and V-blank IN/OUT interrupt count in a 2-digit
hexadecimal number, and the total number of bytes of peripheral data and the
SMPC interrupt count in decimal number.
Display (Meaning) Description
ML (main loop count) (00H-FFH) Counts up using the main loop of the program.
VI/VO (V-blank IN/OUT interrupt Counts up using the V-blank interrupt function (a 16
count) (00H-FFH) dividing value is displayed).
PD (the total number of bytes of Displays the total number of bytes in the peripheral
peripheral data) (02–) data (includes for the port ID 2 bytes).
SM (SMPC interrupt count) (1–) Displays the number of times the SMPC interrupt
occures in 1/60th of a second; normally 2 to 3 times.
SATURN SMPC Sample Program 7
3.2 Sprite Version Operation
In the sprite version, sprites on the screen can be moved by all connected peripherals.
A ball-shaped sprite is assigned to each peripheral. The peripheral connected to port 1
is red and the peripheral connected to port 2 is blue. When peripherals are connected
to SEGA tap or Multi-tap 6, the numbers are assigned to the balls. Therefore, the color
and the number of the ball indicate which peripheral port number is used to operate
the ball.
Peripheral Operation
Saturn standard pad + key Ball movement
Mega Drive 3-button pad A button Quadruple-speed while depressed
Mega Drive 6-button pad X button Toggles between variable and fixed enlargement
modes
Y button Enlargement
Z button Reduction
Start Moves to initial position and changes to fixed mode
Analog joy stick Joy stick Moves (digital, analog)
A button Quadruple-speed while depressed (only during
digital movement)
B button Digital movement while depressed
X button Toggles between variable and fixed enlargement
modes
Throttle Enlarges and reduces ball
Start Moves to initial position and changes to fixed mode
SEGA mouse Move Moves ball
Left click Enlarges ball horizontally by two times
Right click Enlarges ball vertically by two times
Start Moves to initial position
Steering controller Steering Moves ball left and right (digital, analog)
Shift lever Moves ball up and down
A button Quadruple-speed while depressed (only during
digital movement)
B button Digital movement while depressed
X button Toggles between variable and fixed enlargement
modes
Y button Enlargement
Z button Reduction
Start Moves to initial position and changes to fixed mode
Saturn keyboard Cursor keys Moves ball
Z key Quadruple-speed while depressed
A key Toggles between variable and fixed enlargement
modes
S key Enlargement
D key Reduction
ESC key Moves to initial position and changes to fixed mode
Variable/Fixed Enlargement Modes
In the variable enlargement ratio mode, the ball can be enlarged or reduced by using
the Enlarge/Reduce button. In the enlargement ratio fixed mode, the ball size is fixed
at 16 x 16 pixels.
8
3.3 RBG Version Operation
The RBG version of the port monitor is basically the same as the sprite version; the
data display screen is operated by the peripheral and not by the sprite.
The peripherals that operates in the RBG version are the peripherals used in the
menu screen. The operating method is shown in the table below.
Button Function
+ key Scrolls the screen up and down, and left and right
A button Enlarges the screen
B button Reduces the screen
C button Not used
X button Not used
Y button Not used
Z button Not used
L button Not used
R button Not used
START Returns the screen to its initial status
SATURN SMPC Sample Program 9
4. SMPC Status Display
Displays OREG0-15, i.e., SMPC status, in hexadecimal or binary. See the SMPC
manual for details on OREG.
No particular operations are performed in the SMPC STATUS DISPLAY. Return to
the main menu by simultaneously pressing the C button and START button on a
peripheral that can be used to operate menus.
00 (00:00000000) STE/RESD
01 (19:00011001) YEAR H
02 (94:10010100) YEAR L
03 (61:01100001)) WEEKDAY/MONTH
04 (11:00010001)) DAY
05 (01:00000001)) HOUR
06 (34:00110100) MINUTE
07 (28:00101000) SECOND
08 (03:00000011) CART CODE
09 (0F:00001111) AREA CODE
10 (2F:00101111) SYSTEM STATUS 1
11 (40:01000000) SYSTEM STATUS 2
12 (00:00000000) SMEM1 DATA
13 (00:00000000) SMEM2 DATA
14 (00:00000000) SMEM3 DATA
15 (00:00000000) SMEM4 DATA
1994/01/01 [SAT] ML VI VO PD S TO MENU
01:34:28 00 00 00 10 2 (C) SEGA 94
10
5. Game (Tentative Title)
Cannot be used in this version.
6. Paint Tools (Tentative Title)
Paint tools allows the drawing of points, lines and circles on the screen with the
mouse. The following three functions are used in this version; curved lines (upper
left icon), straight lines (adjacent icon) and boxes (icon below the free-hand icon).
Use the left button on the mouse to select an icon. There is no action when icons
other than above are selected.
Free Curved-Line Tool
Draws a curved line by moving the mouse while holding down the left button.
Straight-Line Tool
Click the left mouse button where the line is to be started and click it again
where the line to be end. When a line is drawn, the end point becomes the
starting point of the next line, thus allowing line to be drawn continuously.
Box Tool
As with the straight-line tool, use the mouse to set the starting and ending
corners of rectangles. To draw boxes continuously, begin with the starting
corner again.
Always connect the mouse to be used for the paint tools to port 1-1.
To return to the menu, press the C button and START button simultaneously on
a peripheral other than the mouse.
SATURN SMPC Sample Program 11
7. SMPC Command Test
Of the 16 different commands, 14 (other than clock check) can be issued for the SMPC.
7.1 SMPC Command Test Screen
00 (80:10000000)
>MSHON SYSRES 01 (19:00011001)
02 (94:10010100)
SSHON SSHOFF 03 (00:10000000)
04 (61:01100001)
SNDON SNDOFF
05 (11:00000000)
CDON CDOFF 06 (01:00010000)
07 (34:00110100)
CKCHG352 CKCHG320 08 (28:00101000)
09 (03:00000011)
RESENAB RESDISA 10 (0F:00001111)
11 (2F:00101111)
NMIREQ INTBACK 12 (00:00000000)
13 (00:00000000)
SETSMEM SETTIME 14 (00:00000000)
15 (00:00000000)
MASTER SH2' ON 00
1994/01/01 [SAT] ML VI VO PD S TO MENU
01:34:28 00 00 00 10 2 (C) SEGA 94
SMPC Command Test Screen
1. Command Menu
A list of the commands issued to the SMPC is displayed here. Select the command
to be issue from them.
2. SMPC Status Area
The SMPC status after issuing the command is displayed. Refer to the SMPC
manual for more information on status.
3. Command Name/Code Display Area
The command name and command code of the current cursor position is displayed
here.
12
7.2 SMPC Command Test Operation
The command test operation is nearly the same as that of the main menu. Select a
command using the + key and enter it using the A or C button.
Press the B button to return to the main menu. Do not press the C and START but-
tons at the same time.
• SETSMEM and SETTIME commands
When these commands are selected, a small window will open for input of a 4-
byte memory value or time and date to be input. Use the left and right arrows to
move the cursor and the up and down arrows to increase or decrease a value.
Input with the A or C buttons and cancel with the B button. Invalid dates or
times can be set as well.
• CLKCHG352, CLKCHG320 and INTBACK commands
No command is issued when any of these commands are selected.
SATURN SMPC Sample Program 13
TM
SATURN CartDev
Rev. B
Hardware Installation
Guide
Doc. # CART-08-030195
© 1994 SEGA. All Rights Reserved.
Saturn CartDev Rev
. B Hardware Installation Guide
Configuration 1
1. Install SCSI board into computer.
2. Connect SCSI cable to SCSI connector on CartDev rear panel
and SCSI connector on SCSI board.
3. Connect Saturn NMI cable to CartDev Saturn
Control Interface connector (rear panel).
4. Connect CartDev interface cable to Saturn unit.
SCSI Board
5. Plug in 5V power supply cable to CartDev.
6. Plug in Saturn AC power cable and CartDev
power supply cable to outlets. Development PC
7. See page 4 for switch settings and power on
sequence.
8. See page 5 for verifying proper CartDev SCSI Cable
installation and configuration.
Interface Cable
Saturn Core Unit
TM
AC Power
SEGA CartDev Cable
5V Power
Supply/Cable
Figure 1
Saturn NMI Cable
Saturn CartDev Rev
. B Hardware Installation Guide Page 1
1. A Programming Box NMI cable may not have been delivered with Configuration 2
the CartDev system. It can be identified by a 7-pin connector and
a grounding lug on the end of the cable that connects to the Programming
Box. Call Sega Technical Support if you plan to use CartDev with a
Programming Box and do not have a Programming Box NMI cable.
2. Install SCSI board into computer.
3. Connect SCSI cable to SCSI connector
on CartDev rear panel and SCSI connector on SCSI board.
4. Connect Programming Box NMI cable to Saturn Programming Box
(see page 3 for NMI cable connection instructions)
5. Connect Programming Box NMI cable to CartDev Saturn
Control Interface connector (rear panel).
6. Connect CartDev interface cable to Saturn
Programming Box.
7. Plug in 5V power supply cable to CartDev. SCSI Board
8. Plug in Saturn Programming Box AC power cable
and CartDev power supply cable to outlets. Development PC
9. See page 4 for switch settings and
SCSI Cable
power on sequence.
10. See page 5 for verifying proper
CartDev installation and configuration.
AC Power
Cable
Seepage
See page 43 for
for NMI
NMI
cableconnection
cable connection
instructions
instructions
Interface Cable
SegaSaturn Programming Box
TM
Programming Box
NMI Cable
SegaCartDev 5V Power
Supply/Cable
Figure 2
Saturn CartDev Rev
. B Hardware Installation Guide Page 2
Programming Box NMI Cable Connection Instructions
1. Remove the two screws from Programming Box rear panel.
2. Remove the two screws from Programming Box side panels and remove lid.
3. Plug Programming Box NMI cable into connector CN8 on the Programming Box motherboard.
4. Use the nut provided with the Programming Box NMI cable to attach grounding lug to the
Programming Box CD mounting screw directly above connector CN8.
1 2
Figure 3
Figure 4
3
Connector CN8
NMI Cable
SegaSaturn Programming Box
Figure 5
Saturn CartDev Rev
. B Hardware Installation Guide Page 3
CartDev Saturn Panels
TM
SATURN CARTDEV REV. B
Front RESET
STATUS
1
POWER
1
DC IN
+9.2V/1.2A
SCSI TERM SATURN CONTROL
SCSI INTERFACE AUX
Back -GND ID 1
Figure 6
Switch Settings and Power On Sequence
1. Set the SCSI ID rotary switch to an open ID (as defined by the existing configuration of the
development PC) between #2 and #6.
2. Set the TERM (SCSI termination) switch to 1 (on) if CartDev is at the end of the SCSI chain.
3. Turn the CartDev POWER switch on.
4. Both STATUS LEDs will be on for a brief period and then LED 0 will blink. LED 1 will be on
during SCSI transactions.
5. Power the Saturn (or Programming Box).
WARNING: Powering the Saturn (or Programming Box) prior to
powering CartDev may damage CartDev or Saturn (or
Programming Box).
6. Turn Saturn (or Programming Box) power off prior to turning CartDev power off.
Saturn CartDev Rev
. B Hardware Installation Guide Page 4
CartDev Installation V
erification
1. Install the CONFTEST disk shipped with the CartDev.
2. Change the PC directory to the drive containing the CONFTEST disk.
3. Type CONFTEST and then press ENTER. The Saturn CartDev Confidence Test software will load
and run.
4. Press ENTER for help in using the Confidence Test software.
5. Type "1" from the menu to execute the Installation Tests. If an error occurs, then follow the dis-
played corrective action steps and re-run CONFTEST. If error(s) still persist, then run CONFTEST
and type "2" to display the CartDev hardware and software version numbers. Call Sega Technical
Support and request additional help.
6. If the Installation Tests passed, then type "3" from the menu to execute a Continuous Loopback test.
Allow the test to run for five minutes to verify the reliability of the Host-to-CartDev interface. Press
ESC to end the test. If an error occurs, then follow any displayed corrective action steps and re-run
the test. Call Sega Technical Support and request additional help if an error persists.
7. If the Installation Tests and Continuous Loopback test both passed, then the CartDev Installation
Verification is complete.
8. Menu item 4 provides a way to install new CartDev firmware if required. Do not use this feature
unless instructed to do so by Sega.
Saturn CartDev Rev
. B Hardware Installation Guide Page 5
SEGA SATURN TECHNICAL BULLETIN #1
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: Saturn CD Drive Duty Ratio Restrictions
When developing CD-ROM software for the Saturn, note the following restriction:
The duty ratio of the Saturn CD drive must be 33% or less after approximately
10 minutes.
This restriction is due to a CD drive limitation.
• Duty Ratio Definition: Duty ratio = [seek time/(seek time + nonseek time)] x 100
Note: Nonseek time refers to the time used for operations other than seek (such as play
or pause).
SEGA SATURN TECHNICAL BULLETIN #2
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: Preemphasis Prohibited
The use of "preemphasis" is strictly prohibited, regardless of whether an SCSP is used.
(Mandatory)
Reason:
In the Saturn, the digital-to-analog converter (DAC) at the final level controls the emphasis.
Therefore, when a preemphasized CD-DA is played, the sound output from the SCSP is
also deemphasized.
SEGA SATURN TECHNICAL BULLETIN #3
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1994
Re: Information Regarding CD Burning
1. If any hardware and/or software other than those listed below are needed, approval
from Sega must be acquired first. Materials related to the approval process will be
distributed at a later date.
• Write-once writer
- Yamaha CD Expert CDE 100
• Write-once writing software
- SEGACDW. EXE
• Media
- Sega private media: Model number CDM12PS71 (with Sega Saturn logo)
- Sega MEGA CD-R 1.25 m/s (blue-labeled disc with Sega logo for MEGA-CD)
WARNING: MEGA CD-R cannot be used for quadruple-speed write
operation.
Note: The product names and model numbers provided above are those sold by the
distributors.
2. The following is a sample Script file for building a write-once SEGA Saturn CD.
Please note that the first file in the script MUST be named 0.
Disc SAMPLE.DSK
CatalogNo 0
Session CDROM
LeadIn MODE1
EndLeadIn
SystemArea IP.BIN
Track MODE1
Volume ISO9660 SAMPLE.PVD
PrimaryVolume 0:2:16
EndPrimaryVolume
EndVolume
File 0
File A.BIN
FileSource TEST.BIN
EndFileSource
EndFile
File SDDRVS.TSK
FileSource SDDRVS.TSK
EndFileSource
EndFile
File NEWMAP.TSK
FileSource NEWMAP.TSK
EndFileSource
EndFile
Directory SMPD101
File SMP001.DAT
FileSource SMP101.DAT
EndFileSource
EndFile
File SMP002.DAT
FileSource SMP002.DAT
EndFileSource
EndFile
EndDirectory
Directory SMPD102
File SMP003.DAT
FileSource SMP003.DAT
EndFileSource
EndFile
EndDirectory
PostGap 300
EndTrack
Track CDDA
Pause 150
File CDDA1
FileSource SND8_1.DAT
EndFileSOurce
EndFile
EndTrack
Track CDDA
File CDDA2
FileSource SND8_3.DAT
EndFileSource
EndFile
EndTrack
LeadOut CDDA
Empty 300
EndLeadOut
EndSession
EndDisc
SEGA SATURN TECHNICAL BULLETIN #4
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: Saturn Software Development Standards
SEGA Saturn Software Development Standard (Ver1.10 10/18/94 version) / ST-151-R3-
SB-102794 is available.
What is Software Development Standard?
Software Development Standard is a document that covers the standard for
achieving consistency in Saturn games of SEGA brand. The contents of the document must
be understood, before game development starts. Please note that the games in which
standardized items are not adhered to, cannot be released.
SEGA SATURN TECHNICAL BULLETIN #5
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: Error Checking for Data Errors
When creating a CD-ROM for Saturn, always execute a read retry to ensure that there are
no data errors. (Mandatory)
Explanation:
Although CD-ROMs have a high error correction ability, uncorrectable errors may occur
due to drive deterioration, scratches or dust on the disc, or an eccentric disc.
Therefore to ensure that there are no data errors, in addition to implementing the "method
for increasing the ECC count," always execute a read retry.
However, note that executing a retry during debugging may obscure error causes.
SEGA SATURN TECHNICAL BULLETIN #6
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: Saturn System Functions
The following table lists system libraries and object files for security codes and area code
groups that are provided by SEGA. Use these files without any modifications when
accessing resources for the items listed in the table.
Item Corresponding library Corresponding function
Creating a vector table System program Registration and referencing of
the interrupt processing routine
Accessing a SCU interrupt mask System program Setting, referencing, and
register modification of the SCU
interrupt mask
Using a simple semaphore System program Simple semaphore operation
Switching the system clock System program System clock switching
Modifying the priority of the SCU System program Priority modification of the
interrupt routine SCU interrupt routine
Starting the CD multiplayer System program Execution of CD multiplayer
activation
Operating the power-on clear memory System program Power-on clear memory
function operation
Accessing the SMPC SMPC interface –
Accessing a backup (main unit, Backup library –
cartridge, and serial)
Accessing a CD block CD communication –
interface
Registering security code or area code • Security codes –
groups • Area code groups
• For details on each function, see the "Disc Format Standard Specification V.1.0 (ST-
040-R3-011805, 12/94)" and the "Saturn System Library User's Manual Version 1.0
(ST-162-R1-092994)" in the "Programmer's Guide Volume 1."
SEGA SATURN TECHNICAL BULLETIN #7
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: Saturn Disc Format Specification Change
The standard specifications for the Sega Saturn disc format will be changed as follows:
Target: Disc Format Standard Standard Specification Version 0.9
1. Recording range in program area
ABS TIME LSN FAD
First frame 00:00:00 - 0
First sector 00:02:00 0 150
Last sector 63:01:74 283500 283650
Last frame 63:03:74 - 283800
Read out area start 63:04:00
time
• The first frame and first sector must be the times shown above. The last sector and
last frame must the times shown above or smaller values.
2. The following figure is an image of the tracks when the data track is maximized
(audio track is minimized).
Lead-in Lead-out
TNO 00 01 02 AA
X 00 01 00 01 01
A/D Data Data Audio Audio
TIME
63:04:00
00:02:00 63:00:00
(first sector) 62:58:00
00:00:00 62:56:00 (start of post gap)
• The portion of the track that can actually be used as the data sector is from the first
sector to one sector before the start of the post gap (approximately 566 megabytes).
For each minute that the audio track usage time increases, the data sector decreases
by 9 megabytes.
SEGA SATURN TECHNICAL BULLETIN #8
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: CD Communication Interface Update
This Saturn technical bulletin is an update to the Saturn “CD Communication Interface User’s
Manual Version 0.9 “, which can be found in the “System Library User’s Guide (ST-162-
060294).”
CD Communication Interface: Supplemental Material
♦ Errata
Page Location Error Correction
41–42 Figures 5.1, MPEG buffer MPG sector buffer
5.2
44 Figure 5.5 ∑ Np ∑ Np
p=20 p=0
77 No. 1.5 WAIT results in <OPEN> or WAIT is returned during TOC
No. 1.6 <NODISC> status. read. In <OPEN> or <NODISC>
status, all information that can be
obtained becomes FFFFFFFFH.
78 No. 1.7 Standby time (lower 8 bits) Standby time (lower 16 bits)
82 No. 2.1 (3) Move the pickup */ Do not move the pickup */
85 No. 3.2 Subcode flag (lower bit) Subcode flag (lower 8 bits)
94 No. 6.6 (3) Becomes CDC_SOPS_END. Becomes CDC_SPOS_END.
100 No. 8.4 CdcFile file[256] CdcFile file[254];
Example
• Page 35, Figure 4.2
• Page 42, Figure 5.2
• Page 51, Figure 6.2
♦ Modifications
Page Modification description
31 The description in "3.3 (3) Periodic response" was corrected and supplemented.
37–38 The contents of "4.2 CD Drive Operation" were modified.
39 In "4.3 Subcodes," the figure number was changed from Figure 4.4 to Figure 4.5.
63 The return code (CdcRet) of the CD communication function was discontinued.
63 Error code CDC_ERR_PTYPE was discontinued.
78–79 The specifications for the CD block initialization function (CDC_CdInit) were
changed.
83 A remark was added for the play position seek function (CDC_CdSeek).
100 The specifications of the get function for hold file information (CDC_GetFileScope)
were modified.
102 The specifications of the get function for the data transfer register pointer
(CDC_GetDataPtr) were changed.
103 The specifications of the get function for the MPEG register pointer
(CDC_GetMpegPtr) were changed.
• Page 31
(3) Periodic response
The periodic response is the response that the CD block returns based on the CD drive
communication timing. This response allows the host to obtain information (status and CD report)
without issuing a command.
The communication cycle with the CD drive is updated periodically. (The update timing for the
SCDQ flag is the same.)
• Standard-speed play: 13.3 ms
Update cycle for the periodic response • Double-speed play: 6.7 ms
• Other: 16.7 ms or less
The periodic response is not updated during command or response processing. After a response is
read by a command, the response is updated at the next CD drive communication timing and can be
obtained.
[Note]
The update cycles shown here for the scheduled response (SCDQ flag) are the normal values. The
update cycles may increase depending on the CD drive and other communication conditions (for
example if communication with the CD drive fails because of disc scratches).
• Pages 37 to 38
4.2 CD Drive Operation
(1) Frame address for <PLAY> status
The frame address (current FAD) reported during CD play indicates the sector being read. The
sector of the current FAD is not yet stored in the CD buffer and cannot be fetched. The host can
access the sector immediately preceding the current FAD (for a CD-ROM).
Figure 4.3 Sector indicated by the current FAD
After play ends, the FAD becomes the "end position + 1." (If the end position is disc end, the
same processing occurs and the FAD points to the lead-out area.)
(2) Transition from <PLAY> status and sector storage
When the status is switched from <PLAY> to another status, whether the sector being read is
stored is undefined. If the status is switched to a status other than <BUSY>, the sector that should
be stored is fixed.
At <PLAY> status, issue the PAUSE command. When the status switches to <PAUSE>, the
FAD indicated by the "storage sector + 1" is reported.
(3) Repeat processing in CD play operation
As described below, repeat processing takes place when the current position moves out of the play
range during CD play.
• After the end position frame is played (FAD = end position + 1)
• If the FAD ends up outside the play range after the play range is changed
• If pause release (play restart) is executed while the pause is outside the play area
Both the repeat notification count (0H to EH) and the maximum specification count (OH to FH) are
displayed with 4 bits. The repeat processing sequence (repeat processing determination) is as
follows:
(a) If the repeat count is less than the maximum repeat count, repeat is performed. The CD
drive seeks the start position and switches to <PLAY> status. If the repeat count is less than EH
(14), the repeat count is incremented by 1.
(b) If the repeat count is greater than or equal to the maximum repeat count, repeat is not
performed. The <PAUSE> status occurs at the current position, and the PEND flat of the interrupt
cause register becomes 1.
If the play range or maximum repeat count is changed, the repeat count is cleared to 0. Both the
repeat count and the play range are not affected by tray opening/closing or a seek operation during
play.
(4) Play range and frame address
If the user executes CD play without moving the pickup, operation switches to <PLAY> status is
the current position is within the new play range. If the user executes CD play during <PLAY>,
operation remains in <PLAY> status.
Figure 4.4 Relationship between play range and current position
The FAD moves outside the play range (FAD < start position, FAD > end position) when the
following operations are performed:
• When play end, play range modification, seek, or scan play is executed
• When pause release is executed while the pause is outside the play area
The operation outside the play range depends on whether or not there is a repeat.
For example, if play ends without a repeat, operations switches to <PAUSE> status at "FAD=end
position + 1," and the PEND rank switches to 1.
Table 4.5 Operation outside the play range
Operation (command) No repeat With repeat
Status PEN Status PEN
D D
End of CD play <PAUSE> at 1 Seek to start position, then 0
FAD = end position +1 <PLAY>
CD play (play range <PAUSE> at current (repeat operation)
modification, pause position
release)
Seek <PAUSE> at target 1 <PAUSE> at target 0
position position
Scan play <PAUSE> at any position 1 <PAUSE> at any position 0
A PEND flag value of 0 indicates no change.
(5) Seek to home position (stop)
When seek to home position is executed, the status of the CD block switches as follows:
(a) Rotation of the disc motor stops, and the pickup moves to the inside wait position.
(b) The CD drive status switches to <STANDBY>, and the report becomes a meaningless
value (string of FFH values).
(c) When the status switches from home position <STANDBY> to <PAUSE>, the pickup
moves to the beginning of the disc.
(d) The play range, maximum repeat count, and repeat notification count values being held do
not change.
(6) Pickup position in <STANDBY> status
• Transition from <PAUSE> status: Current position (report also remains the same)
• Seek to home position: Inside wait position (report is a meaningless value)
(7) CD read operation when the CD buffer is full
If the CD buffer becomes full, the operation status switches to <PAUSE>, and the BFUL flag in
the interrupt flag register becomes 1.
• Page 63: Function specification
The data-type CD communication return code (CdcRet) will be discontinued. Delete the contents
for (1) and (3) in Section 7.2.6. The error codes remain.
This modification changes the function specifications. The function value CdcRet becomes Sint32
and returns an error code. If the status is necessary when the command is issued, use the
"previous CD status information retrieval" function (CDC_GetLastStat).
The CDC_ERR_PTYPE error code will be discontinued.
<Program Corrections>
Implement the following corrections:
Before correction After correction
CdcRet ret; Sint32 ret;
CDC_RET_ERR(ret) ret
CDC_RET_STATUS(ret) CdcStat stat;
Execute CDC_GetLastStat(&stat);
and reference
CDC_STAT_STATUS(&stat).
• Page 78: (1) Initialization flag modification
[NOTE]
The standard speed for the CD-ROM data read speed cannot be specified.
• Page 78: (2) Standby time modification
Setting Explanation
0000H 180 seconds: Initial value
003CH– 0384H Transition time (second units): 60 seconds to 900 seconds (15 minutes)
FFFFH This setting should not be changed.
• Page 79: Remark addition
To execute a software reset, wait about 1 millisecond and then issue a command within the
CDC_CdInit function.
• Page 83: Remark addition
If the stop command is used when CD play ends, access becomes slower when the CD is
reaccessed. As long as access to the CD continues, normally use the pause command.
• Page 100
Title Function Function Name [S-] No.
Function Gets the scope of the file information being CDC_GetFileScope 8.3
specification held
[Format] Sint32 CDC_GetFileScope(Sint32 *fid, Sint32 *infnum, Bool *drend)
[Input] None
[Output] fid: Identifier of first file being held
infnum: Number of file information items being held
drend: Last directory record hold flag
[Function value] Returns an error code.
[Function]
Returns the scope of the file information being held in the current CD block.
(1) Last directory record hold flag
This flag reports that the scope of the file information being held includes the last directory record
in the directory block. This flag can be used to determine whether there are subsequent directory
records.
Constant name Explanation
TRUE The current CD block contains the last directory record.
FALSE The current CD block does not contain the last directory record.
[Remark]
Because a file always has its own directory and a parent directory, these two directories are not
included in the file information count.
• Page 102
Title Function Function Name [--] No.
Function Gets the data transfer register pointer CDC_GetDataPtr 9.1
specification
[Format] Uint32 *CDC_GetDataPtr(void)
[Input] None
[Output] None
[Function value] Register pointer (address value)
[Function]
Gets the pointer to the data transfer register (DATATRNS).
(1) Access methods
The CD communication interface provides three data transfer methods for the data transfer register
and the MPEG register:
• DMA transfer by the SCU • DMA transfer by the CPU • Software transfer by the CPU
In DMA transfer and software transfer by the CPU, the registers must be accessed in long word
(32 bits) units. In other words, the transfer data is arranged in long word (even-number of words)
units.
Data accessed in long word units is stored in upper word-lower word sequence. When an odd-
number of words are transferred, the last work of the last long word access is undefined.
• Page 103
Title Function Function Name [--] No.
Function Gets the MPEG register pointer CDC_GetMpegPtr 9.6
specification
[Format] Uint32 *CDC_GetMpegPtr(void)
[Input] None
[Output] None
[Function value] Register pointer (address value)
[Function]
Gets the pointer to the MPEG register (MPEGRGB).
The access methods for the MPEG register are the same as for the data transfer register. For notes
on this function, see the notes for getting the data transfer register pointer.
SEGA SATURN TECHNICAL BULLETIN #9
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: Size Value for Saturn Memory Manager
The size value displayed in the SEGA Saturn Memory Manager must be calculated in the
following manner:
(1) Formula for deriving the “Size” value:
Value = ( [number of bytes used ] + 32) / 64)
The resulting value is rounded up to the nearest whole number.
(2) Unit name for the “Size” value:
Although there is no name given for the “Size” value shown in the Memory Manager,
ALWAYS use the term “block” as the unit of measure when referring to this value within
an application.
(3) Important !
The size of a file stored in a SEGA Saturn storage device varies depending on the device
type (such as the internal backup RAM, backup RAM cartridge, and other memory
expansion peripherals such as the SEGA Saturn floppy disc drive). Because of this, there
will be cases when the “Size” value that was increased and the “Memory Available” value
that was decreased do not match. That is, the total sum of the “Size” values and the
“Memory Available” value do not match with the total available memory size.
SEGA SATURN TECHNICAL BULLETIN #1 0
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: SCU Specification Changes
Attached is the "SCU Specification Changes/Notes (Ver. 1)."
This material describes restrictions and notes that results from changes to the SCU
specifications. Be sure to read this material as it contains important information.
Note
This material supplements the "SCU User's Manual /Ver. 2(ST-097-R3-052594)" in the
"Hardware Manual Volume 1," which you should already have. Please file this material
together with that manual.
SEGASATURN
SCU SPECIFICATION CHANGES/NOTES
Ver. 1
October 16, 1994
Technical Support
Sega Enterprises, Ltd.
0. Preface
This document describes specification changes and notes related to the SCU of SEGA
SATURN. This information is not included in the current distribution of the "SCU User's
Manual /Ver. 2(ST-097-R3-052594)." Therefore be sure to compare the contents of the
current manual with the information presented in this document, and note the changes.
[Modification History]
4/07/1994 Preliminary version
5/24/1994 2nd preliminary version (Addition of No. 35 and No. 36)
6/14/1994 Version 1 (Correction of No. 35 and No. 36)
1. List of Latest SCU Specifications
No. 01 A-bus write prohibited for SCU-DMA
No. 02 VDP2 area read prohibited for SCU-DMA
No. 03 Write access to VDP1 register restricted to word (2-byte) units
No. 04 WORKRAM-L usage from SCU disabled (Note)
No. 05 Required use of cache-through addresses for access to SCU registers
No. 06 Read and write of unused areas (such as address 25FE00ACH) are prohibited
No. 07 Write to interrupt status register (25FE00A4H) is prohibited
No. 08 A-bus and B-bus access from CPU prohibited during DMA operation of A-bus B-
bus
No. 09 Setting prohibited for A-bus advance read enable bit
No. 10 Address change for A-bus interrupt acknowledge register (address 25FE00A8H)
No. 11 Restriction on write to A-bus setting registers (addresses 25FE00B0H and
25FE00B4H)
No. 12 Activation of A-bus B-bus from SCU-DMA on standby during CPU write to A-bus
or B-bus
No. 13 Deletion of DMA status register (addresses 25FE0070H to 25FE007CH)
No. 14 Deletion of DMA forced termination register (address 25FE0060H)
No. 15 Read of transfer byte count in DMA transfer register prohibited
No. 16 Restriction on read address addition value for DMA based on access address
No. 17 Value of address addition value bit when read address update bit is set in DMA
No. 18 Restriction on write address addition value in DMA based on access address
No. 19 Value of address addition value bit when write address update bit is set in DMA
No. 20 Concurrent use of two channels in DMA
No. 21 Specification changes to DMA activation method
No. 22 Specifications for DMA activation triggers that occur during DMA execution
No. 23 Write to register of corresponding level is prohibited DMA activation
No. 24 Nonoccurrence of illegal DMA interrupt during DMA execution in indirect mode
No. 25 Specification changes for DMA indirect mode table
No. 26 Clearing the program termination interrupt flag at DSP activation
No. 27 Restriction on address addition value during DSP DMA instruction transfer from B-
bus to DSP data RAM
No. 28 Delay in DMA activation startup if break is executed during debugging with ICE
No. 29 BREQ enabled status necessary when debugging with ICE
No. 30 Notes on using the timer 0 compare register (address 25FE0090H)
No. 31 Notes on using the timer 1 set data register (address 25FE0094EH)
No. 32 Notes on read access of A-bus and B-bus areas (2000000H to 5FFFFFFH)
No. 33 Initial value of A-bus refresh at power on reset (address 25FE00B8H)
No. 34 Initial value of SDRAM selection bit (address 25FE00C4H)
No. 35 Prohibition of DMA level 2 activation during DMA level 1 execution
No. 36 Notes on reading the DSP program control port (address 25FE0080H)
2. Latest Specification Reference List by SCU Item
1 Items related to the entire DMA
Item No. 01 02 04 08 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 35
2 Items specific to the DMA indirect mode
Item No. 24 25
3 Items related to DSP
Item No. 16 20 26 27 36
4 Items related to the external area (A-bus)
Item No. 01 08 09 10 11 12 17 18 19 32
5 Items related to the B-bus (VDP1, VDP2, and SCSP) areas
Item No. 02 03 08 12 17 18 19 32
6 Items related to interrupts
Item No. 07 30 31
7 Specification changes for SCU registers
Item No. 07 09 10 11 13 14 15 23 24
8 Items related to debugging
Item No. 28 29
3. Latest SCU Specifications
No. 01 A-bus write prohibited for SCU-DMA
The SCU-DMA cannot be used to write to the A-bus
No. 02 VDP2 area read prohibited for SCU-DMA
The SCU-DMA cannot be used to read from the VDP2 area.
No. 03 Write-access to VDP1 register restricted to word (2-byte) units
Execute write-access to the VDP1 register in word (2-byte) units. Access in long word (4-
byte) and byte units is prohibited.
Read-access to VDP1 can be performed in byte or long word units.
No. 04 WORKRAM-L usage from SCU disabled (Note)
The only WORKRAM that the SCU-DMA can use is WORKRAM-H (SDRAM: 1
megabyte). The SCU-DMA cannot use WORKRAM-L (DRAM: 1 megabyte).
No. 05 Required use of cache-through addresses for access to SCU registers
When accessing SCU registers, always use cache-through addresses. If cache addresses
are used, a read-prohibited register may be accessed because the CPU operates as follows
when the cache is full:
• When data at address 0H is read with a cache address
Address 4H read → address 8H read → address CH read → address 0H read → cache
registration
• When data at address 4H is read with a cache address
Address 8H read → address CH read → address 0H read → address 4H read → cache
registration
• When data at address 8H is read with a cache address
Address CH read → address 0H read → address 4H read → address 8H read → cache
registration
• When data at address CH is read with a cache address
Address 0H read → address 4H read → address 8H read → address CH read → cache
registration
No. 06 Read and write of unused areas (such as address 25FE00ACH) are prohibited
Read and write to unused areas are prohibited. Read and write are prohibited especially for
address 25FE00ACH.
No. 07 Write to interrupt status register (25FE00A4H) is prohibited
When data is written to the interrupt status register, the bit that should be raised to indicate
an error occurrence is sometimes not raised. For this reason, write to the interrupt status
register is prohibited.
No. 08 A-bus and B-bus access from CPU prohibited during DMA operation of A-bus B-
bus
Access to the A-bus and B-bus from the CPU is prohibited during DMA operation of the
B-bus from the A-bus or DMA operation of the A-bus from the B-bus. The reason is that
the system may hang during wait state even when SDRAM refresh does not occur.
No. 09 Setting prohibited for A-bus advance read enable bit
The A-bus advance read function was deleted. Set the following register bits, which are
described in Ver. 2 (5/31/94) of the current manual, to 0:
• A-bus setting register [CS0, 1 space] (address: 25FE00B0H; register: ASR0)
→ Set bit 31 and bit 15 to 0.
• A-bus setting register [CS2, reserved space] (address: 25FE00B4H; register: ASR1)
→ Set bit 31 and bit 15 to 0.
No. 10 Address change for A-bus interrupt acknowledge register (address 25FE00A8H)
The address for the A-bus interrupt acknowledge register was changed to 25FE00A8H.
This change is implemented in Ver. 2 (5/31/94) of the current manual.
No. 11 Restriction on write to A-bus setting registers (addresses 25FE00B0H and
25FE00B4H)
Data can be written to the A-bus setting registers only when the A-bus is not being
accessed. Before writing to the A-bus setting registers, first execute a dummy read of the
A-bus.
No. 12 Activation of A-bus B-bus from SCU-DMA on standby during CPU write to A-bus
or B-bus
Write processing to the A-bus and B-bus from the CPU has priority over SCU-DMA
activation between the A-bus and B-bus. For example, if the A-bus executes SCU-DMA
activation for VDP2 (B-bus) while the CPU is executing a continuous write to VDP1 (B-
bus), SC-DMA is not activated until the continuos write ends.
However, during SCU-DMA activation, CPU access to the A-bus and B-bus is queued.
No. 13 Deletion of DMA status register (addresses 25FE0070H to 25FE007CH)
Address setting values for a terminated DMA and the function that returns the level 0, 1, or
2 status were deleted.
Part of this specification change is implemented in the Ver. 2 (5/31/94) of the current
manual. (Read address, write address, and transfer byte count for a terminated DMA have
been deleted.)
No. 14 Deletion of DMA forced termination register (address 25FE0060H)
The function of the DMA forced termination register was deleted. Do not write to this
register.
No. 15 Read of transfer byte count in DMA transfer register prohibited
If the transfer byte count of the DMA transfer register is read, the read value is not
guaranteed. This register is a write-only register and cannot be read.
(Address level 0 25FE0008H: D0C; level 1 25FE0028H: D1C; level 2 25FE0048H:
D2C)
No. 16 Restriction on read address addition value for DMA based on access address
The values that can be set to the read address addition value differ depending on the address
to be accessed. This specification applies also to the DMA instruction of DSP.
External area 4 (A-bus I/O area) → Values 0B and 1B can be set.
Other areas → Only value 1B can be set.
(Address level 0 25FE000CH: D0RA; level 1 25FE002CH: D1RA; level 2 25FE004CH:
D2RA)
No. 17 Value of address addition value bit when read address update bit is set in DMA
When the read address update bit (*1) is 1, the read address addition bit (*2) must be 1.
*1 Read address update bit
Address level 0 25FE0014H: D0RUP; level 1 25FE0034H: D1RUP; level 2
25FE0054H: D2RUP
*2 Read address addition bit
Address level 0 25FE000CH: D0RA; level 1 25FE002CH: D1RA; level 2
25FE004CH: D2RA
No. 18 Restriction on write address addition value in DMA based on access address
The values that can be set to the write address addition value differ depending on the
address to be accessed. This specification applies also to the DMA instruction of DSP.
WORKRAM-H → Value 010B can be set.
External areas 1 to 3 → Value 010B can be set.
External area 4 (A-bus I/O area) → Values 000B and 010B can be set.
VDP1, VDP2, SCSP → All values can be set.
(Address level 0 25FE000CH: D0WA; level 1 25FE002CH: D1WA; level 2 25FE004CH:
D2WA)
No. 19 Value of address addition value bit when write address update bit is set in DMA
When the write address update bit (*1) is 1, the write address addition value bit (*2) must
be set according to the bus space to be accessed, as follows:
External areas 1 to 4 (A-bus) → Set 010B.
VDP1, VDP2, SCSP (B-bus) → Set 001B.
WORKRAM-H (C-bus) → Set 010B.
*1 Write address update bit
Address level 0 25FE0014H: D0WUP; level 1 25FE0034H: D1WUP; level 2
25FE0054H: D2WUP
*2 Write address addition value bit
Address level 0 25FE000CH: D0WA; level 1 25FE002CH: D1WA; level 2
25FE004CH: D2WA
No. 20 Concurrent use of two channels in DMA
Up to two channels can be used concurrently with the DMA priority sequence guaranteed.
If three channels are used concurrently, the priority sequence is ignored. (The DMA
instruction of DSP is counted as a channel.)
No. 21 Specification changes to DMA activation method
The DMA activation method was changed, and DMA enable bits were added.
Activation cause DMA activation condition
000 Enable bit =1 and VBLANK-IN
001 Enable bit =1 and VBLANK-OUT
010 Enable bit =1 and HBLANK-IN
011 Enable bit =1 and timer 0
100 Enable bit =1 and timer 1
101 Enable bit =1 and SCSP request
110 Enable bit =1 and script draw termination
111 Enable bit =1 and DMA activation bit = 1
These changes have been implemented to Ver. 2 (5/31/94) of the current manual.
No. 22 Specifications for DMA activation triggers that occur during DMA execution
If a DMA activation trigger occurs during DMA execution, the trigger is held until the DMA
being executed ends. Then the held activation is executed.
For example, if H blank is set to activate DMA and a data size larger than can be transferred
in one line (up to the next H blank) is set, operation becomes unstable.
When executing this type of DMA execution, be sure to check the data size to be
transferred.
The trigger is held for only one execution.
No. 23 Write to register of corresponding level is prohibited during DMA activation
The selection register for DMA mode, address update, and activation factor (*1) and the
DMA set register (2) cannot be rewritten during DMA activation of the corresponding level.
If either of these registers is rewritten, the system hangs.
*1 Selection register for DMA mode, address update, and activation factor
Address level 0 25FE0014H, level 1 25FE0034H, level 2 25FE0054H
*2 DMA set register
Address level 0 25FE000CH, level 1 25FE002CH, level 2 25FE004CH
No. 24 Nonoccurrence of illegal DMA interrupt during DMA execution in indirect mode
The DMA illegal interrupt status bit (bit 12) of the DMA status register (address
25FE00A4H) is not issued during DMA execution in indirect mode.
When using the DMA in indirect mode, do not reference the DMA illegal interrupt status
bit.
No. 25 Specification changes for DMA indirect mode table
The specifications for the DMA indirect mode table were changed as follows:
[Changes]
• The table structure was changed from a 4-long word structure to a 3-long word
structure.
• The read and write addresses were reversed.
• Based on the table size (n × 12 bytes), the table start addresses (m value in the figure
below) must be placed on a 32-, 64-, 128-, 256-, 512-, 1024-, ...- byte boundary. An
example is shown below.
• Table size is 24 bytes or less: Place the start address on a 32-byte boundary.
• Table size is 252 bytes or less: Place the start address on a 256 byte boundary.
• Table size is 1020 bytes or less: Place the start address on a 1024-byte boundary.
• Always set 1 to bit 31 of the final (nth) read address.
Address set to write address register → m 1st transfer byte count
m+4 1st write address
m+8 1st read address
.
.
.
nth transfer byte count
nth write address
Set 1 to bit 31 of the nth read address → nth read address
(Address level 0 25FE0004H, level 1 25FE0024H, level 2 25FE0044H)
No. 26 Clearing the program termination interrupt flag at DSP activation
When activating DSP, set 0 to the program termination interrupt flag (bit 18: E) of the DPS
program control port (address 25FE0080H). When the flag is 1, the DSP program
termination interrupt is not issued even if the DSP program is terminated with the ENDI
instruction.
No. 27 Restriction on address addition value during DSP DMA instruction transfer from B-
bus to DSP data RAM
When a DSP DMA instruction (DMA or DMAH) is used to transfer data from the B-bus to
the DSP data RAM, the address addition value must be 010B.
No. 28 Delay in DMA activation startup if break is executed during debugging with ICE
The SCU-DMA operates only when the CPU is operating. If a break occurs during
debugging on the ICE, start of SCU-DMA operation is delayed. When the ICE execution
status is parallel mode (prompt is #), the SCU-DMA operates normally.
No. 29 BREQ enabled status necessary when debugging with ICE
When using the SCU-DMA under an ICE, set E (always enabled) as the input state of the
BREQ (bus permission request) signal of the EXECUTION_MODE (EM) command.
In the ICE E7000 system, no change is necessary because the BREQ default is E.
No. 30 Notes on using the timer 0 compare register (address 25FE0090H)
Although 10 data bits can be set to the register, an interrupt will not occur if improbable
data is set. Always set a value in the usable range.
For NTSC non-interlaced (one screen 263 lines, effective screen 224 lines), for example,
interrupts occur as follows:
T0C9-0 = 1 → Interrupt occurs at the beginning of the HBLANK-IN immediately
before the first line of the effective screen.
T0C9-0 = 2 → Interrupt occurs at the beginning of the HBLANK-IN immediately
before the first two lines of the effective screen.
T0C9-0 = 224 → Interrupt occurs at the beginning of the HBLANK-IN immediately
before the last line of the effective screen.
T0C9-0 = 225 → Interrupt occurs at the beginning of the HBLANK-IN immediately
after the effective screen ends.
T0C9-0 = 263 → Interrupt occurs at the beginning of the HBLANK-IN immediately
before the line preceding the effective screen.
T0C9-0 = 264 to → Interrupt does not occur.
1023
T0C9-0 = 0 → Interrupt occurs at the same timing as VBLANK-OUT.
No. 31 Notes on using the timer 1 set data register (address 25FE0094EH)
The value of the timer 1 set data register is loaded to timer 1 when both of the following
conditions are satisfied: timer 1 is stopped and HBLANK-IN occurs.
If a data value larger than the number of counts in one line is set to the timer 1 set data
register, a timer 1 interrupt no longer occurs at each line.
[Range for number of counts]
If one line is 320 dots: 1 to 1AAH
If one line is 352 dots: 1 to 1C6H
If one line is 424 dots: 1 to D3H
If one line is 426 dots: 1 to D4H
(Note that if 0 is specified as the number of counts, the value becomes 512.)
No. 32 Notes on read access of A-bus and B-bus areas (2000000H to 5FFFFFFH)
In read access to the A-bus and B-bus area (2000000H to 5FFFFFFH), the internal CPU
operation is different from the external operation. Even if the SH2 executes read access in
byte or word (2-byte) units, the external operation becomes long word (4 -byte) access.
If byte-unit read of a continuous area is executed for the A-bus and B-bus area, processing
takes longer than byte-unit write.
In write access, the internal operation and the external operation are the same (If the area is
accessed in byte units, the external access is also byte access.
No. 33 Initial value of A-bus refresh at power on reset (address 25FE00B8H)
At power on reset, the initial value of the A-bus refresh output effective bit changes to
effective state (ARFEN=1). This bit should not be changed by the user.
No. 34 Initial value of SDRAM selection bit (address 25FE00C4H)
At power on reset, the SDRAM selection bit is 2M bit × 2 (RSEL = 0). The bit must be
reset to RSEL = 1 so that the value changes to 4M bit × 2. This setting change is executd
within the boot ROM. User modification is not necessary.
No. 35 Prohibition of DMA level 2 activation during DMA level 1 execution
A operation error may occur if DMA level 2 is activated during DMA level 1 activation. To
prevent such operation errors, do not activate DMA level 2 during DMA level 1 operation.
No. 36 Notes on reading the DSP program control port (address 25FE0080H)
When the DSP program control port is read, note that the following phenomena occur:
• The V flag (overflow flag) is cleared.
The V flag cannot be checked during DSP execution.
• A DSP termination interrupt factor may not occur.
If the program termination interrupt flag is monitored (read) during DSP execution, the
DSP termination interrupt may not occur. Therefore, do not read this address in
programs that obtains DSP termination with an interrupt.
SEGA SATURN TECHNICAL BULLETIN #1 1
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: Disc Format Standards Specification Revision
This report provides a material on the latest information on the boot system for the Sega
Saturn.
The information presented in this material is included in the Development Tools
Manual/Disc Format Standard Specifications." However, this information is provided first
because revision of the standard specification has been delayed.
Notes:
1. The boot system information (Saturn Boot ROM Ver. 0.9 User's Manual [ST-
079B-R1-062294]; Rel.2 is printed in red) included in the current "Programmer's
Guide Volume 1/Disc Format Standard Specifications" is old and should not be
used.
2. After the distribution of the "Disc Format Standard Specifications (Rel. 3) (ST-
079B-R3-011895)," the information described in the standard specifications will be
the formal information.
Normal Info
Material name: SEGASATURN Software Library
MPEG Library Ver. 1.00 Disk version 2/10/95
Information type: If the current version has no bugs, it will also be used in
Software Library Release 4.
Presentation purpose: Early presentation
Attachment: MPEG Library External Specifications Ver. 1.00 01/31/95
(1 copy)
This material is the pre-edited manuscript.
BOOT SYSTEM
Introduction
This document prescribes conventions that must be followed when writing an application
software uses the boot system. CDs that do not follow these standards will not be
recognized as a Game-CD. All applications software that operate in this game system must
follow these standards.
This document is an excerpt of the Disc Format Standard Specifications(ST-040-R3-
011895) and describes only the important information. Be sure to also read the contents of
the Disc Format Standard Specifications(ST-040-R3-011895).
1. System Area
The system area is that area that is located at the beginning of the CD-ROM.
The data written to the system area includes system information for application startup and
the initial program. These data items must be placed contiguously in the system area as the
initial program (IP). The IP consists of the boot codes and the application initial program
(AIP). The boot codes include IDs, such as the game name, and a security code. The AIP
includes code for the initial program.
Figure 1 IP structure
Structure Size Remarks
System ID 100H Game name, product number, version,
etc.
IP Boot code Security code D00H Security code
Area code group 20H– Area code group
100H
Application initial program 20H- Initial program, file system, etc.
71E0H
2. System ID
The system ID is the first data located in the system area.
Figure 2 System ID structure
0 1 2 3 4 5 6 7 8 9 A B C D E F
00H Hardware identifier
10H Manufacturer ID
20H Product number Version
30H Release date Device information
40H Target area symbol Space
50H Compatible peripheral
60H Game name
70H
80H
90H
A0H
B0H
C0H
D0H Reserved
E0H IP size Reserved Stack-M Stack-S
F0H 1st read address 1st read size Reserved Reserved
3. System ID Description
• Conventions
Allowed characters
The characters that can be used in the system ID are all ASCII code alphanumeric
characters. For some items, the following characters can also be used: ., /, -, and :.
Unless otherwise indicated, both uppercase and lowercase characters can be used.
Entries
• Unless otherwise indicated, left-justify all entries. Do not add preceding spaces.
• Unless otherwise indicated, fill all unused spaces with ASCII code 20H.
Representation definition
In the following descriptions, "∆" and "space" represent ASCII code 20H.
Other
Fill reserved areas with 00H.
• Item Description
Hardware identifier (start address: 00H)
Definition Unique ID of the hardware
Allowed characters Uppercase letters only
Number of characters 16
Entry description Enter "SEGA∆SATURN∆" (required).
Manufacturer ID (start address: 10H)
Definition Manufacturer ID specified by SEGA
Allowed characters Alphanumeric only
Number of characters 16
Entry description
• SEGA brand: Enter "SEGA∆ENTERPRISES" (16 characters fixed).
• Third party brand: Enter "SEGA∆TP∆KAISHA-A" (16 characters).
For KAISHA-A, enter the individual company code assigned to the third party.
Example) "SEGA∆TP∆T-999∆∆∆"
Rule: Left-justify the underlined portion in the example. File the remaining portion
with spaces to make 16 characters.
Product number (start address: 20H)
Definition Product number specified by SEGA
Allowed characters Alphanumeric only
Number of characters 10
Entry description Fill the remaining portion with spaces.
Entry example • SEGA brand title: "GS-9099∆∆∆"
• Third party title: "T-99901G∆∆"
Version (start address: 2AH)
Definition Application version
Allowed characters Uppercase "V", numbers, and "." (period)
Number of characters 6
Entry description Enter "V", followed by a one-digit number, ".", and a three-digit
number. The final release is V1.000.
Entry example Sample disc: "V0.801"
Master disc: "V1.000"
Release date (start address: 30H)
Definition Date when the master disc (write-once disc) was created
Allowed characters Numbers only
Number of characters 8
Entry description YYYYMMDD (year, month, day)
Entry example "19940912" (September 12, 1994)
Device information (start address 38H)
Definition Device information. For a CD, enter the disc number within the set.
Allowed characters Alphanumeric, "/" and "-"
Number of characters 8
Entry description Fill the remaining portion with spaces.
Entry example First CD in a set of 1: "CD-1/1∆∆"
Second CD in a set of 3: "CD-2/3∆∆"
Target area symbol (start address: 40H)
Definition Area symbol of the area where the application is to be used
Allowed characters Uppercase letters found in the character list below
Number of characters 10
Entry description Multiple symbols can be entered. Do not insert spaces or commas
between area symbols. Fill the remaining portion with spaces.
For an application to be run on hardware sold in Japan, enter "J" as
the area symbol.
For an application to be run on hardware sold in North America,
enter "U" as the area symbol.
For an application to be run on hardware sold in Europe, enter "E"
as the area symbol
• Area symbol list
Japan "J"
Asia NTSC (Taiwan, Philippines) "T"
North America (U.S., Canada) "U"
Central/South America NTSC (Brazil) "B"
Korea "K"
East Asia PAL (China, Middle/Near East)"A"
Europe PAL "E"
Central/South America PAL "L"
Entry example Application to be operated in Japan, Taiwan, and Korea (and not in
other areas): "JTK∆∆∆∆∆∆∆"
NOTE: The areas and area codes entered in this field must be
entered in the area code group. (See item 5, "Area
Codes.")
Supplement The hardware has "area symbol" information, which differs for each
sales area. The application operates if the "area symbol," the "area
symbol in the corresponding area symbol," and the "area code" all
match.
Compatible peripheral (start address: 50H)
Definition Information on fully compatible input peripheral
Allowed characters Alphanumeric only
Number of characters 16
Entry description Multiple peripheral characters can be added. Do not insert spaces or
commas between characters. Fill the remaining portion with spaces.
• Character list
Control pad "J"
Analog controller "A"
Mouse "M"
Keyboard "K"
Steering controller "S"
Multi-tap "T"
Entry example Application that is compatible with a standard joy pad and a mouse:
"JM∆∆∆∆∆∆∆∆∆∆∆∆∆∆"
Supplement If the number of peripherals increases, the number of characters can
also be expected to increase.
For a definition of fully compatible, see the pad check items in the "Software Creation
Standards."
Game name (start address: 60H)
Definition Game name
Allowed characters Letters only for the game name. Spaces can be used in the game
name. To enter multiple titles, use a slash (/), hyphen (-), or colon
(:) to delimit the titles.
Number of characters 112 characters
Entry description If the name differs depending on the sales area, several titles can be
entered. There are no detailed rules for entering multiple titles.
However, someone looking at this section should be able to identify
the titles.
Fill the remaining portion with spaces.
Entry example Multiple titles
1) "TITLE1/TITLE2/TITLE3∆∆∆∆"
2) "J:TITLE1∆∆U:TITLE2∆∆∆∆∆∆"
IP size (start address: E0H)
Definition Size (byte count) of the initial program (IP)
Size 4 bytes
Description Attach the AIP immediately after the boot codes to form a file.
Specify the size of that file.
All parameters must be aligned to long word boundaries (multiple of
4H).
Range 1000H to 8000H
Stack-M (start address: E8H)
Definition Stack point address of the master SH2
Default (0 specification) 6001000H to 6001FFFH becomes the stack area.
Description All parameters must be aligned to long word boundaries (multiple of
4H).
Stack-S (start address: ECH)
Definition Stack point address of the slave SH2
Default (0 specification) 6000D00H to 6000FFFH becomes the stack area.
Description All parameters must be aligned to long word boundaries (multiple of
4H).
1st read address (start address: F0H)
Definition Transfer destination address of file that the boot system transfers to
the work-RAM during display of the license SEGA logo.
Description If 0H is specified, no data is transferred.
For a CD, the file indicated by the file identifier [2] is transferred.
All parameters must be aligned to long word boundaries (multiple of
4H).
Range Larger than (6002000H + IP size) and smaller than (6100000 - 4).
Supplement See item 7, "Application Initial Program and 1st Read File."
1st read size (start address: F4H)
Definition This field is ignored for CDs.
Description All parameters must be aligned to long word boundaries (multiple of
4H).
4. Security Code
Place the security code immediately after the system ID. SEGA provides the code an object
code. Use the code without adding any changes. The code contains a program and data
that display the SEGA license. If the application does not have a correct security code, it
will not be recognized as a Sega Saturn CD and the game will not start.
Name of security code presentation file: Directory contents after the software library disc is
installed
/SATURN/SEGALIB/LIB/ SYS_SEC.OBJ
5. Area Codes
Place the area codes immediately after the security code. SEGA provides these codes as
object codes. Use the codes without adding any changes. Although there are eight area
codes, one for each hardware sales area, enter the area codes for the "corresponding area
symbols" of the system ID. When specifying multiple area codes, the specification
sequences for the "corresponding area symbols" and the "area codes" do not need to match.
The area codes can be changed easily because each area code has the same size. Also a
common disc can be created to link multiple area codes. (See item 9, "Program Samples.")
Name of area code presentation file: Directory contents after software library disc
installation
/SATURN/SEGALIB/LIB/SYS_ARE?.OBJ ; ? is character for corresponding area
; 8 types
The following table shows the relationships between the hardware sale areas, area codes,
and corresponding area symbols.
Target area Hardware sales area Area code file name
J Japan SYS_AREJ.OBJ
T Asia NTSC region SYS_ARET.OBJ
U North America SYS_AREU.OBJ
B Central/South America NTSC SYS_AREB.OBJ
region
K Korea SYS_AREK.OBJ
A East Asia PAL SYS_AREA.OBJ
E Europe PAL SYS_AREE.OBJ
L Central/South America PAL SYS_AREL.OBJ
6. Application Initial Program
Place the application initial program immediately after the area code group so that the
program is executed immediately after area code execution. The program then proceeds
under the control of the application.
7. Application Initial Program and 1st Read File
Both the application initial program and the 1st read file are part of a system in which the
boot ROM automatically transfers files from the CD-ROM. At activation, the application
initial program and the 1st read file allow the application to transfer the specified file
without incorporating a program.
• 1st read file
The 1st read file is the file (file identifier is [2]) that the boot system reads while the license
SEGA logo is being displayed (during security code execution). The license SEGA logo
display does not end until reading of the 1st read file ends. Therefore, the time of the
license SEGA logo screen becomes longer as the size of the transfer file increases. The
minimum time is two seconds; the maximum time is about 3.5 seconds. When the 1st read
address is set, the 1st read file is only read. The file is not executed. Although
specification of the 1st read file is not necessary, SEGA recommends that you use the file
to use the display time of the license SEGA logo efficiently.
• Application initial program
For example, when a file system is placed in the application initial program, accesses to the
CD can be performed easily in file units.
By using the application initial program and 1st read file effectively, you can create a highly
efficient application.
Conceptual diagram of processing after the power is turned on
Boot ROM processing
TV screen Power on
System ID check
SEGASATURN logo Security code check
SEGASATURN logo Display processing
Area code check
IP load
AIP is loaded
Security code execution Reads file identifier (2) file and
Licensed SEGA logo transfers data to transfer destination
Area code execution at 1st read address of system ID.
Application Application initial program execution
8. IP Creation Method
• SYS_ID.SRC
This is the assembler sample source program for system ID creation. Modify this program
according to the application. (See item 3, "System ID Description.") Place this program at
the beginning of the initial program.
Name of sample presentation file: Directory contents after software library disc installation
/SATURN/SEGASMP/SYS/ SYS_ID.SRC
• SYS_SEC.OBJ
Security code object (See item 4, "Security Code.")
Link and incorporate this object in its existing format.
• SYS_ARE?.OBJ
Area code objects (See item 5, "Area Codes.")
Link and incorporate these objects in their existing format.
Create the SYS_IP.BIN file by linking these files in the following sequence:
SYS_ID.OBJ, SYS_SEC.OBJ, SYS_ARE?.OBJ
Place the file in the CD system area.
9. Sample Programs
;======================================================================
; smp_id0.src -- System ID for SEGA (Ver.1994-11-11)
;======================================================================
.SECTION SYSID,CODE,ALIGN=4
;
.SDATA "SEGA SEGASATURN " ;00:Hardware identifier (fixed)
.SDATA "SEGA ENTERPRISES" ;10:Manufacturer ID
.SDATA "GS-9099 V1.000" ;20:Product number, version
.SDATA "19941122CD-1/1 " ;30:Release date, device information
.SDATA "JTUBKAEL " ;40:Target area symbols
.SDATA "J " ;50:Compatible peripheral
.SDATA "GAME TITLE " ;60:Game name
.SDATA " " :70:
.SDATA " " :80:
.SDATA " " :90:
.SDATA " " :A0:
.SDATA " " :B0:
.SDATA " " :C0:
.DATA.LH'00000000,H'00000000,H'00000000,H'00000000 ;D0:
.DATA.LH'00001000,H'00000000,H'00000000,H'00000000 ;E0:
.DATA.LH'06010000,H'00000000,H'00000000,H'00000000 ;F0:
;
.END
;====== End of file ===================================================
.
;======================================================================
; smp_id1.src -- System ID for 3rd Party (Ver.1994-11-11)
;======================================================================
.SECTION SYSID,CODE,ALIGN=4
;
.SDATA "SEGA SEGASATURN " ;00:Hardware identifier (fixed)
.SDATA "SEGA TP T-999 " ;10:Manufacturer ID
.SDATA "T-99901G V1.000" ;20:Product number, version
.SDATA "19941122CD-1/1 " ;30:Release date, device information
.SDATA "JTUBKAEL " ;40:Target area symbols
.SDATA "J " ;50:Compatible peripheral
.SDATA "GAME TITLE " ;60:Game name
.SDATA " " :70:
.SDATA " " :80:
.SDATA " " :90:
.SDATA " " :A0:
.SDATA " " :B0:
.SDATA " " :C0:
.DATA.LH'00000000,H'00000000,H'00000000,H'00000000 ;D0:
.DATA.LH'00001000,H'00000000,H'00000000,H'00000000 ;E0:
.DATA.LH'06010000,H'00000000,H'00000000,H'00000000 ;F0:
;
.END
;====== End of file ===================================================
.
;======================================================================
; smpsys.lnk -- SH Linkage Subcommand File for IP (Ver.1994-11-11)
;======================================================================
Input sys_id_obj
Input ../ /segalib/lib/sys_sec.obj
Input ../ /segalib/lib/sys_arej.obj
Input ../ /segalib/lib/sys_aret.obj
Input ../ /segalib/lib/sys_areu.obj
Input ../ /segalib/lib/sys_areb.obj
Input ../ /segalib/lib/sys_arek.obj
Input ../ /segalib/lib/sys_area.obj
Input ../ /segalib/lib/sys_aree.obj
Input ../ /segalib/lib/sys_arel.obj
Input ../ /segalib/lib/sys_init.obj
Input smpsys.obj
STart SYSID(060020000)
Output sys_ip.abs
Print sys_ip.map
EXIt
;====== End of file ===================================================
.
;=======================================================================
; sample0.scr -- CD-ROM (Ver.1994-11-11)
;Note: Sample script for CD-ROM (MODE1 + CD-DA) disc
; For VCDPRE and VCDBUILD, use Ver. 3.10 or above
; R: Required.
; 0: Optional, can be omitted.
; N: Parameter cannot be modified. (Use without modification.)
; Y: Parameter can be modified.
; -: No parameter.
; The first word in each line is the command name.
; Do not change the command names.
;=======================================================================
Define dirsmpdisc ./sample/ ; O Y
Disc sample0.DSK ;R Y
Session CDROM ;R N
LeadIn MODE1 ;R N
EndLeadIn ;R -
;
SystemArea [dirsmpdisc]sys_ip.bin ;R Y
;
Track MODE1 ;R N
Volume ISO9660 sample0.PVD ;R Y
PrimaryVolume 00:02:16 ;R N
SystemIdentifier "SEGA SEGASATURN" ;R N
VolumeIdentifier "SAMPLE_GAME_TITLE" ;R Y
VolumeSetIdentifier "SAMPLE_GAME_TITLE" ;R Y
PublisherIdentifier "SEGA ENTERPRISES,LTD.";R Y
DataPreparerIdentifier "SEGA ENTERPRISES,LTD.";R Y
CopyrightFileIdentifier "SMP_CPY.TXT" ;R Y
AbstractFileIdentifier "SMP_ABS.TXT" ;R Y
BibliographicFileIdentifier "SMP_BIB.TXT" ;R Y
VolumeCreationDate 22/11/1994 00:01:02:00:36 ; O Y
VolumeModificationDate 22/11/1994 00:01:02:00:36 ; O Y
EndPrimaryVolume ;R -
EndVolume ;R -
;
File SMP_CPY.TXT ;R Y
FileSource [dirsmpdisc]smp_cpy.txt ;R Y
EndFileSource ;R -
EndFile ;R -
File SMP_ABS.TXT ;R Y
FileSource [dirsmpdisc]smp_abs.txt ;R Y
EndFileSource ;R -
EndFile ;R -
File SMP_BIB.TXT ;R Y
FileSource [dirsmpdisc]smp_bib.txt ;R Y
EndFileSource ;R -
EndFile ;R -
;
File FILE0.BIN ; O Y
FileSource [dirsmpdisc]file0.bin ; O Y
EndFileSource ; O -
EndFile ; O -
;
; File to EndFile ; O Y
;
PostGap 150 ;R N
EndTrack ;R -
;
Track CDDA ;R N
Pause 150 ;R N
FileSource [dirsmpdisc]sound0.da ;R Y
EndFileSource ;R -
EndTrack ;R -
;
; Track to EndTrack ; O Y
;
LeadOut CDDA ;R N
Empty 500 ;R N
EndLeadOut ;R N
EndSession ;R N
;====== End of file ====================================================
.
;=======================================================================
; sample1.scr -- CD-ROM XA (Ver.1994-11-11)
;Note: Sample script for CD-ROM XA (MODE1 + MODE2 + CD-DA) disc
; For VCDPRE and VCDBUILD, use Ver. 3.10 or above
; R: Required.
; 0: Optional, can be omitted.
; N: Parameter cannot be modified. (Use without modification.)
; Y: Parameter can be modified.
; -: No parameter.
; The first word in each line is the command name.
; Do not change the command names.
;=======================================================================
Define dirsmpdisc ./sample/ ; O Y
Disc sample1.DSK ;R Y
Session SEMIXA ;R N
LeadIn MODE1 ;R N
EndLeadIn ;R -
;
SystemArea [dirsmpdisc]sys_ip.bin ;R Y
;
Track MODE1 ;R N
Volume ISO9660 sample1.PVD ;R Y
PrimaryVolume 00:02:16 ;R N
SystemIdentifier "SEGA SEGASATURN" ;R N
VolumeIdentifier "SAMPLE_GAME_TITLE" ;R Y
VolumeSetIdentifier "SAMPLE_GAME_TITLE" ;R Y
PublisherIdentifier "SEGA ENTERPRISES,LTD.";R Y
DataPreparerIdentifier "SEGA ENTERPRISES,LTD.";R Y
CopyrightFileIdentifier "SMP_CPY.TXT" ;R Y
AbstractFileIdentifier "SMP_ABS.TXT" ;R Y
BibliographicFileIdentifier "SMP_BIB.TXT" ;R Y
VolumeCreationDate 22/11/1994 00:01:02:00:36 ; O Y
VolumeModificationDate 22/11/1994 00:01:02:00:36 ; O Y
EndPrimaryVolume ;R -
EndVolume ;R -
;
File SMP_CPY.TXT ;R Y
FileSource [dirsmpdisc]smp_cpy.txt ;R Y
EndFileSource ;R -
EndFile ;R -
File SMP_ABS.TXT ;R Y
FileSource [dirsmpdisc]smp_abs.txt ;R Y
EndFileSource ;R -
EndFile ;R -
File SMP_BIB.TXT ;R Y
FileSource [dirsmpdisc]smp_bib.txt ;R Y
EndFileSource ;R -
EndFile ;R -
;
File FILE0.BIN ; O Y
FileSource [dirsmpdisc]file0.bin ; O Y
EndFileSource ; O -
EndFile ; O -
;
; File to EndFile ; O Y
;
PostGap 150 ;R N
Endtrack ;R -
;
Track MODE2 ;R N
PreGap 150 ;R N
Extent ;R -
FileInterleave 13 ; O Y
File INTFILE0.BIN ; O Y
FileSource [dirsmpdisc]intfile0.bin ; O Y
EndFileSource ; O -
EndFile ; O -
EndFileInterleave ; O -
FileInterleave 13 ; O Y
File INTFILE1.BIN ; O Y
FileSource [dirsmpdisc]intfile1.bin ; O Y
EndFileSource ; O -
EndFile ; O -
EndFileInterleave ; O -
FileInterleave 13 ; O Y
File INTFILE2.BIN ; O Y
FileSource [dirsmpdisc]intfile2.bin ; O Y
EndFileSource ; O -
EndFile ; O -
EndFileInterleave ; O -
FileInterleave 13 ; O Y
File INTFILE3.BIN ; O Y
FileSource [dirsmpdisc]intfile3.bin ; O Y
EndFileSource ; O -
EndFile ; O -
EndFileInterleave ; O -
EndExtent ;R -
PostGap 150 ;R N
EndTrack ;R -
;
Track CDDA ;R N
Pause 150 ;R N
FileSource [dirsmpdisc]sound0.da ;R Y
EndFileSource ;R -
EndTrack ;R -
;
; Track to EndTrack ; O Y
;
LeadOut CDDA ;R N
Empty 500 ;R N
EndLeadOut ;R N
EndSession ;R N
;====== End of file ====================================================
SEGA SATURN TECHNICAL BULLETIN #12
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: SCU DMA, Boot ROM, and Vblank Precautions
1) Burst-Read from VRAM is prohibited
SCU’s DMA read must not be performed against VRAM.
2) Limitation for horizontal direction resolution switch
Always use the BOOT ROM’s internal service routine when switching the
resolution in horizontal direction.
3) Limitation for valid period of V blank flag
VBLANK bit of the screen status register (TVSTAT: 180004H) becomes valid, only when
DISP bit of TV screen mode register (TVMD: 180000H) is “ 1 “.
When DISP bit is “ 0 “, VBLANK bit will always be “ 1 “.
SEGA SATURN TECHNICAL BULLETIN #13
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: VRAM Bank Splitting
The storage areas for pattern name data in the scroll screen are restricted as follows,
regardless of whether the screen is a normal scroll screen or a rotation scroll screen:
(1) If neither VRAM-A nor VRAM-B is split into two
Data can only be stored in one of the two VRAMs, either VRAM-A or VRAM-B.
(2) If only VRAM-A is split into two
a) When data is stored in VRAM-B, data can also be stored in VRAM-A1.
b) When data is not stored in VRAM-B, data can be stored in either VRAM-A0 or
VRAM-A1.
(3) If only VRAM-B is split into two
a) When data is stored in VRAM-A, data can also be stored in VRAM-B1.
b) When data is not stored in VRAM-A, data can be stored in either VRAM-B0 or
VRAM-B1.
(4) If both VRAM-A and VRAM-B are split into two
Data can be stored in either VRAM-A0 or VRAM-B0, and in VRAM-A1 or VRAM-
B1.
Table Restrictions on the storage locations for pattern name data
VRAM mode bit VRAM-A VRAM-B
VRAMD VRBMD VRAM-A0 VRAM-A1 VRAM-B0 VRAM-B1
0 0 ❍ ✕
✕ ❍
1 0 ✕ ❍ ❍
❍ ❍ ✕
0 1 ❍ ✕ ❍
✕ ❍ ❍
1 1 ❍ ❍ ✕ ✕
❍ ✕ ✕ ❍
✕ ❍ ❍ ✕
✕ ✕ ❍ ❍
❍: Data can be stored ✕: Data cannot be stored
If data can be stored in several locations, not all locations need to be used.
SEGA SATURN TECHNICAL BULLETIN #14
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: Use of VRAM for Bit Maps
Although the VDP2 must be used to display images with 16.77-million colors (VDP1 displays
only up to 32,768 colors), the drawback of using VDP2 is that the VRAM addresses are not
continuous when image data is transferred by the DMA.
This report explains in detail a technique for setting up continuous VRAM addresses for any bit
map size when VDP2 is used.
[Overview of This Material]
1. Principles: Page 1
• This section explains the principles used to implement a continuous address bit map of any
size.
2. Application: Page 5
• This section explains how the principles can be applied to move a bit map smaller than the
television screen to any position on the television screen.
3. Summary: Page 9
• Summary, notes, merits, supplement
VDP2 Bit Map
The minimum size of a VDP2 bit map is 512-dot (horizontal) × 256-dot (vertical). However,
when VDP2 is used with a demo, the VRAM addresses are not continuous when the DMA
transfers image data. Because of this drawback, many software applications use VDP1 (sprites).
However, VDP1 can only display pictures that have up to 32,768 colors. VDP2 must be used to
display pictures with 16.77 million colors.
This document explains how to use a VDP2 bit map and produce continuous VRAM addresses
with any bit map size.
1. Principles
This section explains the principles used to implement continuous addresses bit maps of any size.
For example, suppose that the bit map size is set at "512-dot (horizontal) × 256-dot (vertical)," and
the VRAM addresses continue from coordinates (0, 0) to (511, 0). The next address after (511, 0)
is (0, 1). To arrange a "320-dot (horizontal) × 224-dot (vertical) bit map into continuous
addresses, change the display coordinates for displaying the bit map on the screen as shown in the
following figure.
To implement the display coordinates shown in this figure, use the line scroll function and the
vertical cell scroll function. The explanations that follow assume the following: The size of the
VDP2 bit map is set to 512-dot (horizontal) × 256-dot (vertical), the horizontal direction of the
display bit map is a multiple of 8, the display start line is n=0, and the display start cell is w=0.
1) Horizontal coordinates
For horizontal display coordinates that change for each line, use the line scroll function and set the
horizontal display coordinates of the left end as the horizontal line scroll value.
The expression for calculating the horizontal line scroll value of line n is:
(Horizontal line scroll value of line n) = {00010000H × (horizontal size) × n} & 01ff0000H
2) Vertical coordinates
For vertical display coordinates that change for each line or in the middle of a line, combine the line
scroll function and the vertical cell scroll function.
First, set the vertical cell scroll value so that the fraction portion of the display coordinate value
calculated from the scroll value is discarded and the vertical display coordinate increases by 1 in the
middle of the line. The expression for calculating the vertical cell scroll value of cell w is:
(Vertical cell scroll value of cell w) = 00000400H × w
Next, set the vertical line scroll value based on the vertical cell scroll value. Calculate the vertical
line scroll value as follows:
Step Ι: Calculate the integer portion I(n) of the vertical display coordinate value for line n.
I (n) = {00000080H × (horizontal size) × n} & 01ff0000H
Step II: For line n, calculate the cell number m at which the vertical display coordinate value
increases by 1.
A(n) = 64 {(I(n)/00010000H) + 1}
B(n) = {(horizontal size)/8} × (n + 1)
If A(n) ≥ B(n): m = 64
If A(n) < B(n): m = A(n) - B(n-1)
Step III: Calculate the vertical line scroll value for line n.
(Vertical line scroll value for line n) = I(n) + {00000400H × (64 - m)}
3) Setting example
This item explains in detail a setting example in which a full-screen, full-color bit map (NBG0,
320x224, 16.77 million colors) is displayed and the VRAM addresses become continuous.
• Bit map leading address = 25E00000H
• Line scroll table address = 25E60000H
• Vertical cell scroll table address = 25E70000H
I Set the VDP2 registers as follows:
II Set the values calculated from the calculation expression into the vertical cell scroll table.
III Set the values calculated from the calculation format into the line scroll table.
This setup produces a continuous address bit map of 320-dot (horizontal) × 224-dot (vertical).
2. Application
This section explains how to use the principles described in the previous section to place a bit map
smaller that the TV screen at any location on the TV screen.
The easiest way to place a bit map at any location on the TV screen is to use the screen scroll
function. However, simply scrolling the screen does not produce good results because the
following two problems occur:
I The picture is repeated even in undesired areas.
II The line scroll values change because the display start position is not at the top left of the TV
screen.
These two problems can be corrected by using the window function and changing the calculation
expression for line scroll values.
1) Window function
Problem I can be corrected easily with the window function. At the location where the bit map is
to be displayed, set a transparent processing window of the same size as the bit map, and validate
the outside of the window.
2) Line scroll values
Problem II can be corrected by calculating the line scroll values (see "Principles") according to the
following procedure. However set the display start line of the bit map to n = 0 and the display start
coordinates of the bit map to (Mx, My). Lines that do not display the bit map are unrelated, and
the line scroll value for those lines should be set to n = 0.
Step i: Calculate the horizontal line scroll value for line My+n.
(Horizontal line scroll value) = {00010000H × (horizontal size) × n} & 01ff0000H
Step ii: Calculate the integer portion I(n) of the vertical display coordinate value for line My+n.
I(n) = {00000080H × (horizontal size) × n} & 01ff0000H
Step iii: For line n of the display bit map, calculate cell number m at which the vertical display
coordinate value increases by 1.
A(n) = 64 × {(I(n)/00010000H) + 1}
B(n) = {(horizontal size)/8} × (n + 1)
If A(n) ≥ B(n): m = 64
If A(n) < B(n): m = A(n) - B(n-1) + (rounded up value of Mx/8)
Step iv: Calculate the vertical line scroll value for line My+n.
(Vertical line scroll value) = I(n) + {00000400H × (64 - m)}
3) Setting example
This item explains in detail a setting example in which a 192-dot (horizontal) × 144-dot (vertical)
bit map (NBG0, 16.77 million colors) is displayed in the center of the TV screen and the VRAM
addresses become continuous.
• Bit map display start coordinates = (64, 40)
• Bit map leading address = 25E00000H
• Line scroll table address = 25E20000H
• Vertical cell scroll table address = 25E30000H
• Back screen table address = 25E7FFFEH
i Set the VDP2 registers as follows:
ii Set the values calculated from the calculation expression into the vertical cell scroll table.
iii Set the values calculated from the calculation format into the line scroll table.
iv Set the back screen table (25E7FFFEH) to black (0000H).
This setup produces a continuous address bit map of 192-dot (horizontal) × 144-dot (vertical). In
this example, VRAM-A and VRAM-B can be configured as double buffers because the bit map
data fits into one bank. However, in this case, the vertical cell scroll table must be set in both
VRAM-A and VRAM-B because it must be set in the side that is not the display VRAM.
3. Summary
Described below is the procedure for displaying a continuous address bit map of a specific size at
any location on a TV screen. However, the horizontal size of the display bit map must be a
multiple of 8.
1) Set the screen scroll value.
Set the horizontal screen scroll value. However, for the TV screen, set the horizontal display start
position of the bit map to Mx.
(Integer portion of the horizontal screen scroll value) = (0800H - Mx) & 07ffH
2) Set the window.
Set a transparent processing window of the same size as the bit map to the TV screen display
position of the bit map. Make the outside of the window effective.
3) Set the vertical cell scroll table.
Set the vertical cell scroll table. Set the leftmost cell to w = 0.
(Vertical cell scroll value of cell w) = 00000400H × w
4) Set the line scroll table.
Set the line scroll table. However, for the TV screen, set the display start line of the bit map to n =
0. Also, for line that do not display the bit map, set the line scroll value to 0.
• Bit map size for VDP2 setup = 512-dot (horizontal) × 256-dot (vertical)
• Display bit map size = Sx-dot (horizontal) × Sy-dot (vertical)
• Display start coordinate of bit map on TV screen = (Mx, My)
• 0 ≤ n ≤ Sy - 1
(Horizontal line scroll value for line My+n) = {00010000H × Sx × n} & 01ff0000H
(Vertical line scroll value for line My+n) = I(n) + {00000400H × (64 - m)}
Where, I(n) = {00000080H × Sx × n} & 01ff0000H
A(n) = 64 × {(I(n)/00010000H + 1}
B(n) = (Sx/8) × (n + 1)
If A(n) ≥ B(n),
m = 64
If A(n) < B(n),
m = A(n) - B(n-1) + (rounded up value of Mx/8)
5) Merits
• The amount of VRAM that must be allocated to bit map data can be kept to a minimum.
• The VRAM addresses become continuous, regardless of the specified number of bit map
colors.
• For bit map data of 16.77-million colors that fits in one bank or bit map data of 32,768 colors,
the VRAM can be configured as a double buffer, which allows pictures to be updated even
when they are displayed.
6) Comments
• The window setup is not necessary for a full-screen display.
• If the horizontal size of the display bit map is 8-dot, 16-dot, 32-dot, 64-dot, 128-dot, or 256-
dot, the vertical cell scroll is not necessary. Also, calculation of the vertical line scroll value is
simplified.
SEGA SATURN TECHNICAL BULLETIN #15
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: VDP1 User’s Manual Correction
The following is a correction for page 79 of the VDP1 User’s Manual Version 1(2/20/94):
Error: Position of “clipping mode bit” and “user clipping valid bit” is different in the
drawing and the explanation.
bit 10 9
Pclp Clip Cmod Mesh
•
•
: clipping mode bit (Cmod), bit 10
•
: user clipping enable bit (Clip), bit 9
Correct: The drawing is correct.
bit 10 9
Pclp Clip Cmod Mesh
•
•
: clipping mode bit (Cmod), bit 9
•
: user clipping enable bit (Clip), bit 10
SEGA SATURN TECHNICAL BULLETIN #16
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: SCU DSP Instruction Clarification
Additional information to be added to pg119 from SCU User’s Manual version 2
(5/31/94).
MOV [ s ], [ d ] transfer([source]->[destination])
•••
operation
discription (function) •••
instruction code
The following table is in this table above.
bit Data
bit 3 bit 2 bit 1 bit 0 [s] select
1 0 1 0 [ALU HIGH]
Addition: upper side 32 bit
within
SEGA SATURN TECHNICAL BULLETIN #17
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: Mission Stick Specifications
Note that some of the specifications for the mission stick differ from the specifications for
the trail-version analog joy stick.
• 1. The digital RLDU stick was discontinued. The digital RLDU returns a value
according to the analog stick (see figure below).
• 2. The mission stick features a center-adjust function. When the power is turned on,
the stick position is automatically assumed to be the center (=128). Structurally,
however, the center may shift after extended use.
In addition, if the stick is intentionally tilted when the power is turned on, it will not
operate properly because of this center-adjust function. This item will be added to the
operating instructions as a note.
• 3. For X, Y, and Z of the mission stick, a minimum value of 0 and a maximum value
of 255 are guaranteed. The minimum and maximum values are output before the
mechanical movement limits.
Analog stick movement distance and digital bit changes
SEGA SATURN TECHNICAL BULLETIN #18
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: Limitation of Default Interrupt Processing Routine
The following function is used to register a default interrupt processing routine that cancels
the registration of a previously registered interrupt processing routine:
SYS_SETSINT(Num, 0);
If this function is used from the slave SH, the correct default is not written to the
corresponding vector in the slave vector table of vector number Num.
When registering a default from the slave SH, do not register a default that specifies 0 as
the address.
There are no problems operating a slave or master vector table from the master SH.
To return a slave vector to the default registration, use the following methods:
1. If the slave SH itself operates slave SH vectors
In cases where the slave SH program resides in the work RAM and the slave itself
determines the interrupt processing based on existing conditions, first (when the default can
be obtained) use the following function to save the processing to a function:
func_org = SYS_GETSINT(Num);
After registering and updating the target processing routine:
SYS_SETSINT(Num, func_1st);
:
SYS_SETSINT(Num, func_2nd);
:
register the first address to return to the default:
SYS_SETSINT(Num, func_org);
2. If the master SH operates slave SH vectors
In cases where a different slave SH program is read at each stage and the master turns the
slave on and off in a complex manner, the slave vectors should be initialized either before
the master turns the slave on or after the master turns the slave off. From the master SH,
specify the following at one of the timings:
SYS_SETSINT(Num + 0 x 100, 0);
Adding "0 x 100" to the vector number allows slave vectors to be operated from the master
SH, even in normal processing routine registration.
SEGA SATURN TECHNICAL BULLETIN #19
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: GFS_Init Settings
The file system initialization function (GFS_Init) executes the CD block initialization
function (CDC_CdInit) to set the ECC and retry counts to the maximum values. The actual
settings are as follows:
• Initialization flag: Default value
• Standby time: Default value
• ECC count: 5
• Retry count: 15
CDC_CdInit(0, 0, 5, 0x0f);
To change these settings when using GFS, call GFS_Init, then execute the CDC_CdInit
function. The program can be specified so that only the target parameters are changed
while the other parameters remain the same.
• Program example
#include "sega_gfs.h"
#define STNBY 9 0 /* Standby time: 90 seconds */
#define NOCHG - 1 /* No change specification */
Sint32 sampleInit(void)
{
Sint32 ret;
/* File system initialization */
ret = GFS_Init(...);
if (ret < 0) {
return NG;
}
/* Standby time change (others are not changed)
*/
ret = CDC_CdInit(NOCHG, STNBY, NOCHG, NOCHG);
if (ret != CDC_ERR_OK) {
return NG;
}
return OK;
}
SEGA SATURN TECHNICAL BULLETIN #20
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: Program Library User’s Guide 1 Corrections
The following information lists corrections to the Saturn “Program Library User’s Guide 1
(ST-136-R2-093094)”.
Corrections to the File System Library Manual Version 1.0
• Errata
Page Location Error Correction
11 Example in OpenByName(Uint8 *fname) OpenByName(Sint8 *fname)
3.4
23, 27 No. 2.6 GFS_TRANS_... GFS_TMODE_...
30 No. 3.4 GFS_DIR_FNAME(dir) Uint8[] GFS_DIR_FNAME(dir) Sint8[]
34 No. 1.4 GFS_NameTold(Uint8 *fname) GFS_NameTold(Sint8 *fname)
34 No. 1.5 const Uint8 *GFS_IdToName Sint8 *GFS_IdToName
35 No. 2.3 off ofs
36 No. 2.7 (does not include last sector) (includes last sector)
Output
37 No. 3.1 off ofs
39 No. 4.2 GFS_NwIsCompleted function GFS_NwIsComplete function
Remark
40 No. 4.6 GFS_EXEC_... GFS_SVR_...
49 C.2 (3) GFS_ATR_FORM1 0 x 80 GFS_ATR_FORM1 0 x 08
• Page 27, No. 2.6 (GFS_TMODE_)
Constant name Explanation
GFS_TMODE_SCU DMA transfer (level 0) by the SCU
When the transfer destination is WORK RAM-L, the transfer
becomes a software transfer.
• Page 29, No. 3.2 (GfsDirTbl)
Item names for (1) to (3) will be added as follows:
(1) Directory information table type
The directory information management structure ...
(2) Directory information management
This data type is used to manage directory information.
(3) Setting method
(a) When directory information without file names is used
• Page 35, No. 2.3 (GFS_Seek)
The description for the function "the end of the file is exceeded ..." will be deleted and
changed as follows:
A position outside the file range cannot be specified as the pointer.
• Page 36, No. 2.7 (GFS_GetFileSize)
The remark description will be deleted and changed as follows:
[Remark] In files containing both Form1 and Form2, both sctsize and lastsize become
0.
• Page 38, No. 3.2 (GFS_Fread), No. 3.3 (GFS_NwFread)
The remark description "The access pointer executes read processing ..." will be
deleted.
• Page 44, A.3 (Notes)
The description for "When a CD-ROM is Not Used" will be deleted.
* This deletion is due to the specification changes related to the file identifier in C.2 (8).
SEGA SATURN TECHNICAL BULLETIN #21
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: GFS_Init and GFS_LoadDir Function Errors
If an error occurs with the GFS_Init or GFS_LoadDir function, perform the corrective
action described below. A program sample is shown on the following page.
(1) GFS_ERR_CDRD or GFS_ERR_FATAL error
GFS_Init sets the ECC and read retry counts to the maximum values to provide maximum
prevention from an <ERROR> status occurrence. If a <FATAL> status occurs, the
GFS_Init function issues the STOP command (home position seek) for error recovery.
To handle these errors, set up a recovery processing as shown in the program sample in the
attachment. In the recovery processing, issue the PAUSE command, wait for the
<PAUSE> status, and then reissue the function. Set the number of execution repetitions to
at least 3.
If the error persists even after the repeated executions, there may unrecoverable scratch on
the disc. Display a message or switch to the multiplayer.
(2) GFS_ERR_CDNODISC or GFS_ERR_CDOPEN error
Switch to the multiplayer
(3) Other errors
Other errors should not occur. If any other error occurs, reexamine the program. The
error may be due to a fault in the GFS library or the hardware. If you are unable to isolate
the error, contact SEGA.
With the product version, the only corrective action is to switch to the multiplayer.
Sample of Error Recovery Processing for GFS_Init and GFS_LoadDir Functions
• Program Example
# include "sega_cdc.h"
Sint32 recovGfsInit(void);
Sint32 waitStat(Sint32 sts);
/* Recovery processing for GFS_Init and GFS_LoadDir */
Sint32 recovGfsInit(void)
{
Sint32 ret;
CdcPos pos;
/* Issue PAUSE command */
CDC_POS_PTYPE(&pos) = CDC_PTYPE_NOCHG;
ret = CDC_CdSeek(&pos);
if (ret != CDC_ERR_OK) {
return NG;
}
/* Wait until <PAUSE> status */
ret = waitStat(CDC_ST_PAUSE);
return ret;
}
/* Wait until specified drive status */
Sint332 waitStat(Sint32 sts)
{
Sint32 ret;
Sint32 stwk;
CdcStat stat;
while (TRUE) { /*Actually upper limit for loop
count is necessary */
/* Get periodic response */
ret = CDC_GetPeriStat(&stat);
if (ret == CDC_ERR_PERI) {
continue;
}
if (ret != CDC_ERR_OK) {
return NG;
}
stwk = CDC_GET_STC(&stat);
if (stwk == sts) {
break;
}
}
return OK;
}
SEGA SATURN TECHNICAL BULLETIN #22
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: VDP1 and VDP2 Resolution Specification Changes
The following table shows the specifications of the horizontal resolution settings for VDP1 and
VDP2.
VDP2 setting (HRESO value) VDP1 setting (TVM value) Setting status
Normal mode Normal (000) Enabled
(000 or 001) High-resolution (001) Disabled
Rotation 16 (010) Enabled
Rotation 8 (011) Enabled
HDTV (100) Disabled
High-resolution mode Normal (000) Enabled *
(010 or 011) High-resolution (001) Enabled
Rotation 16 (010) Enabled *
Rotation 8 (011) Enabled *
HDTV (100) Disabled
Dedicated monitor mode Normal (000) Disabled
(100, 101, 110, or 111) High-resolution (001) Disabled
Rotation 16 (010) Disabled
Rotation 8 (011) Disabled
HDTV (100) Enabled
Note: The asterisks in the table indicate combinations for which the specification has changed.
SEGA SATURN TECHNICAL BULLETIN #23
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: VDP Interlace Settings
The following graphics will be displayed by the interlace setting of VDP2 (LSMD bit) and
VDP1 (DIE bit):
LSMD value DIE value VDP2 display VDP1 display
00 0 non-interlace non-interlace
1 non-interlace cannot display correctly
10 0 single-density single-density
interlace interlace
1 single-density double-density
interlace interlace
11 0 double-density single-density
interlace interlace
1 double-density double-density
interlace interlace
SEGA SATURN TECHNICAL BULLETIN #24
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: Changing VDP2 Screen Resolution
The following cautionary items are to be noted when changing from VDP2’s TV screen
mode to high-resolution mode:
• Normal scroll screen (NBG 0~3) is displayed as if a normal mode picture is reduced by
half, in the horizontal direction.
• Rotational scroll (RBG 0, 1) can be displayed, however, the picture resolution will be the
same as the normal mode’s.
• VRAM cycle pattern register becomes valid only for T0~T3, and becomes invalid for
T4~T7.
• Vertical cell scroll function is not available.
• There are some limitations for color operation function.
--> Please refer to “ VDP User’s Manual pg. 236, table 12.1”
• Expanded color calculation function and blur (gradation) calculation function is not
available.
SEGA SATURN TECHNICAL BULLETIN #25
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: Palette Format Sprite Display
When palette-format sprites are used, the picture may not be displayed for certain palette codes and
color bank values. The picture is not displayed because the dot data is processed as dot data
(normal shadow data) for the VDP2 shadow function. The table on the next page shows the sprite
data that is processed as normal shadow data for each sprite type set in VDP2.
For details on this topic, see Section 6.4, "CMDCOLR (Color Control Word)," in the VDP1
Hardware Manual (ST-013-R3-052794) and Section 14.1, "Shadow Processing," in the VDP2
Hardware Manual.
Normal Shadow Data According to Sprite Type
Sprite type Number of sprite colors Palette code Color bank
Types 0–3, 5 16 1110 xxxxx11111110000
64 xx111110 xxxxx11111xx0000
128 x1111110 xxxxx1111xxx0000
256 11111110 xxxxx111xxxx0000
Types 4, 6 16 1110 xxxxxx1111110000
64 xx111110 xxxxxx1111xx0000
128 x1111110 xxxxxx111xxx0000
256 11111110 xxxxxx11xxxx0000
Type 7 16 1110 xxxxxxx111110000
64 xx111110 xxxxxxx111xx0000
128 x1111110 xxxxxxx11xxx0000
256 11111110 xxxxxxx1xxxx0000
Types C–F 16 1110 xxxxxxxx11110000
64 xx111110 xxxxxxxx11xx0000
128 x1111110 xxxxxxxx1xxx0000
256 11111110 Not applicable
Type 8 16 1110 xxxxxxxxx1110000
64 xx111110 xxxxxxxxx1xx0000
128 x1111110 Not applicable
256 11111110 Not applicable
Type 9–B 16 1110 xxxxxxxxxx110000
64 xx111110 Not applicable
128 x1111110 Not applicable
256 11111110 Not applicable
SEGA SATURN TECHNICAL BULLETIN #26
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: Obtaining CD Directory Information
In order to get the directory information from the directory information table in the file
system library, the following function is to be used. The following function is available
and can be used from the ver1.10 (Disk ver 11/11/94) of the Software Library.
Title Function Function Name No
Function Get directory Information GFS_GetDirInfo 1.6
Specification
[ Format ] Sint 32 GFS_GetDirInfo(Sint32 fid, GfsDirId *dirrec)
[ Input ] fid : File identifier
[ Output ] dirrec: Directory Information
[ Function value ] Error code
[ Function ] Get directory information from file identifier.
SEGA SATURN TECHNICAL BULLETIN #27
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: Limitations in Monoral or Language Setting
When in monoral or language setting, the following limitations have to be followed. As for
the method and reference of the setting values, please refer to the “Programmer’s Guide /
System Library User’s Guide / SMPC I/F User’s Manual.
1. Setting Value Reference
The user setting contents which are set by the following multiplayers can be referenced
from the application. In the application, this setting value must be used as the default
value.
(1) Tone Output (stereo/mono)
(2) Language Setting
(3) Date, Time Setting
2. Setting Value Change
The user setting contents which are set by the following multiplayers can be changed from
the application. In the application, if they are changed by the users, the changed setting
value must be set.
(1) Tone Output (stereo/mono)
(2) Language Setting
3. Important !
The user setting contents which are set by the following multiplayers must not be changed
from within the application.
(1) Date, Time Setting
(2) Help Window (display / not to display)
(3) Effect Sound (ON / OFF)
(4) Reserve Area
SEGA SATURN TECHNICAL BULLETIN #28
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 9, 1995
RE: Using Dual CPU's on the SEGA SATURN
Tech Bulletin #28 begins on next page.
1. Preface
This manual explains how to use two CPUs (SH2) in the SEGA SATURN.
When the SEGA SATURN is activated, it operates with only the main CPU. To
activate the slave CPU, perform the procedures explained in this manual.
This manual is intended for readers who have a general knowledge of the SEGA
SATURN hardware and software. When reading this manual, use the following
manuals as references:
• “SH7095 Hardware Manual”
• “SCU User ’s Manual (Hardware Manual Vol. 1)”
• “System Program User’s Manual (Programmer’s Guide Vol. 1 System Library)”
• Software library document files
(See MANSYS.DOC in /SATURN/SEGALIB/MAN.)
• “SEGA SATURN Target Box User’s Manual” (shipped with the Target Box)
2. Overview of Dual CPU Operation in the SEGA SATURN
This section gives an overview of dual CPU operation in the SEGA SATURN.
2.1 Fully Shared Mode (Memory Sharing)
In the SEGA SATURN, the slave CPU shares all external devices with the master
CPU. Programs that are executed by the slave CPU and the reset vector that is ob-
tained at reset are exactly the same as those of the master CPU.
However, the master CPU and the slave CPU are identified in the boot ROM because
each must be initialized independently.
If the slave CPU and master CPU conflict during external access, one of the CPU's
must wait for access. Meanwhile, execution speed decreases.
2.2 Dual CPU Communications Using the Free Running Timer (FRT)
One of the ways the master and slave CPUs communicate in the SEGA SATURN is
by using the input capture signal of the free running timer (FRT) in an internal SH2
on-chip module.
Specifically, the FRT input capture signal can be input to the slave CPU by writing
any 16-bit value to address 21000000H. The FRT input capture signal can also be
input to the master CPU by writing any 16-bit value to address 21800000H.
Using Dual CPUs on the SEGA SATURN 1
2.3 Slave CPU Interrupts
Unlike the master CPU, slave CPU interrupts are not set from the SCU. Instead, the
slave CPU interrupts are connected from a peripheral module called DCC, which
controls dual CPU operation. The slave CPU interrupts are described below.
(1) Interrupts used by the slave CPU.
The slave CPU can use the following three interrupts:
➀ Internal peripheral module interrupt of the slave CPU.
The slave CPU can use interrupts generated by six internal peripheral
modules, including the free running timer (FRT).
➁ H-blank-in interrupt
The interrupt source is IRL2, and the vector number is 65 (41H).
➂ V-blank-in interrupt
The interrupt source is IRL6, and the vector number is 67 (43H).
Unlike the master CPU, the slave CPU does not have an SR mask restriction.
To mask interrupts, use the SR mask.
(2) H-blank-in interrupts and V-blank-in interrupts
In the slave CPU, both the H-blank-in and V-blank-in interrupts are level signal
interrupts that accept interrupts during the blank period. For example, when V-
blank-in interrupt processing begins and ends, the interrupt is restarted as long
as the V-blank period continues.
To call an interrupt function only once for an interrupt, use one of the following
two methods to set up the necessary processing in the application.
➀ Waiting for blank termination in the interrupt function.
The following are two ways of waiting for blank termination.
• Monitor the blank flag in the VDP2 screen status register, and return control from the
interrupt function when the blank period ends.
• At the start of interrupt processing, set a timer to the length of the blank period, and
then return control from the interrupt function after verifying that the set time has
elapsed.
With the first method, the performance of the master CPU may drop
because an external address (VDP2 address) is accessed.
➁ Using the interrupt mask when control is returned
To prevent reception of the same interrupt, use the interrupt mask that
was saved in the stack and do not return the interrupt mask during the
blank period even after the interrupt function returns control.
Timer interrupts must be used to implement this method. However, when
the H-blank-in and V-blank-in timer interrupts are used, the internal
interrupt must be set to a higher level than the timer interrupts.
2
3. Setting Up a Development Environment for Dual CPU Operation
This section describes how to set up a development environment for dual CPU
operation as well as debug methods.
3.1 Dual CPU Software Development
To develop applications for dual CPU operation, connect a CPU board and either an
E7000 emulator or an EVA board to both the master and slave sides.
3.2 Setting Up the E7000 Emulator
When using an E7000 emulator as the slave CPU, use the emulator MODE command
to set the slave CPU to slave mode.
[Slave set up]
: mode;c(RET)
E7000 MODE(MD5-0)=xx? 2E(RET)
MODE SET (C:CONFIGURATION/U:USER/M:MASTER-SLAVE)=X? C(RET)
CONFIGURATION WRITE OK?(Y/N)? Y(RET)
Note: For the master CPU, set E7000 MODE(MD5-0)=XX? 0E(RET).
3.3 Setting Up the EVA Board
When using an EVA board as the slave CPU, set the following:
(1) Reset clear
Use the master CPU emulator to release the slave CPU reset.
[Release method]
: m 2010001f;b(RET)
2010001f xx ? 02(RET)
20100020 xx ? .(RET)
The above set up starts the EVA board connected to the slave CPU.
(2) Confirm the following
Check that the EVA board connected to the slave CPU is em ct=d.
(3) Note
When using an EVA board with the slave CPU, the EVA board cannot be oper-
ated until the slave CPU reset is cleared.
Using Dual CPUs on the SEGA SATURN 3
3.4 Debugging Environment
Depending on the environment used, possible configurations are as follows:
(1) Development using a workstation.
When developing applications on a workstation (Sun SPARC series or HP9000/
700 series), use an E7000 emulator for both the master CPU and the slave CPU.
(The EVA board cannot be used with workstations.)
Any combination of GUISH and LAN host system software can be used.
(2) Development using a PC Compatible.
Applications can be developed using one or two PC-Compatibles. When two
PCs are used, the master and slave CPUs can be operated simultaneously. Any
combination of GUISH or IPI software can be used.
However, when only one PC is used, the master and slave CPUs are operated
separately via the switching of windows. (See “8. Debugging with One PC
Compatible” in this manual for more information.)
4
4. Programming with a Slave CPU
4.1 Program Sharing
Because the slave and master CPUs share all external devices, either CPU can run an
executable file at any location. (If the cache is used as internal RAM, any program
placed in internal RAM is not shared.)
4.2 Stack Variables and Static/Global Variables
Separate stack areas are allocated for the slave CPU and the master CPU according
to the boot ROM settings. Therefore, both CPUs can execute reentrant functions
simultaneously. However, if both CPUs execute programs that overwrite static or
global variables, be sure to note the execution sequence and concurrent executions in
each CPU.
4.3 Initializing the Slave CPU
When the master CPU activates the slave CPU, it overwrites the execution entry
read by the boot ROM after initialization (SYS_SETSINT (0x94, EntryFunc);), then
uses the slave SH2 ON function (PER_SMPC_SSH_ON) of the SMPC interface library
to release the slave reset.
Note: EntryFunc is a slave entry function.
4.4 Initialization by the Boot ROM (Vector and Stack)
(1) The boot ROM initializes the slave CPU as follows:
• Vector base register (VBR): Address 6000400H
• Stack pointer (SP): Address 6001000H
• Interrupt initialization: Enable FRT input capture interrupt (64H , level 15)
(2) The slave CPU vector table in work RAM is not modified when the slave SH2 is
turned on or off.
4.5 Changing the Clock
When the clock is changed, SMPC switches the slave CPU to reset status. Therefore,
always restart the slave CPU with either the SMPC command (SSH_ON = 02H) or the
slave SH2 ON function (PER_SMPC_SSH_ON) of the SMPC interface library after
changing the clock.
4.6 Notes on Slave CPU Usage
The following items cannot be executed from the slave CPU:
• SEGA SATURN Audio CD Control Screen call function
• Programs that assume the use of SCU Interrupts
• Processes related to peripheral acquisition of the SMPC interface library peripheral data
acquisition processes.
Using Dual CPUs on the SEGA SATURN 5
5. Communication Between the Master and Slave CPUs
This section explains methods of communication between the master CPU and the
slave CPU. (Refer to Chapter 11, “16-bit Free Running Timer,” in the “SH7095 Hard-
ware Manual” for more information.)
5.1 Communication from Master CPU to Slave CPU
A bi-directional communication method is necessary to coordinate operation be-
tween the master and slave CPUs. Communication from the master CPU to the
slave CPU can be implemented using either of the following methods:
(1) FRT input capture interrupt
The slave CPU is set during boot ROM initialization with the FRT input capture
interrupt. If an interrupt processing routine is registered to 64H of the slave CPU
interrupt vector in the application initialization routine, processes that occur
when an interrupt is triggered can be set from the master CPU. (When regis
tered from the master CPU, the interrupt vector is 164H.) To trigger the FRT
input capture interrupt from the master CPU, execute a 16-bit write to address
21000000H with any value. The slave CPU then starts the interrupt process that
was previously registered.
(2) FRT input capture flag polling
When the SH2 CPU accepts the FRT input capture flag, it sets the flag in the
FRT's internal register. This means that modification of the flag can be moni-
tored during processing wait state (or synchronization wait state). When the
frequency of synchronization or processing wait is large, this method becomes
especially effective because the acceptance time is shorter than the interrupt
processing time. When using this method, be sure to disable the FRT input
capture interrupt in the application initialization routine. (Set byte value 01H to
TIER address FFFFFE10H.)
5.2 Communication from Slave CPU to Master CPU
The SEGA SATURN system also provides methods for communication from the
slave CPU to the master CPU. The same methods provided for communication from
the master CPU to the slave CPU are available.
(1) FRT input capture interrupt
The master CPU is set during boot ROM initialization with the FRT input cap-
ture interrupt. If an interrupt processing routine is registered to 64H of the
master CPU interrupt vector in the application initialization routine, processes
that occur when an interrupt is triggered can be set from the slave CPU. To
trigger the FRT input capture interrupt from the slave CPU, execute a 16-bit
write to address 21800000H. The master CPU then starts the interrupt process
that was previously registered.
(2) FRT input capture flag polling
Same as 5.1 (2).
6
6. Data Transfer Between the Master and Slave CPUs
The SH2 CPU cache unit does not have a snoop function. To transfer data between
the master and slave CPUs, execute a cache-through read from the CPU that reads
the data, or execute read after purging the cache of the target area. (For details on
the cache, refer to chapter 8, “Cache,” in the “SH7095 Hardware Manual.”)
6.1 Cache-Through Read
Cache-through read is performed by reading from the address obtained after adding
(logical OR) 20000000H to the target address. (For more details, refer to pages 4 to 6,
“SCU Mapping,” in the “SCU User’s Manual.”)
6.2 Cache Initialization (Purging)
The cache memory can be purged by two methods:
(1) Cache purge (full initialization)
At initialization, purge the cache memory by writing 1 to the CP bit (fourth bit)
of the SH2's CCR (write byte value 10H to address FFFFFE92H). After executing
full initialization, write values to the CCR and enable the cache.
Write values: when using 4 KB cache mode 01H
when using 2 KB cache + 2 KB RAM 09H
(2) Specific line purge
To purge a specific line, add 40000000H to the target address and write 0 by
16-bit access to the resulting address. This operation purges a 16-byte area that
includes the target address.
Using Dual CPUs on the SEGA SATURN 7
7. Slave CPU Sample Program
This section shows a sample program that uses the slave CPU. The program demon-
strates the use of the FRT input capture flag polling.
7.1 Initialization and Activation Functions for the Slave CPU
The following program uses functions that initialize and activate the slave CPU and is
executed in the master CPU.
volatile Uint8 *SMPC_SF =(Uint8 *)0x20100063; /* SMPC status flag */
volatile Uint8 *SMPC_COM =(Uint8 *)0x2010001F; /* SMPC command register */
const Uint8 SMPC_SSHON = 0x02; /* SMPC slave SH on command */
const Uint8 SMPC_SSHOFF = 0x03; /* SMPC slave SH off command */
void InitSlaveCPU(void)
{
volatile Uint16 i;
/* Set Slave SH to reset state */
while((*SMPC_SF & 0x01) == 0x01);
*SMPC_SF = 1; /* — SMPC StatusFlag Set */
*SMPC_COM = SMPC_SSHOFF; /* — Slave SH OFF SET */
while((*SMPC_SF & 0x01) == 0x01);
SYS_SETSINT(0x94, (void *)&SlaveCPUmain); /* Set Entry Function */
/* Clear reset state of Slave SH */
*SMPC_SF = 1; /* — SMPC StatusFlag Set */
*SMPC_COM = SMPC_SSHON; /* — Slave SH ON SET */
while((*SMPC_SF & 0x01) == 0x01);
}
7.2 Entry Functions from Master CPU to Slave CPU
The following program uses the FRT input capture flag polling method.
#define IPRA (Uint16 *)0xfffffee2
#define IPRB (Uint16 *)0xfffffe60
#define TIER (Uint8 *)0xfffffe10
#define FTCSR (Uint8 *)0xfffffe11
void SlaveCPUmain(void)
{
/* Wait until SlaveCommand is set */
/* then call function for SlaveCommand */
set_imask(0xf);
*IPRA = 0x0000; /* IPRA interrupt disabled */
*IPRB = 0x0000; /* IPRB interrupt disabled */
*TIER = 0x01; /* TIER FRT Input Capture interrupt disabled */
while(1){
/* User “FRT InputCaptureFlag” polling for wait command from Master */
if((*FTCSR & 0x80) == 0x80){
*FTCSR = 0x00; /* FTCSR clear */
/* Execute function requested from master CPU */
(*(void (*)(void)*(void **)((Uint32)&SlaveCommand+0x20000000))();
SlaveCommand = (void *)0; /* RESET request code */
}
}
}
8
7.3 Function Execution Requests from Master CPU to Slave CPU
extern void SlaveFunction(void);
SlaveCommand = SlaveFunction;
*(Uint16 *)0x21000000 = 0xffff;/* FRT Input Capture for Slave */
8. Debugging with One PC Compatible
The following two methods can be used to debug dual CPU applications with one
PC Compatible connected to an E7000 PC and an EVA board.
8.1 Set Up and Operation When Only IPI Is Used
Open two DOS prompts in MS-Windows, and run IPI in each window. The set up
procedure is explained below. It is assumed that the E7000 is connected to the mas-
ter side and the EVA board to the slave side.
• Set up example
Tool used Software used PC interface board (Dip SW)
Address (1–5) Interrupt level (6–7)
Master side E7000 PC IPI.EXE D000:0000 H IRQ11
Slave side EVA board IPI.EXE D400:0000 H IRQ12
(These settings must not interfere with the settings of other expansion boards.)
(1) Setting up the physical memory address of the PC interface board
The master CPU's PC interface board (master board) and the slave CPU's PC
interface board (slave board) must have different physical address settings. In
the set up example above, the address for the master board is set to D000:0000H.
The address for the slave board is set to D400:0000H.
(2) Setting up CONFIG.SYS
If a virtual EMS memory driver is incorporated into CONFIG.SYS, the
CONFIG.SYS settings must be changed. For set up instructions, refer to pages 6
and 7 in the “IBM PC Interface Software User’s Manual.” In the set up example
above, the memory address ranges (D0000H to D3FFFH and D4000H to D7FFFH)
of the master and slave boards are set outside the range of the virtual EMS
driver. To set the base address of the EMS page frame to E0000H, specify the
following line:
DEVICE=C:\WINDOWS\EMM386.EXE RAM /X=D000-D7FF FRAME=E000
(3) Setting up SYSTEM.INI
To set the memory address ranges (D0000H to D3FFFH and D4000H to D7FFFH)
of the master and slave boards outside the memory range of MS-Windows,
modify the SYSTEM.INI file. The setting for the set up example is as
follows:
[386Enh]
EMMExclude=D000-D7FF
Using Dual CPUs on the SEGA SATURN 9
(4) Setting up environment variables
Set up the environment variables that are used by the master and slave boards.
To facilitate processing, define these environment variables in the
AUTOEXEC.BAT file. In the environment variables, specify the physical memory
addresses of the master and slave boards. If the addresses are not set, both
copies of IPI will use the master board concurrently.
The setting for the set up example is as follows:
SET SYS1=C:\SYS1,1B,D0 Environment variable for master IPI
(E7000 PC system program must be installed to \SYS1.)
SET SYS2=C:\SYS2,1B,D4 Environment variable for slave IPI
Note: If the E7000 PC is being used on the slave side, the E7000 PC system program must also be
installed to \SYS2.
(5) Activating the master and slave boards from IPI
➀ Activating the master
Activate the DOS prompt of the main group in MS-Windows, then enter
the following command to activate IPI and connect the E7000 PC:
C:\>IPI SYS1(RET)
At the E7000 monitor menu, enter “S” or “R” to load the E7000 PC system
program. After the E7000 PC prompt “:” is displayed, activate the slave.
➁ Activating the slave
Again, activate the DOS prompt window from MS-Windows. Then
enter the following command to activate IPI and connect the EVA board:
C:\>IPI SYS2(RET)
After the EVA board prompt “:” is displayed, activate the EVA board
according to the procedure described in Section 3.3, “Setting Up the EVA
Board.”
10
8.2 Set Up and Operation When GUISH Is Used
Two copies of GUISH (GUI software for the E7000) cannot be run simultaneously.
Operate GUISH for one side and IPI for the other. The set up procedure for execut-
ing IPI and GUISH simultaneously is explained below. It is assumed that E7000 PCs
are connected to both the master side and the slave side.
• Connection example
Tool used Software used PC interface board (Dip SW)
Address (1–5) Interrupt level (6–7)
Master side E7000 PC GUISH.EXE D000:0000 H IRQ11
Slave side E7000 PC IPI.EXE D400:0000 H IRQ12
(These settings must not interfere with the settings of other expansion boards.)
(1) Setting the physical memory address of the PC interface board
The memory address of the PC interface used by GUISH must be higher than
the memory address of the PC interface used by IPI.
In the set up example above, GUISH is used on the master side. Therefore,
the memory address for the master side is set to D000:0000H, which is higher
than D400:0000H, the memory address for the slave side.
(2) Setting up CONFIG.SYS
Execute the set up described in item (2) of Section 8.1.
(3) Setting up SYSTEM.INI
Execute the set up described in item (3) of Section 8.1.
(4) Setting up environment variables
Set up the environment variables to be used by GUISH (master side) and IPI
(slave side). To facilitate processing, define these environment variables in the
AUTOEXEC.BAT file. In the environment variable used by IPI, specify the
memory address of the slave board. If the address is not set, both GUISH and
IPI will use the master board simultaneously.
The settings for the set up example is as follows:
SET GUISHPATH=C:\GUISH Environment variable for GUISH
SET E7000SYS=C:\SYS2,1B,D4 Environment variable for IPI
Using Dual CPUs on the SEGA SATURN 11
(5) Activating the master and slave boards
➀ Activating the master (GUISH)
Click the E7000 PC icon of the GUISH group in MS-Windows. GUISH is
run and connects to the E7000 PC.
The E7000 monitor menu is displayed in the GUISH command area. In the
E7000 monitor menu, enter “S” or “R” to load the E7000 PC system program.
After the E7000 PC prompt “:” is displayed, activate the slave.
➁ Activating the slave
Activate the DOS prompt window in MS-Windows, then enter the following
command to activate IPI and establish a connection with the EVA board:
C:\>IPI(RET)
At the E7000 PC monitor menu, enter “S” or “R” to load the E7000 PC
system program. After the E7000 PC prompt “:” is displayed, activate the
slave.
12
SEGA SATURN TECHNICAL BULLETIN #29
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: Setting CD-DA Volume in Applications
When setting the CD-DA volume in SEGASATURN applications, lower the CD-DA level
by 6 dB. This change reduces the difference between the CD-DA volume and the sound
CD play volume in the multi-player screen.
Instructions
The following describes detailed setting instructions for:
1. Setting the hardware directly
2. Setting the CD-DA volume with the Saturn Sound Driver.
3. Setting the CD-DA volume with the sound interface library
Supplement
To produce a special effect or to change the CD-DA level dramatically, use the sound CD
level in the multi-player screen as a reference and match the sound levels as closely as
possible.
1. Setting the hardware directly
For each slot, change the setting for the EFSDL[2:0] control register from 111B (-0 dB) to
110B (-6 dB). Details are described below.
The left and right slot numbers for CD-DA are 16 and 17.
Left channel: Write DFH to the slot 16 address 100200H + 17H.
Contents: EFSDL[2:0] = 110B (send level) and EFPAN[4:0] = 11111B (position data)
Right channel: Write CFH to the slot 17 address 100220H + 17H.
Contents: EFSDL[2:0] = 110B (send level) and EFPAN[4:0] = 01111B (position data)
When accessing the channels from the main CPU, use the following addresses:
Left channel = 25B00200H + 16H
Right channel = 25B00220H + 16H
Use word access when accessing the addresses from the main CPU.
For details, see Section 4.1, "Register Map," on page 24 of the "Hardware Manual Vol.
1/SCSP User's Manual /Rel. 2(ST-077-R2-052594)."
2. Setting the CD-DA volume with the Saturn Sound Driver.
Use the CD-DA Level command (command number 80H) of the Saturn control commands,
and change the data from E0H (-0 dB) to C0H (-6 dB). Specifically, write the following
data to command block 1 (+00H) of the host interface work (700H):
Data = 80H, 00H, C0H, C0H
Meaning = command, dummy, left level, right level
For details, see "Sound Control Commands" on page 22 of the "Saturn Sound Driver
System Interface /Ver. 3.01(ST-166-R4-012595)" in the "CD Tools and Software Library
Supplementary Document."
3. Setting the CD-DA volume with the sound interface library
Use the Function DC-DA Level setting. Change the setting values for both left and right
from 7 (-0 dB) to 6 (-6 dB). The actual format is as follows:
SND_SetCdDaLev(6, 6)
For details, see page 2 of the "Programmer's Guide Vol. 1/Program Library User's
Guide/Sound Interface Library/Rel. 3(ST-135-R3-012395)."
SEGA SATURN TECHNICAL BULLETIN #30
To: Sega and Third Party Developers
From: Developer Technical Support
Date: June 2, 1995
Re: Temporary Files Created When Building Disc Image
When a disc image is built or preprocessed with the virtual CD, the following temporary
files are created in addition to the generation files. Consider these files when allocating the
necessary HDD capacity.
VCDBUILD
The following files are created in addition to the "*.dsk" and "*.rti" files. These temporary
files are deleted when processing of the corresponding ISO files ends.
• Temporary file when the MPEG ISO file is processed. The file size is:
12 bytes x (number of sectors in ISO file)
• Temporary file when a channel interleaved ISO file is processed. The file size is:
2 bytes x (number of sectors in ISO file)
VCDPRE
The following files are created in addition to the "*.pvd" and "*.rti" files. These temporary
files are deleted when processing of the corresponding ISO files ends.
• Temporary file when the MPEG ISO file is processed. The file size is:
12 bytes x (number of sectors in ISO file)
• Temporary file when a channel interleaved ISO file is processed. The file size is:
2 bytes x (number of sectors in ISO file)
• "*.qsb" file for each source DOS file used for audio tracks. The file size is:
98 bytes x (number of sectors)
SEGA SATURN TECHNICAL BULLETIN #31
To: Sega and Third Party Developers
From: Developer Technical Support
Date: May 6, 1996
Re: Changes in Area Symbols
The area symbols for Sega Saturn territory identifiers have changed as follows:
Table of Area Symbols Symbol Changes
Korea Brazil Asia PAL Central and
South
America
OL 6H "K" 5H "B" AH "A" DH "L"
D
NE 2H "T" 4H "U" CH "E" CH "E"
W
• The hex numbers denote the area symbols set in the Sega Saturn hardware.
• Although noted throughout in the manual as "area code", the terminology has now been changed to
"area symbol".
Cautions
• The area codes "K", "B", "A" and "L" are no longer used. Please note that the
information regarding these areas contained in the explanation of the Boot
System in Sega Saturn Technical Bulletin #11 is no longer valid.
• The area symbols 5H, 6H, AH, and DH are now all SEGA RESERVED. Please replace
pages 39 and 40 in the SMPC User's Manual with the following pages that reflect
the changes.
Result Parameters
bit 7 bit 4 bit 3 bit 0
SR 201006H 0 1 PDE RESB — — — —
• PDE 0: No peripheral data remains.
1: Peripheral data remains.
• RESB 0: Reset button OFF
1: Reset button ON
Can be read at any time regardless of the INTBACK command.
bit 7 bit 0
OREG0-2010021H STE RESD — — — — — —
• STE 0: SETTIME is not set after an SMPC cold reset.Note 1
1: SETTIME is not set after an SMPC cold reset.Note 1
• RESD 0: Reset enable
1: Reset disable (default)
Note 1 An SMPC cold reset is generated under the following conditions:
1. When the SMPC reset switch is pressed inside the battery compartment at the rear of the
Saturn.
2. When the main power supply is turned on while the battery is not installed or dead.
3. When a battery is installed with the power supply off.
bit 7 bit 0
OREG1 2010023H "1000" place in Western calendar "100" place in Western calendar (BCD)
year year
OREG2 2010025H "10" place in Western calendar "1" place in Western calendar (BCD)
year year
OREG3 2010027H Day of the weekNote 2 Month (hexadecimal) Note 3 (BCD)
Note 2
Day of the week: 0H: Sunday, 1H: Monday, 2H Tuesday, 3H: Wednesday, 4H: Thursday, 5H: Friday, 6H:
Saturday
Note 3
Month: 1H: January, 2H: February, 3H March, 4H: April, 5H: May, 6H: June, 7H: July, 8H:
August, 9H: September, AH: October, BH: November, CH: December
bit 7 bit 0
OREG4 2010029H "10" place in date "1" place in date (BCD)
OREG5 201002BH "10" place in hour "1" place in hour (BCD)
OREG6 201002DH "10" place in minute "1" place in minute (BCD)
OREG7 201002FH "10" place in second "1" place in second (BCD)
OREG8 2010031H 0 0 0 0 0 0 CTG1 CTG0
CTG1: Cartridge code 1
CTG0: Cartridge code 0
bit 7 bit 0
OREG9 2010033H Area code (00H-0FH)
Area Symbols
Area Symbol Area Principal Countries
0H May not be used
1H Japan Japan
2H Asia NTSC Taiwan, Philippines, Korea
3H SEGA RESERVED
4H North America (Americas) United States, Canada, Mexico, Brazil
5H SEGA RESERVED
6H SEGA RESERVED
7H SEGA RESERVED
8H SEGA RESERVED
9H SEGA RESERVED
AH SEGA RESERVED
BH SEGA RESERVED
CH European PAL, and other PAL Most of Europe as well as Australia, South
countries. Africa, Asia, Central and South America
DH SEGA RESERVED
EH SEGA RESERVED
FH May not be used
bit 7 bit 0
OREG10 2010035H System status 1
System Status 1 (Status of control signals output from SMPC, 0: OFF, 1: ON)
• b7 0B • b6 DOTSEL signal* • b5 1B
• b4 1B • b3 MSHNMI signal • b2 1B
• b1 SYSRES signal • b0 SNDRES signal
* The DOTSEL signal indicates the current screen mode (horizontal resolution- 0:
320, 1: 352).
bit 7 bit 0
OREG11 2010037H System status 2
System Status 2 (Status of control signals output from SMPC, 0: OFF, 1: ON)
• b7 RESERVED • b6 CDRES signal • b5 RESERVED
• b4 RESERVED • b3 RESERVED • b2 RESERVED
• b1 RESERVED • b0 RESERVED
SEGA SATURN TECHNICAL BULLETIN #32
To: Sega and Third Party Developers
From: Developer Technical Support
Date: November 8, 1995
Re: Differences in Sega Saturn Hardware and
Peripheral Color/Form Factor
Differences in Sega Saturn Hardware and Peripheral Color/Form Factor
The colors and shapes of the Sega Saturn and Sega Saturn peripherals differ for the US and
the rest of the world. Please pay attention to the displayed images of the Saturn hardware
and peripherals within the application if it is sold in other markets . Note, however, that the
peripheral IDs and access methods are the same for all versions of the hardware.
1 . Changes in Colors and/or Form Factor
Japan (Gray) US (Black) Europe (Black)
1 Sega Saturn Control Pad Control Pad
Control Pad
2 Mission Stick Mission Stick Mission Stick
2 . Color Change Only
Japan (Gray) US (Black) Europe (Black)
3 Sega Saturn Sega Saturn Sega Saturn
4 Racing Controller Arcade Racer Arcade Racer
5 Shuttle Mouse Sega Saturn Mouse Mouse
6 Multi Terminal 6Player 6Player
7 VirtuaStick VirtuaStick VirtuaStick
3 . Changes Between Versions for Japan and the Overseas
• For 1, the color is black and the shape differs greatly. The European and the US
versions are the same.
• For 2, the grip and buttons B and C are larger. The European and US versions are the
same.
• For 4, the START and butterfly-shaped shifter are gray in color. The European and US
versions are the same.
• For 3, 5, 6, and 7, everything is black. The European and US versions are the same.
4 . Addenda
For areas other than the US, Europe, and Japan, please contact Sega Technical Support.
SEGA SATURN TECHNICAL BULLETIN #33
To: Sega and Third Party Developers
From: Developer Technical Support
Date: November 8, 1995
Re: Additional VDP2 Restrictions
Additional VDP2 Restrictions
This document adds an additional restriction item for the VDP 2. This information is an
addition to the other VDP2 specification restrictions found in Sega Saturn Technical
Bulletin #12. (Note that Bulletin #12 has a different document title.)
NEW RESTRICTION
4 . Restriction on Horizontal Flip Function Bits
The horizontal flip function bits of the cell-format normal scroll screen (NBG0 and
NBG1) are only valid when the number of character colors is 16 or 256. Otherwise, do
not set NBG0 or NBG1 to "1".
References
VDP2 User Manual (Rel. 2), page 75, "Horizontal Flip Function Bits".
A list of the revised VDP2 limitations, including 4. above, is shown below:
VDP2 Specification Restrictions
1 . Burst Reads from VRAM are Prohibited
SCU DRAM reads may not be performed to VRAM.
2 . Restriction on Switching Horizontal Resolution
Always use the boot ROM's internal service routines when switching the horizontal
screen resolution.
3 . Valid V-Blank Flag Period Restriction
The VBLANK bit (bit 3) of the screen status register (TVSTAT: 180004H) is valid
only when the DISP bit of the TV screen mode register (TVMD: 180000H) is 1. When
the DISP bit is 0, the VBLANK bit is always 1.
4 . Restriction on Horizontal Flip Function Bits (NEW)
The horizontal flip function bits of the cell-format normal scroll screen (NBG0 and
NBG1) are only valid when the number of character colors is 16 or 256. Otherwise, do
not set NBG0 or NBG1 to "1".
SEGA SATURN TECHNICAL BULLETIN #34
To: Sega and Third Party Developers
From: Developer Technical Support
Date: February 21, 1996
Re: Sega Saturn Mission Stick Application Manual
Sega Saturn Mission Stick Overview
• Three-Axis Mode
The Sega Saturn Mission Stick is composed of a base unit and a detachable stick unit.
The base unit has two stick connector ports (Main Control and Sub Control) as well as
A, B, C, X, Y, Z, L, R and START buttons. The connector on the base unit is plugged
into a control port on the Sega Saturn. The stick unit is composed of a three-axis (AX,
AY, AZ) joystick equipped with three trigger buttons A, B and C. It is connected to the
Main Control port of the base unit. Digital data bits (Right, Left, Down, Up) are
output for AX and AY.
Note: When there is only one stick available, it must always be connected to the Main
Control port of the base unit.
• Six-Axis Mode
Connect the optional stick (sold separately) to the Sub Control port to enable the six-
axis mode. Digital data bits (Right, Left, Down, Up) are output only from the stick
connected to the Main Control port. Moreover, the A, B and C trigger buttons of the
stick connected to the Main Control port are output to ATRG, BTRG and CTRG, while
the A, B and C triggers of the stick connected to the Sub Control port are output to
XTRG, YTRG and ZTRG.
Reference
See pages 77, 83 and 97 of Hardware Manual Vol. 1, Rel. 2, SMPC User Manual for
more information.
The following pages show the data formats for the Mission Stick's three-axis mode and
six-axis modes.
Sega Saturn Mission Stick Data Formats
1 . Three-Axis Mode
Saturn Peripheral ID
Saturn Peripheral Type: 1H (Analog device)
Data Size: 5H (5 bytes)
Table 1.1 Three-Axis Mode Data Format
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
SATURN Peripheral 0 0 0 1 0 1 0 1
ID
1st Data Right Left Down Up Start ATRG CTRG BTRG
2nd Data RTRG XTR YTRG ZTRG LTRG 1 1 1
G
3rd Data AX7 AX6 AX5 AX4 AX3 AX2 AX1 AX0
4th Data AY7 AY6 AY5 AY4 AY3 AY2 AY1 AY0
5th Data AZ7 AZ6 AZ5 AZ4 AZ3 AZ2 AZ1 AZ0
• Start, ATRG, CTRG, BTRG, RTRG, XTRG, YTRG, ZTRG and LTRG become 0 when
the button is pressed.
• For AX7~AX0, AY7~AY0 and AZ7~AZ0, the absolute values of the unsigned A/D
converter output is issued.
• For AX7~AX0 and AY7~AY0, the upper left is (0,0) and the lower right is (255,255).
• For AZ7~AZ0, down is 0 and up is 255.
The digital bits (Right, Left, Up, Down) that are used to enable the user to navigate
around menu screens such as the Sega Saturn's CD control screen change according to
the AX and AY threshold values shown below.
AY
00 UP
ON 86
OFF 107
ON OFF OFF ON
AX
00 86 107 149 170 255
LEFT RIGHT
OFF 149
ON 170
255 DOWN
• Right becomes 0 (ON) when AX is 170 or higher and 1 (OFF) when AX is 147 or
lower.
• Left becomes 0 (ON) when AX is 86 or lower and 1 (OFF) when AX is 107 or higher.
• Down becomes 0 (ON) when AY is 170 or higher and 1 (OFF) when AY is 147 or
lower.
• Up becomes 0 (ON) when AY is 86 or lower and 1 (OFF) when AY is 107 or higher.
2 . Six-Axis Mode
Saturn Peripheral ID
Saturn Peripheral Type: 1H (Analog device)
Data Size: 9H (9 bytes)
Table 2.1 Six-Axis Mode Data Format
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
SATURN Peripheral 0 0 0 1 1 0 0 1
ID
1st Data Right Left Down Up Start ATRG CTRG BTRG
2nd Data RTRG XTR YTRG ZTRG LTRG Expansion Data
G
3rd Data AX7 AX6 AX5 AX4 AX3 AX2 AX1 AX0
4th Data AY7 AY6 AY5 AY4 AY3 AY2 AY1 AY0
5th Data AZ7 AZ6 AZ5 AZ4 AZ3 AZ2 AZ1 AZ0
6th Data * * * * Expansion Data
7th Data BX7 BX6 BX5 BX4 BX3 BX2 BX1 BX0
8th Data BY7 BY6 BY5 BY4 BY3 BY2 BY1 BY0
9th Data BZ7 BZ6 BZ5 BZ4 BZ3 BZ2 BZ1 BZ0
• The six-axis mode is based on the three-axis mode protocol.
• The 7th~9th data are used as the analog data of the second stick connected to the Sub
Control port of the base unit.
• Data is undefined for the bits shown with asterisks in the table above. As a result, the
digital bits (Right, Left, Up, Down) of the second stick cannot be used.
Note: Digital bits are valid only for the stick connected to the Main Control port of
the base unit. They have the same threshold values as in the three-axis mode.
• Start, ATRG, BTRG, CTRG, RTRG, XTRG, YTRG, ZTRG and LTRG become 0 when
the button is pressed.
• The Main Control stick data for triggers A, B and C are output as ATRG, BTRG and
CTRG, respectively.
• The Sub Control stick data for triggers A, B and C are output as XTRG, YTRG and
ZTRG, respectively.
• AX7~AX0, AY7~AY0, AZ7~AZ0, BX7~BX0, BY7~BY0 and BZ7~BZ0 are absolute
values of the unsigned A/D converter output data.
• For AX7~AX0, AY7~AY0, BX7~BX0 and BY7~BY0, the upper left is (0,0) and lower
right, (255,255).
• For AZ7~AZ0 and BZ7~BZ0, down is 0 and up, 255.
Figure 1 Explanation of the Sega Saturn Mission Stick Controls
SEGA SATURN TECHNICAL BULLETIN #35
To: Sega and Third Party Developers
From: Developer Technical Support
Date: November 8, 1995
Re: Change in the 1st Read File Load Area Size
Change in the 1st Read File Load Area Size
The legal memory area for loading the 1st read file has been changed as follows. This
change is limited to the 1st read file- there are no other effects.
Before After
6002000H + IP Size 6002000H + IP Size
Legal 1st Read
File Load Area
Legal 1st Read
File Load Area
60FF000H
System Area
60FFFFFH 60FFFFFH
The 1st read file cannot be loaded into the memory area between 60FF000H to 60FFFFFH
since it is used by the system. After 1st read file is loaded, the area is released to the
application.
• System Work Areas and Areas Released to the Application
• Addresses 6000000H to 6001FFFH are used by the system, so they cannot be used by
the application. However, 6000E00H to 6001FFFH may be used for stacks.
• After the IP process finishes and the application is running, up to 6001000H can be
used by the application if a stack is set up elsewhere. Similarly, up to 6000E00H can be
used by the application if a stack is set up elsewhere.
Example
6000000H
Vectors,
Resident Routines
6000E00H
Slave SH Stack
6001000H
Master SH Stack
6002000H
SEGA SATURN TECHNICAL BULLETIN #36
To: Sega and Third Party Developers
From: Developer Technical Support
Date: May 6, 1996
Re: Saturn Hardware Chip Initialization
Important:
Always observe the guidelines found in the Saturn software/hardware
development manuals regarding hardware restrictions and undefined operations.
The effects of these restrictions and operations will differ between different
revisions of the Saturn hardware.
Also, make sure to initialize each hardware chip device with your application.
Since the default values set by the boot ROM in the VDP1, VDP2, and SCSP during
the boot process remain in those devices after startup, never allow the application to
use those values as default settings.
Example 1: Caution on bits ECD and SPD of the polygon draw command:
To use the polygon draw command, set the ECD and SPD bits (bits 7, 6)
of the draw mode word (CMDPMOD) to the fixed value "1". The
operation is not guaranteed when "0" is specified.
Refer to: Section 7.7 Polygon Draw Command on page 126 of the Hardware
Manual Vol. 2 /VDP1 User's Manual Rel. 2.
Example 2: Caution on the Clip bit in the draw mode word of each draw
command:
When using user specified clipping, be sure to always issue the user
clipping coordinate set command when the Clip bit (bit 10) of the
draw mode word (CMDPMOD) is set to "1". When coordinates are not
specified, the value is not guaranteed.
Refer to: Section 7.2 User Clipping Coordinate Set Command on page 112 of the
Hardware Manual Vol. 2 /VDP1 User's Manual Rel. 2.
SEGA SATURN TECHNICAL BULLETIN #37
To: Sega and Third Party Developers
From: Developer Technical Support
Date: May 6, 1996
Re: VDP2 Specification Changes
1. Burst reads from VRAM are prohibited.
SCU DMA reads may not be performed on VRAM.
2. Restriction on switching horizontal screen resolution.
The service routine provided by the boot ROM must always be used when
switching horizontal screen resolution.
3. Restriction on valid period for the V-Blank flag.
The VBLANK bit of the screen status register (TVSTAT:180004H) is only valid
when the DISP bit of the TV screen mode register (TVMD:180000H) is 1. When
the DISP bit is 0, the VBLANK bit is always 1.
Refer to: Hardware Manual Vol. 2: VDP2 User's Manual (Rel.2) :
Page 16, TV Screen Mode Register
Page 21, Screen Status Register
4. Restriction on the left-right flip function bit.
The left-right flip function bit of the cell-format normal scroll screen (NBG0,
1) is only valid when the number of character colors is 16 or 256. Do not set
this bit to 1 when the number of character colors is other than 16 or 256.
Refer to: Hardware Manual Vol. 2: VDP2 User's Manual (Rel.2)
Page 75, Flip Function Bit
5. Restriction on the vertical end coordinate window position.
When using normal windows in interlaced high resolution video mode, do
not set the vertical end coordinate window position value registers
(WPEY0:1800C6H, WPEY:1800CEH) between 1FCH to 1FFH. If these values are input,
the window becomes invalid.
Refer to: Hardware Manual Vol. 2: VDP2 User's Manual (Rel.2)
Page 181, Window Position Register
6. Correction on the V-Counter register bit description.
The V-Counter register (VCNT:18000AH) bits in normal and non-interlaced high
resolution modes is corrected below in Table 2.4.
Refer to: Hardware Manual Vol. 2: VDP2 User's Manual (Rel.2)
Page 24, V-Counter Register
Incorrect
Table 2.4 V-Counter register bits
TV Screen Mode VCT9 VCT8 VCT7 VCT6 VCT5 VCT4 VCT3 VCT2 VCT1 VCT0
Normal,
High Resolution V8 V7 V6 V5 V4 V3 V2 V1 V0 Invalid
(Non-Interlaced)
Correct
Table 2.4 V-Counter register bits
TV Screen Mode VCT9 VCT8 VCT7 VCT6 VCT5 VCT4 VCT3 VCT2 VCT1 VCT0
Normal,
High Resolution V9 V8 V7 V6 V5 V4 V3 V2 V1 V0
(Non-Interlaced)
7. Correction on the VRAM cycle pattern register settings.
To display a normal scroll screen with a character size of 2 horizontal cells by
2 vertical cells in high resolution mode, the VRAM cycle pattern register is set
with the following character pattern data read access restrictions.
Incorrect
Table 3.4 Character pattern data read access restrictions
TV Screen Pattern Name Table Data Access Timing
Mode T0 T1 T2 T3 T4 T5 T6 T7
High T0~T2 T1~T3 T0, T0, T1, — — — —
Resolution T2, T3 T3
Correct
Table 3.4 Character pattern data read access restrictions
TV Screen Pattern Name Table Data Access Timing
Mode T0 T1 T2 T3 T4 T5 T6 T7
High T0~T2 T1~T3 T2, T3 T3 — — — —
Resolution
Refer to: Hardware Manual Vol. 2: VDP2 User's Manual (Rel.2)
Page 32, 34, Image Data Access.
SEGA SATURN TECHNICAL BULLETIN #38
To: Sega and Third Party Developers
From: Developer Technical Support
Date: May 6, 1996
Re: Arcade Racer Application Manual
Arcade Racer Overview
The Arcade Racer is a single-axis analog peripheral used mainly for driving games.
The handle of the Arcade Racer is equipped with X, Y, Z, START, A, B, and C buttons and a
butterfly shifter unit. Digital data bits (right, left, down, up) are output by the following
actions:
• Left and right by turning the handle left and right, respectively.
• Up by pressing the left side of the butterfly shifter.
• Down by pressing the right side of the butterfly shifter.
Important Note: The Arcade Racer is not equipped with L and R buttons.
Refer to: Hardware Manual Vol. 1, SMPC User's Manual (Rel.2)
page 77, 83, 97: SATURN Analog Devices.
Arcade Racer Output Data Format
1 . Data Format
SATURN Peripheral ID
SATURN Peripheral Type: 1H (analog device)
Data Size: 3H (3 bytes)
Table 1 Data Format
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 b i t 0
Saturn Peripheral ID 0 0 0 1 0 0 1 1
1st Data Right Left Down Up Start ATRG CTRG BTRG
2nd Data 1 XTRG YTRG ZTRG 1 1 1 1
3rd Data AX7 AX6 AX5 AX4 AX3 AX2 AX1 AX0
• Start, ATRG, CTRG, BTRG, XTRG, YTRG and ZTRG all go to "0" (ON state) when
pressed.
• "0" (ON state) is output by pulling the butterfly shifter mechanism towards the player.
• AX7~AX0 output the absolute value of the unsigned A/D converter output.
• For AX7~AX0, left is 0, right is 255, and center is 127. See Figure 1 below.
The digital data bit (right, left) changes according to the AX threshold value to enable the
user to navigate menu screens such as the Sega Saturn CD control screen. See Figure 1
below.
Center
Left 7FH Right
6FH 8FH
00%
-10% +10%
67H 97H
-15% +15%
OOH FFH
-80% +80%
Figure 1 Digital Data Bit Threshold Values
• Right is "0"(ON) when AX is greater than 97H (+15°), and is "1" (OFF) when less than
8FH (+10°).
• Left is "0" (ON) when AX is less than 67H(-15°), and is "1" (OFF) when greater than 6FH
(-10°).
• Down is "0" (ON) when the right side of the butterfly shifter is pulled toward the
player, and "1" (OFF) when released.
• Up is "0" (ON) when the left side of the butterfly shifter is pulled toward the player, and
"1" (OFF) when released.
SEGA SATURN TECHNICAL BULLETIN #39
To: Sega and Third Party Developers
From: Developer Technical Support
Date: May 6, 1996
Re: Supplemental Information on the SCU-DMA Transfer Byte Count
When the SCU-DMA transfer byte count is set to 0, the transfer count is set to the
maximum value for each setting.
Figure 1 Transfer Byte Count
Direct Mode Indirect Mode
DMA Transfer
Level Register Transfer Byte Transfer Byte Transfer Byte
Setting Value Count Count Setting Count
Value
Level 0
00000H 100000H bytes 00000H 100000H bytes
00001H 000001H bytes 00001H 000001H bytes
00002H 000002H bytes 00002H 000002H bytes
: : : :
FFFFFH 0FFFFFH bytes FFFFFH 0FFFFFH bytes
Level 1 000H 1000H bytes 00000H 100000H bytes
001H 0001H bytes 00001H 000001H bytes
002H 0002H bytes 00002H 000002H bytes
: : : :
FFFH 0FFFH bytes FFFFFH 0FFFFFH bytes
Level 2 000H 1000H bytes 00000H 100000H bytes
001H 0001H bytes 00001H 000001H bytes
002H 0002H bytes 00002H 000002H bytes
: : : :
FFFH 0FFFH bytes FFFFFH 0FFFFFH bytes
DSP 00H 100H words
01H 001H words
02H 002H words
: :
FFH 0FFH words
Note: DMA transfer for the DSP is done in word units (4 bytes).
A maximum of 100000H bytes can be DMA transferred by Levels 0, 1, and 2 of the
Indirect mode.
When DSP-DMA is set to 0, the transfer count is set to the maximum value.
However, if a value larger than 40H word is specified for an internal RAM DMA,
data is overwritten continuously at the same address. This is because each RAM
page holds only 40H words. (Access does not move to another address during a DSP
DMA. In comparison, access will move to another RAM page during CPU
read/writes.)
Example:
When DMA settings are:
Transfer source address= 6001000H
Transfer destination address= 00H of RAM0
Transfer byte count= 00H
6001000H → 00H of RAM0 (1st word of data)
6001004H → 01H of RAM0 (2nd word)
6001008H → 02H of RAM0 (3rd word)
: :
60010FCH → 3FH of RAM0 (64th word)
6001100H → 00H of RAM0 (65th word) the 1st word is overwritten
6001104H → 01H of RAM0 (66th word)
: :
60013FAH → 3EH of RAM0 (255th word)
60013FCH → 3FH of RAM0 (256th word) maximum transfer amount
References:
• CPU-DMA Direct Mode:
Page 42, Transfer Byte Number, SCU User's Manual ,Third Version (ST-97-R5-072694).
• CPU-DMA Indirect Mode:
Page 10, Specification No. 25 SCU Specification Changes, in Sega Saturn Technical Bulletin #10
(ST-TECH-10).
• DSP-DMA.
Page 87, DMA Command Execution, SCU User's Manual, Third Version (ST-97-R5-072694).
SEGA SATURN TECHNICAL BULLETIN #40
To: Sega and Third Party Developers
From: Developer Technical Support
Date: May 6, 1996
Re: Additional Sega Saturn Compatible Peripheral ID Character Codes
New peripheral ID character codes for Saturn compatible peripherals have been
added. These character codes are are located in the System Area of the CD-ROM.
The new peripheral ID character codes are listed in boldface below.
Peripheral ID Character Code List for Compatible Peripherals
Compatible Peripherals Character Code
Control Pad J
Analog Controller (Mission Stick) A
Mouse M
Keyboard K
Steering Wheel (Arcade Racer) S
Multitap (6Player) T
Gun (Virtua Gun/Stunner) G
Saturn-to-Saturn cable C
MPEG P
FDD F
Modem D
XBAND X
• Reference on System ID, Compatible Peripherals:
See Page 28, section 4. Boot System: Compatible Peripherals in Disc Format
Standards Specification Sheet (ST-040-R4-051795) in Programmer's Guide Vol. 1.
SEGA SATURN TECHNICAL BULLETIN #41
To: Sega and Third Party Developers
From: Developer Technical Support
Date: March 26, 1996
Re: Saturn Stunner/Virtua Gun User’s Manual Version 1.00
1. Overview
The Stunner is a shooting game-specific gun peripheral that is connected to the
control port of the SEGA SATURN. The Stunner has a Trigger and a Start Button.
• Basic Specifications
• Recommended screen size: 14 inches or larger.
• Shooting distance: Approximately 5 meters (16.4 feet) from the screen.
• Shooting angle: 30° vertically and horizontally from the center of the screen.
Note: The above applies for a 14 inch monitor in a normally lit room. The specifications may
vary for different screen sizes and brightness of the room.
2. Incompatible Video Monitors
The Stunner detects the scan lines of a picture tube and compares it to its display
timing . It then determines the coordinate position and returns that value to the
application.
Some video monitors cannot support or cannot fully support the Stunner due to
this operating system.
• Incompatible Monitor Types or Scan Methods
• Liquid crystal displays and projectors do not use conventional picture tubes
and are therefore incompatible.
• High Definition TeleVisions (HDTV) are incompatible since the screen
display method is different than a conventional television.
• Double scanning televisions (EDTV2, Clear Vision) cannot be used because
the scan line speed is incompatible.
• Incompatible Display Modes
• Special display modes such as dual screen and picture-in-picture cannot be
used. These modes save the video image data to a frame buffer before it is
displayed and therefore causes the timing to be off.
Solution: Set the television to normal display mode.
• Some wide-aspect ratio televisions cannot support the Stunner when in 4:3
display mode.
Solution: Set to wide display mode.
• Other
• When the television screen is dirty or the screen brightness is too low.
Solution: Clean the screen or adjust the brightness.
• The scan line is difficult to detect when the screen size is too small.
Solution: Use a 14 inch or larger screen or add a collision detection adjustment mode. For
further details, see Collision Detection Adjustment Mode discussed below.
3. Peripheral Specifications
• SMPC Mode
It is necessary to switch the SMPC to SH2 Direct mode since the Stunner uses the
HV counter to detect the position on the screen.
• Initialization (SMPC Control Mode to SH2 Direct Mode)
1) Set the external latch enable bit (EXTLEN: bit 9) of the VDP2 external signal
enable register (EXTEN: 180002H offset) to 1.
2) Set SMPC to SH2 direct mode.
Set the IOSEL bit of the parallel I/O register (2010007DH) to 1.
Control Port 1: IOSEL1 (bit 0)
Control Port 2: IOSEL2 (bit 1)
Note: Both ports are byte accessed from the SH2.
3) Set the I/O port setting to "Input"
Set all of the parallel I/O register DDR bits (bit 0 ~ bit 6) to 0.
Control Port 1: Set all DDR1 (20100079H) bits (bit 6 ~ bit 0) to 0.
Control Port 2: Set all DDR2 (2010007BH) bits (bit 6 ~ bit 0) to 0.
Note: Both ports are byte accessed from the SH2.
Set all input selected PDR bits to 1.
Control Port 1: Set all PDR1 (20100075H) bits (bit 6 ~ bit 0) to 1.
Control Port 2: Set all PDR2 (20100077H) bits (bit 6 ~ bit 0) to 1.
Note: Both ports are byte accessed from the SH2.
4) Use bit 6 of the port as the external latch input for VDP2.
Set EXLE bit of address 2010007FH to 1. (Normally 0)
Control Port 1: Set EXLE1 bit (2010007FH: bit 0) to 1.
Control Port 2: Set EXLE2 bit (2010007FH: bit 1) to 1.
Note: Both ports are byte accessed from the SH2.
Refer to: Page 7, Parallel I/O Registers in the SMPC User's Manual (ST-169-R1-072694)
Page 19, External Signal Enable Register in the VDP2 User's Manual (ST-58-R2-
060194)
• Reading Coordinates
1) The external latch flag (EXLTFG: bit 9) of the VDP2 screen status register
(TVSTAT: 180004H offset) is read. If the bit is 1, the HV counter is read. The
targeted position and the HV counter position will be off in reality.
Therefore, adjust for the difference with the application. Refer to Calibration
Mode described later.
2) The screen status register (TVSTAT) is cleared to 0 when the read is done.
Therefore, it can be read only once during a V-blank.
Note: When the HV counter is read, the screen cannot be read if it is too dark (EXLTFG will
not go to 1). Therefore, the screen must be white (bright) for 1/60th of a second after the
Stunner trigger is pulled and the value read at that time is used to determine the
position.
Example 1:
Color sample RGB format / sprite pixel color data white =FFFFH (32768 colors)
/ scroll pixel color data =7FFFH (32768 colors)
/ =00FFFFFFH(16,770,000 colors)
Refer to: Page 218, 10.2 RGB Format Pixels in the VDP2 User's Manual (ST-58-R2-060194)
Refer to: Page 23, H-Counter Register in the VDP2 User's Manual (ST-58-R2-060194)
• Reading Buttons (SH2 Direct Mode)
There are two buttons: The Trigger and the Start Button. The parallel I/O
register PDR is read to determine their states.
Control Port 1: PDR1 (20100075H)
Control Port 2: PDR2 (20100077H)
Note: Both ports are byte accessed from the SH2.
PDR n=1,2 bit 7
bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
n=port number *
External Start Trigger * * * *
Latch Button
* Undefined: DO NOT USE.
• External latch, bit 6: Used as the VDP2 external latch input when the EXLE bit is 1.
• Start Button, bit 5: The signal differs from that of the control pad start button.
• Trigger, bit 4: Stunner trigger switch
• Reading the Stunner ID in SMPC Control Mode
The Stunner returns an "UNKNOWN" Genesis peripheral device ID [A0H]
instead of a SATURN peripheral ID to the port status 6Player ID as an
"UNKNOWN" device. This is because the Stunner uses the SMPC direct mode.
The upper 4 bits of the port status byte are the 6Player ID [AH], the lower 4 bits are
the number of connectors 0. Therefore, the port status is [A0H].
Refer to: Pages 61, 62, INTBACK Command Result Parameter During Peripheral Data
Acquisition in the SMPC User's Manual (ST-169-R1-072694)
• Reading the Stunner ID in SH2 Direct Mode
Once the SMPC is set to the direct mode, the peripheral ID cannot be accessed by
the INTBACK command. Follow the directions below to read the ID while in
direct mode.
Refer to: Page 86, 3.4 Support Peripheral Data Format in SH2 Direct Mode in the SMPC User's
Manual (ST-169-R1-072694)
1) Execute the ID check during a V-blank.
2) Set the port I/O settings to [bit 6=output], [bit 5~0=input].
Control Port 1 I/O setting register (20100079H)=[40H] (set bit 6 for output)
Control Port 2 I/O setting register (2010007BH)=[40H] (set bit 6 for output)
3) Calculating the peripheral ID using the SH2 direct mode
Determine the ID from the 4 bit (ID3~ID0) port data using the following
equation.
Port 1 port address (20100075H)
Port 2 port address (20100077H)
ID3=(BIT3 or BIT2) and (BIT6=1) ; equation for ID3 through ID0
ID2=(BIT1 or BIT0) and (BIT6=1)
ID1=(BIT3 or BIT2) and (BIT6=0)
ID0=(BIT1 or BIT0) and (BIT6=1)
Check that the Stunner is connected when the peripheral ID=AH.
4) Change the port I/O settings back to original settings.
Set the input settings for all parallel I/O register bits (bit 6~bit 0) to 0.
Reset the register so that the Stunner may be used.
4. Notes for Application Development
• Peripheral Character Codes for Compatible Peripherals
The character code for the Stunner is "G".
Enter "G" as a compatible peripheral character code in the System ID (start
address: 50H).
Refer to: Page 24, Boot System in the Disc Format Standards Specification Sheet Ver. 1.0 (ST-
040-R4-051795)
• Calibration Mode
A calibration mode allows the user to make adjustments for the differences
between the location targeted on-screen and the actual screen coordinates. These
errors may be caused by the type of television used, the distance between the
screen and the Stunner, or ambient lighting effects.
• Sample Implementation of a Calibration Mode (Recommended):
1) Display a target (cross-shaped) in the middle of the television screen.
2) Prompt the player to aim the gun at the target from the play position and pull
the trigger.
3) If the player does not aim the gun accurately at the target, or if the aim is not
properly adjusted, display a bullet hole away from the target center.
4) Prompt the player to press the Start button to clear any previous adjustment
values.
5) Prompt the player to aim the gun at the target center and to pull the trigger.
Set the adjustment value as the difference between the HCNT, VCNT values
and the target's center coordinate.
6) Display a message notifying the player that the adjustment has been made.
• The Start Button
Although this manual refers to this button as the "Start Button", note that the
switch signal differs than the Start Button on the standard SEGA SATURN
control pads.
Note: The Start Button cannot be used for the boot ROMs Multiplayer (Audio CD Player) interface.
• Enemies (Targets) on the Edge of the Screen
Do not place targets 16 pixels from the edge of the screen since some television
screens do not display the entire screen.
• 2 Player Mode
When two players use the Stunner simultaneously, the main processing is done
in 2 frames (1/30 sec). Odd and even frames are read separately.
• Collision Detection Adjustment Mode (Recommended)
SEGA recommends that the collision detection settings be adjustable in the
application. When the screen size is small, the on-screen targets become
proportionately smaller. As a result, even the smallest hand movement can
throw the aim off. This problem will unintentionally increase the difficulty of
the game.
• Connecting to the 6Player
The Stunner is not supported by the 6Player. Do not connect the Stunner to the
6Player.
• Displaying the Stunner On-Screen
The Stunner comes in three different colors. The color for each sales territory
was chosen with consideration to existing toy gun regulations for that area.
However, there are no regulations for the color of the Stunner when it is
displayed on the game screens during the game, such as in the options screen.
Table 1 Stunner/Virtua Gun Colors According to Sales Area
Sales Area Gun Color Trigger/Start Button Name
Japan, Southeast Asia Black Black Virtua Gun
America, Canada Orange Black Stunner
Europe Blue Black Virtua Gun
SEGA SATURN TECHNICAL BULLETIN #SOA-1
To: Sega and Third Party Developers
From: Developer Technical Support
Date: May 23, 1995
Re: GFS Library Usage
Overview
The purpose of this document is to shed a little light on how directories and
subdirectories work on the Saturn CD and how to properly initialize the GFS system.
Directory Structure:
The Saturn CD contains an ISO9660 track that consists of a root directory, subdirectories
and the files that belong to them. The files conform to the DOS file naming convention of an
eight letter prefix and a three letter extension. The files are placed on the disc in the order that
they are specified in the script file, but the directories are sorted alphabetically. This means that a
sequential search of a directory will not necessarily follow the order that the files are laid out on
the disc.
While you can use the mechanism of finding files by name, this requires the extra
overhead of a search by name through the directory table (It actually uses a strncmp() on each
entry until it finds a match!). If you have a lot of files in a directory this can add up. It also
requires 12 extra bytes per directory entry in the table. We suggest that you do your initial
development by file name and convert your application to access by file ids later. The file id (fid)
is simply the index into the directory table.
The initial program loader (ip.bin) will load the first file it finds in the directory. This
means that you must name the file so that it is the first file alphabetically. We strongly suggest
naming your kernel program 0. The first actual file in a directory will have a fid of 2. File ids of
0 and 1 are used for the directory tree system; Fid 0 contains info about the directory itself (self)
and fid 1 contains info about the parent directory, if the current directory is a subdirectory. Refer
to page nine of the Program Library - User Guide 1, CD-Library (ST-136-R1) for a diagram of
the directory structure. Info about subdirectories are stored in the parent directory in the same
manner as if they were a file entry.
Initializing and Using the GFS:
In order to correctly initialize the file system it is important to make sure you know in
advance the maximum number of entries that will be in each directory. The function GFS_Init
will, upon initializing, fill in a directory table with the contents of the root directory on the disc.
It will only fill it up to the number that you pass it so you need to do some calculations.
In calculating how many files are in a directory add in the following:
2 for the directory overhead.
1 for each file in the current directory.
1 for each subdirectory that is in the current directory.
1 for the dummy file entry that is used to signify the end of the table in the searches.
With the appropriate file count in hand we can now initialize the GFS.
Here is a snippet of sample code:
#define OPEN_MAX 5 /* number of files open at one time */
#define MAX_DIR 300 /* number of files in the directory */
/* library working area */
Uint32 work[GFS_WORK_SIZE(OPEN_MAX) / sizeof(Uint32)];
/* directory table structure */
GfsDirTbl dirtbl;
/* directory w/names added for named file search */
GfsDirName dirname[MAX_DIR];
extern void *buff;
Uint32 Main(void)
{
char fname[13];
GfsHn gfs;
Sint32 fid;
Sint32 ret;
Sint32 fsize,sctsize,nsct,lastsize;
/* tell gfs that the directory table uses names */
GFS_DIRTBL_TYPE(&dirtbl) = GFS_DIR_NAME;
/* tell gfs how many entries can be in the directory */
GFS_DIRTBL_NDIR(&dirtbl) = MAX_DIR;
/* tell gfs where the directory table is */
GFS_DIRTBL_DIRNAME(&dirtbl) = dirname;
/* initialize the gfs */
/* gfs will load the root directory into the table */
ret = GFS_Init(OPEN_MAX,work,&dirtbl);
if (ret <= 2) {
return 1;
}
/* find the file id for "FILE1.BIN" */
fid = GFS_NameToId("FILE1.BIN");
/* open the file */
gfs = GFS_Open(fid);
/* if we found the file then */
if (gfs != NULL) {
/* calculate the file size and number of sectors in the file */
GFS_GetFileSize(gfs,&sctsize,&nsct,&lastsize);
fsize = sctsize * (nsct-1) + lastsize;
/* and read it into buff (sure hope buff is big enough !)*/
GFS_Fread(gfs, nsct, buff, fsize);
/* close the file */
GFS_Close(gfs);
}
else return 2; /* errored out */
return 0;
}
Accessing Subdirectories
If you have an application that uses subdirectories you can share a common directory
table among them. that will be loaded by the GFS_LoadDir command. After loading it you can
make it the current directory by calling GFS_SetDir and passing it the address of the table. Note:
only one directory can be current at one time. If you wish to have open files from several
directories you must first set the current directory to the one you want, open the file, set the other
directory to be current and open the file, etc.
Here is an example of accessing the root and a subdirectory:
#define OPEN_MAX 5
#define MAX_DIR1 54 /* 2 overhead, 50 files, 1 sub-dir, 1 dummy *
#define MAX_DIR2 303 /* 2 overhead, 300 files, 1 dummy */
#define SECT_SIZE 2048; /* size of one sector */
char buff[2048];
Uint32 main()
{
char fname[13];
Uint32 ret,i;
GfsHn gfs;
Sint32 fid;
/* set up the parameters for the root directory */
GFS_DIRTBL_TYPE(&dirtbl1) = GFS_DIR_NAME;
GFS_DIRTBL_NDIR(&dirtbl1) = MAX_DIR1;
GFS_DIRTBL_DIRNAME(&dirtbl1) = dirname1;
/* and set up the parameters for subdirectory */
GFS_DIRTBL_TYPE(&dirtbl2) = GFS_DIR_NAME;
GFS_DIRTBL_NDIR(&dirtbl2) = MAX_DIR2;
GFS_DIRTBL_DIRNAME(&dirtbl2) = dirname2;
/* init the GFS and load in the root information */
ret = GFS_Init(OPEN_MAX,work,&dirtbl1);
if (ret <= 2) {
return 1;
}
/*
assume there are 50 files in the root named A1.BIN thru A50.BIN
and each file is 2048 bytes in length
*/
for (i = 0; i < 50; i++) {
sprintf(fname,"A%d.BIN",i+1);
/* get the file id for fname */
fid = GFS_NameToId(fname);
/* open it */
gfs = GFS_Open(fid);
if (gfs == NULL) {
return 2; /* error out */
}
else {
GFS_Fread(gfs, 1, buff, 2048);/* read in the data */
GFS_Close(gfs);
}
}
/* now lets switch to a directory named DIREC1 */
/* same as accessing a file */
fid = GFS_NameToId("DIREC1");
/* load in the directory info */
GFS_LoadDir(fid,&dirtbl2);
/* make it the current directory */
GFS_SetDir(&dirtbl2);
/*
assume there are 300 files in the subdirectory named
B1.BIN thru B300.BIN and each file is 2048 bytes in length
*/
for (i = 0; i < 300; i++) {
sprintf(fname,"A%d.BIN",i+1);
/* get the file id for fname */
fid = GFS_NameToId(fname);
/* open it */
gfs = GFS_Open(fid);
if (gfs == NULL) {
return 2; /* error out */
}
else {
/* read in the data */
GFS_Fread(gfs, 1, buff, 2048);
GFS_Close(gfs);
}
return 0;
}
Here is the sample script for the subdirectory code example above:
Disc sample.dsk
Session CDROM
LeadIn MODE1
EndLeadIn
SystemArea ip.bin
Track MODE1
Volume ISO9660 "sample.pvd"
PrimaryVolume 00:02:16
SystemIdentifier "SEGA SEGASATURN"
VolumeIdentifier "SAMPLE_GAME_TITLE"
VolumeSetIdentifier "SAMPLE_GAME_TITLE"
PublisherIdentifier "SEGA ENTERPRISES,LTD."
DataPreparerIdentifier "SEGA ENTERPRISES,LTD."
VolumeCreationDate 11/11/1994 00:00:00:00:36
EndPrimaryVolume
EndVolume
File 0.BIN ; this file name keeps it the first alphabetically
FileSource "kernel.bin" ;the executable binary
EndFileSource
EndFile
File A1.BIN
FileSource "a1.dat"
EndFileSource
EndFile
; .
; . A2 thru A49 go here
; .
File A50.BIN
FileSource "a50.dat"
EndFileSource
EndFile
Directory DIREC1 ; the subdirectory
File B1.BIN
FileSource "b1.dat"
EndFileSource
EndFile
; .
; . B2 thru B299 go here
; .
File B300.BIN
FileSource "b300.dat"
EndFileSource
EndFile
EndDirectory
EndTrack
LeadOut MODE1
Empty 500
EndLeadOut
EndSession
EndDisc
SEGA SATURN TECHNICAL BULLETIN #SOA-2
To: Sega and Third Party Developers
From: Developer Technical Support
Date: May 23, 1995
Re: Casting VDP1 Shadows on VDP2 Backgrounds
Using VDP1 Sprites to Cast Shadows on VDP2 Backgrounds
The Saturn graphics hardware makes it possible for a sprite to cast a shadow onto a background.
When a sprite is casting a shadow, the sprite graphic is not displayed. Instead, the pixels
underneath the sprite, i.e. the pixels that the sprite would have obscured, are displayed at a reduced
luminance, creating a shadowy effect.
There are two ways to cause a sprite to cast a shadow onto a VDP2 background, each with its own
set of advantages and disadvantages. The VDP2 manual refers to these two methods as the
“normal shadow” and the “MSB shadow,” and, for the sake of consistency, this note will adopt
that terminology.
Both kinds of shadow are created by instructing the VDP1 to write special pixel values to its frame
buffer. These special pixel values are then interpreted by the VDP2 as it reads the frame buffer,
subject to the states of several of the VDP2’s innumerable mode flags, which will be described
below.
In order to use either kind of shadow, you must enable shadow processing for the background(s)
onto which shadows are to be cast by setting the appropriate bit(s) of the VDP2 shadow control
register (0x25f800e2; refer to page 259 of the VDP2 manual).
The MSB Shadow
MSB shadows are created by setting the MSBON bit in the draw-mode word of the VDP1
command table, which, in turn, sets the most-significant bit of the appropriate pixels in the VDP1
frame buffer. Since the most-significant bit of a pixel in the frame buffer can perform three
different functions, depending on how the VDP2 is configured, you need to be sure that the VDP2
is in the correct mode. To do this, you must clear bits 4 and 5 of the sprite control register
(0x25f800e0; refer to pages 188 and 207 of the VDP2 manual). Clearing bit 5 disables RGB
sprites, so that the VDP2 will not use the most-significant bit to distinguish between paletted pixels
and RGB pixels. Note that this means that you cannot create an MSB shadow sprite unless you
completely give up the right to display RGB sprites. Clearing bit 4 informs the VDP2 that you
want the most-significant bit to be used for enabling the MSB shadow instead of the VDP2’s sprite
window feature.
Use of the MSB shadow feature is further restricted by the fact that it only works for sprite types 2
through 7 (refer to page 201 of the VDP2 manual). Since these sprite types all use 16-bit pixels, it
follows that the MSB shadow feature may not be used when the VDP1 is in one of its high-
resolution modes.
Once you’ve got the VDP2 in the correct mode and using an appropriate sprite type, you can
contemplate actually drawing an MSB shadow sprite. To do this, set the most-significant bit (the
MSBON bit) of the draw-mode word (the third word) in the sprite’s command table. When this bit
is set, the VDP1 does not actually draw the sprite into the frame buffer. Instead, it sets the most-
significant bit of every pixel in the buffer where the sprite would otherwise have been drawn,
leaving the remaining bits untouched. This means that the MSB shadow feature can be used to cast
shadows onto other sprites, as well as onto backgrounds (but see below).
When the VDP2 encounters a VDP1 pixel with its most-significant bit set (assuming the VDP2 is
in the appropriate mode), it responds in one of two ways. If all other bits are zero, i.e. the value of
the pixel is 0x8000, then the pixel is taken to be transparent, and the background pixel that is
immediately beneath the sprite pixel is displayed at a reduced luminance. If more than one
background is being displayed, then the question of which backgrounds get dimmed hinges on the
priority of the sprite pixel, and the priority of transparent shadow pixels is always taken from sprite
priority register zero. Note that this means that all transparent MSB shadow pixels displayed at
any given time will have the same priority. Note also that all of this happens only if you set bit 8
of the VDP2 shadow control register (0x25f800e2), which enables transparent shadow pixels. If
this bit is clear (which is the default), then transparent shadow pixels are not displayed, which
means that an MSB shadow sprite would still cast a shadow onto other sprites, but not onto any of
the backgrounds.
If the unsigned value of a sprite pixel is greater than 0x8000 (i.e. the most-significant bit is set, and
the remaining bits are not all zero), then the VDP2 interprets the pixel as being opaque, and the
pixel is displayed according to the color bank, priority, and other information found in the
remaining 15 bits, but with its luminance reduced.
The Normal Shadow
Normal shadows are created by drawing a reserved paletted pixel value to the VDP1 frame buffer.
What the value actually is depends on the sprite type, but, in general, the value is derived by setting
all of the dot color bits except the least-significant bit to 1. Depending on the sprite type, this value
may be 0x3e, 0x7e, 0xfe, 0x1fe, 0x3fe, or 0x7fe (see page 201 of the VDP2 manual). The values
of the remaining bits in the pixel are not significant. When the VDP2 encounters such a pixel, the
effect is the same as when it encounters a transparent MSB shadow pixel: the background pixel
immediately underneath the sprite pixel is displayed at a reduced luminance.
Normal shadows are displayed regardless of the setting of the transparent shadow enable bit (bit 8)
in the shadow control register (0x25f800e2).
Normal shadows have several advantages over MSB shadows. They can be used in high-
resolution modes; they can be mixed freely with RGB sprites, and, since the priority bits are still
available, they need not all have the same priority. The major disadvantage of the normal shadow
is that the pixels of any sprite that happens to be underneath the normal shadow sprite will be
obliterated when the normal shadow sprite is drawn, which means that it is not possible to cast a
normal shadow onto a sprite.
Be advised that the paletted pixel value reserved for normal shadow pixels is reserved whether
shadow processing is enabled or not. If shadow processing is not enabled, then normal shadow
pixels are simply not displayed. This means that, depending on the sprite type being used, one or
more entries in color RAM cannot be used by any sprite. For more details, see SEGA Saturn
Technical Bulletin #25.
Both kinds of shadow can be used simultaneously. If a single pixel satisfies the qualifications for
both kinds of shadow, it is interpreted as a normal shadow pixel.
The following table summarizes the differences between the MSB shadow and the normal shadow.
MSB Normal
Shadow Shadow
Can cast shadows on other sprites? Yes No
Can be mixed with RGB sprites? No Yes
Can different shadows have different priorities? No Yes
Valid sprite types 2-7 All
SEGA SATURN TECHNICAL BULLETIN #SOA-3
To: SEGA and Third Party Developers
From: Developer Technical Support
Date: May 25, 1995
Re: SEGA Saturn CD Door-Open Standard
In order for your program to conform to the Sega Saturn Software Development
Standards document (ST-151-R3-SB) which states "If the Sega Saturn's CD Door OPEN
button is pressed during a game and the door opens, then the boot ROM's Audio CD
Control Screen must be displayed in the same manner as a reset is implemented in the
Title Loop sequence."
The purpose of this document is to show how to check for and respond to the CD door-
open condition.
If you are using the SBL - (Sega Basic Library; older SOJ Libraries) place this code in
your vertical blank routine:
/* Detect CD Disk Change and if so, jump to the Saturn Audio CD Control
Screen (gui) */
if( CDC_GetHirqReq() & CDC_HIRQ_DCHG )
SYS_EXECDMP();
If you are using the SGL - (Sega 3D Game Library) make the following call in your
initialization code:
/* cause slSynch to jump to the Saturn Audio Control Screen if the CD
door is opened */
slSetTrayCheck(TRUE);
In addition, if you are using the GFS, STM or the Cinepak (CPK) system you should use
the appropriate routine below as well:
Note: These procedures are the same for both the SBL, and the SGL.
GFS_SetErrFunc();
STM_SetErrFunc();
CPK_SetErrFunc();
The above routines will allow you to specify a function that will be called when a file-
based error occurs (such as opening the disk drive while being accessed). The error
function should check the error type and respond accordingly. If the error is
ERR_CDOPEN then you should call the SYS_EXECDMP routine. Please see the appropriate
library documentation for the correct usage of the error routines.
The above routines and masks are defined in:
SEGA_CDC.H
SEGA_SYS.H
SEGA_GFS.H
SEGA_STM.H
SEGA_CPK.H
SEGA SATURN TECHNICAL BULLETIN #SOA-4
To: SEGA and Third Party Developers
From: Developer Technical Support
Date: May 25, 1995
Re: Saturn System Disks
Caution for 3rd party developers using a development system that requires a Saturn
system disk.
The following notice needs to be followed in the case of a production unit Saturn being
used for development. The black 3rd party system disk is different from the Sega brand
developer system disk, hence the IP.BIN file must be modified before preprocessing
using VCDPRE.EXE. The change is as follows:
Line 10H reads:
"SEGA ENTERPRISES" (16 characters)
The correct 3rd party format is:
"SEGA TP T-000 " (16 characters)
where 000 represents the company ID number. (available from Sega's 3rd
party department)
Failure to follow will result in an "unsuitable disk" error from the Saturn.
Developers can find this information in the "Disk Format Standards Format Manual (ST-
040-R3-011895)" or the "Boot ROM System User's Manual (ST-220-120994)". Also, be
aware that there is an older version of the manual ST-040-R2-062294 which is incorrect,
but has been changed in the new revision.
SEGA SATURN TECHNICAL BULLETIN #SOA-5
To: SEGA and Third Party Developers
From: Developer Technical Support
Date: May 25, 1995
Re: VCD I/F Board Installation
Setting the jumpers:
1. ISA-IRQ(J3)
2. ISA-DMA(J4)
3. I/O Address(J5)
Default settings:
1. IRQ=10(02)
2. DMA=DREQ5(00)
3. I/O=340H(00)
*The numbers in parentheses are used by the environment variable set in the autoexec.bat
file.
The following environment variable must be place in the autoexec in order for VCD to
operate correctly.
SET VCDIO=020000 (default setting IRQ10, DREQ5, 340H)
The six digits are represented as follows:
02 00 00
IRQ DMA I/O address
The value of the environment variable varies when a value other than the default is set as
the jumper setting. Refer to the next page for the proper values.
SEGA SATURN TECHNICAL BULLETIN #SOA-6
To: Sega and Third Party Developers
From: Developer Technical Support
Date: August 16, 1995
Re: VDP2 Cycle Pattern Registers
Disclaimer
The information in this document is based on our interpretation of the VDP2 User’s
Manual and on experimental evidence. It is not possible for us to test every conceivable
permutation of values that the cycle pattern registers might hold. Your mileage may
vary.
What Do They Do?
The cycle pattern registers control the manner in which the VDP2 accesses VRAM while
the display is being drawn. Depending on how the display is configured, the VDP2 may
need to access VRAM quite a few times in order to draw a single pixel. It may need to
read pattern name data (i.e. character codes) and character pattern data (i.e. the characters
themselves) for several different backgrounds. It may also need to read vertical cell
scroll data. In addition, you may wish to access VRAM from the CPU during the
display. The VDP2 is not smart enough to direct all of this VRAM traffic automatically;
you must do it yourself. The cycle pattern registers allow you to do this by specifying
which parts of the VDP2 are allowed to access which parts of VRAM how often and at
what time(s). The cycle pattern registers also control how much access the CPU has to
VDP2 VRAM while the screen is being displayed (the CPU may access VRAM freely
during the vertical blanking interval).
The figure below illustrates how VDP2 VRAM is accessed for each pixel. There are
eight memory cycles per pixel (four in hi-res mode), and VDP2 VRAM can be divided
into up to four banks, all of which can be accessed during each cycle, which means that
the VDP2 can perform up to 32 VRAM accesses per pixel. In the figure below, the
cycles (or “timings,” as they are sometimes called in the VDP2 User’s Manual) are
labeled T0 through T7, and the VRAM banks are labeled A0, A1, B0, and B1. You must
specify who gets to have access to each bank of VRAM during each of the eight cycles,
and you must do it so as to ensure that the VDP2 will be able to load all of the data that it
needs to load in order to display the number and type of backgrounds that you told it to
(except where otherwise noted, this document will assume that VRAM is partitioned into
four banks).
T0 T1 T2 T3 T4 T5 T6 T7
A
0
A
1
B
0
B
1
What Do They Look Like?
The cycle pattern registers are a set of eight 16-bit registers: two for each of the four
banks of VDP2 VRAM. Each pair of registers contains one four-bit field for each of the
eight cycles that elapses during the display of a single pixel, for a total of 32 bits.
Between them, these registers allow (or, if you prefer, require) you to specify who gets to
access which bank of VRAM during which cycles. If VDP2 VRAM is configured as two
larger banks instead of four smaller ones, then the cycle pattern registers for banks A1
and B1 are ignored.
Each of the 32 four-bit fields can assume one of the following values, corresponding to
the different types of VRAM access that the cycle pattern registers control.
Value Type of data that may be accessed
0 NBG0 pattern name data
1 NBG1 pattern name data
2 NBG2 pattern name data
3 NBG3 pattern name data
4 NBG0 character pattern data or bit mapped data
5 NBG1 character pattern data or bit mapped data
6 NBG2 character pattern data (NBG2 does not support bit mapped displays)
7 NBG3 character pattern data (NBG3 does not support bit mapped displays)
8 This value is illegal
9 This value is illegal
10 This value is illegal
11 This value is illegal
12 NBG0 vertical cell scroll table data
13 NBG1 vertical cell scroll table data
14 CPU data (i.e., the CPU may either read from or write to VRAM)
15 Nobody can access VRAM
The cycle pattern registers are laid out so that if you display their values in a debugger
(which you can’t do, since they’re write-only registers, but you could display shadows of
them), the access codes will read naturally from left to right, with T0 at the left and T7 at
the right. For a diagram of the cycle pattern registers, see p. 39 of the VDP2 User’s
Manual.
How Many Accesses Are Required for What?
Here is a table which gives the number of VRAM accesses that must be allocated for
each of the various types of VDP2 data.
Type of Data Number of Accesses Required Per
Background
Pattern name data (1-word or 2-word) 1
16-color character pattern or bit mapped data 1
256-color character pattern or bit mapped data 2
2048-color character pattern or bit mapped data 4
32K-color character pattern or bit mapped data 4
16M-color character pattern or bit mapped data 8
Vertical cell scroll table data 1
If you are using the VDP2 zooming hardware to reduce your screen (this is only
supported for NBG0 and NBG1; see pp. 126-130 of the VDP2 User’s Manual), then the
VDP2 has to perform additional accesses, since each pixel on the screen can correspond
to multiple pixels in VRAM. If you’re reducing the screen by a factor of more than one
but not more than two, then the number of pattern name data and character pattern data
accesses must both be doubled. If you’re reducing the screen by as much as a factor of
four (the maximum reduction possible), then they must be quadrupled. This naturally
creates restrictions on the color depth of the screens that are going to be reduced.
What Timings Can I Use?
There are a number of restrictions on which types of VRAM access can be performed
during which cycles and in what combinations, and here they are.
There can be a maximum of two pattern name data accesses during any given cycle, and
one of them must access either bank A0 or bank B0, while the other must access either
bank A1 or bank B1. If bank A is partitioned, but bank B is not, then bank A1 may be
accessed simultaneously with bank B, but bank A0 may not be. Similarly, if bank B is
partitioned, but bank A is not, then bank B1 may be accessed simultaneously with bank
A, but bank B0 may not be. If neither bank A nor bank B is partitioned, then only one
pattern name data access per cycle may be performed.
The cycles during which character pattern data may be read depend on the cycle(s) during
which the corresponding pattern name data was read. Here are the restrictions.
If the Pattern Name Data ...Then the Character Pattern Data Can ... Or, If You’re In Hi-res
Is Read During This Cycle... Only Be Read During These Cycle... Mode, During These Cycles
T0 T0, T1, T2, T4, T5, T6, T7 T0, T1, T2
T1 T0, T1, T2, T3, T5, T6, T7 T1, T2, T3
T2 T0, T1, T2, T3, T6, T7 T0, T2, T3
T3 T0, T1, T2, T3, T7 T0, T1, T3
T4 T0, T1, T2, T3 --
T5 T1, T2, T3 --
T6 T2, T3 --
T7 T3 --
Vertical cell scroll table data may only be accessed during T0 and T1 for NBG0, and
during T0, T1, and T2 for NBG1. If vertical cell scroll table data is being accessed for
both NBG0 and NBG1, then the access for NBG0 must come first.
CPU access for bank A0 should match the CPU access for bank A1, and CPU access for
bank B0 should match the access for bank B1. Cycles which are available for CPU
access in, say, bank A0 but not in bank A1 should be programmed with access code 0xf
(no access). If all of bank A (both bank A0 and bank A1) or all of bank B is unused, set
its cycle pattern registers to 0xfeeeeeee, i.e., no access in T0 and CPU access during all
other cycles. Note that if the CPU tries to read VRAM during a cycle which does not
allow CPU access, the CPU will be held until VRAM becomes available. The CPU can
write up to two long words to VRAM without having to wait.
What About the Rotating Backgrounds?
The rotating backgrounds do not use the cycle pattern registers. Data that will be used by
a rotating background may not share a VRAM bank with data that will be used by a
normal background.
Examples
To display these four screens,
Bank Containing Bank Containing
Screen Color Depth Display Mode Pattern Name Data Character Pattern or Bit Map Data
NBG0 16 Character A0 A0
NBG1 16 Bit Map -- A1
NBG2 16 Character B0 B0
NBG3 256 Character B1 B1
Set the cycle pattern registers like so:
A0: 0x04eeeeee
A1: 0x5feeeeee
B0: 0xf26eeeee
B1: 0x377eeeee
If, for whatever reason, we wanted to reshuffle the various display components like so,
Bank Containing Bank Containing
Screen Color Depth Display Mode Pattern Name Data Character Pattern or Bit Map Data
NBG0 16 Character A1 A0
NBG1 16 Bit Map -- A1
NBG2 16 Character B1 B0
NBG3 256 Character B1 B0
We could set the cycle pattern registers like this:
A0: 0x4feeeeee
A1: 0x05eeeeee
B0: 0x677eeeee
B1: 0xf23eeeee
Now let’s say we wanted to put everything that used to be in bank A1 into bank A0, and
everything that used to be in bank B1 into bank B0, giving us this:
Bank Containing Bank Containing
Screen Color Depth Display Mode Pattern Name Data Character Pattern or Bit Map Data
NBG0 16 Character A0 A0
NBG1 16 Bit Map -- A0
NBG2 16 Character B0 B0
NBG3 256 Character B0 B0
We could set the cycle pattern registers like this:
A0: 0x504eeeee
A1: 0xfffeeeee
B0: 0x2637ee7e
B1: 0xffffeefe
If, in addition, we wanted to be able to reduce NBG0 by up to one half, we could alter the
settings for banks A0 and A1 as follows:
A0: 0x5040eee4
A1: 0xffffeeef
SEGA SATURN TECHNICAL BULLETIN #SOA-7
To: Sega and Third Party Developers
From: Developer Technical Support
Date: August 16, 1995
Re: Sprite Transparency
MAKING VDP1 SPRITES PARTIALLY TRANSPARENT WITH RESPECT TO
VDP2 BACKGROUNDS
It is possible to instruct the VDP2 to display selected sprites so that they are partially
transparent with respect to the VDP2’s backgrounds, i.e., the RGB values of the sprite’s
pixels and those of the background’s pixels are combined in a weighted average. This can
be done with either paletted sprites or RGB sprites, but it’s more useful with paletted
sprites, since each paletted sprite gets to decide individually whether it will be partially
transparent or not, whereas, with RGB sprites, either all of them are partially transparent, or
none of them are, as we shall see. Note also that, while any sprite may be made partially
transparent with respect to the backgrounds, the only way in which sprites may be made
partially transparent with respect to each other is to use the VDP1’s half-transparency
effect, which only works if all sprites involved are RGB sprites.
There are several things that you must do in order to make a sprite partially transparent
with respect to backgrounds.
First, you must tell the VDP2 to enable color calculations (that’s Sega-speak for partial
transparency and other effects in which the RGB values of individual pixels are
manipulated) for the sprites by setting bit 6 of the color calculation control register (see p.
240 of the VDP2 User’s Manual).
Next, decide how transparent you want the sprite to be by specifying one or more “color
calculation ratios,” or degrees of transparency, between the sprite and whatever
backgrounds are behind it. Each color calculation ratio is represented by a number from 0
to 31, where 0 means “opaque,” and 31 means “completely transparent.” Up to eight of
these ratios may be stored in the sprite color calculation ratio registers (see p. 210 of the
VDP2 User’s Manual). Paletted sprites select one of these ratios using the color
calculation bits in the sprite’s pixel data as defined by the sprite type being used (see pp.
201-202 of the VDP2 User’s Manual). Note that not all sprite types allow access to all
eight of the available color calculation ratios, and most of the hi-res sprite types (the 8-bit
types) do not support color calculation at all. RGB sprites always use color calculation
ratio zero (i.e., the ratio stored in bits 0 through 4 of the first sprite color calculation ratio
register).
Since you will probably not want all of your sprites to be partially transparent, there needs
to be some way to determine which sprites will be subjected to color calculations and
which ones will not. The question of whether or not the VDP2 will perform color
calculations on a given pixel in the VDP1 frame buffer is resolved by subjecting the pixel
to one of four tests:
1. Perform color calculations if the pixel’s priority is less than or equal to a specified
value.
2. Perform color calculations if the pixel’s priority is equal to a specified value.
3. Perform color calculations if the pixel’s priority is greater than or equal to a specified
value.
4. Perform color calculations if the most-significant bit of the pixel’s color is set.
You determine which test is used by writing to bits 12 and 13 of the sprite control register
(see p. 207 of the VDP2 User’s Manual). The same test will be used for every pixel in the
VDP1 frame buffer. The “specified value” alluded to in the first three tests is set by
writing to bits 8, 9, and 10 of the sprite control register. The priority of an RGB pixel is
always taken from sprite priority register zero (see p. 209 of the VDP2 User’s Manual).
This means that all RGB pixels have the same priority, which means that, when using one
of the first three tests, either all of the RGB sprites are subjected to color calculations, or
none of them are.
If you choose the fourth test, then all RGB sprites will be subjected to color calculations. If
you use the fourth test with paletted sprites, then only pixels whose palette entries have
their most-significant bits set will be subjected to color calculations. This feature makes it
possible to turn potentially large areas of the screen partially transparent simply by
rewriting a palette entry or two. In both of these cases, the color calculation ratio is taken
from bits 0 through 4 of the first sprite color calculation ratio register (see p. 210 of the
VDP2 User’s Manual).
For more on color calculations in general, see chapter 12 of the VDP2 User’s Manual.
SEGA SATURN TECHNICAL BULLETIN #SOA-8
To: Sega and Third Party Developers
From: Developer Technical Support
Date: August 16, 1995
Re: Saturn SCU DSP Tutorial
1. Overview
1.1 Introduction
This document provides a programmer’s introduction to and overview of the DSP which
is part of the Saturn System Control Unit, including the architecture of the DSP and the
various programming considerations that architecture implies.
1.2 Advantages of Using the DSP
The DSP is a highly specialized processor intended to efficiently calculate sums of
products, as when performing matrix and vector calculations such as 3D point
transformations or lighting calculations. When performing the sorts of tasks for which it
was designed, the DSP can be faster than the SH2, because it can load operands for one
calculation, perform a second calculation, and store the results of a third calculation in
parallel. It can also perform a 32x32 multiply, yielding a 48-bit result, in a single cycle.
The DSP gains an additional advantage when performing fixed-point calculations, since,
when it stores its results to its data RAM, it can store either the lower or the upper 32 bits
of its 48-bit accumulator, whereas the SH2 must take time to explicitly reformat the
results of fixed-point calculations by using the “xtrct” instruction.
1.3 Disadvantages of Using the DSP
The DSP runs at half the clock speed of the SH2, so, while the DSP can multiply in a
single cycle, that cycle is twice as long as one of the SH2’s cycles.
The DSP’s doesn’t have much memory, and the memory it does have is not mapped onto
the system bus, which means that the DSP must continually take time to copy its data
between its own data RAM and the SH2’s work RAM.
The DSP is difficult to program. A routine that could be coded in SH2 assembly
language in half an hour might take half a day to write, debug, and fully optimize on the
DSP.
1.4 Organization of the DSP’s Memory
The DSP’s RAM is organized in 32-bit words, and it is not addressable in smaller units.
Program memory and data memory are separate; there are 256 words of program RAM
and 256 words of data RAM, the latter being organized in 4 banks of 64 words each.
Each bank of data RAM has its own address and data ports, so that multiple banks can be
accessed in parallel during a single machine cycle.
1.5 Organization of the CPU
The DSP’s CPU contains an ALU and a multiplier which function in parallel. There is
no divider. There are also several buses which connect the DSP’s data RAM to its
various registers, and these buses can also operate in parallel. This parallelism allows the
DSP to load a pair of inputs for the multiplier, retrieve the results of a previous
multiplication, add the results of a still earlier multiplication to a running total, and store
that total to data RAM, all during a single cycle.
2. Registers
Each of the DSP’s registers is intended for a specific purpose. There are no general
purpose registers, and there is no stack pointer. The width of each register, as well as the
presence or absence of data paths leading to or from it, depend on the purpose for which
it was intended.
2.1 The Accumulator
The accumulator is a 48-bit register that holds the results of ALU operations. In
particular, it is used to add up the 48-bit products generated by the multiplier. The ALU
also takes one of its inputs from the accumulator. Most DSP data is 32 bits wide or less,
so sign extension is performed when loading a less-than-48-bit number into the
accumulator. When storing the contents of the accumulator to the DSP’s data RAM,
either the lower or the upper 32 bits may be written.
2.2 The P register
The P register is the only DSP register besides the accumulator that is 48 bits wide. It has
two functions: it receives the 48-bit products that the multiplier puts out, and it holds the
second ALU input for operations that require a second input.
2.3 RX and RY
The RX and RY registers hold the inputs to the DSP’s multiplier. They are 32 bits wide.
The multiplier multiplies the contents of RX and the contents of RY every cycle, and the
results can be accessed on the following cycle by using the MOV MUL,P instruction.
2.4 The Index Registers: CT0 Through CT3
The registers CT0 through CT3 are 6-bit registers that each address one of the DSP’s four
64-word banks of data RAM. These are the data RAM address ports or index registers,
and all data that is read from or written to the DSP’s data RAM is routed by these
registers.
2.5 The Program Counter
The PC (program counter) register is 8 bits wide and holds the address in program RAM
of the next instruction to be executed.
2.6 LOP and TOP
The LOP and TOP registers are used to control looping and subroutine logic. LOP is a
dedicated loop counter and is 12 bits wide. TOP is 8 bits wide and is used to hold the
address in program RAM of the top of a loop or the return address of a subroutine. The
BTM (loop bottom) instruction examines the contents of LOP, falling through if LOP is
zero, and decrementing LOP and branching back to TOP otherwise. See section 7.1 for a
discussion of how LOP and TOP can be used to create a crude subroutine-calling
mechanism.
2.7 RA0 and WA0
The RA0 and WA0 are used to control DMA transfers. RA0 holds the address (divided
by four) in external RAM from which data will be read into the DSP’s program or data
RAM. WA0 holds the address (divided by four) in external RAM to which data will be
written from the DSP’s data RAM. It is not possible to transfer the DSP’s program RAM
to external RAM.
3. Processor Control and Status Bits
These bits are all mapped onto the SCU’s DSP control port, found at address 0x25fe0080.
Individual bit mappings are given in the table below. Some of these bits are used to
control the DSP’s conditional branching instructions (see section 5.7). For further
information on using the SCU registers to control the DSP, see the SCU User’s Manual
and the file DSP_CTRL.C, which is part of the Sega standard software library for Saturn.
Flag R/W Bit Description
PR W 26 Pause Reset bit. Writing a 1 to this bit unpauses a program that has
been paused by writing a 1 to the Execute Pause bit (see below).
EP W 25 Execute Pause bit. Writing a 1 to this bit pauses a program that is
running (EX = 1).
T0 R 23 When this flag is 1, DMA is occurring on the D0 bus.
S R 22 Sign bit. This bit is set to 1 when the result of an ALU operation is
negative. In other words, the S bit is set to the value of the most-
significant bit of the ALU result. For most ALU instructions, the most-
significant bit is bit 31, but for the 48-bit addition instruction AD2, the
most-significant bit is bit 47.
Z R 21 Zero bit. This bit is set to 1 when the result of an ALU operation is
zero.
C R 20 Carry bit. This bit is set to 1 when an unsigned arithmetic overflow
occurs; it is also set by the various shift and rotate instructions.
V R 19 Overflow bit. This bit is set to 1 when a signed arithmetic overflow
occurs. Note that at least some versions of the DSP simulator do not
implement this bit correctly. See the DSP Simulator manual for details.
E R 18 Program End Interrupt flag. When this bit is set, the DSP program has
halted and requested an interrupt. Reading the DSP control port resets
this flag.
ES W 17 Execute Step bit. Writing a 1 to this bit while the program is halted
(EX = 0) triggers the execution of the next single step in the program.
EX R/W 16 Execution Control Flag. Writing a 1 to this bit begins program
execution; writing a zero halts the program. Reading this register tells
whether the DSP is running or not, however the DSP control port may
not be read while a DSP program is running if the DSP program
expects to request an interrupt when it terminates.
LE W 15 Program Counter Load Enable bit. If this bit is 1 when writing to the
DSP control port, then bits 0-7 of the 32-bit value being written will be
loaded into the DSP’s program counter. Otherwise, these bits are
ignored. The DSP’s program counter may only be loaded when the
DSP is halted (EX = 0).
4. Buses
4.1 The D0 Bus
The D0 bus connects the DSP to the outside world and is used during DMA transfers.
Since this bus is used only for DMA, the DSP can continue to execute instructions and
access memory while DMA is occurring, as long as it doesn’t touch the bank of data
RAM that is involved in the DMA transfer. The D0 bus operates at the full clock rate of
the SH2 (28 MHz), unlike the other buses, which operate at half that rate.
4.2 The D1 Bus
The D1 bus is used for most data movement operations. It connects the DSP’s data RAM
to most of the registers and is also used for loading 8-bit immediate data into the DSP’s
registers. See section 5.4 or the “Saturn SCU DSP Programmer’s Reference” sheet for
details of which data movement operations are performed on the D1 bus.
4.3 The X Bus
The X bus connects the DSP’s data RAM to the RX and P registers. The X bus allows
the RX register or the P register to be loaded at the same time that other data movement
operations are occurring on the D1 bus and the Y bus.
4.4 The Y Bus
The Y bus connects the DSP’s data RAM to the RY and A registers. The Y bus allows
the RY register or the accumulator to be loaded at the same time that other data
movement operations are occurring on the D1 bus and the X bus.
For additional information about the architecture of the DSP’s buses, refer to the DSP
block diagram in section 4.1 of the SCU User’s Manual.
5. Instruction Set
5.1 ALU Instructions
These instructions take their input from the accumulator and the P register. The output is
available on the same cycle. In order for the ALU output to be stored in the accumulator,
the MOV ALU,A instruction must be used in parallel with the ALU instruction.
However, even if you don’t use MOV ALU,A, you can still store the ALU result in
memory, and the condition codes will still be set. You can also say CLR A in parallel
with an ALU instruction. The accumulator will be cleared, but the condition codes will
still be set according to the ALU result, and the ALU result can still be stored to memory.
Note that the ALU result must be stored in the accumulator or in data RAM on the same
cycle in which it is computed, or it will be lost. ALU instructions may be used in parallel
with X-bus, Y-bus, and D1-bus instructions
Mnemonic Description S Z CV E x
AD2 Add ALH and ALL to PH and PL S Z CV - -
ADD Add ALL and PL S Z CV - -
AND And ALL with PL SZ0 - - -
NOP Do nothing - - - - - -
OR Or ALL with PL SZ0 - - -
RL Rotate ALL left once; d31 moves to d0 and to C S ZC - - -
RL8 Rotate ALL left 8 times; d24 moves to d0 and to C S ZC - - -
RR Rotate ALL right once; d0 moves to d31 and to C S ZC - - -
SL Shift ALL left once; d31 moves to C S ZC - - -
SR Shift ALL right once arithmetically; d0 moves to C S ZC - - -
SUB Subtract PL from ALL S Z CV - -
XOR Exclusive-or ALL with PL SZ0 - - -
5.2 X-Bus Instructions
These instructions allow the RX and P registers to be loaded from data RAM, and they
also allow multiplier’s output to be loaded into the P register. The instructions that load
the RX register may be used in parallel with the MOV MUL,P instruction. X-bus
instructions may be used in parallel with ALU, Y-bus, and D1-bus instructions. None of
these instructions affect the processor status flags.
Mnemonic Description
MOV Mn,X Move the word pointed at by the CTn register (n = 0-3) into
RX
MOV MCn,X Move the word pointed at by CTn into RX and increment CTn
MOV MUL,P Move 48-bit multiplier result into PH and PL
MOV Mn,P Move the word pointed at by CTn (n = 0-3) into PL; sign
extend into PH
MOV MCn,P Move the word pointed at by CTn into PL, sign extend, and
increment CTn
5.3 Y-Bus Instructions
These instructions allow the RY register and the accumulator to be loaded from data
RAM, and they also allow ALU output to be loaded into the accumulator. The
instructions that load the RY register may be used in parallel with the MOV ALU,A
instruction or the CLR A instruction. Y-bus instructions may be used in parallel with
ALU, X-bus, and D1-bus instructions. None of these instructions affect the processor
status flags.
Mnemonic Description
MOV Mn,Y Move the word pointed at by the CTn register (n = 0-3) into
RY
MOV MCn,Y Move the word pointed at by CTn (n = 0-3) into RY and
increment CTn
CLR A Set accumulator to 0
MOV ALU,A Gate results of ALU operation into accumulator
MOV Mn,A Move word pointed at by CTn (n = 0-3) into ALL; sign extend
into ALH
MOV MCn,A Move word pointed at by CTn into ALL, sign extend, and
increment CTn
5.4 D1-Bus Instructions
These instructions perform the bulk of the data movement chores. D1-bus instructions
may be used in parallel with ALU, X-bus, and Y-bus instructions. None of these
instructions affect the processor status flags.
Mnemonic Description
MOV imm8,MCn Move 8-bit immediate data to location pointed at by CTn;
increment CTn
MOV imm8,reg Move 8-bit immediate data to RX, PL, RA0, WA0, LOP, TOP,
or CT0-3
MOV ALH,MCn Move upper 32 bits of 48-bit accumulator to data RAM;
increment CTn
MOV ALH,reg Move upper 32 bits of accum. to RX, PL, RA0, WA0, LOP,
TOP, or CT0-3
MOV ALL,MCn Move lower 32 bits of 48-bit accumulator to data RAM;
increment CTn
MOV ALL,reg Move lower 32 bits of accum. to RX, PL, RA0, WA0, LOP,
TOP, or CT0-3
MOV Mn,MCm Move word pointed at by CTn to word pointed at by CTm;
increment CTm
MOV MCn,MCm Move word pointed at by CTn to word at CTm; increment CTn
and CTm.
5.5 Move Immediate Instructions
These instructions are used to load immediate values that are too large for the D1-bus
instructions, or to load an immediate value into the program counter, which the D1-bus
instructions won’t do. MVI instructions may not be used in parallel with other
instructions. None of these instructions affect the processor status flags.
Mnemonic Description
MVI imm25,MCn Move 25-bit immediate data to location pointed at by Ctn;
increment CTn
MVI imm25,reg Move 25-bit immediate data to RX, PL, RA0, WA0, LOP,
or PC
MVI imm19,MCn,cond Move 19-bit immediate data to data RAM conditionally;
increment CTn
MVI imm19,reg,cond Move 19-bit imm. data to RX, PL, RA0, WA0, LOP, or PC
conditionally
For the cond parameter, substitute one of the following: Z, NZ, S, NS, C, NC, T0, NT0,
ZS, or NZS. For example, the instruction MVI 1,RX,Z moves a 1 into the RX register if
and only if the Z flag is set. MVI 1,RX,NZ performs the move if and only if the Z flag
is clear. MVI 1,RX,ZS performs the move if either Z or S is set, and MVI 1,RX,NZS
performs the move if both Z and S are clear. By conditionally moving a value into the
program counter, you can create a conditional subroutine call (see section 7.1 for more
about how to create subroutine calls on the DSP).
5.6 DMA Instructions
These instructions initiate DMA transfers between the DSP’s memory and external
memory. Before the transfer is started, the source or destination address in external
RAM must be stored in register RA0 (when reading data from external memory into the
DSP’s memory) or WA0 (when writing data to external memory from the DSP’s
memory). The addresses stored in RA0 and WA0 are multiplied by four before being
used to address external RAM, so the actual source or destination addresses must be
divided by four before being stored to RA0 or WA0.
The DSP can continue processing while the DMA transfer takes place. If a program
depends on data from a DMA transfer being available, it must poll the T0 flag to make
sure that the DMA transfer has been completed. DMA instructions may not be used in
parallel with other instructions. Apart from the T0 flag, DMA does not affect the
processor status flags.
Mnemonic Description
DMA D0,Mn,imm8 Transfer imm8 32-bit words from work RAM to data RAM
indexed by CTn
DMA D0,PRG,imm8 Transfer imm8 32-bit words from work RAM to program RAM
location 0
DMA Mn,D0,imm8 Transfer imm8 32-bit words from data RAM indexed by CTn
to work RAM
DMA D0,Mn,count Transfer from work RAM to data RAM indexed by CTn
DMA D0,PRG,count Transfer from work RAM to program RAM location 0
DMA Mn,D0,count Transfer from data RAM indexed by CTn to work RAM
DMAH D0,Mn,imm8 Transfer imm8 32-bit words from work RAM to data RAM
indexed by CTn
DMAH D0,PRG,imm8 Transfer imm8 32-bit words from work RAM to program RAM
location 0
DMAH Mn,D0,imm8 Transfer imm8 32-bit words from data RAM indexed by CTn
to work RAM
DMAH D0,Mn,count Transfer from work RAM to data RAM indexed by CTn
DMAH D0,PRG,count Transfer from work RAM to program RAM location 0
DMAH Mn,D0,count Transfer from data RAM indexed by CTn to work RAM
For the count parameter, substitute either Mn or MCn (n = 0-3). The number of words
to be transferred is read from the specified location in data RAM n. If MCn is specified,
then register CTn is incremented after the transfer count is read.
The difference between the DMA instructions and the DMAH instructions is that the
DMAH instructions reset the RA0 or WA0 registers to their starting values after the
transfer is complete, allowing the same transfer to be performed repeatedly without the
need to reinitialize the registers. The DMA instructions leave RA0 and WA0 pointing to
the long-word immediately following the last long-word read or written.
5.7 Jump Instructions
These instructions jump to a given location in program RAM. Note that, since the DSP
prefetches one instruction ahead, the instruction immediately following a jump
instruction will be executed whether the jump is taken or not. Jump instructions may not
be used in parallel with other instructions. None of these instructions affect the
processor status flags.
Mnemonic Description
JMP imm8 Unconditional jump
JMP cond,imm8 Conditional jump
For the cond parameter, substitute one of the following: Z, NZ, S, NS, C, NC, T0, NT0,
ZS, or NZS. For example, the instruction JMP FOO,Z jumps to the label FOO if and
only if the Z flag is set. JMP FOO,NZ jumps if and only if the Z flag is clear. JMP
FOO,ZS jumps if either Z or S is set, and JMP FOO,NZS jumps if both Z and S are
clear.
5.8 Looping Instructions
These instructions control iterative processing. The BTM, or loop-bottom, instruction
first examines the contents of the loop-counter register (LOP). If LOP is zero, BTM
does nothing. Otherwise, BTM decrements LOP and then branches back to the address
found in TOP. Note that the instruction immediately following the BTM is executed
whether BTM branches or not. Refer to section 7.1 for a description of how BTM can
be used to return from a subroutine. The LPS instruction allows repeated execution of a
single instruction, using LOP as a counter. Looping instructions may not be used in
parallel with other instructions. These instructions do not affect the processor status
flags.
Mnemonic Description
BTM If LOP=0, do nothing, else decrement LOP and set the PC to
TOP
LPS Repeat the next instruction LOP+1 times
5.9 Halt Instructions
These instructions halt the DSP with or without an interrupt. They may not be used in
parallel with other instructions.
Mnemonic Description S Z CV E x
END Halt without interrupt - - - - -0
ENDI Halt with interrupt - - - - 10
6. Parallelism
The DSP’s two main functional units (the ALU and the multiplier) can operate in
parallel, as can its four buses and its four banks of data RAM. As a result, the DSP can
execute up to six instructions in a single cycle, including any or all of the following: one
ALU instruction, an instruction to load the RX or P register, the MOV MUL, P
instruction, an instruction to load the RY register or the accumulator, either the MOV
ALU, A instruction or the CLR A instruction, and a D1-bus instruction. These are the
only instructions that can be used in parallel with each other; other instructions require a
cycle of their very own.
7. Programming Techniques
7.1 Subroutines
When the MVI (move immediate) instruction is used to alter the contents of the program
counter, the previous value of the program counter (which points at the instruction
immediately following the MVI) is saved in the TOP register, yielding a crude jump-to-
subroutine mechanism. To jump to a subroutine, issue an instruction of the form MVI
SUB,PC. Assuming that the LOP register has been initialized to something other than
zero, the BTM instruction can then be used to return from the subroutine.
7.2 Organizing Data
Because each of the DSP’s four index registers is dedicated to a single bank of the DSP’s
data RAM, data structures that need to be accessed simultaneously should reside in
different data RAM banks. If, for example, you want to multiply a matrix by a series of
vectors, then the matrix should be in one bank, the input vectors in a second bank, and the
output vectors in a third. Otherwise, time will be wasted in unnecessarily loading and
reloading index registers.
The DSP is much more efficient when it can read and write data sequentially, so it pays
to structure your data accordingly. It may even pay to have the DSP reformat some of its
data before it starts crunching on it, although the DSP is not terribly efficient at general-
purpose data processing. For an example of this, see the matrix multiplication program in
section 8.2.
7.3 Maximizing Parallelism
The DSP’s advantage over the SH2 lies almost entirely in its ability to perform multiple
operations in parallel, and optimizing this parallelism is crucial to using the DSP
effectively. Strive to keep the multiplier fed. Don’t use an MVI instruction, which
monopolizes an entire cycle, when you can use a MOV instruction, which can be
executed in parallel with other instructions. You can only load one index register per
cycle, so make sure that at least most of your data is stored in the order in which your
program will need it. Remember that the accumulator can be cleared (using CLR A) for
a new sum of products in the same cycle that the previous sum of products is computed
and stored.
8. Examples
The formatting conventions used in these examples are consistent with those supported
by the DSP assembler. It may be helpful to step through these examples using the DSP
simulator. Further examples may be found in the DSP Assembler manual. See also the
Saturn SCU DSP demonstration program.
8.1 Dot Product
This example computes the dot product of two 3-element vectors. Recall that the dot
product of the vectors (x1, y1, z1) and (x2, y2, z2) is defined as x1*x2 + y1*y2 + z1*z2.
We assume that the two vectors are already loaded into the DSP’s data RAM: the first at
locations 0 through 2 of data RAM 0, and the second at the same locations in data RAM
1. The elements of the vectors are presumed to be 16.16 fixed point numbers. The result
is stored in location 0 of data RAM 2.
mov 0,ct0 ; Point CT0 at the first input vector.
mov 0,ct1 ; Point CT1 at the second input vector.
;
; Now that the index registers are initialized, we can start loading
; the vector elements. The first instruction loads the first elements
; of the two vectors into RX and RY, clears the accumulator, and
; initializes the index register that will be used to store the
; results. The second instruction loads the second vector elements and
; moves the product of the first two elements into the P register. The
; third instruction loads the third vector elements, moves the product
; of the second elements into the P register, and adds the product of
; the first vector elements to the accumulator, and so on. Finally, we
; store the upper 32 bits of the accumulator to data RAM 2.
;
mov mc0,x mov mc1,y clr a mov 0,ct2
mov mc0,x mov mul,p mov mc1,y
ad2 mov mc0,x mov mul,p mov mc1,y mov alu,a
ad2 mov mul,p mov alu,a
ad2 mov alu,a mov alh,mc2
endi
8.2 Matrix Multiplication
This example multiplies two 3x3 matrices together. The entries in the matrices are
presumed to be 16.16 fixed-point numbers. The matrices are initially in work RAM, so
the DSP must transfer them into its data RAM before multiplying them together. When
the product has been computed, it will be transferred to work RAM.
Mat1Addr = $6020000 ; Work RAM address of first input matrix.
Mat2Addr = $6020100 ; Work RAM address of second input matrix.
MatOutAddr = $6020200 ; Work RAM destination for product matrix.
Mat1 = 0 ; Address of first matrix in data RAM 0.
Mat2 = 0 ; Address of second matrix in data RAM 1.
M2Tmp = 0 ; Temp. address of 2nd matrix in data RAM 3.
MProd = 0 ; Address of product matrix in data RAM 2.
org 0
;
; Load the second matrix first, because we’re going to transpose it
; while the first matrix is loading. Note that the work RAM address
; of the matrix is divided by four before being loaded into RA0.
;
mov M2Tmp,ct3 ; Load second matrix into data RAM 3.
mvi Mat2Addr>>2,ra0
dma d0,m3,9 ; Transfer the 9 words of the second matrix.
DMAWtM2: jmp t0,DMAWtM2 ; Wait for DMA to be done.
mov Mat1,ct0 ; Prefetched: happens each time jump does.
;
; Now load the first matrix into data RAM 0.
;
mvi Mat1Addr>>2,ra0
dma d0,m0,9 ; Transfer the 9 words of the first matrix.
;
; While the first matrix is loading, copy the second matrix from data
; RAM 3 to data RAM 1, transposing it as we go. We want the second
; matrix to be transposed in order to index the elements of the matrix
; more efficiently during the actual matrix multiplication.
;
mov M2Tmp,ct3
mov Mat2,ct1 ; Copy the first row of the original matrix
mov mc3,mc1 ; to the first column of the transposed
mov Mat2+3,ct1 ; matrix.
mov mc3,mc1
mov Mat2+6,ct1
mov mc3,mc1
mov Mat2+1,ct1 ; Copy the second row of the original matrix
mov mc3,mc1 ; to the second column of the transposed
mov Mat2+4,ct1 ; matrix.
mov mc3,mc1
mov Mat2+7,ct1
mov mc3,mc1
mov Mat2+2,ct1 ; Copy the third row of the original matrix
mov mc3,mc1 ; to the third column of the transposed
mov Mat2+5,ct1 ; matrix.
mov mc3,mc1
mov Mat2+8,ct1
mov mc3,mc1
DMAWtM1: jmp t0,DMAWtM1 ; Make sure DMA is done.
mov Mat2,ct1 ; Point at second matrix (prefetched).
mov Mat1,ct0 ; Point at first matrix.
;
; Now that the matrices are in place and in an advantageous format, we
; can multiply them together efficiently.
;
mov mc0,x mov mc1,y
mov mc0,x mov mul,p mov mc1,y clr a
ad2 mov mc0,x mov mul,p mov mc1,y mov alu,a mov Mat2,ct1
ad2 mov mc0,x mov mul,p mov mc1,y mov alu,a mov MProd,ct2
ad2 mov mc0,x mov mul,p mov mc1,y clr a mov alh,mc2
ad2 mov mc0,x mov mul,p mov mc1,y mov alu,a mov Mat2,ct1
ad2 mov mc0,x mov mul,p mov mc1,y mov alu,a mov MProd+3,ct2
ad2 mov mc0,x mov mul,p mov mc1,y clr a mov alh,mc2
ad2 mov mc0,x mov mul,p mov mc1,y mov alu,a mov Mat1,ct0
ad2 mov mul,p mov alu,a mov Mat2+3,ct1
ad2 mov mc0,x mov mc1,y mov alu,a mov MProd+6,ct2
mov mc0,x mov mul,p mov mc1,y clr a mov alh,mc2
ad2 mov mc0,x mov mul,p mov mc1,y mov alu,a mov Mat2+3,ct1
ad2 mov mc0,x mov mul,p mov mc1,y mov alu,a mov MProd+1,ct2
ad2 mov mc0,x mov mul,p mov mc1,y clr a mov alh,mc2
ad2 mov mc0,x mov mul,p mov mc1,y mov alu,a mov Mat2+3,ct1
ad2 mov mc0,x mov mul,p mov mc1,y mov alu,a mov MProd+4,ct2
ad2 mov mc0,x mov mul,p mov mc1,y clr a mov alh,mc2
ad2 mov mc0,x mov mul,p mov mc1,y mov alu,a mov Mat1,ct0
ad2 mov mul,p mov alu,a mov Mat2+6,ct1
ad2 mov mc0,x mov mc1,y mov alu,a mov MProd+7,ct2
mov mc0,x mov mul,p mov mc1,y clr a mov alh,mc2
ad2 mov mc0,x mov mul,p mov mc1,y mov alu,a mov Mat2+6,ct1
ad2 mov mc0,x mov mul,p mov mc1,y mov alu,a mov MProd+2,ct2
ad2 mov mc0,x mov mul,p mov mc1,y clr a mov alh,mc2
ad2 mov mc0,x mov mul,p mov mc1,y mov alu,a mov Mat2+6,ct1
ad2 mov mc0,x mov mul,p mov mc1,y mov alu,a mov MProd+5,ct2
ad2 mov mc0,x mov mul,p mov mc1,y clr a mov alh,mc2
ad2 mov mc0,x mov mul,p mov mc1,y mov alu,a
ad2 mov mul,p mov alu,a mov MProd+8,ct2
ad2 clr a mov alh,mc2
;
; The product has now been computed, so send it to work RAM and halt.
;
mvi MatOutAddr>>2,wa0
mov MProd,ct2
dma m2,d0,9
DMAWtP: jmp t0,DMAWtP ; Wait for DMA to be done.
nop ; Prefetched.
endi
SEGA SATURN TECHNICAL BULLETIN #SOA-9
To: Sega and Third Party Developers
From: Developer Technical Support
Date: August 16, 1995
Re: Saturn SCU DSP Programmer’s Reference
The following page contains a quick reference table for SCU DSP
programming.
Saturn SCU DSP Programmer’s Reference
Instruction Description T SZ CVE x ALU Instructions
AD2 Add ACH and ACL to PH and PL - SZ CV - - ALU results will not be stored in the
ADD Add ACL and PL - SZ CV - - accumulator unless MOV ALU, A is used.
AND And ACL with PL - SZ 0 - - - ALU results may be stored in memory,
A NOP Do nothing - - - - - - - and condition codes will be set correctly,
OR Or ACL with PL - SZ 0 - - - even if MOV ALU, A is not used.
L RL Rotate ACL left once; d31 moves to d0 and to C - SZ C - - - If CLR A is used, condition codes are still
RL8 Rotate ACL left 8 times; d24 moves to d0 and to C - SZ C - - - set based on the ALU result, and the ALU
U RR Rotate ACL right once; d0 moves to d31 and to C - SZ C - - - result may still be stored to memory.
SL Shift ACL left once; d31 moves to C - SZ C - - - The ALU result must be retrieved or
SR Shift ACL right once arithmetically; d0 moves to C - SZ C - - - stored in the same cycle in which it is
SUB Subtract PL from ACL - SZ CV - - computed, or it will be lost.
XOR Exclusive-or ACL with PL - SZ 0 - - - Multiplication
MOV dram+,X Move data RAM to RX - - - - - - - The product of the RX and RY registers
X MOV MUL,P Move 48-bit multipler result into PH and PL - - - - - - - can be read by using MOV MUL, P one
MOV dram+,P Move data RAM to PL and sign extend into PH - - - - - - - cycle after the values of RX and/or RY
MOV dram+,Y Move data RAM to RY - - - - - - - are set. The product remains available
Y CLR A Set accumulator to 0 - - - - - - - until RX or RY is altered.
MOV ALU,A Gate results of ALU operation into accumulator - - - - - - - Immediate Data
MOV dram+,A Move data RAM to ACL and sign extend into ACH - - - - - - -
Immediate data is signed; sign extension is
MOV imm8,dest1 Move short immediate data to data RAM or register - - - - - - - performed when moving immediate data
D MOV ALH,dest1 Move upper 32 bits of 48-bit accumulator - - - - - - - into a register or into memory.
1 MOV ALL,dest1 Move lower 32 bits of 48-bit accumulator - - - - - - -
DMA
MOV dram+,dest1 Move data RAM to data RAM or register - - - - - - -
MVI imm25,dest2 Move immediate data to data RAM or register - - - - - - - Addresses stored in RA0 or WA0 are
multiplied by four before being used to
MVI imm19,dest2,cond Move immediate data conditionally - - - - - - -
address external memory.
DMA D0,dpram,imm8 Transfer from external RAM to data/program RAM 1 - - - - - - When DMAH is used, RA0 or WA0 is
DMA dram,D0,imm8 Transfer from data RAM to external RAM 1- - - - - - reset to its starting value after the transfer
DMA D0,dpram,ctr Transfer from external RAM to data/program RAM 1 - - - - - - is complete, allowing the same transfer to
DMA dram,D0,ctr Transfer from data RAM to external RAM 1- - - - - - be performed repeatedly without
DMAH D0,dpram,imm8 Transfer from external RAM to data/program RAM 1 - - - - - - reinitializing RA0 or WA0.
DMAH dram,D0,imm8 Transfer from data RAM to external RAM 1- - - - - -
DMAH D0,dpram,ctr Transfer from external RAM to data/program RAM 1 - - - - - - Jump Instructions
DMAH dram,D0,ctr Transfer from data RAM to external RAM 1- - - - - - JMP Z,imm8 jumps if the Z flag is set
JMP imm8 Unconditional jump - - - - - - - JMP NZ,imm8 jumps if Z is clear.
JMP cond,imm8 Conditional jump - - - - - - - JMP ZS,imm8 jumps if either Z or S is set.
JMP NZS,imm8 jumps if Z and S are both
BTM If LOP=0, do nothing, else decrement LOP; PC=TOP - - - - - - -
clear.
LPS Repeat the next instruction LOP+1 times - - - - - - - The instruction after a JMP or BTM
END Halt without interrupt - - - - - - 0 instruction is always executed, whether
ENDI Halt with interrupt - - - - - 1 0 the jump is taken or not.
cond = Z, NZ, S, NS, C, NC, T0, NT0, ZS, NZS dram = M0-M3 Subroutines
ctr = M0-M3, MC0-MC3 dram+ = M0-M3 or MC0-MC3 Subroutines can be created by taking
dest1 = MC0-MC3, RX, PL, RA0, WA0, LOP, TOP, CT0-CT3 imm8 = 8-bit immediate data advantage of the fact that when loading
dest2 = MC0-MC3, RX, PL, RA0, WA0, LOP, PC imm19 = 19-bit immediate data an immediate value into the PC using the
dpram = M0-M3 or PRG imm25 = 25-bit immediate data MVI instruction, the previous value of the
Data Movement Table PC is copied to the TOP register. The
The following table shows which source/destination combinations are supported by the DSP’s various value that gets copied to the TOP register
move instructions and whether the data movement is performed by the X bus, the Y bus, the D1 bus, or is the address in program RAM of the
by MVI. instruction immediately following the MVI
instruction. If the LOP register is
Destinations initialized to 1, then the BTM instruction
Sources A P RX RY RA0 WA0 LOP TOP PC CTn mem can be used to return from the subroutine,
ALH - D1 D1 - D1 D1 D1 D1 - D1 D1 as follows:
ALL - D1 D1 - D1 D1 D1 D1 - D1 D1 mov 1,lop ; D1 bus.
mem Y X X Y D1 D1 D1 D1 - D1 D1 mvi Sub,pc ; Go to subroutine.
imm8 - D1 D1 - D1 D1 D1 D1 - D1 D1 nop ; Gets prefetched.
.
imm25 - MVI MVI - MVI MVI MVI - MVI - - .
DSP Registers Processor Status Flags Sub: mov ... ; Whatever.
Name Size Description Name Definition .
.
A (ALH/ALL) 48 Receives results of ALU operations PR Pause reset btm ; Return to nop.
P (PH/PL) 48 Receives results from multiplier EP Execute pause
RX 32 Multiplier input register T0 Transfer 0 (DMA flag) Note that the NOP gets executed twice:
RY 32 Multiplier input register S Sign once when the subroutine call is made,
CT0-CT3 6 Data RAM index registers Z Zero and once after the subroutine returns.
LOP 12 Loop counter C Carry
SCU Registers Relating to the DSP
TOP 8 Holds loop-start or subroutine return address V Overflow/underflow
PC 8 Program counter E End interrupt 0x25fe0080 Program control port
RA0 32 DMA address for reading from external RAM ES Execute single step 0x25fe0084 Program RAM data port
WA0 32 DMA address for writing to external RAM EX Execution control 0x25fe0088 Data RAM address port
LE PC load enable 0x25fe008c Data RAM data port
SEGA SATURN TECHNICAL BULLETIN #SOA-10
To: Sega and Third Party Developers
From: Developer Technical Support
Date: August 16, 1995
Re: Saturn SCU DSP Demonstration Program
Introduction
The Saturn SCU DSP Demonstration program provides sample code which runs on the
DSP, along with a shell program written in Gnu C which loads the program into the DSP
and executes it. The shell program uses the DSP support functions found in the DSP
module of the Sega Standard Saturn Library for loading, starting, and halting the DSP.
The demonstration program itself is available on Sega’s BBS in the Saturn conference as
the file DSP_DEMO.ZIP.
List of Files
The source and executable files are all in the directory “code”. Here’s a brief description
of each file.
main.c Shell program source file.
main.o Shell program object file.
makefile Compiles, assembles, links, and rebuilds the “.lnk” file.
pttrans.d DSP object code in C-compilable format.
pttrans.dsp DSP source code.
pttrans.s DSP object code in S-record format.
sl.lnk Linker script file (built by the makefile).
sl.map Map file.
sl.sre Executable file in S-record format.
What the Program Does
The DSP sample program performs 3D point transformation, i.e. it multiplies a 4x3
homogeneous matrix by an arbitrary list of 3-element vectors (the fourth element of each
vector is presumed to be 1). The program attempts to take full advantage of the
parallelism built into the DSP, and the transformation matrix, the input points, and the
output points are transferred using the SCU’s DMA capability. The sample code
performs point transformations roughly a third faster than the equivalent code written in
SH2 assembly language, even allowing for the time spent transferring data into and out of
the DSP’s memory. It is hoped that this program is general and useful enough to be used
in an actual development environment.
The program accepts parameters in the form of a parameter block having the following
format:
Parameter Block + 0x0: Address (divided by 4) of the transformation matrix in
work RAM.
Parameter Block + 0x4: The number of points to be transformed.
Parameter Block + 0x8: Address (divided by 4) of the first input point.
Parameter Block + 0xc: Address (divided by 4) of a buffer that will hold the
transformed points.
If you specify more points than the DSP can hold in its memory at one time, the program
will load and transform the points in batches that will fit into the DSP’s data RAM.
The addresses are divided by four because the contents of the DSP’s DMA read and write
registers get multiplied by four before they are used, and the SH2 is better suited to
performing clerical work such as adjusting parameter formats than the DSP is.
Building and Running the Program
The program was built using Gnu C version 95q1 and version 2.00 of the SCU DSP
assembler. The makefile provided will rebuild the executable file if you make any
changes. The makefile is configured to produce an executable file in S-record format.
See the next section for instructions on how to alter the makefile so that it produces
output in COFF format. Once the program has been downloaded, execute it starting at
address 0x6004000. You won’t see anything on the screen; the shell program just loads
and runs the DSP program and then drops into an infinite loop. In order to check the
results of the DSP program, you must break out of the shell program and examine the
array OutputPts.
Getting Output in COFF Format
You can get an executable file in COFF format by modifying the makefile as follows:
first, for formality’s sake, change all of the “.sre” file extensions to “.cof”. Then find the
OUPUT_FORMAT instruction in the portion of the makefile that builds the linker script,
and change “srec” to “coff-sh”. That’s it.
SEGA SATURN TECHNICAL BULLETIN #SOA-11
To: Sega and Third Party Developers
From: Developer Technical Support
Date: August 16, 1995
Re: VDP2 Rotating Backgrounds
Introduction
The Saturn’s rotating background hardware allows you to rotate a character or bit
mapped image in several different ways. Scaling and translation are also supported. This
document provides an overview of the capabilities and limitations of this hardware. It is
not intended to fully document every feature of the hardware, but to clarify the concepts
underlying its operation. We presume that you have an understanding of basic 3D
graphics concepts such as rotation matrices.
What Does It Do? Z
The Saturn Basic Library
displays rotated
backgrounds in a right- X
handed coordinate
system (see Fig. 1). The
positive Z direction
points into the screen,
and positive rotations are
clockwise as you look Y
toward the origin from
the positive end of each Figure 1
primary axis, as shown in The coordinate system in which the rotating backgrounds are displayed.
the figure.
Before a background is rotated, it exists in the XY plane, with its upper-left-hand corner
at the origin. When the VDP2 rotates and otherwise transforms such a background, it
performs a number of operations in a fixed sequence (note that this description, while
conceptually accurate, does not necessarily reflect the manner in which these operations
are implemented in the hardware):
Step 1. The background is translated in X and Y.
Step 2. The translated background is rotated twice around a center of rotation that you
specify. First, the background is rotated around an axis that passes through the center
point and is parallel to the Z axis, i.e. the background rotates in the XY plane. Then the
background is rotated around an axis that passes through the center point and is parallel
to either the horizontal axis (the X axis) or the vertical axis (the Y axis). Rotation around
a horizontal axis and rotation around a vertical axis are mutually exclusive. In practice,
these two rotations are accomplished using a single rotation matrix in the rotation
parameter table, but it may be helpful to think of them as being separate.
Step 3. The twice-rotated background is now projected onto the screen by scaling each
line or column of the display to simulate perspective: lines or columns that are far away
are scaled down; lines or columns that are close are scaled up. If you rotated around a
horizontal axis in step 3, then the transformed background is scaled line-by-line. If you
rotated around a vertical axis, then it is scaled column-by-column.
Step 4. The transformed and projected background is rotated one last time around the Z
axis. This is equivalent to what you would expect to see while banking in a flight
simulator. Note that this last rotation can be applied to the VDP1 frame buffer as well,
allowing the sprites and the background to rotate together. To do this, set the TVM field
of the VDP1’s TV mode register to either 2 (Rotation 16 mode) or 3 (Rotation 8 mode).
For further details, see pp. 15 and 36-37 of the VDP1 User’s Manual.
Figure 2 (next page) illustrates this sequence of events. Of course, not all of these
transformations need be performed, and any or all of them can be disabled by specifying
a rotation or translation of zero.
How Do You Control It?
The various rotation, translation, and scaling operations are controlled by the rotation
parameter table (pp. 153-156 of the VDP2 User’s Manual) and the coefficient table (ibid.,
pp. 163-165). In general, the rotation parameter table controls 3D transformation, while
the coefficient table controls 2D perspective projection, though the coefficient table can
be used to perform scaling as well. Here’s how each step of the above sequence of
transformations is controlled.
Step 1. The initial translation in X and Y is controlled by the 24-bit signed fixed-point
values Mx and My, found at offsets 0x44 and 0x48 in the rotation parameter table.
Positive values cause the background to move up and to the left on the screen.
Step 2. These rotations are controlled by a rotation matrix stored in the rotation
parameter table. Each entry in the matrix is a 14-bit signed fixed point value. The
hardware performs these two initial rotations according to the following formula:
| A B C |
(X Y Z) * | D E F | = (XT Y T ZT)
| G H I |
Where (X Y Z) is an initial point and (X T Y T ZT) is the corresponding rotated point. A
rotation of 90 degrees about the Z axis, for example, would be represented by the matrix
| 0 -1 0 |
| 1 0 0 |
| 0 0 1 |
Z Z
X X
Y Y
Figure 2a Figure 2b
Initial orientation of the background. Translation in the XY plane.
Z Z
X X
Y Y
Figure 2c Figure 2d
Rotation around an arbitrary Rotation around an arbitrary
perpendicular axis. horizontal axis.
Figure 2f Figure 2g
2D projection. Rotation about the Z axis.
The matrix stored in the rotation parameter table will, in general, be the product of a Z-
rotation matrix and either an X-rotation matrix or a Y-rotation matrix. The Z-rotation is
normally performed first.
The coordinates of the point around which these rotations are performed are specified in
the rotation parameter table as three 14-bit signed integers at offsets 0x3c, 0x3e, and
0x40. If the coordinates of the center of rotation are (CX CY CZ), then a more complete
expression of the formula used for rotating points during these steps of the transformation
process would be
| A B C |
(X-C X Y-C Y Z-CZ) * | D E F | + (C X CY CZ) = (XT Y T ZT)
| G H I |
The rotation parameter table stores the matrix entries as 14-bit signed fixed point
numbers at offsets 0x1c through 0x30. Only the first two rows of the matrix are stored.
The class of rotations supported by the hardware is sufficiently restricted that the third
row can be done without.
Step 3. It is at this stage that the coefficient table comes into play. A coefficient must be
calculated for each row or column of the display, depending on whether rotation was
performed about a horizontal axis or a vertical axis. Each coefficient specifies the
amount of perspective distortion to apply to each line or column of the screen. Smaller
coefficients cause a greater degree of magnification. The coefficients are fixed-point
numbers, and a couple of formats are available (see p. 165 of the VDP2 User’s Manual).
The coefficient tables may also be used to scale the projected image: multiplying all of
the coefficients by a constant causes the image on the screen to zoom in or out. Scaling
the image can also be accomplished with the matrix in the rotation parameter table.
Refer to the file scl_ro00.C in the Saturn Basic Library to see how the coefficients are
actually calculated. The calculations are performed in the functions SCL_RotateX and
SCL_RotateY. Look for assignments to SclK_TableBuff[TbNum][i].
The range of Z coordinates that get projected onto the screen, as well as the degree of
perspective compression, is determined by the point of view. The coordinates of the
point of view (P X P Y P Z) are 14-bit signed integers found at offsets 0x34, 0x36, and 0x38
in the rotation parameter table. The Z coordinate of the point of view corresponds to the
distance from the point of view to the background before any transformations are
performed. The X and Y coordinates are normally set to the center of the screen, e.g. 160
and 112 for a 320x224 screen.
Step 4. The final rotation of the projected image about the Z axis is a 2D rotation, and it
is performed by scanning the projected image “diagonally.” The rotation parameter table
specifies the horizontal and vertical offsets from the unrotated upper-left-hand corner of
the screen to the rotated upper-left-hand corner of the screen using a pair of 23-bit signed
fixed-point values (Xst and Yst) at offsets 0 and 4. In addition, delta-x and delta-y values
giving the angles of the rotated X and Y axes are specified in the rotation parameter table
as 13-bit signed fixed-point numbers at offsets 0xc and 0x10 (for the rotated Y axis) and
0x14 and 0x18 (for the rotated X axis).
If X or Y rotation is being performed, then the coefficient table must also be scanned
differently in order to perform this final Z rotation. Both the rate and the direction in
which the coefficient table is scanned for each row and for each column of pixels varies
with the angle of rotation. This is controlled by the values KAst, ∆KAst and ∆KAx at
offsets 0x54, 0x58, and 0x5c in the rotation parameter table. KAst determines where
scanning of the coefficient table begins; ∆KAst determines the increment which will be
used to step through the coefficient table line-by-line, and ∆KAx determines the
increment which will be used to step through the table column-by-column. Note that
these values are fixed-point values, and fractional increments are possible. Refer to the
file scl_ro00.C in the Saturn Basic Library to see how to set these values. The values are
set in the functions SCL_RotateX() and SCL_RotateY(). Look for assignments to
SclRotregBuff[TbNum].k_tab, SclRotregBuff[TbNum].k_delta.x, and
SclRotregBuff[TbNum].k_delta.y.
SEGA SATURN TECHNICAL BULLETIN #SOA-12
To: SEGA and Third Party Developers
From: Developer Technical Support
Date: October 24, 1995
Re: Security Codes in the IP.BIN File
In the IP.BIN file, at address 40H, all games must have the appropriate area symbols for
the regions in which the game is to be released, along with the corresponding area code at
address E00H. For example:
040H UT
...
E00H ....For USA and CANADA. (32 characters)
....For TAIWAN and PHILIPINES. (32 characters)
Please make sure that the area symbols and area codes match in order, and also pad out any
unnecessary area codes with spaces making sure not to change other parts of the code. The
final IP.BIN must be 4096 bytes.
SEGA SATURN TECHNICAL BULLETIN # 4 2
(PRELIMINARY)
To: Sega and Third Party Developers
From: Developer Technical Support
Date: July 1, 1996
Re: Cautions on Using SMPC
• Use of the SH2's direct mode is prohibited
• Always use the peripheral library to fetch peripheral data.
Related Information: STN-6 "Software Libraries That Must Be Used"
Note: This does not apply to Virtua Gun, since it will not work unless used in direct mode.
Virtua Gun Reference: STN-38 "Virtua Gun Users Manual"
• Use of reserved bits is prohibited within the peripheral data format
• Do not use data that is currently used as an expansion bit or a 1 in
the peripheral data.
• These bits are data that must be set aside for future peripherals, so
they should be masked or otherwise protected from use by
programming that uses expansion bits whenever data that includes
expansion bits is used.
SEGA SATURN TECHNICAL BULLETIN # 4 4
(PRELIMINARY)
To: Sega and Third Party Developers
From: Developer Technical Support
Date: July 1, 1996
Re: Shuttle Mouse Data Format Ver. 1.00
• Table 1.1 Data Formats
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
SATURN Peripheral ID 1 1 1 0 0 0 1 1
1st Data Y Over X Over Y Sign X Sign Start Middle Right Left
2nd Data XD7 XD6 XD5 XD4 XD3 XD2 XD1 XD0
3rd Data YD7 YD6 YD5 YD4 YD3 YD2 YD1 YD0
• Character code for corresponding peripheral: Mouse = "M"
• Saturn peripheral ID = E3H
• Saturn peripheral type: EH
• Data size: 3H (3 bytes)
• Description of data
• X Over, Y Over......................... 0: X and Y values (D7~D0) are valid
1: Data overflow (0~255 exceeded)
• X Sign, Y Sign........................... 0: X and Y values (D7~D0) are positive
1: X and Y values (D7~D0) are negative
• XD7~XD0, YD7~YD0................ Data for amount of movement
(relative value)
• Middle, Right, Left, Start........ Changes to 1 when button is pressed.
• Table 1.2 Relationship between Amount of Movement (D7~D0) and Sign and
Over Bits
Amount of -257 -256 -255 ... -2 -1 +0 +1 +2 ... +254 +255 +256
Actual or or
Movement less more
D7~D0 xxH 00H 01H ... FEH FFH 00H 01H 02H ... FEH FFH xxH
Value
Y/X Sign 1 1 1 ... 1 1 0 0 0 ... 0 0 0
Y/X Over 1 0 0 ... 0 0 0 0 0 ... 0 0 1
Notes *1 D7 through D0 is not signed. Pay attention to changes in the Y and Y Over bits and X and Y Sign
bits when calculating the amount of movement.
*2 When the Y and X Over bits are set, the amount of movement (D7~D0) becomes undefined, so
always check these bits.
• Direction of mouse movement
• The signs in the figure indicate whether the Sign flag is on or off.
• The arrows indicate the direction of mouse movement.
-DY
-00H
(Up)
(Left)
-00H -FFH -FFH
-DX +00H +00H +FFH +DX
(Right)
(Down)
+FFH
+DY
SEGA SATURN TECHNICAL BULLETIN # 4 5
(PRELIMINARY)
To: Sega and Third Party Developers
From: Developer Technical Support
Date: July 10, 1996
Re: Saturn Keyboard Data Format Ver.1.00
Table 1 Keyboard Data Format
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
SATURN Peripheral 0 0 1 1 0 1 0 0
ID
1st Data Right Left Down Up Start ATRG CTRG BTRG
2nd Data RTRG XTRG YTRG ZTRG LTRG KB TYPE2 KB TYPE1 KB
TYPE0
3rd Data 0 CapsLock NumLock ScrLock Make 1 1 Break
4th Data D7 D6 D5 D4 D3 D2 D1 D0
• Saturn peripheral ID = 34H
• Saturn peripheral type: 3H
• Data size: 4H (4 bytes)
• Description of data
• KB TYPE2-0: 000B = Saturn keyboard, 001B-110B = Reserved, 111B =
Not recognized as keyboard.
• CapsLock: Outputs 1 while CapsLock is locked.
• NumLock: Outputs 1 while NumLock is locked.
• ScrLock: Outputs 1 while ScrLock is locked.
• Make: Outputs 1 when there is a valid Make code in D7-D0.
• Break: Outputs 1 when there is a valid Break code in D7-D0.
• D7-D0: Key code. Undefined except when Make or Break is 1. Keys
and key codes are explained in the table "Meaning of Key Codes"
below
• Right, Left, Down, Up, Start: Output 0 while the button (key) is
depressed.
• ATRG, BTRG, CTRG, XTRG, YTRG, ZTRG, LTRG, RTRG
• Relationship between buttons and keys
• The following shows the relationship between standard Sega Saturn
pad buttons and the keyboard.
• Right: [→] key • CTRG: [C] key
• Left: [←] key • XTRG: [A] key
• Down: [↓] key • YTRG: [S] key
• Up: [↑] key • ZTRG: [D] key
• Right: [ESC] key • LTRG: [Q] key
• ATRG: [Z] key • RTRG: [E] key
• BTRG: [X] key
• Flag changes for the CapsLock, Scroll, and NumLock keys
• The following shows how the flags change for the CapsLock,
ScrLock, and NumLock keys.
Make Break Make Break Make Break
Flag setting for
various lock keys 0 1 0 1
• Key Hitting Characteristics (Make or Break action)
Sends keycodes sequentially upon a roll over. Code is also sent sequentially
when a key is released. When a wraparound produced by hitting two or more
keys at once is detected, however, it waits until that status is cleared.
1) When no wraparound occurs
KEY1 ON OFF
KEY2 ON OFF
KEY3 ON OFF
Keycode
Transmitted
KEY1 KEY2 KEY3 KEY1 KEY2 KEY3
Make Make Make Break Break Break
2) When a wraparound occurs
KEY1 ON OFF
KEY2 ON
KEY3 ON OFF ON
Keycode
Transmitted
KEY1 KEY2 KEY3 KEY1 KEY3
Make Make Make Break Break
Wraparound Wraparound
occurs cleared
3) Repeat function (on all keys)
KEY1 ON OFF
KEY2 ON
TS TR TR TR TS TR
Keycode
Transmitted
KEY1 KEY1 KEY1 KEY1 KEY1 KEY2 KEY1 KEY2
Make MAKE Make Make Make Make Break Make
• The Make code is transmitted as long as the key is depressed. When
another key is pressed, a new repeat cycle begins.
Meaning of Key Codes
0 1 2 3 4 5 6 7 8 9 A B C D E F
00H F9 F5 F3 F1 F2 F12 F10 F8 F6 F4 Tab
10H Alt Shift Ctrl Q 1 Alt Ctrl Z S A W 2
20H C X D E 4 3 F Space V T R 5
30H N B H G Y 6 M J U 7 8
40H < K I O 0 9 > ? L ; P -
50H _ : @ ^ CapsL Shift Enter [ ]
60H Back \
70H Esc F11 ScrL
80H Ins Pause F7 Print Del ← Home End ↑ ↓ Up Down →
• Positions of duplicated keys
• 11H [Alt key] is on the left of the keyboard
• 17H [Alt key] is on the right of the keyboard
• 12H [Shift key] is on the left of the keyboard
• 59H [Shift key] is on the right of the keyboard
• 14H [Ctrl key] is on the left of the keyboard
• 18H [Ctrl key] is on the right of the keyboard
SEGA SATURN TECHNICAL BULLETIN # 4 6
(PRELIMINARY)
To: Sega and Third Party Developers
From: Developer Technical Support
Date: July 10, 1996
Re: Data Cartridge Manual Ver.1.00
1 Overview
1) Data cartridges
This data cartridge is a ROM cartridge for data that uses the A path
that supplements memory when the main memory is insufficient.
Its address appears in the A-Bus CS0 (22000000H) area.
2) Restrictions on Use
Data cartridges must contain only data; placing program code in
them is prohibited, regardless of whether the code is executed
directly or executed after transfer.
Placing program code in cartridges can be made into a security hole
by creating a ROM with this portion rewritten. In future versions of
Saturn, it will no longer be possible to access the contents of the
cartridge, so be sure to follow this rule.
3) Corresponding peripheral
The peripheral that corresponds to the SYSTEM ID of the CD-ROM
has an "R" added.
Example: Using a Sega Saturn standard pad with a data cartridge
"JR∆∆∆∆∆∆∆∆∆∆∆∆∆∆" "∆" = space (20H)
Reference: Programmer's Guide, Vol. 1, Disk Format Standards Specification, section 4, "Boot System," p. 28.
2 Data Cartridge System IDs
The following describes the system ID for data cartridges for Sega
Saturn. Data cartridge system IDs and CD-ROM system IDs do not have
the exact same items. The data cartridge has some unique items, and
some other items require a different entry than on a CD-ROM, even for
the same item name. For that reason, when entering the system ID of
the data cartridge, be sure to check this specification for all items.
3 Structure of the System ID
0 1 2 3 4 5 6 7 8 9 A B C D E F
00H Hardware ID
10H Manufacture ID
20H Product number Version
30H Release date Device invoice
40H Compatible area codes Back-up RAM information
50H RESERVED*1
60H Game title
70H
80H
90H
A0H
B0H
C0H
D0H RESERVED
E0H RESERVED CHECK SUM RESERVED
F0H RESERVED
4 Cautions on Notation
Rules
Usable characters
All characters usable in system IDs are ASCII code en-sized
alphanumeric characters. In some items, commas (,), slashes (/),
hyphens (-), and colons (:) may be used.
Entry
• All entry is flush left unless otherwise indicated. Do not start
entries with spaces.
• All open areas are ASCII code 20H unless otherwise indicated.
Definition of expressions
The ∆ sign and the word "space" used in the explanation indicate
ASCII code 20H. Also, em-size characters are used in this manual for
greater legibility.
Other definitions
Always fill in RESERVED areas with 00H.
*1 Fill in this area with spaces (20H).
5 Explanation of Individual Items
• Hardware ID (start address 00H)
Definition Enter the unique data cartridge ID
Usable characters Capital letters only
No. of characters 16 characters
Entry rules Always enter "SEGASATURN∆DATA∆"
• Manufacturer ID (start address: 10H)
Definition Enter the manufacturer name specified by
Sega.
Usable characters Alphanumeric characters only.
No. of characters 16 characters
Entry rules For the Sega brand, enter the 16 characters
"SEGA∆ENTERPRISES".
For licensees, enter the 16 characters
"SEGA∆TP∆KAISHA-A". For "KAISHA-A",
enter the unique company code assigned to
the licensee. For example, the underlined
portion of
SEGA∆TP∆T-999∆∆∆
is the company code, with the remainder
filled out by spaces. Be sure to enter 16
characters.
• Product number (start address: 20H)
Definition Enter the product number specified by SEGA.
Usable characters Alphanumeric characters only.
No. of characters 10 characters
Entry rules Fill out the blank area with spaces.
Example of entry For Sega brand titles: "GS-9099∆∆∆"
For licensee titles: T-99901G∆∆
Note: The remainder must be filled out with
spaces to reach 10 characters.
• Version (start address: 2AH)
Definition Enter the version number of the data
cartridge.
Usable characters Capital "V", numerals, and periods (.)
No. of characters 6 characters
Entry rules Start with V followed by one numeral, a
period, then three more numerals. The
release version is V1.000, with the version
number increasing every time thereafter the
version changes.
Example of entry For sample ROM: V0.802
For master ROM: V1.000
For version upgrade: V2.011
*1 The version number does not necessarily end with a master
release of V1.000. Additions and changes after release require
that the version number also be updated.
*2 This version number is different from the CD-ROM's version
number.
• Release date (start address: 30H)
Definition Enter the date that the master ROM was
created.
Usable characters Numerals only.
No. of characters 8 characters
Entry rules Enter the year, month and day. Enter four
digits for the year and two digits each for
month and day.
Example of entry For January 23, 1996: "19960123"
• Device information (start address: 38H)
Definition Device information of the data cartridge.
Enter the device type and the capacity.
Usable characters En-size alphanumeric characters and spaces
No. of characters 8 characters
Entry rules Devices are one capital letter, flush left.
Capacity is in Mbits indicated by three
numerals flush right. Fill in blanks with
spaces.
Example of entry For a single 16 Mbit ROM: "R∆16∆∆∆∆"
For an 8 Mbit ROM with a 4 Mbit SRAM:
"R∆∆8S∆∆4"
List of devices R: ROM
S: SRAM
D: DRAM
F: FRAM
• Corresponding peripheral (start address: 40H)
Definition Enter the area symbol for the region where
the application is to run.
Usable characters Only the capital letters specified in the list of
area symbols below.
No. of characters 10 characters
Entry rules Multiple symbols may be entered. When
multiple symbols are used, enter them flush
against each other without delimiting them
with commas or spaces. Fill in blanks with
spaces.
List of area symbols
J: Japan
T: Asian NTSC (Taiwan, Philippines, Korea)
U: North America (USA, Canada), Central
and South American NTSC (Brasil)
E: European PAL, Southeast Asian PAL,
Central and South American PAL
Example of entry For an application that will run in Japan,
Taiwan and Korea: "JT∆∆∆∆∆∆∆∆"
• Back-up RAM information (start address: 4AH)
Definition Enter device information of backup RAM
Usable characters En-size alphanumeric characters
No. of characters 6 characters
Entry rules For cartridge software, when backup RAM is
loaded into the same data cartridge. Enter
three en-size numerals (decimal) + the unit
+ a space + the access method for a total of six
characters.
• Unit symbols
Megabits" "M"
Kilobits: "K"
• Access method symbols
In byte units with odd addresses: "O"
In byte units with even addresses: "E"
In word units: "W"
When backup RAM is not used, enter spaces
for all six characters.
Example of entry Backup not used: "∆∆∆∆∆∆"
64 Kb odd addresses: "064K∆O"
256 Kb even addresses: "256K∆E"
1 Mb both addresses: "001M∆W"
• Game name (start address: 60H)
Definition Enter the name of the game.
Usable characters Alphanumeric characters only. Spaces may
be used within game names. When multiple
titles are arrayed, delimit the titles with
slashes (/), hyphens (-), or colons (:).
No. of characters 112 characters
Entry rules When names vary in different sales regions,
the different title names may be arrayed.
There are not a detailed set of rules for
multiple entry, but the titles should be
discernible from viewing this section. Fill in
blanks with spaces.
Example of entry For multiple titles:
Example 1: "TITLE1/TITLE2"
Example 2: "J:TITLE1∆∆U:TITLE2"
Note: Fill in blanks completely with spaces
(20H).
• Checksum (start address: E4H)
Definition Enter the check sum for the data cartridge.
Usable characters Binary values
No. of characters 8 characters
Entry rules 8 digits of hexadecimal (32 bit length)
Example of entry A13B04F3H
See item 4) under "Check Procedure" for information on how to
calculate these.
6 Access Methods
When booting up from a CD, initialize the hardware and then do the
following checks on the data cartridge. The application does these
checks by checking the contents of the items of the system ID stated
within the data cartridge. When an error occurs in the check, an error
message is displayed and the program halts.
Note: Perform the following checks while the program is stopped. When doing these checks, be sure to move to the
multiplayer screen.
1) Software reset (ABC + start)
2) Hardware reset
3) Tray open
Error Message:
"The data cartridge is not inserted correctly. Turn off the power and re-
insert the cartridge."
• The attachment shows a sample display layout.
Check Procedure:
The address of the data cartridge appears in the A-Bus CS0 (22000000H)
area. In the following explanation, this address is described as the offset
value.
1) Check the "SEGASATURN∆DATA∆" in data cartridge's hardware
ID (+00H).
2) Check the manufacturer ID (+10H), product number (+20H), and
corresponding peripheral (40H).
3) Set the SCU's wait.
A 150 ns ROM is used, so three clocks are needed and 13301FF0H
should be set in the A-Bus setting register (25FE00B0H).
Note: CS1 should be left at the 1FF0H set in the BOOT ROM.
Reference: See Hardware Manual, Vol. 1, SCU Users Manual, "A-
Bus Setting Register," P.13.
4) Calculating the data cartridge's checksum
The calculation method adds integers from the data cartridge
address +100H to the end in 16 bit units and uses the final 32 bits as
the checksum. The value calculated is compared to the checksum
(+E4H) in the data cartridge's system ID.
Note: +000H to +0FFH falls within the system ID area, so it is not part
of the calculation.
5) If the above checks are all okay, check the backup RAM and move
control to the game program. There are no particular restrictions on
any access after this point. Be sure to always obey the injunction in
paragraph (2), "Restrictions on Use," of section 1, "Overview."
0 10 20 30 40
The data cartridge
10
is not inserted
correctly.
Turn off the power
20 and re-insert the
cartridge.
SEGA SATURN TECHNICAL BULLETIN #47
(PRELIMINARY)
To: Sega and Third Party Developers
From: Developer Technical Support
Date: October 1, 1996
Re: SEGASaturn Extended RAM Cartridge Manual Ver. 1.02
1 Outline
This extended RAM cartridge is used by connecting it to an A-Bus slot
in SEGASaturn's main unit. It is mounted with the 8 Mbit portion
(configuration : 4 Mbit x 2) of DRAM. It can be expanded to the
maximum of 32 Mbit.
2 Restriction on Use (Must be rigidly adhered to):
Only data can be transferred to the extended RAM cartridge. Inclusion
of program code is strictly prohibited whether it is for direct execution
or after-transfer execution.
3 Memory Map
Since 22400000h - 227FFFFFnh on SEGASATURN's memory map is
allocated to this cartridge, the usable area is divided into DRAM0 and
DRAM1 as shown below:
Table 1 . Memory Map
22400000h 8M bit 32M bit
2247FFFFh DRAM0 DRAM0
22600000h
2267FFFFh DRAM1 DRAM1
227FFFFFh
1153
4 Initialization
Write "1" to the address: 257EFFFEh (W/O) in word size.
Note: Be sure to set up with "1". If you use any other data, it would not
work well.the results are undefined.
5 AboutCartridge ID
The external cartridge's ID address 24FFFFFFh (R/O) is the same as the
" Power Memory"'s. You should consider the future expendability of ID
and make it work with a 32Mbit cartridge as well by verifying it with
both "8MBit=5Ah" and "32Mbit=5Ch."Consideration should given to
future expandability by verifying both 8Mbit (ID 5Ah) and 32Mbit (ID
5Ch).
• If only 8Mbit is verified, SEGASaturn may not work with a 32Mbit
cartridge.
Table 2 . Cartridge ID
Address=24FFFFFFh (R/O)
Cartridge Capacity Extended RAM Cartridge ID
8Mbit 5Ah
32Mbit 5Ch (Reserved)
6 Corresponding Peripheral-Character Code
DescribeInclude "W" in SYSTEM ID's "Corresponding peripheral (start
address: 50Hh )."
Example: When SEGASATURN Standard Pat+data cartridges are used.
"JW∆∆∆∆∆∆∆∆∆∆∆∆∆∆^^^^^^^^^^^^^^" ("∆ ^" represents a space (0x20H20h))
• Reference: Binder "Programmer's Guide Vol. 1Vol.1" Disk Format Standard
Specifications/4. Boot System/p23 CD-ROM /sega/c/c03/non/p028.htm
7 Usable Mode
Read-out from Extended RAM Cartridge
• From normal access, you can use BYTEREAD, WORDREAD,
LONGWORD ACCESS, and BURSTREAD. If BYTE, WORD, or
LONGWORD is used, CPU will do 32-bit READ.
• As for DMA, you can use either SH2 DMA or SCU DMA.
Write to Extended RAM Cartridge
• In normal access, you can use BYTEWRITE, WORDWRITE, and
LONGWORD
WRITE but not BURSTWRITE.
• As for DMA, you can use SH2 DMA but not SCU DMA.
2153
Access Speed
It will take approximately four times the amount of time required for
WORKRAM.
8 A-Bus Set Register, A-Bus Refresh Register
Regarding A-Bus set register, setting of both CS0 space and CS1 space is
the same. A precharge insert bit is "1" and the internal weight value is
set at "3" in both normal and burst cycles. As for A-Bus refresh register,
effective bit is set at "1," and internal weight number at "3". Setting of
CS2 space and reserved space is prohibited. (Setting by users is
prohibited because values set by BOOT RAM are being used here.)
Table 3. A Table of Registers Set by A-Bus
A-Bus set register address 25FE0080h 25FE0084h
Set Contents CS0 CS1 CS2 Res
space space space space
After-WRITE precharge insert bit OFF(0) OFF(0)
After-READ precharge insert bit O N(1) OFF(0)
Externally weighted effective bit OFF(0) O N(1)
Burst cycle weighted effective bit 0011 1111 Setting Prohibited
Normal cycle weighted number set bit 0011 1111
Burst length set bit 00 0
Burst size set bit 0 (16bit) 0 (16bit)
Register’s Set Value
Specifically, please set the following values:
• A-Bus set register (25FE0080h) = 2330 1FF0h (only CS0, CS1 spaces
are set)
• A-Bus refresh register (25FE0033h) = 0000 0013h
Reference: Binder [" Hardware Manual Vol. 1]) SCU Users Manual/A-
Bus set register/per'[illegible]123 CD-
ROM/SEGA/a/a04/non/p0[illegible] 13.htm.
9 Access Procedure
Please follow the following steps from the initialization of the
extended RAM cartridge to memory access:
1. Verify the cartridge ID. (in the case of 8Mbit, this is "5Ah") - also
remember to do the same for a 32Mbit(ID=5Ch) cartridge as well. If
verification is done only with 8Mbit (ID=5An), in future, when the
32Mbit extended RAM cartridge becomes available on the market,
you will find that it will not work with this application. Refer to the
previous cartridge ID section.
3153
2. If the cartridge ID cannot be verified, please display a message
prompting its connection.
4153
Example Cartridge ID Error Message
"The extended RAM cartridge is not inserted correctly. Turn off power
and reinsert the extended RAM
cartridge."
0 10 20 30 40
0 i
The extended RAM
cartridge is not
10
inserted properly.
Please turn off
20
power and reinsert
the extended RAM
cartridge.
---For the layout of the error message, see the attached material.
[Should the error example follow this section, rather than fall on the
last page??]
3. Write "1" in word size on the initialization address 257EFFFEh
(W/O).
• - Be sure to set "1" in word size. (this must be rigidly adhered
to)
4. Set the A-Bus set register and A-Bus refresh register. See above.
(Register's set value)
5. Once theNow that the connection is complete, access to the external
RAM cartridge is possible.
• - Check above (regarding a mode which can be used) before
proceeding before
proceeding with READ/WRITE of data.
10 Others
5153
Switching of System Clock
When you changed a system clock using the SYS_CHGSYSCK()
function, "the contents in the "extended RAM cartridge" cannot
guaranteed. In such a case, initialize the cartridge and retransfer the
data.
6153
When Using Programming BOXBox
, Bear in Mind the Following: When SIMM is packaged with the
programming box, its address is duplicated in the "expanded RAM
cartridge. Thecartridge." Detach SIMM using the following method: A
Method of detaching SIMM: Write 0 in address 257FFFCh in
LONGWORD.The SIMM may be disabled with a LONGWORD write
“0” to address 257FFFCh.
* Attention : Use this program with a debugger, and do not incorporate
it into the commercial version.
* Supplement : When PROGRAMMING BOX'SProgramming Box
dipsw2DIP switch 2 "SIMMCART" is turned off, the system is unable
to read ID.
7153
8153
SEGA SATURN TECHNICAL BULLETIN # 4 8
(PRELIMINARY)
To: Sega and Third Party Developers
From: Developer Technical Support
Date: October 2, 1996
Re: SEGASaturn Development Tool Segments
1 Categories of SEGASATURN Development Tool
At present the SEGASaturn development tools and their names are
classified as follows. Tools to be released in the future will be
introduced to you according to the following classifications:
Free Rental Tools
These consist of SEGA-owned tools whose use by developers are
approved based upon the rental agreement signed. SEGA
manufacturing tool, GNU tool, manuals, etc. They are distributed free
of charge on a loan basis. For these tools, technical support by SEGA is
mandatory.
• SGL Tool Kit
• Graphic&Sound Tools
• SBL Rel. 16.0
• SSSDK
• Hitachi SH Tool
SEGA License Tools
These consist of the type of tools for which SEGA obtains licensing
from outside vendors for distribution to its licensees. SEGA essentially
has an exclusive distribution right when a licensed tool is used in
Saturn game development. Technical support by SEGA is mandatory.
SEGA-licensed tools consist of the following two types:
1. A type which puts in force both royalties and the legal obligation to
make an express mention of the licensing agreement in existence.
• TrueMotion
• Cinepak
• Qsound
• Ysound
1
2. A type which puts in force only the legal obligation to make an
express mention of the licensing agreement in existence.
• Cyber Sound
Official Tools
A type of tool which SEGA literally recognizes as its official tools. SEGA
serves as a worldwide source for technical support of these tools. It
provides user support by closely working with dealers and vendors.
These tools are strongly recommended at SEGA-sponsored meetings
designed to explain SEGA technologies.
• SNASM
• CartDev
• PRG-BOX
• VCD-System
• CDE-100
• Mirage
• SOFTIMAGE
Equivalent Tools
A type of tool which, according to Sega’s judgment, would not present
any problems as a development tool from the standpoint of both
technology and support service. In connection with the use of library or
data format offered by SEGA, SEGA's consent is required for the sale of
those items to licensees. The responsibility for technical support for
equivalent tools lies with dealers and vendors. SEGA's support does
not go beyond the library and data format which it offers.
• N-World SATURN Express (Nichimen Graphics Co.)
• Power Animator SATURN Export (Alias/wavefront Co.)
• Blade Render SS Converter (Polygon Research Co.)
• Audio Stack (CRC Research Institute)
• GAMUT-SG 3D-STUDIO (Animetix)
Other
FontWorks... Character fonts which make it possible to use in
SATURN title through purchase. Terms for licensing is rigidly defined
in an agreement signed between a SEGA licensee and FontWorks.
2
SEGA SATURN TECHNICAL BULLETIN # 5 1
(PRELIMINARY)
To: Sega and Third Party Developers
From: Developer Technical Support
Date: January 22, 1997
Re: Restrictions for the MC68EC000 Sound CPU and the SCSP
Restriction 1.
Instructions that cannot be used with the MC68EC000 Sound CPU
The following instructions codes cannot be used in programs for the
68000 Sound CPU installed in the Sega Saturn:
RESET instruction
TAS instruction
Details
¥ The above instructions are not supported in the Sega Saturn.
Consequently, an incompatibility error may occur if the instructions
are used. If the Sound CPU and the SCSP must be reset, always have
the SMPC issue the reset command from the main system.
¥ Reference
Hardware Manual Volume 1, SMPC User's Manual, Chapter 2,
"SMPC Commands"
2.3 System Management Commands for Resetting
¥ SNDON (sound ON)
¥ SNDOFF (sound OFF)
¥ Supplement
Incompatibility errors do not occur if the application uses the sound
driver provided by Sega. However, this restriction must be strictly
observed for applications that use other sound drivers for the 68000.
1
Restriction 2.
Prohibition of extended stop time for the MC68EC000 Sound CPU
Stopping the Sound CPU for a longer period than necessary is
prohibited.
Details
¥ Conditions under which the Sound CPU can be stopped:
The Sound CPU can be stopped only while a program (such as the
sound driver) for the Sound CPU is being loaded to the sound
RAM. Stopping the Sound CPU is prohibited at all other times.
¥ Stopping procedure:
To stop the Sound CPU, use the Sound OFF command, which is
one of the SMPC commands. To start the Sound CPU, issue the
Sound ON command, which is also one of the SMPC commands.
<Note>
Using any other method to stop or start the Sound CPU is strictly
prohibited.
¥ Supplement 1
When loading the sound driver, start the Sound CPU immediately
after loading is completed. Sound driver startup must not be
delayed due to other processes.
The same applies on Sound CPU is restarted.
¥ Supplement 2
Do not stop the Sound CPU even if the main system (SH2) is using
the sound driver or if the Sound CPU has nothing to process.
In these cases, have the Sound CPU execute a program that loops
endlessly. (For detailed instructions, refer to the SMPSYS.C sample
program in IP.BIN.)
¥ Supplement 3
The following functions are found in the SEGA_SND.LIB,
SEGA_SND.A, and LIBSGL.A libraries presented by Sega:
SND_Init()
SlInitSound()
Users who use these functions to initialize and start the Sound CPU
and the SCSP can disregard this restriction because the initialization
2
and startup processes are executed in the library function. However,
users who use other functions to initialize and start the Sound CPU
and the SCSP must strictly observe this restriction.
¥ Modifications in the related manual
Target: Hardware Manual Volume 1, SMPC User's Manual,
Chapter 2, "SMPC Commands"
Remarks column for No. 4 SNDON (Sound ON)
Old description: None
New description: Issue this command immediately (within 0.5
seconds) after loading of Sound CPU execution program is
completed. If the Sound CPU is stopped and access to the sound
RAM from the main system is delayed, the operation of the sound
RAM and the SCSP is not guaranteed. Use a library function to issue
this command.
Remarks column for No. 5 SNDOFF (Sound OFF)
Old description: This command saves the contents of the sound
memory (4 megabytes DRAM) even when the Sound CPU is set to
OFF.
New description: Do not use this command except to load the
execution program for the Sound CPU. If the Sound CPU is stopped
and access to the sound RAM from the main system is delayed, the
operation of the sound RAM and the SCSP is not guaranteed. Use a
library function to issue this command.
3
TM
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Program Library
User's Guide 3
SE
Doc. # ST-135-R4-092295
© 1995-96 SEGA. All Rights Reserved.
Table of Contents
Sound Interface Library
...................................................................................... 6
1.0 Guide .................................................................................................................................................6
1.1 Objective .................................................................................................................................. 6
1.2 Overview .................................................................................................................................. 6
1.3 Sound System Startup .............................................................................................................6
1.4 Performance Setup .................................................................................................................. 7
1.5 Sound Control .......................................................................................................................... 7
1.6 Status Acquisition .................................................................................................................... 8
2.0 Reference ..........................................................................................................................................9
2.1 Data List ................................................................................................................................... 9
2.2 Data Specifications ................................................................................................................ 10
2.3 List of Functions ..................................................................................................................... 20
2.4 Function Specifications .......................................................................................................... 21
DMA Library...................................................................................................... 32
1.0 Guide ...............................................................................................................................................32
1.1 Objective ................................................................................................................................ 32
1.3 Precautions ............................................................................................................................ 32
1.4 Calling Sequence ................................................................................................................... 33
2.0 Reference ........................................................................................................................................34
2.1 Data List ................................................................................................................................. 34
2.2 Data Specifications ................................................................................................................ 35
2.3 List of Functions ..................................................................................................................... 41
2.4 Function Specifications .......................................................................................................... 42
Cache Library.................................................................................................... 50
1.0 Guide ...............................................................................................................................................50
1.1 Objective ................................................................................................................................ 50
1.2 Overview ................................................................................................................................ 50
2.0 Reference ........................................................................................................................................51
2.1 List of Functions ..................................................................................................................... 51
2.2 Function Specifications .......................................................................................................... 51
2.3 List of Function Format Macros ............................................................................................. 52
2.4 Function Format Macro Specification .................................................................................... 52
Interrupt Management Library
............................................................................ 55
1.0 Guide ...............................................................................................................................................55
1.1 Objective ................................................................................................................................ 55
1.2 Overview ................................................................................................................................ 55
1.3 Overview of Functions ........................................................................................................... 55
1.4 Usage Conditions .................................................................................................................. 55
1.5 Calling Sequence ................................................................................................................... 56
2.0 Reference ........................................................................................................................................57
2.1 Data List ................................................................................................................................. 57
2.2 Data Specifications ................................................................................................................ 58
2.3 List of Functions ..................................................................................................................... 61
2.4 Function Specifications .......................................................................................................... 62
4
Memory Management Library
............................................................................. 66
1.0 Guide ...............................................................................................................................................66
1.1 Objective ................................................................................................................................66
1.2 Overview ................................................................................................................................66
1.3 Calling Sequence ...................................................................................................................66
2.0 Reference ........................................................................................................................................67
2.1 List of Functions .....................................................................................................................67
2.2 Function Specifications ..........................................................................................................67
Timer Library..................................................................................................... 69
1.0 Guide ...............................................................................................................................................69
1.1 Objective ................................................................................................................................69
1.2 Overview ................................................................................................................................69
1.3 Detailed Information ...............................................................................................................70
2.0 Reference ........................................................................................................................................72
2.1 List of Function Format Macros .............................................................................................72
2.2 Function Specifications ..........................................................................................................73
Debug Support Library
...................................................................................... 81
1.0 Guide ...............................................................................................................................................81
1.1 Objective ................................................................................................................................81
1.2 Description .............................................................................................................................81
1.3 Coding Example .................................................................................................................... 81
2.0 Reference ........................................................................................................................................82
2.1 List of Functions .....................................................................................................................82
2.2 Function Specifications ..........................................................................................................82
Compression Decompression Library
................................................................ 86
Terminology ................................................................................................................................................86
1.0 Guide ...............................................................................................................................................87
1.1 Application .............................................................................................................................87
1.2 Compression Method .............................................................................................................87
1.3 Decompression Library ..........................................................................................................92
2.0 Reference ........................................................................................................................................96
2.1 Data Specifications ................................................................................................................ 96
2.2 List of Functions .....................................................................................................................97
2.3 Function Specifications ..........................................................................................................98
PCM-ADPCM Playback Library
......................................................................... 102
1.0 Overview ........................................................................................................................................102
1.1 Objective ..............................................................................................................................102
1.2 Features ...............................................................................................................................102
1.3 System Image ......................................................................................................................103
2.0 Specifications ................................................................................................................................ 104
3.0 Playback Sequence ....................................................................................................................... 107
4.0 Programming Precautions .............................................................................................................109
5.0 Data Specifications ........................................................................................................................ 111
5.1 List of Data ........................................................................................................................... 111
5.2 Data Details ......................................................................................................................... 112
6.0 Functions Specifications ................................................................................................................ 118
6.1 List of Functions ................................................................................................................... 118
6.2 Function Details ...................................................................................................................120
INDEX ............................................................................................................. 131
Program Library User's Guide 3 5
Sound Interface Library
1.0 Guide
1.1 Objective
The Sound Interface Library interfaces the sound sub-system and the main hardware
system (including the CD system), and enables control over sound playback and related
processes.
1.2 Overview
The sound sub-system controls the playback of song sequences, PCM audio and CD
audio. The sound system must be activated before the sound playback can be con-
trolled. Sound data must then be transferred to the sound memory as a performance
setup for song sequences and PCM audio. The resulting sound control is monitored by
status information provided by the library. This chapter explains the details of the
Sound Interface Library in the order shown in the following list. For more information,
see also the sound driver system interface in the Sound Development Manual (ST-081-R5-
062894).
• Sound system startup
• Performance setup
• Sound control
• Status acquisition
1.3 Sound System Startup
The sound system must be started at power on. The calling sequence is as follows.
void sndStart ()
{
SndIniDt sys_ini; /* data area for system startup
SND_INI_PRG_ADR(sys_ini) = (Uint16 *) 0x22002400 ;
/* set 68K program area start address
SND_INI_PRG_SZ(sys_ini) = (Uint16 *) 0x4fc8 ;
/* set 68K program size
SND_INI_ARA_ADR(sys_ini) = (Uint16 *) 0x22004400 ;
/* set sound area map area start address */
SND_INI_ARA_SZ(sys_ini) = 0x0550 ;
/* set sound area map size (word specified) */
SND_Init (&sys_ini) ; /* startup sound system
. . .
}
6
1.4 Performance Setup
Sequence
Sequence data (song data, sound effect data), executed by sound control functions, must
be transferred to the sound memory. Transfers must be performed according to the
current sound area map. (For more information about the sound area map, see the
Sound Development Manual.) The calling sequence is shown in the Sound Control section
below.
PCM
Refer to the information on the sound driver system interface in the Sound Development
Manual for setting up PCM performances.
1.5 Sound Control
Functions
The sound control function writes commands to the sound memory. There are eight
command buffers. The sound control function can be used without the need to monitor
the command buffer.
• Sequence: Enables control such as playback start/end and volume settings over song sequences.
• PCM: Enables playback start and end of PCM data.
• CD: Enables control such as volume/pan settings, volume analysis, and effect changes over
CD audio data.
Calling Sequence
The following calling sequence is used until the start of a song sequence.
void sndCnt()
{
sndStart; /* sound system startup (see item above) */
SND_ChgMap (2) ; /* change sound area map */
SND_MoveData((Uint16 *)0x22005000, 0xffff, SND_KD_SEQ, 2);
/* sound data transfer (sequence) */
SND_MoveData((Uint16 *)0x22005500, 0xffff, SND_KD_TONE, 2);
/* transfer sound data (tone) */
SND_SetT1V1(15) ; /* Set master volume */
SND_StartSeq(0, 2, 5, 0) ; /* start sequence */
. . .
}
Program Library User's Guide 3 7
1.6 Status Acquisition
Functions
The following provides an overview of functions by sound data type:
• Sequence: Enables acquisition of current status (play, pause, etc.).
• PCM: Enables acquisition of current PCM data address being used.
• CD: Enables acquisition of volume analysis results.
Calling Sequence
The following calling sequence starts another sequence under sound control number 0 if
a sound control number 0 sequence has stopped.
void sndHantei()
{
SndSeqStat status; /* define sequence status area
. . .
SND_GetSeqStat (&status, 0);
if(SND_SEQ_STAT_MODE(status) == SND_MD_STOP){
/* is sequence under sound control number 0 stopped? */
SND_StartSeq (0, 2, 6, 0) ; /* start sequence
}
}
8
2.0 Reference
2.1 Data List
Data Type Data Name Number
Common System startup data type SndIniDt 1
Sound area map number data type SndAreaMap 2
Total volume data type SndTlVl 3
Effect bank number data type SndEfctBnkNum 4
Tone bank number data type SndToneBnkNum 5
Mixer number data type SndMixBnkNum 6
Effect out select data type SndEfctOut 7
Level data type SndLev 8
Pan data type SndPan 9
Command execution status data type SndRet 10
Hardware check parameter data type SndHardPrm 11
Hardware check status data type SndHardStat 12
Sequence Sound control number data type SndSeqNum 13
Sequence bank number data type SndSeqBnkNum 14
Sequence song number data type SndSeqSongNum 15
Priority level data type SndSeqPri 16
Sequence volume data type SndSeqVl 17
Fade rate data type SndFade 18
Tempo data type SndTempo 19
Sequence status data type SndSeqStat 20
Sound control no. play position data type SndSeqPlayPos 21
PCM PCM start parameter data type SndPcmStPrm 22
PCM change parameter data type SndPcmChgPrm 23
PCM play address data type SndPcmPlayAdr 24
PCM address update interrupt status data SndPcmIntStat 25
type
CD Volume analysis data type SndCdVlAnl 26
Discrete frequency band stereo volume SndCdHzSrVl 27
analysis data type
Program Library User's Guide 3 9
2.2 Data Specifications
• Common
Title Data Data Name No.
Data Specifications System start data type SndIniDt 1
This data type indicates the transfer source of data required by the sound system.
The transfer destination is the sound memory (fixed). Set each of the following:
• Address
Refer to the link map file and set the address.
• Size
Set the size of the 68K program object file and the sound area map object file.
Access Macro
SndIniDt sys_ini
Access Macro Type Description
SND_INI_PRG_ADR (sys_ini) Uint16* 68K program start address
SND_INI_PRG_SZ (sys_ini) Uint16 68K program start size
SND_INI_ARA_ADR (sys_ini) Uint16* Sound area map start address
SND_INI_ARA_SZ (sys_ini) Uint16 Sound area map size (word specified)
Title Data Data Name No.
Data Specifications Sound area map data type SndAreaMap 2
This data type displays the sound area map.
Description of V
alues
Value Description
0 ~ 255 Arbitrary
10
Title Data Data Name No.
Data Specifications Total volume data type SndTlVl 3
This data type denotes the total volume.
Description of Values
Value Description
0 ~15 0 is OFF, 15 is the maximum
Title Data Data Name No.
Data Specifications Effect bank number data type SndEfctBnkNum 4
This data type indicates the effect bank number.
Description of Values
Value Description
0 ~15 Arbitrary
Title Data Data Name No.
Data Specifications Sound tone bank number data type SndToneBnkNum 5
This data type denotes the tone bank number.
Description of Values
Value Description
0 ~15 Arbitrary
Title Data Data Name No.
Data Specifications Mixer number data type SndMixBnkNum 6
This data type shows the mixer number.
Description of Values
Value Description
0 ~127 Arbitrary
Program Library User's Guide 3 11
Title Data Data Name No.
Data Specifications Effect out select data type SndEfctOut 7
This data type denotes the effect out selection setting.
Description of Values
Value Description
0 ~15 Arbitrary
Title Data Data Name No.
Data Specifications Level data type SndLev 8
This data type denotes the level.
Description of Values
Value Description
0~7 Arbitrary
Title Data Data Name No.
Data Specifications Pan data type SndPan 9
This data type shows pan. To pan the sound from left to right, increment up from - 15.
Description of Values
↑, ↓ : Adjust the volume in the direction of the arrow.
Value Description
Left Right
- 15 Maximum OFF
-14 to -1 Maximum ↓
0 Maximum Maximum
0 to 14 ↑ Maximum
15 OFF Maximum
12
Title Data Data Name No.
Data Specifications Command execution status data type SndRet 10
This data type indicates the command execution condition.
Constant Description
SND_RET_SET Command normal end (command was set)
SND_RET_NSET Command abnormal end (command was not set)
Title Data Data Name No.
Data Specifications Hardware check parameter data type SndHardPrm 11
This data type denotes the hardware check parameters.
Constant Description
SND_DRAM4 DRAM 4 Mbit read/write
SND_DRAM8 DRAM 8 Mbit read/write
SND_SCSP_MIDI SCSP MIDI
SND_SOUND_SRC_LR Sound generator output (L/R)
SND_SOUND_SRC_L Sound generator output (L)
SND_SOUND_SRC_R Sound generator output (R)
Title Data Data Name No.
Data Specifications Hardware check status data type SndHardStat 12
This data type denotes the hardware check status.
Constant Description
SND_HARD_OK Normal
SND_HARD_ERR Abnormal
Program Library User's Guide 3 13
• Sequence
Title Data Data Name No.
Data Specifications Sound control number data type SndSeqNum 13
This data type indicates the sound control number.
Description of Values
Value Description
0 ~7 Arbitrary
Title Data Data Name No.
Data Specifications Sequence bank number data type SndSeqBnkNum 14
This data type denotes the sequence bank number.
Description of Values
Value Description
0 ~15 Arbitrary
Title Data Data Name No.
Data Specifications Sequence song number data type SndSeqSongNum 15
This data type denotes the sequence song number.
Description of Values
Value Description
0 ~255 Arbitrary
Title Data Data Name No.
Data Specifications Priority level data type SndSeqPri 16
This data type denotes the priority level.
Description of Values
Value Description
0 ~7 0 is the highest priority level and 7 is the minimum
14
Title Data Data Name No.
Data Specifications Sequence volume data type SndSeqVI 17
This data type denotes the sequence volume.
Description of Values
Value Description
0 ~127 0 is off, 127 is the maximum (source sound level)
Title Data Data Name No.
Data Specifications Fade rate data type SndFade 18
This data type denotes the fade rate.
Description of Values
Value Description
0 Fade rate is disabled
1 ~255 Longest at 1, shortest at 255
Title Data Data Name No.
Data Specifications Tempo data type SndTempo 19
This data type denotes the tempo.
Description of Values
Value Description
Relative value in terms of the present value
+32767 ~ -32768 + is Up and - is Down
Up 2X at +4096, Down 2X at -4096
Program Library User's Guide 3 15
Title Data Data Name No.
Data Specifications Sequence status data type SndSeqStat 20
This data type indicates the sequence status.
SndSeqStat Status
Access Macro Type Description
SND_SEQ_STAT_MODE(status) Uint16 Song mode
SND_SEQ_STAT_STAT(status) Uint16 Song status
SND_SEQ_STAT_MODE(status)
Constant Description
SND_MD_STOP Stop
SND_MD_PLAY Play
SND_MD_FADE Fade
SND_MD_PLAY_PS Play pause
SND_MD_FADE_PS Fade pause
SND_SEQ_STAT_STAT(status)
Value (Hexadecimal) Description
00 Normal
01 ~ 7F Error code
80 ~ FF Timing flag
Title Data Data Name No.
Data Specifications Sound control number play position data SndSeqPlayPos 21
type
This data type denotes the sound control number play position.
Description of Values
Value (Hexadecimal) Description
0 ~FFFF 0 ~FFFF
16
• PCM
Title Data Data Name No.
Data Specifications PCM start parameter data type SndPcmStartPrm 22
This data type denotes the PCM start parameters.
SndPcmStPrm prm
Access Macro Type Description
SND_PRM_MODE(prm) Uint8 Stereo and mono + sampling rate
SND_PRM_SADR(prm) Uint16 PCM stream buffer start address
SND_PRM_SIZE(prm) Uint16 PCM stream buffer size
SND_PRM_OFSET(prm) Uint8 PCM stream play start offset
SND_PRM_MODE(prm)
Specify the following constants by logical OR.
Bit Position Constant Description
Mono/stereo select bit SND_MD_MONO Mono
SND_MD_STEREO Stereo
Sampling rate selection bit SND_MD_16 16-bit PCM
SND_MD_8 8-bit PCM
SND_PRM_SADR(prm)
Value (Hexadecimal) Description
0000 ~ FFFF PCM stream buffer start address
(upper 16 bits of 20 bit data)
SND_PRM_SIZE(prm)
Value (Hexadecimal) Description
0000 ~ FFFF PCM stream buffer size
(number of samples for 1 channel)
SND_PRM_OFSET(prm)
Value (Hexadecimal) Description
0~F
(1000 [4k sample] units) PCM stream play start offset (0000 ~ F000)
Program Library User's Guide 3 17
Title Data Data Name No.
Data Specifications PCM change parameter data type SndPcmChgPrm 23
This data type denotes the PCM change parameters.
SndPcmChgPrm prm
Access Macro Type Description
SND_PRM_NUM(prm) SndPcmNum PCM stream play number
SND_PRM_LEV(prm) SndLev Direct sound level
SND_PRM_PAN(prm) SndPan Direct sound pan
SND_PRM_PICH(prm) Uint8 PICH word
SND_R_EFCT_IN(prm) SndEfctIn Effect in select Right output (mono)
SND_R_EFCT_LEV(prm) SndLev Effect send level
SND_L_EFCT_IN(prm) SndEfctIn Effect in select Left output
SND_L_EFCT_LEV(prm) SndLev Effect send level (invalid for mono)
The following constants and values can be used by each access macro.
SND_PRM_NUM(prm)
Value Description
0 ~7 PCM stream play number
SND_PRM_PICH(prm)
Refer to the PICH register section in the Saturn SCSP User’s Manual
(ST-077-R2-052594).
Title Data Data Name No.
Data Specifications PCM play address data type SndPcmPlayAdr 24
This data type denotes the PCM play address.
SndPcmPlayAdr(prm)
Access Macro Type Description
SND_PCM_RADR(prm) Uint8 Right output (mono)
SND_PCM_LADR(prm) Uint8 Left output
18
Title Data Data Name No.
Data Specifications PCM address update interrupt status SndPcmIntStat 25
data type
This data type indicates the PCM address update interrupt status. The following
bit position constants can be specified by OR.
Bit Position Constant Description
SND_PCM_PLAY0 PCM playback number 0
SND_PCM_PLAY1 PCM playback number 1
SND_PCM_PLAY2 PCM playback number 2
SND_PCM_PLAY3 PCM playback number 3
SND_PCM_PLAY4 PCM playback number 4
SND_PCM_PLAY5 PCM playback number 5
SND_PCM_PLAY6 PCM playback number 6
SND_PCM_PLAY7 PCM playback number 7
• CD
Title Data Data Name No.
Data Specifications Volume analysis volume data type SndCdVlAnl 26
This data type denotes the analysis volume.
Description of Values
Value Description
0 ~32767 0 is OFF, 32767 is maximum
Title Data Data Name No.
Data Specifications Discrete frequency band stereo volume SndCdHzSrVl 27
analysis data type
This data type denotes the discrete frequency band stereo volume analysis data.
In the case of monaural, the same values are entered in left and right outputs.
SndCdHzSrVl hz_vl
Access Macro Type Description
SND_CD_LHIGH (hz_vl) SndCdVlAnl Treble analysis volume
SND_CD_LMID (hz_vl) SndCdVlAnl Midrange analysis volume Left output
SND_CD_LLOW (hz_vl) SndCdVlAnl Bass analysis volume
SND_CD_RHIGH (hz_vl) SndCdVlAnl Treble analysis volume
SND_CD_RMID (hz_vl) SndCdVlAnl Midrange analysis volume Right output
SND_CD_RLOW (hz_vl) SndCdVlAnl Bass analysis volume
Program Library User's Guide 3 19
2.3 List of Functions
Function Name No.
Start sound system Start sound system SND_Init 1
Interrupt Set interrupt enable SND_SET_ENA_INT 2
Get interrupt enable SND_GET_ENA_INT 3
Set interrupt source SND_SET_FCT_INT 4
Reset interrupt SND_RESET_INT 5
Performance setup Transfer sound data SND_MoveData 6
Sound control Common Change sound area map SND_ChgMap 7
Set total volume SND_SetTlVl 8
Change effect SND_ChgEfct 9
Change mixer SND_ChgMix 10
Change mixer parameters SND_ChgMixPrm 11
Check hardware SND_ChkHard 12
Sequence Start sequence SND_StartSeq 13
Stop sequence SND_StopSeq 14
Pause sequence SND_PauseSeq 15
Continue sequence SND_ContSeq 16
Set sequence volume SND_SetSeqVl 17
Change tempo SND_ChgTempo 18
Direct MIDI control SND_CtrlDirMidi 19
PCM Start PCM SND_StartPcm 20
Stop PCM SND_StopPcm 21
PCM change SND_ChgPcm 22
CD Start volume analysis SND_StartVlAnl 23
Stop volume analysis SND_StopVlAnl 24
Set CD-DA level SND_SetCdDaLev 25
Set CD-DA pan SND_SetCdDaPan 26
Status Acquisition Sequence Get sequence status SND_GetSeqStat 27
Get sound control number play SND_GetSeqPlayPos 28
position
PCM Get PCM execute address SND_GetPcmPlayAdr 29
Get PCM address update SND_GET_INT_STAT 30
interrupt status
CD Get total stereo volume analysis SND_GetAnlTlVl 31
Get discrete frequency band SND_GetAnlHzVl 32
stereo volume analysis
20
2.4 Function Specifications
• Start Sound System
Title Function Function Name No.
Function Specifications Start sound system SND_Init 1
Format: void SND_Init(SndIniDt *sys_ini)
Input: sys_ini : Data for system startup
Output: None
Function Value: None
Function The sound system is started up based on the specified system startup data. Startup
occurs after the program and sound area map data are transferred and the hardware
registers are initialized. For more details, see the Sound Driver System Interface
section of the Sound Development Manual.
Remarks: SCU DMA transfer is used for these transfers.
• Interrupt
Title Function Function Name No.
Function Specifications Set interrupt enable SND_SET_ENA_INT 2
Format: void SND_SET_ENA_INT(Uint8 data)
Input: data: Interrupt enable bit (1= enabled, 0= disabled)
Constant
Bit Position Constant Description
SND_INT_PCM_ADR PCM address interrupt
Output: None
Function Value: None
Function: Enables interrupts. This setting enables or disables the interrupt signal from the
sound system. This setting does not mask SCU interrupts.
Program Library User's Guide 3 21
Title Function Function Name No.
Function Specifications Get interrupt enable SND_GET_ENA_INT 3
Format: Uint8 SND_GET_ENA_INT(void)
Input: None
Output: Interrupt enable bit (1= enabled, 0= disabled)
Constant
Bit Position Constant Description
SND_INT_PCM_ADR PCM address interrupt
Function Value: None
Function: Gets interrupt enable.
Title Function Function Name No.
Function Specifications Set interrupt source SND_SET_FCT_INT 4
Format: Uint8 SND_SET_FCT_INT(void)
Input: None
Output: Interrupt enable bit
Constant
Bit Position Constant Description
SND_FCT_PCM_ADR PCM address update
Function Value: None
Function: Sets the interrupt source.
Title Function Function Name No.
Function Specifications Reset interrupt SND_RESET_INT 5
Format: void SND_RESET_INT(void)
Input: None
Output: None
Function Value: None
Function: Resets interrupt. Execute after a sound interrupt occurs. If this function is not
executed, the interrupt remains asserted.
22
• Performance Setup
Title Function Function Name No.
Function Specifications Transfer sound data SND_MoveData 6
Format: void SND_MoveData(Uint16 *source, Uint32 size, Uint16
data_kind, Uint16 data_no)
Input: source : Sound data transfer source address
size : Transfer size (byte units)
data_kind : Data type
data_no : Data number
Constant
Bit Position Constant Description
SND_KD_TONE Tone bank data
SND_KD_SEQ Sequence data
SND_KD_DSP_PRG DSP program
SND_KD_DSP_RAM DSP work RAM
Output: None
Function Value: None
Function: Transfers sound data to the sound memory according to the map information that
corresponds to the specified data type and number.
Remarks: SCU DMA transfer is used in transferring data.
Program Library User's Guide 3 23
• Sound Control
Common
Title Function Function Name No.
Function Specifications Change sound area map SND_ChgMap 7
Format: SndRet SND_ChgMap(SndAreaMap area_no)
Input: area_no : Sound area map number
Output: None
Function Value: Command execution status
Function: Changes the current sound area map to the sound area map indicated by
the sound area map number.
Title Function Function Name No.
Function Specifications Set total volume SND_SetTlVl 8
Format: SndRet SND_SetVlTl(SndTlVl vol)
Input: vol : Total volume
Output: None
Function Value: Command execution status
Function: Changes the total volume.
Remarks: Affects only sequence and PCM.
Title Function Function Name No.
Function Specifications Change effect SND_ChgEfct 9
Format: SndRet SND_ChgEfct(SndEfctBnkNum efct_no)
Input: efct_no : Effect bank number
Output: None
Function Value: Command execution status
Function: Executes the DSP program denoted by the effect bank number.
Title Function Function Name No.
Function Specifications Change mixer SND_ChgMix 10
Format: SndRet SND_ChgMix(SndToneBnkNum tone_no, SndMixBnkNum
mix_no)
Input: tone_no : Tone bank number
mix_no : Mixer number
Output: None
Function Value: Command execution status
Function: Changes mixers.
24
Title Function Function Name No.
Function Specifications Change mixer parameters SND_ChgMixPrm 11
Format: SndRet SND_ChgMixPrm(SndEfctOut efct_out SndLev level,
SndPan pan)
Input: efct_out : Effect out select
level : Effect return level
pan : Effect PAN
Output: None
Function Value: Command execution status
Function: Changes mixer parameters.
Title Function Function Name No.
Function Specifications Check hardware SND_ChkHard 12
Format: SndRet SndChkHard(SndHardStat *stat, SndHardChk prm)
Input: prm : Hardware check parameters
Output: stat : Hardware check status
Function Value: Command execution status
Function: Checks hardware according to hardware parameters.
Program Library User's Guide 3 25
Sequence
Title Function Function Name No.
Function Specifications Start sequence SND_StartSeq 13
Format: SndRet SND_StartSeq(SndSeqNum seq_no, SndSeqBnkNum seq_bk_no,
SndSeqSongNum song_no, SndSeqPri pri_lev)
Input: seq_no : Sound control number
seq_bk_no : Sequence bank number
song_no : Sequence song number
pri_lev : Priority level
Output: none
Function Value: Command execution status
Function: Starts the specified sequence.
Title Function Function Name No.
Function Specifications Stop sequence SND_StopSeq 14
Format: SndRet SND_StopSeq(SndSeqNum seq_no)
Input: seq_no : Sound control number
Output: None
Function Value: Command execution status
Function: Stops the specified sequence.
Title Function Function Name No.
Function Specifications Pause sequence SND_PauseSeq 15
Format: SndRet SND_PauseSeq(SndSeqNum seq_no)
Input: seq_no : Sound control number
Output: None
Function Value: Command execution status
Function: Pauses the selected sequence.
Title Function Function Name No.
Function Specifications Continue sequence SND_ContSeq 16
Format: SndRet SND_ContSeq(SndSeqNum seq_no)
Input: seq_no : Sound control number
Output: None
Function Value: None
Function: Cancels pause of the selected sequence.
26
Title Function Function Name No.
Function Specifications Set sequence volume SND_SetSeqVl 17
Format: SndRet SND_SetSeqVl(SndSeqNum seq_no, SndSeqVl seq_vl,
SndFade fade)
Input: seq_no : Sound control number
seq_lev : Fade level
fade : Fade rate
Output: None
Function Value: Command execution status
Function: Sets the sequence volume.
Title Function Function Name No.
Function Specifications Change tempo SND_ChgTempo 18
Format: SndRet SND_ChgTempo(SndSeqNum seq_no, SndTempo tempo)
Input: seq_no : Sound control number
tempo : Tempo
Output: None
Function Value: Command execution status
Function: Sets the tempo of the selected sequence.
Title Function Function Name No.
Function Specifications Direct MIDI control SND_CtrlDirMidi 19
Format: SndRet SND_CtrlDirMidi(SndSeqNum seq_no, SndSeqPri seq_pri,
Uint8 md_com, Uint8 ch, Uint8 dtl, Uint8 dt2)
Input: seq_no : Sound control number
seq_pri : MIDI command (0H~7H)
ch : MIDI channel (0H~1FH)
dt1 : MIDI data1 (00H~7FH)
dt2 : MIDI data2 (00H~7FH)
Output: None
Function Value: Command execution conditions
Function: MIDI is controlled directly according to the selected parameters.
Program Library User's Guide 3 27
PCM
Title Function Function Name No.
Function Specifications Start PCM SND_StartPcm 20
Format: SndRet SND_StartPcm(SndPcmStartPrm *sprm, SndPcmChgPrm *cprm)
Input: sprm : PCM start parameter pointer
cprm : PCM change parameter pointer
Output: None
Function Value: Command execution status
Function: Plays PCM data according to the specified parameters.
Title Function Function Name No.
Function Specifications Stop PCM SND_StopPcm 21
Format: SndRet SND_StopPcm(SndPcmNum pcm_num)
Input: pcm_num : Play stop PCM stream play number
Output: None
Function Value: Command execution status
Function: Stops play of PCM data.
Title Function Function Name No.
Function Specifications PCM Change SND_ChgPcm 22
Format: SndRet SND_ChgPcm(SndPcmChgPrm *cpcm)
Input: cpcm : PCM change parameter pointer
Output: None
Function Value: Command execution status
Function: Changes the playback status of PCM data.
28
CD
Title Function Function Name No.
Function Specifications Start Volume Analysis SND_StartVlAnl 23
Format: SndRet SND_StartVlAnl(void)
Input: None
Output: None
Function Value: Command execution status
Function: Starts analysis of the frequency band volume and total volume. Volume analysis
continues until it is stopped by the volume analysis stop function. Before analyzing
the frequency band volumes with this function, the special DSP program for this task
must be executed by effect change. The DSP program is not required when analyzing
the total volume.
Remarks: Other DSP programs cannot be executed while the frequency band volume analysis
DSP program is being executed.
Title Function Function Name No.
Function Specifications Stop Volume Analysis SND_StopVlAnl 24
Format: SndRet SND_StopVlAnl(void)
Input: None
Output: None
Function Value: Command execution status
Function: Stops volume analysis.
Title Function Function Name No.
Function Specifications Set CD-DA Level SND_SetCdDaLev 25
Format: SndRet SND_SetCdDaLev(SndLev left, SndLev right)
Input: left : Volume of left output
right : Volume of right output
Output: None
Function Value: Command execution status
Function: Changes the current stereo volume.
Title Function Function Name No.
Function Specifications Set CD-DA Pan SND_SetCdDaPan 26
Format: SndRet SND_SetCdDaPan(SndPan left, SndPan right)
Input: left : Pan of left output
right : Pan of right output
Output: None
Function Value: Command execution status
Function: Changes the current stereo pan.
Program Library User's Guide 3 29
• Status Acquisition
Sequence
Title Function Function Name No.
Function Specifications Get sequence status SND_GetSeqStat 27
Format: void SND_GetSeqStat(SndSeqStat *status, SndSeqNum seq_no)
Input: seq_no : Sound control number
Output: status : Sequence status pointer
Function Value: None
Function: Gets the sequence status of the selected sound control number.
Title Function Function Name No.
Function Specifications Get sound control number play SND_GetSeqPlayPos 28
position
Format: void SND_GetSeqPlayPos(SndSeqPlayPos *pos, SndSeqNum seq_no)
Input: seq_no : Sound control number
Output: pos : Sound control number play position
Function Value: None
Function: Gets the play position of the specified sound control number.
PCM
Title Function Function Name No.
Function Specifications Get PCM execute address SND_GetPcmPlayAdr 29
Format: void SND_GetPcmPlayAdr(SndPcmPlayAdr *adr, SndPcmNum num)
Input: num : PCM play number
Output: adr : PCM execute address
Function Value: None
Function: Gets the PCM data address being played back.
Title Function Function Name No.
Function Specifications Get PCM address update interrupt SND_GET_INT_STAT 30
status
Format: SndPcmIntStat SND_GET_INT_STAT(void)
Input: None
Output: None
Function Value: PCM address update interrupt status
Function: Gets the PCM address update interrupt status. Valid when the interrupt source is
interrupted by the PCM address update. The PCM playback number address that
was updated can be the determined with this information.
30
CD
Title Function Function Name No.
Function Specifications Get total stereo volume analysis SND_GetAnlTlVl 31
Format: void SND_GetAnlTlVl(SndChVlAnl *left, SndCdAnl *right)
Input: None
Output: left : Total volume of left output
right : Total volume of right output
Function Value: None
Function: Gets the analysis of the total stereo volume. Execute the volume analysis start
function before executing this function.
Remarks: Volume is updated at 16 msec intervals.
Title Function Function Name No.
Function Specifications Get discrete frequency band stereo SND_GetAnlHzVl 32
volume analysis
Format: void SND_GetAnlHzVl(SndCdHzSrV1 *hz_vl)
Input: none
Output: hz_vl : Frequency band stereo volume
Function Value: None
Function: Gets the stereo volume based on sound frequency bands. Execute the volume
analysis start function before executing this function.
Remarks: Volume is updated at 16 msec intervals.
Program Library User's Guide 3 31
DMA Library
1.0 Guide
1.1 Objective
Direct Memory Access (DMA) functions decrease the overhead on the Main CPU’s
processing time by enabling it to perform work other than the transfer of data. This
library provides basic DMA data transfer functions.
1.2 Overview
The DMA Library supports both the SH2 (CPU) and SCU-based DMA transfers. High-
level and low-level library functions are provided for each device.
Descriptions of the high-level and low-level functions are as follows.
• High-level functions
Provides basic functionality for byte, word, and longword transfers through easy-to-use functions.
• Low-level functions
Provides functions that enable the detailed setup of device modes, interrupts, and status communica-
tion.
The main differences between the SH2 (CPU) and SCU DMA functions are explained
next. For more detailed information, refer back to the hardware manual for each device.
• CPU
Capable of transfers between the same bus (e.g., between work RAM areas). This is not possible with
the SCU.
• SCU
Because parallel operations by the CPU can be performed during data transfers, the SCU is effective in
transfers that do not involve the CPU bus. The SCU is capable of high-speed transfers compared with
the CPU.
1.3 Precautions
• Select the suitable function after examining the source and destination access units used for the
transfer. See the appropriate hardware manual for information about access units.
• High-level DMA transfers purge the destination area after a transfer under the following condition.
Condition: When the destination area is the work RAM.
Reason: An assumption is made that the RAM area read using the cache is work RAM.
• Burst mode transfers cannot be used by the CPU.
32
1.4 Calling Sequence
The following example shows the DMA transfer calling sequence.
#define SCLA_CFRAME ((void *)0x5e60000)
#define K_NUM (424)
Uint32 scl_k_data[512];
. . .
void copyToData()
{
DMA_ScuCopyMem(SCLA_CFRAME, scl_k_data, K-NUM);
/* data transfer to VDP2 VRAM fromWork RAM */
. . .
if(DMA_ScuResult() == DMA_SCU_BUSY){ /* DMA_ScuCopyMem() completion check */
. . .
}
}
Program Library User's Guide 3 33
2.0 Reference
2.1 Data List
Data Data Name No.
Low-level SCU DMA channel None 1
Transfer parameters DmaScuPrm 2
CPU DMA channel None 3
Common transfer parameters DmaCpuComPrm 4
Transfer parameters DmaCpuPrm 5
34
2.2 Data Specifications
• Low-level SCU Transfers
Title Data Data Name No.
Data Specifications DMA Channel none 1
Use the following constants when specifying an SCU DMA channel.
Name of Constant Description
DMA_SCU_CH0 Channel 0
DMA_SCU_CH1 Channel 1
DMA_SCU_CH2 Channel 2
Title Data Data Name No.
Data Specifications Transfer parameters DmaScuPrm 2
Transfer parameters have the following structure.
struct {
Uint32 dxr; /* Read address */
Uint32 dxw; /* Write address */
Uint32 dxc; /* Number of transfer bytes */
Uint32 dxad_r; /* Read address add value */
Uint32 dxad_w; /* Write address add value */
Uint32 dxmod; /* Mode bit */
Uint32 dxrup; /* Read address update bit */
Uint32 dxwup; /* Write address update bit */
Uint32 dxft; /* Start source selection bit */
Uint32 msk; /* Mask bit */
} DmaScuPrm;
The following tables show constants that can be used by each member.
dxad_r
Name of Constant Description
DMA_SCU_R0 Don’t add
DMA_SCU_R4 Add 4 bytes
Program Library User's Guide 3 35
dxad_w /* write address add value */
Name of Constant Description
DMA_SCU_W0 Don’t add
DMA_SCU_W2 Add 2 bytes
DMA_SCU_W4 Add 4 bytes
DMA_SCU_W8 Add 8 bytes
DMA_SCU_W16 Add 16 bytes
DMA_SCU_W32 Add 32 bytes
DMA_SCU_W64 Add 64 bytes
DMA_SCU_W128 Add 128 bytes
dxmod /* mode bit */
Name of Constant Description
DMA_SCU_DIR Direct mode
DMA_SCU_IN_DIR Indirect mode
dxrup /* read address update bit */
dxwup /* write address update bit */
Name of Constant Description
DMA_SCU_KEEP Hold
DMA_SCU_REN Update
dxft /* start source select bit */
Name of Constant Description
DMA_SCU_F_VBLK_IN Receive V-blank-IN signal
DMA_SCU_F_VBLK_OUT Receive V-blank-OUT signal
DMA_SCU_F_HBLK_OUT Receive H-blank-IN signal
DMA_SCU_F_TIM0 Receive Timer 0 signal
DMA_SCU_F_TIM1 Receive Timer 1 signal
DMA_SCU_F_SND Receive Sound-Req signal
DMA_SCU_F_SPR Receive Sprite draw end signal
DMA_SCU_F_DMA Set DMA start source bit
36
mask
(This is a write mask bit for the members above. Bits specified by the following
constants are not written. Multiple specifications are possible by using logical OR)
Name of Constant Description
DMA_SCU_M_DXR Read address
DMA_SCU_M_DXW Write address
DMA_SCU_M_DXC Number of transfer bytes
DMA_SCU_M_DXAD_R Read address add value
DMA_SCU_M_DXAD_W Write address add value
DMA_SCU_M_DXMOD Mode bit
DMA_SCU_M_DXRUP Read address update bit
DMA_SCU_M_DXWUP Write address update bit
DMA_SCU_M_DXFT Start source selection bit
Program Library User's Guide 3 37
• Low-Level CPU Transfers
Title Data Data Name No.
Data Specifications DMA channel None 3
Use the following constants when specifying a CPU DMA channel.
Name of Constant Description
DMA_CPU_CH0 Channel 0
DMA_CPU_CH1 Channel 1
Title Data Data Name No.
Data Specifications Common transfer parameters DmaCpuComPrm 4
Common transfer parameters have the following structure.
struct {
Uint32 pr; /* priority mode */
Uint32 dme; /* DMA master enable */
Uint32 msk; /* mask bit */
}DmaCpuComPrm;
The following tables show constants that can be used by each of these members.
pr /* priority mode */
Name of Constant Description
DMA_CPU_FIX Priority sequence is fixed
DMA_CPU_ROR Priority sequence based on round robin
dme /* DMA master enable */
Name of Constant Description
DMA_CPU_DIS DMA transfer on all channels disabled
DMA_CPU_ENA DMA transfer on all channels disabled
msk
This is a write mask bit for the members. Bits specified by the follow-
ing constants are not written. Multiple specifications are possible by
using logical OR.
Name of Constant Description
DMA_CPU_M_PR Priority mode
DMA_CPU_M_AE Address error flag
DMA_CPU_M_NMIF NMI flag
DMA_CPU_M_DME DMA master enable
38
Title Data Data Name No.
Data Specifications Transfer parameters DmaCpuPrm 5
Transfer parameters have the following structure.
struct {
Uint32 sar; /* DMA source address */
Uint32 dar; /* DMA destination address */
Uint32 tcr; /* DMA transfer count */
Uint32 dm; /* destination address mode */
Uint32 sm; /* source address mode bit */
Uint32 ts; /* transfer size */
Uint32 ar; /* auto request mode */
Uint32 ie; /* interrupt enable */
Uint32 drcr; /* DMA request/response select control */
Uint32 msk; /* mask bit */
} DmaCpuPrm;
The following tables show constants that can be used by each member.
dm /* destination address mode */
sm /* source address mode bit */
Name of Constant Description
DMA_CPU_AM_NOM Fixed
DMA_CPU_AM_ADD Add
DMA_CPU_AM_SUB Subtract
ts /* transfer size */
Name of Constant Description
DMA_CPU_1 Byte unit
DMA_CPU_2 Word (2 byte) unit
DMA_CPU_4 Long word (4 byte) unit
DMA_CPU_16 16 byte unit
ar /* auto request mode */
Name of Constant Description
DMA_CPU_MOD Module request
DMA_CPU_AUTO Auto request
ie /* interrupt enable */
Name of Constant Description
DMA_CPU_INT_ENA Enable interrupt request
DMA_CPU_INT_DIS Disable interrupt request
Program Library User's Guide 3 39
drcr /* DMA request/response select control */
Name of Constant Description
DMA_CPU_DREQ DREQ (external request)
DMA_CPU_RXI RXI (built-in SCI receive data full interrupt
transfer request)
DMA_CPU_TXI TXI (built-in SCI send data empty interrupt
transfer request)
msk */
Name of Constant Description
DMA_CPU_M_SAR DMA source address
DMA_CPU_M_DAR DMA destination address
DMA_CPU_M_TCR DMA transfer count
DMA_CPU_M_DM Destination address mode
DMA_CPU_M_SM Source address mode bit
DMA_CPU_M_TS Transfer size
DMA_CPU_M_AR Auto request mode
DMA_CPU_M_IE Interrupt enable
DMA_CPU_M_DRCR DMA request/response select control
DMA_CPU_M_TE Transfer end flag
This is a member write mask bit. Bits specified by the following con-
stants are not written. Multiple settings are possible by using logical
OR.
40
2.3 List of Functions
Function Function Name No.
High-level SCU DMA data transfer DMA_ScuMemCopy 1
DMA data transfer result check DMA_ScuResult 2
CPU DMA byte data transfer DMA_CpuMemCopy1 3
DMA word data transfer DMA_CpuMemCopy2 4
DMA long word data transfer DMA_CpuMemCopy4 5
DMA 16-byte data transfer DMA_CpuMemCopy16 6
DMA data transfer end check DMA_CpuResult 7
Low-level SCU Set DMA transfer parameters DMA_ScuSetPrm 8
Start DMA transfer DMA_ScuStart 9
Stop DMA transfer DMA_ScuStop 10
Stop DMA transfer on all channels DMA_ScuAllStop 11
CPU Set common DMA transfer DMA_CpuSetComPrm 12
parameters
Set DMA transfer parameters DMA_CpuSetPrm 13
Start DMA transfer DMA_CpuStart 14
Stop DMA transfer DMA_CpuStop 15
Stop DMA transfer on all channels DMA_CpuAllStop 16
Get common DMA status DMA_CpuGetComStatus 17
Get DMA status DMA_CpuGetStatus 18
Program Library User's Guide 3 41
2.4 Function Specifications
• High-level SCU Transfers
Title Function Function Name No.
Function Specifications DMA data transfer DMA_ScuMemCopy 1
Format: void DMA_ScuMemCopy(void *dst, void *src, Uint32 cnt)
Input: *dst : Destination address
*src : Source address
cnt : Transfer byte count
Output: None
Function Value: None
Function: DMA transfer is done by the direct mode of the SCU DMA mode 0. For more infor-
mation, see the SCU User’s Manual (ST-097-R5-072694). Operation of this transfer
differs depending on whether the destination address is in work RAM or not. The
differences are explained below.
• Work RAM
The destination area is purged after transfer in order to eliminate conflict with
the cache. In addition, because the CPU bus is used, control does not return to
the CPU until DMA execution ends.
• Areas other than the Work RAM
After transfer begins, control returns to the CPU immediately because the CPU
bus is not used. In this case, a check of the transfer result is done by
DMA_ScuResult().
Although transfer units are basically long word units, but the source and destina-
tion addresses can be specified in byte units. However, when the device requests
data in word boundary units, make sure to do so. For more information, see the
SCU User’s Manual.
42
Title Function Function Name No.
Function Specifications DMA data transfer result check Dma_ScuResult 2
Format: Uint 32 DMA_ScuResult(void)
Input: None
Output: None
Function Value: Result of DMA_ScuMemCopy()
Function: Checks the results of DMA_ScuMemCopy(). The following table lists the return
values.
Execution Result Constant Names
Name of Constant Description
DMA_SCU_END Normal end
DMA_SCU_FAIL Abnormal end
DMA_SCU_BUSY Busy
Remarks: When the CPU_Bus is specified as the transfer source or destination with
DMA_ScuMemCopy(), the CPU cannot run while the DMA is executing.
Accordingly, the execution results in that case cannot be “busy" (DMA_SCU_BUSY).
Program Library User's Guide 3 43
• High-level CPU Transfers
Title Function Function Name No.
Function Specifications DMA byte data transfer DMA_CpuMemCopy1 3
Format: void DMA_CpuMemCopy1(void *dst, void *src, Uint32 cnt)
Input: *dst : Destination address
*src : Source address
cnt : Transfer count (0 - 16777215)
0x00000001 1 time
0x00ffffff 16777215 times
0x00000000 16777216 times
Output: None
Function Value: None
Function: Transfers byte data cnt times from the src address to the dst address. The transfer
amount is cnt bytes. Data is transferred without the use of channel 0, cycle steal
mode, and completion interrupt. When the destination address is the work RAM,
the destination area is purged after transfer in order to eliminate conflicts with the
cache. There are no restrictions on addressing.
Title Function Function Name No.
Function Specifications DMA word data transfer DMA_CpuMemCopy2 4
Format: void DMA_CpuMemCopy2(void *dst, void *src, Uint32 cnt)
Input: *dst : Destination address
*src : Source address
cnt : Transfer count (0 - 16777215)
0x000000001 1 time
0x00ffffff 16777215 times
0x00000000 16777216 times
Output: None
Function Value: None
Function: Transfers byte data cnt times from the src address to the dst address. The transfer
amount is cnt*2 bytes. Data is transferred without the use of channel 0, cycle steal
mode, and completion interrupt. When the destination address is the work RAM,
the destination area is purged after transfer in order to eliminate conflicts with the
cache. The addressing must be word boundary-based.
44
Title Function Function Name No.
Function Specifications DMA long word Data Transfer DMA_CpuMemCopy4 5
Format: void DMA_CpuMemCopy4(void *dst, void *src, Uint32 cnt)
Input: *dst : Destination address
*src : Source address
cnt : Transfer count (0 - 16777215)
0x00000001 1 time
0x00ffffff 16777215 times
0x00000000 16777216 times
Output: None
Function Value: None
Function: Transfers long word data cnt times from the src address to the dst address.
The transfer amount is cnt*4 bytes. Data is transferred without the use of channel
0, cycle steal mode, and completion interrupt. Whenthe destination address is the
work RAM, the destination area is purged after transfer in order to eliminate conflicts
with the cache. Addressing must be long word boundary-based.
Title Function Function Name No.
Function Specifications DMA 1-byte data transfer DMA_CpuMemCopy16 6
Format: void DMA_CpuMemCopy16(void *dst, void *src, Uint32 cnt)
Input: *dst : Destination address
*src : Source address
cnt : Transfer count (0 - 16777215) (long word units)
0x00000001 1 time
0x00ffffff 16777215 times
0x00000000 16777216 times
Output: None
Function Value: None
Function: Transfers long word data of data cnt times from the src address to the dst address.
The transfer amount is cnt*4 bytes. Data is transferred without the use of channel
0, the cycle steal mode, and completion interrupt. When the destination address is
the work RAM, the destination area is purged after transfer in order to eliminate
conflicts with the cache. Addressing must be long word boundary-based.
Program Library User's Guide 3 45
Title Function Function Name No.
Function Specifications DMA data transfer end check DMA_CpuResult 7
Format: Uint 32 DMA_CpuResult(void)
Input: None
Output: None
Function Value: Results of DMA_CpuMemCopy 1, 2, 4, 16 ()
Function: Checks the results of DMA_CpuMemCopy 1, 2, 4, 16 (). The following table
shows returned values.
Execution Result Constant Names
Name of Constant Description
DMA_CPU_END Normal end
DMA_CPU_BUSY Busy
46
• Low-level SCU Transfers
Title Function Function Name No.
Function Specifications Set DMA transfer parameters DMA_ScuSetPrm 8
Format: void DMA_ScuSetPrm(DmaScuPrm *prm, Uint32 ch)
Input: prm : Transfer parameters
ch : DMA channel
Output: None
Function Value: None
Function: Sets the values of transfer parameters to the specified DMA channel.
Title Function Function Name No.
Function Specifications Start DMA transfer DMA_ScuStart 9
Format: void DMA_ScuStart(Uint32 ch)
Input: ch : DMA channel
Output: None
Function Value: None
Function: Starts DMA transfer on the specified DMA channel.
Title Function Function Name No.
Function Specifications Stop DMA transfer DMA_ScuStop 10
Format: void DMA_ScuStop(Uint32 ch)
Input: ch : DMA channel
Output: None
Function Value: None
Function: Stops DMA transfer on the specified DMA channel.
Title Function Function Name No.
Function Specifications Stop DMA transfer on all channels DMA_ScuAllStop 11
Format: void DMA_ScuAllStop(void)
Input: None
Output: None
Function Value: None
Function: Stops DMA transfer on all DMA channels.
Program Library User's Guide 3 47
• Low-level CPU Transfers
Title Function Function Name No.
Function Specifications Set common DMA transfer DMA_CpuSetComPrm 12
parameters
Format: void DMA_CpuSetComPrm(DmaCpuComPrm *com_prm)
Input: com_prm : Common transfer parameters
Output: None
Function Value: None
Function: Sets specified common DMA transfer parameters, but does not set parameters
masked by DmaCpuComPrm.msk.
Remarks: When DMA_CPU_M_AE is not masked byDmaCpuComPrm.msk, the address error flag
is cleared. When DMA_CPU_M_NMIF is not masked, the NMI flag is cleared.
Title Function Function Name No.
Function Specifications Set DMA transfer parameters DMA_CpuSetPrm 13
Format: void DMA_CpuSetPrm(DmaCpuPrm *prm Uint32 ch, )
Input: prm : Transfer parameters
ch : DMA channel
Output: None
Function Value: None
Function: Sets specified channel transfer parameters, but does not set parameters masked by
DmaCpuPrm.msk.
Remarks: When DMA_CPU_TE is not masked by DmaCpuPrm.msk, the transfer end flag bit is
cleared.
Title Function Function Name No.
Function Specifications Start DMA transfer DMA_CpuStart 14
Format: Uint32 DMA_CpuStart(Uint32 ch)
Input: ch : DMA channel
Output: None
Function Value: None
Function: Starts DMA transfer on the specified DMA channel.
48
Title Function Function Name No.
Function Specifications Stop DMA transfer DMA_CpuStop 15
Format: void DMA_CpuStop(Uint32 ch)
Input: ch : DMA channel
Output: None
Function Value: None
Function: Stops DMA transfer on the specified DMA channel.
Title Function Function Name No.
Function Specifications Stop DMA transfer on all channels DMA_CpuAllStop 16
Format: void DMA_CpuAllStop(void)
Input: None
Output: None
Function Value: None
Function: Stops DMA transfer on all DMA channels.
Title Function Function Name No.
Function Specifications Get common DMA status DMA_CpuGetComStatus 17
Format: void DMA_CpuGetComStatus(DmaCpuComStatus *status)
Input: None
Output: status : status pointer
Function Value: None
Function: Gets the specified common status.
Title Function Function Name No.
Function Specifications Get DMA status DMA_CpuGetStatus 18
Format: void DMA_CpuGetStatus(DmaCpuStatus *status, Uint32 ch)
Input: ch : DMA channel
Output: status : Status pointer
Function Value: None
Function: Gets the status on specified DMA channel.
Program Library User's Guide 3 49
Cache Library
1.0 Guide
1.1 Objective
The Cache Library provides functions that are required after the execution of a DMA as
well as function-format macros for cache register operations.
1.2 Overview
The main purpose of this library is to provide functions that purge the cache after DMA
transfers.
When the CPU accesses RAM memory space via a cache address, a conflict occurs
between the RAM and cache memory contents if the RAM is used as a destination for
DMA transfers.
For more details on SH2 cache operations, refer to the SH2 hardware manual.
50
2.0 Reference
2.1 List of Functions
Function Function Name No.
High-level Initialize cache CSH_Init 1
Clear all caches CSH_AllClr 2
Associative purge of target area CSH_Purge 3
2.2 Function Specifications
• High-level
Title Function Function Name No.
Function Specifications Initialize cache CSH_Init 1
Format: void CSH_Init(Uint16 sw)
Input: sw : Way mode
Way Mode Constant Names
Name of Constant Description
CSH_4WAY 4-way set associative
CSH_2WAY 2-way set associative
Output: None
Function Value: None
Function: Initializes the cache. Clears valid bits of all cache lines, enables instruction fill and
data fill, and enables the cache.
Title Function Function Name No.
Function Specifications Clear all caches CSH_AllClr 2
Format: void CSH_AllClr(void)
Input: None
Output: None
Function Value: None
Function: Clears valid bits of all caches of all ways. This function executes internally after
disabling the cache and re-enables the cache after cache clear.
Remarks: Address array is updated, however, the data array is not updated.
Program Library User's Guide 3 51
Title Function Function Name No.
Function Specifications Associative purge of target area CSH_Purge 3
Format: void CSH_Purge(void *address, Uint32 p_size))
Input: *address : Start address
p_size : Purge byte size
Output: None
Function Value: None
Function: Purges the area specified by address and p_size.
2.3 List of Function Format Macros
Function Function Format Macro No.
Name
Low-level Get cache register CSH_GET_CCR 1
Set cache register CSH_SET_CCR 2
Cache enable control CSH_SET_ENABLE 3
Instruction fill control CSH_SET_CODE_FILL 4
Data fill control CSH_SET_DATA_FILL 5
2, 4-way set associative mode CSH_SET_WAY_MODE 6
switch
Select address array access way CSH_SET_ACS_WAY 7
2.4 Function Format Macro Specification
Low-level
Title Function Function Name No.
Function Specifications Get cache register CSH_GetCcr 1
Format: Uint16 CSH_GetCcr(void)
Input: None
Output: None
Function Value: Cache register contents
Function: Gets the CCR contents and returns as a function value.
52
Title Function Function Name No.
Function Specifications Set cache register CSH_SetCcr 2
Format: Uint16 CSH_SetCcr(Uint16 reg)
Input: reg : Cache register value
Output: none
Function Value: Returns contents of register
Function: Sets reg to CCR. Can set each state of the cache in one setting.
Title Function Function Name No.
Function Specifications Cache enable control CSH_SetEnable 3
Format: void CSH_SetEnable(Uint16 sw)
Input: sw : Cache enable switch
Cache Enable Switch Constant Names
Name of Constant Description
CSH_DISABLE Disable cache
CSH_ENABLE Enable cache
Output: None
Function Value: None
Function: Controls operation of the cache by the specified cache enable switch.
Title Function Function Name No.
Function Specifications Instruction fill control CSH_SetCodeFill 4
Format: void CSH_SetCodeFill(Uint16 sw)
Input: sw : Instruction fill disable switch
Command Fill Disable Switch Constant Names
Name of Constant Description
CSH_CODE_ENABLE Enable instruction fill
CSH_CODE_DISABLE Disable instruction fill
Output: none
Function Value: none
Function: Controls the cache fill operation during instruction fetches.
Program Library User's Guide 3 53
Title Function Function Name No.
Function Specifications Data fill control CSH_SetDataFill 5
Format: void CSH_SetDataFill(Uint16 sw)
Input: sw : Data fill disable switch
Disable Switch Constant Names
Name of Constant Description
CSH_DATA_ENABLE Enable data fill
CSH_DATA_DISABLE Disable data fill
Output: None
Function Value: None
Function: Controls the cache fill operation when reading data.
Title Function Function Name No.
Function Specifications 2, 4-way set associative mode switch CSH_SetWayMode 6
Format: void CSH_SetWayMode(Uint16 sw)
Input: sw : Way Mode
Way Mode Constant Names
Name of Constant Description
CSH_4WAY 4-way set associative mode
CSH_2WAY 2-way set associative mode
Output: None
Function Value: None
Function: Selects 2-way or 4-way mode.
Title Function Function Name No.
Function Specifications Select access way of address array CSH_SetAcsWay 7
Format: void CSH_SetAcsWay(Uint16 way)
Input: way : Way (0~3)
Output: None
Function Value: None
Function: Used in selecting the access way when reading or writing an address array.
54
Interrupt Management Library
1.0 Guide
1.1 Objective
The Interrupt Management Library controls interrupts.
1.2 Overview
The library manages access to interrupt registers and interrupt processing routines.
1.3 Overview of Functions
Interrupt RegisterAccess Control
Because the interrupt mask register is write-only, its value cannot be read. Therefore,
values written to the interrupt mask register are held by the library. Specifically, the
following methods are used.
(1) The interrupt mask register state is always held in memory (mask state memory
hereafter).
(2) The same data is written to the mask state memory when a write occurs to the
interrupt mask register.
(3) The contents of the mask state memory are read when there is a need to read the
interrupt mask register.
Interrupt Processing Routine
Access
The library may be used to set the interrupt function or SCU function to the interrupt
vector table. In addition, the current interrupt vector settings can be checked. The SCU
interrupt function is set as the initial value in the SCU interrupt vector table. The SCU
interrupt function has a feature that enables a set SCU function to be called as a subrou-
tine. The SCU function is executed each time the SCU interrupt function is executed.
As default initial settings, a dummy function (which executes only the return process) is
set as the interrupt function, and a SCU dummy function (which executes only the
return process) is set as the SCU interrupt function.
1.4 Usage Conditions
Interrupt RegisterAccess Control
Because the value of the interrupt mask register is held by the library, the library should
be used to set the interrupt mask register. If the register is written directly, the interrupt
mask register will not correspond with the mask state memory. As a result, correct
processing will not occur.
Program Library User's Guide 3 55
1.5 Calling Sequence
Interrupt RegisterAccess Control
void sysInit()
{
INT_SetMsk((INT_MSK_HBLK_IN | INT_MSK_VBLK_OUT),
(INT_MSK_SPR | INT_MSK_DMA1));
/* Enable “H-Blank-IN” and “V-Blank-OUT”
/* Disable “Sprite draw complete” and “Level 0-DMA”
. . .
}
void anyPrg()
{
Uint32 status_bit;
status_bit = INT_GET_STAT();
if(INT_JudgeStat(status_bit, INT_ST_VBLK_OUT, INT_ST_VBLK_IN) == TRUE) {
/* When V-Blank-OUT interrupt occurs, and */
/* V-Blank-IN interrupt does not occur */
. . .
}
}
Interrupt Processing Routine
Access
File A
#pragma interrupt (vblkIn) /* vblkIn function is specified as the
interrupt function */
void vblkIn(void)
{
. . .
}
56
File B
void systemInit(void)
{
INT_SetFunc(INT_SCU_VBLK_IN, vblkIn);
/* vblkIn interrupt function is set to the */
/* V-Blank-IN interrupt vector table. */
INT_SetScuFunc(INT_SCU_VBLK_OUT, vblkOut);
/* vblkOut function is set to the SCU interrupt */
/* function of the V-Blank-OUT interrupt vector. */
. . .
}
void vblkOut(void)
{
. . .
}
2.0 Reference
2.1 Data List
Data Data Name Number
Interrupt Register Access Control
Interrupt mask bit value constant None 1
Interrupt status bit value constant None 2
Interrupt Processing Routine Access
Vector number constant None 3
Program Library User's Guide 3 57
2.2 Data Specifications
Interrupt RegisterAccess Control
Title Data Data Name No.
Data Specifications Interrupt mask bit value constant None 1
The following table shows constants that can be set as the interrupt mask bit value. The
value of each constant is 1 for the 1 bit that the constant represents, and everything else
is set as 0. Multiple numbers can be set once by using logical OR.
Constant Description
INT_MSK_NULL No specification
INT_MSK_ALL Set all (specifies all bits described below)
INT_MSK_ABUS A-Bus
INT_MSK_SPR Sprite draw complete
INT_MSK_DMAI Illegal DMA
INT_MSK_DMA0 Level 0 DMA
INT_MSK_DMA1 Level 1 DMA
INT_MSK_DMA2 Level 2 DMA
INT_MSK_PAD PAD
INT_MSK_SYS System manager
INT_MSK_SND Sound request
INT_MSK_DSP DSP end
INT_MSK_TIM1 Timer 1
INT_MSK_TIM0 Timer 0
INT_MSK_HBLK_IN H-Blank-IN
INT_MSK_VBLK_OUT V-Blank-OUT
INT_MSK_VBLK_IN V-Blank-IN
58
Title Data Data Name No.
Data Specifications Interrupt Status Bit Value Constant None 2
The following table shows the constants that can be set as the interrupt status bit value.
The value of each constant is 1 for the 1 bit that the constant represents, and everything
else is set as 0. Multiple numbers can be set once by using logical OR.
Constant Description
INT_ST_NULL No specification
INT_ST_ALL Specify all (specifies all bits described below)
INT_ST_ABUS A-Bus (specifies A-Bus 01 ~ 16 bits)
INT_ST_ABUS 01 ~ ABUS 16 A-Bus 01 ~ 16
INT_ST_SPR Sprite draw complete
INT_ST_DMAI Illegal DMA
INT_ST_DMA0 Level 0 DMA
INT_ST_DMA1 Level 1 DMA
INT_ST_DMA2 Level 2 DMA
INT_ST_PAD PAD
INT_ST_SYS System manager
INT_ST_SND Sound request
INT_ST_DSP DSP end
INT_ST_TIM1 Timer 1
INT_ST_TIM0 Timer 0
INT_ST_HBLK_IN H-Blank-IN
INT_ST_VBLK_OUT V-Blank-OUT
INT_ST_VBLK_IN V-Blank-IN
Program Library User's Guide 3 59
Interrupt Processing Routine
Access
Title Data Data Name No.
Data Specifications Vector number constant None 3
The following table shows the constants that can be set as the vector number.
The SCU constant name can be set only by the master SH2. The CPU constant name
can be set by the master and slave SH2.
Interrupt Types Constant Name Description
SCU INT_SCU_ABUS A-Bus
INT_SCU_SPR Sprite draw complete
INT_SCU_DMAI Illegal DMA
INT_SCU_DMA0 Level 0 DMA
INT_SCU_DMA1 Level 1 DMA
INT_SCU_DMA2 Level 2 DMA
INT_SCU_PAD PAD
NT_SCU_SYS System manager
NT_SCU_SND Sound request
NT_SCU_DSP DSP end
NT_SCU_TIM1 Timer 1
NT_SCU_TIM0 Timer 0
NT_SCU_HBLK_IN H-Blank-IN
NT_SCU_VBLK_OUT V-Blank-OUT
NT_SCU_VBLK_IN V-Blank-IN
CPU INT_CPU_DIVU Divider
NT_CPU_DMAC0 DMAC channel 0
NT_CPU_DMAC1 DMAC channel 1
NT_CPU_WDT WDT interval
NT_CPU_BSC BSC compare match
NT_CPU_SCI_ERI SCI receive error
NT_CPU_SCI_RXI SCI receive data fill
NT_CPU_SCI_TXI SCI receive data empty
NT_CPU_SCI_TEI SCI send end
NT_CPU_FRT_ICI FRT input capture
NT_CPU_FRT_OCI FRT output compare
NT_CPU_FRT_OVI FRT overflow
60
2.3 List of Functions
Function Function Name Number
Interrupt Register Access Control
Get interrupt mask register INT_GetMsk 1
Set interrupt mask register INT_SetMsk 2
Change interrupt mask register INT_ChgMsk 3
Get interrupt status register INT_GetStat 4
Reset interrupt status register INT_ResStat 5
Set A-Bus interrupt acknowledge INT_SetAck 6
Get A-Bus interrupt acknowledge INT_GetAck 7
Interrupt Processing Routine Access
Set interrupt function INT_SetFunc 8
Set SCU function INT_SetScuFunc 9
Get interrupt function address INT_GetFunc 10
Get SCU function address INT_GetScuFunc 11
Program Library User's Guide 3 61
2.4 Function Specifications
Interrupt RegisterAccess Control
Title Function Function Name No.
Function Specifications Get interrupt mask register INT_GetMsk 1
Format: Uint32 INT_GetMsk(void)
Input: None
Output: None
Function Value: Interrupt mask bit value (0= not masked, 1= masked)
Function: Mask state memory is fetched as the interrupt mask bit value.
Title Function Function Name No.
Function Specifications Set interrupt mask register INT_SetMsk 2
Format: void INT_SetMsk(Uint32 msk_bit)
Input: msk_bit : Interrupt mask bit value
(0= not masked, 1= masked)
Output: None
Function Value: None
Function: Sets the interrupt mask bit value to the interrupt mask register and mask storage
memory.
Title Function Function Name No.
Function Specifications Change interrupt mask register INT_ChgMsk 3
Format: void INT_ChgMsk(Uint32 ena_msk_bit, Uint32 dis_msk_bit)
Input: ena_msk_bit : Interrupt mask bit enable value
dis_msk_bit : Interrupt mask bit disable value
Output: None
Function Value: None
Function: Changes only the interrupt mask register and mask state memory of the specified bit.
The values of unspecified sets are preserved. Set that the value so that the “1” bit of
the interrupt mask bit enable value is not masked and the “1” bit of the interrupt
mask bit disable value is masked. The unspecified bit will preserve its value.
Interrupts are temporarily disabled during this process. In addition, the interrupt
status register that corresponds to the “1” bit of the interrupt mask bit enable value is
reset. The interrupt acknowledge register is enabled when the A-Bus interrupt mask
is enabled.
Remarks: When neither interrupt mask bit is set, specify INT_MSK_NULL.
62
Title Function Function Name No.
Function Specifications Get interrupt status register INT_GetStat 4
Format: Uint32 INT_GetStat(void)
Input: None
Output: None
Function Value: Interrupt status register value
(0= interrupt not generated, 1= interrupt generated)
Function: Gets the interrupt status register value.
Title Function Function Name No.
Function Specifications Reset interrupt status register INT_ResStat 5
Format: void INT_ResStat(Uint32 status_bit)
Input: status_bit : Interrupt status bit value
(0: reset, 1: preserve value)
Output: None
Function Value: None
Function: Resets the “0” bit of the interrupt status bit value.
Title Function Function Name No.
Function Specifications Set A-Bus interrupt acknowledge INT_SetAck 6
Format: void INT_SetAck(Uint32 ack)
Input: ack : Acknowledge value
Acknowledge Value Constant Names
Name of Constant Description
INT_ACK_ENA Enable
INT_ACK_KEEP Preserve current state
Output: None
Function Value: None
Function: Sets the specified acknowledge value to the A-Bus interrupt acknowledge register.
Program Library User's Guide 3 63
Title Function Function Name No.
Function Specifications Get A-Bus interrupt acknowledge INT_GetAck 7
Format: Uint32 INT_GetAck(void)
Input: None
Output: None
Function Value: Acknowledge value
Acknowledge a
Vlue Constant Names
Name of Constant Description
INT_ACK_ENA Enabled
INT_ACK_DIS Disabled
Function: Gets the acknowledge value of the A-Bus interrupt acknowledge register.
• Interrupt Process RoutineAccess
Title Function Function Name No.
Function Specifications Set interrupt function INT_SetFunc 8
Format: void INT_SetFunc (Uint32 num, void* hdr)
Input: num : Vector number
hdr : Interrupt function address
Output: None
Function Value: None
Function: Sets the interrupt function address to the interrupt vector specified by the vector
number. The set interrupt function is executed when an interrupt occurs. When the
interrupt function address is NULL, functions set to the interrupt vector by based on
the vector number are as follows:
• When the vector number is SCU: Resets the SCU interrupt function.
• When the vector number is not SCU: Sets a dummy function. The dummy
function only performs return processing.
Remarks: Interrupt functions can be specified with save register, return, and RTE instructions.
(In C, functions using the #pragma interrupt declaration can be specified) This
function can be used with both the master and slave SH2. This function must be
executed with the CPU to be set.
64
Title Function Function Name No.
Function Specifications Set SCU function INT_SetScuFunc 9
Format: void INT_SetScuFunc (Uint32 num, void* hdr)
Input: num : Vector number
(Only SCU vector numbers can be specified)
hdr : SCU function address
Output: None
Function Value: None
Function: Sets only the SCU function address to the SCU interrupt function of the specified
vector number. The specified SCU function is executed when an SCU interrupt
occurs. When the specified interrupt routine address is NULL, an SCU dummy
function is set. The SCU dummy function performs only return processing.
Remarks: This function may only be used on the master SH2. When setting the interrupt
function with INT_Setfunc, the vector of the SCU interrupt routine becomes
invalid and the set function cannot be called.
Title Function Function Name No.
Function Specifications Get interrupt function address INT_GetFunc 10
Format: void* INT_GetFunc(Uint32 num)
Input: num : Vector number
Output: None
Function Value: Interrupt function address
Function: Gets the interrupt function address set in the specified vector number.
Remarks: This function can be used with both the master and slave SH2. Execute this
function on the CPU to get the address for that CPU.
Title Function Function Name No.
Function Specifications Get SCU function address INT_GetScuFunc 11
Format: void* INT_GetScuFunc(Uint32 num)
Input: num : Vector number (SCU vector number only can be specified)
Output: None
Function Value: SCU function address
Function: Gets the SCU function address set in the SCU interrupt function of the specified
vector number.
Remarks: This function can be used with the master SH2 only. Execute this function
with the master SH2.
Program Library User's Guide 3 65
Memory Management Library
1.0 Guide
1.1 Objective
Use the Memory Management Library for simplifying memory management tasks.
1.2 Overview
Various functions that allocate and free memory are provided. Functions that free up
memory check adjacent memory space for additional free memory. When free memory
is detected, it is linked with the memory being freed. These functions reduce the bur-
den of memory management on the user. Memory Management Library functions have
function interfaces similar to standard C library functions related to memory manage-
ment.
1.3 Calling Sequence
The following example shows the calling sequence for allocating and freeing memory
blocks.
void sysInit()
{
. . .
MEM_Init(0x6050000, 0x10000);
to memory management area */
. . .
}
. . .
void userFunc()
{
Uint32 *mem_area1;
Uint8 *mem_area2;
. . .
mem_area1 = (Uint32 *)MEM_Malloc(4);/* allocates a 4 byte area
if(mem_area1 == NULL) {
return(ERR);
}
mem_area2 = (Uint8 *)MEM_Malloc(1); /* allocates a 1 byte area
if(mem_area2 == NULL) {
return(ERR);
}
. . .
. . .
MEM_Free(mem_areal);
. . .
}
66
2.0 Reference
2.1 List of Functions
Function Name No.
Set memory management area MEM_Init 1
Allocate array area MEM_Calloc 2
Free memory blocks MEM_Free 3
Allocate memory blocks MEM_Malloc 4
Reallocate memory blocks MEM_Realloc 5
2.2 Function Specifications
Title Function Function Name No.
Function Specifications Set memory management area MEM_Init 1
Format: void MEM_Init(Uint32 top_address, Uint32 mem_size)
Input: top_address : Memory management area start address
mem_size : Memory management area size (specify in bytes)
Output: None
Function Value: None
Function: Sets the memory management area used by MEM_Calloc, MEM_Malloc,
MEM_Realloc, and MEM_Free. The memory space defined by the start address
and size is handled as the memory management area.
Remarks: Before using MEM_Calloc, MEM_Malloc, MEM_Realloc, and MEM_Free, use this
function only once. If used twice or more, the contents of the previously allocated
memory cannot be guaranteed.
Title Function Function Name No.
Function Specifications Allocate array area MEM_Calloc 2
Format: void *MEM_Calloc(Uint32 arg_num, Uint32 arg_size)
Input: arg_num : Number of array elements
Output: arg_size : Array element byte size
Function Value: Returns a pointer to the allocated memory block when the function executes
correctly. Returns NULL when an error occurs.
Function: Allocates memory space to the memory management area equivalent to the
specified array element byte size for the specified number of array elements.
Allocated memory blocks are cleared to 0.
Program Library User's Guide 3 67
Title Function Function Name No.
Function Specifications Free memory blocks MEM_Free 3
Format: void MEM_Free(void *mem_ptr)
Input: mem_ptr : Pointer to the memory block
Output: None
Function Value: None
Function: Frees specified memory blocks. Memory blocks that can be specified are those
allocated by MEM_Calloc, MEM_Malloc, and MEM_Realloc.
Title Function Function Name No.
Function Specifications Allocate memory blocks MEM_Malloc 4
Format: void *MEM_Malloc(Uint32 mem_size)
Input: mem_size : Requested memory block size (specified in bytes)
Output: None
Function Value: Returns a pointer to the allocated memory area when the function executes.
Returns NULL when an error occurs.
Function: Allocates blocks of the requested memory size to the memory management area,
and returns a pointer for those blocks. When the requested memory block size is
0, NULL is returned as the function value. Initialization is not performed by
setting this function to 0.
Title Function Function Name No.
Function Specifications Reallocate memory blocks MEM_Realloc 5
Format: void *MEM_Realloc(void *mem_ptr, Uint32 mem_size)
Input: mem_ptr : Pointer to the previous memory block
mem_size : New memory block size (specified in bytes)
Output: None
Function Value: Normally returns a pointer to reallocated memory. Returns NULL when an
error occurs.
Function: The memory block size of the pointer belonging to the memory blocks prior to
reallocation is updated. The contents of the previous memory block is transferred
to a new area through reallocation.
68
Timer Library
l
tia
1.0 Guide
1.1 Objective
The Timer Library provides function format macros that access the programmable wait
and processing timer values.
n
1.2 Overview
The timer uses the free running timer (FRT) in the SH2 and the timer interrupt in the
de
SCU. Function format macro are provided for each device in consideration of the fol-
lowing applications.
SCU
• Timing that is in sync with V-Blanks and H-Blanks can be obtained. This timing
information can be used for performing graphics processing tasks.
CPU
•
nfi
The correct wait time can be set as required when programming. Relatively accurate
waits within a C language program can be executed.
• Elapsed time can be determined. This can be used to profile code execution times.
Co
GA
SE
Program Library User's Guide 3 69
1.3 Detailed Information
• SCU
Usage Method
For more details on how to use the SCU’s Timer Function, refer to the Timer Interrupt
section in the SCU User’s Manual .
Calling Sequence
The following calling sequence example shows timer 1 being used to generate a timer
1 interrupt at the 10th bit of every line that is drawn. If the line is odd, it is flipped.
Uint32 time_flg;
. . .
void vblankOut ()
{
Uint32 intr_count = 0;
. . .
TIM_T1_DISABLE ():
TIM_T1_SET_MODE(TIM_MD_LINE); /* specify interrupt of
every line
TIM_T1_SET_DATA (10);
/* specify interrupt timing at the 10th bit of
the line
time_flg = OFF;
TIM_T1_ENABLE();
. . .
for(intr_count < ALL_LINE_NUM) {
/* until interrupt of all lines has been
executed
changeLine(intr_count);
intr_count ++;
}
}
void timeIntr()
{
time_flg = ON;
}
• CPU
Basic Items
• Counter Value
Counter values are used when the FRT is used as a timer. The counter value is
explained below.
The count up cycle of the counter value varies depending on the period specifica
tion and graphics mode. Use the following formula to calculate the count-up
cycle.
Count Up Cycle (sec) = (cycle period) x 1 / clock frequency (Hz)
70
Conversion from the counter to microseconds and visa versa can be done conve-
niently if the following function format macro is used.
Function Function Format Macro No.
Convert counter value to microseconds TIM_FRT_CNT_TO_MCR 15
Convert microseconds to counter value TIM_FRT_MCR_TO_CNT 16
Usage Method
• Initialization
Execute the following function format macro before using the wait time (WAIT)
function or fetching elapsed time.
Function Function Format Macro No.
Initialize FRT TIM_FRT_INIT 8
• Fetching Elapsed T
ime
Use the following functions to obtain the elapsed time.
Function Function Format Macro No.
Set counter value (16 bit) TIM_FRT_SET_16 9
Get counter value (16 bit) TIM_FRT_GET_16 10
void sysInit()
{
TIM_FRT_INIT(8);
. . .
}
void writeFrameBuff()
{
Uint16 count:
float micro_sec;
TIM_FRT_SET_16(0);
WriteAllVram();
count = TIM_FRT_GET_16()
/* count shows the WriteAllVram() execution time
micro_sec = TIM_FRT_CNT_TO_MRC(count); /*
to microseconds */
printDisplay(micro_sec);/ *display elapsed time on the screen */
}
Program Library User's Guide 3 71
2.0 Reference
2.1 List of Function Format Macros
Function Function Format Macro No.
SCU Enable timer 0 interrupt TIM_T0_ENABLE 1
Disable timer 0 interrupt TIM_T0_DISABLE 2
Enable timer 1 interrupt TIM_T1_ENABLE 3
Disable timer 1 interrupt TIM_T1_DISABLE 4
Set timer 0 compare register TIM_T0_SET_CMP 5
Set timer 1 set data register TIM_T1_SET_DATA 6
Set timer 1 mode register TIM_T1_SET_MODE 7
CPU Initialize FRT TIM_FRT_INIT 8
Set counter value (16-bit) TIM_FRT_SET_16 9
Get counter value (16 bit) TIM_FRT_GET_16 10
Delay Time (16 bit) TIM_FRT_DELAY_16 11
Convert counter value to microseconds TIM_FRT_CNT_TO_MCR 12
Convert microseconds to counter value TIM_FRT_MCR_TO_CNT 13
Set timer interrupt enable register TIM_FRT_SET_TIER 14
Set timer control/status register TIM_FRT_SET_TCSR 15
Set free running counter TIM_FRT_SET_FRC 16
Set output compare register A TIM_FRT_SET_OCRA 17
Set output compare register B TIM_FRT_SET_OCRB 18
Set timer control register TIM_FRT_SET_TCR 19
Set timer output compare control register TIM_FRT_SET_TOCR 20
Get timer interrupt enable register TIM_FRT_GET_TIER 21
Get timer control/status register TIM_FRT_GET_TCSR 22
Get free running counter TIM_FRT_GET_FRC 23
Get output compare register A TIM_FRT_GET_OCRA 24
Get output compare register B TIM_FRT_GET_OCRB 25
Get timer control register TIM_FRT_GET_TCR 26
Get timer output compare control register TIM_FRT_GET_TOCR 27
Get input capture register A TIM_FRT_GET_ICRA 28
72
2.2 Function Specifications
• SCU
Title Function Function Name No.
Function Specifications Enable timer 0 interrupt TIM_T0_ENABLE 1
Format: void TIM_T0_ENABLE(void)
Input: None
Output: None
Function Value: None
Function: Enables timer 0 interrupt.
Title Function Function Name No.
Function Specifications Disable timer 0 interrupt TIM_T0_DISABLE 2
Format: void TIM_T0_DISABLE(void)
Input: None
Output: None
Function Value: None
Function: Disables timer 0 interrupt.
Title Function Function Name No.
Function Specifications Enable timer 1 interrupt TIM_T1_ENABLE 3
Format: void TIM_T1_ENABLE(void)
Input: None
Output: None
Function Value: None
Function: Enables timer 1 interrupt.
Title Function Function Name No.
Function Specifications Disable timer 1 interrupt TIM_T1_DISABLE 4
Format: void TIM_T1_DISABLE(void)
Input: None
Output: None
Function Value: None
Function: Disables timer 1 interrupt.
Program Library User's Guide 3 73
Title Function Function Name No.
Function Specifications Set timer 0 compare register TIM_T0_SET_CMP 5
Format: void TIM_T0_SET_CMP(Uint32 time_cmp)
Input: time_cmp : Timer 0 compare register value
Output: None
Function Value: None
Function: Sets the timer compare register value to the timer 0 compare register.
Title Function Function Name No.
Function Specifications Set timer 1 set data register TIM_T1_SET_DATA 6
Format: void TIM_T1_SET_DATA(Uint32 time_data)
Input: time_data : Timer 1 set data register value
Output: None
Function Value: None
Function: Sets the timer 1 set data register value to the timer 1 set data register.
Title Function Function Name No.
Function Specifications Set timer 1 mode register TIM_T1_SET_MODE 7
Format: void TIM_T1_SET_MODE(Uint32 time_mode)
Input: time_mode : Timer 1 mode register value
Output: None
Function Value: None
Function: Sets the timer 1 mode register value to the timer 1 mode register.
74
• CPU
Title Function Function Name No.
Function Specifications Initialize FRT TIM_FRT_INIT 8
Format: void TIM_FRT_INIT(Uint32 mode)
Input: mode : Period
Constant Description
TIM-CKS-8 8
TIM-CKS-32 32
TIM-CKS-128 128
Output: None
Function Value: None
Function: Sets the selected period and initializes the FRT.
Title Function Function Name No.
Function Specifications Set counter value (16 bit) TIM_FRT_SET_16 9
Format: void TIM_FRT_SET_16(Uint16 cnt)
Input: cnt : Counter value
Output: None
Function Value: None
Function: Sets the 16-bit counter value to the FRT. The FRT counts from this value.
Title Function Function Name No.
Function Specifications Get counter value (16 bit) TIM_FRT_GET_16 10
Format: Uint16 TIM_FRT_GET_16(void)
Input: None
Output: None
Function Value: counter value
Function: Gets the 16-bit counter value of the FRT.
Program Library User's Guide 3 75
Title Function Function Name No.
Function Specifications Delay time (16 bit) TIM_FRT_DELAY_16 11
Format: void TIM_FRT_DELAY_16(Uint16 cnt)
Input: cnt : Delay time counter value
Output: None
Function Value: None
Function: Waits for the specified delay time counter value. Executes TIM_FRT_SET_16 (0)
internally and loops on TIM_FRT_GET_16 (w_cnt) until cnt == w_cnt.
Title Function Function Name No.
Function Specifications Convert counter value to TIM_FRT_CNT_TO_MCR 12
microseconds
Format: Float TIM_FRT_CNT_TO_MCR(Uint32 count)
Input: count : Counter value
Output: None
Function Value: Microseconds value
Function: Converts specified counter value to a microsecond value.
Title Function Function Name No.
Function Specifications Convert microseconds to counter TIM_FRT_MCR_TO_CNT 13
value
Format: Uint32 TIM_FRT_MCR_TO_CNT(Float micro)
Input: micro : microsecond value
Output: None
Function Value: Counter value
Function: Converts microsecond value to a counter value.
Title Function Function Name No.
Function Specifications Set Timer Interrupt Enable TIM_FRT_SET_TIER 14
Register
Format: void TIM_FRT_SET_TIER(Uint8 reg)
Input: reg : Value
Output: None
Function Value: None
Function: Sets a value to the timer interrupt enable register.
76
Title Function Function Name No.
Function Specifications Set timer control/status register TIM_FRT_SET_TCSR 15
Format: void TIM_FRT_SET_TCSR(Uint8 reg)
Input: reg : Value
Output: None
Function Value: None
Function: Sets the setting value to the timer control/status register.
Title Function Function Name No.
Function Specifications Set free running counter TIM_FRT_SET_FRC 16
Format: void TIM_FRT_SET_FRC(Uint16 reg)
Input: reg : Value
Output: None
Function Value: None
Function: Sets the setting value to the free running counter.
Title Function Function Name No.
Function Specifications Set output compare register A TIM_FRT_SET_OCRA 17
Format: void TIM_FRT_SET_OCRA(Uint16 reg)
Input: reg : Value
Output: None
Function Value: None
Function: Sets the setting value to output compare register A.
Title Function Function Name No.
Function Specifications Set Output Compare Register B TIM_FRT_SET_OCRB 18
Format: void TIM_FRT_SET_OCRB(Uint16 reg)
Input: reg : Value
Output: None
Function Value: None
Function: Sets the setting value to output compare register B.
Program Library User's Guide 3 77
Title Function Function Name No.
Function Specifications Set timer control register TIM_FRT_SET_TCR 19
Format: void TIM_FRT_SET_TCR(Uint8 reg)
Input: reg : Set value
Output: None
Function Value: None
Function: Sets the setting value to the timer control register.
Title Function Function Name No.
Function Specifications Sets timer output compare control TIM_FRT_SET_TOCR 20
register
Format: void TIM_FRT_SET_TOCR(Uint8 reg)
Input: reg : Set value
Output: None
Function Value: None
Function: Sets the setting value to the timer output compare control register.
Title Function Function Name No.
Function Specifications Get timer interrupt enable register TIM_FRT_GET_TIER 21
Format: Uint8 TIM_FRT_GET_TIER(void)
Input: None
Output: None
Function Value: Register value
Function: Gets the timer interrupt enable register value.
Title Function Function Name No.
Function Specifications Get timer control/status register TIM_FRT_GET_TCSR 22
Format: Uint8 TIM_FRT_GET_TCSR(void)
Input: None
Output: None
Function Value: Register value
Function: Gets the timer control/status register value.
78
Title Function Function Name No.
Function Specifications Get free running counter TIM_FRT_GET_FRC 23
Format: Uint16 TIM_FRT_GET_FRC(void)
Input: None
Output: None
Function Value: Register value
Function: Gets the free running counter value.
Title Function Function Name No.
Function Specifications Get output compare register A TIM_FRT_GET_OCRA 24
Format: Uint16 TIM_FRT_GET_OCRA(void)
Input: None
Output: None
Function Value: Register value
Function: Gets the output compare register A value.
Title Function Function Name No.
Function Specifications Get output compare register B TIM_FRT_GET_OCRB 25
Format: Uint16 TIM_FRT_GET_OCRB(void)
Input: None
Output: None
Function Value: Register value
Function: Gets the output compare register B value.
Title Function Function Name No.
Function Specifications Get timer control register TIM_FRT_GET_TCR 26
Format: Uint8 TIM_FRT_GET_TCR(void)
Input: None
Output: None
Function Value: Register value
Function: Gets the timer control register value.
Program Library User's Guide 3 79
Title Function Function Name No.
Function Specifications Get timer output compare control TIM_FRT_GET_TOCR 27
register
Format: Uint8 TIM_FRT_GET_TOCR(void)
Input: None
Output: None
Function Value: Register value
Function: Gets the timer output compare control register value.
Title Function Function Name No.
Function Specifications Get input capture register A TIM_FRT_GET_ICRA 28
Format: Uint16 TIM_FRT_GET_ICRA(void)
Input: None
Output: None
Function Value: Register value
Function: Gets the interrupt capture register A value.
80
Debug Support Library
1.0 Guide
1.1 Objective
Incorporating the Debug Support Library in the application during code development
enables various debug functions such as the display of character strings to the screen,
data input using a software “keyboard”, and read/writes to memory.
1.2 Description
• This library uses the VDP2 graphics library and constructs a simple debug environ-
ment using the normal scroll screen NBG0. The Debug Support Library cannot be
used if the VDP2 library is not used.
• This library only supports the standard SATURN control pad. This library cannot be
used if the peripheral library is not used.
1.3 Coding Example
The following is an example of an actual C language program.
#include “sega_scl.h”
#include “sega_dbg.h”
void err(Uint8 *mess);
Uint16 PadData;
main()
{
SCL_Vdp2Init();
DBG_Initial(&PadData,RGB16_COLOR(31, 31, 31),0);
. . . . . . . . . . /* program */
if (. . . . . . )
err(“error occurred in main() ~ function”) ;
. . . . . . . . . . /* program */
void err(Uint8 *mess)
{
DBG_Printf(“%s¥n”,mess); /* display message
DBG_Monitor():
}
Program Library User's Guide 3 81
2.0 Reference
2.1 List of Functions
Function Name No.
Initialize debug environment DBG_Initial 1
Turn on debug screen display DBG_DisplayOn 2
Turn off debug screen display DBG_DisplayOff 3
Clear debug screen DBG_ClearScreen 4
Set debug screen cursor DBG_SetCursor 5
Display character string on debug screen DBG_Printf 6
Key input by software keyboard DBG_GetKeyStr 7
Simple debug process DBG_Monitor 8
2.2 Function Specifications
Title Function Function Name No.
Function Specifications Initialize debug environment DBG_Initial 1
Format: void DBG_Initial (Uint16 *PadData, Rgb16 charColor, Rgb16
backColor)
Input: apPadData : Control pad data pointer
Specify the pad data area that is used to set the pad data
obtained by using the peripheral library within a user
V-Blank routine. Pad data should be set by
flipping 0 and 1.
charColor : The character display color is specified by 16-bit RGB values.
backColor : The color of the background display is specified by 16-bit
RGB values. Transparent when 0 is specified.
Output: None
Function Value: None
Function: Sets the program error display routine entry to the Debug Support Library
initialization and the following program exception interrupt vectors.
• General invalid instruction interrupt
• Invalid slot instruction interrupt
• CPU address error interrupt
• DMA address error interrupt
When an error occurs, the program error display routine displays the source of the
error, the current register content, the stack area content, and then passes control to a
simple monitor.
Remarks: Users using the Debug Support Library must execute this function first.
82
Title Function Function Name No.
Function Specifications Turn on debug screen display DBG_DisplayOn 2
Format: void DBG_DisplayOn(void)
Input: None
Output: None
Function Value: None
Function: Displays the debug screen.
Title Function Function Name No.
Function Specifications Turn off debug screen display DBG_DisplayOff 3
Format: void DBG_DisplayOff(void)
Input: None
Output: None
Function Value: None
Function: Does not display the debug screen.
Title Function Function Name No.
Function Specifications Clear debug screen DBG_ClearScreen 4
Format: void DBG_ClearScreen(void)
Input: None
Output: None
Function Value: None
Function: Erases data written on the debug screen.
Title Function Function Name No.
Function Specifications Set debug screen cursor DBG_SetCursor 5
Format: void DBG_SetCursor(Uint16 x, Uint16 y)
Input: x : x coordinate
y : y coordinate
Output: None
Function Value: None
Function: Specifies the cursor position.
Program Library User's Guide 3 83
Title Function Function Name No.
Function Specifications Display character string on debug DBG_Printf 6
screen
Format: void DBG_Printf(const char *control, . . .)
Input: control : Pointer to character string that represents the expression
... : Parameter list
Output: None
Function Value: None
Function: Writes character strings to the debug screen. Used in the same manner as
printf().
Example: sample ()
{
DBG_Printf(“%s¥n”,”SEGA”);
}
Title Function Function Name No.
Function Specifications Key input by software keyboard DBG_GetKeyStr 7
Format: char *DBG_GetKeyStr(char *KeyStr)
Input: keyStr : Input key string return area pointer.
Output: keyStr : Input key string data.
Function Value: Specified input key string return area pointer.
Function: A software "keyboard" is displayed on the debug screen and a character string is
retrieved.
Key pad operation:
R : Move key select cursor right
L : Move key select cursor left
U : Move key select cursor up
D : Move key select cursor down
B+R : Move key window right
B+L : Move key window left
B+U : Move key window up
B+D : Move key window down
A : Input key select cursor position character
C : Delete input character (backspace)
START : End input (return)
X : Display/don’t display sprite screen
Y : Display/don’t display scroll screen
(other than NBG0 screen)
84
Title Function Function Name No.
Function Specifications Simple debug process DBG_Monitor 8
Format: void DBG_Monitor(void)
Input: None
Output: None
Function Value: None
Function: The following commands are used to display and edit memory. Data within square
brackets [ ] can be omitted, and items separated by a back slash (/) can be selected.
• Display Memory
D fromAddr [toAddr/@size] [;B/W/L] <RTN>
fromAddr : Dump start address
toAddr : Dump end address
@size : Dump size (HEX)
B : Byte (8 bit) display
W : Word (16 bit) display
L : Long (32 bit) display
After inputting the D command, the memory dump may be continued by
entering <RTN>.
• Change Memory Contents
D toAddr [data] [;B/W/L] <RTN>
toAddr : Memory address
data : Edit data (HEX)
B : Byte (8 bits) data
W : Word (16 bits) data
L : Long (32 bits) data
If data is omitted, input sequential data from the specified address when the
data entry prompt is displayed. If “^” is input at this time, the edit address is
decremented; if <RTN> is input, the address is incremented. The memory edit
ends when “.” is input.
• Display Register Contents
R<RTN>
Valid only when calling from the exception process routine of the program.
• Quit Simple Debug Process
Q<RTN>
Returns to the calling point of this routine. Invalid when called from the
exception processing routine of the program.
• Display Command Help
H<RTN>
Program Library User's Guide 3 85
Compression Decompression Library
Terminology
Term Description
Compression rate Equal to (Size after compression / Size before compression)
X 100 [%]
Symbol (character) 1 processing unit of input data for the compression process.
BYTE, WORD, DWORD can be specified in this library.
Code Smallest unit of compression process output data. Defined
per method.
Run Length Encoding Technique for compressing data based on replacing input
(RLE) data with a run length value and a corresponding value for
that run length.
Run length Number of occurrences of the same input value.
Non-pattern phrase A set of data with a short “run” that results in the creation of
more data under the conventional RLE method.
86
1.0 Guide
1.1 Application
The Compression-Decompression Library is used to decode run length encoded (com-
pressed) data. Run length encoding is done via a utility called CMPRUN.EXE (provided
separately).
1.2 Compression Method
This implementation of RLE has additional processing for handling non-pattern
phrases. Since a simple RLE algorithm has a tendency of having reduced compression
efficiency when processing non-pattern phrases, those data are organized and processed
together.
Pattern phrases are represented by a run length and a value. Non-pattern phrases are
represented as non-pattern lengths and data values (i.e. uncompressed data). In order
to differentiate between code that represent pattern and non-pattern data, non-pattern
data are expressed as negative values (two’s complement).
Data with short run lengths tend to reduce the processing efficiency of non-pattern
phrases as well as the overall compression rate. Those data are handled in the same
manner as non-pattern phrases.
Non-Pattern Phase Definition
A non-pattern phrase data set is defined as the following start and end conditions.
• Start condition of non-pattern phrase data:
Symbol (character) with a run length of 1.
• End condition of non-pattern phrase data.
• Non-pattern phrase with a run length of 3 or greater
OR
When the pattern phrase length can be expressed in terms of the processing byte
number unit.
Program Library User's Guide 3 87
Example of Non-Pattern Phrase
Figure 1.1 shows an example of a non-pattern phrase data.
start
A A A A B C C C C D D D D
end
start
A A A A B C D E F G G G G
end
start
A A A A B C C D D E E E E
end
start
A A A A B C C D D E F F F F
end
Figure 1.1 Non-pattern phrase data
Processing Unit
As shown in the following table, there are three processing unit types. One character
(symbol) is input from the start and broken up into the processing unit size.
Table 1.1 Process Units
Unit Representation of compression processing units for input data
BYTE
(1 byte)
11 11 11 11 22 22 33 44 55 66 66 66 66
WORD
(2 bytes)
11 11 11 11 22 22 33 44 55 66 66 66 66
DWORD
11 11 11 11 22 22 33 44 55 66 66 66 66
(4 bytes)
Values are in hexadecimal. 11 corresponds to 1 byte.
88
Expression of Run Length
A normal run length (pattern phrase length) is expressed as a positive number, and the
non-pattern phrase length is expressed as a negative number. Because a run length is
always 2 or greater, it is expressed as a value that is value -2. The byte number used for
expressing run length is the same as the processing unit byte number. The actual
amount of data for the run length is decoded by the processing units. That is, a process-
ing unit in words with a run length of 5 is equivalent to the encoding process for 10
bytes of data. The following table shows the range of run length values that can be
expressed.
Table 1.2 Run Length W
idths and Expressions
Run Length (Non-Pattern Phrase Length)
(Pattern Phrase Length)
Processing Representation Representation
Units (Description) (Description)
BYTE 1 byte 2~ 129 2~ -128
(00h ~ 7Fh) (FFh ~ 80h)
WORD 2 bytes 2~ 32769 2~ -32769
(0000h - 7FFFh) (FFFFh ~ 80000h)
DWORD 3 bytes 2- 231 + 2 2~ -231
(00000000h ~ 7FFFFFFFh) (FFFFFFFFh ~ 8000000h)
Processing Image Diagram
Figure 1.2 is a processing image of the compression algorithm using the run length/
non-pattern phrase process.
Non-Pattern Phrase Non-Pattern Phrase
Coded units
Input data A A A B B B C D D D E F G G G G
X
Compressed data 3 A 3 B -1 C 3 D -2 E F 4 G
Code units
A Pattern phrase value or non-pattern phrase value (uncompressed data).
Any of WORD,
Processing units. BYTE, BYTE, WORD, DWORD.
or DWORD
n Run length or non-pattern phrase length.
Run length width. Equivelant to processing units.
Figure 1.2 Run length/non-pattern phrase processing
Program Library User's Guide 3 89
Compressed File Format
Figure 1.3 and the table on the next page show the run length compression file format.
Header Source size Code Code Code
Compressed
0 1 Z
File
(K BYTE) (Variable (Variable (Variable
(2 Byte)
Length) Length) Length)
K= 2: When source size width is 2 bytes.
K = 6: When source size width is 4 bytes. (The last 2 bytes of the header are omitted to
keep the data in the 4 byte boundary.)
Two types of codes exist, and are differentiated by whether the run length is a positive or
a negative value.
Code
(When run Run length n-2 Pattern phrase length
length ≥ 0) <pattern phrase length>
Add 2 and interpret (M BYTE) (M BYTE)
as pattern phrase
length
M = Processing unit byte number
n: number of units
Code Run length -n Non-pattern phrase Non-pattern phrase
(When run <non-pattern phrase value 0 <uncompressed value n-1 <uncompressed
length < 0) length> (M BYTE) data> (M BYTE) data> (M BYTE)
Flip negative sign
and interpret as
pattern phrase
length
M = Processing unit byte number
Figure 1.3 Run length compression file format
90
Table 1.3 Run length compression file header
MSB LSB
Bit 15 12 11 8 7 4 3 0
Meaning Position
Compression Algorithm 15 . . 12
Run length 00 00
Reserved 00 01
Processing Units 11 . . 10
1 byte 00
2 bytes 01
4 bytes 11
Reserved 9. . 4 00 00 00
Source size width 3
2 bytes 0
4 bytes 1
Reserved 2. . 0 000
Program Library User's Guide 3 91
1.3 Decompression Library
Overview
The Decompression Library expands data compressed by the compression tool. Com-
pressed data may be handled as discrete files on the CD-ROM itself or stored by other
means. However, when the data is decompressed using the Decompression Library, an
input and output data buffer must be set up in a main CPU accessible memory area.
Both of these buffers must be reserved for the Decompression Library, and their ad-
dresses specified in the library functions.
For example, when input data is read off the CD to be decompressed, the Decompres-
sion Library functions must be executed after all of the input data used for a single
decompression pass is read into memory.
The output data buffer must also be specified in the Decompression Library functions.
When the function exceeds this buffer size, it will halt processing and stop the output of
data. It is possible to use this feature as a means to perform partial decompression
processing. However, note that there is no feature to resume the interrupted decom-
pression process.
Figure 1.4 gives an overview of the decompression process.
Main CPU
(Decompression Memory
Library Function)
in
Input Data Buffer
out
Output Data Buffer bufsize
in: Input buffer start address. Specify in terms of a 4-byte boundary.
out: Output buffer start address. Specify in terms of a 4-byte boundary.
bufsize: Output buffer size. Integer multiple of the processing unit byte number.
Figure 1.4 Decompression Process
92
Module Configuration
The Decompression Library function has a hierarchical module configuration in terms
of the features of each function. The high-level functions are easier to use since they
interpret the compressed data’s algorithm and parameter attributes and perform de-
compression processing. The downside is that additional object code must be linked.
The low-level functions may be used when it is desirable to link only the minimum
amount of object code that is necessary. If this approach is taken, it is necessary to make
sure that there are no functional discrepancies between the output of the compression
tool and the processing of the library function.
Figure 1.5 shows the configuration of the Decompression Library modules.
(High-level function Low-level function)
CMP_DecRunlen ()
Run length decompression
CMP_DecRunlenByte ()
Run length decompression/BYTE units
CMP_DecRunlenWord ()
Run length decompression/WORD units
CMP_DecRunlenDword ()
Run length decompression/DWORD units
Figure 1.5 Module Configuration
Program Library User's Guide 3 93
Usage Examples
The following programming examples show the use of the library functions included in
CMPLIB.LIB. The use of these functions assumes that there is compression data in
memory that can be directly accessed from the main CPU.
Example 1
Figure 1.6 shows an example in which compressed data is included in the source file as
a C language data array.
#include "cmplib.h"
/* RLE compressed data converted from binary to text data
char cmpdata [ ] = {
0x10, 0x01, 0x04, . . . . .
}
;
/* decompressed data buffer
char outputbuf[4096] ;
main()
{
/* decompressed data pointer
char *bufp;
/* set to start of decompressed data buffer
bufp = outputbuf;
/* run length dictionary decompression
CMP_DecRunlen (cmpdata, &bufp, sizeof(outputbuf));
/* use of expanded data
Figure 1.6 Decompression Library Usage Example 1
94
Example 2
Figure 1.7 shows an example in which compressed data is read from the CD-ROM and
decompressed.
#include "sega_gfs.h"
#include "cmplib.h"
/* file read buffer
Uint8 readbuf[READ_SIZE]
/* expanded data buffer
Uint8 outputbuf[4096]
main()
{
GfsFid fid; /* file identifier
Sint32 fsize; /* file size
char *bufp; */
fid = 5; /* Set compressed data file identifier
fsize=GFS_Load(fid, 0, readbuf, READBUF_SIZE) file batch read
/* set to start of decompression data buffer
bufp = outputbuf;
/* run length decompression
CMP_DecRunlen (cmpdata, &bufp, sizeof (outputbuf));
/* use of decompressed data
Figure 1.7 Decompression Library Usage Example 2
Program Library User's Guide 3 95
2.0 Reference
2.1 Data Specifications
The following table shows the basic types used in this library.
Table 2.1 Basic Types
Name Description
Uint8 Unsigned 1-byte integer
Sint8 Signed 1-byte integer
Uint16 Unsigned 2-byte integer
Sint16 Signed 2-byte integer
Uint32 Unsigned 4-byte integer
.
Sint32 Signed 4-byte integer
Bool Boolean type. Takes the following values:
FALSE
TRUE
The following table shows the constant macros defined in this library.
Table 2.2 Constant Macros
Macro Name Value Description
CMP_DEC_OK 0 Decompression function return value. Normal
end.
CMP_DEC_STOP 1 Decompression function return value. Normal
end. Halt decompression process.
CMP_DEC_ERR -1 Decompression function return value.
Abnormal end. Input data error.
CMP_DEC_ERR_H_ALGO -2 Decompression function return value.
Abnormal end. Unsupported algorithm.
CMP_DEC_ERR_H_UNIT -3 Decompression function return value.
Abnormal end. Unsupported processing units.
96
2.2 List of Functions
The following table lists the functions of the Decompression Library.
Table 1.6 List of Data Decompression Library Functions
Function Name No.
Run length decompression CMP_DecRunlen 1
Run length decompression/BYTE units CMP_DecRunlenByte 1.1
Run length decompression/WORD units CMP_DecRunlenWord 1.2
Run length decompression/DWORD CMP_DecRunlenDword 1.3
units
Program Library User's Guide 3 97
2.3 Function Specifications
Title Function Function Name No.
Function Specifications Run length decompression CMP_DecRunlen 1
Format: Sint32 CMP_DecRunlen(void *in, void **out, Sint32 size)
Argument: in (input) : Compressed data input buffer pointer
out (input) : Address of decompressed data output buffer pointer
(output) : Decompressed data output end pointer
bufsize (input) : Output buffer size [BYTE]
Return Value: Processing results:
CMP_DEC_OK ( 0) : Normal end. Input data decompression completed.
CMP_DEC_STOP ( 1) : Decompressed data to output buffer size.
CMP_DEC_ERR (-1) : Abnormal end. Input data error.
CMP_DEC_ERR_H_ALGO (-2) : Abnormal end. Unsupported algorithm.
CMP_DEC_ERR_H_UNIT (-3) : Abnormal end. Unsupported processing units.
Function: Expands compressed data.
This function processes the compressed data created by the run length compression
tool CMPRUN.EXE. This function interprets the header of the input data and ex-
ecutes the decompression function that supports the compression parameters.
Compressed data is read from in. Decompressed data is written to *out.
*Out performs a post increment for each 1 byte written. The size of decompressed
data can be determined by comparing the difference between the *out value set
before and after the function is executed. The process is stopped if decompressed
data exceeds bufsize [byte]. Decompressed data is written to the available
memory in the buffer even when the process is stopped.
Note: The input buffer and the output buffer must be reserved. The start
address of each buffer must be specified in terms of a 4-byte boundary.
The output buffer must be large enough to store decompressed data
and be an integer multiple of the processing unit number.
Remarks:
in (input)
Input buffer
bufsize (input)
Output buffer
*out (input) *out (output)
: Compressed data
: Decompressed data
Figure 2.1 Description of Decompression Function Parameters
98
Title Function Function Name No.
Function Specifications Run length decompression / BYTE CMP_DecRunlenByte 1.1
units
Format: Sint32 CMP_DecRunlenByte(void *in, void **out, Sint32 size)
Argument: in (input) : Compressed data input buffer pointer
out (input) : Address of decompressed data output buffer pointer
(output) : Decompressed data output end pointer
bufsize (input) : Output buffer size [BYTE]
Return Value: Processing results
CMP_DEC_OK ( 0) : Normal end. Input data decompression completed.
CMP_DEC_STOP ( 1) : Decompressed data to output buffer size.
CMP_DEC_ERR (-1) : Abnormal end. Input data error.
CMP_DEC_ERR_H_ALGO (-2) : Abnormal end. Unsupported algorithm.
CMP_DEC_ERR_H_UNIT (-3) : Abnormal end. Unsupported processing units.
Function: Expands compressed data.
Processes byte unit RLE compressed data.
Compressed data is read from in. Decompressed data is written to *out.
*Out performs a post increment for each 1 byte written. The size of decompressed
data can be determined by comparing the difference between the *out value set
before and after the function is executed. The process is stopped if decompressed
data exceeds bufsize [byte]. Decompressed data is written to the available
memory in the buffer even when the process is stopped.
Note: The input buffer and the output buffer must be reserved. The start
address of each buffer must be specified in terms of a 4-byte boundary.
The output buffer must be large enough to to store decompressed data
and be an integer multiple of the processing unit number.
Remarks: The function interface is the same as CMP_DecRunlen().
See Figure 2.1.
Program Library User's Guide 3 99
Title Function Function Name No.
Function Specifications Run length decompression / WORD CMP_DecRunlenWord 1.2
units
Format: Sint32 CMP_DecRunlenWord(void *in, void **out, Sint32 size)
Argument: in (input) : Compressed data input buffer pointer
out (input) : Address of decompressed data output buffer pointer
(output) : Decompressed data output end pointer
bufsize (input) : Output buffer size [BYTE]
Return Value: Processing results
CMP_DEC_OK ( 0) : Normal end. Input data decompression completed.
CMP_DEC_STOP ( 1) : Decompressed data to output buffer size.
CMP_DEC_ERR (-1) : Abnormal end. Input data error.
CMP_DEC_ERR_H_ALGO (-2) : Abnormal end. Unsupported algorithm.
CMP_DEC_ERR_H_UNIT (-3) : Abnormal end. Unsupported processing units.
Function: Expands compressed data.
Processes word unit RLE compressed data.
Compressed data is read from in. Decompressed data is written to *out.
*Out performs a post increment for each 1 byte written. The size of decompressed
data can be determined by comparing the difference between the *out value set
before and after the function is executed. The process is stopped if decompressed
data exceeds bufsize [byte]. Decompressed data is written to the available
memory in the buffer even when the process is stopped.
Note: The input buffer and the output buffer must be reserved. The start
address of each buffer must be specified in terms of a 4-byte boundary.
The output buffer must be large enough to store decompressed data
and be an integer multiple of the processing unit number.
Remarks: The function interface is the same as CMP_DecRunlen().
See Figure 2.1.
100
Title Function Function Name No.
Function Specifications Run length decompression / CMP_DecRunlenDword 1.3
DWORD units
Format: Sint32 CMP_DecRunlenDword(void *in, void **out, Sint32 size)
Argument: in (input) : Compressed data input buffer pointer
out (input) : Address of decompressed data output buffer pointer
(output) : Decompressed data output end pointer
bufsize (input) : Output buffer size [BYTE]
Return Value: Processing results
CMP_DEC_OK ( 0) : Normal end. Input data decompression completed.
CMP_DEC_STOP ( 1) : Decompressed data to output buffer size.
CMP_DEC_ERR (-1) : Abnormal end. Input data error.
CMP_DEC_ERR_H_ALGO (-2) : Abnormal end. Unsupported algorithm.
CMP_DEC_ERR_H_UNIT (-3) : Abnormal end. Unsupported processing units.
Function: Expands compressed data.
Processes DWord unit RLE compressed data.
Compressed data is read from in. Decompressed data is written to *out.
*Out performs a post increment for each 1 byte written. The size of decompressed
data can be determined by comparing the difference between the *out value set
before and after the function is executed. The process is stopped if decompressed
data exceeds bufsize [byte]. Decompressed data is written to the available
memory in the buffer even when the process is stopped.
Note: The input buffer and the output buffer must be reserved. The start
address of each buffer must be specified in terms of a 4-byte boundary.
The output buffer must be large enough to store decompressed data
and be an integer multiple of the processing unit number.
Remarks: The function interface is the same as CMP_DecRunlen().
See Figure 2.1.
Program Library User's Guide 3 101
PCM-ADPCM Playback Library
1.0 Overview
1.1 Objective
The PCM-ADPCM Playback Library enables simplified playback of PCM audio on the
SEGA SATURN.
1.2 Features
Easy PCM Playback
The user simply makes calls to the PCM task function periodically in order to perform
audio playback. The library reads from the CD, controls the ring buffer, manages tim-
ing, supplies data to the PCM buffer, and issues commands to the sound driver.
ADPCM Support
This library is capable of decompressing ADPCM compressed data on-the-fly while
playback occurs. ADPCM is a CD-ROM XA audio data format standard that provides
superior sound quality at a compression ratio of approximately 4:1.
Three Types of File Formats
(1) AIFF format (uncompressed PCM)
(2) CD-ROM XA audio format (ADPCM compression)
(3) User-specified ADPCM format (OptImage Interactive Services AudioStack file
output format)
Pause Function
Although the hardware has no function to pause PCM playback, this library makes
pausing simple.
Multiple Stream Playback
This feature allows four PCM streams to be played at the same time. For example, this
can be used for a game where overlapping voice-overs from three characters can be
played back asynchonously with an additional background soundtrack.
102
1.3 System Image
Figures 1.1 and 1.2 show the configuration of the PCM-ADPCM Playback Library.
Application
PCM, ADPCM Sound Memory
Playback library
File System, Stream System
Function Call
Data Flow
CD Block
Figure 1.1 Playback of Uncompressed PCM Data
Application
PCM,
ADPCM Sound Memory
PCM, ADPCM
Playback
Play Library
Library ADPCM (Applicationprogram
(Application program
ADPCM
Decom-
Expansion does
is notnot recognize
required to
pression
Library ADPCM.)
handle ADPCM.)
Library
File System, Stream System
Function Call
Data Flow
CD Block
Figure 1.2 Playback of Compressed
ADPCM Data
Program Library User's Guide 3 103
2.0 Specifications
The following two tables list the specifications of the PCM-ADPCM Playback Library.
Table 2.1 Library Specifications (1)
Item Specification Remarks
Sampling frequency Maximum 44.1 kHz
Bit resolution 8 bit, 16 bit
Number of channels Mono, stereo
File format AIFF PCM Uncompressed
User-specified ADPCM (1) ADPCM Compressed
CD-ROM XA Audio (2) ADPCM Compressed
CD-ROM format Mode 2 Form 2 for CD-ROM XA Audio format
Mode 1 or Mode 2 Form 1 for other cases
Playback modes Memory Playback Mode (plays data in memory) (3)
File Playback Mode (reads and plays from CDs) Uses the File System
Stream Playback Mode (reads and plays from Uses the Stream System
CDs)
Functions Branching playback, continuous playback
Multiple stream playback (can play up to 4 Only 1 ADPCM stream
streams at the same time) can be played.
Pause, stop, volume/pan setting
Continuous play time Maximum 1 hour
Libraries used File System, Stream System, DMA Library, These libraries must be
ADPCM Decompression Library linked along with the PCM-
ADPCM Playback Library
(4)
CPU timer (FRT) This library uses the CPU timer (FRT) set to the Values can be obtained by
usage clock count of 128. TIM_FRT_GET_16
Initialization is done only once within the
PCM_Init function.
User FRT initialization and settings are
prohibited.
Sound driver The application performs initialization settings See the Saturn Sound
(68000 reset, sound driver transfer, etc.). This Driver System Interface
library issues commands for PCM playback manual
(PCM start, stop, parameter change). (Doc. # ST-166-R2-091394).
When the application issues a command,
interrupts must be disabled from the point prior Both this library and the
to the clearing of the command block until the Sound Interface Library are
completion of the command settings. structured so that they do
not override each other’s
commands.
104
Table 2.2 Library Specifications (2)
Item Specification Remarks
Buffer requirements Work buffer: Work structure (about 530 bytes) Fixed size
Ring buffer: Sector size * 10 bytes ~ (5)
(6)
PCM buffer: 4096 * 2 ~ 4096 * 4 sample/1 ch
Required only when
Pause processing work: 4096 samples ~ PCM buffer pause is executed.
size
CPU overhead (7) PCM uncompressed 44 kHz stereo 16 bit : 10% These values covers all
(CPU task function PCM uncompressed 44 kHz mono 16 bit : 6% processing times, such
overhead ratio after as data transfers from
ADPCM compressed 44 kHz stereo 16 bit : 33%
play starts) the CD block through
ADPCM compressed 37.8 kHz stereo 16 bit : 29% work memory to sound
ADPCM compressed 22 kHz stereo 16 bit : 17% memory, and in the
ADPCM compressed 11 kHz stereo 16 bit : 8% case of ADPCM,
decompression
ADPCM compressed 11 kHz mono 16 bit : 4%
processing.
PCM_Task (task • Called at a frequency equal to or greater than If called at an
function) specification the V-Blank interrupt frequency (once every 16 appropriate frequency,
ms). longer processing
• Single-session task function maximum processing occurs once per several
time times of processing.
PCM uncompressed stereo 16 bit : 15 ms
PCM uncompressed mono 16 bit : 8 ms
ADPCM compressed stereo 16 bit : 34 ms
ADPCM compressed mono 16 bit : 15 ms
Notes:
(1) The “user-specified ADPCM format” refers to the data file format output by an AIFF to ADPCM file
converter utility called AudioStack by OptImage Interactive Services.
(2) CD-ROM XA Audio has 16-bit data ADPCM compressed to 4 bits and has the following formats:
Mode B (37.8 kHz) stereo/mono
Mode C (18.9 kHz) stereo/mono
Only the Stream Playback Mode can be used when CD-ROM XA Audio is used.
For more information, see the CD-ROM XA Standards.
(3) The Memory Playback Mode can be used in two ways:
• To play small files, prepared as memory-based files.
• To play data read by the application from the CD through a series of ring buffers.
(4) There are also object files that no not need to be linked depending on the functions used.
The ADPCM Decompression Library does not need to be linked if the ADPCM usage declaration
PCM_DeclareUseAdpcm is not made. In Memory Playback Mode, the File System and Stream
System are not linked. In File Playback Mode, the Stream System is not linked. The File System and
the Stream System are linked if the Stream Playback Mode is used.
Program Library User's Guide 3 105
(5) During branching playback or when data is supplied to the ring buffer using memory playback, the
danger of playback interruptions are reduced by using a larger ring buffer. The larger the ring buffer,
the greater the safety margin for playing PCM audio. However, the drawback is that each task’s
processing time becomes somewhat unstable.
When all files are kept in memory for memory playback, the addresses and files sizes for each file
must be specified. These values need not be integer multiples of the sector size.
(6) A PCM buffer size of 4096 * 2 [sample/1 ch] is adequate if there are no special reasons for a larger
buffer.) By allocating enough memory, playback will complete without glitches even when the task
function cannot be called at the required intervals.
(7) The CPU overhead (CPU overhead ratio for the task function after playback begins) is defined as
follows.
R = (100 X Ttask) / Tplay
R= CPU overhead [%]
Ttask = Total PCM_Task
processing time from start to end of playback.
Tplay = Playback time
106
3.0 Playback Sequence
Playback Sequence
Figure 3.1 shows the sequence for audio playback using the Stream System.
START Corresponding Functions
Initialization PCM_Init, PCM_DeclareUseAdpcm
Set of V-Blank
V-Blank In
Interrupt Process INT_Set ScuFunc, PCM_Vblln,
Set terrupt Process SCL_???, SPR_???
GFS_Init, STM_Init, STM_OpenGrp,
File Initialization STM-SetExecGrp
Open Stream STM_OpenFid, GFS_NameTold
Create Handle PCM_CreateStmHandle
PCM_Set Info
Set Playback Information *Playback information settings are required
only for CD_ROM XA Audio format data
Start Playback PCM_Start
Playback Task Processing PCM_Task
No
Completed? PCM_GetPlayStatus
Yes
Destroy Handle STM_DestroyMemHandle
Close Stream STM_Close
End Processing PCM_Finish
END
Figure 3.1 Sequence for Stream Playback
Program Library User's Guide 3 107
Sample Program
The following example is a program that plays either AIFF or ADPCM format files
using the Stream System Library.
#define RING_BUF_SIZE (2048L*10)
#define PCM_ADDR ((void*)0x25a20000)
#define PCM_SIZE (4096L*2)
/* Work */
PcmWork pcm_work;
/* Ring Buffer */
Uint32 ring_buf[RING_BUF_SIZE / sizeof(Uint32)];
StmHn
PcmHn
/* Initialization */
PCM_Init();
/* ADPCM Use Declaration (required when using ADPCM) */
PCM_DeclareUseAdpcm();
/* Set Interrupt Process */
Use INT_??? and set V-Blank IN interrupt.
Call PCM_VblIn(); within V-Blank IN interrupt.
/* File initialization */
GFS_Init(..);
STM_Init(..);
STM_OpenGrp();
STM_SetExecGrp(..);
/* Open Stream */
stm = STM_OpenFid(..);
/* Create Handle */
PCM_PARA_WORK(¶) = &pcm_work;
PCM_PARA_RING_ADDR(¶) = ring_buf;
PCM_PARA_RING_SIZE(¶) = RING_BUF_SIZE;
PCM_PARA_PCM_ADDR(¶) = PCM_ADDR;
PCM_PARA_PCM_SIZE(¶) = PCM_SIZE;
pcm = PCM_CreateStmHandle(¶, stm);
/* Start Playback */
PCM_Start(pcm);
while(TRUE) {
/* Playback task processing */
PCM_Task(pcm);
/* End condition */
if (PCM_GetPlayStatus(pcm) == PCM_STAT_PLAY_END) break;
}
/* Destroy Handle */
PCM_DestroyStmHandle(pcm);
/* Close stream */
STM_Close(stm);
/* End Processing */
PCM_Finish();
108
4.0 Programming Precautions
This section lists the precautions that must be taken when implementing the PCM-
ADPCM Playback Library in your application.
1. Application Development Issues
• This library uses the CPU’s DMA and timer functions. The CPU’s DMA and timer
functions may not be used when the library is in operation.
• The frequency with which PCM_Task is called should be more than the V-Blank
interrupt frequency (1 time/16 ms). Calling PCM_Task at every V-Blank interrupt may
not be adequate when the same sound is played back twice.
2. Relationship with Other Libraries
• This library uses the File System, Stream System, DMA, and ADPCM Decompression
Libraries. Be sure to link these libraries.
3. Creating a Buffer
• Reserve the following memory areas:
Work buffer: Size of the work structure
Ring buffer: Minimum (sector size) * 10 [byte]. Integer multiple of the sector size.
1 sector = 2324 bytes during CD-ROM XA audio playback.
In all other cases, 1 sector = 2048 bytes.
PCM buffer: 4096*2 ~ 4096*4 [sample/1 ch].
Pause processing work: Minimum 4096 [sample]. Optimal when it is the same size as the PCM buffer.
4. Seamless Branching
• The PCM volume and pan settings are the same as the prior handle when seamless
branching is performed by PCM_EntryNext.
• Up to 60 minutes of continuous playback is possible when seamless branching is per-
formed with PCM_EntryNext. Continuous playback longer than this cannot be done.
• Use file pre-read processing in the application program when seamless branching is
performed.
• The seamless branching function cannot be used when the File System is used.
• The seamless branching function can be performed only during single playback, and
not during multiple system playback.
5. Multiple System Playback
• Use different PCM stream playback numbers when using this feature.
• When playing more than one CD file at the same time, be sure to use file interleaving or
channel interleaving. Use the Stream System in this case.
• Multiple System Playback cannot be done with the same file. Different files
must be specified.
• Multiple System Playback is able to play up to four audio channels at the same time.
• Only one channel of ADPCM compressed audio data can be played.
Program Library User's Guide 3 109
6. ADPCM Support
• Link the ADPCM Decompression Library SEGA_ADP.LIB.
• Call the ADPCM usage declaration PCM_DeclareUseAdpcm after the initialization
function.
User-SpecifiedADPCM Format Playback
• It is possible to play back audio with
the same process (same program) as for the
AIFF format. However, be aware that the CPU overhead increases compared with
the AIFF format.
CD-ROM XA Audio Format Playback
• The library determines the playback frequency and the number of channels (stereo/
mono) from the coding information contained in the subheader area. Confirm that
the information is entered correctly.
• The library user sets the stream key.
• Set the ring buffer to an integer multiple of the sector size 2324 bytes.
• Set playback information using PCM_SetInfo.
• Use only the Stream Playback mode for CD-ROM XA audio.
• See the sample program smppcm5.c.
7. Using the Functions
• Be sure to call PCM_Init at the start of the program.
• Be sure to call PCM_VblIn within the V-Blank IN interrupt.
• PCM_Start can be executed only once for the handle.
If the same file is played more than once, create a handle for each time it is played.
• Call PCM_SetLoadNum, PCM_SetPcmCmdBlockNo, PCM_SetPcmStreamNo before beginning
playback.
• For handles created using PCM_CreateMemHandle, be sure to communicate the data
size to the ring buffer using PCM_NotifyWriteSize.
• When using the pause function, pause processing work must first be specified by
PCM_SetPauseWork. This work need not be prepared for every handle.
Because this work is a work area that is used temporarily during pause-on process-
ing, the area can be reserved immediately prior to the pause-on processing and can be
released immediately thereafter.
• CPU DMA is used as the default method to transfer data from the CD block to the
ring buffer.
Use PCM_SetTrModeCd to specify program transfer, CPU DMA, or SCU DMA.
Call PCM_SetTrModeCd after creating a handle and before calling the task function for
the first time.
• Be sure to set playback information with PCM_SetInfo when playing back
CD-ROM XA audio.
110
5.0 Data Specifications
5.1 List of Data
Table 5.1 lists the data used by this library.
Table 5.1 List of Data
Function Function Name No.
Basic Data 1.0
Constants 2.0
Error code PCM_ERR_~ 2.1
Playback status PCM_STAT_PLAY_~ 2.2
Pause control command PCM_PAUSE_~ 2.3
Forced switch enabled check value PCM_CHANGE_~ 2.4
Data transfer mode select value PCM_TRMODE_~ 2.5
Data Type 3.0
Handle PcmHn 3.1
Create parameters PcmCreatePara 3.2
Error registration function PcmErrFunc 3.3
PCM information PcmInfo 3.4
Program Library User's Guide 3 111
5.2 Data Details
• Basic Data
Title Data Data Name No.
Data Specifications Basic data 1.0
Type Description
Uint8 Unsigned 1 byte integer
Sint8 Signed 1 byte integer
Uint16 Unsigned 2 byte integer
Sint16 Signed 2 byte integer
Uint32 Unsigned 4 byte integer
Sint32 Signed 4 byte integer
Bool Boolean type. The following values are taken:
FALSE
TRUE
112
• Constants
Title Data Data Name No.
Data Specifications Error Codes PCM_ERR_~ 2.1
The following constants represent error codes.
Constant Name Description
PCM_ERR_OK No error has occurred
PCM_ERR_OUT_OF_HANDLE Out of handles
PCM_ERR_NO_INIT Initialization function was not called
PCM_ERR_INVALID_HN Destroyed by invalid handle
PCM_ERR_ILL_CREATE_MODE Differs than Create mode
PCM_ERR_TOO_LARGE_HEADER Header is too large (buffer size is too small)
PCM_ERR_HEADER_DATA Header data error
PCM_ERR_AFI_NO_COMMON No CommonChunk
PCM_ERR_AFI_COMPRESS Unsupported compression type
PCM_ERR_NOT_DECLARE_ADPCM ADPCM usage declaration not made
PCM_ERR_ILLEGAL_PARA Mistake in argument specification
PCM_ERR_ILLEGAL_HANDLE Illegal handle
PCM_ERR_NEXT_HN_STATUS Error status of continuous play handle
PCM_ERR_NEXT_HN_AUDIO Audio conditions do not match
PCM_ERR_CHANGE_NO_ENTRY Changed without entries
PCM_ERR_PAUSE_STATUS Called by conditions other than
PCM_STAT_PLAY_TIME or PCM_STAT_PLAY_PAUSE
PCM_ERR_PAUSE_WORK_NULL Pause processing work error
PCM_ERR_PAUSE_WORK_SIZE Pause processing work error
PCM_ERR_PAUSE_WORK_SET Illegal pause processing work specification
PCM_ERR_DMA_MODE Unsupported transfer mode
PCM_ERR_DMA_CPU_PCM Abnormal end of DMA
PCM_ERR_GFS_READ GFS read failure
PCM_ERR_RING_SUPPLY Supplied data to the ring buffer after playback was
finished (data was not supplied in time and
processing was stopped)
Program Library User's Guide 3 113
Title Data Data Name No.
Data Specifications Playback status PCM_STAT_PLAY_~ 2.2
The following table shows the playback status data.
Constant Name Description
PCM_STAT_PLAY_ERR_STOP Abnormal stop
PCM_STAT_PLAY_CREATE Creation status
PCM_STAT_PLAY_PAUSE Pause
PCM_STAT_PLAY_START Start playback
PCM_STAT_PLAY_HEADER Header processing status
PCM_STAT_PLAY_TIME Playing (timer start)
PCM_STAT_PLAY_END End playback
Title Data Data Name No.
Data Specifications Pause control command PCM_PAUSE_~ 2.3
The following tables shows pause control data.
Constant Name Description
PCM_PAUSE_ON_AT_ONCE Immediate pause
PCM_PAUSE_OFF Cancel pause
Title Data Data Name No.
Data Specifications Forced switch enabled check value PCM_CHANGE_~ 2.4
The following table shows forced switching enabled status data.
Constant Name Description
PCM_CHANGE_OK_AT_ONCE Forced switching can be done immediately
PCM_CHANGE_NO_DATA Insufficient data. Cannot do continuous playback
smoothly if forced switching (PCM_Change) is
executed.
PCM_CHANGE_NO_ENTRY The next handle is not registered by
PCM_EntryNext. Forced switching (PCM_Change)
cannot be executed.
114
Title Data Data Name No.
Data Specifications Data transfer mode select value PCM_TRMODE_~ 2.5
The following table shows data transfer methods.
Constant Name Description
PCM_TRMODE_CPU Software transfer
PCM_TRMODE_SDMA CPU direct memory access (cycle steal)
PCM_TRMODE_SCU SCU direct memory access
Program Library User's Guide 3 115
• Data Type
Title Data Data Name No.
Data Specifications Handle PcmHn 3.1
The following represents information on each playback unit.
typedef void *PcmHn;
Title Data Data Name No.
Data Specifications Create parameters PcmCreatePara 3.2
The following represents handle creation information. All types of parameter values are
set to PCM_Create~ as structures.
typedef struct {
PcmWork /* */
/*
Sint32 *ring_addr; /* */
/*
from memory */
Sint32 ring_size; /* */
/*
Sint32 *pcm_addr; /* */
Sint32 pcm_size; /*
memory */
} PcmCreatePara;
Cautions Concerning the PCM Buffer
• Set up the PCM buffer in sound memory.
• Specify the integer multiple of 4096 for the PCM buffer size (minimum
4096 X 2).
• If PCM buffer size is considered to be S [sample/1 ch], then—as required by play-
back conditions—it is expressed in bytes as shown in the following table:
Playback Conditions PCM Buffer Size (bytes)
8 bit monaural S [byte]
8 bit stereo 2 X S [byte]
16 bit monaural 2 X S [byte]
16 bit stereo 4 X S [byte]
• Specify the same area (address, size) when doing smooth continuous playback.
• Specify a different area when doing multiple stream playback.
116
Title Data Data Name No.
Data Specifications Error registration function PcmErrFunc 3.3
This function is called when an error occurs.
Format: void (*PcmErrFunc)(void *obj, Sint32 err_code)
Input: obj : Registered object
err_code : Error code
Output: None
Title Data Data Name No.
Data Specifications Playback information PcmInfo 3.4
The following represents PCM playback information.
typedef struct {
PcmFileType file_type; /* */
PcmDataType data_type; /* */
Sint32 file_size; /* */
* Permits the supply of more data than this to
* to the ring buffer, but does not process it */
Sint32 channel; /* Number of channels */
Sint32 sampling_bit; /* Sampling bit resolution */
Sint32 sampling_rate; /* Sampling rate [Hz] */
Sint32 sample_file; /* Number of samples in the file [sample/1ch] */
Sint32 compression_type; */
} PcmInfo;
Program Library User's Guide 3 117
6.0 Functions Specifications
6.1 List of Functions
Tables 6.1 and 6.2 list the functions of this library.
Table 6.1 List of Functions
Function Function Name No.
Initialization and End Processes 1.0
Initialize Library (1) PCM_Init 1.1
Library end process (1) PCM_Finish 1.2
ADPCM use declaration (2) PCM_DeclareUseAdpcm 1.3
Handle Operations 2.0
Create handle (memory) (3) PCM_CreateMemHandle 2.1
Destroy handle (memory) (3) PCM_DestroyMemHandle 2.2
Create handle (file system) (4) PCM_CreateGfsHandle 2.3
Destroy handle (file system) (4) PCM_DestroyGfsHandle 2.4
Create handle (stream system) (5) PCM_CreateStmHandle 2.5
Destroy handle (stream system) (5) PCM_DestroyStmHandle 2.6
Playback task (1) PCM_Task 2.7
) 1V-Blank
( IN processing function (1) PCM_VblIn 2.8
Playback Controls 3.0
Start playback (6) PCM_Start 3.1
Stop playback PCM_Stop 3.2
Pause (7) PCM_Pause 3.3
Register next play handle (6) PCM_EntryNext 3.4
Forced playback handle change PCM_Change 3.5
Get handle change status PCM_CheckChange 3.6
Notes
(1) Required
(2) Required when using ADPCM
(3) Required for Memory Playback Mode
(4) Required for File Playback Mode
(5) Required for Stream Playback Mode
(6) One or the other is required
(7) Required when using the pause function
118
Table 6.2 List of Functions (2)
Function Function Name No.
Information Setting Functions 4.0
Set maximum number of transfer PCM_SetLoadNum 4.1
sectors
Set playback pan position PCM_SetPan 4.2
Set playback volume PCM_SetVolume 4.3
Change PCM playback parameter PCM_ChangePcmPara 4.4
Set PCM command block number PCM_SetPcmCmdBlockNo 4.5
Set PCM stream playback number (4) PCM_SetPcmStreamNo 4.6
Set pause processing work (5) PCM_SetPauseWork 4.7
Set data transfer mode PCM_SetTrModeCd 4.8
(CD block→ Ring buffer)
Set playback information (6) PCM_SetInfo 4.9
Get Information Functions 5.0
Get playback time PCM_GetTime 5.1
Get playback status (1) PCM_GetPlayStatus 5.2
Buffer Controls 6.0
Get write buffer (3) PCM_GetWriteBuf 6.1
Notify write size (2) PCM_NotifyWriteSize 6.2
Error Controls 7.0
Register error function PCM_SetErrFunc 7.1
Get error information PCM_GetErr 7.2
Notes:
(1) Required
(2) Required for Memory Playback Mode
(3) Required when supplying data to the ring buffer in the Memory Playback Mode
(4) Required for Multiple Stream Playback Mode
(5) Required when using the pause function
(6) Required for CD-ROM XA audio playback
Program Library User's Guide 3 119
6.2 Function Details
• Initialization and End Processes
Title Function Function Name No.
Function Specifications Initialize Library PCM_Init 1.1
Format: Bool PCM_Init(void)
Input: None
Output: None
Value: When able to initialize normally TRUE
When unable to initialize normally FALSE
Function: To enable use of this library, perform this initialization immediately after the
program starts.
Remarks: Be sure to call this function at the start of the program when using the library.
Title Function Function Name No.
Function Specifications Library end process PCM_Finish 1.2
Format: void PCM_Finish(void)
Input: None
Output: None
Value: None
Function: Performs the PCM library end process.
Remarks: Call this function when no longer performing PCM playback.
Title Function Function Name No.
Function Specifications ADPCM use declaration PCM_DeclareUseAdpcm 1.3
Format: void PCM_DeclareUseAdpcm(void)
Input: None
Output: None
Value: None
Function: This function enables ADPCM playback.
Remarks: This function is required when the user-specified ADPCM or CD-ROM XA Audio
format data is played back.
Call this function immediately after the initialization function PCM_Init. Calling
this function links the ADPCM Decompression Library module. Calling this func-
tion does not restrict playback functions for data formats other than ADPCM.
If this function is not called, the execution file size becomes somewhat smaller.
120
• Handle Operations
Title Function Function Name No.
Function Specifications Create handle (Memory) PCM_CreateMemHandle 2.1
Format: PcmHn PCM_CreateMemHandle(PcmCreatePara *para)
Input: para : Creation parameters
Output: None
Value: Handle (NULL when unable to generate handle)
Function: Creates handles for playing files that exist in memory.
Remarks: • 32 handles can be created at the same time.
• Load files with the application program into memory.
• For handles produced by PCM_CreateMemHandle, be sure to communicate the file
size using PCM_NotifyWriteSize.
Title Function Function Name No.
Function Specifications Destroy handle (Memory) PCM_DestroyMemHandle 2.2
Format: void PCM_DestroyMemHandle(PcmHn pcm)
Input: pcm : handle
Output: None
Value: None
Function: Destroys the handle.
Remarks: Once a handle is destroyed, it can no longer be used.
Title Function Function Name No.
Function Specifications Create handle (File System) PCM_CreateGfsHandle 2.3
Format: PcmHn PCM_CreateGfsHandle(PcmCreatePara *para, GfsHn gfs)
Input: para : Creation parameters
gfs : File handle
Output: None
Value: Handle (NULL when unable to generate handle)
Function: Creates a handle for playing files with the File System.
Remarks: • 32 handles can be created at the same time.
• Get the file handle in advance with the application.
Title Function Function Name No.
Function Specifications Destroy handle (File System) PCM_DestroyGfsHandle 2.4
Format: void PCM_DestroyGfsHandle(PcmHn pcm)
Input: pcm : handle
Output: None
Value: None
Function: Destroys the handle.
Remarks: Once a handle is destroyed, it can no longer be used.
Program Library User's Guide 3 121
Title Function Function Name No.
Function Specifications Create handle (Stream System) PCM_CreateStmHandle 2.5
Format: PcmHn PCM_CreateStmHandle(PcmCreatePara *para, StmHn stm)
Input: para : Creation parameters
stm : Stream handle
Output: None
Value: Handle (NULL when unable to generate handle)
Function: Creates handles for playing files with the Stream System.
Remarks: • 32 handles can be created at the same time.
• Get the stream handle in advance with the application.
Title Function Function Name No.
Function Specifications Destroy handle (Stream System) PCM_DestroyStmHandle 2.6
Format: void PCM_DestroyStmHandle(PcmHn pcm)
Input: pcm : Handle
Output: None
Value: None
Function: Destroys handles
Remarks: Once a handle is destroyed, it can no longer be used.
Title Function Function Name No.
Function Specifications Playback task PCM_Task 2.7
Format: void PCM_Task(PcmHn pcm)
Input: pcm : Handle
Output: None
Value: None
Function: Reads files from the CD and transfers data to sound memory.
Remarks: This function must be called periodically during playback.This function should
be called with a frequency greater than the V-Blank interruptfrequency
(1 time/16 ms).
Title Function Function Name No.
Function Specifications V-Blank IN processing function PCM_VblIn 2.8
Format: void PCM_VblIn(void)
Input: None
Output: None
Value: None
Function: Manages the playback time.
Remarks: Be sure to call this function with a V-Blank IN interrupt process when using this
library.
122
• Playback Controls
Title Function Function Name No.
Function Specifications Start playback PCM_Start 3.1
Format: void PCM_Start(PcmHn pcm)
Input: pcm : Handle
Output: None
Value: None
Function: Starts playback.
Remarks: Playback is possible only once per generated handle.
To play the same file repeatedly, a new handle must be generated each time.
Title Function Function Name No.
Function Specifications Stop playback PCM_Stop 3.2
Format: void PCM_Stop(PcmHn pcm)
Input: pcm : Handle
Output: None
Value: None
Function: Stops playback.
Title Function Function Name No.
Function Specifications Pause PCM_Pause 3.3
Format: void PCM_Pause(PcmHn pcm, PcmPauseCmd cmd)
Input: pcm : Handle
cmd : Pause control command
Output: None
Value: None
Function: Pauses playback. Also cancels pause.
Program Library User's Guide 3 123
Title Function Function Name No.
Function Specifications Register next play handle PCM_EntryNext 3.4
Format: void PCM_EntryNext(PcmHn pcm)
Input: pcm : Handle
Output: None
Value: None
Function: Registers the next playback handle.
Remarks: When a handle is registered by this function, the next handle automatically
begins playing when the handle currently playing completes its playback.
The entry is canceled if NULL is specified.
A handle registered by this function begins playback even if there is a forced
change by PCM_Change.
Only one handle can be registered. It becomes unregistered when the switch occurs
to the registered handle. In addition, the next handle can be registered.
Title Function Function Name No.
Function Specifications Forced playback handle change PCM_Change 3.5
Format: void PCM_Change(void)
Input: None
Output: None
Value: None
Function: Stops the handle currently being played and starts playback of the handle
registered by PCM_EntryNext .
Title Function Function Name No.
Function Specifications Get handle change status PCM_CheckChange 3.6
Format: PcmChangeStatus PCM_CheckChange(void)
Input: None
Output: None
Value: Forced change enabled check value
Function: Enables the application to check whether it can force a change with PCM_Change.
124
• Information Setting Functions
Title Function Function Name No.
Function Specifications Set maximum number of transfer sectors PCM_SetLoadNum 4.1
Format: void PCM_SetLoadNum(PcmHn pcm, Sint32 load_sct)
Input: pcm : Handle
load_set : Maximum number of transfer sectors.
Output: None
Value: None
Function: Sets the maximum number of sectors transferred from the CD buffer to the ring
buffer of the library. Default is 20 sectors.
Remarks: Call this function before starting playback.
Title Function Function Name No.
Function Specifications Set playback pan position PCM_SetPan 4.2
Format: void PCM_SetPan(PcmHn pcm, Sint32 PAN)
Input: pcm : Handle
pan : Pan value (0 ~ 31)
Output: None
Value: None
Function: Specifies the audio pan position. Default is 0.
Pan settings are valid for mono playback, but are ignored when playing in stereo.
The following figures shows pan settings.
Pan setting 0 1 → 14 15 16 17 → 30 31
Left Output Max >> >> >> Off Max Max Max Max Max
(Volume)
Right Output Max Max Max Max Max Max >> >> >> Off
(Volume)
Program Library User's Guide 3 125
Title Function Function Name No.
Function Specifications Set playback volume PCM_SetVolume 4.3
Format: void PCM_SetVolume(PcmHn pcm, Sint32 volume)
Input: pcm : Handle
volume : Volume (0 ~ 7)
Output: None
Value: None
Function: Specifies the volume (no output at 0, maximum volume at 7).
Default is 7.
Title Function Function Name No.
Function Specifications Change PCM playback parameter PCM_ChangePcmPara 4.4
Format: void PCM_ChangePcmPara(PcmHn pcm)
Input: pcm : Handle
Output: None
Value: None
Function: Changes the PCM playback parameter for the sound driver during playback.
Remarks: The actual parameter change processing is performed by calling this function
after the pan and volume setting are made.
Title Function Function Name No.
Function Specifications Set PCM command block number PCM_SetPcmCmdBlockNo 4.5
Format: void PCM_SetPcmCmdBlockNo(PcmHn pcm, Sint32 blk_no)
Input: pcm : Handle
blk_no : PCM command block number (0 ~ 7)
Output: None
Value: None
Function: Sets the PCM command block number that is set in the sound driver.
Default is 1.
Remarks: See SATURN Sound Driver System Interface manual for details on the PCM command
block number. This function must be called before starting playback.
126
Title Function Function Name No.
Function Specifications Set PCM stream playback number PCM_SetPcmStreamNo 4.6
Format: void PCM_SetPcmStreamNo(PcmHn pcm, Sint32 stream_no)
Input: pcm : Handle
stream_no : PCM stream playback number (0 ~ 7)
Output: None
Value: None
Function: Sets the PCM stream playback number to set in the sound driver. Default is 1.
Remarks: See the SATURN Sound Driver System Interface manual for details on PCM stream
playback numbers. Different stream playback numbers must be set to each stream
for multiple stream playback. This function must be called before beginning
playback.
Title Function Function Name No.
Function Specifications Set pause processing work PCM_SetPauseWork 4.7
Format: void PCM_SetPauseWork(Sint32 *addr, Sint32 size)
Input: addr : Work address
size : Work size
Output: None
Value: None
Function: Sets the work area used by the pause-on processing.
Remarks: When using the pause function, a pause processing work area must be specified by
PCM_SetPauseWork in advance. It is not necessary to set the work area up for each
handle. Because this work area is used temporarily for the pause-on processing, the
area must be reserved immediately before the pause-on processing, and can be
released immediately thereafter.
Example: #defile PAUSE_WORK_SIZE (4096L*2)
pause_work_addr = malloc(PAUSE_WORK_SIZE);
PCM_SetPauseWork(pause_work_addr, PAUSE_WORK_SIZE);
PCM_Pause(pcm, PCM_PAUSE_ON_AT_ONCE);
free(pause_work_addr);
Program Library User's Guide 3 127
Title Function Function Name No.
Function Specifications Set data transfer mode PCM_SetTrModeCd 4.8
(CD block → ring buffer)
Format: void PCM_SetTrModeCd(PcmHn pcm, PcmTrMode mode)
Input: pcm : Handle
mode : Data transfer method
Output: None
Value: None
Function: Sets the data transfer mode for transfers from the CD block to the ring buffer.
Default is CPU DMA. It is possible to specify software-based transfer.
Remarks: After the handle is created, PCM_SetTrModeCd must be called before calling the task
function.
Title Function Function Name No.
Function Specifications Set playback information PCM_SetInfo 4.9
Format: void PCM_SetInfo(PcmHn pcm, PcmInfo *info)
Input: pcm : Handle
info : Play information
Output: None
Value: None
Function: Sets information for PCM playback.
Remarks: Because it gets information for playback from the file header, this function is
normally not used. Currently, it is required only for playing CD-ROM XA audio.
After the handle is created, PCM_SetInfo must be called before the task function is
called for the first time.
Example: Playback information should be set as shown in the following example for
CD-ROM XA audio playback.
PcmInfo info;
PCM_INFO_FILE_TYPE (&info) = PCM_FILE_TYPE_NO_HEADER;/* without a header */
PCM_INFO_DATA_TYPE (&info) = PCM_DATA_TYPE_ADPCM_SCT; /* XA audio sector processing */
PCM_SetInfo(pcm, &info) ;
128
• Get Information Functions
Title Function Function Name No.
Function Specifications Get play time PCM_GetTime 5.1
Format: Sint32 PCM_GetTime(PcmHn pcm)
Input: pcm : Handle
Output: None
Value: Current time
Function: Gets the current time (number of samples played from the start of this file
until now.)
Title Function Function Name No.
Function Specifications Get playback status PCM_GetPlayStatus 5.2
Format: PcmPlayStatus PCM_GetPlayStatus(PcmHn pcm)
Input: pcm : Handle
Output: None
Value: Playback status
Function: Returns the current playback status.
• Buffer Controls
Title Function Function Name No.
Function Specifications Get write buffer PCM_GetWriteBuf 6.1
Format: Uint32 *PCM_GetWriteBuf(PcmHn pcm, Sint32 *free_size, Sint32
*free_total)
Input: pcm : Handle
Output: free_size : Number of bytes of continuous writeable area
free_total : Total number of bytes of writeable area including
noncontiguous areas.
Value: Start address of contiguous writeable area (NULL when not writeable)
Function: Gets the write destination buffer address and writeable number of bytes.
Remarks: This function is used by the user to provide data to the ring buffer.
Title Function Function Name No.
Function Specifications Notify write size PCM_NotifyWriteSize 6.2
Format: void PCM_NotifyWriteSize(PcmHn pcm, Sint32 write_size)
Input: pcm : Handle
write_size : Number of bytes written
Output: None
Value: None
Function: Notifies the library of the number of data bytes actually output to the ring buffer.
Remarks: This function is used for implementing user-controlled ring buffer data transfers.
Reports the buffer size (file size) when playing files in memory.
Program Library User's Guide 3 129
• Error Controls
Title Function Function Name No.
Function Specifications Register error function PCM_SetErrFunc 7.1
Format: void PCM_SetErrFunc(PcmErrFunc func, void *obj)
Input: func : Function called when an error occurs
obj : Registered object
Output: None
Function Value: None
Function: Sets the function called when an error occurs. The registered object is passed to
the first argument of the registered function.
Title Function Function Name No.
Function Specifications Get error information PCM_GetErr 7.2
Format: PcmErrCode PCM_GetErr(void)
Input: None
Output: None
Value: Error code
Function: Returns the error code that occurred most recently.
130
INDEX
C
CMP_DecRunlen ................................... 98 DMA_ScuMemCopy ............................. 42
CMP_DecRunlenByte ............................ 99 DMA_ScuResult ..................................... 43
CMP_DecRunlenDword ..................... 101 DMA_ScuSetPrm ................................... 47
CMP_DecRunlenWord ........................ 100 DMA_ScuStart ........................................ 47
CSH_AllClr ............................................. 51 DMA_ScuStop ........................................ 47
CSH_GetCcr ........................................... 52 DmaCpuComPrm .................................. 38
CSH_Init .................................................. 51 DmaCpuPrm .......................................... 39
CSH_Purge ............................................. 52 DmaScuPrm ............................................ 35
CSH_SetAcsWay .................................... 54
CSH_SetCcr ............................................ 53
CSH_SetCodeFill ................................... 53 I
CSH_SetDataFill .................................... 54
INT_ChgMsk .......................................... 62
CSH_SetEnable ...................................... 53
INT_GetAck ............................................ 64
CSH_SetWayMode ................................ 54
INT_GetFunc .......................................... 65
INT_GetMsk ........................................... 62
INT_GetScuFunc .................................... 65
D
INT_GetStat ............................................ 64
DBG_ClearScreen .................................. 83 INT_ResStat ............................................ 64
DBG_DisplayOff .................................... 83 INT_SetAck ............................................. 64
DBG_DisplayOn .................................... 83 INT_SetFunc ........................................... 65
DBG_GetKeyStr ..................................... 84 INT_SetMsk ............................................ 63
DBG_Initial ............................................. 82 INT_SetScuFunc ..................................... 66
DBG_Monitor ......................................... 85
DBG_Printf ............................................. 84
DBG_SetCursor ...................................... 83 M
DMA_CpuAllStop ................................. 49
MEM_Calloc ........................................... 67
DMA_CpuGetComStatus ..................... 49
MEM_Free ............................................... 68
DMA_CpuGetStatus ............................. 49
MEM_Init ................................................ 67
DMA_CpuMemCopy 1 ......................... 44
MEM_Malloc .......................................... 68
DMA_CpuMemCopy 16 ....................... 45
MEM_Realloc ......................................... 68
DMA_CpuMemCopy 2 ......................... 44
DMA_CpuMemCopy 4 ......................... 45
DMA_CpuResult ................................... 46
P
DMA_CpuSetComPrm ......................... 48
DMA_CpuSetPrm .................................. 48 PCM_Change ....................................... 124
DMA_CpuStart ...................................... 48 PCM_CHANGE_~ ............................... 114
DMA_CpuStop ...................................... 49 PCM_ChangePcmPara ........................ 126
DMA_ScuAllStop .................................. 47
Program Library User's Guide 3 131
PCM_CheckChange ............................ 124 S
PCM_CreateGfsHandle ...................... 121
SND_ChgEfct ......................................... 24
PCM_CreateMemHandle ................... 121
SND_ChgMap ........................................ 24
PCM_CreateStmHandle ..................... 122
SND_ChgMix ......................................... 24
PCM_DeclareUseAdpcm .................... 120
SND_ChgMixPrm .................................. 25
PCM_DestroyGfsHandle .................... 121
SND_ChgPcm ........................................ 28
PCM_DestroyMemHandle ................. 121
SND_ChgTempo .................................... 27
PCM_DestroyStmHandle ................... 122
SND_ChkHard ....................................... 25
PCM_EntryNext ................................... 124
SND_ContSeq ......................................... 26
PCM_ERR_~ ......................................... 113
SND_CtrlDirMidi .................................. 25
PCM_Finish .......................................... 120
SND_GET_ENA_INT ............................ 22
PCM_GetErr ......................................... 130
SND_GET_INT_STAT ........................... 30
PCM_GetPlayStatus ............................ 129
SND_GetAnlHzVl ................................. 31
PCM_GetTime ...................................... 129
SND_GetAnlTlVl ................................... 31
PCM_GetWriteBuf ............................... 129
SND_GetPcmPlayAdr ........................... 30
PCM_Init ............................................... 120
SND_GetSeqPlayPos ............................. 30
PCM_NotifyWriteSize ......................... 129
SND_GetSeqStat .................................... 30
PCM_Pause ........................................... 123
SND_Init ................................................. 21
PCM_PAUSE_~ .................................... 114
SND_MoveData ..................................... 23
PCM_SetErrFunc ................................. 130
SND_PauseSeq ....................................... 26
PCM_SetInfo ......................................... 128
SND_RESET_INT .................................. 22
PCM_SetLoadNum ............................. 125
SND_SET_ENA_INT ............................. 21
PCM_SetPan ......................................... 125
SND_SET_FCT_INT .............................. 22
PCM_SetPauseWork ............................ 127
SND_SetCdDaLev ................................. 29
PCM_SetPcmCmdBlockNo ................ 126
SND_SetCdDaPan ................................. 29
PCM_SetPcmStreamNo ...................... 127
SND_SetSeqVl ........................................ 27
PCM_SetTrModeCd ............................ 128
SND_SetTlVl ........................................... 24
PCM_SetVolume .................................. 126
SND_StartPcm ........................................ 28
PCM_Start ............................................. 123
SND_StartSeq ......................................... 26
PCM_STAT_PLAY_~ ........................... 114
SND_StartVlAnl ..................................... 27
PCM_Stop ............................................. 123
SND_StopPcm ........................................ 28
PCM_Task ............................................. 122
SND_StopSeq ......................................... 26
PCM_TRMODE_~ ............................... 115
SND_StopVlAnl ..................................... 29
PCM_VblIn ........................................... 122
SndAreaMap .......................................... 10
PcmCreatePara ..................................... 116
SndCdHzSrVl ......................................... 19
PcmErrFunc .......................................... 117
SndEfctBnkNum .................................... 11
PcmHn ................................................... 116
SndEfctOut .............................................. 12
PcmInfo ................................................. 117
SndFade ................................................... 15
SndHardPrm .......................................... 13
SndHardStat ........................................... 13
SndIniDt .................................................. 10
SndLev ..................................................... 12
132
SndMixBnkNum .................................... 11 TIM_T0_Set_Cmp .................................. 74
SndPan .................................................... 12 TIM_T1_Disable ..................................... 73
SndPcmChgPrm ..................................... 18 TIM_T1_Enable ...................................... 73
SndPcmIntStat ........................................ 19 TIM_T1_Set_Data .................................. 74
SndPcmPlayAdr ..................................... 18 TIM_T1_Set_Mode ................................ 74
SndPcmStartPrm .................................... 17
SndRet ..................................................... 13
SndSeqBnkNum ..................................... 14
SndSeqNum ............................................ 14
SndSeqPlayPos ....................................... 16
SndSeqPri ................................................ 14
SndSeqSongNum ................................... 14
SndSeqStat .............................................. 16
SndSeqVl ................................................. 15
SndTempo ............................................... 15
SndTlVl .................................................... 11
SndToneBnkNum .................................. 11
TIM_Frt_Cnt_To_Mcr ............................ 76
TIM_Frt_Delay_16 ................................. 76
TIM_Frt_Get_16 ..................................... 75
TIM_Frt_Get_Frc .................................... 79
TIM_Frt_Get_Icra .................................. 80
TIM_Frt_Get_Ocra ................................. 79
TIM_Frt_Get_Ocrb ................................ 79
TIM_Frt_Get_Tcr .................................... 79
TIM_Frt_Get_Tcsr .................................. 78
TIM_Frt_Get_Tier .................................. 78
TIM_Frt_Get_Tocr .................................. 80
TIM_Frt_Init ........................................... 75
TIM_Frt_Mcr_To_Cnt............................ 76
TIM_Frt_Set_16 ...................................... 75
TIM_Frt_Set_Frc ..................................... 77
TIM_Frt_Set_Ocra .................................. 77
TIM_Frt_Set_Ocrb ................................. 77
TIM_Frt_Set_Tcr ..................................... 78
TIM_Frt_Set_Tcsr ................................... 77
TIM_Frt_Set_Tier ................................... 76
TIM_Frt_Set_Tocr .................................. 78
TIM_T0_Disable ..................................... 73
TIM_T0_Enable ...................................... 73
Program Library User's Guide 3 133
TM
Program Library
User's Guide 2
Graphics Library
Doc. # ST-157-R1-092994
VDP 1 Library...................................... 1
VDP 2 Library.................................... 45
Number Calculation Library ........... 87
DSP I/F Library .............................. 107
© 1994-95 SEGA. All Rights Reserved.
(This page is blank in the original Japanese document.)
i
Contents
VDP1 Library...................................................................................................................... 1
1.0 VDP1 Basic Processing Guide ........................................................................ 1
1.1 Objective...................................................................................................... 1
1.2 Explanation ................................................................................................. 1
1.3 Example of a Program Description ......................................................... 2
2.0 VDP1 Expanded Processing Guide ............................................................... 4
2.1 Objective...................................................................................................... 4
2.2 How to Control the VRAM Area ............................................................. 4
2.3 Drawing Order to the Sprite Command Frame Buffer ........................ 6
2.4 Example of a Program Description ......................................................... 7
3.0 VDP1 3D Guide ................................................................................................ 9
3.1 Objective...................................................................................................... 9
3.2 3D Coordinate System and Display Model ........................................... 9
3.3 Example of a Program Description ......................................................... 10
3.4 Polygon Objects that Connect Between Objects ................................. 13
4.0 VDP1 Basic Processing Reference.................................................................. 15
4.1 Data Specifications .................................................................................... 15
4.2 List of Functions ......................................................................................... 15
4.3 Function Specifications ............................................................................. 16
5.0 VDP1 Expanded Processing Reference......................................................... 19
5.1 Data Specifications .................................................................................... 19
5.2 List of Functions ......................................................................................... 21
5.3 Function Specifications ............................................................................. 22
6.0 VDP1 3D Reference ......................................................................................... 32
6.1 Data Specifications .................................................................................... 32
6.2 List of Functions ......................................................................................... 37
6.3 Function Specifications ............................................................................. 37
VDP2 Library...................................................................................................................... 45
1.0 Guide ................................................................................................................. 45
1.1 Objective...................................................................................................... 45
1.2 Explanation ................................................................................................. 45
1.3 Basic Library Usage ................................................................................... 48
2.0 Reference .......................................................................................................... 55
2.1 Data Specifications .................................................................................... 55
2.2 List of Functions ......................................................................................... 63
2.3 Function Specifications ............................................................................. 65
ii
Mathmatical Calculation Library .................................................................................... 87
1.0 Guide ................................................................................................................. 87
1.1 Objective...................................................................................................... 87
2.0 Reference .......................................................................................................... 89
2.1 Data Specifications .................................................................................... 89
2.2 List of Functions ......................................................................................... 91
2.3 Function Specifications ............................................................................. 93
DSP I/F Library ................................................................................................................. 107
1.0 Guide ................................................................................................................. 107
1.1 Objective...................................................................................................... 107
1.2 Overview ..................................................................................................... 107
1.3 Function Overview .................................................................................... 107
1.4 Calling Sequence ........................................................................................ 108
2.0 Reference .......................................................................................................... 109
2.1 List of Functions ......................................................................................... 109
2.2 Function Specifications ............................................................................. 109
iii
VDP1 Library
1.0 VDP1 Basic Processing Guide
1.1 Objective
· Hides hardware-related processing such as VDP1 initialization, register operation,
etc., to reduce the load on the application author.
· Because of differences in processing methods used to speed up applications, the
basic processing library does not write commands to VRAM. The application has
the VRAM addresses, so these can be controlled and written on the application
side.
(Writing to VRAM and VRAM control is supported by the expanded processing
library.)
1.2 Explanation
Initial Processing
· Sets the frame buffer erase area, erase data for each frame change, and the TV
mode.
V-BLANK Interrupt Processing Function
· SPR_WaitDrawEnd () is used in the V_BLANKVDP interrupt routine to check for
VDP1 draw end.
User's Guide 2 Graphics Library 1
1.3 Example of a Program Description
#include <machine.h>
#include “sega_spr.h”
#include “sega_scl.h”
#include “sega_int.h”
extern void vbStart (void);
extern void vbEnd (void);
main()
{
Uint8
set_imask(0);
SCL_Vdp2Init();
SCL_SetPriority(SCL_SP0|SCL_SP1|SCL_SP2|SCL_SP3|SCL_SP4|
SCL_SP5|SCL_SP6|SCL_SP7,7);
SCL_SetSpriteMode(SCL_TYPE1,SCL_MIX,SCL_SP_WINDOW);
SPR_Initial(&vram);
INT_ChgMsk(INT_MSK_NULL, INT_MSK_VBL_IN | INT_MSK_VBL_OUT);
/* Disable V-BLANK Interrupt
INT_SetFunc(INT_SCU_VBLK_IN, &vbStart);
/* Register V-BLANK IN Interrupt Routine*/
INT_SetFunc(INT_SCU_VBLK_OUT, &vbEnd);
/* Register V-BLANK OUT Interrupt Routine*/
INT_ChgMsk(INT_MSK_VBL_IN | INT_MSK_VBL_OUT, INT_MSK_NULL);
/* Enable V-BLANK Interrupt
SCL_SetFrameInterval(2);
/* 2/60 seconds
for(;;) |
memcpy(vram,command,sizeof(command));
/* Set the Sprite Command in VRAM
————
SCL_DisplayFrame();
/* Display Sprite and Move Scroll
}
}
2
- V-Blank Processing Routine (Separate source file from the main shown on previous
page.) -
#include <machine.h>
#include “sega_spr.h”
#include “sega_scl.h”
#pragma interrupt(VbStart)
#pragma interrupt(VbEnd)
void VbStart(void)
{
SCL_VblankStart(); /* V-Blank Start VDP Interrupt Processing */
————
}
void VbEnd(void)
{
SCL_VblankEnd();
————
}
User's Guide 2 Graphics Library 3
2.0 VDP1 Expanded Processing Guide
2.1 Objective
· Supports functions that were not included in the basic processing library such as
VRAM management and writing sprite commands to VRAM.
· Executes a primitive sprite display command that corresponds to the sprite
command.
2.2 How to Manage the VRAMArea
The VRAM area (512Kbyte) is assigned as shown below.
00000H VRAM Area Reference Switch Command
System Command Area
User Command Area
Gouraud Shading Table Area
Color Lookup Table
Block Pool Area
(Character, Subroutine Command)
80000H
Explanation of EachArea
· VRAM Area Reference Switch Command
Sprite jump command that is used to match the VRAM area 0, 1 for frame change.
· System Command Area
This area is used to open the access routine used to erase the frame buffer with
polygon draw when the frame change interval is insufficient. Areas 0 and 1 are
the same size.
· User Command Area
Area where sprite commands organized from the top down through the various
command set routines called from the SPR_2OpenCommand() to the
SPR_2CloseCommand() routine. Areas 0 and 1 are the same size.
4
· Gouraud Shading Table Area
Area that stores the Gouraud shading table with 8 bytes for each entry and controls
numbers starting at 0. Areas 0 and 1 are the same size.
· Color Lookup Table Area
Area that stores the Color Lookup table with 8 bytes for each entry and controls
numbers starting at 0. Areas 0 and 1 are the same size. Areas 0 and 1 are referenced
commonly.
· Block Pool Area
Area that is referenced by both command areas 0 and 1 and contains character data
and sub-routine commands, etc. (Subroutine commands are currently not
supported.) Character data is controlled starting at number 0. The assigning of
character data, etc., to this area is dynamically acquired and released in 32 byte
blocks.
The Assigned Size of EachArea
The size of each area is assigned as shown below; one block is 32 bytes.
Area Name Blocks
VRAM Area Reference Switch Command 1
System Command Area 4x2
User Command Area COMMAND_MAX x2
Gouraud Shading Table Area (GOUR_TBL_MAX+3)/4x2
Color Lookup Table Area LOOKUP_TBL_MAX
Block Pool Area All remaining blocks
COMMAND_MAX : Maximum number of commands
GOUR_TBL_MAX : Maximum number of Gouraud shading tables
LOOKUP_TBL_MAX : Maximum number of lookup tables
These values are defined later in the VDP1 expanded processing work area
definition macro.
Block Assign Algorithm Inside the Block Pool
Area
• When Acquiring
Searches for a contiguous block that will hold the block that is being requested and
assigns it the minimum area.
• When Releasing
Releases the designated block area. If there is an empty block next to the block being
released, both blocks are combined to form a large empty block.
User's Guide 2 Graphics Library 5
2.3 Drawing Order to the Sprite Command Frame Buffer
The drawing order can be set for each command by setting the draw priority value
when the sprite command set routines below are called up.
SPR_2LocalCoord() SPR_2SysClip() SPR_2UserClip() SPR_2line()
SPR_2polyLine() SPR_2Polygon() SPR_2NormSpr() SPR_2ScaleSpr()
SPR_2DistSpr() SPR_2Cmd()
The draw priority number indicates the draw block number. Block number 0 is
drawn first. Also, commands within the blocks are drawn in the order they were
recorded.
Priority Number
Command Registered Order
0 Block 0
1 Block 1
Drawing Order 2 Block 2
Block n
n
The drawing order is set by calling up the SPR_2CloseCommand() or
SPR_2FlushDrawPrty() routines. The control word jump and link settings in the
command can be changed here.
The number of blocks in the draw order number control block are set in advance. It
can be set in the 2D work area definition or the SPR_2OpenCommand () if the draw
area is not to be attached.
6
2.4 Example of a Program Description
An actual example program in C language is shown below.
#include machine.h>
#define _SPR2_
#include “sega_spr.h”
#include “sega_scl.h”
#include “sega_int.h
#define COMMAND_MAX
#define GOUR_TBL_MAX
#define LOOKUP_TBL_MAX
#define CHAR_MAX
#define DRAW_PRTY_MAX 256
SPR_2DefineWork(work2d, COMMAND_MAX, GOUR_TBL_MAX,
LOOKUP_TBL_MAX, CHAR_MAX)
/* Define 2D Work Area
extern void vbStart(void);
extern void vbEnd(void);
main()
{
set_imask(0);
SCL_Vdp2Init();
SCL_SetPriority(SCL_SP0|SCL_SP1|SCL_SP2|SCL_SP3|SCL_SP4|
SCL_SP5|SCL_SP6|SCL_SP7,7);
SCL_SetSpriteMode(SCL_TYPE1,SCL_MIX,SCL_SP_WINDOW);
SPR_2Initial(&work2d);
INT_ChgMsk(INT_MSK_NULL, INT_MSK_VBL_IN | INT_MSK_VBL_OUT);
/* Disable V-BLANK Interrupt
INT_SetFunc(INT_SCU_VBLK_IN, &vbStart);
/* Register V-BLANK IN Interrupt Routine*/
INT_SetFunc(INT_SCU_VBLK_OUT, &vbEnd);
/* Register V-BLANK OUT Interrupt Routine*/
INT_ChgMsk(INT_MSK_VBL_IN | INT_MSK_VBL_OUT, INT_MSK_NULL);
/* Enable V-BLANK Interrupt
for(;;) {
SPR_2SetChar(...);
}
SPR_2FrameChgIntr(0xffff); /* Set the Frame Change Interval */
/* to Undefined
for(;;) {
——————
SPR_2OpenCommand(SPR_2DRAW_PRTY_OFF);
/* Open Command Write
SPR_2SysClip(0,&xy);
SPR_2LocalCoord(0,&xy); /* Local Coordinates Command
User's Guide 2 Graphics Library 7
SPR_2Polygon(...); /* Each Type of Sprite Command */
SPR_2NormSpr(...); /*
.
.
.
SPR_2CloseCommand() ; */
SCL_DisplayFrame() ; */
/* Display Sprite and Move Scroll */
}
}
- V Blank Process Routine (The main above is a separate source file) -
#include machine.h>
#include “sega_spr.h”
#include “sega_scl.h”
#pragma interrupt (VbStart)
#pragma interrupt (VbEnd)
void VbStart(void)
{
SCL_VblankStart(); /* VBlank start VDP Intrrpt. Process*/
———— /* Other VBlank Start Processes */
}
void VbEnd(void)
{
SCL_VblankEnd(); /* VBlank End VDP Interrupt Process */
————
}
8
3.0 VDP1 3D Guide
3.1 Objective
The purpose here is to use the VDP1 expansion processing library to display 3D
sprites.
· Handles layers of connected models that consist of groupings of polygons.
· There is no need to understand the matrix calculations that accompany the
movement of models or the objects within a model.
· The user application is made aware of the coordinate value of the point after
world coordinates have been converted through the user call back routine.
· Texture mapping and sprite coloring during display can also be applied to polygons.
· Can be matched with 2D sprites when displayed.
3.2 3D Coordinate System and Display Model
Coordinate System
View Point
y 0
World Coordinates
Light Source
View Point
Coordinate System
Model
screen
-z
Object
0
0 1
x
y
z
z 0
x
Body Coordinate System
Distance from the screen to the view point is fixed at 1.0.
User's Guide 2 Graphics Library 9
[Display Model]
The display model is a grouping of polygons connected in a layered cluster as an object.
Clusters have a mother/child-type relationship: the position of the object that is the child
cluster is placed in the mother cluster body coordinate system. For this reason, when the
mother cluster is moved, all of the child clusters move along with it.
Object 1
Object 0 Cluster 10
Cluster 00 Cluster 11
Root Cluster
Cluster 20
Cluster 12
Cluster 21
3.3 Example of a Program Description
An actual example program in C language is shown below.
#include <machine.h>
#define _SPR3_
#define SPR_3USE_DOUBLE_BUF
#include “sega_spr.h”
#include “sega_scl.h”
#include “sega_int.h
SprCluster mode10;
SprCluster mode11;
#define COMMAND_MAX 1000
#define GOUR_TBL_MAX 1000
#define LOOKUP_TBL_MAX 1000
#define CHAR_MAX
#define DRAW_PRTY_MAX 256
SPR_2DefineWork(work2d, COMMAND_MAX, GOUR_TBL_MAX,
LOOKUP_TBL_MAX, CHAR_MAX, DRAW_PRTY_MAX)
/* Define 2D Work Area
#define OBJ_SURF_MAX 16
#define OBJ_VERT_MAX 16
SPR_3DefineWork(work3D, OBJ_SURF_MAX, OBJ_VERT_MAX)
/* Defines the 3D Work Area
10
extern void vbStart(void);
extern void vbEnd(void);
main()
{
set_imask(0);
SCL_Vdp2Init();
SCL_SetPriority(SCL_SP0|SCL_SP1|SCL_SP2|SCL_SP3|SCL_SP4|
SCL_SP5|SCL_SP6|SCL_SP7,7);
SCL_SetSpriteMode(SCL_TYPE1,SCL_MIX,SCL_SP_WINDOW);
SPR_2Initial(&work2d);
SPR_3Initial(&work3D);
INT_ChgMsk(INT_MSK_NULL, INT_MSK_VBL_IN | INT_MSK_VBL_OUT);
/* Disable V-BLANK Interrupt
INT_SetFunc(INT_SCU_VBLK_IN, &vbStart);
/* Register V-BLANK IN Interrupt Routine*/
INT_SetFunc(INT_SCU_VBLK_OUT, &vbEnd);
/* Register V-BLANK OUT Interrupt Routine*/
INT_ChgMsk(INT_MSK_VBL_IN | INT_MSK_VBL_OUT, INT_MSK_NULL);
/* Enable V-BLANK Interrupt
SPR_2FrameChgIntr(0xffff); /* Set the Frame Change Interval
/* to Undefined
SPR_3SetTexture(texture); /* Set the 3D Texture Data
for(;;) {
——————
SPR_3SetLight(...);
SPR_3SetView(...);
SPR_2OpenCommand(SPR_2DRAW_PRTY_ON);
/* Open Sprite Command Write
SPR_2SysClip(SPR_2MOST_FAR,&xy);
/* System Clip Area Command
SPR_2LocalCoord(SPR_2MOST_FAR+1,&xy);
/* Local Coordinates Command
SPR_3moveCluster(mode10,...);/* Move Root Cluster of 3D model 0*/
SPR_3DrawMode1(mode10,...); /* Register 3D Model 0
SPR_3moveCluster(mode11,...);/* Move Root Cluster of 3D model 1*/
SPR_3DrawMode1(mode11,...); /* Register 3D Model 1
.
.
.
SPR_3Flush();
SPR_2CloseCommand() ;
SCL_DisplayFrame() ;
/* Display Sprite and Move Scroll
}
}
User's Guide 2 Graphics Library 11
• V Blank Process Routine (The main above is a separate source file) -
#include <machine.h>
#include “sega_spr.h”
#include “sega_scl.h
#pragma interrupt (VbStart)
#pragma interrupt (VbEnd)
void VbStart(void)
{
SCL_VblankStart(); /* V Blank start VDP Interrupt Process */
———— /* Other VBlank Start Processes */
}
void VbEnd(void)
{
SCL_VblankEnd(); /* VBlank End VDP Interrupt Process */
———— /* Other VBlank End Processes */
}
Polygon Z sort in the view coordinate system of the sprite 3D display library uses the
sprite priority draw function of the VDP1 expansion library (2D library). To execute
Z sort, priority draw in the SPR_2OpenCommand() routine must be set to on
(SPR_2DRWA_PRTY_ON).
12
3.4 Polygon Objects That Connect Between Objects
When Object2 needs to be changed to accomodate the movement of Object1, as
shown in the figure below, define the polygon between Object0 and Object1 (Ob-
ject2) as an inbetween-object polygon and the shape changes are automatically
drawn.
1
2
Object Movement
0 6
Object1 5 3
Object1
0
4
Object2 Object2 1
7
2 4 5
0 1
Object0 Object0
6
4 5
The different tables that contain the cluster, object and inbetween-object polygon
information are connected as shown below.
child
Cluster0 Cluster1
InbetInf0 InbetInf1
Object0 Object1
Object2
InbetInf: Inbetween object polygon information
User's Guide 2 Graphics Library 13
• Processing the Inbetween-object Polygon Object
1) Objects are drawn in order from the parent cluster to the child cluster; if there is
more than one object in a cluster, they are drawn in the order they were connected.
In the previous example, objects would be drawn in order of Object0, Object1,
Object2.
2) If there is inbetween-object polygon information connected to the cluster, the
inbetween-object polygon object vector data table is set using the corresponding
vector data converted from the focal point coordinate system in the set table.
If there is Gouraud shading, the calculated vector brightness is set into the
inbetween-object polygon normal vector line data table. In the previous example,
InbetInf0 sets the focal coordinate system vector data (0, 1, 2, 3) to Object2 vector
data (4, 5, 6, 7); InbetInf1 sets the focal coordinate system vector data (4, 5, 6, 7) to
Object2 vector data (0, 1, 2, 3).
3) If the draw object is an inbetween-object polygon, the normal vector for each
surface is found after conversion to the focal coordinate system, and the object is
drawn according to the draw mode. In the previous example, Object2 is the
inbetween-object polygon object.
4) Conditions for setting the inbetween-object polygon.
· If set as one of a cluster, connect it last in the object chain.
· The normal vector calculation correction value in the object table is set as a
negative value.
14
4.0 VDP1 Basic Processing Reference
4.1 Data Specifications
Title Data Data Name No
Data Specification Status Return Area Pointer SPR_SpStatus
typedef struct SprSpStatus {
Uint16 frameChgMode; /* Frame Change Mode *1 */
Uint16 frameEraseMode; */
Uint16 vbInterval; /* V-BLANK Intervals */
Uint16 eraseData; /* Frame Buffer Erase Data */
Uint16 eraseLeftX; /* Frame Buffer Erase Left Side */
Uint16 eraseTopY; /* Frame Buffer Erase Top */
Uint16 eraseRightX; /* Frame Buffer Erase Right Side */
Uint16 eraseBotY; /* Frame Buffer Erase Bottom */
} SprSpStatus;
*1 Frame change Mode
#define AUTO_FRAME_CHG 0 /* Auto Change */
#define MANUAL_FRAME_CHG 1 /* Manual Change at Fixed Interval */
#define NO_INTERVAL_FRAME_CHG 2 /* Manual Change at Undefined Interval */
#define NO_INTER_VBE_FRAME_CHG 3 /* Undefined by Vblank erase */
/* Interval Manual Change */
*2 Frame Erase Mode
#define OFF 0 /* Frame Erase OFF */
#define ON 1 /* Frame Erase ON */
4.2 List of Functions
Function Function Name Number
Initialize the VDP1 basic process library SPR_Initial 1
Set TV Mode SPR_SetTvMode 2
Get the Current Sprite Control Information SPR_GetStatus 3
Set the Frame Buffer Erase Area, Erase data SPR_SetEraseData 4
Check the Frame Buffer Draw End SPR_WaitDrawEnd 5
Set the Sprite Draw Source Coordinate Select Mode SPR_SetEosMode 6
System Register Write Macro SPR_WRITE_REG 7
System Register Read Macro SPR_READ_REG 8
User's Guide 2 Graphics Library 15
4.3 Function Specifications
Title Function Function Name No
Function Specification Initialize the VDP1 basic process library SPR_Initial 1
Format void SPR_Initial(Uint8 **vram)
Input vram :VRAM address return area pointer
Output None
Function Value None
Function Sets the following values as default
· Erase Data = 0x8000 (Black)
· Erase Area = (0, 0) - (319,223)
· TV mode is normal, resolution is 320 X 224
Title Function Function Name No
Function Specification TV Mode Set SPR_SetTvMode 2
Format void Spr_SetTvMode(Uint16 mode, Uint16 screenSize,
Uint16 doubleInterlace)
Input mode : The following TV mode definition values can be set.
SPR_TV_NORMAL = Normal Mode
SPR_TV_HIREZ0 = Hi Resolution Mode
SPR_TV_R0T16 = Rotate 16 Mode
SPR_TV_R0T8 = Rotate 8 Mode
SPR_TV_HDTV = HDTV Mode
screenSize : Sets the screen size that corresponds to the TV
mode from the definition values shown below.
See the VDP1 manual for detailed configurations.
SPR_TV_320X224 = 320 x 224
SPR_TV_320X240 = 320 x 240
SPR_TV_352X224 = 352 x 224
SPR_TV_352X240 = 352 x 240
SPR_TV_640X224 = 640 x 224
SPR_TV_640X240 = 640 x 240
SPR_TV_704X224 = 704 x 224
SPR_TV_704X240 = 704 x 240
doubleInterlace : Sets the double interlace mode.
ON = Use the double interlace mode.
OFF = Do not use the double interlace mode.
Output None
Function Value None
Function Sets the TV Mode.
16
Title Function Function Name No
Function Specification Get the Current Sprite Control Information SPR_GetStatus 3
Format void SPR_GetStatus(SprSpStatus *spStatus)
Input None
Output SprSpStatus: Status return area pointer
Function Value None
Function Gets the sprite control information.
Title Function Function Name No
Function Specification Set the Frame Buffer Erase Area, Erase data SPR_SetEraseData 4
Format void SPR_SetEraseData(Uint16 eraseData, Uint16 leftX,
Uint16 topY, Uint16 rightX, Uint16 botY)
Input eraseData: RGB erase data
leftX : Left erase X coordinates
topY : Top erase Y coordinates
rightX : Right erase X coordinates
botY : Bottom erase Y coordinates
Output None
Function Value None
Function Used to set what color and what area is erased in the erase
process.
Title Function Function Name No
Function Specification Check the Frame Buffer Draw End SPR_WaitDrawEnd 5
Format void SPR_WaitDrawEnd(void)
Input None
Output None
Function Value None
Function Waits for the VDP1 to finish drawing to the frame buffer. This
routine is called from the V-BLANK VDP interrupt process
routine.
User's Guide 2 Graphics Library 17
Title Function Function Name No
Function Specification Set the Sprite Draw Source SPR_SetEosMode
6
Coordinate Select Mode
Format void SPR_SetEosMode(Sint32 eosFlag)
Input eosFlag : 0= Sampling of even coordinates (default)
1= Sampling of odd coordinates
Output None
Function Value None
Function Sets the source picture texture sampling coordinate mode with
the sprite command draw mode when high speed draw is set.
Title Function Function Name No
Function Specification System Register Write Macro SPR_WRITE_REG 7
Format SPR_WRITE_REG(Uint16 reg, Uint16 val)
Input reg : Sets the system register type from the definitions
listed below.
SPR_W_TVMR = Select TV Mode
SPR_W_FBCR = Frame Buffer Change Mode
SPR_W_PTMR = Plot Trigger
SPR_W_EWDR = Erase Write Data
SPR_W_EWLR = Erase Write Upper Left Coordinate
SPR_W_EWRR = Erase Write Lower Right Coordinate
SPR_W_EWDR = End Draw
Value: Write value
Output None
Function Value None
Function Writes to the VDP1 dedicated write system register.
Title Function Function Name No
Function Specification System Register Read Macro SPR_READ_REG 8
Format Uint16 val = SPR_READ_REG(Uint16 reg)
Input reg : Sets the system register type from the definitions
listed below.
SPR_R_EDSR = Transfer End State
SPR_R_LOPR = Process Interrupt Table Address
SPR_R_COPR = Current Process Table Address
SPR_R_MODR = Mode Status
Output None
Function Value val : Read Value
Function Reads the register value from the VDP1 dedicated read system
register.
18
5.0 VDP1 Expanded Processing Reference
5.1 Data Specifications
Title Data Data Name No
Data Specification Coordinate Indicator Data Type XyInt
Defined in sega_def.h
typedef struct XyInt {
Sint16 x;
Sint16 y;
} XyInt;
Title Data Data Name No
Data Specification Gouraud Shading Table SprGourTbl
typedef struct SprGourTbl {
Uint16 entry[4];
} SprGourTbl;
Title Data Data Name No
Data Specification Lookup Table Data Type SprLookupTbl
typedef struct SprLookupTbl {
Uint16 entry[16];
} SprLookupTbl;
Title Data Data Name No
Data Specification VRAM for Sprite Command Relative
SprVaddr
Address Data Type
typedef Uint16 SprVaddr;
User's Guide 2 Graphics Library 19
Title Data Data Name No
Data Specification Sprite Command Data Types SprSp Cmd
typedef struct SprSpCmd {/* Sprite Command Table */
Uint16 control; /* control word */
Uint16 link; /* command link */
Uint16 drowMode; /* drow mode */
Uint16 color; /* color info. */
Uint16 charAddr; /* character address */
Uint16 charSize; /* character size */
Sint16 ax; /* point A x */
Sint16 ay; /* point A y */
Sint16 bx; /* point B x */
Sint16 by; /* point B y */
Sint16 cx; /* point C x */
Sint16 cy; /* point C y */
Sint16 dx; /* point D x */
Sint16 dy; /* point D y */
Uint16 grshAddr; /* goouraud shading table address*/
Uint16 dummy; /* dummy area */
} SprSpCmd;
20
5.2 List of Functions
Function Function Name Number
VDP1 Expansion Processing Work Area Definition Macro SPR_2DefineWork 1
Initializing Process for the VDP1 Expansion Processing SPR_2Initlial 2
Library
Set the TV Mode SPR_2SetTvMode 3
Set Frame Change V-Blank Interval Count SPR_2FrameChgIntr 4
Set Frame Buffer Erase Data SPR_2FrameEraseData 5
Set the Gouraud Shading Table SPR_2SetGourTbl 6
Set the Lookup Table SPR_2SetLookupTbl 7
Set Characters SPR_2SetChar 8
Clear Character Area SPR_2ClrChar 9
Clear All Character Area SPR_2ClrAllChar 10
Convert Gouraud Shading Table Number to VRAM Address SPR_2GourToVRAM 11
Convert Lookup Table Number to VRAM Address SPR_2LookupTblNoToVRAM 12
Convert Character Number to VRAM Address SPR_2CharNoToVRAM 13
Open Command Write Processing SPR_2OpenCommand 14
Close Command Write Processing SPR_2CloseCommand 15
Set Local Coordinates SPR_2LocalCoord 16
Set the System Clipping Area SPR_2SysClip 17
Set the User Clipping Area SPR_2UserClip 18
Draw Line SPR_2Line 19
Draw Polyline SPR_2PolyLine 20
Draw Polygon SPR_2PolyGon 21
Draw Normal Sprite SPR_2NormSpr 22
Draw Scaled Sprite SPR_2ScaleSpr 23
Draw Distorted Sprite SPR_2DistSpr 24
Set Command SPR_2Cmd 25
Flush the Command Draw Priority Chain SPR_2FlushDrawPrty 26
Allocate VRAM Block area (static) SPR_2AllocBlock 27
Free VRAM Block Area (static) SPR_2FreeBlock 28
User's Guide 2 Graphics Library 21
5.3 Function Specifications
Title Function Function Name No
Function Specification VDP1 Expansion Processing Work Area 1
SPR_2DefineWork
Definition Macro
Format SPR_2DefineWork( WORK2D, COMMAND_MAX, GOUR_TBL_MAX,
LOOKUP_TBL_MAX, CHAR_MAX, DRAW_PRY_MAX)
Input WORK2D : Work Area Name
COMMAND_MAX : Maximum Commands
GOUR_TBL_MAX : Maximum Gouraud Shading Tables
LOOKUP_TBL_MAX : Maximum Lookup Tables
CHAR_MAX : Maximum Characters (> 0)
DRAW_PRTY_MAX : Maximum Draw Priority Blocks (>0)
Output None
Function Value None
Function Defines the work area used by VDP1 expanded processing in
the AP data area. When DRAW_PRTY_MAX=1, command
draw priority is not added.
Title Function Function Name No
Function Specification Initializing Process for the VDP1 Expansion 2
SPR_2Initial
Processing Library
Format void SPR_2Initial(Spr2WorkArea *workArea)
Input workArea : Work Area Definition Table
Output None
Function Value None
Function Calls up the initializing routine from the VDP1 basic processing
library and, after initializing the display environment, initializes
the work area for this library.
Title Function Function Name No
Function Specification Set the TV Mode SPR_2SetTvMode 3
Format void Spr_2SetTvMode(Uint16 mode, Uint16 screenSize,
Uint16 doubleInterlace)
Input mode : Sets the definition value for the TV mode.
screenSize : Sets the definition value for the screen
resolution that matches the TV mode.
doubleInterlace : Sets the double interlace mode.
Output None
Function Value None
Function Same as the VDP1 basic processing library TV mode set
routine.
22
Title Function Function Name No
Function Specification Set Frame Change V-Blank Interval Count SPR_2FrameChgIntr 4
Format void SPR_2FrameChgIntr(Uint16 interval)
Input interval : V-BLANK interval count
Output None
Function Value None
Function Set the frame change V-BLANK interval count.
The interval values have different meanings as shown below.
0 = Sets the frame change mode to auto change mode and the
intervals to 1. Cannot be sychornized with SCL_DisplayFrame ().
1 = Sets the frame change mode to auto change mode and the
intervals to 1. Can be sychornized with SCL_DisplayFrame ().
0xffff = Does polygon draw frame erase-write inthe undefined interval
manual change mode.
0xfffe = The V-BLANK undefined interval manual change mode. The
user polygon erase-write function is be used for areas not erased.
Changes the frame without confirming VDP1 draw end.
Other = Fixed interval manual change mode defined by setting the
interval count.
b14=0: Does erase-write
=1: Does not do erase-write.
Calls up the SCL_SetFrameInterval () routine.
Title Function Function Name No
Function Specification Set Frame Buffer Erase Data SPR_2FrameEraseData 5
Format void SPR_2FrameEraseData(Uint16 rgbColor)
Input rgbColor : Erase data (RGB color)
Output None
Function Value None
Function Sets the color to be painted over the erased area in the erase processing.
Title Function Function Name No
Function Specification Set the Gouraud Shading Table SPR_2SetGourTbl 6
Format void SPR_2SetGourTbl(Uint16 gourTblNo, SprGourTbl
*gourTbl);
Input gourTblNo : Gouraud shading table number
gourTbl : Gouraud shading table
Output None
Function Value None
Function Copies the contents of the designated Gouraud shading table to
the Gouraud shading table area in VRAM.
User's Guide 2 Graphics Library 23
Title Function Function Name No
Function Specification Set the Lookup Table SPR_2SetLookupTbl 7
Format void SPR_2SetlookupTbl(Uint16 LookupTblNo, SprLookupTbl
*lookupTbl)
Input LookupTblNo : Lookup table number
LookupTbl : Lookup table
Output None
Function Value None
Function Copies the contents of the designated lookup table to the
lookup table area in VRAM.
Title Function Function Name No
Function Specification Set Characters SPR_2SetChar 8
Format void SPR_2SetChar(Uint16 charNo, Uint16 colorMode,
Unit16 color, Ui nt 16 wi dth, Uni t 16 height , Ui nt 8 *cha r I mage)
Input charNo : Character Number
colorMode : Color Mode (b5~b3: Same in draw mode word)
color : Color data
When color mode = 1, lookup table number.
When color mode = 0, 2, 3, 4, color bank code.
When color mode = 5, it is ignored.
width : X size
height : Y size
charImage : Character data pointer
When = 0, only aquires the character area,
Output None
Function Value None
Function When the designated charNo is not assigned, or if it is assigned
and the area acquired is too small for the character size, this
function calculates the number of blocks required for the
characters and acquires that number of blocks from the block
pool and copies the character data. If overwrite is possible, the
character data will be written to the same area.
Title Function Function Name No
Function Specification Clear Character Area SPR_2ClrChar 9
Format void SPR_2ClrChar(Uint16 charNo)
Input charNo : Character Number
Output None
Function Value None
Function Clears the VRAM block used by the character of the designated
character number.
24
Title Function Function Name No
Function Specification Clear All Character Area SPR_2ClrAllChar 10
Format void SPR_2ClrAllChar(void)
Input None
Output None
Function Value None
Function Clears the entire character area.
Title Function Function Name No
Convert Gouraud Shading Table Number to
Function Specification SPR_2GourTblNoToVRAM 11
VRAM Address
Format SprVaddr addr = SPR_2GourTblNoToVram(Uint16 gourTblNo)
Input gourTblNo : GouraudShading Table Number
Output None
Function Value addr : VRAM internal relative address/8
Function Converts the Gouraudshading table number to VRAM address.
Title Function Function Name No
Convert Lookup Table Number to
Function Specification SPR_2LookupTblNoToVRAM 12
VRAM Address
Format SprVaddr addr = SPR_2LookupTblNoToVram(Uint16
LookupTblNo)
Input LookupTblNo : Lookup Table Number
Output None
Function Value addr : VRAM internal relative address/8
Function Converts the lookup table number to VRAM address.
Title Function Function Name No
Convert Character Number to VRAM
Function Specification Address SPR_2CharNoToVRAM 13
Format SprVaddr addr = SPR_2CharNoToVram(Uint16 charNo)
Input charNo : Character Number
Output None
Function Value addr : VRAM internal relative address/8
Function Converts the character number to VRAM address.
User's Guide 2 Graphics Library 25
Title Function Function Name No
Function Specification Open Command Write Processing SPR_2OpenCommand 14
Format void SPR_2OpenCommand(Uint16 drawPrtyFlag)
Input drawPrtyFlag : Command draw priority enable/disable flag.
SPR_2DRAW_PRTY_ON = Enable command draw priority
SPR_2DRAW_PRTY_OFF = Disable command draw priority
Output None
Function Value None
Function Sets the sprite command write start position to the start of the
VRAM command area. This routine must be called before
calling any of the following routines.
SPR_2LocalCoord() SPR_2SysClip() SPR_2UserClip() SPR_2line()
SPR_2polyLine() SPR_2Polygon() SPR_2NormSpr() SPR_2ScaleSpr
SPR_2DistSpr() SPR_2Cmd()
Title Function Function Name No
Function Specification Close Command Write Processing SPR_2CloseCommand 15
Format void SPR_2CloseCommand(void)
Input None
Output None
Function Value None
Function Chains the commands contained in VRAM according to the
priority number when command draw priority is enabled.
It writes the end sprite command and toggles the VRAM area
reference switch.
Title Function Function Name No
Function Specification Set Local Coordinates SPR_2Local Coord 16
Format void SPR_2LocalCoord(Sint32 drawPrty, XyInt *xy)
Input drawPrty : Command draw priority number
xy : Local coordinate relative coordinate
Output None
Function Value None
Function Sets the local coordinates.
26
Title Function Function Name No
Function Specification Set the System Clipping Area SPR_2SysClip 17
Format void SPR_2SysClip(Sint32 drawPrty, XyInt *xy)
Input drawPrty : Command draw priority number
xy : Lower right coordinates
Output None
Function Value None
Function Set the system clipping area.
Title Function Function Name No
Function Specification Set the User Clipping Area SPR_2UserClip 18
Format void SPR_2UserClip(Sint32 drawPrty, XyInt xy[2])
Input drawPrty : Command draw priority number
xy [0] : Upper left coordinates
xy [1] : Lower right coordinates
Output None
Function Value None
Function Set the user clipping area.
Title Function Function Name No
Function Specification Draw Line SPR_2Line 19
Format void SPR_2Line(Sint32 drawPrty, Uint16 drowMode,
Uint16 color, XyInt xy[2], Uint16 gourTblNo)
Input drawPrty : Command draw priority number
drowMode : Draw Mode(Same in draw mode word)
color : Color mode or lookup table number
xy[2] : 2 points of the line
gourTblNo : GouraudShading Table Number
NO_GOUR(=0xffff) = No Gouraud shading table
designation
Output None
Function Value None
Function Draws a line.
User's Guide 2 Graphics Library 27
Title Function Function Name No
Function Specification Draw Polyline SPR_2PolyLine 20
Format void SPR_2PolyLine(Sint32 drawPrty, Uint16 drowMode,
Uint16 color, XyInt xy[4], Uint16 gourTblNo)
Input drawPrty : Command draw priority number
drowMode : Draw Mode(Same in draw mode word)
color : Color mode or lookup table number
xy[4] : 4 points of the polyline
gourTblNo : GouraudShading Table Number
NO_GOUR(=0xffff) = No Gouraudshading table
designation
Output None
Function Value None
Function Draws a polyline.
Title Function Function Name No
Function Specification Draw Polygon SPR_2PolyGon 21
Format void SPR_2Polygon(Sint32 drawPrty, Uint16 drowMode,
Uint16 color, XyInt xy[4], Uint16 gourTblNo)
Input drawPrty : Command draw priority number
drowMode : Draw Mode(Same in draw mode word)
color : Color mode or lookup table number
xy[4] : 4 points of the polygon
gourTblNo : GouraudShading Table Number
NO_GOUR(=0xffff) = No Gouraudshading table
designation
Output None
Function Value None
Function Draws a polygon.
28
Title Function Function Name No
Function Specification Draw Normal Sprite SPR_2NormSpr 22
Format void SPR_2NormSpr(Sint32 drawPrty, Uint16 dir, Uint16
drowMode, Uint16 color, Uint16 charNo, XyInt *xy,
Uint16 gourTblNo)
Input drawPrty : Command draw priority number
dir : Character reverse instructions (b11~b8: same in
control word)
drowMode : Draw Mode(Same in draw mode word)
color : Color code or lookup table number
When 0xffff, The color data set using
SPR_2SetChar () is set.
chrNo : Character Number
xy : Upper left Coordinates
gourTblNo : GouraudShading Table Number
NO_GOUR(=0xffff) = No Gouraudshading table
designation
Output None
Function Value None
Function Draws a normal sprite.
Title Function Function Name No
Function Specification Draw Scaled Sprite SPR_2ScaleSpr 23
Format void SPR_2ScalSpr(Sint32 drawPrty, Uint16 zoomDir,
Uint16 drowMode, Uint16 color, Uint16 charNo, XyInt
xy[2], Uint16 gourTblNo)
Input drawPrty : Command draw priority number
zoomDir : Zoom and character reverse instructions
(b11~b8, b5, b4: same in control word)
drowMode : Draw Mode(Same in draw mode word)
color : Color code or lookup table number
When 0xffff, The color data set using
SPR_2SetChar () is set.
charNo : Character Number
xy [2] : 2 point vertex, or fixed point coordinate/
display width
gourTblNo : GouraudShading Table Number
NO_GOUR(=0xffff) = No Gouraud shading table
designation
Output None
Function Value None
Function Draws a scaled sprite.
User's Guide 2 Graphics Library 29
Title Function Function Name No
Function Specification Draw Distorted Sprite SPR_2DistSpr 24
Format void SPR_2DistSpr(Sint32 drawPrty, Uint16 dir, Uint16
drowMode, Uint16 color, Uint16 charNo, XyInt xy[4],
Uint16 gourTblNo)
Input drawPrty : Command draw priority number
dir : Character reverse instructions (b11~b8: same in
control word)
drowMode : Draw Mode(Same in draw mode word)
color : Color code or lookup table number
When 0xffff, The color data set using
SPR_2SetChar () is set.
charNo : Character Number
xy[4] : 4 vertex points
gourTblNo : GouraudShading Table Number
NO_GOUR(=0xffff) = No Gouraud shading table
designation
Output None
Function Value None
Function Draws a distorted sprite.
Title Function Function Name No
Function Specification Set Command SPR_2Cmd 25
Format void SPR_2Cmd(Sint32 drawPrty, SprSpCmd *spCmd)
Input drawPrty : Command draw priority number
spCmd : 32 byte sprite command.
Output None
Function Value None
Function Sets the designated sprite command in the user command area
as is.
Title Function Function Name No
Function Specification Flush the Command Draw Priority Chain SPR_2FlushDrawPrty 26
Format void SPR_2FlashDrawPrty(void)
Input None
Output None
Function Value None
Function Chains the commands contained in VRAM according to the
priority number when command draw priority is enabled and
clears the draw priority control area.
30
Title Function Function Name No
Function Specification Allocate VRAM Block area (static) SPR_2AllocBlock 27
Format SprVaddr addr =SPR_2AllocBlock(Uint16 size)
Input size : Block size (32 bytes is 1 unit)
Output None
Function Value addr : Returns VRAM relative address /8 of the acquired
block area positions.
Function Acquires from the VRAM block pool the designated size block.
This routine cannot be freed externally, but the specification
was included in the event that functions were added to this
library.
Title Function Function Name No
Function Specification Free VRAM Block Area (static) SPR_2FreeBlock 28
Format void SPR_2FreeBlock(SPRVaddr addr, Uint16 size)
Input addr : Returns the freed block area in VRAM relative
address/8.
size : Block size (32 bytes is 1 unit)
Output None
Function Value None
Function Frees the designated block area from the VRAM block pool.
This routine cannot be freed externally, but the specification
was included in the event that functions were added to this
library.
User's Guide 2 Graphics Library 31
6.0 VDP1 3D Reference
6.1 Data Specifications
Title Data Data Name No
Data Specification Cluster Definition SprCluster
typedef struct SprCluster {
Uint16
Uint16
MthXyz Rotate on parent cluster coord. system */
MthXyz parent cluster coor. sys.*/
SprObject3D
SprCluster
SprCluster
SprInbetInf
void
/* Before coord. coversion start, user
/* callbak routine */
void (transEnd) (SprCluster*, SprObject3D*, MthMatrix, MthXyz*);
/* Before coord. coversion end, user
/* callbak routine */
void
} SprCluster;
“no” is used by the user callback routine to identify the cluster table, it can
be set as desired.
angleSeq = ROT_SEQ_ZYX : Rotate object in Z→Y→X order.
= ROT_SEQ_ZXY : “ Z→X→Y “
= ROT_SEQ_YZX : “ Y→Z→X “
= ROT_SEQ_YXZ : “ Y→X→Z “
= ROT_SEQ_XYZ : “ X→Y→Z “
= ROT_SEQ_XZY : “ X→Z→Y “
If a 3D object, the next cluster or a child cluster will not connect, each of the
object, the next cluster, and the child are set to 0.
inbetInf is 0 if there is no inbetween-object polyon information.
transStart indicates the user call back routine that is called before coordinate
conversion begins. In the routine, items such as cluster movement and
object data changes, take place. This is 0 if there is no call back routine.
[transStart routine calling sequence]
void transStart(SprCluster *cluster);
cluster : Auto cluster table
32
transEnd indicates the user call back routine that is called after the coordinate
conversion begins. This call back routine is called up for each 3D object
connected to the object. This is 0 if there is no call back routine.
[transStart routine calling sequence]
void transEnd(SprCluster *cluster, SprObject3D *object,
MthMatrix *worldMatrix, MthXyz *worldVertPoint);
cluster : Auto cluster table
object : 3D object table
worldMatrix : Conversion matrix (3 column, 4 row) to word coord. system
worldVertPoint : vertex coordinate value table in the world coordinate system.
(Returns when #define SPR_3NEED_WORLD_VERT is
defined with the 3D sprite work area definition macro.)
Context indicates the context area that is used for each cluster by the user call
back routine.
User's Guide 2 Graphics Library 33
Title Data Data Name No
Data Specification Object Definition SprObject3D
typedef struct SprObject3D {
Uint16
Uint16
Uint16
Uint16 surfaceCount; /* Surface count
MthXyz
MthXyz
SprSurface
MthXyz surfaceNormal;/* Surface vector table
MthXyz
Uint16
Fixed32 Correction calc. for surface normal vector */
SprObject3D
} SprObject3D;
“no” is used by the user call back routine to identify the cluster table; it can
be set as desired.
dispFlag b15,b14 = 00:
= 10:
b12 = 1: Double surface polygon
b9,b8 = 00:
01:
10:
b4 = 1: Inbetween-object polygon object
vertNormal : Set when using Gouraud shading.
surface : Pointer to the table that defines the vertexes and
color information that make up each surface.
surfaceNormal : Pointer to the table that defines the line for each
surface.
surfaceVert : Sets the coordinate table pointer of a representative
point (center point) on the surface used to calculate
brightness.
shdIdxTbl : Sets the shading table index table when using the
shading table to do flat shading. If this parameter is
set while setting Gouraud shading, the shdIdxTbl [0]
becomes the Gouraud shading gray code table. If
this parameter is set in flat shading while surface
definition draw mode is set to texture, the shdIdxTbl
[0] becomes the flat shading gray code table.
surfNormK : Set when surface normal vector calculation using the
SPR_SetNormVect () routine is used, or when this
object is an inbetween-object polygon object. For
details, see the mathmatical calculation library
MTH_ComputeNormVect () routine, surfNorm
parameter. When an inbetween-object polygon
object is utilized, a negative value must be used.
34
If the normal vector table, shading index table, or
next object is not connected, each of vertNormal,
shdInxTbl, and next is set to 0.
The shading table is set at 32 tones in the RGB code
format.
Uint16 shadingTbl[32]; 0 ← dark bright → 31
If the line vector ta If surface polygon designation is
1, half of polygon data indicates both surfaces.
Title Data Data Name No
Data Specification Surface Definition SprSurface
typedef struct SprSurface {
Uint16 Vertex number to configure the surface */
Uint16
Uint16
} SprSurface;
drawMode b15,b14 = 00:
01:
10:
11:
b13,b12 = 00: After a coordinate change, the lowest value of the
4 coordinates is used for z Sort No Shading
01:
the 4 coordinates is used for z Sort No Shading
10:
4 coordinates is used for z Sort No Shading
b11-b0:
If the texture was set using the drawMode, the color bit changes as follows.
color b15,b14 indicate texture reverse mode.
b15,b14 = 00:
01:
10:
11:
b13-b0 : Luxture character number
User's Guide 2 Graphics Library 35
Title Data Data Name No
Data Specification Inbetween-object polygon object information SprInbetInf
typedef struct SprInbetInfo {
Sint32 Number of vertexes called
SprObject3D
Uint16
SprObject3D
Uint16
SprInbetInf
} SprTexture;
If there is no inbetween-object polygon object information, next is set to 0.
Title Data Data Name No
Data Specification Texture Table SprTexture
typedef struct SprTexture {
Uint16 Character number*/
Uint16 */
Uint16 */
Uint16 */
Uint16 */
Uint8 */
SprLookupTbl */
} SprTexture;
SprTexture texture[n]; The charNo of the last entry is set to 0xffff
(stopper).
colorMode : b5-b3 are the same as sprite draw mode word.
color : Color data
When color mode = 1, lookup table number.
When color mode = 0, 2, 3, 4, color bank code.
When color mode = 5, it is ignored.
Title Data Data Name No
Data Specification 3D Status Data Table Spr3DStatus
typedef struct Spr3dStatus {
MthXyz lightAngle; /* Light source angle */
MthXyz viewCoordPoint; */
MthXyz viewPoint; /* View coordinate */
MthXyz viewAngle; /* View angle */
Sint32 viewAngleSeq; /* View angle rotate sequence */
Sint32 zSortMode; /* Z sort Z coord. value use mode
Fixed32 /* Min value of Z sort view coord.
Fixed32 /* Max value of Z sort view coord.
Fixed32 /* Min Z value of view coord. clip
Fixed32 /* Max Z value of view coord. clip
Sint32 clipLevel; /* Clipping Level */
MthXyz unitPixel; /* Screen pixels for x, y1.0 */
} Spr3dStatus;
36
6.2 List of Functions
Function Function Name Number
3D Sprite Work Area Definition Macro SPR_3DefineWork 1
Initialize 3D Sprite Display SPR_3Initial 2
Set Clipping Mode SPR_3SetClipLevel 3
Set Unit Pixel Count SPR_3SetPixelCount 4
Set Light SPR_3SetLight 5
Set View SPR_3SetView 6
Move Cluster SPR_3MoveCluster 7
Record Model SPR_3DrawModel 8
Draw Model SPR_3Flush 9
Set Texture SPR_3SetTexture 10
Clear Texture Area SPR_3ClrTexture 11
Function call for all clusters SPR_3CallAllCluster 12
Change texture color data SPR_3ChangeTexColor 13
Set Z sort minimum and maximum SPR_3SetZSortMinMax 14
Get current 3D status data SPR_3GetStatus 15
Set object normal surface vector SPR_3SetSurfNormVect 16
VDP1 high speed draw parameter set SPR_3SetDrawSpeed 17
6.3 Function Specifications
Title Function Function Name No
Function Specification VDP1 3D Work Area Definition Macro SPR_3DefineWork 1
Format [#define SPR_3USE_DOUBLE_BUF]
[#define SPR_3NEED_WORLD_VERT]
#include “sega_spr.h”
SPR_3DefineWork(WORK3D, OBJ_SURF_MAX, OBJ_VERT_MAX)
Input WORK3D : Name of work area
OBJ_SURF_MAX : Maximum surfaces of an object
OBJ_VERT_MAX : Maximum vertexes of an object
Function Defines the work area used by VDP1 3D display in the AP data
area.
The #define SPR_3USE_DOUBLE_BUF can be skipped by
using two of the designated object vertex coordinates or the
surface brightness tables, and running the DSP coordinate
conversion and SH processing in parallel to increase speed.
The #define SPR_3NEED_WORLD_VERT can be skipped by
notifying the vertex coordinate table in the world coordinate
system when the coordinate conversion results are notified.
#define SPR_3USE_DOUBLE_BUF and #define
SPR_3NEED_WORD_VERTH must be defined before defining
#define “sega_spr.h”.
User's Guide 2 Graphics Library 37
Title Function Function Name No
Function Specification Initialize 3D VDP1 SPR_3Initial 2
Format void SPR_3Initial(Spr3WorkArea *workArea)
Input workArea : Work area definition table
Output None
Function Value None
Function Initializes the VDP1 3D display.
· The view point is the world coordinate system base point,
the focal angle is (0,0,0) (Z positive direction), and rotation is
set in order of X →Y→ Z.
· The light source direction is (0,0,0) (Z positive direction).
· The clipping level is 2, the Z coordinate are from -0.005 to the
minimum negative value display range max/min values of
the view coordinate system.
Title Function Function Name No
Function Specification Set Clipping Mode SPR_3SetClipLevel 3
Format void SPR_SetCl i pLevel( Ui nt 16 c li pLevel, Fi xed32 c li pZmi n, Fi xed32
c li pZmax)
Input clipLevel : Clipping level number
0= No clipping
1= Clip at view coord. system Z range (After coord. conversion)
2= Delete polygons that are not on screen. (After transparent conversion)
3= Clip the frame buffer boundary (After transparent conversion)
clipZmin : View coordinate system, Z coordinate min. clip value
clipZmax : View coordinate system, Z coordinate max. clip value
Output None
Function Value None
Function Sets the polygon clipping level. The upper level includes the
functions of the lower level. Clipping can be done in level 1,
with the polygon max Z coordinate value in the view
coordinate system, but that range has to be set in clipZmin and
clipZmax before executing SPR3_DrawMode().
Title Function Function Name No
Function Specification Set Unit Pixel Count SPR_3SetPexelCount 4
Format void SPR_3SetPi xelCount ( Ui nt 16 pi xelCount X, Ui nt 16 pi xelCount Y)
Input pixelCountX : Screen X unit pixel count
pixelCountY : Screen Y unit pixel count
Output None
Function Value None
Function Sets the screen pixel count for converting the screen to
transparent XY at 1.0 each. Each is set at 256 when initialized.
38
Title Function Function Name No
Function Specification Set Light SPR_3SetLight 5
Format void SPR_3SetLight (Uint16 moveKind, MthXyz
*lightAngle)
Input moveKind : Type of move amount
b0: 0= Relative Move
1= Absolute move
b1: 0= Rotate move amount is angle
1= Rotate move amount is unit vector
lightAngle : If the light source rotation amount is an angle,
the designated range of the move is calculated
according to the equation below. Vector
designations are converted to angles.
FIXED(-180.0)≤ Rotate amount≤FIXED(180.0)
Rotate operation is done in X→Y→Z order.
Output None
Function Value None
Function Sets the light angle.
Title Function Function Name No
Function Specification Set View SPR_3SetView 6
Format void SPR_3SetVi ew( Ui nt 16 moveKi nd, Mt hXyz *pi votVi ewPoint ,
Mt hXyz *vi ewPoint , Mt hXyz *vi ewAngle, Ui nt 16 angleSeq)
Input moveKind : Type of move amount
b0: 0= Relative Move
1= Absolute move
b1: 0= Rotate move amount is angle
1= Rotate move amount is unit vector
viewPoint : Position of viewpoint or amount of
horizontal move.
Ignored when it is 0 at the rotation position of
viewpoint within the world coordinate system.
viewAngle : If the viewpoint rotation amount is an angle,
the designated range of the move is calculated
according to the equation below. Vector
designations are converted to angles.
FIXED(-180.0)≤ Rotate amount≤FIXED(180.0)
angleSeq : Viewpoint rotation operation
viewCoordPoint: horizontal movement or view point in the
view coordinate system.
Ignored when 0.
Initial value is (0, 0, 0).
Output None
Function Value None
User's Guide 2 Graphics Library 39
Function Viewpoint is moved within the world coordinate system; that
position is center for rotation. If there is a viewCoordPoint
designation, the viewpoint is moved to the designated position
from the start point using the view point coordinate system.
angleSeq = ROT_SEQ_ZYX : Rotate object in Z→Y→X order.
= ROT_SEQ_ZXY : “ Z→X→Y “
= ROT_SEQ_YZX : “ Y→Z→X “
= ROT_SEQ_YXZ : “ Y→X→Z “
= ROT_SEQ_XYZ : “ X→Y→Z “
= ROT_SEQ_XZY : “ X→Z→Y “
Title Function Function Name No
Function Specification Move Cluster SPR_3MoveCluster 7
Format void SPR_3MoveCluster(SprCluster *cluster, Uint16
moveKind, MthXyz *angle,MthXyz *point)
Input cluster : Pointer to the cluster table to be moved
moveKind : Type of move amount
b0: 0= Relative Move
1= Absolute move
b1: 0= Rotate move amount is angle
1= Rotate move amount is unit vector
angle : If the amount is an angle, the designated range
of the move is calculated according to the
equation below. Vector designations are
converted to angles.
FIXED(-180.0)≤ Rotate amount≤FIXED(180.0)
point : Amount of horizontal movement
Output None
Function Value None
Function Rotates the cluster move, executes in the order of the horizontal
move. When either angle or point are 0, they are ignored.
Title Function Function Name No
Function Specification Record Model SPR_3DrawModel 8
Format void SPR_3DrawModel (SprCluster *rootCluster)
Input rootCluster : Pointer to the root cluster table of the model to be
displayed.
Output None
Function Value None
Function Records the model.
40
Title Function Function Name No
Function Specification Draw Model SPR_3Flush 9
Format void SPR_3Flush (void)
Input None
Output None
Function Value None
Function Draws the model.
Completes Z sort of the polygon group’s viewpoint coordinate
system registered by the SPR_3DrawMode ().
Title Function Function Name No
Function Specification Set Texture SPR_3SetTexture 10
Format void SPR_3SetTexture(SprTexture *texture)
Input texture : Texture table pointer
Output None
Function Value None
Function Sets the texture.
Title Function Function Name No
Function Specification Clear Texture Area SPR_3ClrTexture 11
Format void SPR_3ClrTexture(SprTexture *texture)
Input texture : Texture table pointer
Output None
Function Value None
Function Clears the texture.
Title Function Function Name No
Function Specification Function call for all clusters SPR_3CallAllCluster 12
Format void SPR_3CallAllCluster(SprCluster *cluster
void (*userFunc) (SprCluster*))
Input cluster : Root cluster table pointer
userFunc: User function
Output None
Function Value None
Function Calls the indicated function using the class table from each
cluster connected to the root cluster as parameters.
User's Guide 2 Graphics Library 41
Title Function Function Name No
Function Specification Change texture color data SPR_3ChangeTexColor 13
Format void SPR_3ChangeTexColor (Uint16 charNo, Uint16 color,
SprLookupTbl *lookupTbl)
Input char No : Character number
color : Color data
lookup table number or color bank code
lookupTbl: Lookup table pointer
Output None
Function Value None
Function Changes the texture color data and color lookup table indicated
by the registered character number. If lookupTbl is 0, only the
color is changed, the color lookup table is not registered.
Title Function Function Name No
Function Specification SetZ sort min.imum and maximum SPR_3SetZSortMinMax 14
Format void SPR_3SetZSortMinMax1 (Uint16 zSortMode,
Fixed32 zSortMin, Fixed32 zSortMax)
Input zSortMode: Use Z sort Z coordinate value mode
ZSORT_FLOAT_MODE=Float mode
ZSORT_FIXED_MODE= Fized mode
zSortMin: Min value of view coordinate Z sort Z coordinate
zSortMax: Max value of view coordinate Z sort Z coordinate
Output None
Function Value None
Function zSortMin and zSortMax are parameters used to set the Z range
used to allocate the draw number blocks and is set before the
SPR3DrawMode () routine is executed.
If the Z coordinate value mode is set to the float mode, then
zSortMin and zSortMax are used as initial values. After that,
the maximum and minimum Z coordinate values of the view
coordinate system from the last draw is used for the Z range.
In the fixed mode, the designated zSortMin and zSortMax
values are used.
When initial values are set during the SPR_3Initial () routine,
zSortMin is set at -10.0 and zSortMax at 0.0; the Z coordinate
value mode is set to floating. The view coordinate system
heads in the minus direction when the view coordinate value is
0.0. The block used for Z sort is the VDP1 expanded process
draw priority block. To make Z sort faster, the priority blocks
in the 2D work area definition must be set to maximum.
Also, when doing Z sort, the drawPrtyFlag in the
SPR_2OpenCommand () routine must be set to
SPR_2DRAW_PRTY_ON.
42
Title Function Function Name No
Function Specification Get current 3D status data SPR_3GetStatus 15
Format void SPR_3GetStatus(Spr3dStatus *spr3dStatus)
Input None
Output spr3dStatus : 3D status data table pointer
Function Value None
Function Gets the current 3D status data.
Title Function Function Name No
Function Specification Set object normal surface vector SPR_3SetSurfNormVect 16
Format void SPR_3SetSurfNormVect (SprObject3D *obj)
Input None
Output obj : 3D object
Function Value None
Function Calculates the normal vector from the designated 3D object
surface vertex and sets the normal surface vector table. The
surface vertex order of the normal vector is clockwise and
vertical. The 3D object surfNormK parameter must be set.
Title Function Function Name No
Function Specification VDP1 high speed draw parameter set SPR_3SetDrawSpeed 17
Format void SPR_3SetDr awSpeed ( Si nt 32 hssFl ag, Si nt 32 eosFl ag, Si nt 32
pc lpFl ag)
Input hssFlag : High speed shrink flag
(Set in the texture polygon draw mode)
0= Precision priority draw (default)
1= Speed priority draw
eosFlag : Sampling coordinates of the source texture when
speed priority is selected.
0= Even coordinate sampling (default)
1= Odd coordinate sampling
pclpFlag : Preclipping enable/disable flag
0= Enable (default)
1= Disable
Output None
Function Value None
Function Sets the high speed draw mode in the VDP1 sprite command
draw mode. See the VDP1 hardware manual about high speed
clipping and preclipping.
User's Guide 2 Graphics Library 43
(This page is blank in the original Japanese document.)
44
VDP2 Library
1.0 Guide
1.1 Objective
· Automates hardware-related processing such as VDP1 initialization, register
operation, etc., to reduce the load on the application author.
· Using this library enables one to set the registers without really being aware of
V-BLANK. Automates hardware-related processing related to V-BLANK interrupt
processing to reduce the load on the application author. Also supplies the V-
BLANK interrupt processing routine and frame change settings routine needed to
display VDP1 and VDP2.
1.2 Explanation
VDP2 is only allowed to access a register or color RAM during V-BLANK. In addi-
tion, it cannot read many registers.
The VDP2 library contains a register buffer; normal reading and writing to registers
occur in this buffer and are copied to the register during the next V-BLANK. (See
the reference for more information on the register buffer.) The functions of this
library are divided into larger groups as shown below.
Initializing Function
Must be executed first when starting up the VDP2 library.
Table Creation & Data Set Functions
Refer to the VDP2 user’s manual or reference manual when setting each of the
parameters.
Functions Relating to Screen Display Operations
Enables scroll screen movement, enlarge/reduce, and rotation.
Line Screen Setting Functions
Sets line screen and back screen data.
Window Setting Function
Executes window settings.
Functions Related to VDP1
Functions that must be set in order to display VDP1 (sprite) frame buffer contents.
Functions related to Color RAM
Used to set or change the pallet.
User's Guide 2 Graphics Library 45
Functions Related to Priority
Gets information and sets priorities.
Color Calculation Functions
Processes color calculations. Used to add gradated effects and depict translucent
objects or cause ghosts to appear, space ships to warp out, etc.
Color offset Functions
Processing that adds offset to color. Used for fade-in, fade-out, black-out, white-
out, etc. Also effective when used to change a blue sky to a red sunset sky.
Other Special Effect Functions
Used for shade calculations, adding line color screen, and shadow bit settings.
(Line color screen can only be used in color calculations.)
Register Buffer W
rite / Read Macro
Supplies the bit access macro for reading the register buffer of priority-related
functions used by this library. There are about 90 varieties, each of read and write
macros.
• Write macro command line
SCL_SET_<BitName>(arg);
• Read macro command line
ret = SCL_GET_,BitName>();
<BitName> : Bit name (Refer to “VDP2 User’s Manual”)
arg, ret : Refer to the “VDP2 User’s Manual”
V-BLANK Interrupt Processing Functions
Explains the frame change process used to display sprite (VDP1) and scroll (VDP2)
through the V-BLANK VDP interrupt routine supplied by this library.
Frame Change Process
• Auto Change Mode (Non-synchronous Mode)
Every 1/60th of a second, the VRAM is automatically changed and erase data is
written to the frame buffer and the sprite is written (frame change). For this
reason, the SCL_DisplayFrame() routine does not need to be called.
• Fixed Interval Manual Change (Synchronous Mode)
If a number greater than one is set into the SCL_SetFrameInterval, described
later, then frame change is executed by the V-BLANK VDP interrupt routine
one time for each interval count. However, to accomplish this, command write
to VRAM must end and the SCL_DisplayFrame() routine must be called.
Waiting for frame change is done within the SCL_DisplayFrame routine.
46
• Undefined Interval Manual Change Mode (Synchronous Mode)
The undefined interval manual change mode starts when 0xffff is set as the V-
BLANK interval count in the SCL_SetFrameInterval().
In the undefined mode, the frame is changed simultaneously with the first V-
BLANK interrupt when the VRAM command write ends and the
SCL_DisplayFrame routine is called. However, before frame change, the VDP1
must have finished writing to the frame buffer or it goes into a loop to wait.
Also, the frame buffer cannot be erased during frame change, so the user must
use the VRAM command lead to clear the frame buffer with a polygon.
V-BLANK Interrupt Processing
When the user uses the sprite (VDP1), or scroll (VDP2) display library,
INT_SetScuFunc() must be used to set the following routine that is used to create the
V-BLANK interrupt routine. Also, an independent interrupt process routine can be
used without calling the following routines.
• V-BLANK Start VDP Interrupt Process Routine
If the fixed interval manual change mode is being used, the V-BLANK repetitions
are counted and the frame change flag is set to on when the interval count is
reached. In the undefined interval manual change mode, the flag is always on.
Also, by writing the contents of the scroll data to the scroll register during V-
BLANK with the frame change timing in this access routine, scroll motion and
sprite frame change are simultaneous. If this method does not match AP, an
independent interrupt routine must be used.
• V-BLANK End VDP Interrupt Process Routine
If the frame change flag is on, frame change is executed.
User's Guide 2 Graphics Library 47
1.3 Basic Library Usage
Basic VDP2 library usage is contained in “15.1 Operation Flow in Chapter 15 Using
VDP2, of the VDP2 User’s Manual”. Follow that flow with the appropriate library.
VRAM mapping is particularly important for using this library; along with the
setting of cycle patterns which have a high degree of freedom in the settings, but are
also quite complex, and sample programs are explained.
VRAM Mapping
VRAM and Data Size Comparison Chart
VRAM A0 16,770,000 Color Bit 32,000 Colors (2048
Map Data colors) Bit Map Data
(512x256) (512x256)
VRAM A1
2M bit
4M bit
VRAM B0
256 Colors Bit Map
Data (512x256)1M bit
VRAM B1
16 Colors Bit Map Data
(512x256)0.5M bit
Rotation Parametert Rotation Parameter
Coefficienct Table Coefficienct Table
(2word) (1word) 1M bit
2M bit
Figure 1 VRAM and DA TA Size Comparison
Effective use of VDP2 depends on how the data is placed in the VRAM.
For example, to display a 16,770,000 color bitmap image, all of the VRAM would be
filled with no room to display other images.
Next, VRAM mapping examples will be explained. The image data used in the
example is bitmap data. This is because the data size is fixed and can be used for
direct mapping. In the cell format, the data size changes depending on how the data
is stored. If there are many common parts, the memory usage is more efficient than
bitmapping.
48
[Example 1] Using Five Screens Displayable by the VDP2
Other than NBG2 and NBG3, all data is bitmap. If rotating screen 1 is
256 colors and the normal 4 screens are 16 colors, it will be as follows.
To move the rotating screen, a rotation parameter table is required. If
X and Y axis rotation is to be done, a rotation parameter coefficient
table must also be prepared.
In this library, the rotation parameter coefficient table is usually
placed at the lead of each bank (VRAM A0, VRAM A1, VRAM B0,
VRAM B1). However, the X and Y axis rotation can only be used in
2kWord (4kByte). This allows the remaining area (124kByte) to be
filled with the rotation parameter table, line scroll table, line color
table, back screen data, etc. (1M bit = 128kByte)
256 Colors Bit Map
VRAM A0 Data (512x256)1M bit RBG 0
Rotation Parameter
VRAM A1 Coefficienct Table (1word)
Rotation Parameter Table
16 Colors Bit Map Data
NBG 0
(512x256)0.5M bit
VRAM B0 16 Colors Bit Map Data
(512x256)0.5M bit
NBG 1
Character Parameter
Data Pattern Name Data NBG 2
VRAM B1
Character Parameter
Data Pattern Name Data NBG3
Figure 2 Using 5 Screens that can be displayed by the VDP2
User's Guide 2 Graphics Library 49
[Example 2] Using 2 Rotation Screens
Only one type of rotation data, such as character data (bitmap data),
pattern name data, rotation parameter coefficient data, etc., can be
placed in each bank. Furthermore, RGB1 placement is fixed with
character pattern data in VRAM B0, and pattern name data is VRAM
B1.
256 Colors Bit Map
VRAM A0 Data (512x256)1M bit RBG 0
Rotation Parameter
VRAM A1 Coefficienct Table (1word)
Rotation Parameter Table
Character Pattern Data
VRAM B0 RBG 1
1Mbit
Pattern Name Data
VRAM B1
1Mbit
Figure 3 Using 2 Rotation Screens
50
Setting VRAMAssignments and Cycle Patterns
VDP2 displays by reading from VRAM at the same time as the scroll screen data is
being scanned on the TV. VRAM access during display is either 4 times (hi-res
display) or 8 times (normal display) being one access unit (1 cycle) with cycles being
repeated.
There is a cycle pattern register prepared for each VRAM and bank, VRAM
A(VRAM A0, VRAM A1) and VRAM B (VRAM B0, VRAM B1). Access is displayed
as 4 bit for one command. (Refer to “3.4 VRAM Access during display in the VDP2
User’s Manual”).
The number of accesses set in the cycle pattern depends on the data type and use.
These need to be applied to the cycle pattern table.
Table 1 Access count for the required pattern name table data for 1 cycle
Item NBG0 ~ NBG3 RBG0, RBG1
Compression Times 1 Times 1/2 Times 1/4 –
VRAM access needed for 1 cycle 1 2 4 8
Table 2 Data Access for character pattern data (bitmap pattern data)
Item NBG0 ~ NBG3 RBG0, RBG1
TV Display Mode
Normal Hi-res Custom
Character colors
16 256 2048 32768 16770000 – – –
Compression Rate
1 1/2 1/4 1 1/2 1 1 1 – – –
VRAM access needed
1 2 4 2 4 4 4 8 8 4 4
for one cycle
For example, with 16 color bitmap data (uses character pattern data), up to four sets
of 512 x 256 data can placed in just one or in either VRAM A or VRAM B. If this is
applied to the normal scroll screen, the access amount would total 4 times. How-
ever, normal scroll screens NBG0 and NBG1 have compression functions. Using this
function and setting the compression ratio to 1/4 would increase the access count to
10, which exceeds 8, and the screen would not be displayed correctly. In this case, if
VRAM allocation is done, the access count will be distributed and the screen will
display correctly.
User's Guide 2 Graphics Library 51
16 color bitmap data NBG0 1 times
VRAM A 16 color bitmap data NBG1 1 times
Character pattern data
Pattern name NBG2 1 times
Character pattern data
Pattern name NBG3 1 times
VRAM 0 16 color bitmap data NBG0 1/4 times
16 color bitmap data NBG1 1/4 times
Character pattern data
VRAM 1 Pattern name NBG2 1 times
Character pattern data
Pattern name NBG3 1 times
Figure 4 16 Color Bitmap Data
Program Examples
Program examples using the C language are shown below.
#include <machine.h>
#include “sega_scl.h”
/* Set the cycle pattern table */
Uint16 n0_cycle[]={0x44ff, 0x0fff,/* VRAM A(A0)NBG0 Character pattern
and pattern name table on */
0xffff, 0xffff, /* VRAM A1 VRAM A is not allocated so */
/* is not used */
0xffff, 0xffff, /* VRAM B(B0) Non Table */
0xffff, 0xffff};/* VRAM B1 VRAM B is not allocated so */
/* is not used */
extern Uint16 ColData[]; */
SclConfig scfg;
main()
{
SCL_Vdp2Init(); */
SCL_SetDisplayMode(SCL_NON_INTER, SCL_224LINE, SCL_NOMAL_A);
/* Sets the screen mode */
SCL_SetColRamMode(SCL_CRM_2048):
/* Sets the color RAM mode */
SCL_AlloColRam(SCL_NBG0, 256, ON);
/* Reserve pallet area */
SCL_SetColRam(SCL_NBG0, 0, 265, ColData);
/* Sets the pallet data */
52
................... /* Store the scroll data in VDP2 VRAM */
SCL_InitConfigTb(&scfg); */
scfg.dispenbl = ON; */
scfg.charsize = SCL_CHAR_SIZE_1X1;
scfg.pnamesize = SCL_PN1WORD;
scfg.platesize = SCL_PL_SIZE_1X1;
scfg.coltype = SCL_COL_TYPE_256;
scfg.flip = SCL_PN_12BIT;
scfg.datatype = SCL_CELL;
scfg.plate_addr[0] = SCL_VDP2_VRAM_A+0x0000;
scfg.plate_addr[1] = SCL_VDP2_VRAM_A+0x2000;
scfg.plate_addr[2] = SCL_VDP2_VRAM_A+0x4000;
scfg.plate_addr[3] = SCL_VDP2_VRAM_A+0x6000;
SCL_SetConfig(SCL_NBG0, &scfg);
SCL_SetPriority(SCL_NBG0, 7); /* Set the priority to maximum */
SCL_SetCycleTable(n0_cycle); */
INT_SetScuFunc(.....); */
set_imask(0); */
SCL_Open(SCL_NBG0); */
SCL_Move(FIXED(1), FIXED(1), 0);/* Types of scroll move functions */
.
.
.
SCL_Close(SCL_NBG0); */
SCL_DisplayFrame(); */
}
User's Guide 2 Graphics Library 53
(There is no page 54 in the original Japanese document.)
54
2.0 Reference
2.1 Data Specifications
Title Data Data Name No
Data Specification 2D Data Structure SclXy
typedef struct SclXy {
Fixed32 x;
Fixed32 y;
} SclXy;
Title Data Data Name No
Data Specification 3D Data Structure SclXyz
typedef struct SclXyz {
Fixed32 x;
Fixed32 y;
Fixed32 z;
} SclXyz;
Title Data Data Name No
Data Specification Data Structure of the Line Parameter Table SclLineTb
typedef struct SclLineTb {
Fixed32 h; /* Horizontal screen scroll value */
Fixed32 v; /* Vertical screen scroll value */
Fixed32 dh; /* Increment of horizontal coordinates
} SclLineTb;
Title Data Data Name No
Data Specification Data Structure of the line window SclLinWindowTb
typedef struct SclLinWindowTb {
Uint16 start; */
Uint16 end; */
} SclLinWindowTb;
User's Guide 2 Graphics Library 55
Title Data Data Name No
Data Specification Structure of the RGB Color Table Data SclRgb
typedef struct SclRgb {
Sint16 red; */
Sint16 green; */
Sint16 blue; */
} SclRgb;
Title Data Data Name No
Data Specification VRAM Configuration Data Structure SclVramConfig
typedef struct SclVramConfig {
Uint32
/* parameter table in the relative VRAM */
/* address. If SCL_RBG_K is indicated, */
/* the relative address is designated there.
Uint32
/* Specified in relative address
Uint8
/* ON/OFF
Uint8
/* ON/OFF
Uint8
/* If not separated, uses all of VRAM A */
/* SCL_NON
/*
/* SCL_RBG0_K
/*
/* SCL_RBG0_PN
/*
/* SCL_RBG0_CHAR
/*
Uint8
/* Invalid if VRAMA is not separated
Uint8
/* If not separated, uses all of VRAM B */
Uint8
/* Invalid if VRAM B is not separated
Uint8 Indicates whether to place coefficient data
/* into color RAM. If coefficient data is
/* placed in VRAM, it can’t be used. Unless the*/
/* color RAM mode is SCL_CRM15-2048, it can’t */
/* be used. Specified with SCL_RBG0_K or SCL_NON*/
} SclVramConfig;
Note: If any type of rotation data is placed in a VRAM bank, other data
cannot be placed there. However, if ktboffsetA or ktboffsetB is set, other data can
be placed with coefficient data.
56
Title Data Data Name No
Data Specification Structure of the Scroll Configuration Data Sclconfig
Refer to the “VDP2 User’s Manual” for details on parameter settings.
typedef struct SclConfig {
Uint8 */
/* Screen display enable register (180020h) */
/* */
/* */
Uint8 */
/* Char. control reg.(180028h~18002ah) */
/*
/*
/*
/*
Uint8
/* Pattern Name Cntrl. reg.(180030h~18038h) */
/*
/*
/*
/*
Uint8
/* Plane size register (18003ah)
/*
/*
/*
/*
/*
/*
Uint8
/* Char. control reg.(180028h~18002ah) */
/*
/*
/*
/*
/*
/*
/*
/*
Uint8
/* Char. control reg.(180028h~18002ah) */
/*
/*
/*
/*
/*
/*
/*
/*
/*
/*
Uint8
/* Char. control reg.(180028h~18002ah) */
/* */
/* */
User's Guide 2 Graphics Library 57
/*
/*
Uint8 /* Over screen processing
/* Over screen process register (18003ah)
/* SCL_OVER0
/*
/*
/* SCL_OVER1
/*
/*
/*
/* SCL_OVER_2
/*
/* SCL_OVER_3
/*
/*
Uint8 flip /* Character number support mode
/* Designates whether to use special functions
/* and reverse functions when the pattern name
/* size is 1Word. If designated, the character */
/* number is 10bit, if not 12bit
/* Pattern Name Cntrl Register (180030h~180038h)*/
/*
/*
/*
/*
Uint16 patnamecontrl; /* Aux data in the pattern name control register*/
Uint32 plate_addr[16]; /* Scroll Screen Map Register
/* If cell format, designates pattern name */
/* table lead address */
/* If bitmap format, designates bitmap data */
/* lead address */
/* Normal(180040h~18004eh) */
/* Rotate(180050h~18006eh) */
} Sclconfig;
58
Title Data Data Name No
Structure of line & and vertical cell scroll
Data Specification parameter data
SclLineParam
Refer to the “VDP2 User’s Manual” for details on parameter settings.
typedef struct SclLineParam {
Uint8
/* Line & Vertical cell scroll register (18009ah)*/
/*
Uint8
/* Line & Vertical cell scroll register (18009ah)*/
/*
Uint8
/* Line & Vertical cell scroll register (18009ah)*/
/*
Uint8
/* Line & Vertical cell scroll register (18009ah)*/
/*
Uint8
/* Line & Vertical cell scroll register (18009ah)*/
/*
/*
/*
/*
/*
/*
/*
/*
/*
Uint32
/* Sets the VRAM address for line scroll table
Uint32 Vert. cell scroll table address register (18009c~18009e)*/
/* Sets VRAM address for cell scroll table
GlbLineTb
Fixed32
} SclLineParam;
User's Guide 2 Graphics Library 59
Title Data Data Name No
Data Specification VDP2 Register Buffer 1 SclSysReg
typedef struct SclSysReg {
/* Address contents */
Uint16 tvmode; /* 18000H TV screen mode */
Unit16 extenbl; /* 18002H External signal */
Unit16 tvstatus; /* 18004H Screen status */
Unit16 vramsize; /* 18006H VRAM size */
Unit16 H_val; /* 18008H H counter */
Unit16 V_val; /* 1800AH V counter */
Unit16 vramchg; /* 1800CH */
Unit16 ramcontrl; /* 1800EH RAM control */
Unit16 */
Unit16 /* 18020H Enable screen display */
Unit16 /* 18022H Mosaic control */
Unit16 specialcode_sel;/* 18024H Select special code */
Unit16 */
} SclSysReg;
Symbols are recorded in this library as shown below. After this
symbol is written, and the global variable “SclProcess” has a 1
written to it, then that will be reflected in the register during the
next V-BLANK.
SclSysReg
Title Data Data Name No
Data Specification VDP2 Register Buffer 2 SclDataset
typedef struct SclDataset {
/* Address contents
Uint16
Unit16 1802AH Character control (NBG2, NBG3, RBG0) */
Unit16 1802CH Bitmap pallet number (NBG0, NBG1)
Unit16
Unit16 patnamecontrl[15]/* 18030H Pattern name control
Unit16
Unit16
Unit16 1803EH Map offset (rotate parameter A, B)
Unit16
Unit16
} SclDataset;
Symbols are recorded in this library as shown below. After this
symbol is written, and the global variable “SclProcess” has a 1
written to it, then that will be reflected in the register during the
next V-BLANK.
SclDataset
60
Title Data Data Name No
Data Specification VDP2 Register Buffer 3 SclNorscl
typedef struct SclNorscl {
/* Address contents
Fixed32 n0_move_x;
Fixed32 n0_move_y;
Fixed32 n0_delta_x;
Fixed32 n0_delta_y;
Fixed32 n1_move_x;
Fixed32 n1_move_y;
Fixed32 n1_delta_x;
Fixed32 n1_delta_y;
Uint16
Unit16
Unit16
Unit16
Unit16
Unit16 line & V cell cntrl (NBG0, NBG1)
Unit16 cell scroll tbl addr (NBG0, NBG1) */
Unit16
Unit16
Unit16
} SclNorscl;
Symbols are recorded in this library as shown below. After this
symbol is written, and the global variable “SclProcess” has a 1
written to it, then that will be reflected in the register during the
next V-BLANK.
SclNorscl
Title Data Data Name No
Data Specification VDP2 Register Buffer 4 SclRotscl
typedef struct SclRotsel {
/* Address contents
Uint16
Unit16
Unit16
Unit16 Coefficient table address offset
Unit16
Unit16
} SclRotsel;
Symbols are recorded in this library as shown below. After this
symbol is written, and the global variable “SclProcess” has a 1
written to it, then that will be reflected in the register during the
next V-BLANK.
SclRotscl Scl_r_reg;
User's Guide 2 Graphics Library 61
Title Data Data Name No
Data Specification VDP2 Register Buffer 5 SclWinscl
typedef struct SclWinscl {
/* Address contents */
Uint16 Window position (w0, start XY) */
Unit16 /* 1800C4H Window position (w0, end XY)
Unit16 Window position (w0, start XY) */
Unit16 /* 1800CCH Window position (w0, end XY)
Unit16 /* 1800D0H Window control
Unit16 Line Window table address (W0)*/
Unit16 Line Window table address (W0)*/
} SclWinscl;
Symbols are recorded in this library as shown below. After this
symbol is written, and the global variable “SclProcess” has a 1
written to it, then that will be reflected in the register during the
next V-BLANK.
SclWinscl
Title Data Data Name No
Data Specification XY Size of screens used in the library SclDisplayX, SclDisplayY
This is a 2Byte global variable. When this variable is referenced, the
display vertical and horizontal size changes. By using the library
and setting the display mode, this can automatically be reflected.
Uint16 SclDisplayX;
Uint16 SclDisplayY;
62
2.2 List of Functions
Function Function Name Number
[Initializing Functions]
Initialize Library SCL_Vdp2Init 1
[Table Creation and Data Set Functions]
Set display mode SCL_SetDisplay Mode 2
Initialize VRAM configuration data table SCL_InitVramConfigTb 3
Initialize scroll configuration data table SCL_InitConfigTb 4
Set the VDP2 VRAM usage method SCL_SetVramConfig 5
Set the scroll configuration SCL_SetConfig 6
Set cycle patterns SCL_SetCycleTable 7
[Functions Related to the Display Screen Functions]
Scroll open process SCL_Open 8
Scroll close process SCL_Close 9
Initialize line and vertical cell scroll parameter table SCL_InitLineParamTb 10
Set line and vertical cell scroll parameters SCL_SetLineParam 11
Move scroll (Amount of move : absolute coord.) SCL_MoveTo 12
Move scroll (Amount of move : relative coord.) SCL_Move 13
Enlarge or reduce scroll SCL_Scale 14
Initialize the rotation parameter table SCL_InitRotateTable 15
Set rotation view SCL_SetRotateViewPoint 16
Set the display rotate center coordinates SCL_SetRotateCenterDisp 17
Set rotation center SCL_SetRotateCenter 18
Scroll rotate (angle : absolute coord.) SCL_RotateTo 19
Scroll rotate (angle : relative coord.) SCL_Rotate 20
Set scale coefficient data in therotate coefficient table SCL_SetCoefficientData 21
Set mosaic process SCL_SetMosaic 22
[Line Screen Setting Functions]
Set line color screen data SCL_SetLncl 23
Set back screen data SCL_SetBack 24
[Window Setting Functions]
Set normal rectangle window SCL_SetWindow 25
Set normal line window SCL_SetLineWindow 26
Set sprite window SCL_SetSpriteWindow 27
User's Guide 2 Graphics Library 63
Function Function Name Number
[Functions Related to VDP1]
Set different sprite modes SCL_SetSpriteMode 28
[Functions Related to Color RAM]
Set color RAM mode SCL_SetColRamMode 29
Get color RAM mode SCL_GetColRamMode 30
Set color RAM color data SCL_SetColRamCol 31
Allocate area for color RAM SCL_AllocColRam 32
Free area allocated for color RAM SCL_FreeColRam 33
Set auto color change SCL_SetAutoColChg 34
Get the color RAM address offset SCL_GetColRamOffset 35
[Functions Related to Priority]
Set priorities SCL_SetPriority 36
Get priorities SCL_GetPriority 37
[Functions Related to Color Calculations]
Set color calculation conditions (SPRITE) SCL_SetColMixMode 38
Set color calculation mix SCL_SetColMixRate 39
Set auto color calculation SCL_SetAutoColMix 40
[Functions Related to Color Offset]
Set color offset SCL_SetColOffset 41
Increase and decrease the color offset value SCL_IncColOffset 42
Set the auto color offset SCL_SetAutoColOffset 43
[Other Special Effect Functions]
Enable blur calculations SCL_EnableBlur 44
Disable blur calculations SCL-DisableBlur 45
Enable line color screen SCL_EnableLineCol 46
Disable line color screen SCL_DisableLineCol 47
Set shadow bit SCL_SetShadowBit 48
[Functions Related to V-BLANK Interrupt Processing]
Set frame change interval count SCL_SetFrameInterval 49
Wait for frame change request to end SCL_DisplayFrame 50
V-BLANK start VDP interrupt processing SCL_VblankStart 51
V-BLANK end VDP interrupt processing SCL_VblankEnd 52
[Abort Function]
Force abort of automatic VE SCL_AborAutoVe 53
64
2.3 Function Specifications
Title Function Function Name No
Function Specification Initialize library SCL_Vdp2Init 1
Format void SCL_Vdp2Init(void)
Input None
Output None
Function Value None
Function Initializes the library. This command must be executed once
before using the library.
Title Function Function Name No
Function Specification Set display mode SCL_SetDisplayMode 2
Format void SCL_SetDi spl ayMode(Ui nt 8 i nt e rl ace, Ui nt 8 ve rt i cal, Ui nt 8
ho ri zont al)
Input interlace : Interlace mode setting
SCL_NON_INTER : Noninterlace
SCL_SINGLE_INTER : Single interlace
SCL_DOUBLE_INTER : Double interlace
vertical : Vertical resolution bit
SCL_224LINE : 224 lines
SCL_240LINE : 240 lines
SCL_256LINE : 256 lines
horizontal : Horizontal resolution bit
SCL_NORMAL_A : 320 Pixels
: Normal Graphic A
SCL_NORMAL_B : 352 Pixels
: Normal Graphic B
SCL_HIRESO_A : 640 Pixels
: Hi-res Normal Graphic A
SCL_HIRESO_B :704 Pixels
: Hi-res Normal Graphic B
SCL_NORMAL_AE : 320 Pixels
: Custom Normal Graphic A
SCL_NORMAL_BE : 352 Pixels
: Custom Normal Graphic B
SCL_HIRESO_AE : 640 Pixels
: Custom Hi-res Graphic A
SCL_HIRESO_BE : 704 Pixels
: Custom HIi-res Graphic B
Output None
Function Value None
Function Sets the display mode.
Comments When changing the horizontal resolution from A to B, SH2
clock changes from 76 to 78. (Example: SCL_NORMAL)A →
SCL_NORMAL_B) Be careful because VDP1 and VDP2 settings
are reset at this time.
User's Guide 2 Graphics Library 65
Title Function Function Name No
Function Specification Initialize VRAM configuration table 3
SCL_InitVramConfigTb
Format void SCL_InitVramConfigTb(SclVramConfig *tp)
Input tp : VRAM configuration table
Output None
Function Value None
Function Writes the default values to the VRAM configuration table.
Title Function Function Name No
Function Specification Initialize scroll configuration data 4
SCL_InitConfigTb
table
Format void SCL_InitConfigTb(SclConfig *scfg)
Input scfg : Scroll configuration data
Output None
Function Value None
Function Initializes the scroll configuration data table.
Title Function Function Name No
Function Specification Set the VDP2 VRAM usage method SCL_SetVramConfig 5
Format void SCL_SetVramConfig(SclVramConfig *tp)
Input tp : VRAM configuration table.
Output None
Function Value None
Function Sets the VDP2 VRAM usage method.
Example Allocates VRAM B; each bank is identified for RBG0 character
and pattern name data.
sample()
{
SclVramConfig tp;
SCL_InitVramConfigTb(&tp);
tp.vramModeB = ON
tp.vramB0 = SCL_RBG0_CHAR; /* Places RBG0 character data */
tp.vramB1 = SCL_RBG0_PN; /* Places RBG0 pattern name data */
SCL_SetVramConfig(&tp);
}
66
Title Function Function Name No
Function Specification Set the scroll configuration SCL_SetConfig 6
Format void SCL_SetConfig(Uint16 sclnum, SclConfig *scfg)
Input sclnum : scroll screen number
Select one of six screens SCL_NBG0, SCL_NBG1,
SCL_NBG2, SCL_NBG3, SCL_RBG0, SCL_RBG1
scfg : Scroll configuration table pointer
Output None
Function Value None
Function Sets the scroll configuration.
Comments When setting rotation screen data, the SCL_IntRotateTable()
must be run first.
Title Function Function Name No
Function Specification Set VRAM cycle pattern table SCL_SetCycleTable 7
Format void SCL_SetCycleTable(Uint16 *tp)
Input tp : Cycle pattern table
Output None
Function Value None
Function Sets the cycle pattern table.
Comments If the cycle pattern table is not set correctly, the normal scroll
screen will not display properly. It is advised to have an
understanding of Chapter 3 RAM, “3.4 VRAM Access Methods
During Display Intervals” in the VDP2 User’s Manual.
Example 1 Image : NBG0 256 colors (with 1/2 scale display)
VRAM A: Places the NBG0 character pattern data.
VRAM B : Places the NBG0 pattern name table.
Uint16 cycle[] = { /* Cycle pattern table */
0x4444, 0xffff, /* VRAM A(A0) */
0xffff, 0xffff, /* VRAM A1 Not used */
0x00ff, 0xffff, /* VRAM B(B0) */
0xffff, 0xffff, /* VRAM B1 Not used */
}
sample()
{
SCL_SetCycleTable(&cycle);
}
User's Guide 2 Graphics Library 67
Example 2 Image : NBG0 16.77 million colors bitmap data
VRAM A: Places the NBG0 bitmap data.
VRAM B : Places the NBG0 bitmap data.
Uint16 cycle[] = { /* Cycle pattern table */
0x4444, 0x4444, /* VRAM A(A0) */
0xffff, 0xffff, /* VRAM A1 Not used */
0x4444, 0x4444, /* VRAM B(B0) */
0xffff, 0xffff, /* VRAM B1 Not used */
}
sample()
{
SCL_SetCycleTable(&cycle);
}
Example 3 Image : RBG0 256 color bitmap data
NBG0 16 colors bitmap data (1/4 reduced)
NBG1 16 colors bitmap data (1/2 reduced)
NBG2 16 colors character data / pattern name data
NBG3 16 colors character data / pattern name data
VRAM A0 : Places the RBG0 bitmap data.
VRAM A1 : Places the rotate parameter coefficient table.
Places the rotate parameter table.
VRAM B0 : Places the NBG0 bitmap data.
Places the NBG1 bitmap data.
VRAM B1 : Places NBG2 character and pattern name data
Places NBG3 character and pattern name data
Uint16 cycle[] = {
0xffff, 0xffff,
0xffff, 0xffff,
0x4444, 0xff55,
0x23ff, 0x67ff,
}
sample()
{
SCLVramConfig tp;
SCL_InitVramConfigTb(&tp);
tb.vramModeA = ON
tp.vramA0 = SCL_RBG0_CHAR;
tp.vramA1 = SCL_RGB0_K;
SCL_SetVramConfig(&tp);
SCL_SetCycleTable(&cycle);
}
68
Title Function Function Name No
Function Specification Scroll open process SCL_Open 8
Format void SCL_Open(Uint32 sclnum)
Input sclnum : Select the scroll screen number or 4 rotate parameter
table normal screens (SCL_NBG0, SCL_NBG1,
SCL_NBG2, SCL_NBG3), or rotate parameter table
A, B (SCL_RBG_TB_A, SCL_RBG_TB_B).
Output None
Function Value None
Function Depending on the scroll screen selected, the following
functions become available for use.
SCL_SetLineParam SCL_Move SCL_MoveTo
SCL_Scale SCL_Rotate SCL_RotateTo
Title Function Function Name No
Function Specification Scroll close process SCL_Close 9
Format void SCL_Close(void)
Input None
Output None
Function Value None
Function Closes the functions selected with SclOpen().
Title Function Function Name No
Function Specification Initialize line and vertical cell scroll parameter 10
SCL_InitLineParamTb
table
Format void SCL_InitLineParamTb(SclLineParam *lp)
Input lp : Line & vertical scroll parameter data
Output None
Function Value None
Function Initializes the line and cell scroll parameter table.
User's Guide 2 Graphics Library 69
Title Function Function Name No
Function Specification Set line and vertical cell scroll 11
SCL_SetLineParam
parameters
Format void SCL_SetLineParam(SclLineParam *lp)
Input lp : Line parameter table
Output None
Function Value None
Function None
Remarks Runs from the time that SclOpen() is executed until SclClose()
is executed. It can only set NBG0, NBG1.
Title Function Function Name No
Function Specification Move scroll (Amount of move : 12
SCL_MoveTo
absolute coord.)
Format void SCL_MoveTo(Fixed32 x, Fixed32 y, Fized32 z)
Input Indicates the coordinates of where to put the scroll screen.
x : X coordinates
y : Y coordinates
z : Z coordinates
Output None
Function Value None
Function Moves the scroll to absolute coordinates
Remarks Runs from the time that SclOpen() is executed until SclClose()
is executed. The Z coordinate can only be used with the rotate
parameter table.
Title Function Function Name No
Function Specification Move scroll (Amount of move : 13
SCL_Move
relative coord.)
Format void SCL_Move(Fixed32 x, Fixed32 y, Fized32 z)
Input x : Indicates move distance in X direction
y : Indicates move distance in Y direction
z : Indicates move distance in Z direction
Output None
Function Value None
Function Moves the scroll relatively
Remarks Runs from the time that SclOpen() is executed until SclClose()
is executed. The Z coordinate can only be used with the rotate
parameter table.
70
Title Function Function Name No
Function Specification Enlarge or reduce scroll SCL_Scale 14
Format void SCL_Scale(Fixed32 sx, Fixed32 sy)
Input sx : Size designation in the X direction
sy : Size designation in the Y direction
NBG0, NBG1 : 1/4~256
RBG0, RBG1 : Free
Output None
Function Value None
Function Scales the scroll screen.
Comments Runs from the time that SclOpen() is executed until SclClose()
is executed. NBG2, NBG3 cannot be used.
Title Function Function Name No
Function Specification Initialize the rotation parameter table SCL_InitRotateTable 15
Format Uint32 SCL_InitRotateTable(Uint32 address, Uint16 num,
Uint32 rotateA, Uint32 rotateB)
Input address : Indicates the address to place the rotate parameter
table.
num : Table Count
1 : Only uses rotate parameter A
2 : Uses rotate parameters A and B
rotateA : Select what to display using rotate parameter A.
SCL_SPR : Only display the sprite frame buffer
SCL_RBG0 : Display RBG0 and sprite frame buffer
SCL_NON : Do not display
rotateB : Select what to display using rotate parameter B.
SCL_RBG0 : Display RBG0
SCL_RBG1 : Display RBG1
SCL_ NON : Do not display
Output None
Function Value 0: Normal
1: Misallocation
2: Contradictions in the settings
Function Initializes the rotate parameter table and sets which location in
VRAM to place the rotate parameter table.
Comments When using both rotate parameter tables A and B, screen
repetition, XY axis rotate combination and Y axis rotation will
not display correctly unless window display is designated.
User's Guide 2 Graphics Library 71
Title Function Function Name No
Function Specification Set rotation view SCL_SetRotateViewPoint 16
Format void SCL_SetRotateViewPoint(Uint16 x, Uint16 y, Uint16 z)
Input x : X coordinates
y : Y coordinates
z : Z coordinates
Output None
Function Value None
Function Sets the rotate viewpoint.
Comments Runs from the time that SclOpen() is executed until SclClose()
is executed. SCL_NBG0~3 cannot be used.
Title Function Function Name No
Function Specification Set rotation center SCL_SetRotateCenter 17
Format void SCL_SetRotateCenterDisp(Uint16 x, Uint16 y)
Input x : X coordinates
y : Y coordinates
z : Z coordinates
Output None
Function Value None
Function Sets the rotate center point.
Comments Runs from the time that SclOpen() is executed until SclClose()
is executed. SCL_NBG0~3 cannot be used.
Title Function Function Name No
Function Specification Set the display rotate center coordinates SCL_SetRotateCenterDisp 18
Format void SCL_SetRotateCenter(Uint16 x, Uint16 y, Uint16 z)
Input x : X coordinates
y : Y coordinates
Output None
Function Value None
Function Sets the display rotate center point.
Comments Runs from the time that SclOpen() is executed until SclClose()
is executed. SCL_NBG0~3 cannot be used.
72
Title Function Function Name No
Function Specification Scroll rotate (angle : absolute coord.) SCL_RotateTo 19
Format void SCL_RotateTo(Fixed32 angelXy, Fixed32 angleZ, Fixed32
angleD, Uint16 mode)
Input angelXy : Sets the X axis or Y axis angle
angleZ : Sets the Z axis angle
angleD : Sets the screen rotate angle
mode : Rotate mode. Sets which axis, X or Y, to enable as
the first argument.
SCL_X_AXIS : Rotate scroll X axis.
SCL_Y_AXIS : Rotate scroll Y axis. (Can’t use with
RBG1 screen designation.)
Output None
Function Value None
Function Rotate scroll screen.
Comments Runs from the time that SclOpen() is executed until SclClose()
is executed. SCL_NBG0~3 cannot be used.
Title Function Function Name No
Function Specification Scroll rotate (angle : relative coord.) SCL_Rotate 20
Format void SCL_Rotate( Fi xed32 angelXy, Fi xed32 angleZ, Fi xed32 angleD)
Input angelXy : Sets the X axis or Y axis angle increase
angleZ : Sets the Z axis angle increase
angleD : Sets the screen rotate angle increase
Output None
Function Value None
Function Rotates the rotate scroll screen.
Comments Runs from the time that SclOpen() is executed until SclClose()
is executed. SCL_NBG0~3 cannot be used.
User's Guide 2 Graphics Library 73
Title Function Function Name No
Function Specification Set scale coefficient data in therotate 21
SCL_SetCoefficientData
parameter coefficient table
Format void SCL_SetCoefficientData(Uint32, surface, Uint16
*datap, Uint16 x, Uint16 y)
Input surface : Indicates which rotate parameter table to use for
data set. (SCL_RBG_TB_A, SCL_RBG_TB_B)
datap : Data table pointer.
x : X data size
y : Y data size
Output None
Function Value None
Function Sets scale coefficient data into the rotate coefficient table.
Title Function Function Name No
Function Specification Set mosaic process SCL_SetMosaic 22
Format void SCL_SetMosaic(Uint32 surface, Uint8 x, Uint8 y)
Input surface: Screen Type
SCL_NBG0 | SCL_NBG1 |SCL_NBG2 | SCL_NBG3 |
SCL_RBG0 | SCL_RBG1
x : Horizontal size of the mosaic (0~15, 0 is mosaic off)
y : Vertical size of the mosaic (0~15)
Cannot set for rotate surface (RBG0, RBG1).
Output None
Function Value None
Function Sets the mosaic functions for each screen.
Comment If the mosaic process is used, the vertical cell scroll function
cannot be used.
74
Title Function Function Name No
Function Specification Set line color screen data SCL_SetLncl 23
Format void SCL_Lncl(Uint32 address, Uint16 tbsize, Uint16
*palNumTb)
Input address : Location in VRAM to place the line color table
tbsize : Indicates the size of the table
PalNumTb : Indicates each line data with the palette number.
16 color 0~15
256 colors 0~255
2048 colors 0~2047
Output None
Function Value None
Function Sets the line color screen data.
Comments Set the pallet data into color RAM using the SCL_AllocRam()
and SCL_SetColRam() beforehand.
Title Function Function Name No
Function Specification Set back screen data SCL_SetBack 24
Format void SCL_SetBack( Ui nt 32 address, Ui nt 16 dataSi ze, Ui nt 16 *dataTb)
Input address : Location in VRAM to place the line color table
dataSize : Indicates the number of data tables
dataTb : Indicates each line data in 5bitRGB.
Output None
Function Value None
Function Sets the back screen data and address.
Example Sets back screen address in VRAM and sets the color to black.
void sample(void)
{
Uint16 DataTB;
DataTB = 0x0000;
SCL_SetBack(SCL_VDP2_VRAM, 1, &DataTB);
}
User's Guide 2 Graphics Library 75
Title Function Function Name No
Function Specification Set normal rectangle window SCL_SetWindow 25
Format void SCL_SetWindow ( Ui nt 8 wi n, Ui nt 32 l ogi c, Ui nt 32 enabl e, Ui nt 32
ar ea, Ui nt 16 st ar t X, Ui nt 16 st ar t Y, Ui nt 16 endX, Ui nt 16 endY)
Input win : Indicates the type of window.
SCL_W0: Indicates a W0 window
SCL_W1: Indicates a W1 window
logic : Here, layering of multiple windows on the screen is
processed by AND. Default is OR.
enable : Indicates the screen to display the window on.
area : Indicates use of the outside area of a window,
default is inside area.
The variables logic, enable and area can be calculated together
by using OR.
Constant logic enable area Meaning
SCL_NBG0 Transparent process window NBG0
SCL_NBG1 Transparent process window NBG1
SCL_NBG2 Transparent process window NBG2
SCL_NBG3 Transparent process window NBG3
SCL_RBG0 Transparent process window RBG0
SCL_RBG1 Transparent process window RBG1
SCL_EXBG Transparent process window EXBG
SCL_SPR Transparent process window sprite
SCL_RP ∆ Rotate parameter window
SCL_CC Color calculation window
SCL_NON Not indicated
: Can be designated ∆: Cannot be designated on a sprite window
startX : Rectangle data start point X coordinate
startY : Rectangle data start point Y coordinate
endX : Rectangle data end point X coordinate
endY : Rectangle data end point Y coordinate
Output None
Function Value None
Function Sets normal rectangle windows.
76
Title Function Function Name No
Function Specification Set normal line window SCL_SetLineWindow 26
Format void SCL_SetLineWindow ( Ui nt 8 wi n, Ui nt 32 l ogic, Ui nt 32 enabl e,
Ui nt 32 a rea, Ui nt 32 address, Ui nt 32 sy, Ui nt 32 t bSi ze, Sc lLi nW
i ndowTb
*t b)
Input win : Indicates the type of window
SCL_W0: Indicates a W0 window
SCL_W1: Indicates a w1 window
logic : Here, layering of multiple windows on the screen is
processed by AND. Default is OR.
enable : Indicates the screen to display the window on.
area : Indicates use of the outside area of a window,
default is inside area.
address : Location of the line window table in VRAM.
sy : Lead Y coordinate.
tbSize : Size of the line window table
tb : Line window table pointer
The variables logic, enable and area can be calculated together
by using OR.
Output None
Function Value None
Function Sets normal line window.
Title Function Function Name No
Function Specification Set sprite window SCL_SetSpriteWindow 27
Format void SCL_SetSpriteWindow ( Ui nt 32 l ogic, Ui nt 32 enabl e, Ui nt 32
a rea)
Input logic : Here, layering of multiple windows on the screen is
processed by AND. Default is OR.
enable : Indicates the screen to display the window on.
area : Indicates use of the outside area of a window,
default is inside area.
The variables logic, enable and area can be calculated together
by using OR.
Output None
Function Value None
Function Sets the sprite line window.
Comments Sprites for the window must be prepared in advance using
VDP1.
User's Guide 2 Graphics Library 77
Title Function Function Name No
Function Specification Set different sprite modes SCL_SetSpriteMode 28
Format void SCL_SetSpriteMode ( Ui nt 8 t ype, Ui nt 8 colMode, Ui nt 8 wi nMode)
Input type : Sprite type
SCL_SPR_TYPE0, SCL_SPR_TYPE1 . . . SCL_SPR_TYPEF
colMode : Color mode
SCL_PALETTE, SCL_MIX
(SCL_MIX: palette and RGB mixture)
winMode: Window mode
SCL_MSB_SHADOW, SCL_SP_WINDOW
Output None
Function Value None
Function Sets the sprite type.
Title Function Function Name No
Function Specification Set color RAM mode SCL_SetColRamMode 29
Format void SCL_SetColRamMode(Uint32 mode)
Input mode : Color RAM mode
SCL_CRM15_1024, SCL_CRM15_2048, SCL_CRM24_1024
Output None
Function Value None
Function Sets the color RAM mode.
Title Function Function Name No
Function Specification Get color RAM mode SCL_GetColRamMode 30
Format Uint32 SCL_GetColRamMode(void)
Input None
Output None
Function Value Color RAM mode
SCL_CRM15_1024, SCL_CRM15_2048, SCL_CRM24_1024
Function Sets the color RAM mode.
78
Title Function Function Name No
Function Specification Set color RAM color data SCL_SetColRam 31
Format void SCL_SetColRam(Uint32 surface, Uint32 index, Uint32
num, void *color)
Input surface : Screen type
SCL_SPR, SCL_NBG0, SCL_NBG1, SCL_NBG2, SCL_NBG3,
SCL_RBG0, SCL_RBG1, SCL_LNCL
index : Write start palette number
num : Size of the color data table
color : Color data table (Unit 32 or Unit 16)
Output None
Function Value None
Function Sets color data into the color RAM.
Comments If using color RAM commonly, you can set just one of the
screens if desired.
Title Function Function Name No
Function Specification Allocate area for color RAM SCL_AlllocColRam 32
Format Uint32 SCL_AllocColRam(Uint32 surface, Uint32 numOfColors,
Uint8 transparent)
Input surface : Screen type
SCL_SPR | SCL_NBG0 | SCL_NBG1 | SCL_NBG2| SCL_NBG3|
SCL_RBG0| SCL_RBG1| SCL_LNCL
Use OR calculation to use the same palette for multiple screens.
numOfColors: Number of colors
transparent: Sets whether to use transparent or not.
ON Palette 0 is not transparent
OFF Palette 0 is transparent
Output None
Function Value The lead allocated address
Function Allocates the color RAM area.
Title Function Function Name No
Function Specification Free area allocated for color RAM SCL_FreeColRam 33
Format void SCL_FreeColRam(Uint32 surface)
Input surface : Screen type
SCL_SPR | SCL_NBG0 | SCL_NBG1 | SCL_NBG2 | SCL_NBG3 |
SCL_RBG0 | SCL_RBG1
Use OR calculation to use the same palette for multiple screens.
Output None
Function Value None
Function Frees the area allocated for color RAM.
User's Guide 2 Graphics Library 79
Title Function Function Name No
Function Specification Set auto color change SCL_SetAutoColChg 34
Format void SCL_SetAutoColChg ( Ui nt 32 sur f ace, Ui nt 32 i nt e rval, Ui nt 32
i ndex, Ui nt 32 numOf Col, Ui nt 32 numOf Tbl , Ui nt 32 changeTbl [ ] )
Input surface : Screen type
SCL_SPR, SCL_NBG0, SCL_NBG1, SCL_NBG2, SCL_NBG3,
SCL_RBG0, SCL_RBG1
interval : Interval
designated in units of 1/60th of a second
index : Start palette number to be changed
numOfCol: Number of colors
numOfTbl: Number of Tables
changeTbl[]: Change tables
Output None
Function Value None
Function Changes a portion of each pallet a little at a time towards a
specific color. The number of pallets is limited to 256 colors. It
is not compatible with 2048, or 1024 colors.
Title Function Function Name No
Function Specification Get the color RAM address offset SCL_GetColRamOffset 35
Format Uint32 = SCL_GetColRamOffset(Uint32 surface)
Input surface : Screen type
SCL_SPR, SCL_NBG0, SCL_NBG1, SCL_NBG2, SCL_NBG3,
SCL_RBG0, SCL_RBG1
Output None
Function Value Offset address from the VDP2 VRAM.
Function Gets the color RAM address offset.
Title Function Function Name No
Function Specification Set priorities SCL_SetPriority 36
Format void SCL_SetPriority(Uint32 surface, Uint8 priority)
Input surfaces : Screen types
SCL_SP0|SCL_SP1. . . SCLSP7|SCL_NBG0|SCL_NBG1|
SCL_NBG2| SCL_NBG3| SCL_RBG0|SCL_RBG1|SCL_EXBG
priority : Priority number
Output None
Function Value None
Function Sets the priority.
80
Title Function Function Name No
Function Specification Get priorities SCL_GetPriority 37
Format Uint8 Priority = SCL_GetPriority(Uint32 surface)
Input surfaces : Screen types
SCL_SPR, SCL_NBG0, SCL_NBG1, SCL_NBG2, SCL_NBG3,
SCL_RBG0, SCL_RBG1, SCL_EXBG
priority : Priority number
Output None
Function Value None
Function Gets the priority.
Title Function Function Name No
Function Specification Set color calculation conditions (SPRITE) SCL_SetColMixMode 38
Format void SCL_SetColMixMode(Uint32 colMixPriority, Uint8 mode)
Input colMixPriority : Sprite priority number
0~7
mode : Mode
SCL_IF_FRONT, SCL_IF_EQUAL, SCL_IF_BEHIND
Output None
Function Value None
Function Sets the color calculation conditions.
Title Function Function Name No
Function Specification Set color calculation mix SCL_SetColMixRate 39
Format void SCL_SetColMixRate(Uint32 surfaces, Uint8 rate)
Input surfaces : Screen types
SCL_SP0|SCL_SP1. . . SCL_SP7|SCL_NBG0|SCL_NBG1|
SCL_NBG2| SCL_NBG3| SCL_RBG0,|SCL_RBG1|SCL_EXBG
Use OR calculation to use the same palette for multiple screens
rate : Rate
0~31
Output None
Function Value None
Function Sets the color calculation rate.
User's Guide 2 Graphics Library 81
Title Function Function Name No
Function Specification Set auto color calculation SCL_SetAutoColMix 40
Format void SCL_SetAutoColMix(Uint32 surfaces, Uint32 interval,
Uint32 time, uint8 startRate, Uint8 endRate)
Input surfaces : Screen types
SCL_SP0|SCL_SP1. . . SCL_SP7|SCL_NBG0|SCL_NBG1|
SCL_NBG2| SCL_NBG3| SCL_RBG0,|SCL_RBG1|SCL_EXBG
Use OR calculation to use the same palette for multiple screens
interval : Interval
Designated in units of 1/60th of a second.
time : Indicates the time to complete the color change.
Designated in units of 1/60th of a second.
startRate : Rate at the starting point
endRate : Rate at the ending point
Output None
Function Value None
Function Changes the color mix according the designated time or
interval.
Title Function Function Name No
Function Specification Set color offset SCL_SetColOffset 41
Format void SCL_SetColOffset(Uint32 offsetreg, Uint32 surfaces,
Sint16 red, Sint16 green, Sint16 blue)
Input offsetreg : Indicates which color offset register to use.
SCL_OFFSET_A, SCL_OFFSET_B
surfaces : Screen types
SCL_SP0|SCL_SP1. . . SCL_SP7|SCL_NBG0|SCL_NBG1|
SCL_NBG2| SCL_NBG3| SCL_RBG0|SCL_RBG1|SCL_EXBG
Use OR calculation to use the same palette for multiple screens
Red : Color indicator (red)
green : Color indicator (green)
blue : Color indicator (blue)
Output None
Function Value None
Function Sets the color offset.
82
Title Function Function Name No
Function Specification Increase/decrease the color offset SCL_IncColOffset 42
value
Format void SCL_IncColOffset(Uint16 offsetReg, Sint16 red,
Sint16 green, Sint16 blue)
Input offsetreg : Indicates which color offset register to use.
SCL_OFFSET_A, SCL_SCL_OFFSET_B
red : Color indicator (red) -255~255
green : Color indicator (green) -255~255
blue : Color indicator (blue) -255~255
Output None
Function Value None
Function Increases/decrease the color offset values.
Title Function Function Name No
Function Specification Set the auto color offset SCL_SetAutoColOffset 43
Format void SCL_SetAutoColOffset ( Ui nt 32 off setReg, Ui nt 32 i nt e rval,
Ui nt 32 t i me, Sc lRgb *sta rt , Sc lRgb *end )
Input offsetreg : Indicates which color offset register to use.
SCL_OFFSET_A, SCL_OFFSET_B
interval : Interval
Designated in units of 1/60th of a second.
time : Indicates the time to complete the color change.
Designated in units of 1/60th of a second.
start : Start color indicator (red) -255~255
: Start color indicator (green) -255~255
: Start color indicator (blue) -255~255
end : End color indicator (red) -255~255
: End color indicator (green) -255~255
: End color indicator (blue) -255~255
Output None
Function Value None
Function Changes the color offset according to the designated time or
interval.
User's Guide 2 Graphics Library 83
Title Function Function Name No
Function Specification Enable blur calculations SCL_EnableBlur 44
Format void SCL_EnableBlur(Uint32 surface)
Input surfaces : Screen types
SCL_SPR, SCL_NBG0, SCL_NBG1, SCL_NBG2, SCL_NBG3,
SCL_RBG0, SCL_RBG1, SCL_EXBG
Output None
Function Value None
Function Enables blur calculations.
Title Function Function Name No
Function Specification Disable blur calculations SCL_DisableBlur 45
Format void SCL_DisableBlur(void)
Input None
Output None
Function Value None
Function Disables blur calculations.
Title Function Function Name No
Function Specification Bring in line color screen SCL_EnableLineCol 46
Format void SCL_EnableLineCol(Uint32 surface);
Input surfaces : Screen types
SCL_SPR, SCL_NBG0, SCL_NBG1, SCL_NBG2, SCL_NBG3,
SCL_RBG0, SCL_RBG1, SCL_EXBG
Output None
Function Value None
Function Brings in line color screens.
Title Function Function Name No
Function Specification Disable line color screen SCL_DisableLineCol 47
Format void SCL_DisableLineCol(Uint32 surface);
Input surfaces : Screen types
SCL_SPR, SCL_NBG0, SCL_NBG1, SCL_NBG2, SCL_NBG3,
SCL_RBG0, SCL_RBG1, SCL_EXBG
Output None
Function Value None
Function Disables line color screens.
84
Title Function Function Name No
Function Specification Set shadow bit SCL_SetShadowBit 48
Format void SCL_SetShadowBit(Uint32 enable);
Input enable : Indicates which screen will have shadow. Use OR
to indicate multiple screens simultaneously.
SCL_NBG0| SCL_NBG1| SCL_NBG2|SCL_NBG3|
SCL_RBG0| SCL_RBG1|SCL_BACK|SCL_EXBG|SCL_NON
Output None
Function Value None
Function Sets the shows bit.
Comments Shadow sprites must be prepared in advance using VDP1.
Title Function Function Name No
Function Specification Set frame change interval count SCL_SetFrameInterval 49
Format void SCL_SetFrameInterval(Uint16 count)
Input count : V-BLANK interval count
Output None
Function Value None
Function Sets the frame change interval count.
The interval count values have the following meanings.
0 = Frame change is set to auto change mode and the
interval count to 1. Cannot be synchronous with
SCL_DisplayFrame().
1 = Frame change is set to auto change mode and the
interval count to 1. Can be synchronous with
SCL_DisplayFrame().
0xffff = Frame change is set to undefined interval manual
change mode. Confirms VDP1 draw end before
frame change.
0xfffe = Undefined interval manual change mode through V-BLANK
erase. Changes frame without confirming VDP1 draw end.
Other = Frame change is set to defined interval manual
change mode through the designated interval count.
b15=0: Does erase write.
=1: Does not erase write.
Title Function Function Name No
Function Specification Wait for frame change request to end SCL_DisplayFrame 50
Format void SCL_DisplayFrame(void)
Input None
Output None
Function Value None
Function Turns on the frame change request flag and waits for the
V-BLANK interrupt routine sprite and scroll frame display to
end.
User's Guide 2 Graphics Library 85
Title Function Function Name No
Function Specification V-BLANK start VDP interrupt processing SCL_VblankStart 51
Format void SCL_VblankStart(void)
Input None
Output None
Function Value None
Function VDP1, 2 display V-BLANK start processing (scroll parameter
set, etc.).
Title Function Function Name No
Function Specification V-BLANK end VDP interrupt processing SCL_VblankEnd 52
Format void SCL_VblankEnd(void)
Input None
Output None
Function Value None
Function VDP1, 2 display V-BLANK end processing (scroll parameter
set, etc.).
Title Function Function Name No
Function Specification Force abort of automatic VE SCL_AbortAutoVE 53
Format void SCL_AbortAutoVE(void)
Input None
Output None
Function Value None
Function Forced abort of automatic VE.
86
Mathematical Calculation Library
1.0 Guide
1.1 Objective
The mathematical calculation library is a group of routines designed to simplify 3D
display, 3D object move calculations, 32-bit fixed decimal calculations, etc.
These routines are separated into the following categories.
• Triangle Functions
Sin, cos values are pulled from the table. Tables are recorded once each, and
between each is a straight line complement.
• Matrix Calculation Processing
Used for matrix stack control and matrix combination processing.
• 3D Coordinate Conversion Processing through the DSP
The polygon data hide surface determination, brightness calculation and coordi-
nate conversion process used by the sprite 3D display library are all done together
by the DSP.
• Perspective Conversion Process
Perspective conversion is done using the view coordinate system to convert from
3D to 2D screen. The view point position is the origin point and the screen posi-
tion is the Z axis -1.0 position.
• Random Number Generator
Generates random numbers with a range of 0 to 0xffffffff that are used in games.
User's Guide 2 Graphics Library 87
• Spline Curve Calculation
This curve calculation function is used to calculate 3D spline curves and has the
following characteristics.
1) Supports both 2D and 3D coordinate systems.
2) Can get the output coordinate connecting vectors.
As shown in Figure 1, by just specifying a few points, the curve that passes
through those points can be extrapolated. In Figure 1, the input coordinates are
P0~3; by entering the number of points to be entered, four, and the number of
points wanted, 10, then the output coordinates that pass through those points are
shown by c0~c9. Also, by using a connecting line function, the connecting vector
of the output coordinates can be obtained. Connecting line vectors can be used
for character direction, etc.
P0~P3: Input Coordinates
c0~c9: Output Coordinates
Figure 1 Curve Calculation Diagram
• Fixed Point Calculation
There are routines and macros for 32-bit fixed point data (16 bit integer + 16 bit
decimal), multiplication and division calculations, and integer, floating point data
compatibility conversion.
• Other Functions
Calculation function other than that listed above.
88
2.0 Reference
2.1 Data Specifications
Title Data Data Name No
Data Specification 2D Point Data MthXy
typedef struct MthXy {
Fixed32 x;
Fixed32 y;
} NthXy;
Title Data Data Name No
Data Specification 3D Data Structure MthXyz
typedef struct MthXyz {
Fixed32 x;
Fixed32 y;
Fixed32 z;
} MthXyz;
Title Data Data Name No
Data Specification 3 Line, 4 Column Matrix Data MthMatrix
typedef struct MthMatrix {
Fixed32 val[3][4];
} MthMatrix
Title Data Data Name No
Data Specification Matrix Stack Table MthMatrixTbl
typedef struct MthMatrixTbl {
Uint16 */
MthMatrix */
MthMatrix */
} MthMatrixTbl;
User's Guide 2 Graphics Library 89
Title Data Data Name No
Polygon Data Coordinate Conversion
Data Specification Parameter
MthPolyTransParm
typedef struct MthPolyTransParm {
MthViewLight *viewLight; /* Coord. system conversion parameters
Uint32 surfCount;
MthXyz *surfPoint; Point on polygon for brightness calculation*/
MthXyz *surfNormal;
Sint32 *surfBright; Polygon surface brightness calc. results*/
Uint32 transViewVertCount;
MthXyz *transViewVertSrc;
MthXyz *transViewVertAns;
Uint32 gourVertCount; Vertex point brightness vertex entries */
MthXyz *vertNormal; Vertex point brightness calc. normal
Sint32 *vertBright;
Uint32 transWorldVertCount; /* World coord. conversion vertex entries */
MthXyz *transWorldVertSrc;
MthXyz *transWorldVertAns;
} MthPolyTransParm;
Title Data Data Name No
Data Specification Coordinate System Conversion Parameters MthViewLight
typedef struct MthViewLight {
MthMatrix viewMatrix; Conversion matrix to view coordinates */
MthXyz lightVector; /* Light source toggle in view coord. sys*/
MthMatrix worldMatrix; Conversion matrix to world coord. sys.*/
} MthViewLight;
90
2.2 List of Functions
Function Function Name Number
<Triangle Functions>
sin function MTH_Sin 1
cos function MTH_Cos 2
atan function MTH_Atan 3
<Matrix Calculation>
Initialize matrix stack MTH_InitialMatrix 4
Clear current matrix MTH_ClearMatrix 5
Push matrix MTH_PushMatrix 6
Pop matrix MTH_PopMatrix 7
Combine matrix and move horizontally MTH_MoveMatrix 8
Combine matrix and rotate X MTH_RotateMatrixX 9
Combine matrix and rotate Y MTH_RotateMatrixY 10
Combine matrix and rotate Z MTH_RotateMatrixZ 11
Combine matrix and reverse Z MTH_ReverseZ 12
Matrix calculation and multiplication MTH_MulMatrix 13
Matrix calculation and vertex coordinate conversion MTH_CordTrans 14
Matrix calculation, line toggle coordinate conversion MTH_NormalTrans 15
<3D Polygon Data Coordinate Conversionthrough the DSP>
Initialize Coordinate Conversion Process MTH_PolyDataTransInit 16
Execute the Coordinate Conversion Process MTH_PolyDataTansExec 17
Check the Coordinate Conversion Process MTH_PolyDataTransCheck 18
<Perspective Conversion>
3D perspective conversion MTH_Pers2D 19
<Random Number Generator>
Initialize the Random Number Generator MTH_InitialRand 20
Get Random Number MTH_GetRand 21
<Spline Curve Calculation>
Curve calculation, work area definition macro MTH_INIT_CURVE 22
Curve calculation, 2D MTH_Curve2 23
Curve calculation, 2D with tangent MTH_Curve2t 24
Curve calculation, 3D MTH_Curve3 25
Curve calculation, 3D with tangent MTH_Curve3t 26
User's Guide 2 Graphics Library 91
Function Function Name Number
<Fixed Point Calculations>
Multiplication Routine MTH_Mul 27
Division routine MTH_Div 28
Fixed to floating point conversion macro MTH_FLOAT 29
Floating to fixed point conversion macro MTH_FIXED 30
Integer to fixed conversion routine MTH_IntToFixed 31
Fixed to integer conversion routine MTH_FixedToInt 32
3 item sum of product calculation MTH_Product 33
<Other Functions>
Square Root MTH_Sqrt 34
Hypotenuse calculation of a right angle triangle MTH_Hypot 35
Surface normal vector calculation MTH_CompateNormVect 36
92
2.3 Function Specifications
<Triangle Functions>
Title Function Function Name No
Function Specification sin function MTH_Sin 1
Format Fixed32 val = MTH_Sin(Fixed32 degree)
Input degree : Angles from -180.0 to 180.0
Output None
Function Value val : sin value
Function Returns the sin value of the indicated angle.
Title Function Function Name No
Function Specification cos function MTH_Cos 2
Format Fixed32 val = MTH_Cos(Fixed32 degree)
Input degree : Angles from -180.0 to 180.0
Output None
Function Value val : cos value
Function Returns the cos value of the indicated angle.
Title Function Function Name No
Function Specification atan function MTH_Atan 3
Format Fixed32 degree = MTH_Atan(Fixed32 y, Fixed32 x)
Input y : Height from -1.0 to 1.0
x : Base from -1.0 to 1.0
Output None
Function Value degree : Angles from -180.0 to 180.0
Function Returns the atan value from the indicated x, y values.
User's Guide 2 Graphics Library 93
<3D Matrix Calculation>
Title Function Function Name No
Function Specification Initialize matrix stack MTH_InitialMatrix 4
Format void MTH_InitialMatrix ( Mt hMatr i xTbl *matr i xTbl , Ui nt 16
stackSi ze, Mt hMatr i x *matr i x)
Input matrixTbl : Matrix table
stackSize : Maximum entries on a matrix stack
matrix : Matrix stack area
Output matrixTbl : Matrix table
Function Value None
Function Initializes the matrix table.
Title Function Function Name No
Function Specification Clear current matrix MTH_ClearMatrix 5
Format void MTH_ClearMatrix(MthMatrixTbl *matrixTbl)
Input matrixTbl : Matrix table
Output None
Function Value None
Function Clears the current matrix to a unit matrix.
Title Function Function Name No
Function Specification Push matrix MTH_PushMatrix 6
Format void MTH_PushMatrix(MthMatrixTbl *matrixTbl)
Input matrixTbl : Matrix table
Output None
Function Value None
Function Pushes the current matrix.
Title Function Function Name No
Function Specification Pop matrix MTH_PopMatrix 7
Format void MTH_PopMatrix(MthMatrixTbl *matrixTbl)
Input matrixTbl : Matrix table
Output None
Function Value None
Function Pops the current matrix.
94
Title Function Function Name No
Function Specification Combine matrix and move horizontally MTH_MoveMatrix 8
Format void MTH_MoveMatrix(MthMatrixTbl *matrixTbl,
Fixed32 x, Fixed32 y, Fixed32 z)
Input matrixTbl : Matrix table
x : Amount to move in X direction
y : Amount to move in Y direction
z : Amount to move in Z direction
Output None
Function Value None
Function Combines the matrix for a horizontal move in the XYZ
direction for the current matrix.
Title Function Function Name No
Function Specification Combine matrix and rotate X MTH_RotateMatrixX 9
Format void MTH_RotateMatrixX ( Mt hMatr i xTbl *matr i xTbl , Fi xed32 xDegree)
Input matrixTbl : Matrix table
xDegree : X axis rotation angle (Range from -180.0 to 180.0)
Output None
Function Value None
Function Combines the matrix for X axis rotation for the current matrix.
Title Function Function Name No
Function Specification Combine matrix and rotate Y MTH_RotateMatrixX 10
Format void MTH_RotateMatrixY ( Mt hMatr i xTbl *matr i xTbl , Fi xed32 yDegree)
Input matrixTbl : Matrix table
yDegree : Y axis rotation angle (Range from -180.0 to 180.0)
Output None
Function Value None
Function Combines the matrix for Y axis rotation for the current matrix.
Title Function Function Name No
Function Specification Combine matrix and rotate Z MTH_RotateMatrixZ 11
Format void MTH_RotateMatrixZ ( Mt hMatr i xTbl *matr i xTbl , Fi xed32 zDegree)
Input matrixTbl : Matrix table
zDegree : Z axis rotation angle (Range from -180.0 to 180.0)
Output None
Function Value None
Function Combines the matrix for Z axis rotation for the current matrix.
User's Guide 2 Graphics Library 95
Title Function Function Name No
Function Specification Combine matrix and reverse Z MTH_ReverseZ 12
Format void MTH_ReverseZ(MthMatrixTbl *matrixTbl)
Input matrixTbl : Matrix table
Output None
Function Value None
Function Combines the current matrix for Z axis reversal.
Title Function Function Name No
Function Specification Matrix calculation, multiplication MTH_MulMatrix 13
Format void MTH_MulMatrix(MthMatrix *a, MthMatrix *b, MthMatrix *c)
Input a : Multiplicand matrix
b : Multiplier matrix
Output c : Multiplication results matrix
Function Value None
Function Multiplies matrix a and b and outputs the result to c.
Title Function Function Name No
Function Specification Matrix calculation, vertex coordinate 14
MTH_CordTrans
conversion
Format void MTH_CoordTrans ( Mt hMatr i x *matr i x, Mt hXyz *s rc, Mt hXyz *ans )
Input matrix : Conversion matrix
src : Vertex coordinates before conversion
Output ans : Vertex coordinates after conversion
Function Value None
Function Converts vertex coordinates in the conversion matrix.
Title Function Function Name No
Function Specification Matrix calculation, normal vector coordinate 15
MTH_NormalTrans
conversion
Format void MTH_NormalTrans ( Mt hMatr i x *matr i x, Mt hXyz *s rc, Mt hXyz
*ans )
Input matrix : Conversion matrix
src : Normal vector before conversion
Output ans : Normal vector after conversion
Function Value None
Function Converts normal vector in the conversion matrix.
96
<3D Polygon Data Coordinate Conversion through the DSP>
Title Function Function Name No
Function Specification Initialize Coordinate Conversion Process MTH_PolyDataTransInit 16
Format void MTH_PolyDataTransInit(void)
Input None
Output None
Function Value None
Function Initializes the DSP and loads the coordinate conversion
program.
Title Function Function Name No
Function Specification 3D Polygon Data Coordinate Conversion MTH_PolyDataTransExec 17
Format void MTH_PolyDataTransExec( Mt hPolyTr ansPa rm *polyTr ansPa rm)
Input polyTransParm: Coordinate conversion parameter table
Output PolyTransParm: The areas below are outputfrom thecoordinate
conversion table.
surfBright Polygon surface brightness calc. results
transViewVertAns Vertex data after view conversion
vertBright Vertex point brightness calc. results
transWorldVertAns Vertex data after World conversion
Function Value None
Function The DSP runs the following continuous process of an example
of polygon data (3D object) used by the 3D sprite display
library.
· Polygon Surface Hide Determine and Brightness Calculation
– Related Parameters –
<Input> surfCount Polygon surfaces
surfPoint Point on polygon for bright calculation
surfNormal Polygon surface normal
matrix Conversion matrix to view coordinates
light Vector Light source vector in the view coord. system
<Output> surfBright Polygon surface brightness calc. results
631 =1: Hide surface
=0: Show surface
b4-b0 =0x00: Darkest
0x1f =0x1f: Lightest
· Conversion to the Vertex Coordinate System
– Related Parameters –
<Input> transViewVertCount View conversion vertex entries
transViewVertSrc Vertex data before view conversion
viewMatrix Conversion matrix to the view coord. system
<Output> transViewVertAns Vertex data after view conversion
User's Guide 2 Graphics Library 97
· Gouraud Display Vertex Brightness Calculation
– Related Parameters –
<Input> gourVertCount Vertex point brightness vertex entries
If = 0, then brightness not calculated
vertNormal Vertex point brightness calc. normal table
matrix Conversion matrix to view coordinates
lightVector Light source vector in the view coord. sys.
<Output> vertBright Vertex brightness calculation results table
0x00 = Darkest
0x1f = Lightest
· Conversion to the Vertex World Coordinate System
– Related Parameters –
<Input> transWorldVertCount Vertex data before World conversion
If = 0, conversion to world not
executed.
transWorldVertSrc Vertex data table before world coord.
conversion
worldMatrix Conversion matrix to world coordinates
<Output> transWorldVertAns Vertex data table after conversion to
world coordinate system
Title Function Function Name No
Function Specification Check the Coordinate Conversion Process MTH_PolyDataTansCheck 18
Format void MTH_PolyDataTransCheck(void)
Input None
Output None
Function Value None
Function Waits until the DSP coordinate conversion process is finished.
<Perspective Conversion>
Title Function Function Name No
Function Specification 3D perspective conversion MTH_Pers2D 19
Format void MTH_Pers2D ( Mt hXyz *p3d, Mt hXy *uni t Pi xel, XyI ni t *p2d )
Input p3d : View coordinate system 3D vertex coordinates
unitPixel : Screen XY unit pixels
Output p2d : 2D screen coordinates after perspective conversion
Function Value None
Function Converts from 3D to 2D perspective by setting the screen to -1.0
as the view of the coordinate system base point. The size of 1.0
on the screen corresponds to the XY unit pixels.
98
<Random Number Generator>
Title Function Function Name No
Function Specification Initialize the Random Number Generator MTH_InitialRand 20
Format void MTH_InitalRand(Uint32 initVal)
Input initVal : Initial parameter value of the random number generator
Output None
Function Value None
Function Sets the initial parameter for calculation of the random number
returned by MTH_GetRand. Unless this routine is called, the
initial value of the random number generator will be 0.
Title Function Function Name No
Function Specification Get Random Number MTH_GetRand 21
Format Uint32 randVal = MTH_GetRand(void)
Input None
Output None
Function Value randVal : Generates a random number from 0x00000000 to 0xffffffff.
Function Returns a random number each time it is run.
User's Guide 2 Graphics Library 99
<Spline Curve Calculation>
Title Function Function Name No
Function Specification Curve calculation, work area 22
MTH_INIT_CURVE
definition macro
Format MTH_INIT_CURVEWORK(WORK_AREA, POINT_MAX)
Input WORK_AREA : Work area name
POINT_MAX : Maximum input points
Function Defines as user area the area needed to execute the curve
calculation function. This definition area pointer is returned to
each curve calculation function as a parameter.
The area reserved is the maximum input points x 36bytes.
The count of the output coordinate is (in_n - 1) *step+ 1, so
prepare an aray larger than that size.
Title Function Function Name No
Function Specification 2D MTH_Curve2 23
Format Ui nt 32 count = MTH_Cur ve2( Mt hCur veWo rk *wo rk, Mt hXy *i n_a ray,
Ui nt 32 i n_n, Ui nt 32 out _n, Mt hXy *out _a ray)
Input work : Work area pointer
in_aray : Input coordinate aray
in_n : Input coordinate count
out_n : Output coordinate count
Output out_aray : Output coordinate aray
Function Value count : More than 2 output coordinates 0: parametererror
Function work indicates the work area reserved by the
MTH_INIT_CURVE macro.
- in_aray indicates the pointer to input coordinates that pass
through the curve.
- in_n indicates the number in in_aray. Please indicate more
than 3.
- out_n indicates the number in out_aray. Please indicate more
than 2.
- out_aray indicates the pointer that receives the calculation
results. It returns the aray of the output coordinates that pass
through the curve.
100
Title Function Function Name No
Function Specification Curve calculation, 2D with connectors MTH_Curve2t 24
Format Uni t 32 count = MTH_Cur ve2( Mt hCur veWo rk *wo rk, Mt hXy *i n_a ray,
Uni t 32 i n_n, Uni t 32 out _n, Mt hXy *out _a ray Mt hXy *t an_a ray)
Input work : Work area pointer
in_aray : Input coordinate aray
in_n : Input coordinate count
out_n : Output coordinate count
Output out_aray : Output coordinate aray
tan_aray : Connector line toggle of each output coordinates
Function Value count : More than 2 output coordinates 0: parametererror
Function work indicates the work area reserved by the
MTH_INIT_CURVE macro.
- in_aray indicates the pointer to input coordinates that pass
through the curve.
- in_n indicates the number in in_aray. Indicate more than 3.
- bout_n indicates the number in out_aray. Indicate more than
2.
- out_aray indicates the pointer that receives the calculation
results. It returns the aray of the output coordinates that pass
through the curve.
- tan_aray returns the tangent vector toggle that shows the
direction of progress for each output coordinate. The size of
the tangent vector is 1.0.
Title Function Function Name No
Function Specification 3D MTH_Curve3 25
Format Ui nt 32 count = MTH_Cur ve3( Mt hCur veWo rk *wo rk, Mt hXyz *i n_a ray,
Uni t 32 i n_n, Uni t 32 out _n, Mt hXyz *out _a ray)
Input work : Work area pointer
in_aray : Input coordinate aray
in_n : Input coordinate count
out_n : Output coordinate count
Output out_aray : Output coordinate aray
Function Value count : More than 2 output coordinates 0: parametererror
Function work indicates the work area reserved by the
MTH_INIT_CURVE macro.
- in_aray indicates the pointer to input coordinates that pass
through the curve.
- in_n indicates the number in in_aray. Indicate more than 3.
- out_n indicates the number in out_aray. Indicate more than 2.
- out_aray indicates the pointer that receives the calculation
results. It returns the aray of the output coordinates that pass
through the curve.
User's Guide 2 Graphics Library 101
Title Function Function Name No
Function Specification Curve calculation, 3D with tangent MTH_Cruve3t 26
Format Ui nt 32 count = MTH_Cur ve3t ( Mt hCur veWo rk *wo rk, Mt hXyz *i n_a ray,
Uni t 32 i n_n, Uni t 32 out _n, Mt hXyz *out _a ray, Mt hXyz *t an_a ray)
Input work : Work area pointer
in_aray : Input coordinate aray
in_n : Input coordinate count
out_n : Output coordinate count
Output out_aray : Output coordinate aray
tan_aray : Tangent vector toggle of each output coordinates
Function Value count : More than 2 output coordinates 0: parametererror
Function work indicates the work area reserved by the
MTH_INIT_CURVE macro.
- in_aray indicates the pointer to input coordinates that pass
through the curve.
- in_n indicates the number in in_aray. Indicate more than 3.
- out_n indicates the number in out_aray. Indicate more than 2.
- out_aray indicates the pointer that receives the calculation
results. It returns the aray of the output coordinates that pass
through the curve.
- tan_aray returns the tangent vector toggle that shows the
direction of progress for each output coordinate. The size of
tangent vector is 1.0.
Cautions on Use
These curve calculation functions were developed with process
speed as a top priority, so there is no overflow check. But, if a
large number is encountered during function calculation, an
overflow will occur. The allowable range of input data is as
follows:
· Distance between points: more than 0.1.
· Point coordinate value range: between -1000 and 1000.
Also, because of possible algorithm changes in future versions,
the same output coordinates may not be produced with the
same parameters.
102
<Fixed Point Calculations>
Title Function Function Name No
Function Specification Multiplication Routine MTH_Mul 27
Format Fixed32 result = MTH_Mul(Fixed32 a, Fixed32 b)
Input a : Multiplicand
b : Multiplier
Output None
Function Value result : Multiplication results
Function Does fixed point multiplication.
Title Function Function Name No
Function Specification Division routine MTH_Div 28
Format Fixed32 result = MTH_Div(Fixed32 a, Fixed32 b)
Input a : Dividend
b : Divisor
Output None
Function Value result : Division results
Function Does fixed point division.
Title Function Function Name No
Function Specification Fixed to floating point conversion macro MTH_FLOAT 29
Format Float b = MTH_FLOAT(Fixed32 a)
Input a : Fixed point data
Output None
Function Value b : Conversion results to floating point format.
Function Macro to convert fixed point data to floating point data.
Title Function Function Name No
Function Specification Floating to fixed point conversion macro MTH_FIXED 30
Format Fixed32 b = MTH_FIXED(Float a)
Input a : Floating point data
Output None
Function Value b : Conversion results to fixed point format.
Function Macro to convert floating point data to fixed point data.
User's Guide 2 Graphics Library 103
Title Function Function Name No
Function Specification Integer to fixed conversion routine MTH_IntToFixed 31
Format Fixed32 b = MTH_IntToFixed(Sint32 a);
Input a : Integer data
Output None
Function Value b : Conversion results to fixed point data.
Function Macro to convert integer data to fixed point data.
Title Function Function Name No
Function Specification Fixed to integer conversion routine MTH_FixedToInt 32
Format Sint32 b = MTH_FixedToInt(Fixed a)
Input a : Fixed point data
Output None
Function Value b : Conversion results to integer data format.
Function Macro to convert fixed point data to integer data.
Title Function Function Name No
Function Specification 3 item sum of product calculation MTH_Product 33
Format Fixed32 result = MTH_Product(Fixed32 *a, Fixed32 *b)
Input a : 3 Multiplicand data lines
b : 3 multiplier data lines
Output None
Function Value results : Product sum of the multiplication results
Function Does calculation processing as follows:
result = a[0]*b[0] + a[1]*b[1] + a[2]*b[2]
104
<Other Functions>
Title Function Function Name No
Function Specification Square Root MTH_Sqrt 34
Format Fixed32 result = MTH_Sqrt(Fixed32x)
Input x : Correct fixed point real number value
Output None
Function Value result : Calculated square root value
Function Calculates and returns the square root of the input value.
Title Function Function Name No
Function Specification Hypotenuse calculation of a right 35
MTH_Hypot
angle triangle
Format Fixed32 z = MTH_Hypot(Fixed32 x, Fixed32 y)
Input x : Right angle triangle base length
y : Right angle triangle perpendicular length
Output None
Function Value z : Hypotenuse length of the right angle triangle
Function Returns z that fulfills the following equation.
z2=x2+y 2 but z≥0
Title Function Function Name No
Function Specification Surface normal vector calculation MTH_ComputeNormVect 36
Format void MTH_ComputeNormVect (Fixed32 surfNormK,
MthXyz *p0, MthXyz *p1, MthXyz *p3, MthXyz *normal)
Input surfNormK : Vertex distance correction value
p0 : Coordinate of first vertex right of top of screen.
p1 : Coordinate of second vertex right of top of screen.
p2 : Coordinate of third vertex to right of top of screen.
Output Normal : Normal screen vecter (uint vecter)
Function Value None
Function Calculates normally for the indicated right hand vertex on the
screen. The direction in relation to the normal vector is the
opposite of right twist. The normal vertor calculation is based
on the difference between 2 of 3 vertexes on the screen and
finding the relationship.
The correction value of the indicated vertex interval is
converted to absolute values to find the maternal relationship
based on the 2 vectors. This is because if the 3 pointers on the
screen are too small or too large, the 32 bit fixed decimal
calculation either underflows or overflows, making a correct
calculation difficult. To avoid this, the correction value is used
to make sure the absolute value is around 1.0 when the
difference of the 23 screen points vector is found. If the vertex
interval correction flag is negative, the normal vector will be in
the opposite direction.
User's Guide 2 Graphics Library 105
(There is no page 106 in the original Japanese document.)
106
DSP I/F Library
1.0 Guide
1.1 Objective
The purpose of this library is to provide an interface for DSP program control.
1.2 Overview
This library has the following interfaces prepared.
· Program load
· Data write
· Data read
· Start program execution
· Stop program execution
· Check for execution end
An overview of each function is provided below.
1.3 Function Overview
• Program load
Transfers the DSP program stored in work RAM, etc., to DSP program RAM.
• Data write
Transfers the DSP program data (parameters) stored in work RAM, etc., to DSP
data RAM.
• Data read
Reads DSP data and RAM data (results, etc.)
• Start program execution
Sets the program counter and starts the DSP program execution.
• Stop program execution
Stops execution of the DSP program.
• Check for execution end
Checks to see if the DSP program has stopped executing.
User's Guide 2 Graphics Library 107
1.4 Calling Sequence
The calling sequence from program load until results appearing is shown below.
void GoDsp ()
{
Uint32 dsp_result[10]; /* DSP result storage variable */
DSP_WriteData(DSP_RAM_1 | 0, (Uint32 *)0x6050000, 15);
/* Transfer 15 times of data to DSP data RAM, RAM1 from work RAM
DSP_LoadProgram(0, (Uint32 *)0x6050100, 256);
/* Transfer 256 times of data to DSP program RAM from work RAM
DSP_Start(0);
while(DSP_CheckEnd(&dsp_status) == DSP_NOT_END); /* Loop
until ends */
DSP_ReadData(dsp_result, DSP_RAM_2 | 0, 10);
/* Transfer 10 times of data from DSP data RAM, RAM2 to DSP result storage variable */
......
}
108
2.0 Reference
2.1 List of Functions
Function Function Name Number
Program load DSP_LoadProgram 1
Data write DSP_WriteData 2
Data read DSP_ReadData 3
Start program execution DSP_Start 4
Stop program execution DSP_Stop 5
Check for execution end DSP_CheckEnd 6
2.2 Function Specifications
Title Function Function Name No
Function Specification Program load DSP_LoadProgram 1
Format void DSP_LoadProgram(Uint8 dst, Uint32 *src, Uint16 count)
Input dst : DSP program RAM address
src : DSP program storage lead address
count : Transfer repetitions (long word units)
Output None
Function Value None
Function Transfers from the indicated DSP program storage lead address
data equal to the number of repetitions specified (long word
units) to the DSP program RAM address.
Title Function Function Name No
Function Specification Data write DSP_WriteData 2
Format void DSP_WriteData(Uint8 dst, Uint32 *src, Uint16 count)
Input dst : DSP data RAM address
src : DSP data storage lead address
count : Transfer repetitions (long word units)
Output None
Function Value None
Function Transfers from the indicated DSP data storage address data
equal to the number of repetitions specified (long word units)
to the address in the DSP data RAM. Designates the DSP data
RAM address, including the selector flag in 8bit.
DSP_RAM_0
DSP_RAM_1
DSP_RAM_2
DSP_RAM_3
DSP_RAM_2 |3 = Relative third long word RAM2 page.
User's Guide 2 Graphics Library 109
Title Function Function Name No
Function Specification Data read DSP_ReadData 3
Format void DSP_ReadData(Uint32 *dst, Uint8 src, Uint16 count)
Input dst : DSP data storage lead address
src : DSP data RAM address
count : Transfer repetitions (long word units)
Output None
Function Value None
Function Transfers from the indicated DSP data RAM, data equal to the
number of repetitions specified (long word units) to the DSP
data storage address. Designates the DSP data RAM address,
including the selector flag in 8bit.
Title Function Function Name No
Function Specification Start program execution DSP_Start 4
Format void DSP_Start(Uint8 pc)
Input pc : Program counter
Output None
Function Value None
Function Executes the DSP program from the indicated program
counter.
Title Function Function Name No
Function Specification Stop program execution DSP_Stop 5
Format void DSP_Stop(void)
Input None
Output None
Function Value None
Function Stops the DSP program currently running.
110
Title Function Function Name No
Function Specification Check for execution end DSP_CheckEnd 6
Format Uint8 DSP_CheckEnd(void)
Input None
Output None
Function Value End flag
Constant Name
Constant Name Explanation
DSP_END Finished executing
DSP_NOT_END Executing
Function Checks to see if the DSP program has finished running or not.
User's Guide 2 Graphics Library 111
INDEX
D
DSP_CheckEnd ........................... 111 MTH_RotateMatrixY .................. 95
DSP_LoadProgram ..................... 109 MTH_RotateMatrixZ .................. 95
DSP_ReadData ............................ 110 MTH_Sin ...................................... 93
DSP_Start ..................................... 110 MTH_Sqrt .................................... 105
DSP_Stop ...................................... 110 MthMatrix .................................... 89
SDP_WriteData ........................... 109 MthMatrixTbl .............................. 89
MthPolyTransParm..................... 90
M MthViewLight ............................. 90
MTH_Atan ................................... 93 MthXy ........................................... 89
MTH_ClearMatrix ...................... 94 MthXyz ......................................... 89
MTH_ComputeNormVect ......... 105
MTH_CordTrans ......................... 96 S
MTH_Cos ..................................... 93 SCL_AbortAutoVE ..................... 86
MTH_Curve2 ............................... 100 SCL_AllocColRam ...................... 79
MTH_Curve2 ............................... 101 SCL_Close .................................... 69
MTH_Curve3 ............................... 101 SCL_DisableBlur ......................... 84
MTH_Curve3t ............................. 102 SCL_DisableLineCol................... 84
MTH_Div ..................................... 103 SCL_DisplayFrame ..................... 85
MTH_FIXED ................................ 103 SCL_EnableBlur .......................... 84
MTH_FixedToInt......................... 104 SCL_EnableLineCol .................... 84
MTH_FLOAT............................... 103 SCL_FreeColRam ........................ 79
MTH_GetRand ............................ 109 SCL_GetColRamMode ............... 78
MTH_Hypot ................................ 105 SCL_GetColRamOffset .............. 80
MTH_INIT-CURVE .................... 100 SCL_GetPriority .......................... 81
MTH_Initial Matrix .................... 94 SCL_IncColOffset ........................ 83
MTH_InitialRand ........................ 99 SCL_InitConfigTb ....................... 66
MTH_IntToFixed......................... 104 SCL_InitLineParamTb ................ 69
MTH_MoveMatrix...................... 95 SCL_InitLineParmTb .................. 69
MTH_Mul .................................... 103 SCL_InitRotateTable ................... 71
MTH_MulMatrix ........................ 96 SCL_InitVramConfigTb ............. 66
MTH_NormalTrans .................... 96 SCL_Move .................................... 70
MTH_Pers2d................................ 98 SCL_MoveTo ............................... 70
MTH_PolyDataTransCheck ...... 98 SCL_Open .................................... 69
MTH_PolyDateTransExec ......... 97 SCL_Rotate .................................. 73
MTH_PolyDataTransInit ........... 97 SCL_RotateTo .............................. 73
MTH_PopMatrix ......................... 94 SCL_Scale ..................................... 71
MTH_Product.............................. 104 SCL_SetAutoColChg .................. 80
MTH_PushMatrix ....................... 94 SCL_SetAutoColMix .................. 82
MTH_ReverseZ ........................... 96 SCL_SetAutoColOffset ............... 83
MTH_RotateMatrixX .................. 95 SCL_SetBack ................................ 75
112
SCL_SetCoefficientData ............. 74 SPR_2CloseCommand ............... 26
SCL_SetColMixMode ................. 81 SPR_2ClrAllChar ........................ 25
SCL_SetColMixRate ................... 81 SPR_2ClrChar .............................. 24
SCL_SetColOffset ........................ 82 SPR_2Cmd ................................... 30
SCL_SetColRam .......................... 79 SPR_2DEFINE_WORK .............. 22
SCL_SetColRamMode ................ 78 SPR_2DefineWork ....................... 22
SCL_SetConfig ............................ 67 SPR_2DistSpr ............................... 30
SCL_SetCycleTable ..................... 67 SPR_2FlushDrawPrty ................. 30
SCL_SetDisplayMode ................ 65 SPR_2FrameChgIntr ................... 23
SCL_SetFrameInterval ............... 85 SPR_2FrameEraseData ............... 23
SCL_SetLineParam ..................... 70 SPR_2FreeBlock ........................... 31
SCL_SetLineWindow ................. 77 SPR_2GourTblNo ....................... 25
SCL_SetLncl ................................. 75 SPR_2GourTblNooV ram ......... 25
SCL_SetMosaic ............................ 74 SPR_2Initial.................................. 22
SCL_SetPriority ........................... 80 SPR_2Line .................................... 27
SCL_SetRotateCenter ................. 72 SPR_2LocalCoord ....................... 26
SCL_SetRotateCenterDisp ......... 72 SPR_2LookupTblNo ................... 25
SCL_ SetRotateViewPoint.......... 72 SPR_LookupTblNoToVram ....... 25
SCL_SetShadowBit ..................... 85 SPR_2NormSpr ........................... 29
SCL_SetSpriteMode .................... 78 SPR_2OpenCommand ............... 26
SCL_SetSpriteWindow ............... 77 SPR_2PolyGon ............................ 28
SCL_SetVramconfig .................... 66 SPR_2Polygon ............................. 28
SCL_SetWindow ......................... 76 SPR_2PolyLine ............................ 28
SCL_VblankEnd .......................... 86 SPR_2ScaleSpr ............................. 29
SCL_VblankStart ......................... 86 SPR_2SetChar .............................. 24
SCL_Vdp2Init .............................. 65 SPR_2SetGourTbl ........................ 23
Sclconfig ....................................... 57 SPR_2SetLookupTbl ................... 24
SclDataset ..................................... 60 SPR_2SetTvMode ........................ 22
SclDisplayX, SclDisplayY .......... 62 SPR_2Sysclip ............................... 27
ScILineParam............................... 59 SPR_2UserClip ............................ 27
SclLineTb ...................................... 55 SPR_2UsrClip .............................. 27
SclLineWindowTb ...................... 55 SPR_3CallAllCluster .................. 41
SclNorscl ...................................... 61 SPR_3ChangeTexColor .............. 42
SclRgb ........................................... 56 SPR_3ClrTexture ......................... 41
SclRgb ........................................... 56 SPR_3DEFINE_WORK .............. 37
SclRotscl ....................................... 61 SPR_3DefineWork ....................... 37
SclSclconfig .................................. 57 SPR_3DrawModel ...................... 40
SclSysreg ...................................... 60 SPR_3Flush .................................. 41
SclVramConfig ............................ 56 SPR_3GetStatus ........................... 43
SclWinscl ...................................... 62 SPR_3Initial.................................. 38
SclXy ............................................. 55 SPR_3MoveCluster ..................... 40
SclXyz ........................................... 55 SPR_3SetClipLevel ..................... 38
SPR_2AllocBlock ......................... 31 SPR_3SetDrawSpeed .................. 43
SPR_2CharNo .............................. 25 SPR_3SetLight ............................. 39
SPR_2CharNoToVram ................ 25 SPR_3SetPixelCount ................... 38
User's Guide 2 Graphics Library 113
SPR_3SetSurfNormVect ............. 43
SPR_3SetTexture ......................... 41
SPR_3SetView .............................. 39
SPR_3SeyZSortMinMax ............. 42
SPR_GetStatus ............................. 17
SPR_Initial.................................... 16
SPR_READ_REG ........................ 18
SPR_SetEosMode ........................ 18
SPR_SetEraseData ....................... 17
SPR_SetTvMode .......................... 16
SPR_WaitDrawEnd ................. 17, 18
SPR_WRITE_REG ....................... 18
Spr3dStatus ................................. 36
SprCluster .................................... 32
SprGourTbl .................................. 19
SprInbetInf ................................... 36
SprLookupTbl ............................. 19
SprObject3D ................................. 34
SprSpCmd .................................... 20
SprSpStatus .................................. 15
SprSurface .................................... 35
SprTexture .................................... 36
SprVaddr ...................................... 19
X
XyInt ............................................. 19
114
TM
System Library
User's Guide
Doc. # ST-162-062094
CONTENTS
System Program User’s Manual .......................... 1
SMPC I/F User’s Manual ..................................... 7
CD Communication Interface User’s Manual ..... 21
© 1994 SEGA. All Rights Reserved.
REFERENCES
In translating/creating this document, certain technical words and/or phrases were interpreted
with the assistance of the technical literature listed below.
1. KenKyusha New Japanese-English Dictionary
1974 Edition
2. Nelson’s Japanese-English Character Dictionary
2nd revised version
3. Microsoft Computer Dictionary
4. Japanese-English Computer Terms Dictionary
Nichigai Associates
4th version
(This page is blank in the original Japanese document.)
ii
Table of Contents
SYSTEM PROGRAM USER’S MANUAL ............................................. 1
1.0 GUIDE .............................................................................................. 1
1.1 Explanation ............................................................................ 1
2.0 REFERENCE .................................................................................... 3
2.1 List of Functions .................................................................... 3
2.2 Function Specifications ......................................................... 3
SMPC I/F USER’S MANUAL ................................................................. 7
1.0 GUIDE .............................................................................................. 7
1.1 Objective ................................................................................. 7
1.2 Overview ................................................................................ 7
1.3 System Management System ............................................... 7
1.4 Peripheral Control System ................................................... 8
2.0 REFERENCE .................................................................................. 11
2.1 Data Specification List ........................................................ 11
2.2 Data Specifications .............................................................. 11
2.3 List of Function Specifications .......................................... 15
2.4 Function Specifications ....................................................... 16
CD COMMUNICATION INTERFACE USER’S MANUAL ............. 21
1.0 OVERVIEW .................................................................................... 21
1.1 Library Configuration ........................................................ 21
1.2 System Configuration ......................................................... 22
1.3 Functions and Characteristics ........................................... 23
2.0 BASIC FACTS ................................................................................ 24
2.1 Terminology and Symbols ................................................. 24
2.2 Disk Layout .......................................................................... 26
3.0 COMMUNICATION WITH THE CD BLOCK ......................... 27
3.1 Communication Register ................................................... 27
3.2 Communication Method .................................................... 29
3.3 Response ............................................................................... 31
3.4 Data Transfer ........................................................................ 32
iii
4.0 CD DRIVE ......................................................................... 33
4.1 CD Drive Status Change ....................................... 33
4.2 CD Drive Operation ............................................... 37
4.3 Subcodes .................................................................. 39
5.0 CD BLOCK CONFIGURATION .................................... 41
5.1 Data Flow ................................................................ 41
5.2 Stream Process Mechanism................................... 42
5.3 Selector Configuration........................................... 43
5.4 Sector Data Format................................................. 48
5.5 CD Block Initialization .......................................... 49
6.0 CD BLOCK FILE SYSTEM .............................................. 50
6.1 File Management in CD-ROM (ISO9660) ........... 50
6.2 CD Block File System Functions .......................... 51
7.0 DATA SPECIFICATIONS................................................ 55
7.1 Data List................................................................... 55
7.2 Data Detailed .......................................................... 56
8.0 FUNCTION SPECIFICATIONS ..................................... 73
8.1 List of Functions ..................................................... 74
8.2 Function Details...................................................... 76
Index .......................................................................................... 104
iv
Pages 1-20 of this document have been
archived. The revised pages of the
“System Program User’s Manual” and
the “SMPC I/F User’s Manual” can be
found in ST-162-R1-092994 entitled
“SATURN System Library User’s
Guide ver.1.0”.
CD Communication Interface User’s Manual
1.0 OVERVIEW
This document is a collection of CD block functions and CD communication inter-
face external specifications. Functions of CD blocks are classified in Table 1.1 below.
Table 1.1 Classification of CD Block Functions
Classification Description
CD Part Communication format, CD drive related, CD buffer
related
CD block file system related
MPEG Part MPEG Related
CD block functions can be used by a common software interface through the CD
communication interface.
1.1 Library Configuration
The library configuration of CD relationships is shown in Figure 1.1.
Application
Branch Animation Play Library
MPEG Library Stream System File System
(MPG) Library (STM) Library (GFS)
CD Communication Interface (CDC)
Software
................................................................................
Hardware CD Block SIMM, SCSI
Figure 1.1 Library Structure of CD Relationships
System Library User's Guide 21
1.2 System Configuration
The system configuration of CD relationships is shown in Figure 1.2.
Host Program (File system, Application, etc.)
H OST
Function Call Return
CD Communication Interface (DMA, etc., Data Transfer Module)
Communication
Command Response Fetch data Write data
with CD Block
[Command Input/Output Register] [Data Transfer Register]
Hardware Interface
C D B L O CK
CD Block Program (Host Communication Interface, BIOS, etc.)
Communication with CD Drive
CD Drive
In interfacing with the CD block, the main system is called the host.
Moreover, The CD block is one subsystem.
Figure 1.2 System Structure of CD Relationships
1) Communication with the CD Block
The host and CD block communicate (command/response, data transfer) using
registers on the hardware interface. A command issued from the host to the CD
block is called a CD block command; however, this is normally shortened to
command.
2) CD Drive
The CD block periodically communicates with the CD drive controlling the CD
drive with respect to commands from the host. The CD drive accommodates the
CD-ROM XA standard and multi-session. It is able to switch between the stan-
dard speed as well as double the standard speed. (Standard speed is automati-
cally set when playing CD-DA.)
22
1.3 Functions and Characteristics
Numbers “1” to “3” below are functions of the CD communication interface, and “4”
to “7” are CD block functions.
1. CD Block Communication Functions
(a) Communicates between the host and CD block and is the C Language
interface function set.
(b) Issues commands to the CD block and receives the response.
(c) Corresponds one to one with the CD block command.
2. Data Transfer Auxiliary Functions
Supports auxiliary functions concerning data transfer such as data transfer
setup and termination as well as data transfer register address acquisition.
Data that is fetched and written in the CD block is sent through the CD block
data transfer register. The transfer itself is not through the CD communication
interface but is through the DMA data transfer module. (Software transfer, SH-2
DMA, and SCU DMA can be done through the CPU.)
3. Register Access Function
Supports functions that access the CD block register.
4. CD Drive Function
Playing music (CD-DA) and sector read (CD-ROM) are handled by a common
command such as CD play. Stop and pause CD play are seek commands.
Resume CD play (cancel pause) is executed by the CD play command.
5. Subcode R ~ W Decode Function
Subcode R ~ W is decoded when playing CD-DA. There is a pack buffer of 23
pack segments for storing decoded pack data.
6. Stream Select Function
CD-ROM XA standard sectors and the stream of every type of device (host,
MPEG, etc.) are processed uniformly.
(a) There are 200 sectors (about 460 Kbytes) of CD buffer for storing
streams.
(b) There are 24 independent selectors for selecting (separating, storing,
fetching) streams.
7. CD Block File System Function (ISO9660)
Directory information is held in the CD block so that files that conform to the
ISO9660 standard can be easily accessed.
System Library User's Guide 23
2.0 BASIC FACTS
2.1 Terminology and Symbols
Definition of Terms
Terms used are defined in Table 2.1 below.
Table 2.1 Definition of T
erms
Term Meaning
Sector Basic units of data handled by a CD block (2352 bytes fixed). The
sector size and configuration follows the CD-ROM format.
Stream Distinguished by sector headers and subheaders. Flow of logically
continuous data.
CD Buffer Buffer within the CD block that stores sector data.
CD Buffer Size Size of CD buffer sector units.
Buffer Partition Segments CD buffer into multiple logical partitions. (Can be
considered logical elements getting and storing streams.)
Buffer Partition Size Size of buffer partition sector units.
Sector Location Sector locations within buffer partition (location of sector units).
Takes the value of 0 to (buffer partition size -1). Sectors of the
buffer partition key-in the sector location and accesses.
Filter Logical element that separates streams by set conditions.
Selector Composed from the filter and buffer partition, logical element that
selects streams. The selector enables the construction of a stream
select circuit.
Device Logical apparatus that causes and absorbs streams such as a CD-
ROM and MPEG. The stream select process is enabled by
connecting a device to the circuit mentioned above.
Connector Terminal for connecting a filter, buffer partition, or device.
Frame Address (FAD) Continually adds numbers in frame units with the absolute time
00:00:00 on the CD as 0. Corresponds 1 to 1 with absolute time.
The CD block accesses the frame address as a key and not
absolute time. (both CD-ROM, CD-DA)
Logic Sector No. (LSN) Continually adds numbers in sector (frame) units with the absolute
time 00:02:00 on the CD as 0. Logic sector number = frame
address - 150 (2 seconds). Used for information within the
directory code (ISO9660).
File Information Directory record information maintained for accessing files. There
are the file lead FAD, file size, unit size, gap size, file number, and
attributes.
File Identifier Directly sequence number for identifying files. Takes a value of 0
to (directory record number -1).
0: Own directory, 1: Parent directory.
24
List of Symbols and Codes
Symbols and codes used are defined in Table 2.1 below.
Table 2.2 List of Symbols and Codes
Symbol or Code Meaning Description
Adr address address
BCD binary coded decimal binary decimal number
bn.bufno buffer no. buffer partition number
bufnum buffer numbers total number of buffer partitions
CI coding information coding information
CN channel no. channel number
Ctrl control control
dst destination copy and move destination
fad frame address frame address
fasnum fad sector numbers frame address sector numbers
fid file identifier file identifier
fln, filtno filter no. filter number
FN file no. file number
LSB least significant bit least significant bit
MSB most significant bit most significant bit
ply play parameter play parameters
pos position parameter position parameters
SM submode submode
sct sector sector
ses session information session information
sesno session no. session number
snum sector numbers (when specifying sector range of partition)
sp. spos sector position (when specifying sector range of partition)
src source copy / move source
stat CD status information CD status information
subh subheader condition subheader condition for filter
TNO track no. track number (music number)
toc TOC information TOC information
txwnum transfer word numbers (data transfer size in word units)
X, idx index index number
word word units 2 bytes (16 bits) in length
Numeric Notation
B is added to the end of a binary number. (Ex: 5 is 101B.)
H is added to the end of a hexadecimal number. (Ex: 255 is FFH.)
A hexadecimal number in a C language program is noted by C language specifica-
tion (0x).
Handling BCD
BCD should not be used in parameters. Numbers recorded as BCD on a CD track
number, for instance, are all converted to binary values.
C Language Identifier
Use identifiers that begin with CD or Cd in the CD communication interface.
System Library User's Guide 25
2.2 Disk Layout
Track Layout
Figure 2.1 shows the relationship of the track configuration with the access key that
indicates the position on the disk.
Information Area
Lead in Lead Out
Q Code Area Program Area Area
Data Data Audio Audio
Control Data 03 AA
TON 00 01 02
Index 00 01 01 00 01~ 01
2 sec. ≥ 2 sec.
Time
Absolute Time
ATime
Header
(minute, second, frame)
Logic Sector
(LSN)
Frame Address
(FAD)
TOC Information FAD=0 Track start FAD Track start FAD
Figure 2.1 Relationship of rack
T Configuration and
Access Key
Multi Session Layout
Session 1 Session 2 Session 3
TNO 00 01 02 03 AA 00 04 05 06 AA 00 07 08 09 AA
2 sec. 2 sec. 2 sec.
Absolute Time ←→ ←→ ←→
ATime
Header
(minute, second, frame
Logic Sector Number
(LSN)
Frame Address
(FAD)
TOC Information Track start FAD Track start FAD Track start FAD
Session Information Session start FAD Session start FAD Session start FAD . . ..Index is 00
Figure 2.2 Multi Session Layout
26
3.0 COMMUNICATION WITH THE CD BLOCK
3.1 Communication Register
Table 3.1 shows the CD block and communication registers and corresponding
access functions.
Table 3.1 Communication Registers
Register Name R/W Description Access Function
DATATRNS R/W Data Transfer Register CDC_GetDataPtr
HIRQREQ R/W Interrupt Factor Register CDC_GetHirqReq,
CDC_ClrHirqReq
HIRQMSK R/W Interrupt Mask Register CDC_GetHirqMsk,
CDC_SetHirqMsk
MPEGRGB R MPEG Register (RGB data) CDC_GetMpegPtr
* All access widths are 16 bits (1 word)
See below for more information about the communication register.
In the figure, a reserve bit is shown by “ - “ The reserve bit must be specified with a
0. The bit configuration is 15 for the most significant bit and 0 for the least signifi-
cant bit.
Data Transfer Register (DATATRNS)
When transferring data, this register inputs and outputs data between the host and
CD block. The inner part of the register is FIFO.
Register Name R/W 15 14 13 12 11 10 9 8
DATATRNS R/W
7 6 5 4 3 2 1 0
System Library User's Guide 27
Interrupt Factor Register (HIRQREQ)
This is the interrupt factor register from the CD block to the host.
Register Name R/W 15 14 13 12 11 10 9 8
HIRQREQ R/W — — SCDQ EFLS ECPY
7 6 5 4 3 2 1 0
EHST ESEL DCHG PEND BFUL CSCT DRDY CMOK
CMOK (bit 0) : Issueable command 1 = command can be issued (response set complete)
DRDY (bit 1) : Data transfer ready 1 = data transfer setup is complete.
CSCT (bit 2) : 1 sector stored 1 = 1 CD-ROM sector is stored or discarded in partition
BFUL (bit 3) : CD buffer full 1 = CD buffer is full
PEND (bit 4) : CD play end 1 = CD play has ended (current FAD is outside play range)
DCHG (bit 5) : Disk exchange 1 = Disk has been exchanged (tray has been opened)
ESEL (bit 6) : Selector set end 1 = soft reset, stop execution of selector set
EHST (bit 7) : Host I/O end 1 = stop execution of host input/output
ECPY (bit 8) : Copy end 1 = stop execution of copy and move between buffer
partition
EFLS (bit 9) : File system end 1 = stop execution of CD block file system
SCDQ (bit10) : Subcode Q 1 = subcode Q renewal complete
(CD drive communication timing)
bit 11 ~ bit 13 : MPEG related interrupt factor (see MPEG part for the meaning of each bit)
(a) Bit write can only be done at 0 (clear), not at 1.
(b) The IRQ output to the host is OR output of all factors.
Clears corresponding factor bits during interrupt process.
(c) Names the command end flag of each bit ESEL, EHST, ECPY, EFLS.
Reports the end of execution of commands belonging to each flag.
Interrupt Mask Register (HIRQMSK)
This register is for masking interrupt from the CD block to the host.
Register Name R/W 15 14 13 12 11 10 9 8
HIRQMSK R/W — — SCDQ EFLS ECPY
7 6 5 4 3 2 1 0
EHST ESEL DCHG PEND BFUL CSCT DRDY CMOK
(a) Bit content is the same as the HIRQREQ register.
(1 = interrupt enable, 0 = same mask)
(b) This occurs if interrupt is masked (corresponding bit = 0) when interrupt occurs.
• not reflected in IRQ output.
• reflected in the HIRQREQ register. (Polling process possible)
28
MPEG Register (MPEGRGB)
This register is for transferring in the RGB format MPEG frame buffer image data
that is in the RGB format to the host.
Register Name R/W 15 14 13 12 11 10 9 8
MPEGRGB R
7 6 5 4 3 2 1 0
bit 0 ~ bit 15 : RGB data (See MPEG part for the meaning of each bit.)
3.2 Communication Method
Communication Time
All interrupts are prohibited during the response time of command/response. Re-
sponse time may be delayed when commands are continuously issued.
Communication Error
A communication time out error occurs when the CD block does not respond (com-
mand is not returned) within the prescribed time after a command is issued.
Command Issue Provisions
Command issue must obey the following provisions.
(a) A maximum of 30 commands can be issued within 6.7 ms.
(b) A maximum of 60 commands can be issued within 16.7 ms.
(c) When acquiring a subcode, a maximum of 34 commands can be issued within
13.3 ms. (subcode R~W is 16 commands + subcode Q is 1 command)
(d) Commands belonging to the same command end flag wait for execution to
end and are issued.
<Program Guide>
The polling process by continuously issuing commands is prohibited.
Regular response and the interrupt factor register are used in the polling of condi-
tion changes. Use of timing through the CSCT and SCDQ flags, and VSYNC issues
commands.
System Library User's Guide 29
Command End Flag
The end of execution of each command listed below is posted.
Table 3.2 Commands belonging to the Command End Flag
Flag Command
ESEL • Set CD device connection source • Set filter frame address range
• Set filter subheader conditions • Set filter mode
• Set filter connection destination • Reset selector
• Calculate actual data size • Execute frame address find
• Set sector length
EHST • Fetch sector data • Cancel sector data
• Cancel sector data fetch • Write sector data
ECPY • Copy sector data • Move sector data
EFLS • Move directory • Save file information
• Read file
(a) The ESEL flag also posts the end of soft reset execution.
(b) The EFLS flag is 1 when opening the tray and when stopping file access.
Command End Flag Process in CD Communication Interface
When commands belonging to the command end flag are issued, the CD communi-
cation interface function does the following.
(a) Checks the command end flag, and if 0, does not issue a command.
(b) If 1, the command end flag is cleared to 0 and a command is issued.
The command end flag is processed when the following commands are issued.
• Soft reset Clears ESEL flag to 0 (no check)
• Gets actual data size Checks ESEL flag (not cleared to 0)
• Gets frame address find results Checks ESEL flag (not cleared to 0)
• Stop file access Clears EFLS flag to 0 (no check)
30
3.3 Response
Response Contents
Response is composed of a 1 byte status and 7 byte report. The status are common
but the report depends on the command. This most basic of reports is the CD report.
Status
The following information returns to status.
• REJECT (improper command) : Command itself is invalid due to
mistake in command format.
• WAIT (hold execute) : Cannot be executed under current
conditions, therefore command can
not be received.
• Data transfer request : Shows that data transfer is necessary.
• Periodic response : Shows whether a periodic response or
response to a command.
• CD drive condition : Shows the logical condition of the
CD drive seen from the host.
(a) Response during REJECT is invalid.
(b) Status during WAIT and CD report are effective but other reports are ineffective.
Periodic Response
Periodic response is a response that returns with the communication timing of the
CD block with the CD drive. The host can obtain information (status and CD report)
without issuing a command. It is periodically updated by the communication cycle
with the CD drive. (Same as the SCDQ flag update timing.)
At standard playing speed : 13.3 ms
Periodic response update cycle At double playing speed : 6.7 ms
When not playing : 16.7 ms
Update is not done during command/response. After response is read by com-
mand, it is updated according to the next CD drive communication timing.
System Library User's Guide 31
3.4 Data Transfer
Data Transfer Procedure
When using commands to transfer data, the host must do the data transfer process
after the command/response. This procedure is listed below.
(a) The command needed for transferring data is executed (data fetch/write).
(b) Data transfer setup wait is executed. (Wait until the DRDY flag is 1).
(c) Data is input and output through the data transfer register (DATATRNS).
Get Data transfer register pointer is executed when getting the address.
(d) Data transfer end is executed when the necessary data is transferred.
Data Transfer End
When there is a data transfer request by status, end data transfer must be executed
even when no data is actually transferred. This is not necessary for REJECT and
WAIT. When an error occurs with the data transfer setup wait, the application does
not need to execute data transfer end. Execution is automatically done within the
setup wait function.
Data Transfer Errors
Table 3.3 shows errors that occur while waiting for the setup of data transfer.
Table 3.3 Data Transfer Errors
Data Transfer Error Description
Data transfer time out CD block does not complete data transfer
setup within the prescribed time.
(DRDY flag remains at 0 and does not change
to 1)
Write sectors cannot be secured Empty sectors could not be reserved by writing
sector data.
(With the DRDY flag at 0 the EHST flag is 1.)
32
4.0 CD DRIVE
4.1 CD Drive Status Change
CD Drive Status
Table 4.1 CD Drive Status
Status Explanation
<BUSY> Status change in progress
<PAUSE> Temporarily stopped
<STANDBY> Drive stop status
<PLAY> CD play in progress
<SEEK> Seeking
<SCAN> Scanning
<OPEN> Tray is open
<NODISC> There is no disc
<RETRY> Read retry in progress
<ERROR> Read data error occurred
<FATAL> Fatal error occurred (hard reset required)
Types of Drive Commands
Table 4.2 shows the types of commands (drive commands) that change the CD drive
status.
Table 4.2 Types of Drive Commands
Drive Commands Corresponding Functions
Initialize CD block CDC_CdInit
Open tray CDC_CdOpen
Play CDC_CdPlay
Seek CDC_CdSeek
Pause CDC_CdSeekd
Stop CDC_CdSeek
Scan CDC_CdScan
(a) When doing a soft reset, CD block initialization does not operate as a drive
command.
(b) Drive commands other than tray open can be done concurrently with the tray
close command.
Issuing Drive Commands
(a) Drive command response must return the <BUSY> status as long as there is
no REJECT.
(b) As a rule, command issued afterwards are issued by priority.
System Library User's Guide 33
4.1.1 Illustrations of CD Drive Status Change
1) Status Change Illustration of a Normal System.
Figure 4.1 illustrates the status change of a CD drive in a normal system.
START
Tray Close Command
Manual Close Hard Reset
Tray Open Command
Manual Open
Opened
OPEN Tray is closed
All Drive Command
No
NODISC Disc
CD Block Initialize Command Yes
Stop Command Pause Command
TOC Read
Standby Time Elapsed
STANDBY PAUSE
Automatic
PLAY
Play Command
SCAN SEEK
Scan command Seek Command
Figure 4.1 Illustration of CD Drive Status Change (Normal System)
(a) <PAUSE> occurs two seconds after TOC read at frame 0 (FAD=150=96H).
(b) The <BUSY> status indicates that a status change is in progress (on arrow line).
(c) The tray close command specifies drive commands other than tray open. The
status corresponding to every command changes after the tray is closed.
Example: Play command in the <OPEN> status changes to the <PLAY> status after the
tray is closed.
34
2) Status Change Illustration of an Error System.
Figure 4.2 illustrates the status change of a CD drive in an error system.
Statuses are explained in Table 4.3.
START
Tray Close Command
Manual Close Hard Reset
Tray Open Command
Manual Open
Opened
OPEN Tray is closed
All Drive Command
No
NODISC Disc
CD Block Initialize Command Yes
Stop Command Pause Command
TOC Read
Standby Time Elapsed
STANDBY PAUSE
Each Command
Automatic
Retry
RETRY
Retry Succeeded Retry Failed
PLAY
Read Data Error
ERROR
Each Command Fatal Error
SCAN SEEK FATAL
Figure 4.2 Illustration of CD Drive Status Change (Error System)
Table 4.3 Error Relationship Status
Status Explanation Internal Status
<RETRY> <PLAY> if retry succeeds and <ERROR> if retry fails. <SEEK>
<ERROR> Status does not change until the next drive command <PAUSE>
is issued.
<FATAL> Stops the disc motor rotation. Hard reset is required. <STANDBY>
Internal conditions indicate equal conditions as CD block internal operations.
System Library User's Guide 35
4.1.2 Table of CD Drive Status Changes
Table 4.4 lists status changes of the CD drive. For example, if the pause command is
issued during <PLAY>, <PAUSE> will be displayed.
Table 4.4 Table of CD Drive Status Changes
Operation Commands
& Status Automatic Initialize Tray Open Play Seek Pause Stop Scan
<BUSY> changes <PAUSE> <OPEN> <PLAY> <SEEK> <PAUSE> <STANDBY> <SCAN>
<PAUSE> <STANDBY> <PAUSE> <OPEN> <PLAY> <SEEK> <PAUSE> <STANDBY> <SCAN>
<STANDBY> — <PAUSE> <OPEN> <PLAY> <SEEK> <PAUSE> <STANDBY> <SCAN>
<PLAY> <PAUSE> <PAUSE> <OPEN> <PLAY> <SEEK> <PAUSE> <STANDBY> <SCAN>
<SEEK> <PAUSE> <PAUSE> <OPEN> <PLAY> <SEEK> <PAUSE> <STANDBY> <SCAN>
<SCAN> <PAUSE> <PAUSE> <OPEN> <PLAY> <SEEK> <PAUSE> <STANDBY> <SCAN>
<OPEN> — <PAUSE> <OPEN> <PLAY> <SEEK> <PAUSE> <STANDBY> <SCAN>
<NODISC> — <OPEN> <OPEN> <OPEN> <OPEN> <OPEN> <OPEN> <OPEN>
<RETRY> changes <PAUSE> <OPEN> <PLAY> <SEEK> <PAUSE> <STANDBY> <SCAN>
<ERROR> — <PAUSE> <OPEN> <PLAY> <SEEK> <PAUSE> <STANDBY> <SCAN>
<FATAL> — undefined undefined undefined undefined undefined undefined undefine
“–” indicates no change.
1) Commands issued in the <BUSY> status.
Commands issued in the <BUSY> status can be received but there is noguarantee
of immediate execution. For example, While the tray is being opened or closed, a
command is not executed until that operation is over. (However, the tray open
command is executed immediately.)
2) Tray Open/Close.
(a) As a rule, the tray open command is executed immediately in any mode.
(b) The tray open/close command when not using the automatic open/close
format is <BUSY> until executed manually.
(c) Commands in the <OPEN> status (except for tray open) change to each
status after the tray close process.
(d) When the tray is closed, <NODISC> occurs if TOC read cannot be done.
(Even if there is a disc).
3) Status Routings.
(a) Everything goes though the <BUSY> status when done by command.
(b) In some cases the routing is by way of <SEEK> when changing to the
<PLAY> and <SCAN> statuses.
4) In the case of Multi Sessions.
(a) Reads the final session of TOC.
(b) After TOC is read, the <PAUSE> status is at the 0 frame, 2 seconds
from the start position of the final session.
36
4.2 CD Drive Operation
<PLAY> Status Frame Address
The frame address (currently FAD) posted while a CD is playing indicates the sector
during the read process. The current FAD sector is not stored in the CD buffer and
cannot be retrieved. The host can access up to one sector before the current FAD. (In
the case of a CD-ROM).
FAD-1 Current FAD
↓ ↓
Store in CD buffer During Read process
(retrievable) (not retrievable)
Figure 4.3 Sectors that the current FAD indicates
When play has ended, FAD = play end position + 1. (The read out area is indicated
when the play end position concludes at the end of the disc.)
Change from <PLA
Y> Status and Sector Storage
When changing from <PLAY> to a different status, whether the sector during the
read process can be store is undefined. If changing to any status other than <BUSY>
the sector that should be stored is defined. When the pause command is issued in
the <PLAY> status and the status changes from <PLAY> to <PAUSE>, the storage
sector + 1 FAD is posted the same as with 1).
Play Range and FrameAddress
By changing play end, seek, and the play range, <PAUSE> occurs when FAD is
outside the play range and the PEND flag of the interrupt factor register becomes 1.
When FAD is outside the play range, the <PAUSE> status cannot be canceled (restart
play). Canceling <PAUSE> when FAD is within the play range changes the status to
<PLAY>.
CD Play Repeat Process
Both the repeat post frequency (0H~EH) and maximum indication frequency
(0H~FH) are shown by 4 bits. After the frame of the play end position is played
(FAD = play end position + 1), the following process is performed.
(a) If the repeat frequency is less than maximum repeat frequency, CD play will be
repeated (return to the start position and continue playing). If the repeat
frequency is <EH(14 times)> at that time, the repeat frequency is increased by 1.
(b) If the repeat frequency is greater than or equal to the maximum repeat
frequency, CD play will not repeat (play end position + 1 and pause).
System Library User's Guide 37
If the play range or maximum repeat frequency changes, the repeat frequency clears
to 0. Neither the repeat frequency nor play range rely on the tray open/close or the
seek operation while play is in progress.
Seek the Home Position (Stop)
The following operations are done by seeking the home position.
(a) The disc motor rotation stops and pickup is moved to the standby position
inside the circumference.
(b) The CD drive status changes to <STANDBY> and report is an invalid value
(FFH line).
(c) When the status changes from <STANDBY> in the home position to <PAUSE>,
seek moves to the start of the disc.
(d) The play range, maximum repeat frequency, and repeat notification frequency
which have been saved cannot be changed.
Pickup Position in the <ST
ANDBY> status
• Moving from the <PAUSE> status: Current position (report also remains
unchanged).
• When seeking the home position: Standby position inside the circumference
(report is an invalid value).
CD Read in a Full CD Buffer
If the CD buffer becomes full, a <PAUSE> will occur and the BFUL flag of the inter-
rupt factor register becomes 1. When there is space in the CD buffer, play automati-
cally starts where it left off.
38
4.3 Subcodes
Subcode Update and SCDQ Flag
The subcode Q is updated for each frame (one sector). The SCDQ flag becomes one
every time subcode Q is updated (same as update timing of periodic response).
Subcode R~W can update four packs (one packet) with one frame and be stored in
the pack buffer. There is a 23 pack (short of six packets) segment in the CD block.
<Standard Speed when playing CD-DA>
13.3 ms
Subcode Q Update
↓ ↓ ↓ ↓
SCDQ Flag
Pack Data Aquisition 01 23 45 67 89 A B C DE F
(Subcode R ~W)
Pack Data Update
(Subcode R ~W Decode Completion) 0 1 2 3 4 5 6 7 8
The SCDQ flag clears the host to 0. The CD block is only 1. Subcode R~W begins the
decode process when data fetch starts and if 8 packs have been collected.
Figure 4.4 Subcode Update and SCDQ Flagiming
T
Subcode Get Timing
The host issues the Get command by a timing with the SCDQ flag at 1 and gets
subcode Q and R~W data. (Polling is prevented by continuously issuing commands.)
Getting Subcode Q
The Get command can be executed any time regardless of the CD drive status. But
when in the <OPEN> status, ineffective values may return depending on the CD
drive status.
Getting Subcode R~W
Pack data reissues the Get command and gets data until the pack buffer is empty.
However, exceeding 16 packs within the time of one frame (13.3 ms) is not allowed.
WAIT is returned if the pack buffer is empty and pack data disappears.
System Library User's Guide 39
Subcode R~W Decode
(a) Decode start and end
Decode On/Off are set by the initialize command of the CD block.
To start decoding, set decode to ON then execute CD-DA play.
(b) Decode Start Timing
Start decode during <PLAY>.
Data actually begins to be retrieved two frames before <PLAY>.
(c) Pack Buffer Clear Timing
Clear is done when decode begins.
The pack buffer content is saved even when doing seek and pause.
(d) Decode Conditions
Decode is done only when playing CD-DA.
Decode is not done in other cases (while scanning or playing the CD- ROM
area)
Subcode R~W Error
(a) Over Run Error
If a pack is not fetched in time, the pack buffer is overwritten and an over run
error occurs. After data transfer has ended, the get pointer advances to the
extent that the pack is without an overrun error. The host must finish transfer-
ring data within the decode time of 1 pack (3.2 ms).
(b) Pack Data Error
Pack data checks CRC and corrects the data if an error is detected. A pack data
error occurs if the data cannot be corrected.
40
5.0 CD BLOCK CONFIGURATION
The characteristics and logical configuration of the CD block as seen from the host is
shown below.
Data Format
The basic unit of the stream handled by the CD buffer is a fixed size (2352 bytes)
sector no matter what the device is.
Stream Select Circuit
The functions that separate and store streams are attained by a filter and buffer
partition design. These functions are considered to be logical elements (selector).
The circuit that selects the necessary streams is constructed by combining selectors.
Device
The CD and MPEG are considered to be logical devices that produce and absorb
streams. The flow of a stream is controlled by connecting a device to the stream
select circuit.
5.1 Data Flow
Figure 5.1 shows the entire data flow for a CD block.
CD-ROM MPEG Buffer MPEG Decoder
[CD Play]
Read Write Decode
CD Read Write Display
VDP2
CD Buffer Read RGB888
Copy, Move (Buffer MPEG Frame
Partition) Buffer
Write
CD Block
Host Data Transfer MPEG Register
Register (RGB)
Get Put Get RGB555
Host
Figure 5.1 CD Block Entire Data Flow
System Library User's Guide 41
5.2 Stream Process Mechanism
Figure 5.2 shows the overall configuration of the CD block from the viewpoint of
stream flow.
.
There are 24 selectors numbered 0 to 23.
Selector
Stream outflow device Filter Buffer partition Stream inflow device
CD-ROM Host
MPEG frame buffer MPEG decoder (A)
MPEG buffer MPEG decoder (V)
Host MPEG frame buffer
Copy / Move
Device output connector MPEG buffer
Device input connector
Partition output connector
Filter input connector
False output connector
Figure 5.2 CD Block Overall Configuration
[What each part does]
(a) Device: Produces and absorbs streams (stream inflow and outflow device.)
(b) Selector: Composed of a filter and buffer partition, used for selecting streams.
(c) Filter: Separates streams by set conditions (conforms to Yes/No conditions.)
(d) Buffer Partition: Stores streams, releases or cancels data through outside
requests.
There are connectors for connecting every device to a selector. The device and selector
input/output connectors are 1 to 1. Connections can be made between selectors as well.
Connections flow regularly in streams by connecting connectors that don’t pass
through partitions and stop when entering a partition. Sectors that are output from
an output connector that is not connected will be canceled.
Devices must be connected through a selector. A device output connector can only
connect to a filter input connector, and a device input connector can only connect to a
partition output connector.
42
5.3 Selector Configuration
The selector process function does not rely on the parts connection destination or
device. It separates and stores the input stream and only outputs by request. Figure
5.3 shows the selector configuration.
Filter Buffer partition
Filter input connector True output Partition input Partition output
connector connector connector
False output
connector
Figure 5.3 Selector Configuration (Initial condition)
In the initial condition of the selector, the filter and partition with the same number
are connected through the true output connector and partition input connector.
Other connectors are not connected.
5.3.1 Filter
Conditions (FAD range, subheader) of the sector that should pass are set in the filter.
Sectors that match with the conditions are output to the true output connector and
stored in buffer partition of the connection destination. All other sectors are output
to false output connectors.
False output connectors can be connected to other filter input connectors and
achieve in secession similar selection processes. Sectors output from unconnected
output connectors will be deleted.
Decide conditions Store
Yes
Stream
No
Yes
No
Yes
No
Clear
Figure 5.4 Type of Stream Select Process
System Library User's Guide 43
5.3.2 Buffer Partition
1) Buffer Partition Configuration
The CD buffer is divided into several buffer partitions. Figure 5.5 shows the
configuration of a buffer partition.
No -1 2 1 0 Buffer partition number
→ → 0
N1 -1 2 1 0
→ → 1
Last partition Sector postion First partition
Np -1 2 1 0
→ → P
Buffer partition size (sector units) Np
N23 -1 2 1 0
→ → 23
23
Np: buffer partition size, P: buffer partition number, ∑ Np ≤ CD buffer size
p=20
Contents of each partition are not fixed; data can be stored as long as there is space in the
whole CD buffer.
Figure 5.5 Buffer Partition Configuration
2) Storing Sectors to the Buffer Partition
Sectors entered in partitions are stored in the last partition. The last sector
position of the partition is equal to the buffer partition size minus 1.
3) Discharging and Canceling Sectors from the Buffer Partition
Two ways to discharge sectors from partitions are to keep the sectors at the
partition discharge source or clear the sectors (clear only can also be selected.)
For example, get to the host corresponds to “Get” and “Get and Clear.”
Flowing in and out between selectors corresponds to “Copy” and “Move.”
4) CD 1 Sector Interrupt and Store Destination
One sector interrupt in CD read occurs in each sector at the time the sector is
stored in the partition. The CD block stores the partition number of the store
destination. The store destination partition number of the sector read last can
be retrieved from the host.
44
5.3.3 Connectors
1) Connection from Buffer Partition to Filter (Sector Data Copy/Move)
The partition output connector is connected to the filter input connector and the
flow of sector data allows sector data to be copied and moved. The connection
and flow I/O process are executed by executing one command.
Because only the selected number of sectors
flow, loop does no continue indefinitely.
(a) Copy/Move for different selector (b) Copy/Move for self
Figure 5.6 Copy/Move Sector Data
2) Selector Connections by OR Condition (multi to one connection)
True output connectors of several filters can be connected to the same partition
input connector. This enables a sector to be stored in whichever of several
conditions it coincides with.
(OR condition: logical add).
B A or B
Figure 5.7 Selector Connection by OR Conditions
System Library User's Guide 45
3) Types of Connectors and Connection Destination
Table 5.1 Types of Connectors and Connection Destination
Output/Input Filter Input Partition Input Device Input
Device Output O X X
True Output X ∆ X
False Output O X X
Partition Output O X O
O: connectable (1 to 1), only 1 output connector can connect
to 1 input connector.
∆: connectable (multi to 1), several output connectors can
connect to the same input connector.
(OR condition)
X: not connectable
Whether to do a simple process of connecting (disconnecting) by one command
or a complex process collecting connections and flow in/out processes depends
on each device. The CD-ROM and MPEG decoder are single processes. Others
(host, copy/move, etc.) are complex processes.
46
5.3.4 Selector Precautions
1) Error in the Stream Process
Except with the CD device, error in the stream process occurs in the following
cases.
• Connection separates during operation.
• CD buffer becomes full while reading or writing to the buffer partition.
2) Selector Set Effective Timing
FAD with selector settings made effective while a CD is playing is within
one FAD from response of the selector set command. The host considers the
margin and issues the set command before 10 or more sectors of the target FAD.
When the selector setting has ended, the ESEL flag of theinterrupt factor register
becomes 1.
3) Sector Data when Changing Connections
When the CD is being read, data is not omitted even if the connection changes
during the sector data sequence. In short, the flow of data is guaranteed when
temporarily interrupted while switching connections.
4) General Access to the Buffer Partition (general command specifying sector
position and sector range)
Returns to WAIT when the specified sector range doesn’t exist like the data
number within the partition is exceeded. Always returns to WAIT when the
data number within the partition is 0.
5) Clear Discharge from Buffer Partition
When a sector is cleared and discharged from a partition, all data of the selected
sector range is cleared (get and clear or move sector data) even if the process
stops because of an error etc.
System Library User's Guide 47
5.4 Sector Data Format
1) Basic Format
Sector data format basically conforms to the CD-ROM XA sector format.
2352 bytes
2340 bytes
2336 bytes
12 4 2048 288 bytes
CD-ROM
Mode 1 Sector User Data
synch Header EDC/ECC, etc.
12 4 8 2048 280 bytes
CD-ROM XA
Mode 2
Sector Header Sub
Form 1 synch header User Data EDC/ECC
12 4 8 2324 4 bytes
CD-ROM XA
Mode 2 Sector Sub
synch Header User Data EDC,
Form 2 header
etc.
4 bytes repeat
MIN SEC FRAME MODE FN CN SM CI FN CN SM CI
FN: File Number SM: Sub Mode
CN: Channel Number CI: Coding Information
1 byte
Figure 5.8 CD-ROM XA Sector Format
2) Handling Sub header and User Data (2048 bytes)
(a) Sub header except for Mode 2 (mode part within header is 02H) is handled
as 0.
(b) There is user data immediately after the header only for Mode 1 (mode part
within header is 01H). Otherwise, user data is considered to exist in the
same position as mode 2 form 1.
(c) Storing user data within a buffer partition, except data from a CD device, is
the same as mode 2 form 1. The first 24 bytes is 0, and data after the user
data is undefined.
48
5.5 CD Block Initialization
TOC/Session Information
Initialized when the tray is opened, and information is in a non-input condition.
Reads TOC when tray is closed (unrelated to the reset of software.)
File Information
Initialized if tray is opened or software is reset, and information is in a non-input
condition. The host explicitly commands the reading of file information.
Host Information
Initialized if software is reset (unrelated to opening the tray.)
[Host Information] . . . . . . mostly host set information and buffer data
• Initialization information (CD block initialization parameters)
• Play information (play range, maximum number of repeats, current repeat
notification number)
• Selector information (filter, buffer partition, etc., host setting for selector)
• Data within buffer, buffer partition size, space size
• Actual data size retained, setting of sector length
• Data transfer control register (initializing ends transfer of data)
• MPEG related information
If the CD block is initialized without resetting the software, information in the TOC/
Session and Host is not initialized.
System Library User's Guide 49
6.0 CD BLOCK FILE SYSTEM
6.1 File Management in CD-ROM (ISO9660)
The CD block file system supports a logic format that conforms to ISO9660.
Directory block
Volume Identifier Pass table (Directory file) File
Root directory Root directory
1
Self
f1
2 Sub directory Parent=Self
Pass table size
Pass table address
Root directory code
of Root directory 3 f1
f2
Pass table code f2
~ ~
~ ~ Sub directory
n
Parent
Directory number
Directory block address
Parent directory number f3
Directory name f3
Sub directory
Sub directory
File lead sector address
Parent File size
File name
System information for mode 2
Directory code (file number, form information)
• Volume identifier : Arranged from CD 00:02:16 (FAD = 166 = A6H)
• Pass table : A collection of pass table records. Pass table size and
address are recorded in the volume identifier.
• Pass table record : Corresponds to one directory (root, sub)
Record position is the directory number (1 ~ n)
Directory information is listed in the directory book.
• Directory block : A collection of directory records. A directory block is
considered to be one file. (directory file)
• Directory record : Corresponds to one file (includes directory).
Figure 6.1 File Management Data Configuration in CD-ROM (ISO9660)
50
6.2 CD Block File System Functions
The CD block file system (referred to “file system” hereafter) has the following
functions.
1) Moves directories and holds file information
Moves to the specified directory and holds in the CD block file information
within that directory.
2) Gets file information
Transfers held file information in response to a request from the host.
3) Reads files
Reads file sector data originating from held file information to the CD buffer.
The host is able to extract read sector data by data transfer.
4) Stop Accessing Files
CD play stops by moving a directory, holding file information, and reading a
file. If file access is stopped, the CD block pauses the CD drive.
<on the CD-ROM>
Directory block (for directory record)
0 Root directory
1 Parent=Self
2 File 1
~ ~
Move directory
(Hold file information in directory move destination)
0 Self
1 File Information Table
Parent
2 0 Self .... File information of the current directory self
1 Parent
~ ~
i File i Holds file
information
2 File i ← Held identifier of first file (i)
1+i File i+1 3 File i+1 Held file information number (n)
... ...
~ File j
~ ~ File j
~ ← fid = j
... ...
~
i+n -1 File i+n-1
~ 255
~ File i+n-1
~
~ ~
File identifier (fid)
Directory record sequence number
File j Reading file Buffer partition
Figure 6.2 CD Block File System Configuration
System Library User's Guide 51
6.2.1 File Information Holder Method
The CD block provides 256 file information tables that hold file information for
accessing. The first two parts in this table always holds current directory (self) and
parent directory information. Up to 254 parts of ordinary file information can be
held. (The number cannot be designated.)
1) Directory Move
If a directory is moved, the directory record is read, and file information is
extracted and held in a table. The range that is held is from the start of the
directory block.
2) Holding File Information (specifying the hold range)
Specifies a file identifier and can hold file information from any position
within the current directory. In this case also, self and parent information is
held in the first two parts of the table.
6.2.2 File Access Procedure
1) Moving to the Root Directory
In using the file system, first move to the root directory and create a file informa-
tion table. This is the same when file information is cleared when starting up or
changing disks. Neither a table can be created nor the file system used if the
disk is not in the ISO9660 format. (REJECT occurs if getting the holding file
information range.)
2) Holding File Information
The file system can access only files inside the file information table. When
accessing a file, the file information must be held beforehand. When moving
directories, the target directory must be held.
3) Reading Files
File identifier and offset (sector units) are selected and the file read. The read
destination selector is selected by the filter number.
4) Getting Sector Data
Files read to the buffer partition transfer and fetch data by fetching sector data.
Data can be fetched while reading ,and there is no waiting for read to end.
Pause occurs if the CD buffer becomes full while reading files. If a space can be
created, pause is canceled and the remaining files read.
5) Ending File Read
When file read has ended, the EFLS flag of the interrupt factor register becomes
“1”. Executing the file access stop command stops file read. (Accessing a file is
done in the same by moving a directory and holding file information.)
52
6.2.3 File System Precautions
1) Work Selector Designation
When reading file information from the CD-ROM, the CD block requires a work
selector. One selector can be designated to move a directory and hold file
information. At least one empty sector is required at this time. The selector
used is canceled after the process ends.
2) Selector Settings
When accessing to a file, the file system does the following settings for the
selector.
(a) Connection conditions of indicated filter
• filter input connector : connects with a CD device.
• true output connector : connects with buffer partition with the same
number.
• false output connector : cuts off other selectors.
(b) Filter conditions
Table 6.1 Set Filter Condition
Action Filter Condition
Move Directory • Sets filter frame address range (FAD range)
Hold File Information • Makes effective the frame address range of the filter mode
• Sets filter frame address range.
Read Files • Sets the file number of the filter subheader conditions
• Makes effective the filter mode FAD range and file number selection
(c) Filter and connected buffer partition
The buffer partition sectors are cleared before files are accessed.
3) CD Play Range and Drive Command
When accessing a file, the play range becomes the default value (disk first to
last). The drive command (CD play, pause, etc.) is executed unchanged even
with the file system in operation. Be aware that operation of the file system
can be obstructed. Auto pause/cancel-pause operate normally when the buffer
is full.
4) File Access End and Stop
When file access ends or is stopped, the EFLS flag becomes 1. File access also
stops if the tray is open. (But before the <OPEN> status, EFLS = 1.) While
directory move and file information hold are being executed, the file information
table is destroyed if file access stops.
System Library User's Guide 53
5) Multi Session
In multi session cases, the file system refers to the volume descriptor of the last
session.
54
7.0 DATA SPECIFICATIONS
This chapter lists the constants, data types, access macros, etc. used by the CD com-
munication interface.
• Format
In the figures, the reserved regions are shown by the “–” mark. A 0 must be
specified in the reserve regions.
7.1 Data List
Table 7.1 is the CD communication interface data list.
Table 7.1 Data List
Data Data Number
Name
Basic data 1.0
Constants 2.0
TOC information & Session information 3.0
Status and Report 4.0
Subcode information 5.0
Data Types 6.0
CD communication function return code CdcRet 6.1
CD status information CdcStat 6.2
Hardware information CdcHw 6.3
CD position parameters CdcPos 6.4
CD play parameters CdcPly 6.5
Sub header conditions CdcSubh 6.6
Sector information CdcSct 6.7
File information CdcFile 6.8
System Library User's Guide 55
7.2 Data Detailed
7.2.1 Basic Data
Title Data Data Name No
Data Specification Basic Data 1.0
1) Basic Data Types
Type Name Description
Uint 8 1 byte integer without code
Sint 8 1 byte integer with code
Uint 16 2 byte integer without code
Sint 16 2 byte integer with code
Uint 32 4 byte integer without code
Sint 32 4 byte integer with code
Boo 1 logical type 4 byte integer (assumes logic constant as
value)
2) Logic Constants
Used as
Used as aa logic
logic (Boo
(Bool)
1) value.
value.
Constant Name Value Description
FALSE 0 Indicates that logic value is false
TRUE 1 Indicates that logic value is true
OFF 0 Indicates switch is off (false)
ON 1 Indicates switch is on (true)
3) Additional
Constant Name Value Description
NULL ((void *)0) NULL pointer
56
7.2.2 Constants
Title Data Data Name No
Data Specification Constants 2.0
1) Bit Names of interrupt factor register relationship
(HIRQREQ, HIRQMSK).
Constant Name Description
CDC_HIRQ_CMOK Enable commands to be issued
CDC_HIRQ_DRDY Prepare data transfer
CDC_HIRQ_CSCT Store 1 sector
CDC_HIRQ_BFUL CD buffer is full
CDC_HIRQ_PEND CD play end
CDC_HIRQ_DCHG Disk change
CDC_HIRQ_ESEL End Selector set
CDC_HIRQ_EHST End host input/output
CDC_HIRQ_ECPY End copy
CDC_HIRQ_EFLS End file system
CDC_HIRQ_SCDQ Subcode Q
2) Special designation of buffer partition sector range
(sector location and sector number).
Constant Name Description
CDC_SPOS_END Indicates sector location of last partition
Same as (sector no. in partition - 1) designated
CDC_SNUM_END Sector number from designated sector location SP
to last partition.
Same as designated (sector no. in partition - SP)
Effective with functions that correspond to the buffer partitions below.
CDC_CalActSiz, CDC_ExeFadSearch, CDC_GetSctInfo, CDC_GetSctData,
CDC_DelSctData, CDC_GetdelSctData, CDC_CopySctData, CDC_MoveSctData
CDC_SNUM_END
Filter Buffer Partitions
Stream N-1 SP 2 1 0
Designated Sector Location SP
CDC_SPOS_END
3) Other
Constant Name Description
CDC_NUL_SEL Special value of selector no. (filter number, buffer
partition number)
CDC_NUL_FID Special value of file identifier
System Library User's Guide 57
7.2.3 TOC and Session Information
Title Data Data Name No
Data Specification TOC and Session Information 3.0
1) TOC Information
4 Bytes <Track Location Information>
0 Track 1 Information byte 0 1 2 3
Location 1 Track 2 Information
Ctrl Adr Track start frame address
information 2 Track 3 Information
of every track ~ ~ Tracks not existing on TOC is FFFFFFFFH
(99 tracks) n Track n + 1 Information
<First/Last Track Information>
~ ~ byte 0 1 2 3
98 Track 99 Information
POINT=A0 Value
99 First Track Information (A0) Ctrl Adr First track
number PSEC PFRAME
100 Last Track Information (A1)
track POINT=A1 Value
101 Read Out Information (A2) Ctrl Adr Last
number PSEC PFRAME
First/Last track numbers are PMIN binary values
4 byte unit offsets <Read Out Information>
0 1 2 3
Ctrl Adr Read out start frame address
Indicates final session value for multi sessions
2) Session Information
Session Number
<Total Session Information>
4 Bytes byte 0 1 2 3
0 Total Session Information Session External read out start frame
Session 1 Information Total No. address
1
2 Session 2 Information Equal to TOC read out start FAD in single
sessions
~ ~ <Session Location Information>
n Session n Information
0 1 2 3
~ ~ Start TNO
within Session start frame address
98 Session 98 Information
session
99 Session 99 Information TNO (track no.) is a binary value
Non-existing sessions are FFFFFFFFH
(when session number exceeds session total)
58
7.2.4 Status and Report
Title Data Data Name No
Data Specification Status and Report (1/2) 4.0
1) Response Format
Command response is in the format below. Whether CD report returns as a
report depends on the command. Periodic response absolutely returns CD
report.
byte 0 1 2 3 4 5 6 7
Status Report
Rep Ctrl
CD Report Flg TNO X FAD
Cnt Adr
Combined status and CD reports are called CD status information.
2) Status
A status of FFH indicates REJECT (abnormal command)
The status code is valid when WAIT (bit 7 = 1). Other bits (bit 4 to bit 6) are 0.
bit 7 6 5 4 3 2 1 0
Status code (CD drive status)
Value Status Explanation
00H <BUSY> Status currently changing
01H <PAUSE> Currently paused
02H <STANDBY> Standby (drive in suspended
status)
03H <PLAY> Playing CD
04H <SEEK> Seeking
05H <SCAN> Scanning
06H <OPEN> Tray is opened
07H <NODISC> No disc
08H <RETRY> Currently retrying read
09H <ERROR> Read data error occurred
0AH <FATAL> Fatal error occurred
1: Periodic Response 0: Command Responce
1: Data Transfer Request 0: Not the same
1: WAIT (execute reserve) 0: ACK (command normal recieve)
System Library User's Guide 59
Title Data Data Name No
Data Specification Status and Report (2/2) 4.0
3) CD Report
byte 1 2 3 4 5 6 7
Rep Ctrl
CD Report Flg TNO X FAD
Cnt Adr
FLG : 4 bit flag
bit 7 6 5 4
1 : CD-ROM 0 : CD-DA (or when seeking or scanning)
Rep Cnt : 4 bit repeat frequency. Notification range 0H ~ EH (0 ~ 14 times)
Ctrl Adr : CONTROL/ADR byte of subcode Q
TNO : Track number of subcode Q (binary value, not BCD)
X : Index number of subcode Q (binary value, not BCD)
FAD : Frame address (in header information when CD-ROM,
otherwise, based on subcode Q)
4) CD Report content in every status
CD Report is invalid for REJECT and valid for WAIT.
CD drive status and CD report contents are shown below. The FFH rows mean
invalid values.
Status CD flag/repeat Control/ADR Track No. Index No. Frame address
<BUSY> O / FFH O / FFH O / FFH O / FFH O / FFFFFFH
<PAUSE> O O O O O
<STANDBY> value at pause value at pause value at pause value at pause value at pause
(when seek home)
FFH FFH FFH FFH FFFFFFH
<PLAY> O O O O O
<SEEK> O target position target position target position target position
<SCAN> O O O O O
<OPEN> FFH FFH FFH FFH FFFFFFH
<NODISC> FFH FFH FFH FFH FFFFFFH
<RETRY> O O O O O
<ERROR> FFH FFH FFH FFH FFFFFFH
<FATAL> undefined undefined undefined undefined undefined
O: Current value. Seek Home: seek (stop) against home position.
When the standby time expires and the status changes from <PAUSE> to
<STANDBY>, the value when paused is saved.
60
5) When CD report content is an ineffective value
(a) The value immediately before the repeat frequency is saved. If changing to
a different status, returns to the retaind value.
(b) Moves to the start (FAD = 150) of the disk if the status changes from Seek
Home to <PAUSE>.
(c) The value immediately before <ERROR> is retained. If changing to the
<PAUSE> status, returns to the retained value.
(d) Midway during the <BUSY> status, the ineffective value returns in some
cases when changing to a different status.
System Library User's Guide 61
7.2.5 Subcode Information
Title Data Data Name No
Data Specification Subcode Information 5.0
1) Subcode Q Information
(a) When Adr = 1
byte 1 2 3 4 5 6 7 8 9 10
Ctrl
TNO X P_FAD 00 Q_FAD CRC
Adr
Ctrl Adr : CONTROL/ADR byte
TNO : Track No. (binary value not BCD)
X : Index No. (binary value not BCD)
P_FAD : Time within track (frame address format with track lead at 0)
Q_FAD : Absolute time (frame address format with 00:00:00 at 0)
The content in each status is the same as for the CD report.
Values in read in and read out are shown in the table below.
(Can be acquired by multi-session)
TNO X P_FAD
01H ~ 63H (1 ~ 99) 01H ~ 63H Elapsed FAD within track
AAH (Read Out) 01H ~ 63H Elapsed FAD within track
00H (Read In) 01H ~ 63H, A0H, A1H, A2H 000000H
Read in of the first session is Q_FAD = 000000H.
(Normally cannot be acquired).
(b) In other cases: the subcode Q value unchanged (10 bytes except CRC)
2) Subcode R~W Information
R S T U V W
bit 7 6 5 4 3 2 1 0
Pack 24↑bytes
↓
24↑bytes
Packet (corresponds
Pack
↓ to1 frame = 1 sector)
24↑bytes
96 bytes
Pack
↓
Pack 24↑bytes
↓
unused (padded by 0)
Subcode R~W is decoded in 1 pack units (24 bytes = 12 words).
The CD block has an internal pack buffer of 23 packs (short of 6 packets).
62
7.2.6 Data Type
Title Data Data Name No
Data Specification CD Communication Function Return CdcRet 6.1
Code
1) Return Code
CdcRet ret . . . . . . Be sure ret is not the pointer.
Access Macro Type Explanation
CDC_RET_ERR (ret) Sint 16 Error Code
CDC_RET_STATUS (ret) Uint 8 Status
2) Error Code
Constant Name Explanation
CDC_ERR_OK Normal (process continuation)
CDC_ERR_CMDBUSY Command end flag is not 1
CDC_ERR_CMDNG CMOK flag is not 1 when command is
issued
CDC_ERR_TMOUT Time out (wait for response, wait for data
transfer ready)
CDC_ERR_PUT Data transfer read wait by sector data
write. Could not reserve empty sectors.
CDC_ERR_REJECT REJECT for command response
CDC_ERR_WAIT WAIT for command response
CDC_ERR_TRNS Abnormal data transfer size
CDC_ERR_PERI Not a periodic response
CDC_ERR_PTYPE Abnormal play, seek position type
3) Status
The retaining status of the CD communication interface is substituted in the
return code status together with all functions. Response status returnswhen
response is acquired by acquiring periodic response or issuing commands.
The holding status returns unchanged when a response cannot be acquired by
not issuing a command or error.
System Library User's Guide 63
Title Data Data Name No
Data Specification CD Status Information CdcStat 6.2
Combine the CD block status and CD report to create CD status information.
1) CD Status Information
CdcStat *stat
Access Macro Type Explanation
CDC_STAT_STATUS (stat) Uint 8 Status
CDC_STAT_FLGREP (stat) Uint 8 CD report CD flag and repeat no.
CDC_STAT_CTLADR (stat) Uint 8 CD report CONTROL/ADR byte
CDC_STAT_TNO (stat) Uint 8 CD report track no. (binary value)
CDC_STAT_IDX (stat) Uint 8 CD report index no. (binary value)
CDC_STAT_FAD (stat) Sint 32 CD report frame address
2) CD Report CD flag and Repeat Count
bit 7 6 5 4 3 2 1 0
Repeat number (0H ~ EH: repeat 14 times)
1: CD-ROM 0: CD-DA (or when seeking or scanning
Title Data Data Name No
Data Specification Hardware Information CdcHw 6.3
1) Hardware Information
CdcHw *hw
Access Macro Type Explanation
CDC_HW_HFLAG (hw) Uint 8 Hardware flag
CDC_HW_VER (hw) Uint 8 CD block version information
CDC_HW_MPVER (hw) Uint 8 MPEG version information
CDC_HW_DRV (hw) Uint 8 CD drive information
CDC_HW_REV (hw) Uint 8 CD block revision information
2) Hardware Flag
bit 7 6 5 4 3 2 1 0
1 : MPEG exists 0: not the same
1 : Hardware error occurs 0: Normal
64
Title Data Data Name No
Data Specification CD Position Parameters (1/2) CdcPos 6.4
Designates the CD range of play (start and end positions) and is used in designating
the seek position.
1) Position Type
Default value, frame address, track/index, and no change can be designated at
position parameters. The constants (position type) below are used to select the
parameter.
Constant Name Explanation
CDC_PTYPE_DFL Designates default values
For CD play : indicates disk start and end.
For seek: indicates home position.
CDC_PTYPE_FAD Designates frame address
CDC_PTYPE_TNO Designates track/index
CDC_PTYPE_NOCHG Designates no change (no change in set values)
Beginning of disc: FAD = 150(96H) position (2 seconds, 0 frame with absolute time)
End of disc: FAD = readout start frame address (TOC information) - 1 position.
2) Position Paramters
CdcPos *pos
Access Macro Type Explanation
CDC_POS_PTYPE (pos) Sint 32 Position type
CDC_POS_FAD (pos) Sint 32 Frame address, FAD sector no.
CDC_POS_TNO (pos) Uint 8 Track number
CDC_POS_IDX (pos) Uint 8 Index number
3) Setting Method
(a) Designating the default value
CdcPos pos;
CDC_POS_PTYPE (&pos) = CDC_PTYPE_DFL;
(b) Designating the frame address
CDC_POS_PTYPE (&pos) = CDC_PTYPE_FAD;
CDC_POS_FAD (&pos) = fad; /* frame address */
The end position is designated by sector number (FAD sector
number) from the starting FAD
(c) Designating the Track/Index
CDC_POS_PTYPE (&pos) = CDC_PTYPE_TNO;
CDC_POS_TNO (&pos) = tno; /* track number */
CDC_POS_IDX (&pos) = x; /* index number */
(d) Designating No Change
CDC_POS_PTYPE (&pos) = CDC_PTYPE_NOCHG;
System Library User's Guide 65
Title Data Data Name No
Data Specification CD Position Parameters (2/2) CdcPos 6.4
4) Execptions to Frame Address
The frame address is explained by the conditions below.
Condition Start and Seek Positions End Position
FAD < disc start FAD = disc start (150) FAD = 150+FAD sector no. - 1
(when starting FAD <150)
FAD > disc end FAD = disc end + 1 FAD = disc end
(equal to read out)
Relationship of start and end positions:
End FAD = Start FAD + FAD sector number - 1
(The held contents of the play range are the Start FAD and End FAD.)
5) Execptions to Track/Index
The track/index is explained by the conditions below.
Condition Start and Seek End Position
Positions
TNO = 0 (track default TNO = disc start track TNO = disc last track
value)
X = 0 (index default X =1 X = 99(63H)
value)
TNO < disc start track TNO = disc start track TNO = disc start track
X = 1 (same as X = 0) X = 99 (same as X = 0 )
TNO > disc end track TNO = disc end track TNO = disc end track
X = 1 (same as X = 0) X = 99 (same as X = 0 )
X does not exist (from the next track) (until track ends)
TNO: track number, X: index number
X = 0 means designation of the track only. (track start/last index)
TNO = X = 0 is the default value of the position parameter.
(Start position: start of disc, End position: end of disc, Seek postion: home
postion)
6) Exceptions to the Play Range
The play range is retained if the end postion is smaller than the start position,
but the CD will not play. (For designating both frame address and track/index)
7) Meanings of Special Designations
• Specifies seek position default value: used as a stop command.
(seeks home position)
• Specifies seek position no change: used as a pause command.
• Specifies play range no change: used with pause cancel (retry CD play).
66
Title Data Data Name No
Data Specification CD Play Parameters CdcPly 6.5
Used to designate the play range and play mode when playing a CD.
1) Play Mode
When playing a CD, the maximum repeat count of the play segment and the
existence of pickup movement (play position) to the start position are
designated. The designation range of the maximum repeat count is 4 bits.
The default value is 0.
bit 7 6 5 4 3 2 1 0
Maximum Repeat Count
Value Explanation
00H No repeat (plays only one time)
01H ~ 0EH Repeat designation count (repeat 1 ~ 14
times)
0FH Infinite repetitions
7FH Does not change maximum repeat count
1: Does not move pickup to start position 0: Same movement
Constant Name Explanation
CDC_PM_DFL Play mode default value (no repeat, moves pickup)
CDC_PM_REP_NOCHG No change in maximum repeat count
CDC_PM_PIC_NOMOV Does not move pickup to start position
(<PAUSE> status when current position is outside play range)
CDC_PM_NOCHG Play mode does not change (can change play range only)
Equal to (CDC_PM_REP_NOCHG : CDC_PM_PIC_NOMOV)
System Library User's Guide 67
2) Play Parameters
CdcPly *ply
Access Macro Type Explanation
CDC_PLY_START (ply) CdcPos Play start position parameters
CDC_PLY_STYPE (ply) Sint 32 Start position type
CDC_PLY_SFAD (ply) Sint 32 Start position frame address
CDC_PLY_STNO (ply) Uint 8 Start position track number
CDC_PLY_SIDX (ply) Uint 8 Start position index number
CDC_PLY_END (ply) CdcPos Play end position parameters
CDC_PLY_ETYPE (ply) Sint 32 End position type
CDC_PLY_EFAS (ply) Sint 32 End position frame address sector
number
CDC_PLY_ETNO (ply) Uint 8 End position track number
CDC_PLY_EIDX (ply) Uint 8 End position index number
CDC_PLY_PMODE(ply) Uint 8 Play mode (repeat designation,
pickup movement)
68
3) Method for setting play parameters
Play parameters designate the play range and play mode. Play range is
designated by a combination of the position parameters of the start and end
positions.
(a) Track designation and frame address designation cannot be combined in the
play range. In such cases, REJECT is returned. All other play range combi-
nations are possible.
(b) All play range and play mode combinations are possible.
(c) The play range and maximum repeat count is held within the CD block and
are effective until reset.
(d) Default value: start of disc to end of disc, no repeat, moves pickup.
Examples of settings are shown below.
N o . Play Method Start Position End Position Comments
1 Track designation tno 1, x1 tno 2, x2
2 Frame address fad fasnum note: 1
designation
3 Play from first of disc CDC_PTYPE_DFL tno 2, x2
fasnum
4 Play until end of disc tno 1, x1 CDC_PTYPE_DFL
fad
5 End position does not tno 1, x1 CDC_PTYPE_NOCHG note: 2
change. (only the start
fad
position changes)
6 Start position does not CDC_PTYPE_NOCHG tno 2, x2 note: 2
change. (only the end
fasnum
position changes)
7 Play is retried from the CDC_PTYPE_NOCHG CDC_PTYPE_NOCHG CDC_PM_NOC
current position without HG is
changing the play range designated in
and play mode. the Play mode.
<KEY> fad: frame address fasnum: frame address sector number
tno 1: start track number tno 2: end track number
x1: start index number x2: end index number
Note 1: fad + fasnum -1 is retained as the end postion.
Note 2: Track and frame address designation cannot be combined even if there is no change on
the one hand.
4) Execptions to the Play Range
No play if the end postion is less than the start position. Becomes <PAUSE>
status same as play range exterior. The play range is held and the play mode is
also effective. (Pickup moves to the start position.)
System Library User's Guide 69
Title Data Data Name No
Data Specification Sub header Conditions CdcSubh 6.6
Used when setting/getting sub header conditions for a filter.
1) Sub header Conditions
dcSubh *subh
Access Macro Type Explanation
CDC_SUBH_FN (subh) Uint 8 File Number
CDC_SUBH_CN (subh) Uint 8 Channel Number
CDC_SUBH_SMMSK (subh) Uint 8 Sub mode mask pattern
CDC_SUBH_SMVAL (subh) Uint 8 Sub mode comparison value
CDC_SUBH_CIMSK (subh) Uint 8 Coding information mask pattern
CDC_SUBH_CIVAL (subh) Uint 8 Coding information comparison value
• Mask pattern : Comparison object bit pattern.
• Comparision Value : Comparison value of the bit designated
by the mask pattern.
Whether the submode and coding information is equal to the comparison value is
decided after the logical product of their repective mask patterns are taken.
(sm & SMMSK) == SMVAL
Condition equation
(ci & CIMSK) == CIVAL
70
2) Sub Mode
bit 7 6 5 4 3 2 1 0
(Same as CD-ROM XA sub mode byte)
EOR (End OF Record) 1: Record end sector
V (Video) 1: Video sector
A (Audio) 1: Audio sector
D (Data) 1: Data sector
T (Trigger) 1: Trigger ON
F (Form) 1: Form 2, 0: Form 1
RT (Real Time Sector) 1: Real time sector
EOF (End Of File) 1: File end sector
Constant Name Type Explanation
CDC_SM_EOR 01H Record end sector
CDC_SM_VIDEO 02H Video sector
CDC_SM_AUDIO 04H Audio sector
CDC_SM_DATA 08H Data sector
CDC_SM_TRIG 10H Trigger bit
CDC_SM_FORM 20H Form bit (0: Form 1, 1: Form 2)
CDC_SM_RT 40H Real time sector
CDC_SM_EOF 80H File end sector
System Library User's Guide 71
Title Data Data Name No
Data Specification Sector Information CdcSct 6.7
1) Sector Information
CdcSct *sct
Access Macro Type Explanation
CDC_SCT_FAD (sct) Sint 32 Frame address
CDC_SCT_FN (sct) Uint 8 File Number
CDC_SCT_CN (sct) Uint 8 Channel Number
CDC_SCT_SM (sct) Uint 8 Sub mode
CDC_SCT_CI (sct) Uint 8 Coding information
Title Data Data Name No
Data Specification File Information CdcFile 6.8
1) File Information
CdcFile *file
Access Macro Type Explanation
CDC_FILE_FAD (file) Sint 32 File start frame address
CDC_FILE_SIZE (file) Sint 32 File size (byte number)
CDC_FILE_UNIT (file) Uint 8 File unit size
CDC_FILE_GAP (file) Uint 8 Gapsize
CDC_FILE_FN (file) Uint 8 File number *
CDC_FILE_ATR (file) Uint 8 File attributes
*
When there is no directory record system information, the file
number becomes 0.
2) File Attributes
bit 7 6 5 4 3 2 1 0
1 : Yes directory 0 : no directory (note 1)
1: Form 1 sector included 0 : not included
1: Form 2 sector included 0 : not included Valid at CD-ROM
1: Interleave sector included 0 : non-interleave XA standard
1: CD-DA file 0 : CD-ROM file
Note 2
1: Yes d irectory file 0 : no directory file
Note 1: bit 1 is a directory bit of the file flag within the directory record and valid when there
is no system information (discriminant gives bit 7 priority)
Note 2: bits 3 to 7 is attribute information conforming to CD-ROM XA standards, and bits 3 to
7 are 0 when there is no system information.
72
8.0 Function Specifications
Function specifications of the CD Communication Interface are described.
1) Format
Reserved areas with the figure are indicated by a “–” mark. Reserved areas
must be designated with a 0.
2) Initial Values of Parameters
Initial values of parameters held in the CD block are equal to the default
values designated by the host as long as they are not specially specified.
3) CD Status Information (Status and CD Report) Hold
The CD communication interface holds status and CD reports when a CD
block command is issued. Information is not held by a periodic response.
The intial value of all holding contents is 0. The functions that change the
holding status/CD report are listed below by symbol.
[SR] : changes status and CD report
[S-] : changes status only
[--] : no changes (no command issued)
Title Data Function Name [SR] No
Function Specification CD Play CDC_CdPlay 2.1
Nothing changes when there is an error (When the error code is not CDC_ERR_OK).
4) Data Transfer Inside Functions
Among the information get functions, data transfered by the function interior
enters the function name as Tget. The method of data transfer is software
transfer by the CPU.
Example: Get TOC information (CDC_TgetToc)
These functions call the following functions internally.
• Data transfer waiting for start (CDC_DataReady)
• Data transfer end (CDC_DataEnd)
System Library User's Guide 73
8.1 List of Functions
Table 8.1 is a list of functions of the CD communication interface.
Table 8.1 List of CD Communication Interface Functions (1)
Function Name Number
CD Block Common 1.0
Get current CD status information CDC_GetCurStat 1.1
Get previous CD status information CDC_GetLastStat 1.2
Get periodic CD status information CDC_GetPeriStat 1.3
Get hardware information CDC_GetHwInfo 1.4
Get TOC information CDC_TgetToc 1.5
Get session information CDC_GetSes 1.6
Initialize CD block CDC_CdInit 1.7
Open tray CDC_CdOpen 1.8
Data transfer ready CDC_DataReady 1.9
Data transfer end CDC_DataEnd 1.10
CD Drive 2.0
CD play CDC_CdPlay 2.1
Seek play position CDC_CdSeek 2.2
Scan CDC_CdScan 2.3
Subcode 3.0
Get subcode Q CDC_TgetScdQch 3.1
Get Subcode R ~ W CDC_TgetScdRwch 3.2
CD-ROM Device 4.0
Set connection point of CD device CDC_CdSetCon 4.1
Get connection point of CD device CDC_CdGetCon 4.2
Get buffer partition of last read sector CDC_CdGetLastBuf 4.3
Selector 5.0
Set filter frame address range CDC_SetFiltRange 5.1
Get filter frame address range CDC_GetFiltRange 5.2
Set filter subheader conditions CDC_SetFiltSubh 5.3
Get filter subheader conditions CDC_GetFiltSubh 5.4
Set filter mode CDC_SetFiltMode 5.5
Get filter mode CDC_GetFiltMode 5.6
Set filter connection point CDC_SetFiltCon 5.7
Get filter connection point CDC_GetFiltCon 5.8
Reset selector (filter, partition) CDC_ResetSelector 5.9
74
Table 8.1 List of CD Communication Interface Functions (2)
Function Name Number
Buffer Information 6.0
Get CD buffer size CDC_GetBufSiz 6.1
Get buffer partition sector number CDC_GetSctNum 6.2
Calculate actual data size CDC_CalActSiz 6.3
Get actual data size CDC_GetActSiz 6.4
Get sector information CDC_GetSctInfo 6.5
Execute frame address search CDC_ExeFadSearch 6.6
Get frame address search results CDC_GetFadSearch 6.7
Buffer Input/Output 7.0
Set sector length CDC_SetSctLen 7.1
Get sector data CDC_GetSctData 7.2
Delete sector data CDC_DelSctData 7.3
Get and delete sector data CDC_GetdelSctData 7.4
Write sector data CDC_PutSctData 7.5
Copy sector data CDC_CopySctData 7.6
Move sector data CDC_MoveSctData 7.7
Get sector data copy/move error CDC_GetCopyErr 7.8
CD Block File System 8.0
Change directory CDC_ChgDir 8.1
Hold file information CDC_ReadDir 8.2
Get holding file information range CDC_GetFileScope 8.3
Get holding file information CDC_TgetFileInfo 8.4
Read file CDC_ReadFile 8.5
Stop file access CDC_AbortFile 8.6
Register Access 9.0
Get data transfer register pointer CDC_GetDataPtr 9.1
Get interrupt factor register value CDC_GetHirqReq 9.2
Clear interrupt factor register CDC_ClrHirqReq 9.3
Get interrupt mask register value CDC_GetHirqMsk 9.4
Set interrupt mask register CDC_SetHirqMsk 9.5
Get MPEG register pointer CDC_GetMpegPtr 9.6
System Library User's Guide 75
8.2 Function Details
8.2.1 CD Block Common
Title Function Function Name [SR] No.
Function Get current CD status information CDC_GetCurStat 1.1
Specifications
Format: CdcRet CDC_GetCurStat (CdcStat *stat)
Input: None
Output: stat : CD status information
Function value: Returns the return code
Function: Issues the get command of CD status information for the
CD block and gets current CD status information (status
and CD report).
Title Function Function Name [ -- ] No.
Function Get previous CD status information CDC_GetLastStat 1.2
Specifications
Format: CdcRet CDC_GetLastStat (CdcStat *stat)
Input: None
Output: stat : CD status information
Function value: Returns the return code.
Function: Gets CD status information for the previous CD block command.
Remarks: If the CD communication interface issues a CD block
command, the status and CD report of that response is held.
This function returns the value being held.
Title Function Function Name [ -- ] No.
Function Get periodic CD status information CDC_GetPeriStat 1.3
Specifications
Format: CdcRet CDC_GetPeriStat (CdcStat *stat)
Input: None
Output: stat : CD status information
Function value: Returns the return code.
Function: Gets CD status information through periodic response.
Remarks: Since the command for CD block is not issued, the load is
small and the polling process is possible.
76
Title Function Function Name [S- ] No.
Function Get hardware information CDC_GetHwInfo 1.4
Specifications
Format: CdcRet CDC_GetHwInfo (CdcHw *hw)
Input: None
Output: hw : hardware information
Function value: Returns the return code.
Function: Gets CD block hardware information.
Title Function Function Name [S- ] No.
Function Get TOC information CDC_TgetToc 1.5
Specifications
Format: CdcRet CDC_TgetToc (Uint32 *toc)
Input: None
Output: toc : TOC information (204 words)
Function value: Returns the return code.
Function: Gets all TOC information (102 peices, 408 bytes)
Waits in the <OPEN> status and <NODISC> status
Example: Uint 32 toc [102]; /* reserves TOC information store region */
ret = CDC_TgetToc(toc); /* get TOC information */
Title Function Function Name [S- ] No.
Function Get session information CDC_GetSes 1.6
Specifications
Format: CdcRet CDC_GetSes (Sint32 sesno, Uint32 *ses)
Input: sesno : session number (0 ~ 99)
Output: ses : session information (2 words)
Function value: Returns the return code.
Function: Gets session information (4 bytes) of the designed session.
Waits in the <OPEN> status and <NODISC> status.
System Library User's Guide 77
Title Function Function Name [SR] No.
Function Initialize CDblock (1/2) CDC_CdInit 1.7
Specifications
Format: CdcRet CDC_CdInit (Sint32 iflag, Sint32 stnby, Sint32 ecc,
Sint32 retry)
Input: iflag : initializing flag (insignificant 8 bits are effective)
stnby : standby time (insignificant 8 bits are effective)
ecc : ECC frequency (insignificant 8 bits are effective)
retry : retry frequency (insignificant 8 bits are effective)
Output: none
Function value: Returns the return code.
Function: Initial setting of CD block.
1) Initializing flag
Designates each type of setting flag (8 bits) to the CD block.
When software is reset, all other initialized parameters are ignored and this
becomes the initial value.
bit 7 6 5 4 3 2 1 0
Initial value : 00H
1 : Reset CD block software 0 : not the same
1 : Decode of RW subcode 0 : not the same
1 : Doesn't confirm Mode 2 subheader 0 : the same
1 : Retry Form 2 read 0 : not the same
1 : CD-ROM data read standard speed 0 : 2X standard speed
1 : No change 0 : Change
(a) Interrupt factor register ESEL flag becomes 1 when reset of software ends.
(b) Recognition of the Mode 2 subheader is used only in the correcting process
during CD-ROM decode. The selector always recognizes the subheader.
(decides conditions of the filter, selector length, etc.)
(c) Data is output even if there is an error when Form 2 read is not retried.
(d) CD-ROM data read speed switches when changing to the <PAUSE> status.
When the CD-DA area is played, it automatically plays at standard speed.
The prior speed returns if the CD-ROM area is entered.
2) Standby Time
Designates the transition time from <PAUSE> to <STANDBY>.
Changes to <STANDBY> when the standby time of <PAUSE> expires.
Set Value Description
0000H 180 seconds ......initial value
0001H ~ FFFEH Transition time (in seconds)
FFFFH No change in settings
78
Title Function Function Name [SR] No.
Function Initialize CD block (2/2) CDC_CdInit 1.7
Specifications
3) ECC Frequency
Designates the number of repetitions of the ECC process (PQ once each) during
CD-ROM decode.
Set Value Description
00H ECC is processed a maximum of only 1 time in real time .....
initial value.
01H ~ 05H When an error exists after the ECC process, maximum number
of repetitions (total of 2 to 6 times).
80H No ECC process
FFH No change in settings
4) Retry Frequency
Designates the number of retries of the same sector if an error occurs during
CD-ROM decode.
Set Value Description
00H Without retrying, stops data output (becomes <ERROR>) .....
initial value.
01H ~ 0FH ( ) Retries designated number of times, data output stops if there
is an error (becomes <ERROR>).
40H Data is output without retrying
41H ~ 4FH ( ) Retries designated number of times, data is output even if
there is an error.
80H Infinite number of retries
FFH No change in settings
bit 7 6 5 4 3 2 1 0
Frequency indicated by insignificant 4 bits.
Frequency (0 ~ 15 times)
1 : Data output even if error occurs 0 : Stops output
1 : Infinite number of retrys 0 : Definte number
5) Tray Open/Close
Closes the Tray when in the <OPEN> status.
• When automatic format (front loading) : CD block automatically closes tray.
• When manual format (top loading) : <BUSY> status until closed by manual.
Tray open when in the <NODISC> status. (See Tray Open)
Tray open and close operates the same for CD play, seek play position, and scan.
Remarks: All command issues are prohibited while the software is being reset.
System Library User's Guide 79
Title Function Function Name [SR] No.
Function Open tray CDC_CdOpen 1.8
Specifications
Format: CdcRet CDC_CdOpen (void)
Input: none
Output: none
Function value: Returns the return code.
Function: Stops the CD drive and opens the tray
• When automatic format (front loading) : CD block automatically
opens tray.
• When manual format (top loading) : <BUSY> status until opened
by manual.
Remarks: When the tray is opened, DCHG of the interrupt factor register
and EFLS flag become 1. The timing is before the <OPEN>status.
(Same for when opening manually.)
Title Function Function Name [S-] No.
Function Data transfer ready CDC_DataReady 1.9
Specifications
Format: CdcRet CDC_DataReady (Sint32 dtype)
Input: dtype : transfer ready type
Output: none
Function value: Returns the return code.
Function: Waits until data transfer ready is enabled. Data can be transfered
after ready is finished. If data is transfered, data transfer end must be
executed.
1) Transfer Ready Type
Value Description
CDC_DRDY_GET Designated when getting data. (CD block → host)
CDC_DRDY_PUT Designated when writing data. (host → CD block)
2) Transfer Ready Process
Waits until DRDY of the interrupt factor register becomes 1, and clears 0 if it
becomes 1. If empty sectors can not be reserved when writing, the EHST flag of
the interrupt factor register becomes 1. In this case, CDC_ERR_PUT error is
returned.
Remarks: When an error is caused by ready, there is no need to execute data
transfer end. It will be automatically executed inside the ready function.
80
Title Function Function Name [S-] No.
Function Data transfer end CDC_DataEnd 1.10
Specifications
Format: CdcRet CDC_DataEnd (Sint32 *cdwnum)
Input: none
Output: cdwnum : CD block transfer word number
Function value: Returns the return code.
Function: Instructs the end of data transfer for the CD block. Data transfer
can be stopped while in process.
1) CD Block Transfer Word Number
Returns the word number of effective data transfered by the CD block.The
normal word number can not be exceeded (entire number of words that should
be transfered).
Constant Name Description
CDC_DEND_ERR Error occurred by data transfer
Data transfer end is executed even though it isn't time for
transfer.
2) Relationship of Transfer Word Number
Data transfer conditions can be checked by comparing the host transfer word
number (word number transfered by the host until data transfer end is
executed) and the CD block transfer word number.
Transfer Conditions Host Transfer Word Number CD Block Transfer Word Number (cdwnum)
(Host Word Number) When gettng (CD → host) When writing (host → CD)
Transfer interrupt host word no. < normal word no. cdwnum > host word number cdwnum = host word number
Transfer all host word no. = normal word no. cdwnum = normal word number = host word number
Excess transfer host word no. > normal word no. cdwnum = normal word number < host word number
• Transfer interrupt : Stops data transfer while in progress.
• Transfer all : All data is transfered.
• Excess transfer : Normal word number is exceeded and
transfered (Excess part is transfered as
dummy data).
System Library User's Guide 81
8.2.2 CD Drive
For tray open/close in the <OPEN> and <NODISC> statuses see Initialize CD block.
Title Function Function Name [SR] No.
Function CD play CDC_CdPlay 2.1
Specifications
Format: CdcRet CDC_CdPlay (CdcPly *ply)
Input: ply : play parameters
Output: none
Function value: Returns the return code.
Function: Plays CDs according to the designated play parameters.
Plays music in the CD-DA area. Reads sector data in the
CD-ROM area.
Remarks: In playing CD-DA, mute is canceled 4 frames prior to the start
position to prevent the start of a song from being cut off.
Example:
(1) Frame Address Designation
CdcPly ply; /* definition of play parameter variable */
CDC_PLY_STYPE (&ply) = CDC_PTYPE_FAD;
CDC_PLY_SFAD (&ply) = fad; /* start frame address */
CDC_PLY_ETYPE (&ply) = CDC_PTYPE_FAD;
CDC_PLY_EFAS (&ply) = fasnum; /* frame address sector number */
CDC_PLY_PMODE (&ply) = pmode; /* play mode */
ret = CDC_CdPlay (&ply); /* play start */
(2) Track/Index Designation
CDC_PLY_STYPE (&ply) = CDC_PTYPE_TNO;
CDC_PLY_STNO (&ply) = tno1; /* start track number */
CDC_PLY_SIDX (&ply) = x1; /* start index number */
CDC_PLY_ETYPE (&ply) = CDC_PTYPE TNO;
CDC_PLY_ETNO (&ply) = tno2; /* end track number */
CDC _PLY_EIDX (&ply) = x2; /* end index number */
CDC _PLY_PMODE (&ply) = pmode; /* play mode */
(3) Default Value Designation
CDC_PLY_STYPE (&ply) = CDC_PTYPE_DFL; /* start position is first of disc */
CDC_PLY_ETYPE (&ply) = CDC_PTYPE_DFL; /* end position is end of disc */
CDC_PLY_PMODE (&ply) = CDC_PM_DFL; /* no repeat, move pickup */
(4) CD Play Restart (unchanged selection: play from current position)
.... cancel pause
CDC_PLY_STYPE (&ply) = CDC_PTYPE_NOCHG;
CDC_PLY_ETYPE (&ply) = CDC_PTYPE_NOCHG;
CDC_PLY_PMODE (&ply) = CDC_PM_NOCHG;
82
Title Function Function Name [SR] No.
Function Seek play position CDC_CdSeek 2.2
Specifications
Format: CdcRet CDC_CdSeek (CdcPos *pos)
Input: pos : position parameters
Output: none
Function value: Returns the return code.
Function: Moves (seeks) the play position (pickup) according to the designated
position parameters.
Example:
1. Frame Address Designation
CdcPos pos; /* definition of position parameter variable */
CDC_POS_PTYPE (&pos) =CDC_PTYPE_FAD;
CDC_POS_FAD (&pos )= fad; /* frame address */
ret = CDC_CdSeek (&pos); /* seek start */
2. Track/Index Designation
CDC_POS_PTYPE (&pos) = CDC_PTYPE_TNO;
CDC_POS_TNO (&pos) = tno; /* track number */
CDC_POS_IDX (&pos); = x; /* index number */
3. CD Play Stop (Default vlaue designation: Seek home position)...... Stop
CDC_POS_PTYPE (&pos) = CDC_PTYPE_DFL;
4. Pause CD Play (No changed selection: seek current position) ......Pause
CDC_POS_PTYPE (&pos) = CDC_PTYPE_NOCHG;
System Library User's Guide 83
Title Function Function Name [SR] No.
Function Scan CDC_CdScan 2.3
Specifications
Format: CdcRet CDC_CdScan (Sint32 scandir)
Input: scandir : Scan direction
Output: none
Function value: Returns the return code.
Function: Scans the CD.
Scanning continues until a CD drive command (CD play, seek, etc.) is
issued. Scan is canceled and a pause occurs if the play range is
exceeded. The pause position at that time is undefined.
1) Scan Direction
Constant Name Description
CDC_SCAN_FWD Fast forward scan (forward direction)
CDC_SCAN_RVS Fast reverse scan (reverse direction)
2) Sound Output
If scanning from the <PLAY> status, -12 dB sounds are output in the CD-
DA region. Sound is muted if scanning in the CD-ROM area or in the <PAUSE>
status. If the scan direction in near the play range boundary is reversed, the
sound may not be output.
Remarks: When the CD-ROM area is scanned, sector data will not be read.
84
8.2.3 Subcode
Title Function Function Name [S-] No.
Function Get subcode Q CDC_TgetScdQch 3.1
Specifications
Format: CdcRet CDC_TgetScdQch (Uint16 *qcode)
Input: none
Output: qcode : Subcode Q information (5 words)
Function value: Returns the return code.
Function: Gets subcode Q channel information
(10 bytes other than CRC)
Title Function Function Name [S-] No.
Function Get subcode R ~ W CDC_TgetScdRwch 3.2
Specifications
Format: CdcRet CDC_TgetScdRwch (Uint16 *rwcode, Sint32 *scdflag)
Input: none
Output: rwcode : Subcode R ~ W information (12 words)
scdflag : Subcode flag (effective bits are insignificant)
Function value: Returns the return code.
Function: Gets subcode R~W channel information (1 pack of 24 bytes).
(1) Subcode Flag
Shows error conditions of retrieved subcode R ~ W information (pack
data).
bit 7 6 5 4 3 2 1 0
1 : Pack data error 0 : Normal
1 : Overrun error 0 : Normal
Remarks: Pack data can not exceed retrieval of 16 packs in one time frame
(13.3 ms). Returns to WAIT if the pack buffer is empty and there is
no pack data.
System Library User's Guide 85
8.2.4 CD-ROM Device
Title Function Function Name [SR] No.
Function Set connection destination of CD device CDC_CdSetCon 4.1
Specifications
Format: CdcRet CDC_CdSetCon (Sint32 filtno)
Input: filtno : Connection destination filter number
(CDC_NUL_SEL : display non-connection)
Output: none
Function value: Returns the return code.
Function: Sets the connection destination (filter) of the CD device.
Connection is separated if CDC_NUL_SEL is selected.
Title Function Function Name [S-] No.
Function Get connection destination of CD device CDC_CdGetCon 4.2
Specifications
Format: CdcRet CDC_CdGetCon (Sint32 *filtno)
Input: none
Output: filtno : Connection destination filter number
(CDC_NUL_SEL : displays non-connection)
Function value: Returns the return code.
Function: Gets the connection destination (filter) of the CD device.
Returns CDC_NUL_SEL if there is no connection.
Title Function Function Name [S-] No.
Function Get buffer partition of last read sector CDC_CdGetLastBuf 4.3
Specifications
Format: CdcRet CDC_CdGetLastBuf (Sint32 *bufno)
Input: none
Output: bufno : Storage destination buffer partition number
(CDC_NUL_SEL : displays non-storage)
Function value: Returns the return code.
Function: Gets the buffer partition number of the storage destination of the
sector last read from the CD.
86
8.2.5 Selector
See selector reset for the initial value of the selector set parameters.
Title Function Function Name [SR] No.
Function Specs Set filter frame address range CDC_SetFiltRange 5.1
Format: CdcRet CDC_SetFiltRange (Sint32 filtno, Sint32 fad,
Sint32 fasnum)
Input: filtno : filter number
fad : starting frame address
fasnum : frame address sector number
(0: effective FAD range does not exist)
Output: none
Function value: Returns the return code.
Function: Sets the frame address range for the filter. When fasnum = 0, all
sectors are output to false output connectors if the FAD range of
the filter mode is effective.
Title Function Function Name [S-] No.
Function Specs Get filter frame address range CDC_GetFiltRange 5.2
Format: CdcRet CDC_GetFiltRange (Sint32 filtno, Sint32 *fad,
Sint32 *fasnum)
Input: filtno : filter number
Output: fad : starting frame address
fasnum : frame address sector number
Function value: Returns the return code.
Function: Gets the frame address range for the filter.
Title Function Function Name [SR] No.
Function Specs Set filter subheader conditions CDC_SetFiltSubh 5.3
Format: CdcRet CDC_SetFiltSubh (Sint32 filtno, CdcSubh *subh)
Input: filtno : filter number
subh : subheader conditions
Output: none
Function value: Returns the return code.
Function: Sets subheader conditions for the filter.
Title Function Function Name [S-] No.
Function Specs Get filter subheader conditions CDC_GetFiltSubh 5.4
Format: CdcRet CDC_GetFiltSubh (Sint32 filtno, CdcSubh *subh)
Input: filtno : filter number
Output: subh : subheader conditions
Function value: Returns the return code.
Function: Gets subheader conditions for the filter.
System Library User's Guide 87
Title Function Function Name [SR] No.
Function Specs Set filter mode CDC_SetFiltMode 5.5
Format: CdcRet CDC_SetFiltMode (Sint32 filtno, Sint32 fmode)
Input: filtno : filter number
fmode : filter mode (insignificant 8 bits are effective)
Output: none
Function value: Returns the return code.
Function: Sets the filter mode for the filter.
1) Filter mode
bit 7 6 5 4 3 2 1 0
1 : Select file number (FN)
0 : not the same
1 : Select channel number (CN)
0 : not the same
1 : Select submode (SM)
0 : not the same
1 : Select coding information (CI)
0 : not the same
1 : Reverse subheader conditions
0 : not the same reversal
1 : Select frame address range
0 : not the same
1 : Initialize filter conditions (return to intial values)
0 : not the same initialization
2) Reverse Subheader Conditions
If subheader conditions are reversed, the output destination will be the opposite
of what is normal for subheader conditions. In short, sectors that correspond to
subheader conditions are output to false output connectors, and sectors that do
not correspond to subheader conditions are output to true output connectors
(conditions below.)
• Output to true output connector: filter FAD range coincides and
subheader conditions do not coincide.
• Output to false output connector: filter FAD range does not coincide
or subheader conditions coincide.
3) Initialing Filter Conditions
When filter conditions are initialized, other bit selections are ignored and the
initial values below are set.
• Frame address range : Starting FAD = 0, FAD sector number = 0
• Subheader conditions : FN, CN, SMMSK, SMVAL, CIMSK, CIVAL are all 0
• Filter mode : All bits = 0
88
Title Function Function Name [S-] No.
Function Get filter mode CDC_GetFiltMode 5.6
Specifications
Format: CdcRet CDC_GetFiltMode (Sint32 filtno, Sint32 *fmode)
Input: filtno : filter number
Output: fmode : filter mode (insignificant 8 bits are effective)
Function value: Returns the return code.
Function: Gets the filter mode for the filter.
Filter mode
bit 7 6 5 4 3 2 1 0
1 : Select file number (FN)
0 : not the same
1 : Select channel number (CN)
0 : not the same
1 : Select submode (SM)
0 : not the same
1 : Select coding information (CI)
0 : not the same
1 : Reverse subheader conditions
0 : not the same reversal
1 : Select frame address range
0 : not the same
System Library User's Guide 89
Title Function Function Name [SR] No.
Function Specs Set filter connection destination CDC_SetFiltCon 5.7
Format: CdcRet CDC_SetFiltCon (Sint32 filtno, Sint32 cflag, Sint32 bufno, Sint32 flnout)
Input: filtno : filter number
cflag : filter connection flag (insignificant 8 bits are effective)
bufno : buffer partition no.of true output connector connection
destination (CDC_NUL_SEL : disconnected)
flnout : filter number of false output connector connection
destination (CDC_NUL_SEL : disconnected)
Output: none
Function value: Returns the return code.
Function: Sets the connection destination below for the filter. Connections are
disconnected if CDC_NUL_SEL is specified.
• true output connector and buffer partition input connector
• false output connector and other filter input connectors
Filter Connection Flag
bit 7 6 5 4 3 2 1 0
filter fin True output connector set flag
true output connector
0 : No change in connection conditions
1 : Change the same (connect/disconnect to
→ bn buffer partition)
False output connector set flag
false output connector 0 : No change in connection conditions
1 : Change the same (connect/disconnect to filter)
↓
flnout
Title Function Function Name [S-] No.
Function Specs Get filter connection destination CDC_GetFiltCon 5.8
Format: CdcRet CDC_GetFiltCon (Sint32 filtno, Sint32 *bufno, Sint32 flnout)
Input: filtno : filter number
Output: bufno : buffer partition no. of true output connector connection
destination (CDC_NUL_SEL : not connected)
flnout : filter number of false output connector connection
destination (CDC_NUL_SEL : not connected)
Function value: Returns the return code.
Function: Gets the filter connection destination. When not connected returns
CDC_NUL_SEL.
90
Title Function Function Name [SR] No.
Function Specs Resert selector (filter, partition) CDC_ResetSelector 5.9
Format: CdcRet CDC_ResetSelector (Sint32 rflag, Sint32 bufno)
Input: rflag : reset flag (insignificant 8 bits are effective)
bufno : buffer partition number
Output: none
Function value: Returns the return code.
Function: Initializes selector set conditions according to the reset flag value.
•When reset flag = 0 : All specified buffer partition data is cleared
•When reset flag ≠ 0 : Buffer partition number is ignored
1) Reset Flag
bit 7 6 5 4 3 2 1 0
1: Initializes data of all buffer partitions
0: not the same initialization
1: Initializes all partition output connectors
0: not the same initialization
1: Initializes all filter conditions
0: not the same initialization
1: Initializes all filter input connectors
0: not the same initialization
1: Initializes true output connector of all filters
0: not the same initialization
1: Initializes false output connector of all filters
0: not the same initialization
2) Initial Values
The following initial values are set for all selectors by initialization.
• Buffer partition data : All cleared (all data within the CD buffer is
cleared)
• Partition output connector : Status: All unconnected
• Filter conditions : Similar to initialization by “set filter mode”
• Filter input connector : Status: All unconnected
• True output connector : buffer partition and same number companion
filters are connected
• False output connector : Status: All unconnected
System Library User's Guide 91
8.2.6 Buffer Information
Title Function Function Name [S-] No.
Function Get CD buffer size CDC_GetBufSiz 6.1
Specifications
Format: CdcRet CDC_GetBufSiz (Sint32 *totalsiz, Sint32 *bufnum, Sint32 *freesiz)
Input: none
Output: totalsiz : total buffer size (sector units, 200 sectors = C8H)
bufnum : total buffer partition number (24 partitions = 18H)
freesiz : empty buffer size (sector units)
Function value: Returns the return code.
Function: Gets the Cd buffer total size and buffer partition number (both are
fixed values), also the current space size. The selector number (or
filter number) is equal to the total buffer partiton number.
Remarks: Even if the space size is 0, the buffer does not need to be full since
there are sectors being used by the system.
Title Function Function Name [S-] No.
Function Get buffer partiton sector number CDC_GetSctNum 6.2
Specifications
Format: CdcRet CDC_GetSctNum (Sint32 bufno, Sint32 *snum)
Input: bufno : buffer partition number
Output: snum : sector number within buffer partition
(buffer partition size)
Function value: Returns the return code.
Function: Gets current sector number (buffer partition size) of buffer partition.
92
Title Function Function Name [SR] No.
Function Calculation of actual data size CDC_CalActSiz 6.3
Specifications
Format: CdcRet CDC_CalActSiz (Sint32 bufno, Sint32 spos, Sint32 snum)
Input: bufno : buffer partition number
spos : sector postion (CDC_SPOS_END : shows the
partition’s last sector)
snum : sector number (CDC_SNUM_END : shows the
sector number from spos to the last partition)
Output: none
Function value: Returns the return code.
Function: Calculates the actual data size (word number when fetched to host) of
the buffer partition designated sector range, and holds that result.
Executes the setting of the sector length to set the length of 1 sector.
Remarks: Connectors already connected to the partition output are disconnected.
Executes “get actual data size” to get the calculation result of the actual
data size.
Title Function Function Name [S-] No.
Function Get actual data size CDC_GetActSiz 6.4
Specifications
Format: CdcRet CDC_GetActSiz (Sint32 *actwsiz)
Input: none
Output: actwsiz : actual data size (word units)
Function value: Returns the return code.
Function: Gets the actual data size (initial value of 0) held by the CD block.
Title Function Function Name [S-] No.
Function Get sector information CDC_GetSctInfo 6.5
Specifications
Format: CdcRet CDC_GetSctInfo (Sint32 bufno, Sint32 spos, CdcSct *sct)
Input: bufno : buffer partition number
spos : sector position (CDC_SPOS_END : shows the
partition’s last sector)
Output: sct : sector information
Function value: Returns the return code.
Function: Gets header information (FAD) and subheader information of buffer
partition designated sectors.
System Library User's Guide 93
Title Function Function Name [SR] No.
Function Specs Execute frame address search CDC_ExeFadSearch 6.6
Format: CdcRet CDC_ExeFadSearch (Sint32 bufno, Sint32 spos, Sint32 fad)
Input: bufno : buffer partition number
spos : sector position (CDC_SPOS_END : shows the
partition’s last sector)
fad : frame address
Output: none
Function value: Returns the return code.
Function: Starting at the designated sector position in the buffer partition, with
the frame address as the key, the sector is retrieved and the result
retained.
1) Direction of retrieval
Retrieves in the direction of the buffer partition (from the
smaller to larger sector position.)
2) Retrieval result
Contents to be held as retrieval results include the buffer
partition number, retrieved sector position, and the frame
address of that sector.
3) Retrieval conditions
When a FAD that coincides does not exist, the nearest
sector not exceeding the designated FAD is used. Therefore,
retrieval resultant FAD is the greatest FAD that satisfies FAD≤
designated FAD. When there is no sector that satisfies this condi-
tion or when retrieval can not be done because of an error, the
sector position of the retrieval results is CDC_SOPS_END.
Remarks: Connector that is already connected to the partition output is
disconnected. The retrieval result executes to get the frame address
retrieval result.
Title Function Function Name [S-] No.
Function Specs Get frame address search results CDC_GetFadSearch 6.7
Format: CdcRet CDC_GetFadSearch (Sint32 *bufno, Sint32 *spos, Sint32 *fad)
Input: none
Output: bufno : buffer partition number
spos : sector position (CDC_SPOS_END : no applicable
sector shown)
fad : frame address
Function value: Returns the return code.
Function: Gets frame address search results (initial values all 0) held by the CD
block.
94
8.2.7 Buffer Input/Output
Each buffer input/output function (get sector data, delete, write, copy, move) in-
cludes the connector connection process. In other words, by issuing 1 command, the
device and selector connections and flow in and out complex processes are done.
Connectors connected to the partition output connector are disconnected.
Title Function Function Name [SR] No.
Function Set sector length CDC_SetSctLen 7.1
Specifications
Format: CdcRet CDC_SetSctLen (Sint32 getslen, Sint32 putslen)
Input: getslen : sector length when fetching
putslen : sector length when writing
Output: none
Function value: Returns the return code.
Function: Sets the length of one sector in the next cases.
• Gets sector data (CD buffer to host)
• Writes sector data (host to CD buffer)
Sector Length
Constant Name Description
CDC_SLEN_2048 2048 bytes (user data) ....... initial value
when fetched, 2324 bytes if mode 2 form 2
CDC_SLEN_2336 2336 bytes (up to subheader)
CDC_SLEN_2340 2340 bytes (up to header)
CDC_SLEN_2352 2352 bytes (entire sector)
CDC_SLEN_NOCHG No change
Remarks: The set “sector length when fetching” is also reflected in “Calculation
of actual data size.”
System Library User's Guide 95
Title Function Function Name [SR] No.
Function Specs Get sector data CDC_GetSctData 7.2
Format: CdcRet CDC_GetSctData (Sint32 bufno, Sint32 spos, Sint 32 snum)
Input: bufno : buffer partition number
spos : sector position (CDC_SPOS_END : shows the
partition’s last sector)
snum : sector number (CDC_SNUM_END : shows the sector
number from spos to the last partition)
Output: none
Function value: Returns the return code.
Function: Gets sector data from the designated sector range of the buffer partition.
Remarks: After executing the function, data must be transferred and fetched.
Title Function Function Name [SR] No.
Function Specs Delete sector data CDC_DelSctData 7.3
Format: CdcRet CDC_DelSctData (Sint32 bufno, Sint32 spos, Sint 32 snum)
Input: bufno : buffer partition number
spos : sector position (CDC_SPOS_END : shows the
partition’s last sector)
snum : sector number (CDC_SNUM_END : shows the
sector number from spos to the last partition)
Output: none
Function value: Returns the return code.
Function: Deletes sector data of the designated sector range of the buffer partition.
Remarks: Sector positions after data is deleted advance in order.
Title Function Function Name [SR] No.
Function Specs Get and delete sector data CDC_GetdelSctData 7.4
Format: CdcRet CDC_GetdelSctData (Sint32 bufno, Sint32 spos, Sint 32 snum)
Input: bufno : buffer partition number
spos : sector position (CDC_SPOS_END : shows the
partition’s last sector)
snum : sector number (CDC_SNUM_END : shows the
sector number from spos to the last partition)
Output: none
Function value: Returns the return code.
Function: Gets data from the designaed sector range of the buffer partition.
Sector data of the designated sector range is deleted from the buffer
partition.
Remarks: After the function is executed, data must be transferred and fetched.
Even if all data is transferred without being fetched, all data of the
designated sector range is deleted.
96
Title Function Function Name [S- ] No.
Function Specs Write sector data CDC_PutSctData 7.5
Format: CdcRet CDC_PutSctData (Sint32 filtno, Sint32 snum)
Input: filtno : filter number
snum : sector number
Output: none
Function value: Returns the return code.
Function: Writes sector data to the designated filter.
Remarks: Data must be transferred and written after the function is executed.
Data of the designated sector number is written even if data transfer
is interrupted. Values except for transferred data are not fixed.
Title Function Function Name [SR] No.
Function Specs Copy sector data CDC_CopySctData 7.6
Format: CdcRet CDC_CopySctData (Sint32 srcbn, Sint32 spos, Sint32 snum, Sint32 dstfln)
Input: srcbn : copy source buffer partition number
spos : sector postion (CDC_SPOS_END : shows the
partition’s last sector)
snum : sector number (CDC_SNUM_END : shows the
sector number from spos to the last partition)
dstfln : copy destination filter number
Output: none
Function value: Returns the return code.
Function: Copies sector data from designated sector range of the buffer
partition. (Copies in between selectors.)
Title Function Function Name [SR] No.
Function Specs Move sector data CDC_MoveSctData 7.7
Format: CdcRet CDC_MoveSctData (Sint32 srcbn, Sint32 spos, Sint32 snum, Sint32 dstfln)
Input: srcbn : move source buffer partition number
spos : sector postion (CDC_SPOS_END : shows the
partition’s last sector)
snum : sector number (CDC_SNUM_END : shows the
sector number from spos to the last partition)
dstfln : copy destination filter number
Output: none
Function value: Returns the return code.
Function: Moves sector data from designated sector range of the buffer
partition. (Moves in between selectors.)
System Library User's Guide 97
Title Function Function Name [SR] No.
Function Get sector data copy/move error CDC_GetCopyErr 7.8
Specifications
Format: CdcRet CDC_GetCopyErr (Sint32 *cpyerr)
Input: none
Output: cpyerr : copy/move error information
Function value: Returns the return code.
Function: Gets sector data copy/move error information.
Copy/Move Error Information
Constant Name Description
CDC_COPY_OK Normal end ...... initial value
CDC_COPY_NG Error is caused
• Selector is disconnected during copy/move
• No more space in buffer
CDC_COPY_BUSY Copy/Move process is in progress
98
8.2.8 CD Block File System
Title Function Function Name [SR] No.
Function Change directory CDC_ChgDir 8.1
Specifications
Format: CdcRet CDC_ChgDir (Sint32 filtno, Sint32 fid)
Input: filtno : filter number
fid : file identifier of the directory file
(CDC_NUL_FID : root directory)
Output: none
Function value: Returns the return code.
Function: Moves the current directory to the directory shown by the
designated file identifier. Moves to the root directory if
CDC_NUL_FID is specified in the file identifier.
When moved, it reads directory record, and retains a maximum of
254 files worth of data from the start (256 files if including parent
and own). Returns REJECT when directory is not designated by
the file identifier.
Remarks: The CD block file system uses the selector in the operation. The
operation selector designates through the filter number.
Title Function Function Name [SR] No.
Function Hold file information CDC_ReadDir 8.2
Specifications
Format: CdcRet CDC_ReadDir (Sint32 filtno, Sint32 fid)
Input: filtno : filter number
fid : file identifier
Output: none
Function value: Returns the return code.
Function: Reads the directory record of the current directory and holds up
to 254 pieces of file information after the designated file identifier
(own and parent are always retained).
Remarks: The CD block file system uses the selector in the operation. The
operation selector designates through the filter number.
Title Function Function Name [S-] No.
Function Get holding file information range CDC_GetFileScope 8.3
Specifications
Format: CdcRet CDC_GetFileScope (Sint32 *fid, Sint32 *infnum)
Input: none
Output: fid : first file identifier being held
infnum : number of file information being held
Function value: Returns the return code.
Function: Returns the file information range held by the current CD block.
Remarks: Since the self and parent directories are always held, they are not
included in the file information number.
Title Function Function Name [S-] No.
Function Get holding file information CDC_TgetFileInfo 8.4
Specifications
Format: CdcRet CDC_TgetFileInfo (Sint32 fid, CdcFile *file)
Input: fid : file identifier (CDC_NUL_FID : shows entire file
information)
Output: file : file information
Function value: Returns the return code.
Function: Obtains file information (12 bytes) of the indicated file
identifier. Obtains all file information (up to 254 pieces) held in
the CD block if CDC_NUL_FID is designated in the file
identifier.
Example: CdcFile file; /* Reserves information storage area of 1 file*/
ret = CDC_TgetFileInfo (fid, &file) ;
CdcFile file[256]; /* Reserves information storage area of all files */
ret = CDC_TgetFileInfo (CDC_NUL_FID, file) ;
Title Function Function Name [SR] No.
Function Read file CDC_ReadFile 8.5
Specifications
Format: CdcRet CDC_ReadFile (Sint32 filtno, Sint32 fid, Sint32 offset)
Input: filtno : filter number
fid : file identifier
offset : logical offset from first of file (sector units)
Output: none
Function value: Returns the return code.
Function: Reads the designated file. The read destination selector is
designated by the filter number.
Title Function Function Name [SR] No.
Function Stop file access CDC_AbortFile 8.6
Specifications
Format: CdcRet CDC_AbortFile (void)
Input: none
Output: none
Function value: Returns the return code.
Function: Stops file access by each function (directory move, file
information hold, and file read) of the CD block file system.
Pauses the CD drive, and the EFLS flag of the interrupt factor
register becomes 1.
Remarks: Even if file access is stopped, the buffer partition is not cleared
and the selector is not initialized. File information being held is
destroyed if directory-move and file-information-hold are
stopped. File access is also stopped when the tray is opened.
8.2.9 Register Access
Title Function Function Name [ -- ] No.
Function Specs Get data transfer register pointer CDC_GetDataPtr 9.1
Format: Uint16 *CDC_GetDataPtr (void)
Input: none
Output: none
Function value: Register pointer
Function: Gets the data transfer register (DATATRNS) pointer.
Title Function Function Name [ -- ] No.
Function Specs Get interrupt factor register value CDC_GetHirqReq 9.2
Format: Uint16 CDC_GetHirqReq (void)
Input: none
Output: none
Function value: Register value
Function: Gets the interrupt factor register (HIRQREQ) value.
Title Function Function Name [ -- ] No.
Function Specs Clear interrupt factor register CDC_ClrHirqReq 9.3
Format: void CDC_ClrHirqReq (Uint16 bitpat)
Input: bitpat : cleared bit pattern (bit to clear is 0, other bits are 1)
Output: none
Function value: none
Function: Clears the interrupt factor by the designated bit pattern.
(Only 0 is written.)
Remarks: Since the CD communication interface uses the interrupt factor
register CMOK flag, clearing by the application program is
prohibited.
Title Function Function Name [ -- ] No.
Function Specs Get interrupt mask register value CDC_GetHirqMsk 9.4
Format: Uint 16 CDC_GetHirqMsk (void)
Input: none
Output: none
Function value: register value
Function: Gets the interrupt mask register (HIRQMSK) value.
Title Function Function Name [ -- ] No.
Function Set interrupt mask register CDC_SetHirqMsk 9.5
Specifications
Format: void CDC_SetHirqMsk (Uint 16 bitpat)
Input: bitpat : mask bit pattern (bit to mask is 0, other bits are 1)
Output: none
Function value: none
Function: Masks interrupt factor by designated bit pattern.
Title Function Function Name [ -- ] No.
Function Get MPEG register pointer CDC_GetMpegPtr 9.6
Specifications
Format: Uint 16 *CDC_GetMpegPtr (void)
Input: none
Output: none
Function value: register pointer
Function: Gets MPEG register (MPEGRGB) pointer.
TM
SATURN
System Library
User's Guide
ver. 1.0
Doc. # ST-162-R1-092994
© 1994-95 SEGA. All Rights Reserved.
REFERENCES
In translating/creating this document, certain technical words and/or phrases were interpreted
with the assistance of the technical literature listed below.
1. KenKyusha New Japanese-English Dictionary
1974 Edition
2. Nelson’s Japanese-English Character Dictionary
2nd revised version
3. Microsoft Computer Dictionary
4. Japanese-English Computer Terms Dictionary
Nichigai Associates
4th version
Table of Contents
SYSTEM PROGRAM USER’S MANUAL .................................................... 1
1.0 GUIDE ............................................................................................... 1
1.1 Explanation .............................................................................. 1
2.0 REFERENCE .................................................................................... 7
2.1 List of Functions ...................................................................... 7
2.2 Function Specifications ............................................................ 8
SMPC I/F USER’S MANUAL .................................................................... 15
1.0 GUIDE ............................................................................................. 15
2.0 FEATURES ..................................................................................... 15
3.0 OVERVIEW ..................................................................................... 16
3.1 Function Overview ................................................................. 16
3.2 Process Overview .................................................................. 16
4.0 DETAILS ......................................................................................... 17
4.1 Functions ............................................................................... 17
4.2 Process ................................................................................. 18
4.3 Peripheral Control .................................................................. 22
5.0 CALLING SEQUENCE .................................................................... 23
6.0 DATA SPECIFICATIONS................................................................. 24
6.1 List of Data ............................................................................ 24
6.2 Data Specifications ................................................................ 25
7.0 FUNCTION SPECIFICATIONS ....................................................... 33
7.1 List of Functions .................................................................... 33
7.2 Function Specifications .......................................................... 33
BACKUP LIBRARY USER’S MANUAL ..................................................... 39
1.0 Guide .............................................................................................. 39
1.1 Purpose ................................................................................. 39
1.2 Explanation ............................................................................ 39
1.3 Program Example .................................................................. 40
2.0 Reference........................................................................................ 41
2.1 Data List ................................................................................ 41
2.2 Function List .......................................................................... 42
2.3 Data Flow .............................................................................. 43
2.4 Function Specification ........................................................... 43
System Program User’s Manual
1.0 Guide
1.1 Explanation
Interrupt Process Routine Registration and Reference Operations
After booting up from the boot ROM, the master SH2 interrupt vector table is at the
beginning of the work RAM, and the VBR (vector base register) indicates this ad-
dress.
The slave SH2 interrupt vector table is the work RAM lead + 400H, and the slave
SH2 VBR indicates that address. The interrupt vector (programmable) of every
built-in SH2 module is assigned by the initial settings in the table below. Dummy
routines that do nothing are set in the vector table. (With the exception of invalid
commands and address errors, these are infinite loops.)
The FRT input capture interrupt is assigned for use in master and slave communica-
tions, and its initial priority is 15 (highest priority). In the table below, the priority of
all interrupts, except for the FRT input capture interrupt, is set at 0 and interrupt is
unauthorized.
In changing the priority of the built-in module interrupts, the content of the inter-
rupt control register must change in response to the needs of the application.
Master SH2 Vector Initial Settings Slave SH2 Vector Initial Settings
40H ~ SCU interrupt vector 41H H-Blank In * *
5FH (set by hardware) 43H V-Blank In
60H SCI receive error 60H SCI receive error
61H SCI receive buffer full 61H SCI receive buffer full
62H SCI send buffer empty 62H SCI send buffer empty
63H SCI send quit 63H SCI send quit
* 64H FRT input capture * 64H FRT input capture
65H FRT compare match 65H FRT compare match
66H FRT overflow 66H FRT overflow
67H Free 67H free
68H WDT interval 68H WDT interval
69H BSC compare match 69H BSC compare match
6AH Free 6AH Free
6BH Free 6BH Free
6CH DMACH1 (SH2 built-in) 6CH DMACH1 (SH2 built-in)
6DH DMACH0 (SH2 built-in) 6DH DMA CH0 (SH2 built-in)
6EH DIVU (division) 6EH DIVU (division)
6FH Free 6FH Free
* for slave > master passing * for master > slave passing
* * IRL2, IRL6 level interrupts
Saturn System Library User's Guide 1
This operation routine should be used to register the interrupt process routine to the
interrupt vector and to reference the address of the current process routine. Further-
more, a SCU interrupt routine (the master SCU interrupt) that implements the inter-
rupt process via a format that subroutine calls the C function is provided. The C
function can be registered there and the registration address can also be referenced.
The function registered in the SCU interrupt routine is called whenever interrupt
occurs. Before and after this call, register save and return are performed per register
retention (save) protocol of the SHC compiler. If the routine is one that complies
with the C function or that protocol, it can be registered and processed. If a separate
interrupt process routine is registered in the SCU interrupt vector, the SCU interrupt
process routine is bypassed and becomes invalid. However, it may not be suitable
for an interrupt process requiring a rapid response such as HBlank.
SCU Interrupt Mask Set, Reference, and Change Operations
Because this register cannot be read, the mask value set to the SCU interrupt mask
register cannot perform computation against the actually set values when changes,
etc. are implemented. Therefore, this value is stored separately in memory and a
service routine, which preserves and updates in consistency with the actual SCU
interrupt mask register, is provided.
When this routine is used, setting and changing the SCU interrupt mask must al-
ways be done by the library and application through these functions. After the SCU
interrupt mask register is set and changed, the SCU interrupt status register, and if
necessary, the A-Bus interrupt acknowledge register, are cleared.
Simple Semaphore Operation
A service is available that enables memory (256 bytes) provided by the Boot ROM to
be used as 256 bytes of simple semaphore. The first half (numbers 0 ~ 127) of sema-
phore can be used in any way. The second half (128 ~ 255) is used in operations
related to the library. When the library uses a specific function such as DMA, it sets
semaphore MSB(80H) to 1 and shows that it is in use. After that, it clears MSB and
shows that it is free.
In a process that requires resources to be secured over a comparatively long period
of time, the semaphore operation and reference procedure should be determined so
that those resources are not accessed arbitrarily by an interrupt process during that
period of time.
The SH2 TAS command is used when setting MSB for semaphore memory. This
command allows only one process to reliably acquire semaphore since execution is
indivisible (bus control [authorization] is not cleared). This must be cleared when
the process that acquired semaphore is completed. All semaphore memory is
cleared when reset.
2
System Clock Switching
System clock switching cannot be performed by issuing independent commands to
the SMPC. Use of this system program is required. System clock switching entails a
partial hardware reset.
CPU Clock 26 MHz ←→ 28 MHz
Horizontal Resolution 320/640 ←→ 352/704
Reset Devices OFF or non guaranteed Devices Unaffected Devices
SCU Slave SH (OFF) Master SH * note
VDP1 DRAM (previous content destroyed) SDRAM
VDP2 SCSP (OFF) CD
SCSI/SCC (development devices only) SIMM (development devices only)
* Note Because master SH is in the standby mode during clock switching, of the built-in SH modules,
the FRT and the SCI within the SH must be reset. WDT is used during this process.
NMI goes to its existed status after the process; for example, the DMAC control goes to inter-
rupt status by NMI. See the SH manual. If necessary, perform the reopen process.
Reinitializing process after reset:
SCU: Reinitializes the bus, interrupt mask, etc. However, the value of
SYS_GETSCUIM is used for the interrupt mask value.
Postprocesses required with applications:
VDP2: The TV mode must be set comparatively fast. Because the 320/640 mode is
used after the device itself is reset, especially when the system clock is
changed to the 352/704 mode, the synchronous signal shifts in the TV and
turbulence occurs on the screen.
VDP1, 2, SCSP: All previous settings are invalid. Must be reset.
SMPC: Hot reset must be enabled.
The clock change process time is about 110 ms, which includes the reset time of the
device.
Saturn System Library User's Guide 3
SCU Interrupt Routine Priority Change
The Boot ROM has an interrupt priority control table used for the SCU interrupt
process service, making rewrite possible.
Note: This is a risky service. The system may hang up if priority relationship inconsistencies
exist in the table contents.
With this, the interrupt process (items using SYS_SETUINT) can be optimized in the
application.
To use this, prepare the same structural data for the application as the table, and call
SYS_CHGUIPR.
Tables are of 32 long words. 1 long word has the following contents.
SH2 SR insignificant word value SCU interrupt mask insignificant word value
The value set to SR at the beginning ORed with the current mask set value
of the interrupt process and written to the SCU interrupt mask
register at the beginning of the interrupt
process.
This long word position inside the table corresponds to the SCU 30 interrupt factor.
(V-Blank In is the start and V-Blank Out is the 2nd,…but 2 long word spaces that
correspond to vectors 4EH and 4FH are included.)
Tables must be created very carefully so that there is no inconsistency between the
SR, SCU interrupt mask, and interrupt factor.
For example, the Boot ROM uses the following table for its initial set values:
Uint32 PRITab[32] = {
0x00F0FFFF, /* VBI SR=15 All prohibited (highest priority) */
0x00E0FFFE, /* VBO SR=14 Only VBI is allowed */
0x00D0FFFF, /* HBI SR=13 VBI and VBO are allowed */
.
.
0x0070FE00, /* External 15
all masked when 7 or less. */
/* A bus interrupt unique priority that assumes 7, 4,and
1 by cause factor, but because
of the common use and 1 bit
mask, it is set to 7.
} ;
4
The creation example shown is one in which the SR value is always set to 0, and
priorities are described only using SCU mask values (priority relationship). Here,
SH always receives an interrupt and only the SCU mask controls authorization and
prohibition.
Uint32 PRITab[32] = {
0x0000FFF9, /* during VBI process HBI and VBO authorization */
0x0000FFFB, /* during VBO process only HBI authorization */
0x00D0FFFC, /* during HBI process all prohibited (highest priority) */
.
.
0x00000000,
} ;
The inverse of the example above is prohibiting mask interrupt at SR value levels without
changing the SCU mask value. (0 or 15 only are possible.)
In the example above, the interrupt authorize and prohibit register of each built-in
module must also be operated for SH internal module interrupt authorization and
prohibition.
Note: When the SCU factor interrupt is allowed and interrupt occurs, it is okay if the SH SR mask is
higher than the interrupt unique level (value decided by SCU hardware) and if interrupt can
never be refused by SH. (However, one exception is that all of SR mask 15 can be prohibited.)
CD Multiplayer Startup Execution
This is a service that activates and executes the CD multiplayer when an application
ends. When this service is called, the CD multiplayer screen is displayed exactly the
same as when the power-on sequence is activated. Regardless of the called status,
the CD multiplayer screen is displayed and operation is enabled.
Power On Clear Memory Operation
This provides the 8 bytes of memory on the SDRAM controlled by the Boot ROM.
The 8 bytes are initialized to 0 when power-on is activated, but the contents can be
saved with the reset button (NMI).
Saturn System Library User's Guide 5
(This page is blank in the original Japanese document.)
6
2.0 Reference
2.1 List of Functions
Function Function Name No.
Interrupt Process Routine Registration / Reference
Registers process routine to the interrupt vector SYS_SETSINT 1.1
Registers function to SCU interrupt routine SYS_SETUINT 1.2
Gets registration contents of interrupt vector SYS_GETSINT 1.3
Gets registration contents of SCU interrupt SYS_GETUINT 1.4
routine
SCU Interrupt Mask Set, Reference, and Change Operations
Sets SCU interrupt mask SYS_SETSCUIM 2.1
Changes SCU interrupt mask SYS_CHGSCUIM 2.2
References SCU interrupt mask SYS_GETSCUIM 2.3
Simple Semaphore Operation
Gets semaphore SYS_TASSEM 3.1
Clears semaphore SYS_CLRSEM 3.2
System Clock Switching
Switches system clock SYS_CHGSYSCK 4.1
References system clock value SYS_GETSYSCK 4.2
SCU Interrupt Routine Priority Change
Changes SCU interrupt routine priority SYS_CHGUIPR 5.1
CD Multi-player Startup Execution
Executes startup of CD multi-player SYS_EXECDMP 6.1
Power On Clear Memory Operation
Operates power-on clear memory SYS_PCLRMEM 7.1
Saturn System Library User's Guide 7
2.2 Function Specifications
Title Function Function Name No.
Function To the interrupt vector; registers interrupt process SYS_SETSINT 1.1
Specifications routine
Format: void SYS_SETSINT (Uint 32 Num, void* Hdr);
Input: Num : vector number (0..7FH)
Hdr : interrupt process routine address (dummy routine when 0,
or that interrupt process routine when Num is the SCU
interrupt vector)
Output: None
Function Value: None
Function: Hdr must be a process routine that ends by register save, return, and
RTE command (# pragma interrupt is added if using C language ).
When Hdr is 0, Num re-registers the SCU interrupt routine within the
SCU interrupt (40H..4DH,50H..5FH), others register dummy routine.
There is no range check. Values beyond restricted range must not be
specified.
Remarks: This routine can be used with both master and slave SH2
and is registered to vector addresses based on each VBR.
Title Function Function Name No.
Function To SCU interrupt routine; registers process SYS_SETUINT 1.2
Specifications function
Format: void SYS_SETUINT (Uint 32 Num, void* Hdr);
Input: Num : vector number (SCU vector number)
Hdr : function routine address (dummy routine when 0)
Output: None
Function Value: None
Function: Hdr must be a function by SHC. If the routine is created by the
assembler, it must follow the SHC register save protocol.
Num is limited to SCU interrupt vectors (40H..4DH,50H..5FH).
A dummy routine is registered when Hdr is 0. There is no range
check. Values beyond restricted range must not be specified.
Remarks: When a routine is registered to a vector by SYS_SETSINT, the SCU
interrupt process routine of that vector becomes ineffective and
the registration function is not called. Results are not guaranteed
when this routine is called via SH2 slave.
8
Title Function Function Name No.
Function Gets registration contents of interrupt vector SYS_GETSINT 1.3
Specifications
Format: void (*) () SYS_GETSINT (Uint 32 Num) ;
Input: Num : vector number (0..7FH)
Output: None
Function Value: Vector registration contents (interrupt process routine address)
Function: Contents of the Num vector returned as function values.
There is no range check. Values beyond restricted range must
not be specified.
Remarks: This routine can be used with both master and slave SH2 and refers to
the vector addresses based on each VBR.
Title Function Function Name No.
Function Gets registration contents of SCU interrupt SYS_GETUINT 1.4
Specifications routine
Format: void (*) () SYS_GETUINT (Uint 32 Num) ;
Input: Num : vector number (SCU vector number)
Output: None
Function Value: Registration contents (function routine address)
Function: The registration contents of the SCU interrupt routine that pertains to
Num returned as function values. There is no range check. Values
beyond restricted range must not be specified.
Remarks: Results are not guaranteed when this routine is called via slave SH2.
Title Function Function Name No.
Function Sets SCU interrupt mask SYS_SETSCUIM 2.1
Specifications
Format: void SYS_SETSCUIM (Uint 32 MaskPat) ;
Input: MaskPat : SCU interrupt mask value
Output: None
Function Value: None
Function: Writes the MaskPat value to mask save memory and to the SCU
interrupt register, and then writes the same value to the SCU interrupt
status register. However, if the A-bus interrupt mask bit is allowed,
the upper word of the status register is cleared, and the A-bus inter-
rupt acknowledge register is cleared as well.
Remarks: This routine must not be used from the interrupt process (for SCU
interrupt only) (The value of SYS_GETSCUIM becomes undefined
during the SCU interrupt process.)
The SCU interrupt may disappear when it occurs during the process
(SCU specifications). This possibility should either be avoided or the
usage should occur under conditions where there is no related knowl-
edge thereof. Results cannot be guaranteed when this routine is
called via slave SH2.
Saturn System Library User's Guide 9
Title Function Function Name No.
Function Changes SCU interrupt mask SYS_CHGSCUIM 2.2
Specifications
Format: void SYS_CHGSCUIM (Uint 32 AndMask, Uint32 OrMask) ;
Input: AndMask : Mask value used for authorizing
OrMask : Mask value used for denying
Output: None
Function Value: None
Function: Takes the logical product of the contents of the mask memory and the
AndMask and writes the result of the logical sum of that and the Or-
Mask to the mask save memory and the SCU interrupt. However, if
the A-bus interrupt mask bit is allowed, the upper word of the status
register is cleared, and the A-bus interrupt acknowledge register is
cleared as well. These operations are executed inseparably.
Remarks: This routine must not be used from the interrupt process (for SCU
interrupt only) (The value of SYS_GETSCUIM becomes undefined
during the SCU interrupt process.)
The SCU interrupt may disappear when it occurs during the
process (SCU specifications). This possibility should either be
avoided or the usage should occur under conditions where there is no
related knowledge thereof. Results cannot be guaranteed when this
routine is called via slave SH2.
Title Function Function Name No.
Function References SCU interrupt mask value SYS_GETSCUIM 2.3
Specifications
Format: Uint 32 SYS_GETSCUIM ;
Input: None
Output: None
Function Value: Mask save memory value
Function: This function reads the mask save memory value. If this value
performs settings and changes of the SCU interrupt mask register
using the aforementioned function, it is the same as the value actually
set in the SCU interrupt mask register.
Remarks: During the SCU interrupt process, the change is made to the value
that is set when the application uses SYS_SETSCUIM () and
SYS_CHGSCUIM () where the change is made to the logical sum
of the mask value by interrupt cause factor (when the application uses
SYS_CHGUIPR() and setting has been made, the corresponding
values within that table). However, the interrupt becomes multi-level
and changes to the logical sum. Consequently, this value becomes
undefined during the SCU interrupt process. During this procedure,
a process that relies on referenced values should not be performed.
10
Title Function Function Name No.
Function Gets semaphore SYS_TASSEM 3.1
Specifications
Format: Uint 32 SYS_TASSEM (Uint 32 Num) ;
Input: Num : semaphore number (0 ~ FFH)
Output: None
Function Value: Result (1: acquired, 0: already acquiring another)
Function: TAS command to memory (1 byte) linked to Num number is executed
and the results are returned to function values. There is no range
check. Values beyond the restricted range must not be specified. This
routine can be used with both master and slave SH2.
Title Function Function Name No.
Function Clears semaphore SYS_CLRSEM 3.2
Specifications
Format: void SYS_CLRSEM (Uint 32 Num) ;
Input: Num : semaphore number (0 ~ FFH)
Output: None
Function Value: None
Function: Clears the memory (1 byte) linked to Num number. There is no range
check. Values outside restrictions must not be specified. This routine
can be used with both master and slave SH2.
Title Function Function Name No.
Function Switches System Clock SYS_CHGSYSCK 4.1
Specifications
Format: void SYS_CHGSYSCK (Uint 32 CkMode) ;
Input: CkMode: 0: CPU 26 MHz, 320/640 Mode
1: CPU 28 MHz, 352/704 Mode
Output: None
Function Value: None
Function: System clock is switched to the value specified by CkMode.
Remarks: See the overview and the SMPC Manual regarding reset devices and
processing time. The system hangs up when this routine is called via
slave SH2. Be sure to call via master SH2.
Saturn System Library User's Guide 11
Title Function Function Name No.
Function References System Clock Value SYS_GETSYSCK 4.2
Specifications
Format: Uint 32 SYS_GETSYSCK ;
Input: None
Output: None
Function Value: 0 or 1: the final SYS_CHGSYSCK () parameter value
Function: Reads the system clock value. Parameter value when
SYS_CHGSYSCK () is called for the last time.
Remarks: Please reference this value via master SH2.
Title Function Function Name No.
Function Change SCU Interrupt Routine Priority SYS_CHGUIPR 5.1
Specifications
Format: void SYS_CHGUIPR (Uint 32 *IprTab) ;
Input: IprTab : 32 long word data array
Output: None
Function Value: None
Function: The SCU interrupt routine priority table of the Boot ROM is rewritten
as the table value specified by IprTab. If rewrite is performed once,
interrupt processing by the SCU interrupt routine is executed in
accordance with the priority of the table values pertaining to each
factor.
Note: The table contents are not checked. If inconsistencies relating to priority exist in the table, the
system may hang up.
Remarks: Table settings are valid until the next rewrite. During this interval,
there is no need for the application to save the table specified in the
parameters. Further, reset returns to the initial set value of the Boot
ROM. The results cannot be guaranteed when this routine is called
via slave SH2.
Title Function Function Name No.
Function Starts and Executes CD Multiplayer SYS_EXECDMP 6.1
Specifications
Format: void SYS_EXECDMP (void) ;
Input: None
Output: Does not return to call side.
Function Value: None
Function: Starts and executes the CD multiplayer.
Remarks: The system hangs up when this routine is called via slave SH2.
Be sure to call via master SH2.
12
Title Function Function Name No.
Function Operates Power On Clear Memory SYS_PCLRMEM 7.1
Specifications
Format: Uint8 *SYS_PCLRMEM
Input: Perform normal memory access.
Output: Perform normal memory access.
Function Value: None
Function: 8 byte memory address controlled by the Boot ROM. This memory is
initialized to 0 only when the power is turned on, but the contents are
saved by the reset button (NMI).
Remarks: A check of the range is not performed. Be careful not to access outside
the range.
Saturn System Library User's Guide 13
(This page is blank in the original Japanese version.)
14
SMPC I/F User’s Manual
1.0 Guide
This library uses functions of the SMPC (System Management and Peripheral Con-
trol).
2.0 Features
• Able to greatly decrease the main CPU burden.
• The main CPU and SMPC interface is a software handshake method using the
SMPC register.
Saturn System Library User's Guide 15
3.0 Overview
3.1 Function Overview
SMPC functions can be divided into the system management system and peripheral
control system.
• System Management System
The system management system resets the hardware (CPU, sound, etc.), sets the
clock, and performs acquisition.
• Peripheral Control System
The peripheral control system collects data automatically from peripherals con-
nected to the peripheral I/F, and returns it to the main CPU.
3.2 Process Overview
The interface between the SMPC and the main CPU is a handshake. In executing a
function (command), required parameters are written to the SMPC register. The
command write procedure is followed. SMPC executes processing in response to
commands when commands are written. Processes include IntBack and Non-
IntBack.
• IntBack
Intback is the process of returning results through interrupts (SMPC interrupts)
after commands are passed to the SMPC. SMPC interrupt processing and regis-
tration are performed in the library. Also, other interrupt processes are prohib-
ited during the SMPC interrupt process. Timing of issuing command issuance
differs according to the function.
• Non-IntBack
Non-IntBack is a process that only passes commands to the SMPC. The library
function waits for the SMPC process to end. (See the SMPC User’s Manual for
details of each SMPC process time.) The functions (reset, etc.) that can be used
by this process are functions which do not have to receive results after a com-
mand has been passed.
Shown below are the processing systems that can be used by each function.
O : Processing, X : Not processing
IntBack Non-IntBack
System Management O O
Peripheral Control O X
16
4.0 Details
4.1 Functions
• System Management System
The system management system has the following functions.
Function IntBack Non-IntBack
Master SH2 ON X O
Slave SH2 ON X O
Slave SH2 OFF X O
Sound ON X O
Sound OFF X O
CD ON X O
CD OFF X O
Entire system reset X O
NMI Request X O
Hot reset enable X O
Hot reset disable X O
Get cartridge code O X
Get area code O X
Get system status O X
Set SMPC memory X O
Get SMPC memory O X
Set time X O
Get time O X
(Note) Clock change 320,352 is provided by the system library.
• Peripheral Control System
The following peripherals are supported by the library.
Game Device Peripheral Name
Saturn Peripherals Digital Devices
Analog Devices
Pointing Devices (mouse)
Keyboard
Multitap (6P)
Mega Drive Peripherals 3-button Pad
6-button Pad
4P adapter
Mouse
Saturn System Library User's Guide 17
4.2 Process
4.2.1 Library Configuration
• Non-IntBack Command Issuance
This is the Non-IntBack system process.
• IntBack Command Issuance
Gets system data (except for time)
This process is performed once per game.
Gets peripheral data and time data
This is a process required for each frame.
4.2.2 Recommended Examples
Recommended examples of three patterns are shown below.
1 2 3
Non-IntBack Command Issuance O
IntBack Get system data O
Commnad
Issuance Get peripheral data O O O
Get peripheral data and time data O O
18
• Chart Descriptions
Main Process
IntBack initialization (1) : Specifies system data acquisition
IntBack initialization (2) : Specifies peripheral data acquisition
IntBack initialization (3) : Specifies peripheral data acquisition and time data
acquisition
SMPC Process
(1) : System data collection process
(2) : Peripheral data collection process
(3) : Time data collection process
(1) Pattern 1
* *
Saturn System Library User's Guide 19
4.2.3 Restrictions
• Common
• Do not issue commands after V-Blank IN until 300 µs has elapsed.
• Do not issue commands after issuing the IntBack command until the next V-Blank
IN.
• Cautions when executing in multiple tasks
In cases in which the interrupt task is changed when using the library with
multiple tasks, because SMPC exclusive control is not performed in the library,
SMPC deadlock may occur and SMPC operation may become abnormal. As a
result, when executing with multiple tasks, the exclusive control of library must
be performed by the user.
• For restrictions from slave SH2 see the SMPC User’s Manual.
• Command process time may vary between 20 µs to 100 µs, because there is 1 SMPC
internal process per second.
• Non-IntBack Command Issue Function
• There are no restrictions other than Common (above).
20
• IntBack Command Issue Function
System Data Acquisition (Excluding time)
• There are no restrictions other than Common (above).
Peripheral Data Acquisition, Time Data Acquisition
• Do not issue a command after issuing the IntBack command until the next V-Blank
IN.
• Issue a IntBack command 14 ms before the specified V-Blank IN.
• The peripheral data collection process within SMPC is done during one vertical
display period.
• (Time out) data that could not be acquired at the instructed V-Blank IN after the
IntBack command is issued cannot be acquired thereafter.
• If a time out frequently occurs, peripherals are handled as unconnected.
• In SMPC, peripheral acquisition begins in such a way that the peripheral
acquisiton ends 1ms before the specified V-Blank.
• Number of V-Blank IN Skips
The number of V-Blank skips indicates the execution timing of the peripheral
data collection process in SMPC after the IntBack command is issued. This is
provided for games that change frames by 2 frames or more. The peripheral
data collection process in SMPC is executed in V-DISP before the (V-Blank In
skip number + 1)th V-Blank IN after the IntBack command is issued . Set 0
when executing in V-Blank IN immediately after issuing the IntBack command.
Saturn System Library User's Guide 21
4.3 Peripheral Control
Peripheral controls must be created in accordance with game creation standards.
The library is created intelligently, thus enabling them to be created easily.
4.3.1 Policy
The peripheral acquisition process is created according to the following policies for
flexible response to the user.
• Able to accommodate peripherals to be sold in the future.
• Methods that do not provide multitap awareness.
• Perform corrective measures against problems.
4.3.2 Method
(1) Overview
• Each peripheral IDs and peripheral data is obtained by specifying as inputs the
required number of peripherals, peripheral IDs and preferred size.
• Even when the peripheral acquisition ID and connected peripheral ID are different,
data is obtained if peripherals are connected. For example, analog device data is
obtained as mouse data.
(Example)
Input
Required number of peripherals = 3
Peripheral ID = digital device
Peripheral size = digital device size
Connection Status
Main connector 1 = multi-tap 6P
Multi-tap connector 1 = digital device
Multi-tap connector 3 = analog device
Main connector 2 = keyboard device
(Other devices are not connected to peripherals)
Output
Peripheral ID Peripheral Data
No. 1 Digital Digital Format
No. 2 Unconnected Invalid
No. 3 Analog Digital Format
22
5.0 Calling Sequence
Recommended example of pattern 3 calling sequence.
Uint32 work[10]; /* peripheral data acquisition work area */
PerGetSys *sys_data; /* system data */
PerDgtInfo *get_per; /* peripheral output data pointer */
Uint8 *get_tim; /* time output data pointer */
• Initial Process (Immediately after the V-Blank Process).
PER_Init (PER_KD_SYS, 0, 0, 0, NULL, 0); /* get system data is specified*/
. . .
sys_data = PER_GET_SYS () ; /* get system data */
• Normal (Immediately after the V-Blank Process).
PER_Init (PER_KD_PERTIM, 3, PER_ID_DGT, PER_SIZE_DGT, work, 0);
/* Peripheral data and time data acquisition are specified */
...
• Normal for 2 or more times (Immediately after the V-Blank Process).
PER_GetPer (PerGetPer **) &get_per);
get_tin = PER_GET_TIM ();
if (((get_per[2].data) & PER_DGT_U) == PER_DGT_U_) { /* current pe
ripheral data of connector 3 is UP ? */
. . .
. . .
Saturn System Library User's Guide 23
6.0 Data Specifications
6.1 List of Data
Function Function name No.
IntBack Peripheral ID data type PerId 1
Peripheral size data type PerSize 2
IntBack Kind PerKind 3
Required number of peripherals PerNum 4
System data output data type PerGetSys 5
Peripheral data output data type PerGetPer 6
Device information data type Digital device info data type PerDgtInfo 7
Analog device info data type PerAnlInfo 8
Pointing device info data type PerPntInfo 9
Keyboard device info data type PerKbdInfo 10
Mega Drive 3-button pad info data type PerM3bpInfo 11
Mega Drive 6-button pad info data type PerM6bpInfo 12
Device Data Type Digital device data type PerDgtData 13
Analog device data type PerAnlData 14
Pointing device data type PerPntData 15
Keyboard device data type PerKbdData 16
Mega Drive 3-button pad data type PerM3bpData 17
Mega Drive 6-button pad data type PerM6bpData 18
24
6.2 Data Specifications
IntBack command issuance
Title Data Data Name No.
Data Peripheral ID data type PerId 1
Specifications
This data type shows the peripheral ID.
Constant name Description
PER_ID_NCON Unconnected
PER_ID_UNKNOW Peripherals that cannot be processed by SMPC
PER_ID_DGT Digital Device
PER_ID_ANL Analog Device
PER_ID_PNT Pointing Device (Mega Drive mouse)
PER_ID_KBD Keyboard
PER_ID_M3BP Mega Drive 3-button pad
PER_ID_M6BP Mega Drive 6-button pad
Title Data Data Name No.
Data Peripheral size data type PerSize 2
Specifications
This data type shows the peripheral size.
Constant name Description
PER_SIZE_DGT Digital Device
PER_SIZE_ANL Analog Device
PER_SIZE_PNT Pointing Device (Mega Drive mouse)
PER_SIZE_KBD Keyboard
PER_SIZE_M3BP Mega Drive 3-button pad
PER_SIZE_M6BP Mega Drive 6-button pad
Saturn System Library User's Guide 25
Title Data Data Name No.
Data IntBack kind data type PerKind 3
Specifications
This data type shows the IntBack kind.
Constant name Description
PER_KD_SYS System data acquisition (except time)
PER_KD_PER Peripheral data acquisition
PER_KD_PERTIM Peripheral data acquisition + time data acquisition
Title Data Data Name No.
Data Required number of peripherals data type PerNum 4
Specifications
This data type shows the required number of peripherals.
Value Meaning
0 ~ 31 1P ~ 32P
Title Data Data Name No.
Data System data output data type PerGetSys 5
Specifications
This data type shows the system data output.
PerGetSys *data
Access Macro Type Description
PER_GS_AC (data) Uint8 Area code
PER_GS_SS (data) Uint16 System status
PER_GS_SM (data) Uint32 SMPC memory
PER_GS_SMPC_STAT (data) Uint8 SMPC status
26
Shown below are the constants and values that can be used by each access macro.
PER_GS_CC (data)
bit 7 bit 0
0 0 0 0 0 0 CTR1 CTR0
PER_GS_AC (data)
bit 7 bit 0
ACODE ACODE ACODE ACODE
0 0 0 0
3 2 1 0
See the hardware manual for areas indicated an area codes.
PER_GS_SS (data)
Bit Position Constant Acquisition Value
PER_SS_DOTSEL DOTSEL signal status
PER_SS_SYSRES SYSRES signal status
PER_SS_MSHNMI MSHNMI signal status
PER_SS_SNDRES SNDRES signal status
PER_SS_CDRES CDRES signal status
Description of Acquisition Values
Value Meaning
0 OFF
1 ON
PER_GS_SM (data)
Areas which are used in common by applications and Boot ROM.
Bit Position Constant Acquisition Value
PER_MSK_LANGU Language (see below)
PER_MSK_SE SE (0: ON, 1: OFF)
PER_MSK_STEREO STEREO or MONO (0: STEREO, 1: MONO)
PER_MSK_HELP HELP (0: ON, 1: OFF)
Language Constant
Constant Description
PER_JAPAN Japanese
PER_ENGLISH English
PER_FRANCAIS French
PER_DEUTSCH German
PER_ITALIANO Italian
PER_ESPNOL Spanish
Saturn System Library User's Guide 27
PER_GS_SMPC_STAT (data)
Bit Position Constant Acquisition Value
PER_SS_RESET Reset mask condition
0: reset enable
1: reset disable (default)
PER_SS_SETTIME Time set condition
0: time is not set after SMPC cold reset
1: time is set after SMPC cold reset
Title Data Data Name No.
Data Peripheral data output data type PerGetPer 6
Specifications
This data type shows peripheral data output.
• Device Information Data Type
Title Data Data Name No.
Data Digital device information data type PerDgtInfo 7
Specifications
This data type shows digital device information.
typedef struct { /* digital device */
PerDgtData data; /* current peripheral data */
PerDgtData push; /* previously not pressed currently pressed button
PerId id; /* peripheral ID */
} PerDgtInfo;
Title Data Data Name No.
Data Analog device information data type PerAnlInfo 8
Specifications
This data type shows analog device information.
typedef struct { /* analog device */
PerAnlData data; /* current peripheral data */
PerAnlData push; /* previously not pressed currently pressed button
PerId id; /* peripheral ID */
} PerAnlInfo;
28
Title Data Data Name No.
Data Pointing device information data type PerPntInfo 9
Specifications
This data type shows pointing device information.
typedef struct { /* pointing device */
PerPntData data; /* current peripheral data */
PerPntData push; /* previously not pressed currently pressed button
PerId id; /* peripheral ID */
} PerPntInfo;
Title Data Data Name No.
Data Keyboard device information data type PerKbdInfo 10
Specifications
This data type shows keyboard device information.
typedef struct { /* keyboard device */
PerKbdData data; /* current peripheral data */
PerKbdData push; /* previously not pressed currently pressed button
PerId id; /* peripheral ID */
} PerKbdInfo;
Title Data Data Name No.
Data Mega Drive 3-button pad information data type PerM3bpInfo 11
Specifications
This data type shows Mega Drive 3-button pad information.
typedef struct { /* Mega Drive 3-button pad */
PerM3bpData data; /* current peripheral data */
PerM3bpData push; /* previously not pressed currently pressed button
PerId id; /* peripheral ID */
} PerM3bpInfo;
Title Data Data Name No.
Data Mega Drive 6-button pad information data type PerM6bpInfo 12
Specifications
This data type shows Mega Drive 6-button pad information.
typedef struct { /* Mega Drive 6-button pad */
PerM6bpData data; /* current peripheral data */
PerM6bpData push; /* previously not pressed currently pressed button
PerId id; /* peripheral ID */
} PerM6bpInfo;
Saturn System Library User's Guide 29
• Device Data Type
The meaning of the device data bit acquisition value is explained below.
Description of Acquisition Values
Value Meaning
0 Button is pressed
1 Button is not pressed
Title Data Data Name No.
Data Digital device data type PerDgtData 13
Specifications
This data type shows the digital device.
typedef Uint16 PerDgtData; /* digital device data type */
Bit Position Constant Acquisition Value
PER_DGT_U UP
PER_DGT_D DOWN
PER_DGT_R RIGHT
PER_DGT_L LEFT
PER_DGT_A A
PER_DGT_B B
PER_DGT_C C
PER_DGT_S START
PER_DGT_X X
PER_DGT_Y Y
PER_DGT_Z Z
PER_DGT_TR TRG-RIGHT (upper right of the device)
PER_DGT_TL TRG-LEFT (upper left of the device)
Title Data Data Name No.
Data Analog device data type PerAnlData 14
Specifications
This data type shows the analog device.
typedef struct { /* analog device data type */
PerDgtData dgt; /* digital device data type */
Sint16 x; /* X axis absolute value (0 ~ 255) */
Sint16 y; /* Y axis absolute value (0 ~ 255) */
Sint16 z; /* Z axis absolute value (0 ~ 255) */
} PerAnlData;
30
Title Data Data Name No.
Data Pointing device data type PerPntData 15
Specifications
This data type shows the pointing device.
typedef struct { /* pointing device data type */
PerPntData dgt; /* digital device data type */
Sint16 data; /* data */
Uint16 x; /* amount of X axis movement (-128 ~ 127) */
Sint16 y; /* amount of Y axis movement (-128 ~ 127) */
} PerPntData;
Shown below are constants and values that can be used by each member.
Data
Bit Position Constant Acquired value
PER_PNT_R RIGHT
PER_PNT_L LEFT
PER_PNT_MID MIDDLE
PER_PNT_CNT CENTER
PER_PNT_X0 X axis overflow (0: overflows, 1: does not overflow)
PER_PNT_Y0 Y axis overflow (0: overflows, 1: does not overflow)
Title Data Data Name No.
Data Keyboard device data type PerKbdData 16
Specifications
This data type shows the keyboard device.
typedef struct { /* keyboard device data type */
PerDgtInfo dgt; /* digital device data type */
Uint8 skey; /* special key */
Uint8 key; /* key */
} PerKbdData;
Shown below are constants and values that can be used by each member.
skey
Bit Position Constant Acquired value
PER_KBD_CL Caps Lock
PER_KBD_NL Num Lock
PER_KBD_SL Scroll Lock
PER_KBD_MK Make (0: key pressed, 1: key not pressed)
PER_KBD_BR Break (0: key released, 1: key not released)
Saturn System Library User's Guide 31
Title Data Data Name No.
Data Mega Drive 3-button pad data type PerM3bpData 17
Specifications
This data type shows the Mega Drive 3-button pad.
typedef Uint8 PerM3bpData; /* Mega Drive 3-button pad data type */
PER_M3BP_U ~ PER_M3BP_S is the same as PER_DGT_U ~ PER_DGT_S. PER_DGT_X ~ PER_DGT_TL
is the condition when the button is not pressed.
Bit Position Constant Acquired Value
PER_M3BP_U UP
PER_M3BP_D DOWN
PER_M3BP_R RIGHT
PER_M3BP_L LEFT
PER_M3BP_A A
PER_M3BP_B B
PER_M3BP_C C
PER_M3BP_S START
Title Data Data Name No.
Data Mega Drive 6-button pad data type PerM6bpData 18
Specifications
This data type shows the Mega Drive 6-button pad.
typedef Uint16 PerM6bpData; /* Mega Drive 6-button pad data type */
PER_M6BP_U ~ PER_M6BP_MD is the same as PER_DGT_U ~ PER_DGT_TR.
PER_DGT_TL is the condition when the button is not pressed.
Bit Position Constant Acquisition Value
PER_M6BP_U UP
PER_M6BP_D DOWN
PER_M6BP_R RIGHT
PER_M6BP_L LEFT
PER_M6BP_A A
PER_M6BP_B B
PER_M6BP_C C
PER_M6BP_S START
PER_M6BP_X X
PER_M6BP_Y Y
PER_M6BP_Z Z
PER_M6BP_MD MODE (upper right of device)
32
7.0 Function Specifications
7.1 List of Functions
Function Function Name No.
Non-IntBack Command Issue Master SH2 ON PER_SMPC_MSH_ON 1
Slave SH2 ON PER_SMPC_SSH_ON 2
Slave SH2 OFF PER_SMPC_SSH_OFF 3
Sound ON PER_SMPC_SND_ON 4
Sound OFF PER_SMPC_SND_OFF 5
CD ON PER_SMPC_CD_ON 6
CD OFF PER_SMPC_CD_OFF 7
Reset entire system PER_SMPC_SYS_RES 8
NMI request PER_SMPC_NMI_REQ 9
Hot reset enable PER_SMPC_RES_ENA 10
Hot reset disable PER_SMPC_RES_DIS 11
SMPC memory set PER_SMPC_SET_SM 12
Time set PER_SMPC_SET_TIM 13
IntBack Command Issue IntBack Initialization PER_Init 14
Peripheral data acquisition PER_GetPer 15
Other Time acquisition PER_GET_TIM 16
System data acquisition PER_GET_SYS 17
Other Hot reset acquisition PER_GET_HOT_RES 18
7.2 Function Specifications
Non-IntBack
Title Function Function Name No.
Function Master SH2 ON ~ hot reset disable PER_SMPC_MSK_ON ~ 1 ~ 11
Specifications PER_SMPC_RES_DIS
Format: void PER_SMPC_XXX (void)
Input: None
Output: None
Function Value: None
Function: As per the list of function specifications. See the SMPC hardware
manual for details.
Saturn System Library User's Guide 33
Title Function Function Name No.
Function Sets SMPC memory PER_SMPC_SET_SM 12
Specifications
Format: void PER_SMPC_SET_SM (Uint32 input_dt)
Input: input_dt : SMPC memory
See System data output data type for the meaning of each bit value.
Output: None
Function Value: None
Function: Sets the SMPC memory. Because the SMPC memory is an area that
is used in common by applications and the Boot ROM, the format
must be observed.
Title Function Function Name No.
Function Sets time PER_SMPC_SET_TIM 13
Specifications
Format: void PER_SMPC_SET_TIM (Uint8 * input_dt)
Input: input_dt: time
Input Format
bit7 bit4 bit3 bit0
*(input_dt) second (10 digit) second (1 digit)
*(input_dt + 1) minute (10 digit) minute(1 digit)
*(input_dt + 2) hour (10 digit) hour (1 digit)
*(input_dt + 3) day (10 digit) day (1 digit)
*(input_dt + 4) day of week (0 ~ 6) month (1H ~ CH)
*(input_dt + 5) year (10 digit) year (1digit)
*(input_dt + 6) year (1000 digit) year (100 digit)
• Day data: Sunday is 0, Monday is 1, Tuesday is 2 . . .
• Month data is hexadecimal data.
Output: None
Function Value: None
Function: Sets the time.
34
IntBack
Title Function Function Name No.
Function Initializes IntBack PER_Init 14
Specifications
Format: Uint32 PER_Init (PerKind kind, PerNum num, PerId id,
PerSize size, Uint32 work[n], Uint8 v_blank)
Input: kind : IntBack type
num : Required number of peripherals
id : Peripheral ID
size : Peripheral size
work : Work area (Use for getting peripheral data. Must be
declared by a global variable.)
v_blank : Number of V-Blank skip
• Method for calculating the work area
n = (num x data A)/4 + data B
round up to nearest digit
Data A and data B change depending on the peripheral.
Peripheral Data A Data B
Digital device 12 1
Analog device 36 2
Pointing device 36 2
Keyboard device 20 1
Mega Drive 3-button pad 6 1
Mega Drive 6-button pad 12 1
Output: none
Function Value: execution condition
Constant Description
PER_INT_ERR Could not issue the IntBack command
PER_INT_OK Could issue the IntBack command
Function: Initializes IntBack and issues the IntBack command. Execution rules
must be obvserved. Set Null or 0 to unneeded parameters. Execute at
least 1 time before executing PER_GetPer (), PER_GetTim(),
PER_GetSys().
Remarks: Generally, this should be executed immediately after the V-Blank
process. Other interrupts are prohibited during SMPC interrupts.
Note: DO NOT perform this function within the interrupt process. Be sure
to perform via the main process.
Saturn System Library User's Guide 35
Title Function Function Name No.
Function Peripheral data acquisition PER_GetPer 15
Specifications
Format: Uint32 PER_GetPer (PerGetPer **output_dt)
Input: none
Output: output_dt: peripheral output address (Null = cannot get)
Function Value: Execution conditions.
Constant Description
PER_INT_ERR Could not issue the IntBack command.
PER_INT_OK Could not issue the IntBack command.
Function Value: Issues the IntBack command and gets peripheral data. Execution
rules must be observed. Before this function is executed, specify “pe-
ripheral data get” to PER_Init() and execute at least once. Null is
output to the peripheral data address when peripheral data get is not
specified.
Remarks: Generally, this should be executed immediately after the V-Blank
process. Other interrupts are prohibited during SMPC interrupt.
Title Function Function Name No.
Function Gets time PER_GET_TIM 16
Specifications
Format: Uint8 *PER_GET_TIM (void)
Input: none
Output: none
Function Value: Time data address
Function: Gets time data. Before this function is executed, instructs peripheral
data get and time get to PER_Init() and execute at least once.
Title Function Function Name No.
Function Gets system data PER_GET_SYS 17
Specifications
Format: PerGetSys *PER_GET_SYS (void)
Input: none
Output: none
Function Value: System data address (NULL = could not get)
Function: Gets system data. Instructs system data get to PER_Init () before this
function is executed and execute at least once. Execute this function
about 300 µs after executing PER_Init.
36
Other
Title Function Function Name No.
Function Gets hot reset PER_GET_HOT_RES 18
Specifications
Format: Uint8 PER_GET_HOT_RES (void)
Input: none
Output: none
Function Value: Hot reset condition address
Constant Description
PER_HOT_RES_ON Hot reset ON
PER_HOT_RES_OFF Hot reset OFF
Function: Gets the hot reset condition. This function can be executed at any
time. Update is performed by PER_GetPer().
Saturn System Library User's Guide 37
(This page is blank in the original Japanese version.)
38
Backup Library User’s Manual
1.0 Guide
1.1 Purpose
In addition to the builit-in memory in this game machine, several types of storage
devices are being planned for storing information during a game.
This library provides functions for reading, writing and searching these backup
storage devices.
1.2 Explanation
1.2.1 Introduction
Always use this library when accessing storage devices for backup.
1.2.2 How to Use This Library
The library itself is compressed and stored in the boot ROM. The application pro-
grammer expands the library and uses it. Expansion is performed by securing a
program expansion area and executing BPU_Init(). Once this is done, each function
can be used.
1.2.3 Storage Capacity
The object of this library is to facilitate access of devices to be supported in the future
through a common interface, and therefore the capacity of the storage devices to be
developed in the future is not known. Also, depending on the device, it will be
divided up into multiple areas. Each one of these unit areas is called a partition (the
capacity of each partition may be different).
When storing data, execute BUP_SelPart() and BUP_Stat() and confirm the capacity
before writing. The built-in backup memory is 32 Kbyte.
1.2.4 Date Setting
In order to preserve the uniqueness of this library, it does not have a function for
acquiring the date and time. Set the date and time data by having the application use
BPU_SetDate().
1.2.5 Precautions
This library will destroy data if writing is interrupted. Before executing BUP_Init(),
BUP_Format(), BUP_Write() and BUP_Delete, disable the reset button by using
PER_SMPC_RES_DIS() in the system library.
Saturn System Library User's Guide 39
1.3 Program Example
An example of a program written in C is shown below.
#include “sega_per.h”
#define BUP_START_ADDR 0x60????0 */
#include “sega_bup.h”
Unit32 BackUpRamWork[2048];
main()
[
BupConfig conf[3]
BupStat sttb;
BupDir writetb;
BupDate datatb;
Unit8 *time;
PER_SMPC_RES_DIS(); */
BUP_Init(BUP_START_ADDR, BackUpRamWork, conf);
if(BUP_Stat(0, &sttb)==BUP_UNFORMAT) {
BUP_Format(0);
}
PER_SMPC_RES_ENA(); */
BUP_Stat(0, &sttb);
if(sttb.freeblock > 0) {
strcpy((char *)writetb.filename, “FILE_NAME01”);
STRCPY((char *)writetb.comment, “test”);
writetb.language = BUP_JAPANESE;
time = PER_GET_TIM(); */
datetb.year = (Uint8 )( (Uint16 )(time[6]>>4) * 1000
+ (Uint16 )(time[6] & 0x0F) * 100
+ (Uint16 )(time[5]>>4) * 10
+ (Uint16 )(time[5] & 0x0F) - 1980);
datetb.month = time[4] & 0x0F;
datetb.day
datetb.time = (time[2]>>4)*10 + (time[2] & 0x0F);
datetb.min = (time[1]>>4)*10 + (time[1] & 0x0F);
writetb.date
writetb.datasize = 10;
PER_SMPC_RES_DIS(); */
BUP_Write(0, &writetb, “Dummy Data”);
PER_SMPC_RES_ENA(); */
40
2.0 Reference
2.1 Data List
Title Data Data Name No.
Data specification Storage device connection information BupConfig
typedef struct BupConfig {
Uint16 unit_id; /*unit ID */
Uint16 partition; /*number of partitions */
} BupConfig;
*When unit_id is "0", it indicates non-connection.
Type of device unit_id partition
Built-in memory 1 1
External cartridge 2 1
Title Function Function Name No.
Data specification Status information BupStat
typedef struct BupStat {
Uint32 totalsize; /*total capacity (bytes) */
Uint32 totalblock; /*number of blocks */
Uint32 blocksize; /*size of one block (bytes) */
Uint32 freesize; /*open space */
Uint32 freeblock; /*number of open blocks */
Uint32 datanum; /*number of items that can be written */
} BupStat;
The value for the size specified by BUP_Stat() for datasize is stored in datanum.
Title Function Function Name No.
Data specification Date and time BupDate
typedef struct BupStat {
Uint8 year; /*year (1980 subtracted from year */
Uint8 month; /*month (1-12) */
Uint8 day; /*day (1-31) */
Uint8 time; /*hour (0-23) */
Uint8 min; /*minute (0-59) */
Uint8 week; /*day of week (sunday 0- saturday 6) */
} BupDate;
Saturn System Library User's Guide 41
Title Function Function Name No.
Data specification Directory information BupDir
typedef struct BupStat {
Uint8 filename[12]; /*file name */
/*total 12 bytes ASCII 11 characters
+ NUL */
Uint8 comment[11]; /*comment */
/*total 11 bytes ASCII 10 characters
+ NUL */
Uint8 language; /*language of comment */
/* Japanese BUP_JAPANESE */
/* English BUP_ENGLISH */
/* French BUP_FRACAIS */
/* German BUP_DEUTSCH */
/* Spanish BUP_ESPAN0L */
/* Italian BUP_ITALIANO */
Uint32 date; /*date and time data */
Uint32 datasize; /*data size (unit: byte) */
Uint16 blocksize; /*data size (unit: block) */
} BupDir;
2.2 Function List
Function Function Name No.
Backup library
Initialize backup library BUP_Init 1
Select partition BUP_SelPart 2
Execute format BUP_Format 3
Get status BUP_Stat 4
Write data BUP_Write 5
Read data BUP_Read 6
Delete data BUP_Delete 7
Get directory information BUP_Dir 8
Verify data BUP_Verify 9
Open date and time data BUP_GetDate 10
Compress data and time data BUP_SetDate 11
42
2.3 Data Flow
Write
Storage device
HOST
for backup
Read
2.4 Function Specifications
Title Function Function Name No.
Function specification Initializes backup library BUP_Init 1
Format void BUP_Init(Uint32 *libaddr,Uint32 *workbuff,BupConfig conf[3])
Input libaddr : specifies address to which library is loaded.
The size of the library is 16 Kbytes.
workbuff : point for library work area
A work area size of 8192 bytes is required.
Long word access may also be performed, so be sure to secure
with Uint32.
Output conf : Gets information on the connected storage device.
Function Loads the backup library to the specified memory area and prepares it
for use. Gets information on the connected storage device.
The following device numbers correspond to three tables.
Device No. Device Type
0 Built-in memory cartridge
1 Memory cartridge or parallel interface
2 Serial interface
Notes Always prepare three storage device connection information tables.
Example
#define BUP_START_ADDR 0x6??????
#include”sega_bup.h”
Uint32 workmemory[2048]
voidsample()
{
BupConfig conf[3]
BUP_Init(BUP_START_ADDR, workmemory, conf);
...............
}
Saturn System Library User's Guide 43
Title Function Function Name No.
Function specification Partition selection BUP_SelPart 2
Format Sint32 BUP_SelPart(Uint32 device,Uint16 num)
Input device : device number
0: built-in memory
1: memory cartridge or parallel interface
2: serial interface
num : partition number
0 - (number of partitions - 1)
Output none
Function value 0 : success
other : failure
Function Selects a partition. In the initial condition, partition 0 is selected.
Title Function Function Name No.
Function specification Executes format BUP_Format 3
Format Sint32 BUP_Format(Uint32 device)
Input device : device number
0: built-in memory
1: memory cartridge or parallel interface
2: serial interface
Output none
Function value 0 : success
BUP_WRITE_PROTECT : write protected
other : failure
Function Initializes the backup storage device.
Formats only the current partition in a partitioned backup storage
device.
44
Title Function Function Name No.
Function specification Gets status BUP_Stat 4
Format Sint32 BUP_Stat(Uint32 device,Uint32 datasize,BupStat
*stat)
Input device : device number
0: built-in memory
1: memory cartridge or parallel interface
2: serial interface
datasize : specify size of data to be written in byte units
Output stat : status information
Function value returns device status
0 : success
BUP_NON : not connected
BUP_UNFORMAT : not formatted
Function Gets status information.
Title Function Function Name No.
Function specification Writes data BUP_Write 5
Format Sint32 BUP_Write(Uint32 device, BupDir *dir,Uint8 *data,Uint8
owsw)
Input device : device number
0: built-in memory
1: memory cartridge or parallel interface
2: serial interface
dir : file control information (input other than dir.blocksize)
data : pointer for write data
owsw: overwrite check mode
ON: does not write if file of same name exists
OFF: writes on file if file of same name exists
Output none
Function value 0 : success
BUP_NON : not connected
BUP_UNFORMAT : not formatted
BUP_WRITE_PROTECT : write protect exists
BUP_FOUND : file of same name exists
Other : failure
Function Writes data to the backup storage device.
Saturn System Library User's Guide 45
Title Function Function Name No.
Function specification Loads data BUP_Read 6
Format Sint32 BUP_Read(Uint32 device, Uint8 *fname, Uint8
*data)
Input device : device number
0: built-in memory
1: memory cartridge or parallel interface
2: serial interface
fname : file name specification (11 characters are required in ASCII)
Output data : pointer for load destination buffer
Function value 0 : success
BUP_NON : not connected
BUP_UNFORMAT : not formatted
BUP_NOT_FOUND : file not found
BUP_BROKEN : file is damaged
Other : failure
Function Loads data from the backup storage device.
Title Function Function Name No.
Function specification Deletes data BUP_Delete 7
Format Sint32 BUP_Delete(Uint32 device, Uint8 *fname)
Input device : device number
0: built-in memory
1: memory cartridge or parallel interface
2: serial interface
fname : file name (11 characters is required in ASCII)
Output none
Function value 0 : success
BUP_NON : not connected
BUP_UNFORMAT : not formatted
BUP_NOT_FOUND : file not found
BUP_WRITE_PROTECT : write protect exists
Other : failure
Function Deletes data on the backup storage device.
46
Title Function Function Name No.
Function specification Gets directory information BUP_Dir 8
Format Sint32 BUP_Dir(Uint32 device,Uint8 *fname,Uint16 dirsize, BupDir *dir)
Input device : device number
0: built-in memory
1: memory cartridge or parallel interface
2: serial interface
fname : file name specification (within 11 ASCII characters)
dirsize : specifies the number of directory info secured
Output dir : stores directory information
Function value number of directory information hits
Function The file name is done by searching forward, and the directory infor-
mation is stored in a table. The number of directories hit by the search
is returned as the function value. If negative, it indicates that the table
is too small, and the number of hits can be confirmed by inverting the
sign (if the result is 11 when the tbsize is set to 10 and a search is
performed, -11 is returned).
Title Function Function Name No.
Function specification Verify data BUP_Verify 9
Format Sint32 BUP_Verify(Uint32 device, Uint8 *filename,Uint8
*data)
Input device : device number
0: built-in memory
1: memory cartridge or parallel interface
2: serial interface
filename : file name (11 characters are required in ASCII)
data : pointer for data verification
Output none
Function value 0 : success
BUP_NON : not connected
BUP_UNFORMAT : not formatted
BUP_NO_MATCH : data do not agree
BUP_NOT_FOUND : file not found
BUP_BROKEN : file is damaged
Function Verifies data written to the backup file.
Saturn System Library User's Guide 47
Title Function Function Name No.
Function specification Expands data and time data BUP_GetDate 10
Format void BUP_GetDate(Uint32 pdate,BupDate *date)
Input pdate : data and time data of directory information
date : date and time table
Output none
Function value none
Function Expands the date and time data in the directory information table.
Title Function Function Name No.
Function specification Compress date and time data BUP_SetDate 11
Format Uint32 BUP_SetDate(BupDate *date)
Input date : date and time table
Output none
Function value Data in date and time data form in the directory information table.
Function Compresses the date and time data in the directory information table.
48
TM
Backup System
Production Standard
Doc. # ST-203-100494
© 1994 SEGA. All Rights Reserved.
Attachment 2: Backup System Creation Standard
(Saturn Version)
This document standardizes the basic functions and terminology related to backup
and, in doing so, establishes a creation standard for realizing a user-friendly envi-
ronment applicable to all software.
1.0 Terminology Standardization
The notations that appear in game screens and instruction manuals are standardized
to the standard terms listed below. Prohibited terms must not be used because they
tend to confuse the user.
Standard Terms for Saturn Backup
For terms related to backup in the Saturn, as a rule, use the terms listed below in
screen displays and in instruction manuals of applicable software. The underlined
terms listed after Previously) are not appropriate for use in games. Use of the double-
underlined terms is strictly prohibited.
Hardware Names
1) Backup RAM
Previously) Backup/RAM/RAM cartridge
(General name referring to both base RAM and cartridge RAM)
2) Base RAM
Previously) Internal backup RAM/internal RAM
3) Cartridge RAM
Previously) Cartridge/backup RAM cartridge/RAM cartridge
Hardware Function Names
1) Multiplayer screen
Previously) Control screen/control panel (in boot ROM)
2) Save Data Control screen
Previously) Backup RAM tool (backup tool in boot ROM)
3) Record/data
Previously) Data/save data/file
4) (Record) name/data name
Previously) Data name/filename
5) Capacity
Previously) Capacity/area/block
6) Used space, empty space/available space
Previously) Number of used blocks, number of empty blocks/free area
Backup System Production Standard 1
Function Names
1) Erase all/erase all records/erase (initialize) all records
Previously) Initialization/format/intialize
Note: Do not use “initialization” except when the media is in its actual unformatted state.
Even in this case, use “Erase (initialize) all records.”
2) Load/read
Previously) Load/read
3) Save
Previously) Save/write/new write
4) Copy
Previously) Copy
5) Erase
Previously) Erase/delete
7) Erase the record and copy/update the record
Previously) Overwrite
8) Update record name
Previously) Rename
9) Backup switching
Previously) Switching/RAM switching/RAM change
Warning Messages
1) was ... correctly
Previously) was ... correctly/was ... normally
2) could not be ... (correctly)
Previously) could not be ... (correctly)/failed/...error
3) cannot be used
Previously) cannot be used/is abnormal/is destroyed/was destroyed
New Terms
1) Comment
Detailed information (represented with up to 10 half-size alphanumeric and/
or kana characters) that adds record content information to the record name.
2) Time information
Record time information indicated by a time stamp.
2
2.0 System Specifications
Figure 2-1 shows the flow of the basic backup system. The processes, functions, and
messages shown in the flow must be incorporated into the backup system.
Initialization
processing
1) Initialization check NG
OK
2) Existing NG
data check
OK
2) Capacity NG
2) Capacity NG check
check
8) Warning message 8) Warning message
processing processing
OK
Save disabled
3) Load processing
Start game
During game
4) Save
5) Comment support
6) Time stamp support
7) Base RAM/cartridge
RAM selection
Note: Flow may differ depending on the application.
Figure 2-1 Flow of basic backup system
Backup System Production Standard 3
1) Initialization check
• Check initialization of base RAM and cartridge RAM.
• Prevent startup if either RAM is not initialized.
The application must always check initialization of the base RAM and the car-
tridge RAM before starting the main game. If either RAM is not initialized, the
application reports the condition to the user and either initializes the RAM di-
rectly or instructs the user to initialize the RAM from the Save Data Control
screen in the Saturn unit boot ROM. The application must not start the game if
either RAM is not initialized. When accessing the backup RAM, always use the
BACKUPRAM BIOS. When formatting the base RAM, cartridge RAM, or ex-
tended memory, always use the SEGASATURN_BACKUP_FORMAT method.
2) Existing data/capacity check
• Check for application data.
• Check empty space.
Before starting the main game, the application checks for data that it can use and
checks the available space for each backup. If the check indicates no data for the
application or insufficient space available, the application displays a warning
message according to the status (see item 8) Warning message.
3) Load
• Check for data corruption/load errors.
When loading data, the application must always check for data corruption. If the
data cannot be used, the application must report the condition to the user and
somehow differentiate the data to show that it cannot be used.
4) Save
• Check for save errors.
• Check available space
• Define record name.
• Define record size.
When saving data, the application checks the available space. If the capacity is
insufficient, the application reports the condition to the player. The application
checks whether the data was written normally. The record names used in save
processing are controlled by Sega. (This is to avoid using the same record names
in a different game.)
Example) Fantasy Star X requires save at three locations:
Location 1: PS_SCENE_00
Location 2: PS_SCENE_01
Location 3: PS_SCENE_02
Only last 3 characters are variable.
First 8 characters are common.
4
Do not use a general name like GM_DATA_000. The characters that can be used
in record names are limited to numbers, uppercase alphabetic letters, and under-
score. The first character must not be a number. File names must be 11 charac-
ters in length. If a file name is less than 11 characters, pad the name with under-
score (_) characters. Do not use spaces. When executing several saves in a game,
fix the first 8 characters of the filename, and use underscore and numbers in the
last three variable characters.
The size of one record must not exceed 256 kilobytes. Records over 256 kilobytes
cannot be copied because the copy function of the Save Data Control screen in
the boot ROM does not support sizes over 256 kilobytes. If the record size ex-
ceeds 256 kilobytes, the application itself must be able to copy the records.
Backup System Production Standard 5
5) Comment support
• Define comment.
• Enter game name in katakana as the default.
Note: The user may be allowed to change the default.
The comment is up to 10 half-size alphanumeric or kana characters. Although
there are no rules on the comment contents, the game name must be entered in
katakana as the default.
6) Time stamp support
• Define time stamp.
• Set file display sequence.
• Always write time stamp.
The time stamp cannot be deleted or changed by the user. The files are displayed
in reverse chronological order based on the time stamp (file with the latest save
date is displayed first).
7) Selection of base RAM/cartridge RAM
• Always support both RAMs.
Note: The position of the selection within the processing sequence is not defined.
The application must be able to read backup data directly for both the base RAM
and the cartridge RAM. The creation standard does not specify where this pro-
cess should take place in the processing sequence.
8) Warning messages
The following warnings must be incorporated into the application to support the
specifications described in items 1) to 5).
• Initialization check warning (during startup).
• New save disabled warning after game is started (during startup).
• Save disabled warning (during startup).
• New save disabled warning during game (during save/copy execution).
• Load/save/copy/erase/initialization failure warnings (after execution of each process).
• File corruption warning (during load execution).
• Display of backup space used by application (When new save is disabled after a game is
started or during a game).
• Warning instructing the user not to turn off the power during save execution.
6
3.0 Sequence and Warning Message Examples
This section gives sequence and warning message examples for each process. Refer
to these examples and, if possible, implement them to create a user-friendly system.
1) Initialization check and existing data/capacity check
Initialization check
Initialization
processing
Is backup Display warning Initialization
initialized? No processing? Yes
message (1)
Yes No
Go to Save Data
Was game backup Control screen
No
data already saved?
Yes
Is there enough free Is there enough free No
space to play game? space to play game?
No Display warning
Yes message (3)
Yes
Display warning Continue selection
message (2) disabled processing Save disabled No
processing?
Yes
Go to Save Data
Save disabled Control screen
processing
Start
game
Figure 2.2 Initialization processing sequence
<Warning message (1)>
If either the base RAM or the cartridge RAM is not initialized, the game cannot be
started. After displaying the warning, the application should initialize the target
ROM or instruct the user to switch to the Save Data Control screen in the Saturn unit
boot ROM and execute RAM initialization.
Backup System Production Standard 7
“Base RAM (cartridge RAM) is not ready for backup (has not been initialized).” (*1)
“All records in base RAM (cartridge RAM) will be erased (initializing). Yes/No?” (*1)
“All records in base RAM (cartridge RAM) were erased (initialized).” (*1)
“All records in base RAM (cartridge RAM) could not be erased (initialized).” (*1)
“Erase (initialize) all records from Sega Saturn’s Save Data Control screen.” (*)
“To switch to Sega Saturn’s Save Data Control screen, hold down the L or R button and
press Reset.”
*1 Always place the word “initialize” in parentheses. Using the word by itself is prohibited.
<Warning message (2)>
Space for saving the new data cannot be reserved. The user must be informed that
the only way to save the new data is to sacrifice an existing record. (At the start of a
new game or the continuation of a game, the new record cannot be saved unless an
earlier record is erased or updated.) Information on the capacity used by the game
must be displayed at the same time.
“Not enough free space to store new record. If game is started, new record cannot
be saved unless previous record is erased.”
“*** of empty space required to save new record.”
“From Sega Saturn’s Save Data Control screen, erase other game records or copy
other records to cartridge RAM, then restart the game. To display Sega Saturn’s
Save Data Control screen, hold down the L or R button and press Power or Reset.”
<Continue selection disabled processing>
The game cannot be continued because there are no game records (initial status
immediately after the software is purchased). Include processing that prevents the
user from selecting continue or skips the Game Data Selection screen (load screen).
<Warning message (3)>
There is no game data and no empty space. In other words, the save function cannot
be used at all. Even in this condition, the user must be allowed the option of playing the
game (of course, the save function cannot be used). Information on the capacity used by
the game must be displayed at the same time.
“If the game is started in this condition, the record cannot be saved. Start the game?
Yes No”
“*** of empty space required to save a game record.”
“From Sega Saturn’s Save Data Control screen, erase other game records or copy
other records to cartridge RAM, then restart the game.”
“To switch to Sega Saturn’s Save Data Control screen, hold down the L or R button
and press Power or Reset.”
8
2) Load, save
Data load
Backup selection
by user
Data selection
by user Display warning
message (4)
Data load
Is data normal? Abnormal
Normal
Start game
Figure 2-3 Load processing sequence
<Warning message (4)>
An error has occurred during load processing. This type of warning message is
issued if data becomes corrupt or if read fails (probability is very small). The warn-
ing message must inform the user that the data could not be loaded and the record
cannot be used.
“Record could not be read correctly.”
“Load failed.”
“Game cannot be started with this record.”
“This record cannot be used.”
Note: Do not use the expression “is destroyed.”
Backup System Production Standard 9
Data save
Backup selection
by user
Save location
selection by user Display warning
message (5)
Available
space check NG
OK
Display warning
message (6)
Data save
Was data
written normally? No
Yes
Continue or
end game
Figure 2-4 Save processing sequence
10
<Warning message (5)>
An error has occurred during save processing. This type of warning message is
issued if the capacity is full and data cannot be saved or if write fails (probability is
small). If the capacity is full, the warning message must display information on the
capacity used by the game.
“*** of empty space is necessary to save a record for this game.”
“From Sega Saturn’s Save Data Control screen, erase other game records or copy
other records to cartridge RAM, and then restart the game.”
“To switch to Sega Saturn’s Save Data Control screen, hold down the L or R button
and press Power or Reset.”
“The record could not be saved correctly. Re-execute the save.”
<Warning message (6)>
This warning instructs the user not to turn off the main unit power during save
processing. This message should be displayed at an appropriate location in the
game sequence and clearly written in the instructions manual.
“Saving a game record. The record may not be saved correctly if the power is turned
off.”
Translator’s Notes
1. For some of the terms listed on page 2, two Japanese terms have
the same English translation. In such cases the English word was
listed only once.
Example
(Japanese)
3) Save/save
Previously) Save/save/write/new write
(Translation)
3) Save
Previously) Save/write/new write
Backup System Production Standard 11
TM
SATURN
Software Library
Release 3.01
Supplemental Disk
Doc. # ST-208-110194
© 1994-95 SEGA. All Rights Reserved.
==================================================================
SATURN Software Library (Release 3.01 Supplemental Disk)
1. Supplemental Explanation
This disk (Rel. 3.1) contains libraries and tools which have been upgraded from Software
Library Rel. 3 and debugged. Since this disk is configured the same as the Rel. 3 directory
structure, it updates and adds libraries and tools when it is installed after Rel. 3 has been
installed (unwound).
Note: In this instance the sound driver has been placed in the SATURN\SEGADRV directory.
2. Library Upgrade/Debug History
All versions of Rel. 3 were provided in Ver 1.01, but the versions of Rel 3.1 which are provided
here are different for each library. Subject matter applicable to each library will be discussed
next.
2.1 SPRITE Library (SEGA_SPR.LIB er
V 1.02)
Ver 1.01->Ver 1.02 Changes
· Correction of allocBlock Function (private function) defect.
2.2 Scroll Library (SEGA_SCL.LIB er
V 1.03)
Ver 1.01->Ver1.02 Changes
· Correction of SCL_SetAutoCol Mix function defect.
· Correction of SCL_VblankEnd function defect.
Ver 1.02->Ver 1.03 Changes
· Correction of SCL_SetConfig function defect (error in rotation scroll plane setting.)
Correction of defect whereby garbage comes out in last line during x-axis revolution and
y-axis revolution.
2.3 Sound Library (SEGA_SND.LIB er
V 1.03)
Ver1.01->Ver 1.02 Changes
· Correction of SND_Init function memory zero clear part defect.
· Correction of SND_SetCdDaLev function parameter processing defect.
· Correction of PCM PAN setting defect.
· Deletion of SND_StartPcm function PCM start offset setting.
Ver 1.02->Ver 1.03 Changes
· Internal specification change due to DMA library change (Ver 1.02 and later).
2.4 File System Library (SEGA_GFS.LIB, SEGADGFS.LIB erV1.15)
Version upgrade from er
V 1.01 to Ver 1.10
· Changes and cautions regarding how to use SCU-DMA (Transfer Mode GFS_TMODE_SCU).
· Additions to CD-DA file processing functions.
· File attribute changes.
· (GFS_GetFileInfo function output files are to conform to CD-ROM XA standard).
· GFS_Init function and GFS_LoadDir function function value change.
· Error code additions (GFS_ERR_BFUL, GFS_ERR_FATAL).
· Additions to tray open condition recognition methods.
· Changes in transfer mode depending on transfer destination address.
SATURN Software Library 1
· Debug file related changes
Commonality of GFMC_base definitions and changes in file identifiers.
(Changes from Ver 1.10 to Ver 1.11)
· Changes in GFS_MwCdRead usage methods.
· Access completion check (when GFS_NwCdRead is called) specification changes.
(Corrections from Ver 1.11 to Ver 1.13)
· Correction of defect whereby read errors occur when the CD buffer is FULL during play.
(Corrections from Ver 1.13 to Ver 1.15)
· Correction of unwanted time out error defect.
2.5 Stream Library (SEGA_STM.LIB) er
V 1.13
Version upgrade from er
V 1.10 to Ver 1.11
· STM_Init function specification changes.
· Additions to STM_OpenFid function and STM OpenFrange function arguments.
· Additions to STM_SetTrBuf function arguments.
· STM_SetLoop function specification changes (loop play / no play).
· Changes in specifications for when error codes are passed to error function second argu-
ments.
· Changes in operation during loop play.
· Changes in specifications for transfer area settings.
· Even debugging is possible with sega_stm.lib.
(Changes from Ver 1.10 to Ver 1.11)
· Correction of defect in operation whereby fetch functions return (-1) or (0)
· Correction of defect whereby a back stream is opened immediately before the end posi-
tion of the play range, and drive play mode FAD no longer changes.
(Changes from Ver 1.11 to Ver 1.12)
· Correction of defect whereby there is movement to a loop stream if there is a buffer full in
mid-play range.
(Changes from Ver 1.12 to Ver 1.13)
· Correction of defect whereby file access denial occurs if STM_SetExecGrp(NULL) is
executed.
2.6 DMA Library (SEGA_DMA.LIB) eVr 1.03
Changes from V
er 1.01 to Ver 1.02
· Correction of defect whereby debug programs are mixed in with sega_dma.lib and debug
information is added to them.
· Correction of defect whereby an interrupt status register which cannot be used by the
hardware is used.
Changes from V
er 1.02 to Ver 1.03
· DMA parameter mask item contents described in the manual were wrong.
· Correction of DMA_ScuResult function defect.
· Re-registration of vectors saved during DMA end interrupt processing for each channel
has been added.
· Correction of DMA parameter mask constant value defect
(Low level SCU DMA functions and low level CPU DMA functions).
· Deletion of DMA_ScuAIIStop function.
· Deletion of DMA_ScuStop function.
· Change in specifications allowing DMA end interrupt mask registers which correspond
to the channels used when low level SCU DMA is used.
2
2.7 Peripheral Libraries (SEGA_PER.LIB) Ver 1.02
Changes from V
er 1.01 to Ver 1.02
· Correction of defect in X and Y mouse movement amount data obtained.
· Correction of mouse digital device information defect.
2.8 V-BLANK Sample Programs
Changes
A change has been made whereby the SCL_VblankEnd function in the UsrVblankEnd
function is performed at the top. (When pad data acquisition processing is heavy, it is
possible that instances may arise of frame changes not being issued)
[Addendum]
Please be sure to refer to all documentation in <SATURN\SEGALIB\MAN> for details
about version upgrades.
3. Sound Driver Version
Sound drivers were provided in Release 3 under the file name of SDDRVS.TSK (Ver 1.11) in
<SATURN\SEGASMP\SND, but in this release they are provided in the
<SATURN\SEGADRV) directory.
3.1 Sound Driver Version
Sound drivers are now provided in Version 1.24. In this version, the generation format
(compression program) in the Convert Standard MIDI File of the SoundSimulator (supple-
mentary) and the SoundDriver (thawing program) have been changed in order to reduce the
sequence play load from Ver 1.2x.
For that reason, although sequence play load has been lightened, compatibility with the Ver
1.1x sequence format has been lost. Run the Convert Standard MIDI File in SoundSimulator
Ver 1.24 or later or M6CNV 2 BIN OUT, and rewrite the Sequence Bank in Make Sequence
Bank.
[Supplememt]
SoundSimulator Ver 1.24 now includes the M6CNV 2 BIN OUT tool in the SEGA sound tool
(Macintosh Version) upgrade.
3.2 Sound driver Upgrade/Bug Fix (Debug) History
Changes from V
er 1.11 to Ver 1.12
· Noise during the PCM stream play LOOP has been corrected.
· Irregularities during PCM stream play stereo play have been corrected.
· Irregularities in PCM stream play PAN control have been corrected.
Changes from V
er 1.12 to Ver 1.13
· Irregularities in PCM Play Address upgrading during PCM stream play have been
corrected.
· Correction of defect whereby operation continues even though there are no bank
changes in sequence data. (In this and subsequent versions, no sound is generated if
bank changes are not correctly included in sequence data.)
Changes from V
er 1.13 to Ver 1.14
· The fault whereby the PCM Play Address was not properly upgraded during multiple
channel simultaneous play has been improved.
SATURN Software Library 3
Details of Version Upgrade from er
V 1.14 to Ver 1.24
· Sequence data format change. (Sequence data must be converted.)
· Support for tempo change in the loop during sequence play.
· Improvement of time lag during tempo track play in sequence play.
[Addendum]
For details, please be sure to refer to MANSDRV.DOC in <SATURN\SEGADRV\MAN)
4. CD Tool Upgrade
4.1 CD Development T
ools
Be sure to use the CD tools provided in this and later versions. For details about these, refer
to the Virtual CD System User’s Manual Ver1.00. (Release 3.)
4.2 VCDEMU.EXE (Ver 1.72)
Virtual CD Emulator
• Corrections from Ver 1.5x to Ver 1.70
Implementation of multi-index and scan play.
Scan play valid in real time emulation mode only.
• Improvements from Ver 1.70 to Ver 1.71
Correction of defect during CD tray OPEN/CLOSE.
• Improvements from Ver 1.71 to Ver 1.72
Correction of defect whereby the wrong file is obtained during DOS file retrieval in direct
DOS mode. Correction of defect whereby row numbers are displayed as a minus in the
upper right part of the screen. Correction of defect whereby the Lsn value is displayed as
a minus during display of REL information sub-menus.
[Restrictions]
File interleave in direct DOS file access is not supported in this version
[Cautionary Items]
In order to operate VCDEMU.EXE Ver 1.7x and later versions, virtual CD board ROM must be
replaced by Ver 3.2.
4.3 VCDPRE.EXE and VCDBUILD.EXE (V
er 3.04)
Corrections of the Disk configuration information file creation tool and CD image file creation
tool.
Corrections from er
V 2.11 to Ver 2.16
· Corrective measures that without fail put directory code at the top of the sectors when
directory files straddle multiple sectors because the number of files is very large.
· Designed to suspend processing when there is more than one file of the same name.
· Corrective measures were implemented for faults during directory configuration.
· I/O buffer was expanded to 32K bytes and speed increases of 2-6 times were implemented.
Corrections from er
V 2.16 to Ver 3.02
· This is a DOS extender (DOS/4G) version, and operation was confirmed up to a file num-
ber limit of approximately 10,000 files (in machines loaded with 8M bytes of memory).
· An error in the directory code position was corrected.
· An audio data TOC position slippage fault in the CDDA track was handled.
4
Corrections from er
V 3.02 to Ver 3.03
· A defect in the directory path table was improved.
Corrections from er
V 3.03 to Ver 3.04
· A fault whereby file positions became incorrect when directories were defined after track
designation was handled.
[Cautionary Item]
In Ver 1.xx and Ver 3.xx (including Ver 2.XX) script file entry methods were changed. Persons who
have been using Ver 1.xx up to now should change their script files. Please see the examples of script
entry in 4 - 8.
4.4 VCDUTL.EXE (Ver 1.00)
From this version on, a tool for partial upgrade of image files is provided.
4.5 VCDMKTOC.EXE (Ver 1.22)
Tool for creating TOC information files for write-once CDs.
4.6 SWAP.EXE (Ver 1.00)
From this version on, a program for Endian conversion of CDDA data will be provided.
4.7 SEGACDW.EXE (Ver 1.00 Rel 1.00)
CD writer command. (There is no upgrade.)
4.8 Script Description Examples (EXSAMPLE.SCR, JVC.SCR, BTSMPFS.SCR)
These are examples of new script files for VCDPRE Ver2.xx and Ver 3.xx. Refer to them
when changing (EXSAMPLE.SCR) scripts, etc. The script files provided in the software
libraries (JVC.SCR and BTSMPFS.SCR) have been changed to the new script files.
[Addendum]
Substitution of EPROM (Ver 3.2) for virtual CD I/F board.
The defect whereby CD-DA data on virtual CDs cannot be played by multiplayers has been
improved.
*****************************************************************************************************
SATURN Software Library 5
• readme.doc classification : Development explanation files for each library
• File symbol name : MANGFS.DOC
• Relevant library symbol name : gfs
• Relevant library name : File system
• Version : 1.15
• Creator : M. S.
• Creation date : 10-19-1994
• Other messages : none
*****************************************************************************************************
1. Supplemental Explanation
1.1 DOS File Parameters
“1” is the initial value for DOS file fetch parameters. Because of processing constraints, only
one sector can be transferred at a time, thus fetch parameters are invalid if set to any value
except 1.
2. Changes from V1.10 to V1.1
1
2.1 Items RequiringAttention when using SCU-DMA
When the transfer mode is GFS_TMODE_SCU, the file system libraries use the DMA library
to activate SCU-DMA. The level used is 0. Thus in GFS_Init, SCU-DMA level 0 interrupt is
enabled by INT_ChgMsk. When using transfer mode GFS_TMODE_SCU, refer to the DMA
library documentation.
3. Changes from V1.01 to V1.10
3.1 CD Pre-read Processing Changes
Change in how GFS_NwCdRead is used
After GFS_NwCdRead is called, pre-read from the CD becomes effective even if
GFS_NwExecOne is not called. When pre-read from the CD is used, either the designated
number of sectors are all transferred to the host or the operation could not be completed until
access is stopped. (GFS_NwIsComplete does not return true.)
Access Completion Check [Important]
When GFS_NwCdRead is called, either data transfer ends or GFS_NwExecOne does not return
completion. Do not wait for GFS_NwExecOne to return completion without calling
GFS_NwFread. As shown in the example on Page 18 of the Release 2 Manual, caution must be
exercised, since an infinite loop results if you wait for completion of NwExecOne immediately
after GFS_ExecOne.
If GFS_NwCdRead is not called, completion of GFS-NwExecOne can be checked by the same
procedure as in the previous version. When pre-reading from the CD, also perform a completion
check by using GFS_NwGetStat to monitor the transfer complete byte at the same time.
6
The following shows an example of this:
#define RD_UNIT 10
GfsHn gfs;
Sint32 fid, stat, nbyte;
Uint32 buf[RD_UNIT*2048/4];
gfs = GFS_Open(fid);
GFS_NwCdRead (gfs, 100);
for (I = 0; I < 100/RD_UNIT; ++I) {
GFS_NwFread (gfs, RD_UNIT, buf, RD_UNIT*2048);
while (GFS_NwExecOne (gfs) != GFS_SVR_COMPLETED {
GFS_NwGetStat (gfs, &stat, &nbyte);
/* Check whether the number of bytes designated by GFS_NwFread
has been read */
if (nbyte >= RD_UNIT*2048) {
break;
}
user ();
}
}
3.2 Addition of CD-DAFile Processing Function
A CD-DA file processing function has been added. A CD file read is played on the music
track which is designated by that file. However, for sound output SCSP must be set by the
application.
File Control
The only control which the file system exercises over the CD-DA files is that of play and
play range. The play mode is a default value (no repeat, move pickup).
How to Play
The following are methods of playing CD-DA files:
(1) GFS_Load
(2) GFS_Fread
(3) GFS_NwFread
(4) GFS_NwCdRead
In Methods (1) and (2) there is no return until play is ended. In methods (3) and (4) a server
function must be called. When CD-DA play ends, the server function returns
GFS_SVR_COMPLETED.
GFS_Seek is used to play from mid-disk. CD-DA files and CD ROM files cannot be simulta-
neously accessed.
Parameters for File Operation
Fetch mode, transfer mode, read parameters and fetch parameters cannot be changed for
CD-DA files. If the following functions are called for CD-DA files, an error is returned.
GFS_SetGmode GFS_SetTmode
GFS_SetReadPara GFS_SetTransPara
SATURN Software Library 7
3.3 File Attributes
In order to make file attribute values output by GFS_GetFileInfo, conform to the CD-ROM
XA standard. The following changes have been made:
GFS_ATR_DIR 0x80
GFS_ATR_CDDA 0x40
GFS_ATR_INTLV 0x20
GFS_ATR_FORM2 0x10
GFS_ATR_FORM1 0x80
GFS_ATR_END_TBL 0x01
GFS_ATR_CDDA was added to provide an additional CD-DA file processing function. Its
bit when it is a CD-DA file is 1. The names and meanings of other constants remain un-
changed.
3.4 GFS_Init and GFS_LoadDir Functionalues
V
If NULL is set to the argument directory information control structure pointer, individual
units of directory information held by the CD block file system are returned as function
values.
3.5 Error Code Additions
The following error codes have been added.
GFS_ERR_BFUL
This error code occurs when the CD buffer becomes full during resident mode
(GFS_GMODE_RESIDENT) file reads. Access order and the like should be adjusted so that
a buffer full condition does not occur during resident mode file access.
GFS_ERR_FATAL
This error code is a notification that the CD drive is in a FATAL condition. If the file system
detects this condition, it stops CD play (seeks home position) and tries to effect recovery
from the error condition. If this error code is detected, retry processing.
3.6 Recognition of T
ray Open Condition
When the CD block interrupt factor register (HIRQREQ) DCHG bit (bit 5) is 1, this is also
handled as an open tray condition. During development, confirm that the CD status is not
open and perform processing to clear the DCHG bit. Since in the BOOT ROM clears the
DCHG flag in the product version, the application must not clear it.
3.7 Transfer Mode ChangesAccording to T
ransfer DestinationAddress
Even if transfer mode is set to GFS_TMODE_SCU, when the transfer destination address is
contained in the following spaces, software transfer is forcefully performed by the CPU.
WORKRAM-L space 00200000H - 002FFFFFH
A-BUS space 02000000H - 058FFFFFH
8
3.8 Debug File Related
GFMC_base
The variable GFMC_base, which sets the top address of SIMM files, is defined in both
sega_gfs.lib and segadgfs.lib. The GFMC_base in sega_gfs.lib exists solely for the sake of
compatibility with segadgfs.lib. It has no effect on file system operation.
File Identifiers
The function which automatically added “.” and “..” (current directory and parent directory)
when CD files were not being used has been deleted. Accordingly, file identifiers are the
same as when booted.
4. Bug Correction Information
4.1 Corrections from V1.1
1 to V1.13
The bug when there was a read error (GFS_ERR_CDRD) if the CD buffer became full during
play has been corrected.
4.2 Corrections from V1.13 to V1.15
The bug when there was an unwanted time out error (GFS_ERR_TMOUT) was corrected.
SATURN Software Library 9
***********************************end of file************************************************
• Document Classification : 3rdSTEP (08-22-94) -> 3rdSTEP
(10-12-1994) Changes
• Relevant library symbol name : dma
• Relevant library name : DMA
• Version : 1.03
• Creator : N. T.
• Creation date : 10-12-1994
• Other messages : none
***********************************************************************************************
////////////////////////////////////////////////////////////
Cautionary Items when moving to a changed version
////////////////////////////////////////////////////////////
! ! IMPORTANT ! !
Be sure to recompile user programs which include header files, as the
header files will have changed.
////////////////////////////////////////////////////////////
History of Changes
////////////////////////////////////////////////////////////
• 09-23-1994 Ver 1.02
• 10-12-1994 Ver 1.03
////////////////////////////////////////////////////////////
Details of Changes
////////////////////////////////////////////////////////////
Corrective Action
Corrective action for defects in 3rdSTEP has been taken as follows. The following defects
were all “SCU” DMA.
1. Correction of defect whereby debug programs were mixed in and debug information
was added to the sega_dma.lib.
<Nature of Defect>
A debug program was mistakenly mixed into the sega_dma.lib. This debug program was
writing in the neighborhood of address 6060000. Additionally, since /deb was designated
to compile options, debug information was added, and the sega_dma.lib became larger
than necessary.
<Corrective Action>
(1) Compiling was redone
(2) dma.bat dma.mk was properly corrected
2. Correction of defect whereby an interrupt status register which cannot be used by the
hardware is used.
10
<Nature of Defect>
An interrupt status register which could not be used by the hardware was being used inside
the library. (Because of the timing of the writes to the interrupt status register, there were times
when interrupt signals could not be received. This is forbidden from a hardware standpoint.)
<Corrective Action>
Measures were taken so that the interrupt status register would not be used in the library, and
the use of interrupt processing was substituted in its place. Because of this, the following
specification changes have taken place in the DMA library. Since DMA end interrupt process-
ing is used in the DMA SCU library, when DMA SCU is executed in V-BLANK IN interrupt
processing and the like and in interrupt processing with a higher order of priority than DMA,
it waits for the end of DMA until the end of interrupt processing with the high order of prior-
ity. The following are two ways of preventing this wait:
(1) Do SCU DMA in the main process
(2) Change the order of interrupt priority
The recommended method of interrupt priority order per (2) above is discussed separately.
<Specification Changes>
(1) SCU DMA high level
The following function specifications have been added:
+—————————————————————————————————+
| Function Specification | SCU DMA initialization | DMA_ScuInit |
+—————————————————————————————————+
Syntax void DMA_ScuInit(void)
Input none
Output none
Function value none
Action Initializes SCU DMA. Must be performed before execution of
DMA_ScuCopyMem () and DMA_ScuResult ()
!! Caution!!
DMA mode 0 transfer end interrupt processing is used by SCU DMA. Therefore, do
not change the interrupt mask register of the DMA mode 0 transfer end interrupt.
(2) SCU DMA low level
The following function specifications and data specifications have been added.
+—————————————————————————————————+
| Function Specification | Get DMA Status | DMA_ScuGetStatus |
+—————————————————————————————————+
Syntax void DMA_ScuGetStatus (DmaScuStatus *status, Uint32 ch)
Input ch : Input channel
Output status : status pointer
Function value none
Action Gets status of the designated DMA channel
!! Caution!!
There was a similar function in 2ndSTEP. However, it differs with this version as shown on
the next page.
SATURN Software Library 11
DmaScuStatus structure members and dxbk (DMA interruption flag) . dxwt (DMA wait
flag) have been deleted.
+————————————————————————————————+
| Data Specification | Status | DMAScuStatus |
+————————————————————————————————+
Status is structured as shown below.
struct {
Uint32 dxmv;
}
The constants which can be used by each of these members are shown below.
dxmv /* DMA operation flag */
+————————————————————————————————+
| Constant | Explanation |
+————————————————————————————————+
| DMA_SCU_MV | In operation |
| DMA_SCU_NO_MV | Not in operation |
+————————————————————————————————+
////////////////////////////////////////////////////////////
Corrective Action
Corrective measures have been taken for Ver 1.02 (09-30-1994) as shown below.
• Common
1. A DMA parameter mask item description in the manual was wrong.
<Defect>
The manual wrongly stated, “Bits which designate a DMA mask constant do not make
settings to registers.”
<Corrective Action>
The text should be corrected to read, “Bits which do not designate a DMA mask constant do
not make settings to registers.”
• High Level SCU DMA
1. Even when DMA_ScuResult () is executed before SMA_ScuMemCopy, a correct value is
not returned.
<Defect>
Even when DMA_ScuResult () is executed before SMA_ScuMemCopy, a correct value is not
returned.
<Corrective Action>
Make corrections to return a correct value.
12
• Low Level SCU DMA
1. The DMA end interrupt vectors are not returned to the origin.
<Defect>
When DMA starts, DMA end interrupt vectors are saved. However, after DMA ends, the
saved vectors are not re-registered.
<Corrective Action>
Vectors saved during end interrupt processing for each channel are re-registered.
2. DMA Parameter Masks cannot be correctly designated.
<Defect>
Settings to DXR (read address register) were made unconditionally without relation to the
settings of DMA parameter mask constants.
<Corrective Action>
Mask constants have been properly changed.
3. DMA_ScuAIIStop existed in the library even though it could not be used by the hardware.
<Defect>
The DMA forced end register used by DMA_ScuAllStop existed in the library even though its
use is prohibited because of hardware limitations.
<Corrective Action>
This function was deleted.
4. DMA_ScuStop existed in the library even though it could not be used by the hardware.
<Defect>
DMA_ScuStop existed even though it had no hardware functions.
<Corrective Action>
This function was deleted.
• Low Level CPU DMA
DMA parameter mask cannot be properly designated
<Defect>
Settings were made unconditionally to PR (priority mode) without regard to settings of DMA
common parameter mask constants. In addition, settings were made unconditionally to SAR
(DMA source address) without regard to settings of DMA parameter mask constants.
<Corrective Action>
Mask constants were properly changed.
Additions to Manual
Low Level SCU DMA
DMA end interrupt mask registers which correspond to the channels in use when low level
SCU DMA is used must be permitted.
Correction of Sample Program
It has been changed so that it will operate in his version.
SMPDMA10.C SMPDMA12.C
************************************** end of file **********************************
SATURN Software Library 13
****************************************************************************************************
• Document Classification : 3rdSTEP (08-22-94) -> 3rdSTEP (10-12-1994) Changes
• Relevant library symbol name : snd
• Relevant library name : Sound l / F
• Version : 1.03
• Creator : N. T.
• Creation date : 10-12-1994
• Other messages : none
****************************************************************************************************
////////////////////////////////////////////////////////////
Cautionary Items when moving to a changed version.
////////////////////////////////////////////////////////////
! ! IMPORTANT ! !
Be sure to recompile user programs which include header files, as the
header files will have changed.
////////////////////////////////////////////////////////////
History of Changes
////////////////////////////////////////////////////////////
• 09-23-1994 Ver 1.02
• 10-12-1994 Ver 1.03
////////////////////////////////////////////////////////////
Details of Changes Ver 1.02
////////////////////////////////////////////////////////////
Corrective Action
The following measures were taken to correct defects in 3rdStep.
1. Corrective action for defect in SND_Init () memory zero clear part.
The part which was mistakenly using memcpy was changed to memset.
2. Corrective action for SND_SetCdDaLev () parameter processing defect.
There was a defect whereby in the manual parameter (0 - 7) settings CD-DA sound
was not output. This was corrected by designating manual parameters so that sound
can be output.
3. Corrective action for PCM PAN setting defect
There was a defect whereby the PAN setting in SND_StartPcm () could not swing to
the right. This is a sound driver defect. Sound driver Ver 1.12 should be used. (The
08-22-94 sound driver is Ver 1.11)
Specification Changes
The following specification changes have been made starting with 3rdSTEP.
1. Deletion of SND_StartPcm () PCM start offset setting.
The PCM start offset setting function has been deleted.
14
Other
A CD-DA and PCM stream simultaneous play sample program has been added. This is
SMPSND5. SMPSND4 has been restructured.
////////////////////////////////////////////////////////////
Details of Changes Ver 1.03
////////////////////////////////////////////////////////////
Specification Changes
(Ver 1.10 [08-22-1994 -> Ver1.02[09-30-1994]) The internal specifications of the sound l/F
library have been changed. The external specifications have also been partially changed.
Details of these changes are shown below.
Internal Specification Changes
DMA_ScuInit (), which is a SCU DMA high level initialization function in SND_Init(), has
been added. Since DMA_ScuInit () cannot be executed in interrupt processing, SND_Init ()
should be made so that it does not execute in interrupt processing.
External Specification Changes
• SND_Init should not be executed in interrupt processing. (For details, see internal
specification changes.)
• When interrupt priority is the default, SND_MoveData () should not used in interrupt
processing. In order to use it in interrupt processing, interrupt priority should be
changed so that DMA end interrupt can be used in interrupt processing. Use the system
library to change interrupt priority. An example is shown in the sound sample program
(SMPSND4).
Additions to the Manual
Access to Sound Memory
Frequent access of the sound memory is prohibited. If there is frequent access of the sound
memory by the host, the sound driver ceases to operate because it cannot see that memory.
(Example) SND_StartSeq (1,0,0,0):
while(SND_SEQ_STAT_MODE(status) == SND_MD_STOP {
SND_GetSeqStat(&status, 0);
}
In the above example, there is the possibility of a permanent loop. The reason for this is
that, because the host frequently accesses the status memory, the sound driver cannot write
a STOP sequence to the status memory even though the sequence has ended.
Corrections to Sample Programs
SMPSND3.C
This sample will be deleted. The reason for this is that the interrupt status register used in
this sample can no longer be used as a result of SCU hardware limitations.
SMPSND4.C
Interrupt priority has been changed, and SND_MoveData () was changed so that it can be
used in sound request interrupt processing.
SATURN Software Library 15
SMPSND5.C
• CDC_Init () Parameter change
Changes were made because of CDC library limitations. The parameters were made as
follows: CDC_Init (0x00, 0x00, 0x05, oxof);
• Interrupt priority was changed, and SND_MoveData () was changed so that it can be
used in sound request interrupt processing.
********************************** end of file****************************************
16
*********************************************************************************************
• File symbol name : manstm.doc
• Relevant library symbol name : stm
• Relevant library name : Stream System Library
• Version : 1.13
• Creator : N. T.
• Creation date : 10-07-1994
• Other messages : none
*********************************************************************************************
Cautionary Items for Stream System Libraries Ver 1.10 and Later
1. Function Specification Changes
Functions in versions preceding Ver 1.01 should be replaced as follows:
(a) STM_Init ()
Uint8 work[STM_WORK_SIZE(12, 24);
·
·
stm_Init (12, 24, work);
(b) STM_OpenFid(grp, fid. &key), STM_OpenFrange(grp, &frange, &key)
STM_OpenFid(grp, fid, &key, STM_LOOP_READ);
STM_Open Frange(grp, &frange, &key, STM_LOOP_READ);
(c) STM_SetTrBuf(stm, buf, BUF_SIZE)
STM_SetTrBuf(stm, buf, BUF_SIZE, STM_UNIT_WORD);
(d) STM_SetLoop(grp, stm)
When a loop is played STM_SetLoop(grp, stm, STM_LOOP_ENDLESS),
When a loop is not played STM_SetLoop(grp, stm, 1);
(e) Error code is passed to error function second argument
2. Operation During Loop Play
When pickup reaches the play range terminator, operation differs as shown below:
Pickup reaches the play range terminator
Before Ver. 1.01 Ver. 1.01
+ +
Pauses until completion of all Moves pickup to loop
data fetches in CD buffer. stream and begins play.
Makes status Resets fetch destination as soon as
STM_EXEC_COMPLETED the designated number of times
and resets fetch destination. STM_SetLoopmakes a loop.
Moves pickup to loop stream Makes the status of
and begins play. STM_EXEC_COMPLETED.
SATURN Software Library 17
The program on the left which was written for Ver 1.01 can be made to operate in the same
way regardless of the previous changes by inserting STM_SetLoop(grp, STM_LOOP_DFL,
1) as shown on the right.
grp = STM_OpenGrp (); grp = STM_OpenGrp ();
stm = STM_OpenFid(grp, FID1, &key); stm = STM_OpenFid(grp, FID1, &key,
STM_SetTrBuf(stm, buf, BUFSIZE1); STM_LOOP_READ);
STM_SetExecGrp(grp); STM_SetTrBuf(stm, buf, BUFSIZE1,
for (i = 0; i < LOOPMAX; ) { STM_UNIT_WORD);
stat = STM_ExecServer (); STM_SetLoop(grp, STM_LOOP_DFL, 1);
if (stat == STM_EXEC_COMPLETED) { STM_SetExecGrp(grp);
i++ for (I = 0; I < LOOPMAX; ) {
} stat = STM_ExecServer ();
user (); if (stat == STM_EXEC_COMPLETED) {
} i++;
STM_SetLoop(grp, STM_LOOP_DFL, 1);
}
user ();
}
3. Prior to Ver 1.01, when transfer area setting → transfer function registration → transfer
function cancellation was done, the next transfer destination was the initially registered
transfer area, but in Ver 1.10 transfer areas must be reset. Moreover, the maximum
number of transfer sectors and the transfer mode revert to the default status.
4. In order to use the stream system, the file system and CD communication interface must
be linked.
5. All files in CD-ROM, virtual CD, SIMM, SCSI can be handled by sega_stm.lib. However,
linked file system libraries must be properly used.
6. There is a change in sega_stm.h. Source files which include sega_stm.h should all be
recompiled.
7. Cautionary items
(a) If the stream is closed immediately after the close fetch function of the stream which
registers the fetch function has returned (-1), it is continuously called until the fetch
function returns a value of 0 or greater. When the fetch has ended, a value of 0 or
above should be returned.
8. Bug corrections in Ver 1.10 and later
The following corrections are being made in the file system and settings. File system
Version 1.11 should be used.
(Ver 1.11)
· Correction of the defect where fetch functions sometimes return (-1) or (0).
· Correction of the phenomenon whereby a back stream is opened immediately before the
end position of the play range, and drive play mode FAD no longer changes
(Ver 1.12)
· Correction of the phenomenon whereby if the buffer becomes full in mid-play range, the
system moves to a loop stream.
(Ver 1.13)
· Correction of the phenomenon whereby file access denial because of a runaway/infinite
loop/file system occurs if STM_SetExecGrp(NULL) is executed.
*********************************** end of file ******************************************
18
**********************************************************************************************
• File symbol name : MANSCL.DOC
• Relevant library symbol name : stl
• Relevant library name : VDP2 Library
• Version : 1.03
• Creator : K. M.
• Creation date : 10-25-1994
• Other messages : none
**********************************************************************************************
Differences from 2ndStep Libraries (Ver 0.90)
Basically, it is compatible at the source code level. By recompiling them, applications written
in 2ndStep can be operated as they are. However, caution is required in the following cases:
· Table initialization functions are not used.
[Corrective action] Initialize regarding the newly added table item.
· When memcopy() is used:
[Corrective action] Change the function name to SCL_Memcpyw (). If the register, color
RAM and the like are not in an area in which a transfer cannot be made, it can be replaced
with the C language function memcpy ().
• Five Newly Added Functions
· SCL_SetRotateCenterDis ()
Sets center point when making revolving scroll surfaces revolve on the screen.
· SCL_SetCoefficientData ()
Sets enlargement and reduction data to the revolve parameter coefficient table.
· SCL_DisableBlur ()
Disables shading operations.
· SCL_DisableLineCol ()
Disables line color screen.
· SCL_AboreAutoVe ()
Forces end of automatic VE.
• Revolving Screen ZAxis Direction Movement Specification Change
When the angle of revolution was 0, Z coefficient designation was effective.
(When values are changed at a zero angle of revolution, they do not differ from the
apparent enlargement and reduction.)
• Revolve Parameter Coefficient able
T Can Be Set to Color RAM
One item has been added to the VRAM configuration data structure. (Total of three items
added.)
• The Revolve Parameter Coefficientable
T Set Position Can Be Designated in 0x400 Units.
Two items have been added to the VRAM configuration data structure. (Total of three items
added.)
• Correction of Fault in One-W
ord Pattern Name Data Specifications in Scrolls
In the 2ndStep version, there was a fault whereby character pattern data in the last part of
VRAM could not be positioned. One item has been added to the scroll configuration data
structure.
SATURN Software Library 19
• Library Source Files have been Subdivided to Make Execution Type Files Smaller.
• The Sin(90) and Cos(0) Trigonometric Functions which were used Internally have
been Corrected to 1.0.
Differences from 3rdStep Libraries (Ver 1.00)
• SCL_SetAutoColMix () bugs have been corrected.
• SCL_VblankEnd ()bugs have been corrected.
Differences from 3rdStep Libraries (Ver 1.02)
• SCL_SetConfig () bugs have been corrected.
There was a mistake in the revolving scroll surface setting. (Screen over-processing and
plane size.)
• Bug whereby garbage appears on last line during X-axis revolution and Y-axis revolution.
Library Restructuring
In 3rdStep, the VDP2 library register buffer to facilitate customizing of library function
strength, speed and the like is described in the manual. A simple explanation of how to add
functions is given.
• Screen display ON / OFF (designation of ON / OFF for the entire screen)
[Screen ON)
void disp_on ()
{
Scl_s_reg.tvmode |= 0x8000;
SclProcess = 1;
SCL_DisplayFrame () : /* when frame change is not auto */
}
[Screen OFF]
void disp_off ()
{
Scl_s_reg.tvmode &= 0x7fff;
SclProcess = 1;
SCL_DisplayFrame () : /* when frame change is not auto */
}
• When change of only the X coordinates of a normal scroll screen (0) without using other
functions is desired.
[can be used anywhere]
Scl_n_reg_.n ()_move_x = ???; (Scroll coordinate designation)
[In V-Blank In interrupt]
(*(Uint16 *) (0x25f80070)) = Scl_n_reg.n0_move_x;
*********************************** end of file ******************************************
20
***********************************************************************************************
• Document Classification : All Library Development Explanation Files
• File symbol name : manspr.doc
• Relevant library symbol name : spr
• Relevant library name : Sprite
• Version : 1.02
• Creator : H. E.
• Creation date : 10-4-1994
• Other messages : none
***********************************************************************************************
1. Additional Explanations
1.1 Sprite isplay BasicProcessing Library
None
1.2 Sprite Display Expand Processing Library
• If #define in spr_2c. c shown below is changed and compiled, commands to VRAM can
be transferred and characters can be transferred using SCU-DMA.
#define USE_DMA_LEVEL n
n=0 : DMA is not used (default)
1 : Only command transfer can be done by DMA
2 : Only character transfer can be done by DMA
3 : Command and character transfer can both be done by DMA.
When command transfer is done by DMA, once commands have been written to the
work area, configured and transferred, the number of commands at that time is defined
below. In S model DMA transfer one-time transfer size is limited to 2K bytes or less, and
the number of commands is therefore 80.
#define CMD_BUF_MAX 80
• Addition of Work Area Size Table
+————————————————————+———————————————+
| Work Area Size Table | SprAreaSize |
+————————————————————+———————————————+
struct SprAreaSize {
Uint16 commandMax: /* Number of possible command area registrations */
Uint16 gourTblMax: /* Number of possible Gouraud table registrations */
Uint16 lookupTblMax: /* Number of possible color lookup table registrations*/
Uint16 charMax: /* Number of possible character registrations */
Uint16 drawPrtyBlkMax: /* Number of drawing priority table entries */
Uint16 useCommandCount: /* Number of currently registered commands */
Uint16 charRemainBlkCount: /* Total number of open blocks in character area */
Uint16 charNullBlkMaxSize /* Character open block maximum area block size */
};
SATURN Software Library 21
• Addition of SPR_2GetAreaSizeInfo Routine
+————————————————————+———————————————+
| Work Area Size Table SPR_2GetAreaSizeInfo |
+————————————————————+———————————————+
[Syntax] void SPR_2GetAreaSizeInfo (SprAreaSize *areaSizeInfo);
[Input] areaSizeInfo : work area size notification area address
[Output] areaSizeInfo : Notification of current work area size
[Function value] none
[Function] Returns size and use status of each work area set during initialization
• The following bug which was in the allocBlock routine was corrected (Ver 1. 01
bug.) When the requested number of blocks and the size of the open blocks is the same,
allocation cannot properly be done.
1.3 Sprite 3D Display Library
• The following items have been changed so that 2ndStep 3D data can be used in 3rdStep.
They must be added.
(1) The following items will be corrected and added to the SprObject3D table.
· Uint16 **shdldxTbl = NULL
When the shading index table is not used, it is NULL.
· Fixed32 surfNormK = MTH_FIXED(1, 0)
Calculated compensation value of surface normal vector
(2) The following items will be added to the SprCluster table.
· SprInbetInf *inbetInf = NULL
3D object indirect connect polygon information
· void *transStart = NULL
User call back routine before the start of coordinate conversion
· void *transEnd = NULL
User call back routine after the end of coordinate conversion
· void *context = NULL
User Context Area
• Be sure to note that in 3rdSTEP the SPR_3SetView () parameters are being changed.
“pivotViewPoint” is gone and in its place ViewCoordPoint is being added. Changes should
be made as follows:
2nd) SPR_3SetView (0, &viewPoint, &viewPoint, &viewAngle, ROT_SEQ_ZYX);
3rd) SPR_3SetView (0, &viewPoint, &viewAngle, ROT_SEQ_ZYX, 0);
• Restrictions
DSP is not to be used, as writeback from DSP to work RAM does not operate normally.
Therefore, even if SPR_3USE_DOUBLE_BUF is designated by a 3D SPRITE work area
definition macro, execution speed does not increase. In order to use DSP, refer to
MANMTH.DOC and correct the MTH library.
2. Plans for Expanded Functions and Performance
None
********************************** end of file ********************************************
22
************************************************************************************************
• Document Classification : 3rdSTEP (08-22-94) -> 3rdSTEP (10-12-1994) Changes
• Relevant library symbol name : PER
• Relevant library name : System/Peripheral
• Version : 1.02
• Creator : N. T.
• Creation date : 09-30-1994
• Other messages : none
************************************************************************************************
/////////////////////////////////////////////////////////////
♦ History of Changes
/////////////////////////////////////////////////////////////
• 09-23-1994 Ver 1.02
/////////////////////////////////////////////////////////////
♦ Details of Changes Ver 1.02
/////////////////////////////////////////////////////////////
Corrective Action
Corrective action for defects in 3rdSTEP have been taken as follows.
1. Correction of defect whereby X and Y mouse movement amount data obtained was
wrong.
<Nature of Defect>
Mouse X and Y movement amount data minus values which had been obtained were
wrongly being converted to positive values.
<Corrective Action>
Matched to manual specifications. (Adjusted so that data from -128 to 127 can be obtained.)
2. Correction of mouse digital device information defect.
<Nature of Defect>
Because of the defect in (1.) above, mouse digital device information was wrong.
<Corrective Action>
Same as (1.) above.
********************************** end of file *************************************
SATURN Software Library 23
***********************************************************************************************
• readme.doc classification : CD development tool explanation file
• File symbol name : MANBINCD.DOC
• Relevant library symbol name : CD development tool
• Relevant library name : File system
• Version :
• Creator :
• Creation date : 10-25-1994
• Other messages : none
***********************************************************************************************
1. CD Development Tools
CD development tools must always be used from this version forward. These tools should be
installed in the directories which comprise software library <SATURN\SEGABIN\BINCD>.
2. VCDEMU.EXE (Ver 1.72)
2.1 Corrections from e
Vr 1.5x to Ver 1.70
Multi-index and scan play have been implemented. (Note that scan play is only effective in
real time emulation mode.)
2.2 Corrections from e
Vr 1.70 to Ver 1.71
Correction of a CD tray OPEN/CLOSE defect.
2.3 Corrections from e
Vr 1.71 to Ver 1.72
Correction of a defect whereby during DOS file retrieval in direct DOS mode the wrong files
were obtained. Correction of the defect whereby row numbers on the lower right of the screen
were displayed as minus numbers. Correction of the defect whereby during the REL Informa-
tion submenu display, the value of Lsn was displayed as a minus.
2.4 Restrictions
The current version does not support file interleave in direct DOS file access.
2.5 Cautionary Items
In order to operate VCDEMU.EXE Versions 1.7x and later, virtual CD board ROM must be
replaced by Ver 3.2.
3. VCDPRE.EXE and VCDBUILD.EXE (Ver 3.03)
3.1 Changes from V
er 2.11 to Ver 2.16
· Steps have been taken to ensure that directory code is always at the top of a sector when
the number of files is large and directory files straddle several sectors.
· Action has been taken to stop processing when the same file names coincide.
· Corrective action has been taken for faults in directory configuration.
· Speed increases of from 2 to 6 times have been built in.
· When there are files with the same name, process will be interrupted.
24
3.2 Changes from Ver 2.16 to Ver 3.02
· This is to become a DOS extender (DOS/4G), and operation has been confirmed up to a
limit of about 10,000 files. (in machines loaded with 8 MB of memory).
· An error in directory record position was corrected.
· A fault whereby the CDDA track audio data TOC position was slipping was handled.
3.3 Changes from Ver 3.02 to Ver 3.03
· A defect in the directory path table was improved.
3.4 Changes from Ver 3.03 to Ver 3.04
· A defect whereby file position was wrong when directories were defined after track
designation was handled.
3.5 Cautionary Items
In Ver 1.xx and Ver 3.xx, script file description methods are different. Persons who up to
now have been using Ver 1.xx should change their script files. Please see the examples of
script description.
4. VCDUTL.EXE (Ver 1.00)
Tool for partial update of image files.
5. VCDMKTOC.EXE (Ver 1.23)
TOC information file generation tool for write-once CDs.
(An upgraded version is being prepared to handle VCDPRE.EXE and VCDBUILD.EXE bugs
and support upgrades.)
6. SWAP.EXE (Ver 1.00)
CDDA data Endian conversion program.
7. SEGACDW .EXE (Ver 1.00 Rel 1.00)
CD writer command.
8. Script Description Example (EXSAMPLE.SCR, JVC.SCR, BTSMPFS.SCR)
This is an example of the new script file for VCDPRE.EXE Ver 2.XX. (EXSAMPLE.SCR)
Please refer to it when changing scripts. The script files (JVC.SCR and BTSMPFS.SCR)
provided in the software libraries have been changed.
Other: Replacement of EPROM (witherV 3.2) for Virtual CD l/F board
This has improved the defect whereby CD-DA data on virtual CDs could not be played on
multiplayers.
************************************** end of file **********************************
SATURN Software Library 25
***********************************************************************************************
• readme.doc classification : Sound driver explanation file
• File symbol name : MANSDDRV.DOC
• Relevant library symbol name : SDDRV
• Relevant library name : Sound drive
• Version : 1.14 / 1.24
• Creator :
• Creation date : 10-21-1994
• Other messages : none
***********************************************************************************************
1. Details about Sound Drivers
SDDRVS.TSK Sound driver for use in the actual product.
SDDRV.TSK Sound driver for sound simulator use.
SYSTBL.TSK System information table for sound simulator.
(The system information table for use in the actual product is con-
tained in SSDRVS.TSK.)
Be sure to use SDDRVS.TSK as the sound driver incorporated in games. (Be sure to read the
SATURN Sound Driver System Interface Manual regarding execution methods.)
2. Sound Driver Versions
Sound drivers are provided with this version (1.14) and with Ver 1.24. In order to reduce the
sequence play load in versions later than 2.x, the generation format (compression program)
in the Convert Standard MIDI File of the Sound Simulator (supplement) and SoundDriver
(thaw program) have been changed.
For this reason, while sequence play load has been lightened, there is no longer compatibil-
ity with Ver 1, 1x sequence format. Make a Convert Standard MIDI file with
SoundSimulator Ver 1.24 or later or with M6CNV 2 BIN OUT and rewrite the Sequence
Bank with Make Sequence Bank.
[Supplementary]
SoundSimulator Ver 1.24 is SEGA-supplied sound tool version upgrade (Macintosh edition),
and the M6CNV 2 BIN OUT tool is included.
3. History of Sound Driver Changes
3.1 Changes from V
er 1.11 to Ver 1.12
· Noise during PCM stream play loops has been corrected.
· Trouble during PCM stream play stereo play has been corrected.
· PCM stream play PAN control trouble has been corrected.
3 .2 Changes from V
er 1.12 to Ver 1.13
Trouble in PCM Play Address upgrade during PCM stream play has been corrected.
26
3.3 Changes from Ver 1.13 to Ver 1.14
A fault whereby the PCM Play Address was not properly upgraded during multiple channel
simultaneous play has been improved.
3.4 Changes from Ver 1. 14 to Ver 1.24 (version upgrade)
· In order to reduce the sequence play load, the generation format (compression program)
in the Convert Standard MIDI File of the Sound Simulator (supplement) and
SoundDriver (thaw program) have been changed. (For Ver 1. 1x and later versions,
sequence data conversion is required.
· Tempo changes in the loop during sequence play have been addressed.
· Tempo track play time lag during sequence play has been improved.
4. Cautionary Items
Bank changes must be set in the sequence data. While it was clearly explained in the
manual that original bank changes should be set, in Ver 1.12 and earlier versions sound was
produced even though there were no bank changes. From Ver 1.13 on, however, checks
reveal that if bank changes are not set, no sound is produced.
********************************** end of file *************************************
SATURN Software Library 27
TM
Parameter Editor
User's Manual
Doc. # ST-227-R1-030595
© 1995 SEGA. All Rights Reserved.
Parameter Editor User
’s Manual
ST-227-R1-030595
Parameter Editor User's Manual 1
TABLE OF CONTENTS
Introduction .................................................................... 3
pEdit Functions .............................................................. 4
Menu Structure ............................................................... 5
File Menu ................................................................. 5
Edit Menu ................................................................. 5
Window Menu .......................................................... 5
Using pEdit.................................................................... 6
Editable Data ........................................................... 6
Procedure ................................................................ 6
Parameter Edit Window ..................................................7
Find Function.................................................................. 8
2
Parameter Editor User’s Manual
Introduction
This manual describes how to use the SCSP/DSP parameter editor called pEdit.
Parameter Editor User's Manual 3
pEdit Functions
pEdit provides functions for editing coefficient data and address constant data
included in DSP programs that are downloaded to the SCSP/DSP hardware.
The SCSP/DSP assembler dAsms can specify several notational modes, such as
integers and fractions, in the coefficient/address constant definition section of the
dAsms source code. However, pEdit can display and input coefficient/address
constant data with the same notational modes used in the dAsms source code be-
cause it reads the specified notational mode information from the executable format
file.
4
Menu Structure
File Menu
Open...
Selects an assembled (executable format) DSP program from the standard file dialog
and downloads the program to the SCSP. pEdit can handle only DSP program
executable-format files (extension .EXC) that have been created by the SCSP/DSP
assembler dAsms.
Save
Saves the DSP program that was modified by pEdit in executable format without
changing the file name.
Save As...
Saves the DSP program that was modified by pEdit in executable format under a
new file name that was specified from the standard file dialog.
Revert To Saved
Returns the parameters being edited to the condition before the parameters were
edited (when the parameters were last saved).
Close
Terminates editing of the currently open DSP program. If the program has not been
saved after parameter modification, this function confirms whether the modifica-
tions should be saved. At Close execution, the internal data in pEdit is erased, but
the data for the program in the DSP hardware is not cleared.
Quit
Terminates pEdit.
Edit Menu
Find
Searches for symbol names of coefficients and addresses defined in the DSP pro-
gram. The Find function is described later in this manual.
Window Menu
Address
Opens the Address (address constant editing) window, which the DSP uses to access
external memory.
Coef
Opens the Coefficient (coefficient editing) window, which the DSP uses for opera-
tions.
Parameter Editor User's Manual 5
Using pEdit
Executable Data
pEdit can be used to edit the contents of the coefficient (COEF) RAM and address
constant (ADRS) RAM in the SCSP/DSP hardware.
Procedure
1. Loading executable-format DSP programs
Execute Open from the File Menu to select the executable-format file to be edited.
When a file is selected, the DSP program is downloaded to the SCSP/DSP. In
addition, two parameter editing windows, the Coefficient window for editing
coefficients and the Address window for editing address constants, are opened
on the screen. (The parameter editing windows are described later in this
manual.)
2. Editing parameters
Parameters can be edited in the parameter editing windows (described later) in
two ways:
a) Enter a value directly in the text box in which the parameter value is
displayed.
b) Operate the scroll bar with the mouse.
3. Saving executable-format DSP programs
To save edited parameters, execute Save or SaveAs... from the File Menu. The
editing results are saved as an executable-format file (extension .EXC).
6
Parameter Edit Window
pEdit provides two parameter editing windows: the Coefficient window for editing
coefficient data and the Address window for editing address constant data. This
section explains the Coefficient window according to the example shown in the
figure below.
• DSP internal RAM address
Displays the DSP hardware internal RAM address at which the data correspond-
ing to the symbol name of the coefficient (COEF) or address constant (ADRS) is
stored.
• Symbol name
Displays the name used in the coefficient/address constant definition section in
the SCSP/DSP assembler (dAsms) source code.
• Parameter value text box
Displays and inputs parameter values in the SCSP/DSP assembler (dAsms)
source code. The values can be displayed and input according to the notational
mode specified for each data in the coefficient/address constant definition sec-
tion.
• Notational mode display
Displays the notational mode that was specified for the data in the coefficient/
address constant definition section of the SCSP/DSP assembler (dAsms) source
code.
• Scroll bar
Changes the data when operated with the mouse.
Parameter Editor User's Manual 7
Find Function
If the symbol name of the parameter to be edited cannot be immediately located in
the parameter edit windows, use the Find command in the Edit Menu to retrieve the
symbol name of the coefficient or address constant.
When the Find command is executed, the window shown above appears. To ex-
ecute the search, enter the symbol name to be retrieved in the text box, select the
Address or Coefficient button, then click the Find button.
8
TM
dAsms
User's Manual
Doc. # ST-228-R1-030596
© 1995-96 SEGA. All Rights Reserved.
Table of Contents
dAsms User’s Manual .................................................................................................................................. 5
Using dAsms ................................................................................................................................................ 6
A Basic Work Session............................................................................................................................ 6
Menus ..........................................................................................................................................................7
File Menu ...............................................................................................................................................7
Edit Menu .............................................................................................................................................. 7
Process Menu ........................................................................................................................................8
Option Menu ..........................................................................................................................................8
DSP Program Data Structure (Data Format) ............................................................................................... 9
Comments ............................................................................................................................................. 9
Coefficient and Address Symbol Definitions .............................................................................................. 10
Definition Format ................................................................................................................................. 10
Number of User-Definable Symbols ....................................................................................................10
Reserved Symbols .............................................................................................................................. 10
Notation Mode in Coefficient/Address Definition Part of Source Code ................................................ 11
Legal Range and Format for Initial Coefficient/Address Symbol Values ............................................. 12
Program Description .................................................................................................................................. 14
Command List ..................................................................................................................................... 14
Parameters .................................................................................................................................................15
Internal Registers ................................................................................................................................ 15
Internal RAM ........................................................................................................................................15
Memory Access Parameters ................................................................................................................ 15
Programming Syntax .................................................................................................................................. 16
Specifying External Memory Read and Load to MEMS (LDI) ............................................................. 16
Load to YREG (LDY) ........................................................................................................................... 16
Load to ADREG (LDA) ......................................................................................................................... 16
Multiply, Add ......................................................................................................................................... 17
Store .................................................................................................................................................... 18
Reference 1: dAsms Executable File Format ............................................................................................ 19
Reference 2: dAsms Programming Guide ................................................................................................ 21
Creating DSP Programs .............................................................................................................................23
1. Coefficient Symbol Definition (=COEF) ......................................................................................... 23
2. Address Constant Symbol Definition (=ADRS) ............................................................................. 24
3. Program Description (=PROG) ..................................................................................................... 25
Reference 3: Error and Warning Messages .............................................................................................. 29
1. Source Code Configuration Errors/Warnings ................................................................................ 29
2. Coefficient/Address Constant Definition Errors ............................................................................. 29
3. Program Description Errors ........................................................................................................... 30
Index ..........................................................................................................................................................32
4
dAsms User’s Manual
This manual describes how to use the dAsmsSCSP/DSP assembler and its assembly
language.
dAsms User's Manual 5
Using dAsms
A Basic Work Session
The following is a sample work session for programming the SCSP/DSP using dAsms.
It is assumed that all the necessary settings to run dAsmshave already been made.
1. Start dAsms.
2. Write DSP source code using the built-in text editor or load code prepared using
another editor.
3. Run the assembler to compile the code.
4. Download the compiled code into Sega Saturn’s memory.
6
Menus
File Menu
New
Opens a new source file window.
Open
Opens a DSP microprogram source code file selected from a standard Macintosh file
dialog box.
Save
Saves the edited file under the same filename.
Save As…
Saves the edited file under a different filename. Specify a new filename when prompted.
Revert To Saved
Returns the source file being edited to the state it was in prior to editing.
Close
Closes the currently open file. A warning will be displayed if there are any changes that
have not been saved.
Quit
Quits dAsms.
Note: The file extension .USC must be attached to source code files. The Assemble...command (de-
scribed later) will not work on source code files without this extension.
Edit Menu
Undo, Cut, Copy
, Paste, Select All
These commands perform the standard Macintosh editing functions on the source code
text.
dAsms User's Manual 7
Process Menu
Assemble...
Assembles the DSP source code contained in the active window. You have the option of
entering a different filename for the assembled output file. Otherwise, the extension
.EXC is added to the filename of the source code file as default .
Download...
Downloads an assembled DSP object file to the SCSP via SCSI. Select the download file
from the file dialog box and execute. If the current edit file is already in a executable
format (i.e. the file is assembled), its filename is used as the default download filename.
Option Menu
SCSI ID
dAsmsautomatically detects the SCSI ID of the development target when it firsts per-
forms a download operation. That SCSI ID is subsequently used for data communica-
tions between the host and target. This SCSI ID option does not normally need to be
used unless your hardware setup changes.
CAUTION: The SCSI ID of the development target must be different from the ID of any other SCSI
device connected in the chain. Incorrectly set SCSI IDs may cause loss of data or hardware
problems on the SCSI device.
8
DSP Program Data Structure (Data Format)
The structure and format of dAsmssource code are shown below.
Data Structure Description
#COEF This label denotes the start of the coefficient symbol definition.
Coefficient Symbol Definition
#ADRS This label denotes the start of the address symbol definition
Address Symbol Definition
#PROG This label denotes the start of program description
Program Description
#E N D This label denotes the end of program description
Comments
· Comments can be inserted in the source code by using the apostrophe character (‘)
to start them. This causes dAsmsto ignore everything after the apostrophe character
to the end of the line (line feed).
· Comments can be placed anywhere in the source code.
dAsms User's Manual 9
Coefficient andAddress Symbol Definitions
Definition Format
(symbol name) = (initial value)
symbol name: Variable name used for coefficient/address data in the DSP code. 1 byte alpha-
numeric character string of 15 characters or less.
initial value: Initial value given for a variable denoted by the symbol name above. The value is
expressed by one of various notation methods described in this document.
Note: One symbol can be defined in one line of the definition expression. An initial value must be
given to each symbol.
Number of User-Definable Symbols
• Coefficient symbols 63
• Address symbols 32
Reserved Symbols
The coefficient symbol ZERO is pre-defined; the user may not define a symbol with the
same name. The initial value given to this symbol is 0 and placed at the beginning of
the coefficient data section of the executable DSP program. User-defined coefficient
symbols are placed in the order that they are defined, starting from the second coeffi-
cient data in the coefficient data section.
Although the reserved symbol ZERO can be used in the user program section without its
pre-definition in the coefficient definition section, the value must not be modified by
any means (e.g., within an DSP program or in the DSP hardware).
10
Notation Mode in Coefficient/Address Definition Part of Source Code
The following notation modes are permitted in the coefficient/address definition
section.
Definition Notation Mode Identifier Example Conversion Method Conversion Result
#COEF Hexadecimal &H &H0FFF No conversion &H0FFF
Decimal None 123 Dec to Hex &H007B
% % %50 *1 &H0800
Fractional . 0.25 *2 &H0400
#ADRS Hexadecimal &H &H8000 No conversion &H8000
Decimal None 123 Dec to Hex &H007B
Milliseconds ms ms300.0 *3 &H33AE
Conversion Methodshown above denotes the method used to perform conversion from a
value in each notation mode to actual data. The formulas for conversion methods *1, *2
and *3 are as follows.
*1 (Coefficient) = 4095 * (NotationValue)/100
*2 (Coefficient) = 4096 * (NotationValue)
*3 (AddressDefinition) = 44100 * (NotationValue)/1000
Note: Floating point calculation is performed for *1, *2 and *3. The result is rounded off to the nearest
zero.
The format (in an EXC file) of the converted actual data is shown below.
Definition Section Actual Data Format
#COEF 13-bit two's complement format hexadecimal
#ADRS 16-bit linear format hexadecimal
Note: Note the difference between the constants of formulas *1 and *2 (i.e., 4095 and 4096).
dAsms User's Manual 11
Legal Range and Format for Initial Coefficient/Address Symbol
alues
V
Definition Notation Mode Range Format
#COEF Hexadecimal 1000 to 0FFF[hex] Signed hexadecimal integer (13 bit wide)
Decimal -4096 to +4095[dec] Signed decimal integer
% -100 to +100[%] Signed decimal integer
Fractional -1.0 to +0.99975[dec] Signed decimal fraction (1 digit integer component,
5 digits fractional component maximum)
#ADRS Hexadecimal 0 to FFFF[hex] Unsigned hexadecimal integer (16 bit wide)
Decimal 0 to 65535[dec] Unsigned decimal integer
Milliseconds 0.0 to 1486.0[ms] Unsigned decimal fractional number (4 digits integer
component, 1 digit fractional component maximum)
12
Example: The following expressions are possible in the coefficient/address definition section of the
source code.
#COEF
CoefA = &H0FFF
CoefB = 123
CoefC = %50
CoefD = 0.25
#ADRS
AdrsA = &H8000
AdrsB = 123
AdrsC = ms300.0
dAsms User's Manual 13
Program Description
Command List
Command Function
@ Start a multiplication or addition description
* Multiply
+ Add
- Subtract
> Store (end of multiplication or addition description)
( Left parenthesis
) Right parenthesis
LDI Memory access and load to MEMS
LDY Load from INPUTS to Y register
LDA Load from INPUTS to A register
14
Parameters
Internal Registers
Symbol Description
REG Denotes previous multiplication or addition results.
YREGH Denotes section of (see explanation of multiply and add syntax) of YREG.
YREGL Denotes section of (see explanation of multiply and add syntax) of YREG.
FREG (Refer to explanation of store syntax).
ADREG Address modify component(refer to explanation of store syntax).
Internal RAM
Symbol Description
MEMS00~1F External memory load data area.
MIXS00~0F Sound generator data area.
TEMP00~7F Temporary storage area for multiply and add results.
EFREG00~0F Processed data area.
EXTS00~01 External expansion input data area.
Memory Access Parameters
Symbol Description
MR[…] Read from memory.
MW[…] Write to memory.
Note: The following memory access elements are noted within the brackets according to the rules
described elsewhere in this document.
• User-defined address symbol
• DEC
• ADREG
• 1
• NF
dAsms User's Manual 15
Programming Syntax
All mnemonics and parameters must be separated by one or more units of a delimiter.
A blank space, comma (,), tab and line feed are acceptable delimiters.
Specifying External Memory Read and Load to MEMS (LDI)
LDI MEMSxx, MR[AddressElement(s)/NF]
• No delimiters can be included in the description of the MR[…] parameter for reading external memory.
• AddressElement(s) denotes the address element (described elsewhere) linked by the symbol “+”.
• There must always be one address constant symbol (user-defined address symbol name) included in
the address description of AddressElement(s).
Load to YREG (LDY)
LDY INPUTS
Load to ADREG (LDA)
LDA INPUTS
16
Multiply, Add
@ pM*pC±(pM*pC±(…(pM*pC±(pM*pC+pA))…))
pM: Multiplicand
pC: Multiplication coefficient
pA: Augend
Note: The same number of open parenthesis [(] and close parenthesis [)] must be present in all math-
ematical equations. The right most open parenthesis [(] must always be to the left side of the left
most close parenthesis [)].
• The following restrictions apply when combining pM and pA.
pM pA
INPUTS {REG, TEMP00-TEMP7F}
TEMP00-TEMP7F {REG, T} *
Note: When {TEMP00-TEMP7F} is specified with pM and also TEMP with pA, only the TEMP symbols
with the identical identifiers can be used. Therefore, specify T for pA.
• When the value of YREG is used as the multiplication coefficient parameter, one of
either {YREGH, YREGL} is used. The difference in notation between these two
registers shown in the table below.
dAsms User's Manual 17
Store
> opt Destination(s)
opt: Store option; use or omit one of S1, S2 or S3.
Destination(s): Store destination specification. At least one out of Group a through d shown
below must be selected. This specification cannot be omitted.
Group a One of {TEMP00 ~ 7F}
Group b FREG
Group c ADREG
Group d One of {EFREG00 ~ 0F}
CAUTION: When specifying ADREG for Destination(s), S3 must not be specified for opt.
• The bit shift, overflow protection, and store mode settings for data is specified with
opt. The possible combinations are shown below.
Parameter #1 Setting Shift Overflow Protection Store Mode
Omit x1 Protection Enabled A
S1 x2 Protection Enabled A
S2 x2 Protection Disabled A
S3 x1 Protection Disabled B
The data stored in ADREG and FREG differ depending on the specification of store
mode A or B as shown below .
Note: The upper 4 bits (ssss in the table above) of ADREG in store mode A are filled (sign expanded)
with a value (sign bit) equal to bit 23 of INPUTS.
18
Reference 1: dAsms Executable File Format
Executable programs created by dAsmsare text files based on the file format shown
below. The file extension for these executables is EXC.
COEF
Coefficient Data
ADRS
Address Data
PROG
Program
• A coefficient/address data line is formatted as follows.
[InternalRAM address]:[data]:[symbol name]:[notation mode/initial value]
Note: The [notation mode/initial value] has the same format as the right side of the coeffi-
cient/address constant definition section of the source code.
• A line of the program is formatted as shown below.
[ProgramRAM Address]:[data]
Note: The 64-bit data is divided up into four blocks every 16 bits in the [data] section. Each block
represents four hexadecimal characters. Also, one blank space is inserted between each block.
Refer to the executable file example shown on the next page.
dAsms User's Manual 19
• An example of an executable file is shown below.
COEF
00:0000:ZERO (coefficient data from reserved coefficient symbol ZERO)
01:007B:CoefB:123
02:0800:CoefC:%50
03:0400:CoefD:0.25
04:1F85:CoefE:-123 (negative value)
05:1800:CoefF:%-50 (negative value)
06:1C00:CoefG:-0.25 (negative value)
ADRS
00:8000:AdrsA
01:007B:AdrsB:123
02:33AE:AdrsC:ms300.0
PROG
00:xxxx xxxx xxxx xxxx
01:xxxx xxxx xxxx xxxx
(omitted)
7F:xxxx xxxx xxxx xxxx
Note: An “x” represents one hexadecimal digit (4 bits) according to the PROG section format.
20
Reference 2: dAsms Programming Guide
When coding dAsmsprograms, all instructions can be treated as part of a sequential
processing framework. There is no need to pay attention to pipeline processing. The
following processing steps are considered to be one processing unit.
1. Prepare data required for calculation (LDI/LDY/LDA)
2. Multiply/add expression description (@…)
3. Specify store destination (>)
Source code can be written by taking an appropriate functional component from the
signal flowchart and fitting it in the context of the processing unit. The DSP code is
written by repeating this process in the signal flow processing order.
The DSP programming method used in dAsmsis explained next based on a simple
example.
dAsms User's Manual 21
• Programming example: stereo (independent left and right channel) delay
This example uses the external expansion inputs EXTS00 and EXTS01, through which
audio data streams from the CD-ROM can be input as the left and right channels. The
results of the independent right and left channel delay processing (echo) are output to
EFREG00 and EFREG01.
• Signal Flow Diagram
DrctLevelL
Lch (MEMS00)
EXTS00 + waL raL raL+1 (raL) + EFREG00
EffSendLevelL MEMS00 MEMS01 EffRtnLevelL
FbL
TEMP00 +
D C0L
TEMP01
C2L C1L
DrctLevelR
Rch (MEMS02)
EXTS01 + waR raR raR+1 (raR) + EFREG01
EffSendLevelR MEMS02 MEMS03 EffRtnLevelR
FbR
TEMP02 +
D C0R
TEMP03
C2R C1R
22
Creating DSP Programs
1. Coefficient Symbol Definition (#COEF)
1.1 Defining LevelAttenuation-Related Coefficients
The following are defined as level attenuation-related coefficients.
· Send level to delay: EffSendLevelL/R
· Direct signal level: DrctLevelL/R
· Return level from delay: EffRtnLevelL/R
· Feedback level of delay signal: Fbl/R
Assuming that a level resolution of 1% increments is sufficient for level
attenuation, the coefficient is defined using percent notation. Refer
elsewhere in this manual regarding the definition format. The definition
description in the dAsmscode is as follows.
EffSendLevelL=%100
EffSendLevelR=%100
DrctLevelL=%50
DrctLevelR=%50
EffRtnLevelL=%75
EffRtnLevelR=%75
FbL=%50
FbR=%50
1.2 Defining Filter-Related Coefficients for Feedback
The following coefficients are used with the 1st stage IIR filter, which
becomes the feedback signal path for the delay signal shown in the signal
flow diagram.
· C0L/R
· C1L/R
· C2L/R
Assuming that the filter coefficient is a normalized value of 1, the coeffi-
cient is defined in fractional notation. When useful cut-off frequencies are
taken into consideration, the definition in the dAsmscode is as follows.
C0L=0.40893
C0R=0.40893
C1L=0.40893
C1R=0.40893
C2L=0.18164
C2R=0.18164
dAsms User's Manual 23
2. Address Constant Symbol Definition (#ADRS)
2.1 Defining Write and Read Addresses for the Delay Ring Buffer
The rectangles in the middle of the left and right channel in the signal flow
diagram represent delay. Delay is produced by the delay buffer, and the
delay time is proportional to the difference between the write address and
the read address. One address is equivalent to the delay of one sample. The
following are defined as addresses:
• waL/R
• raL/R
Although it is possible to assign ring buffer addresses in hexadecimal or
decimal integers as initial values for these address constant symbols, dAsms
is capable of using addresses converted to time (milliseconds) notation. The
following definitions are made based on some useful delay times:
waL=ms0.0
raL=ms149.9
waR=ms150.0
raR=ms249.9
24
3. Program Description (#PROG)
3.1 Preparing Data for the Left Channel
Memory access (reads from the ring buffer) is required in order to obtain
the data necessary for calculation. The addresses in the ring buffer that
need to be read are
• raL
• raL+1
However, since these addresses are only relative positions in the ring
buffer, the address element DEC is inserted in the [...] part of the external
memory read parameter MR[...]. DEC represents a counter that is
decremented by 1 per each sample. Ring buffer operations are made
possible by adding DEC to the address element notation. Assuming that the
data read from raL and raL+1 positions in the ring buffer are loaded to the
following,
• MEMS00
• MEMS01
the data is represented in the dAsmssource code as shown here.
LDI MEMS00,MR[raL+DEC]
LDI MEMS01,MR[raL+DEC+1]
As an example, the addresses in the ring buffer accessed by the two
MR[...] above are shifted down one address per sample by DEC while
maintaining a one-address relative interval between them.
3.2 Filter Calculations for the Left Channel Feedback
The next step is to perform calculations on the prepared data. Calculation
of the 1st stage IIR filter, which is the feedback path for the delay signal, is
done using the following procedure.
1. The value loaded in MEMS00 is multiplied by the coefficient C0L.
2. The value loaded in MEMS01 is multiplied by the coefficient C1L. The result is
added to the result of step 1.
3. The value of TEMP01 is multiplied by the coefficient C2L and is added to the result of
step 2.
4. The result of step 3 is stored in TEMP00.
It is important here that TEMP be set up as the ring buffer. The xx in TEMPxx
represent the relative address of the ring buffer. The data stored in TEMP00
appear in TEMP01 for the next sample. This is used in steps 3 and 4 above
to generate a one sample delay.
dAsms User's Manual 25
In dAsms, the method of expressing calculations is determined by the
characteristics of the SCSP/DSP hardware (target). Steps 1 through 4 on
the previous page are expressed in dAsmscode as follows.
@ TEMP01 * C2L + (MEMS01 * C1L + (MEMS00 * C0L +)) > TEMP00
In order to express the sequential multiplies and adds as shown in steps 1
through 3, each multiply must be ordered in reverse within the code
compared with the actual processing order.
3.3 Writing to the Left Channel Ring Buffer
As can be seen from the signal flow diagram, only the sum of the
following need to be written to the ring buffer:
a. The product of EXTS00 and the coefficient EffSendLevelL.
b. The product of the value stored in TEMP00 in step 4 of section 3.2 and the coefficient
FbL.
The write address in the ring buffer is waL. As with MR[...] in section 3.1,
the address element DEC is used. The above is expressed in dAsmscode as
follows.
@ TEMP * Fbl + (EXTS00 * EffSendLevelL +) > MW[waL + DEC]
3.4 Generating Left Channel Output Data and riting
W to EFREG
Once again, the signal flow diagram shows that only the sum of the
following 2 data need to be stored in EFREG00.
a. The product of the data read from address raL in the ring buffer and the coefficient
EffRtnLevelL.
b. The product of EXTS00, which is the input value, and the coefficient DrctLevelL.
The data (read from the ring buffer) required for calculation in step a is
already loaded in MEMS00 by the process described in section 3.1. This
process is expressed in dAsmscode as follows.
@ EXTS00 * DrctLevelL + (MEMS00 * EffRtnLevelL +) > EFREG00
This completes the coding for the left channel.
26
3.5 Coding for the Right Channel
This example is an independent left and right stereo delay DSP program.
The processing for the right channel is identical to that of the left channel,
as seen from the signal flow diagram. However, the coefficient/address
constant symbol names, register names, etc. are different. Code for the
right channel can be written by copying and pasting the code for the left
channel described above and modifying the relevant parts that need to be
changed.
3.6 Finished!
Coding for this programming example is now complete. The entire source
code that conforms with the DSP Program Data Structure (Data Format)
section in this manual is presented below.
‘dAsms sample program.
‘Function:L/R independent delay
‘CD Lch Direct + Delayed -> EFREG00
‘CD Rch Direct + Delayed -> EFREG01
#COEF
‘Levels
EffSendLevelL=%100
EffSendLevelR=%100
DrctLevelL=%50
DrctLevelR=%50
EffRtnLevelL=%75
EffRtnLevelR=%75
FbL=%50
FbR=%50
‘FilterCoefs
C0L=0.40893
C0R=0.40893
C1L=0.40893
C1R=0.40893
C2L=0.18164
C2R=0.18164
#ADRS
waL=ms0.0
raL=ms149.9
waR=ms150.0
raR=ms249.9
dAsms User's Manual 27
#PROG
‘Lch
LDI MEMS00,MR[raL+DEC]
LDI MEMS01,MR[raL+DEC+1]
@ TEMP01 * C2L + (MEMS01 * C1L + (MEMS00 * C0L +))>TEMP00
@ TEMP00 * FbL + (EXTS00 * EffSendLevelL +)>MW[waL + DEC]
@ EXTS00 * DrctLevelL + (MEMS00 * EffRtnLevelL +)>EFREG00
‘Rch
LDI MEMS02,MR[raR+DEC]
LDI MEMS03,MR[raR+DEC+1]
@ TEMP03 * C2R + (MEMS03 * C1R + (MEMS02 * C0R +))>TEMP02
@ TEMP02 * FbR + (EXTS01 * EffSendLevelR +)>MW[waR + DEC]
@ EXTS01 * DrctLevelR + (MEMS02 * EffRtnLevelR +)>EFREG01
=END
28
Reference 3: Error and W
arning Messages
If an error occurs, code assembly is not possible. If a warning occurs, then assembly is
executed, but a problem may exist in the program.
1. Source Code Configuration Errors/W
arnings
Error : Missing “#COEF”.
No #COEF label can be found.
Error : Missing “#ADRS”.
No #ADRS label can be found.
Error : Missing “#PROG”.
No #PROG label can be found.
Error : Missing “#END”.
No #END label can be found.
Error : Illegal source text.
There was an error in the source code. The problem may be caused by an illegal
ordering of the labels #COEF, #ADRS, #PROG, and #END.
2. Coefficient/Address Constant Definition Errors
Error : Unknown error occurred in #COEF .
There was an unknown error in the description of the #COEF (coefficient defini-
tion) section.
Error : Unknown error occurred in “#ADRS”.
There was an unknown error in the description of the #ADRS (address definition)
section.
Error : Initial value for symbol
“ ” is out of range.
The initial value given to symbol is out of range.
Error : Invalid mode for symbol
“ ”.
The notation mode of the initial value given to symbol is out of range.
Error : Too many COEF defines.
The number of COEF definitions exceeded the maximum number allowed.
Error : Too many ADRS defines.
The number of ADRS definitions exceeded the maximum number allowed.
dAsms User's Manual 29
Warning : symbol symbol
“ ” never used.
This warning is given when an unused coefficient/address constant symbol
exists.
Warning : Multiple definition.
This warning is given when multiple definitions exist that use the same symbol
name. The last definition takes priority in this case.
3. Program Description Errors
Error : Undefined symbolsymbol
“ ” detected.
An undefined symbol was detected.
Error : Invalid parameter parameter
“ ” detected.
An invalid parameter was detected.
Error : Invalid description string
“ ”
There is a problem in the character string string in the multiplication or addition
description.
Error : Illegal parentheses.
There is an error in the relationship between the locations of the opening “(“ and
closing “)”parenthesis in the multiplication or addition description.
Error : Parentheses mismatch.
The number of opening “(“ and closing “)” parenthesis in the multiplication or
addition description do not match.
Error : Missing “>” before this line.
There is no “>” corresponding to the previous “@”.
Error : Invalid “>” detected.
An invalid “>” was detected.
Error : Invalid “(“ detected.
An invalid opening parenthesis “(“ was detected.
Error : Invalid “)” detected.
An invalid closing parenthesis “)” was detected.
Error : Missing “]”.
A closing bracket “]” could not be found in the description of the external
memory access parameter.
30
Error : Invalid elements […] detected.
There is an error in the address element expression of the external memory access
parameter.
Error : Undefined address elementstring“ ” detected.
An undefined character string was detected in the address element of the exter-
nal memory access parameter.
Error : Missing base address.
An address constant was not included in the address element of the external
memory access parameter.
Error : Use “S3” to store toADREG.
The S3 option is necessary for storing the calculation result in ADREG.
Error : PROG code overflowsteps
( ).
The number of program steps exceeded the maximum number allowed.
Warning: Multiple STR to EFREGxx.
This warning is given when a store is performed two or more times to the same
address of EFREG. When this occurs, only the last store is valid.
dAsms User's Manual 31
Index
Address constant symbol definition .................................................. 24
Assemble... ............................................................................................. 8
Assembling files .................................................................................... 8
Bit shift ................................................................................................... 18
Close ....................................................................................................... 7
Coding method ..................................................................................... 21
Coefficient and address ....................................................................... 10
Coefficient and address symbol definitions ..................................... 10
Coefficient and address symbols ........................................................ 10
Comments .............................................................................................. 9
Data structure ........................................................................................ 9
Download... ........................................................................................... 8
Edit menu ............................................................................................... 7
External memory read ......................................................................... 16
Feedback filter (1st stage IIR) .............................................................. 23, 25
File menu ............................................................................................... 7
Close ................................................................................................ 7
New ................................................................................................. 7
Open ................................................................................................ 7
Quit .................................................................................................. 7
Revert To Saved ............................................................................. 7
Save .................................................................................................. 7
Save As ............................................................................................ 7
Initial value ............................................................................................ 10
Internal registers ................................................................................... 15
Internal RAM ......................................................................................... 15
Level attenuation .................................................................................. 23
Memory access parameters ................................................................. 15
Multiply, add ......................................................................................... 17
New ......................................................................................................... 7
Notation mode ...................................................................................... 11
Number of user-definable symbols .................................................... 10
Open ....................................................................................................... 7
Option menu ......................................................................................... 8
SCSI ID ............................................................................................ 8
Output data ........................................................................................... 26
Overflow protection ............................................................................. 18
Process menu ......................................................................................... 8
Assemble ......................................................................................... 8
Download ....................................................................................... 8
Quit ......................................................................................................... 7
Read address ......................................................................................... 24
Reserved symbols ................................................................................. 10
Revert To Saved .................................................................................... 7
Ring buffer ............................................................................................. 24, 25
Sample program .................................................................................... 27
Save ......................................................................................................... 7
Save As ................................................................................................... 7
32
SCSI ID ................................................................................................... 8
Source file ............................................................................................... 7
Store ........................................................................................................ 18
Store mode ............................................................................................. 18
Symbol name ......................................................................................... 10
Write address ......................................................................................... 24
ZERO ...................................................................................................... 10
dAsms User's Manual 33
TM
l
n tia
de
nfi
Co
SATURN
Demo-Demo
GA
File Loader
Specifications
SE
Library Version 1.20
2/5/1996
Doc. # ST-250-R1-031296
© 1995-96 SEGA. All Rights Reserved.
Revision History
• Release 1 (Version 1.11) 8/23/1995
Major improvements in all feature areas.
• Release 2 (Version 1.12) 12/06/1995
• Change in exit function initialization processing. Disabled interrupts. Eliminated halts of the
slave CPU by the SMPC.
• Added exit function name SYS_Exit.
• Added Function Code 2processing to the exit function (execute IP check and run uncondition-
ally).
• Release 3 (Version 1.20) 2/5/1996
• Changed reference area address for DemoDemo data from 60020CCH to 6000CCCH.
Associated libraries were also modified for concurrence (GFS Ver. 2.10, SYS Ver. 2.10).
• Added copy to SYSTEM ID save area processing in the Interface module. Changed memory map
for Interface and Kernel modules.
• Eliminated root directory file count limitation (previously limited to 254 files).
• Eliminated the exit function and standardized on the SYS library function SYS_Exit.
• Added the FLD_INIT_DDS function macro to the interface module.
4
Table of Contents
1. Outline ........................................................................................................................... 6
1.1 System Configuration .............................................................................................. 6
1.2 Functions and Features .......................................................................................... 7
2. File Loader Specifications ............................................................................................. 8
2.1 Interface .................................................................................................................. 8
2.2 Kernel ...................................................................................................................... 10
3. Exit Function Specifications ........................................................................................... 11
4. Demo-Demo Software Disk Configuration ..................................................................... 11
5. FLD File Overview ......................................................................................................... 12
6. Function Specifications .................................................................................................. 13
6.1 File Loader (Interface) ............................................................................................. 13
6.2 File Loader (Kernel) ................................................................................................ 14
6.3 System Exit Function .............................................................................................. 14
SATURN Demo-Demo File Loader Specifications 5
1. Outline
This manual describes external specifications for the Demo-Demo File Loader.
1.1 System Configuration
The File Loader will be abbreviated as FLD in this manual.
Library symbol: FLD (File LoaDer)
Boot ROM IPL
Menu IP Game A IP Game B IP
File
Loader
Kernel
Main Menu
File Loader
Interface Game A Game B
SYS_Exit() SYS_Exit() SYS_Exit()
Multiplayer
Figure 1 Demo-Demo Software System Configuration
The Demo-Demo File Loader comprises a file loader that loads a game selected in the
Demo-Demo Software (DDS) menu into work RAM, and an exit function (SYS_Exit)
that is called when exiting the game.
The File Loader is divided into a menu interface and a kernel that loads the first read
file of the game.
6
1.2 Functions and Features
The use of the File Loader in the following way enables Multi-GFS and the exit function
to be linked to game programs, so games can be developed without regard for whether
they are product versions or Demo-Demo versions.
1. Game Startup
Demo-Demo games are started up by the File Loader interface and kernel.
Since the game IP is executed as is, initialization is the same as in the startup
of a normal game. Therefore, the reliability of operation is improved.
2. Multi-GFS Support
The files and directory structure used by each game are set up in a separate
subdirectory for each game. It is therefore not necessary to consider filename
conflicts between games, and the filenames used can be the same as those in
the actual games.
Multi-GFS allows files in game subdirectories to be accessed without any modifica-
tion to the product version program.
3. Game Exit
Executing the exit function during Demo-Demo operation brings up the menu;
execution during the operation of the game starts up the Multiplayer.
SATURN Demo-Demo File Loader Specifications 7
2. File Loader Specifications
2.1 Interface
1. Process
(a) Load IP of game selected in menu to address 6002000H.
(b) Copy the entire SYSTEM ID (100H bytes from 6002000H) to the SYSTEM ID save
area (60000C00H).
(c) Copy part of SYSTEM ID (20H bytes from 60020E0H) to the SYSTEM ID parameter
area (60002A0H).
(d) Load the Demo-Demo data into the SYSTEM ID save area (4 bytes from
6000CCCH). Specifically, rewrite the part of the SYSTEM ID save area shown in
Figure 2.1. The Demo-Demo data is accessed by the Multi GFS, the SYS_Exit
function and the FLD kernel.
(e) Load the File Loader kernel (FLD_KNL.BIN) at 200000H.
(f) Rewrite the first read function hook table (6002270H) value to the 200000H
address.
(g) Jump to the IP security code (6002100H) and start up the game.
C D E F
C0H Game name DDS TNO FID
01H01H
(indicates Demo-Demo
(indicates is running)
whether Demo-Demo is running)
Starting track
Starting number
track number ofofthe
theCD-DA
CD-DA track used
track used
GameGamesubdirectory filefile
subdirectory identifier
identifier
Figure 2.1 SYSTEM ID Rewrite
8
2. Memory Map
WORKRAM-H
6000000H
60002A0H
System ID parameter area 20H bytes
60002C0H
6000C00H
System ID save area 100H bytes
6000CCCH
Demo-Demo data (4H bytes)
6000CD0H
6000D00H
6002000H
System ID (IP Start Address) 100H bytes
60020E0H
System ID parameters (20H bytes)
6002100H
Security code start
6002270H
1st read function hook table value 4H bytes
6002274H
6100000H
Figure 2.2 Interface Memory Map
3. Notes
Execution of the IP sys_init.obj from both the menu and game can cause the
system to crash when the Multiplayer is started up from a game or the reset button
is pressed.
To avoid this problem, the following should be observed:
(a) Do not link sys_init.obj to the menu IP.
(b) Do not modify the following menu settings.
• Cache mode
• Sector length (CDC_SetSctLen)
SATURN Demo-Demo File Loader Specifications 9
2.2 Kernel
The File Loader kernel is called from the IP instead of the first read process routine in
boot ROM (kernel filename: FLD_KNL.BIN).
1. Process
(a) Re-register VBLANK-IN interrupt routine in the interrupt vector table (vector
number 40). (Patch processing performed on sys_sec.obj)
(b) Move to game subdirectory. This subdirectory stores the selected game.
(c) Load the first read file (file where fid is 2) and transfer to first read address.
2. Memory Map
WORKRAM- L
200000H
Hook table 4H bytes
200004H
Reserved area FCH bytes
200100H
Area reserved for kernel program 1F00H bytes
202000H
Free space
300000H
The pointer to the first read file load function is stored in the hook table.
The first read file load function exists within the kernel program.
Figure 2.3 Kernel Memory Map
3. Hook Table Placement
Assign the hook table to the initialization data section (SEGA_D) and designate the
memory area at link-time.
10
3. Exit Function Specifications
The exit function uses parameter values to perform one of the following exit processes:
IP check and execution, Multiplayer user interface screen startup, infinite loop execution.
1. IP Check & Execution
The Demo-Demo IP is loaded and executed using a boot ROM service routine. The
following initialization process is performed at that time (when operated as a stand-
alone product, the Multiplayer is started up).
(a) Disable interrupts (CPU status register, SCU interrupt mask register)
(b) Change system clock to 26 MHz (halts the slave CPU) *
(c) CD subsystem soft reset
(d) Set stack pointer to the default value (6002000H)
* An SMPC exit wait is not required (infinite loop may occur because of timing)
Using the SMPC slave CPU halt command is not allowed.
2. Multiplayer Startup
Start up the Multiplayer using the SYS_EXECDMP function macro.
3. Infinite loop Execution
Used for debugging.
4. Demo-Demo Software Disk Configuration
The configuration of the Demo-Demo software CD is shown in Table 4.1
Table 4.1 Disk Configuration
Track File Description
CD ROM track Menu program
Menu data Place menu program,
Game1_IP.BIN data and game IP's in
... the root directory.
FLD_KNL.BIN File Loader kernel
Game 1 Create a separate
Game 1 program subdirectory for each
Game 1 data game and program, and
... place programs and
data.
Game 2
...
CD-DA track CD-DA files not used
* The maximum number of directory nesting levels including the root directory is 8. Therefore,
the maximum number of levels that can be used by a game is 7.
SATURN Demo-Demo File Loader Specifications 11
5. FLD File Overview
1. Files required to use the FLD library
Table 5.1 Files required to use the FLD library
* The exit function is supplied as SYS_Exit in the system program library
sega_sys.lib (ver. 2.10 and later).
2. Files required to create FLD library
Table 5.2 Files required to create FLD library
3. SEGA libraries required to create FLD library
Table 5.3 SEGA libraries required to create FLD library
12
TM
SEGA SATURN
Address Checker
Reference Manual
Doc. # ST-254-B-110395
© 1995-96 SEGA. All Rights Reserved.
SEGA SATURN
ADDRESS CHECKER
REFERENCE MANUAL
REVISION-1
• Description of Commands
• Technical Materials
SI Electronics
2-28-16 Shimomaruko, Ota-ku, Tokyo 146
TEL: 03-3756-4111
TEL: 03-3756-4114 (Tech Development)
FAX: 03-3756-5377
Copyright SI Electronics Ltd. 1995. All rights reserved.
Notes:
(1) This manual is copyrighted by SI Electronics Ltd.. Unauthorized reproduction in
entirety or in part is prohibited by law.
(2) Our best efforts have gone into preparation of this manual, but we welcome ques-
tions regarding the contents. Contents subject to change without notice.
(3) Regardless of (2), no responsibility is assumed for any consequences of operation.
MS DOS is a registered trademark of Microsoft Corporation, USA.
Other program, system, and CPU names are trademarks registered trademarks of their
respective manufacturers.
SI Electronics
2-28-16 Shimomaruko, Ota-ku, Tokyo 146
TEL: 03-3756-4111
TEL: 03-3756-4114 (Tech Development)
FAX: 03-3756-5377
4
Introduction
This manual provides a description of commands used with the SEGA SATURN
Address Checker, and technical specifications.
See the separate SEGA SATURN Address Checker Operation Manual (Doc. # ST-254-A-
110395) for a description of Address Checker setup, program installation, and operation.
SEGA SATURN Address Checker Reference Manual 5
Notes and Symbols Used in This Manual
1. ‘U’ Explanatory symbol indicating a one-character space. Only used
to denote a space when particularly important.
2. ‘ø’ Explanatory symbol indicating pressing the Enter key (carriage
return key)
3. ‘_’ (underline) Explanatory symbol indicating a character to be actually input
from the keyboard.
4. ‘\’ ASCII symbol termed ‘backslash’ and assigned code 5C. In JIS
code,
displays ‘¥’(yen symbol).
5. ‘^A’ or <CTRL> Indicates pressing the ‘A’ key while holding down the control key.
Indicates, for example (^A)→01, (^B) →02, ... (^Z) →1A.
6. Special keys are denoted by < >.
For example, besides ‘U’, the space key may be indicated by
<SPACE>.
7. ‘xxxxH’ indicates that the value ‘xxxx’ is hexadecimal.
6
Table of Contents
1. Address Checker Specifications .................................................................................. 9
1.1 SEGA System Specifications .............................................................................. 9
1.2 Address Checker Function Specifications .......................................................... 10
2. Detailed Description of Commands ............................................................................ 11
2.1 ! Execute Commands in the History Buffer .................................... 12
2.2 : Edit and Execute Commands in the History Buffer ..................... 13
2.3 @ MS-DOS Call and Command Shell Execution ............................ 14
2.4 < Command File Execution ............................................................ 16
2.5 ALIAS Define an Alias ............................................................................ 17
2.6 ?ALIAS Display an Alias ........................................................................... 18
2.7 _ALIAS Delete an Alias ............................................................................ 19
2.8 _ALIASU Delete User-Defined Alias ........................................................... 20
2.9 AUTO Execute Auto Re-test ................................................................... 21
2.10 BELL Bell Sound ................................................................................... 23
2.11 BB Set Path Breakpoint .................................................................... 24
2.12 ?BB Display Path Breakpoint .............................................................. 25
2.13 _BB Delete Path Breakpoint ............................................................... 26
2.14 CAT Display File Contents .................................................................. 27
2.15 CLS Clear Command Window Screen ................................................ 28
2.16 ECHO Display Character String .............................................................. 29
2.17 _ECHO Suppress Display ......................................................................... 30
2.18 FK Define Function Keys .................................................................. 31
2.19 ?FK Display Function Key Definition Character String ....................... 32
2.20 _FK Delete Function Key Definition .................................................... 33
2.21 GO Execute Program ......................................................................... 34
2.22 HELP Display Command Syntax ........................................................... 35
2.23 LOG Start Log Acquisition .................................................................... 36
2-24 ?LOG Display Log File Name ................................................................ 37
2.25 _LOG End Log Acquisition ..................................................................... 38
2.26 MAN Manual Display ............................................................................ 39
2.27 MIDX Create Index File for Message Display ....................................... 40
2.28 MORE MORE Format Display <Filter Command> .................................. 41
2.29 QUIT Quit Address Checker .................................................................. 42
2.30 REM Comment Line ............................................................................. 43
2.31 RIDX Read Index File for Message Display .......................................... 44
2.32 SET Set Address Checker Operating Environment ............................. 45
2.33 ?SET Display Address Checker Operating Environment ...................... 46
2.34 STOP Stop ............................................................................................. 47
2.35 TDMP Display Trace Data ...................................................................... 48
2.36 TRC Set Trace Conditions ................................................................... 50
2.37 ?TRC Display Trace Conditions ............................................................. 52
2.38 _TRC Delete Trace Conditions .............................................................. 53
2.39 TSET Set Trigger Detection Condition .................................................. 54
2.40 VRAM Store Display Contents to a File .................................................. 55
3. Detailed Description of TRCMAP.DAT Contents ......................................................... 56
4. Error Messages ........................................................................................................... 58
SEGA SATURN Address Checker Reference Manual 7
Appendices
SATURN System Address Map ................................................................................ 59
SMPC Register Map ................................................................................................. 64
DCC Register Map ................................................................................................... 66
CDROM Register Map .............................................................................................. 66
SCSP Register Map .................................................................................................. 72
VDP1 Register Map .................................................................................................. 74
VDP2 Register Map .................................................................................................. 74,79
SCU Register Map .................................................................................................... 80
8
1. Address Checker Specifications
The Address Checker is used to perform address checks and debugging of programs
such as games that run on the SEGA system (custom SATURN board 17106833E). For
this purpose, the SEGA system and Address Checker board employ C-BUS connections.
1.1 SEGA System Specifications
The Address Checker structure is illustrated below.
SEGA System (custom SATURN board) Address Checker board
(Top view)
The SEGA System and Address Checker board are connected through the UCN1 and
UCN2 connectors shown in the drawing.
SEGA SATURN Address Checker Reference Manual 9
1.2 Address Checker Function Specifications
I Command Specifications
Principal commands that can be used with the Address Checker are given below.
See section §2 “Detailed Description of Commands” for details of commands.
(1) GO command: start execution of user program (always reset before starting)
(2) SET command: specifies bus master, specifies break at TRG detection
(3) TRC command: specifies history acquisition conditions
(4) TDMP command: displays history acquisition contents
(5) BB command: specifies bus break conditions
(6) ABORT command: aborts user program
II Address Error Detection (TRG Detection) Specifications
TRG detection is performed under the following conditions:
(1) Free access area: no TRG detection, accessible area
(2) Detection 1 area: area without memory allocation
During READ: read not allowed
During WRITE: write not allowed
(3) Detection 2 area: VDP1, SCSP, SMPC areas
When free bits and used bits are mixed
During READ: unconditional access (free access)
During WRITE: permits only “0” writes to free bits (bit-determined for D15 - D0)
When free bits and used bits are not mixed (free bit string=path width)
During READ: unconditional access (free access)
During WRITE: write not allowed
(4) Detection 3 area: SCU, CDROM, VDP2 areas
When free bits and used bits are mixed
During READ: unconditional access (free access)
During WRITE: unconditional access (free access)
When free bits and used bits are not mixed (free bit string=path width)
During READ: unconditional access (free access)
During WRITE: write not allowed
(5) 5FE00AC’H - 5FE00AF’H (in SCU area)
During READ: read not allowed
During WRITE: write not allowed
10
2. Detailed Descriptions of Commands
The commands are described in detail in this section. The format states the command
syntax. The following symbols are used in the format.
{x|y|z} Specify one of the items x, y and z that are within the brackets.
[x] The item within the square brackets can be omitted.
x … Parameters can be entered one after the other.
<> This is used to make the parameters easier to spot and has no special
meaning.
SEGA SATURN Address Checker Reference Manual 11
2.1 ! Execute Commands in the History Buffer
Format ! [ {numeral|character string} ]
Function Executes a command recorded in the command history.
Description Searches for and executes the command recorded in the command history
as follows.
! numeral Executes the nth command recorded in the com
mand history. If the value is negative, executes the
command located that number of commands
previous to the current command.
! character string Executes the last command executed that starts
with the character string.
! Executes the previously entered command.
The command history can be displayed with the HIS command.
Example Execute the 10th command in the command history.
>!10
Execute the last BB0 command executed.
>!BB0
12
2.2 : Edit and Execute Commands in the History Buffer
Format : [ {numeral|character string} ]
Function Edits and executes a command recorded in the command history.
Description Searches for and edits a command recorded in the command history as
follows and executes it upon entry of a carriage return.
; numeral Displays the nth command recorded in the
numerical command history and allows editing
and command entry. If the value is negative,
executes the command located that number of
commands previous to the current command.
; character string Displays the last command executed that starts
with the character string and allows editing
and command entry.
; Displays the previously entered command and
allows editing and command entry.
The command history can be displayed with the HIS command.
Example Execute the 10th command in the command history after editing:
>:10
Execute the last BB1 command executed after editing.
>:BB1
SEGA SATURN Address Checker Reference Manual 13
2.3 @ MS-DOS Call and Command Shell Execution
Format @ [[/P]<space><MS-DOS command>]
where /P indicates that key input for returning to the Address Checker is
omitted.
Function Calls COMMAND.COM of MS-DOS.
Description Shifts control to MS-DOS as described below.
When <MS-DOS command> is not specified, the screen display disappears
and the command line entry mode starts. When an MS-DOS command is
entered in this state, COMMAND.COM is called and control shifts to MS-
DOS. Upon returning from MS-DOS, the command line input mode re-
sumes. Enter the EXIT command or the escape key to return. The command
line input mode is managed by the Address Checker, so the command
history and command editing are available.
When <MS-DOS command> is specified, the specified MS-DOS command is
executed. Hitting any key thereafter will return to the Address Checker,
which will wait for command entry. When option /P is specified, control
returns to the Address Checker without any key input. A space is necessary
between “@” and “<MS-DOS command>”.
The amount of Address Checker that is MS-DOS resident is at least 40
Kbyte, provided there is a sufficient margin in protect mode memory.
When “Not enough memory for environment” is displayed when a batch
command is run, set the following environment variable before starting up
the Address Checker.
A>SET IENV=<n> ; <n> is a decimal numeral
The function of the environment variable IENV depends on the MS-DOS
version. In Ver. 3.1, specify 10 or more paragraph units where each is 16
bytes.
14
Example
A>SET IENV=40 ; Sets an environment variable area of 640 bytes
Starting from Ver. 3.3., specify 160 or more in byte units.
Example
A>SET IENV=640 ; Sets an environment variable area of 640 bytes
The IENV functionis not valid in MS-DOS ver. 2 or earlier. When
COMMAND.COM is not on the MS-DOS path, MS-DOS commands
cannot be executed.
Example Display the MS-DOS directory:
>@ DIR (Executes the DIR command of MS-DOS)
............. (The DIR command display is presented.)
.............
push any key! (To return)
When entry includes a reserved character of the Address Checker (;, <,
>, |, -), surround it in quotation marks.
>@ “dir | sort >>logging.dat”
Execute an MS-DOS command from the command line input mode:
>@ (Command input mode)
A:\>TIME (Executes various MS-DOS commands)
A:\>EXIT (Return with the EXIT command)
>GO (Address Checker commands usable again.)
SEGA SATURN Address Checker Reference Manual 15
2.4 < Command File Execution
Format < <filename>
Function Executes a command file.
Description Executes the specified <filename> as a command file.
Command files line up commands and parameters the same way they are
when Address Checker commands are input by key.
Notes:
• The following commands cannot be executed in command files.
<
AUTO
_ALIASU
_CMDU
Commands for macros
(IF {, } ELSE {, WHILE{,}, BREAK)
• Log files obtained with the LOG command can be run as command files. The difference
from AUTO commands is in whether the results of execution can be verified. See the
example.
• When control codes for window control (such as control Z) are found in the file data,
windows can be controlled.
Example When a log is obtained from the log file, it can be executed with either the
AUTO command or the < command.
>LOG ALOG (Starts getting log)
>TRC ALL
>GO
>_LOG (Finishes getting log)
........................
>< ALOG.LOG (Runs the command input recording file of the log file
as a command file)
16
2.5 ALIAS Define an Alias
Format ALIAS [ <alias> <character string> ]
Function Defines aliases for specified command character strings.
Description Defines the specified <character string> as <alias>. Thereafter, when the
alias character string is entered as command input, the specified character
string is run instead.
When the parameters are omitted, the <ALIAS> prompt is displayed, so
entering the <alias> and <character string> can define the alias. See the
example.
Example Define GO command under alias “RUN”:
>ALIAS RUN GO
Save alias definition in a temporary file and read the file to redefine them:
>ALIAS > ALIAS.SAV
.................
>ALIAS < ALIAS.SAV
SEGA SATURN Address Checker Reference Manual 17
2.6 ?ALIAS Display an Alias
Format ?ALIAS [ <alias> … ]
Function Displays the character string defined under the alias.
Description Displays the character string defined under the alias. When the alias is
omitted, all defined aliases are displayed. When no aliases are defined,
“alias not found” is displayed.
Example Display the character strings defined under CLEAR and RUN:
>?ALIAS CLEAR RUN <CR>
18
2.7 _ALIAS Delete an Alias
Format _ALIAS [ <alias> … ]
Function Deletes the alias definitions.
Description Deletes the alias definitions. When the alias is omitted, all defined charac-
ter strings are deleted.
Note:
• When the alias is omitted, aliases defined (in BMINIT.DAT) during startup are also
deleted. To delete all aliases the user has defined, use the _ALIASU command.
Example Delete the already defined alias commands CLEAR and RUN:
>_ALIAS CLEAR RUN <CR>
SEGA SATURN Address Checker Reference Manual 19
2.8 _ALIASU Delete User-Defined Alias
Format _ALIASU
Function Deletes all user-defined alias definitions.
Description Deletes all user-defined alias definitions.
Note:
This command is defined by the ALIAS command.
Example Delete the aliases defined by the user:
>_ALIASU
20
2.9 AUTO Execute Auto Retest
Format AUTO [ {/I|/V|/E} ] <filename>
Where
I: Log file command execution (default value)
V: Verify execution results
E: Display nonmatches of execution results
Function Executes an automatic retest.
Description Automatically re-runs a test after a first test is performed. Results can be
compared.
<filename> specifies the name of the log file specified by the LOG com-
mand. See the example. This command opens a file that adds the exten-
sion “.LOG” to the name of the specified log file. It reads the contents of
the file and automatically executes it as an Address Checker command. It
can also automatically compare the results of execution to the contents of
the log file (the log file name plus the extension “.OUT”). The following
can be specified as options.
I: Execute only the command without verifying results. The results of
execution are displayed (default value)
V: Display the results of execution while verifying. Also displays the
locations of verification errors.
E: Display only the locations of verification errors.
Notes:
• The following commands cannot be executed in an AUTO command.
<
AUTO
_ALIASU
_CMDU
Commands for macros
(IF {, } ELSE {, WHILE{,}, BREAK)
SEGA SATURN Address Checker Reference Manual 21
Example Record an executed command in the log file and automatically re-run the
command:
>LOG LOGSAV (Gets log. No extension added to file name.)
........................ (Executes various commands.)
>_LOG (Finishes getting log)
>AUTO LOGSAV (Automatically executes a re-test.)
Display the results of execution while verifying. When the results of
execution do not match, the result for the nonmatching lines and the log
information are displayed.
>AUTO/V LOGSAV
........................
<result> (Execution results where nonmatches occurred.)
........................
<log file> (Log contents where nonmatches occurred.)
........................
Save only the locations of nonmatches in a file.
>AUTO/E LOGA > ERRLOG
22
2.10 BELL Bell Sound
Format BELL
Function Sounds a bell noise.
Description Sounds a bell noise.
Example If the contents of register R0 is 0, sound a bell noise:
>cmd r0bell
?if { b*.r0 == 0
?bell
?}
?.
?macro name ? .
>
SEGA SATURN Address Checker Reference Manual 23
2.11 BB Set Path Break Point
Format BBn DA/<address>
where
n: Break point number (0 to 3)
Function Sets a bus break point.
Description Records the specified address as a bus break condition. Up to 4 bus break
points can be specified (0 to 3).
Example Break when address 1000 is accessed:
>BB0 DA/1000
24
2.12 ?BB Display Path Break Point
Format ?BB [n]
Function Displays the bus break points.
Description Displays the specified bus break point conditions. When n (break point
number) is not specified, all bus break conditions are displayed.
Example Display all bus break conditions:
>?BB
SEGA SATURN Address Checker Reference Manual 25
2.13 _BB Delete Path Break Point
Format _BB [n]
Function Deletes the bus break points.
Description Deletes the specified bus break point conditions. When n (break point
number) is not specified, all bus break conditions are deleted.
Example Delete the first bus break point:
>_BB1
26
2.14 CAT Display File Contents
Format CAT <filename>
Function Displays the file contents.
Description Displays the contents of the specified file.
Example Display the contents of file FILE.DAT:
>CAT FILE.DAT
SEGA SATURN Address Checker Reference Manual 27
2.15 CLS Clear Command Window Screen
Format CLS [ {1|2|3} ]
where
1: Command window screen clear
2: Screen refresh (same as [CTRL-])
3: Command window screen clear and screen refresh
(default)
Function Clears the command window and refreshes the Address Checker screen.
Description Clears the command display window and moves the cursor to the begin-
ning of the command window.
Example
>CLS
28
2.16 ECHO Display Character String
Format ECHO [<character string> …]
Function Displays a character string in the command window.
Description Displays the specified <character string> in the command window.
Spaces can be used if surrounded by quotations marks (“). Use the charac-
ters ¥n to get a carriage return. When no character string is specified as the
parameter, the suppression of the display specified with the _ECHO com-
mand is canceled.
Example Display a character string.
>ECHO “<THIS IS THE MESSAGE>¥n”
Cancel the suppression of displays in the command window.
>_ECHO
(Nothing is displayed even when a command is entered.)
( ECHO ) (Cancels the suppression of display by input of an ECHO
command. The ECHO command itself is not displayed.)
> (Now it is in the normal echo back and display mode.)
SEGA SATURN Address Checker Reference Manual 29
2.17 _ECHO Suppress Display
Format _ECHO
Function Suppresses display in the command window.
Description Restrains echo back and display of command execution results in the
command window. The display suppression is canceled by the ECHO
command.
Example Suppress display in the command window, then cancel.
>_ECHO
(Nothing is displayed even when a command is entered.)
( ECHO ) (Cancels the suppression of display by input of an ECHO
command. The ECHO command itself is not displayed.)
> (Now it is in the normal echo back and display mode.)
30
2.18 FK Define Function Keys
Format FK <numeral> <character string>
where
<numeral>: 1 to 20
<character string>: Up to 15 characters
Function Sets the function keys.
Description Defines a character string to the function key of the specified number.
<numeral> values 1 through 10 correspond to function keys F1 through
F10. <numeral> values 11 through 20 correspond to Shift F1 through Shift
F10.
Spaces can be used if surrounded by quotations marks (“). Use the charac-
ters ¥r to get a carriage return. The character string can be up to 15 charac-
ters.
Note: The FK command of BMINIT.DAT defines the initial settings of the function
keys. The contents of this file can be changed with an editor to set the function
keys as the user desires.
Example Define GO<CR> for F•1:
>FK 1 “GO¥r”
SEGA SATURN Address Checker Reference Manual 31
2.19 ?FK Display Function Key Definition Character String
Format ?FK [<numeral> … ]
where
<numeral>: 1 to 20
Function Displays the character strings defined for the function keys.
Description Displays the character string defined for the specified function key.
<numeral> values 1 through 10 correspond to function keys F1 through
F10. <numeral> values 11 through 20 correspond to Shift F1 through Shift
F10. When no number is specified, character string for all function keys
are displayed.
Example Display the character string defined for F10:
>?FK 10
FK10 “GO¥r”
32
2.20 _FK Delete Function Key Definition
Format _FK <numeral> [ … ]
where
<numeral>: 1 to 20
Function Deletes function key settings.
Description Deletes the function key definition for the specified function key.
<numeral> values 1 through 10 correspond to function keys F1 through
F10. <numeral> values 11 through 20 correspond to Shift F1 through Shift
F10.
Example Make F1 undefined:
>_FK 1
SEGA SATURN Address Checker Reference Manual 33
2.21 GO Execute Program
Format GO
Function Executes programs.
Description Clears resets and executes programs.
Example Execute:
>GO
34
2.22 HELP Display Command Syntax
Format HELP [ {<command|KEY|EXPR} ]
Function Displays the command syntax.
Description When <command> is omitted, a list of commands from the manual is dis-
played and the cursor can be used to select one whose syntax to display.
When KEY is specified, an explanation of the control keys and the like for
key input is displayed. When EXPR is specified, an explanation of the
expression is displayed.
To specify a command for a macro in <command name>, specify IF, WHILE or
BREAK. When <command> is specified, that command’s syntax is displayed.
The help window is used for the display, so the syntax can be viewed
while inputting the command.
The command list is recorded in BM.HLP as text, so it may be freely
added to or changed.
Note: Enclose the command file execution command “<“ in quotation marks (i.e.,
HELP “<“).
Example Display the GO command syntax:
>HELP GO
Display a command selected from the command list:
>HELP
SEGA SATURN Address Checker Reference Manual 35
2.23 LOG Start Log Acquisition
Format LOG <filename>
Function Records emulator commands and display results in a file.
Description Saves key input and its display results as log information in a file (log file).
Do not place an extension on the file name. When the log is fetched, an
automatic re-test can be run using the AUTO command. See the example.
Note Command input and execution results are recorded in a file <filename>.OUT.
Command input alone is recorded in a file <filename>.OUT.
Example Record an executed command in the log file and automatically re-run the
test:
>LOG LOGSAV (Gets log. No extension added to file name.)
........................ (Executes various commands.)
>_LOG (Finishes getting log)
........................
>CAT LOGSAV (Displays the previous execution results.)
........................
>AUTO LOGSAV (Automatically executes a re-test.)
36
2.24 ?LOG Display Log File Name
Format ?LOG
Function Displays the file being logged.
Description If logging is currently in progress, the log file name is displayed. If not
currently logging, nothing is displayed.
Example
>LOG LOGSAV (Gets log.)
........................ (Executes various commands.)
>?LOG (Displays the log file name.)
LOG LOGSAV
SEGA SATURN Address Checker Reference Manual 37
2.25 _LOG End Log Acquisition
Format _LOG
Function Finishes getting the log.
Description Finishes getting the log.
Example Finished getting the log:
>_LOG
38
2.26 MAN Manual Display
Format MAN [<command name>]
Function Displays the contents of the manual.
Description Displays the contents of the manual about the specified command. When
<command> is omitted, select an item with the cursor from the manual or
command lists to display the manual contents.
When KEY is specified, an explanation of the control keys and the like for
key input is displayed. When EXPR is specified, an explanation of the
expression is displayed. To specify a command for a macro in <command
name>, specify IF, WHILE or BREAK.
When <command> is specified, the manual section for that command is
displayed. When MAN <command> | MORE is input, the manual is displayed
a page at a time.
Searches for the specified command start with system commands and
then goes to user commands if the command is not found. The command
list is recorded in BM.HLP as text, so it may be freely added to or changed.
Note: When the command “<“ is specified in command file execution, enclose it in
quotation marks (i.e., MAN “<“).
Example Display the MAP command manual:
>MAN TDMP | MORE
Display after selecting from the command list:
>MAN
SEGA SATURN Address Checker Reference Manual 39
2.27 MIDX Create Index File for Message Display
Format MIDX { MAN | ERR }
MAN: System manual file
ERR: Error message file
Function Creates an index file that is used to display messages.
Description Creates an index file that is used to display messages. Select the following
message types using the parameters.
MAN: System manual file (file MAN.DOC)
ERR: Error message file (file ERR.H)
The index file is needed by the RIDX command. (The RIDX command is
required by the MAN, HELP and ERR commands.)
Example
>MIDX MAN
40
2.28 MORE MORE Format Display <Filter Command>
Format MORE
Function Controls output in page units.
Description Does a MORE command display. First, 1 page worth of character string
input by a pipe are displayed. Next, command input is waited for and
pipe output (display) continues according to the command entered from
the keyboard.
[n] <space> Displays the next n lines. When n is not specified, displays 1
page’s worth.
[n] <CR> Displays the next n lines. When n is not specified, displays 1
line’s worth.
[ n] S Displays 1 page’s worth after skipping the next n lines.
When n is not specified, skips 1 page’s worth.
Q Skips all lines and quits without displaying anything.
Example Display the trace buffer dump as a MORE display:
>TDMP | MORE
SEGA SATURN Address Checker Reference Manual 41
2.29 QUIT Quit Address Checker
Format QUIT
Function Quits the Address Checker.
Description Quits the Address Checker and returns to MS-DOS.
Example
>QUIT
A>
42
2.30 REM Comment Line
Format REM [<character string>]
Function A comment line.
Description The line is handled as a comment and does nothing. This is convenient to
use in the command file for comments.
Note: Do not use “;” in the character string.
Example
>REM EXECUTE GO
>GO
>REM THIS IS COMMENT!
SEGA SATURN Address Checker Reference Manual 43
2.31 RIDX Read Index File for Message Display
Format RIDX { MAN | ERR }
MAN: System manual file
ERR: Error message file
Function Reads the index files that are used to display messages.
Description Reads the index files that are used to display messages. Select the follow-
ing message types using the parameters.
MAN: System manual file (file MAN.DOC)
ERR: Error message file (file ERR.H)
Index file reading is required by the MAN, HELP and ERR commands. This
command is also required when the user is adding expansion commands.
Example
>RIDX MAN
44
2.32 SET Set Address Checker Operating Environment
Format SET <environment type>/<mode> …
<environment type>/<mode>
BM/ {ALL|SH2M|SH2S|SCU}
TRG/ {BRK|CNT}
DSP/ {NRM|SPD} (for DOS/V)
Function Sets the operating environment of the Address Checker.
Description Sets the operating environment of the Address Checker.
The following can be specified for <environment type>:
BM Bus master
TRG Break when trigger is detected
DSP Display speed mode (for DOS/V)
The following can be specified for <mode>:
(1) BM
ALL All (SH2M, SH2S, SCU)
SH2M SH2 (master)
SH2S SH2 (slave)
SCU SCU
(2) TRG
BRK Break
CNT Don’t break
(3) DPS
NRM Standard display mode
SPD Fast display mode (rewrites entire screen when com-
mand ends)
The emulator operating environment information saved in the file can be
read and the same status operating environment set. See the example.
Example Break upon trigger detection with an SH2 (master) as bus master:
>SET BM/SH2M TRG/BRK
SEGA SATURN Address Checker Reference Manual 45
2.33 ?SET Display Address Checker Operating Environment
Format ?SET
Function Displays the status of the Address Checker’s operating environment.
Description Displays the status of the Address Checker’s current operating environ-
ment.
The emulator operating environment information saved in the file can be
read and the same status operating environment set. See the example.
Example Display current Address Checker operating environment:
>?SET
SET BM/ALL TRG/CNT
Save the Address Checker operating environment once to a file, then read
the saved operating environment and set control with the same condi-
tions:
>?SET> SET.SAV (Save current operating environment to file)
................. (Execute various commands.)
> < SET.SAV (Read the previously saved operating environment
from file and set the operating environment)
46
2.34 STOP Stop
Format STOP
Function Aborts the program.
Description Stops an executing program.
Example Stop program execution:
>STOP
BREAK STOP!
PC =00001000 SR=00000000:———**—
SEGA SATURN Address Checker Reference Manual 47
2.35 TDMP Display Trace Data
Format TDMP
[<first frame number>[<last frame number>]]
Function Displays the trace information.
Description Displays the trace information fetched from trace memory.
Frame numbers are given in bus cycle units. The last bus cycle becomes
frame 1 and the oldest frame has the largest number. The command dis-
plays the contents of trace memory from the <first frame number> to the
<last frame number>. When <first frame number> and <last frame
number> are both omitted, the entire contents of the trace memory are
displayed.
When searching large amount of trace contents, it is connected to first
output the trace contents to a file, then display them with the VIEW com-
mand or use the editor with the @ command. See the usage example.
The display format is shown below.
+— Frame number
| +— “+” displayed when trigger detected
| | +— Address/bus width
| | | +— Data
| | | | +— Access space
| | | | | +— Bus master
| | | | | | +— BS signal
| | | | | | | +— CPU status
| | | | | | | | +— DMA ack signal
| | | | | | | | | +— SDRAM command cycle
f-no addr data cs bm bs st dack sdram
00012+ 000010EB/16 0124 CS0 SH2M WR
• Access space
CS0 CS0 area
CS1 CS1 area
CS2 CS2 area
CS3 CS3 area
• Bus master
SH2M SH2 (master)
SH2S SH2 (slave)
SCU SCU
48
• CPU status
Displays SH operating status
RD Data read
WR Data write
• DMA ack signal
DACK0 DACK0
DACK1 DACK1
Example Do a MORE display of all trace contents:
>TDMP | MORE
Display the last 12 frames from the final trace:
>TDMP 1 12
SEGA SATURN Address Checker Reference Manual 49
2.36 TRC Set Trace Conditions
Format (1) TRC ALL <trace control>
(2) TRC SMP <trace control>
(3) TRC TRG <trace control>
Format of <trace control>: FUL/ {CNT|STP} END/ {CNT|BRK}
Function Sets the trace conditions.
Description Sets the specified conditions as trace conditions. When the trace get condi-
tions specified by <trigger condition> are reached during program execu-
tion, the trace get starts according to <trace control>.
(1) For expression (1)
TRC ALL <trace control>
When ALL is specified as the first parameter, the get of the trace information
starts simultaneously with program execution.
(2) For expression (2)
TRC SMP <trace control>
When SMP is specified as the first parameter, trace information is gotten only
for trigger detections.
(3) For expression (3)
TRC TRG <trace control>
When TRG is specified as the first parameter, the get of the trace information
starts simultaneously with program execution and continues until a trigger
is detected.
(4) Explanation of <trace control>
Trace gets are controlled according to <trace control> as described below.
FUL/ {CNT|STP}
Specifies processing when the trace buffer becomes full.
CNT (default value): Continues the trace get. The trace buffer is used
cyclically and the oldest trace information is erased.
STP: Stops the trace get.
END/ {CNT|BRK}
Specifies processing when the trace get is stopped.
CNT: Continues without breaking the execution of the user program.
BRK (default value): Breaks execution of the user program.
Trace conditions can be temporarily saved to a file and then read later from
the file to reset the same conditions. See the example.
Note: When this command is used, the current measured values of the 2 (hardware)
bus counters are cleared to 0 (even when an error occurs during setting).
50
Example Always get the trace. Break the program when the trace buffer becomes
full.
>TRC ALL FUL/STP END/BRK
Always get the trace. Cycle the trace information gets when the buffer
becomes full and continue the program.
>TRC ALL FUL/CNT
Temporarily save trace conditions to a file, then read the conditions from
the file and set them again:
>?TRC >TRACEX.SAV (Saves the current trace conditions to a file.)
....................... (Execute various emulation commands.)
><TRACEX.SAV (Reads the trace conditions from the file and
sets them again.)
SEGA SATURN Address Checker Reference Manual 51
2.37 ?TRC Display Trace Conditions
Format ?TRC
Function Displays the trace conditions.
Description Displays the current trace conditions. Trace conditions can be saved to a
file and reset later.
Example Temporarily save trace conditions to a file, then read the conditions from
the file and set them again:
>?TRC >TRACEX.SAV (Saves the current trace conditions to a file.)
....................... (Execute various emulation commands.)
><TRACEX.SAV (Reads the trace conditions from the file and
sets them again.)
52
2.38 _TRC Delete Trace Conditions
Format _TRC
Function Deletes the trace conditions.
Description Renders the currently set trace conditions invalid.
Example Delete the currently set trace conditions:
>_TRC
SEGA SATURN Address Checker Reference Manual 53
2.39 TSET Set Trigger Detection Condition
Format TSET
Function Sets trigger detection condition.
Description Sets trigger detection condition according to the TRGMAP.DAT file con-
tents.
This is used to reset the trigger detection condition after updating the
TRGMAP.DAT file.
Example Update the TRGMAP.DAT file and reset the trigger detection condition.
54
2.40 VRAM Store Display Contents to a File
Format VRAM [<filename>]
Function Saves the contents of the current display to a file.
Description Reads the contents of the currently displayed VRAM and saves them to a
file. When PRN is specified as the file name, a hard copy goes to the printer.
(Starting from MS-DOS V3.3, no hard copy can be made unless
DEVICE=PRINT.SYS in CONFIG.SYS.) When the file name is omitted, the
file is named VRAM.TAG.
Example Saves the contents of the current display to a file called HCOPY:
>VRAM HCOPY
SEGA SATURN Address Checker Reference Manual 55
3. Detailed Contents of TRGMAP.DAT
Among the System Program files, TRGMAP.DAT is the file that defines the address
maps which dictate the Sega Saturn System trigger condition. The file contents are as
follows:
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Address Checker Trigger Definition File
; Condition F: Free
; Condition A: Access prohibited
; Condition R: Read Only
; Condition W: Write Only
; Condition L: See List
;
; The condition settings are in 4K-bytes. For detailed settings,
; specify L, then refer to the List.
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
; Address Condition Bus Width
00000000 F 16
00080000 A
00100000 L
L2
; Set unused bits to 1. (When all bits are unused, write is prohibited.)
; R denotes Read Only; W denotes Write Only
;
; 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
;
; SMPC Register
000 FF 00W FF 00W FF 00W FF 00W FF 00W FF 00W FF 00W FF FF
010 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 00W
020 FF 00R FF 00R FF 00R FF 00R FF 00R FF 00R FF 00R FF 00R
030 FF 00R FF 00R FF 00R FF 00R FF 00R FF 00R FF 00R FF 00R
040 FF 00R FF 00R FF 00R FF 00R FF 00R FF 00R FF 00R FF 00R
050 FF 00R FF 00R FF 00R FF 00R FF 00R FF 00R FF 00R FF 00R
060 FF 00R FF FE FF FF FF FF FF FF FF FF FF FF FF FF
070 FF FF FF FF FF 80 FF 80 FF 80W FF 80W FF FEW FF FEW
END
00100080 A
00101000 A
00180000 F
•
• The following addresses are defined through 7FFFFFF.
•
56
Description “;” denotes comments.
“address” denotes the starting address.
“Condition” denotes the trigger detection condition; “F” denotes Free
Access; “A” denotes Access prohibited; “R” denotes Read Only; “W”
denotes Write Only; “L” denotes See List. In the List, conditions can be
specified in single bytes (this is normally in 4 bytes.)
“Bus Width” denotes the effective bus width. When abbreviated, the
previous setting will be enabled. The List allows the selection of unused
bits, Read Only, and Write Only. All unused bit addresses prohibit Write.
The List starts with the L row or the L2 row and ends with the END row.
When the List starts with the L2 row, for addresses where unused bits and
used bits coexist, the unused bit “1” Write is prohibited.
There are Lists for 8 bits, 16 bits, and 32 bits.
SEGA SATURN Address Checker Reference Manual 57
4. Error Messages
Error messages are displayed in Japanese, but error messages that require annotation
and how to deal with them are described below.
• The contents of the configuration file are illegal.
See section 2.6, “Setting the Configuration,” and correct the contents of the file.
• Hardware is not connected.
Check to see if the power switch to the Address Checker is on. Also check to see if
the interface board is connected to the host personal computer. Finally, check that
BANK is correct.
58
SEGA SATURN Address Checker Reference Manual 59
60
Addendum: Register Names
SMPC (System Management & Peripheral Control)
Saturn system reset management; Control Pad and other peripheral devices interface
management. Each has a backup battery and real-time clock.
SCSP (Saturn Custom Sound Processor)
Sound source LSI for game, which integrates PCM sound source and DSP for sound.
VDPI (Video Display Processor 1)
LSI for drawing sprites and polygons. The VRAM and frame buffer are connected and
data is thus transferred. Also, data is sent to VDP2 when requested.
VDP2 (Video Display Processor 2)
Manages scroll planes and includes priority functions.
SCU (System Control Unit)
Includes CPU I/F, A-Bus I/F, and B-Bus I/F Controllers.
Includes DMA controller, interrupt controller, and DSP.
SEGA SATURN Address Checker Reference Manual 61
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68
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70
W
W
W
SEGA SATURN Address Checker Reference Manual 71
72
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