Topic #4 - SIM ARM - Part 3
Topic #4 - SIM ARM - Part 3
COEN 311
Computer Organization & Software
Topic #4 – Part 3
Simple Processor Example: SimARM
while (condition)
{
my_loop_contents();
}
Note: the condition may never be met/the loop does not run,
i.e., it is possible to not even enter the loop
While Loops in SimARM
Write a SimARM Assembly Program that
implements the following pseudocode:
x = 8;
i = 0;
while (i < 100)
{
i = i + 1;
x = x + x;
}
Remember that in a while loop, the condition is checked before
even entering the loop!
While Loops in SimARM
loop: cmp R0, R1 @ Compare i to 100
beq exit @ Exit if i = 100
bgt exit @ Exit if i > 100
add R0, R0, #1 @ i = i + 1
add R2, R2, R2 @ x = x + x
str R2, [R3] @ Update x in mem
b loop @ Loop back
exit: ...
Assume: i=0 in R0; 100 in R1; x=8 in R2; memory loc. of X in R3
While Loops in SimARM
loop: cmp R0, R1 @ Compare i to 100
beq exit @ Exit if i = 100
bgt exit @ Exit if i > 100
add R0, R0, #1 @ i = i + 1
add R2, R2, R2 @ x = x + x
str R2, [R3] @ Update x in mem
b loop @ Loop back
exit: ...
Assume: i=0 in R0; 100 in R1; x=8 in R2; memory loc. of X in R3
While Loops in SimARM
.thumb
.globl _start
_start: ldr R3, =i @ Get loc of i
ldr R0, [R3] @ Load i in R0
ldr R3, =X @ Get loc of x
ldr R2, [R3] @ Load x in R2
sub R1, R1, R1 @ Clear R1
add R1, R1, #100 @ R1=100 for cond. check
loop: cmp R0, R1 @ Compare i to 100
beq exit @ Exit if i = 100
bgt exit @ Exit if i > 100
add R0, R0, #1 @ i = i + 1
add R2, R2, R2 @ x = x + x
str R2, [R3] @ Update x in mem
b loop @ Loop back
exit: ldr R3, =i @ Get loc of i
str R0, [R3] @ Store i in memory
b .
x: .word 8
i: .word 0
Do-While Loops in General
Do-while loops where the loop is executed at least
once, and the condition is checked after each pass:
do
{
my_loop_contents();
} while (condition);
Do-While Loops in SimARM
Write a SimARM Assembly Program that implements
the following pseudocode:
x = 8;
i = 0;
do
{
i = i + 1;
x = x + x;
}(i < 100)
Remember that in a do-while loop, the loop is executed once
before the condition is checked!
Do-While Loops in SimARM
do: add R0, R0, #1 @ i = i + 1
add R2, R2, R2 @ x = x + x
str R2, [R3] @ Update x in memory
cmp R0, R1 @ Compare i to 100
beq exit @ Exit if equal
bgt exit @ Exit if i > 100
b do @ Loop back
exit: …
i=1
true
i <= 100 Body of loop i ++
false
For Loops in SimARM
Write a SimARM Assembly Program that implements
the following pseudocode:
x = 8;
for (i = 1 to 100)
{
x = x + x;
}
For Loops in SimARM
loop: cmp R0, R1 @ Compare i to 101
beq exit @ Exit if i = 101
add R0, R0, #1 @ i = i + 1
add R2, R2, R2 @ x = x + x
str R2, [R3] @ Update x in memory
b. loop @ Loop back
exit: …
uint n = 12;
uint divisor = 5;
uint quotient;
uint remainder;
remainder = n;
SimARM Assembly Programing
Write a SimARM assembly program to divide two unsigned
numbers using a loop.
uint n = 13;
uint divisor = 5;
uint quotient;
uint remainder;
remainder = n; remainder = 3
SimARM Assembly Program
.thumb
.globl _start
_start: ldr R0, =n @ Get loc of n
ldr R1, [R0] @ load n in R1
ldr R0, =divisor @ Get loc of divisor
ldr R2, [R0] @ Load divisor in R2
sub R3, R3, R3 @ Clear R3 for quotient
loop: cmp R1, R2 @ Compare R1 to R2
blt endloop @ Branch if R1 < R2
sub R1, R1, R2 @ N – divisor
add R3, R3, #1 @ Increment quotient
b loop @ Loop again
endloop: ldr R0, =quotient @ Get loc of quotient
str R3, [R0] @ Store quotient
ldr R0, =remainder @ Get loc of remainder
str R1, [R0] @ Store remainder
ldr R0, =n @ Get loc of n
str R1, [R0] @ Store n
b . @ End prog
n: .word 13
divisor: .word 5
quotient: .space 4
remainder: .space 4
Mission Accomplished!
SimARM Assembly Program
.thumb
.globl _start
_start: ldr R0, =n
ldr R1, [R0]
ldr R0, =divisor
ldr R2, [R0]
mov R3, #0
loop: cmp R1, R2
blt endloop
sub R1, R1, R2
add R3, R3, #1
b loop
endloop: ldr R0, =quotient
str R3, [R0]
ldr R0, =remainder
str R1, [R0]
ldr R0, =n
str R1, [R0]
b .
n: .word 13
divisor: .word 5
quotient: .space 4
remainder:.space 4
1
2
3 0000 480F 0100 1000 0000 1111
4 0002 6801 0110 1000 0000 0001
5 0004 480F 0100 1000 0000 1111
6 0006 6802 0110 1000 0000 0010
7 0008 1ADB 0001 1010 1101 1011
8 000a 4291 0100 0010 1001 0001
9 000c DB02 1101 1011 0000 0010
10 000e 1A89 0001 1010 1000 1001
11 0010 3301 0011 0011 0000 0001
12 0012 E7FA 1110 0111 1111 1010
13 0014 4809 0100 1000 0000 1001
14 0016 6003 0110 0000 0000 0011
15 0018 4809 0100 1000 0000 1001
16 001a 6001 0110 0000 0000 0001
17 001c 4801 0100 1000 0000 0001
18 001e 6001 0110 0000 0000 0001
19 0020 E7FE 1110 0111 1111 1110
20 0022 0000000D 0000 0000 0000 0000 0000 0000 0000 1101
21 0026 00000005 0000 0000 0000 0000 0000 0000 0000 0101
22 002a 00000000 0000 0000 0000 0000 0000 0000 0000 0000
23 002e 00000000 0000 0000 0000 0000 0000 0000 0000 0000
SimARM Machine Program
0000 0000 0000 0000 0100 1000 0000 1111
0000 0000 0000 0010 0110 1000 0000 0001
0000 0000 0000 0100 0100 1000 0000 1100
0000 0000 0000 0110 0110 1000 0000 0010
0000 0000 0000 1000 0001 1010 1101 1011
0000 0000 0000 1010 0100 0010 1001 0001
0000 0000 0000 1100 1101 1011 0000 0010
0000 0000 0000 1110 0001 1010 1000 1001
0000 0000 0001 0000 0011 0011 0000 0001
0000 0000 0001 0010 1110 0111 1111 1010
0000 0000 0001 0100 0100 1000 0000 1001
0000 0000 0001 0110 0110 0000 0000 0011
0000 0000 0001 1000 0100 1000 0000 1001
0000 0000 0001 1010 0110 0000 0000 0001
0000 0000 0001 1100 0100 1000 0000 0101
0000 0000 0001 1110 0110 0000 0000 0001
0000 0000 0010 0000 1110 0111 1111 1110
0000 0000 0010 0010 0000 0000 0000 0000 0000 0000 0000 1101
0000 0000 0010 0110 0000 0000 0000 0000 0000 0000 0000 0101
0000 0000 0010 1010 0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0010 1110 0000 0000 0000 0000 0000 0000 0000 0000
SimARM Machine Program
0000 0000 0000 0000 0100 1000 0000 1111
0000 0000 0000 0010 0110 1000 0000 0001
0000 0000 0000 0100 0100 1000 0000 1100
0000 0000 0000 0110 0110 1000 0000 0010
0000 0000 0000 1000 0001 1010 1101 1011
0000 0000 0000 1010 0100 0010 1001 0001
0000 0000 0000 1100 1101 1011 0000 0010
0000 0000 0000 1110 0001 1010 1000 1001
0000 0000 0001 0000 0011 0011 0000 0001
0000 0000 0001 0010 1110 0111 1111 1010
0000 0000 0001 0100 0100 1000 0000 1001
0000 0000 0001 0110 0110 0000 0000 0011
0000 0000 0001 1000 0100 1000 0000 1001
0000 0000 0001 1010 0110 0000 0000 0001
0000 0000 0001 1100 0100 1000 0000 0101
0000 0000 0001 1110 0110 0000 0000 0001
0000 0000 0010 0000 1110 0111 1111 1110
0000 0000 0010 0010 0000 0000 0000 0000 0000 0000 0000 1101
0000 0000 0010 0110 0000 0000 0000 0000 0000 0000 0000 0101
0000 0000 0010 1010 0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0010 1110 0000 0000 0000 0000 0000 0000 0000 0000