Unit-5

Input- 0000output :-
An interface is a physical connection between two devices. It provides method for transferring
information between internal storage such as memory 4 CPU register & external i/o devices.
Peripherals connected to a computer need special communication links for interfacing them with
the CPU. The purpose of the communication link is to resolve the different that exist between the
central computer 4 each peripheral. The differences are:-

1. Peripherals are electro mechanical 4 electromagnetic devices 4 there manor of operation

is different from the operation of the CPU & memory which are electronic devices. So a
conversion of signal values may be a required.
2. The i/o devices are normally slower than memory & CPU.
3. The operation of the peripherals must be synchronize(connected) with the operation of
the CPU 4 memory.
4. Data formats 4 word length in peripheral different from the word length 4 data format in
the CPU.
5. The operation of each peripheral must be control so as not to disturb the operation of the
CPU 4 the other peripheral connected to the CPU.
i/o bus and interface:-
data bus Address bus Control bus

processor
processor

interface Interface Interface Interface

Keyboard Printer Magnetic Magnetic

disk tape

The i/o bus consists of data lines, address lines 4 control lines. Each peripheral device has
associated with an interface. Each interface decodes the address 4 received from the i/o bus,
interoperate them for the peripherals 4 provides signals from the peripheral controller. It also
synchronise the data flow 4 supervises the transform between peripheral 4 data. Each peripheral
has its own controller that operate the particular electro mechanical device. The i/o bus from the
processor attached to all peripheral interfaces to communicate to all peripheral interfaces to
communicate with a particular device. The processor places a device address on the address line .
When the interface detects its own address it activates the path between the bus line & the device
that it controls. All peripherals whose address dose not correspond to the address in the bus are
disabled by their interface.
Modes of data transform or Transmission:-

What is data transmission ?

It refers to movement of bits over some physical medium connecting two or more digital devices.
There are two option of transmission of bits. I.E-
 Parallel transmission
 Serial Transmission
Parallel Transmission

00
1
0

When data transmitted a byte or a word through many wires with one wire carrying each
bit this parallel transmission or communication.
1. Serial Transmission:-

0100101 01001010

Communication is in which the bit send one after another in a series. The measure
differentials in serial data transfer is to detect the beginning of each new character in the
bit Stean . If it is unable to active this it will not be able to interoperate the incoming bit
steam correctly. Timing refer to how the receiving system knows the it receives the start
of bits 4 the end of the bits.
Stream:- Moved in a continuous flow
Synchronised:- control
Synchronous:- Occurring at the same time

 These are two measure timing schemes are used.

1. Asynchronous
2. Synchronous

Asynchronous Transmission:-
1. It sends only one character at a time. Where a character is either a letter of the alphabets
or numbers.
2. Each character has a start bit 4 ending each character has one or more stop bits.
 This transmission is simple 4 expensive to implement. It is used mainly with serial parts
i, e keyboard 4 mouse . It requires start 4 stop bits. For example: Every byte of data add
one start 4 two stop bits. 11 bits are require to send 8 bits.
 Asynchronous transmission is normally only use for speed up to 3000 bit per second.

Diagram:-

0 0 1 0 1 0 1 00 11
0 1 0 1 0 1 00

Start
Start bit
bit Data--00101010
Data-- 00101010 stopbit
stop bit

a) When a character is not being sent, the state in-1.

b) The start bit always 0.
c) All bits follow the start bit.
d) After the last bit of the character in transmitted the state will be 1 state.
e) 1 or 2 bits are stop bits.
f) Stop bit always 1.

2. Synchronous Transmission :
It sends one packet of character at a time. A start packet is used to tell receiving oration that
a new packet of character is arriving 4 to synchronise, the receiving station internal clock proceeds
each station. The packets also have end frames or packet to indicate the end of the packet. The
packet can contain up to 6400 bits. Both starts frames have a special bit sequence that receiving
station recognises to indicate the start 4 end of the packet. The start 4 end frames may be only 2
bite each. This transmission is more efficient us a little us only for frames (3 start 4 1 stop) are
required transmit up to 64 kilo bits

Synchronous transmission is more difficult 4 expensive

Diagram:-

3byte start 1 byte

frame Stop frame

Uniform interval between character

In digital electronics both synchronous and Asynchronous

transmission are the serial data transmission in which data transmitted between sender and
receiver based on the clock pulie used for synchronization.
 Synchronous Transmission Asynchronous Transmission

Deference:-It in the type of transmission in Deference:- If it is the type of transmission in

Which a common clock pulse in shared between which the sender and receiver have their own
Transmitter and receiver to synchronized external clocks.
Communication. Data unit:- Data sent in the form of bytes or
Data unit:- Data sent in the form of frames or characters so the data unite in byte/character
blocks so the data unite is frame/block. Performance:- Transmission is slower because
Performance:- Due to common clock sender, receiver has their input clocks.
transmission is faster as compared to asynchrony. Cost:-Cheaper
Cost:- costlier Complexity:- complex to design.
Complexity:- Easy to design

In synchronous transmission data can be transmitted between two points in three different
modes.

1. Simplex: It carries information is one direction only receive cannot communicate with sender.

EX: Radio and TV.

I/O Operation :- An E/p operation is inputting data to a device form memory where CPU wrote
et.

I/O operation can be done using three technique.

1. Programmed I/O

2. interrupt drive I/O

3. direct memory access (DMA)

Programmed I/O:

In programmed I/O data exchanged between processer and I/O devices (peripherals). Each
data transfer is involving CPU for every transection.

The processor directly controls the I/o operation , sending a r/w command and transferring the
data. When the processor issues a command to the I/O module, a lot of processor’s time is wasted
.

In programmed I/O method, the CPU stays is a program until the I/O unit indicates that it is
ready for data transfer. This is a time consuming process.

It can be avoided by using an interrupt facility.

 I/O commands
I/O
CPU
device

data Data

MEMORY

Memory mapped I/O

Interrupt driven I/O :

Interrupt driven driven I/O issues the I/O command to the I/O interface and then immediately .

Control of the CPU over to an other program while the I/O es being performed. This technique
is used to overcame the limitation of programmed I/O.

Basic operation of interrupt driven I/O

 CPU issues read command.
 I/O module gets data from peripherals CPU does other work.
 I/O module interrupt CPU.
 CPU requests data.
 I/O model transfer data.

Issue read command I/O Do

CPU
to I/O module something

Read states of I/O Interrupt I/O CPU

module

Chec Error condition

k
Ready

Read word from I/O

I/O CPU

Write word Into

CPU Memory
Memory

N
Don
e?

Next Instruction
 Advantage: 1. Fast

2. effect

Disadvantage: Can be tricky and complicated

Programmed I/O Interrupt driven I/O

1. It is a time consuming process. H keeps 1. It is overcome the time consuming process
processor busy needlessly and wastage of of programmed I/O.
CPU time. 2. It is faster then programmed I/O.
2. It is treated as slow module.

DMA(Direct Memory Access):-

DMA means CPU grates I/O module authority to read from or write to memory without
involvement. DMA module itself controls exchange of data behaviour main memory and the I/O
devices. CPU is only involved at the beginning and end of the transfer and interrupted only after
entire block transferred.

DMA needs special hardware called DMA controller that manages data transfer. The controller
and programmed with where to r/w the data.

CPU Main memory

Data bus

DMA

Device Device Device

Controller controller Controller

USB drive Disk Printer

1. Device Driver is instructed to transfer disk data to a buffer address x.

2. Device driver then instruct disk controller to transfer data to buffer.
3. Disk controller states DMA transfer.
4. Disk controller sends each byte to DMA controller.
 5. DMA controller transfers bytes to buffer.
6. DMA interrupts CPU to signal transfer completion.

IOP(Input/output processor)
Draw the functional block diagram of a commercially available input/output processor and
explain.
i. An input- output processor (IOP)may be class field as a processor with direct memory access
capability that communicate with I/O devices. Each configuration may have two (or) more IOP’s.
ii. IOP’S take care of input and output tasks, reliving the CPU from the house keeping chores involved
in I/O transfers.
iii. A processor that communicates with remote terminals over telephone and other communication
media in serial fashion is called a data communication processor(DCP).
iv. IOP instruction are specifically designed to facilitate I/O translates. IOP can performed processing
takes like arithmetic, logic, branching and coda translation.
v. In the hollow diagram IOP provides a path for transfer of data between various peripheral device
and memory unite.
vi. CPU Initiates the operation of IOP after that it will work independently.

Central Processing
unit (CPU) Peripheral devises

Memory unit Memory bus pd pd pd pd

Input Output
processing (IOP)

I/O Bus

vii. After input data are assembled into memory word they are transferred from IOP.
a. The communicate between IOP and devices connect to its similar to the program control
method of transfer.
b. The communicate with memory is similar to DMA method.
c. The way in which CPU 4 IOP communicate is depends on the levels of sophistication
included in the system.