HOW TO DEVELOP WITH NTAG 5

NTAG 5 WEBINAR SERIES

PABLO FUENTES
FEBRUARY 2020

PUBLIC
 Agenda

• NTAG 5 Family Overview

• General development considerations
• Using GPIO features
• Using PWM features
• Using Pass-through mode
• Using I2C master mode
• More support

1
 NTAG 5 Family Overview

2
NTAG 5 Family Overview
Positioning

NTP5210 NTP5332 / NTP5312 NTA5332

ISO/IEC 15693

PWM / GPIO I2C Interface Smallest

Field detection Pass-through Antenna
Energy Harv. AES auth Footprint
switch link (ALM)
boost

ISO15693
ISO15693 Long range
ISO15693 Long range 256 byte SRAM
Long range PWM / GPIO AES auth
Energy Harvesting Standardized Pass-through
ISO/IEC 14443

I2C Interface
Field detect Energy Harvesting
NFC Silence
Pass-through

3
NTAG 5 Family
• Control and dim LEDs
NTAG 5 • Calibrate reference current without MCU
switch • Verify authenticity of the device

• Draw power from the NFC reader to supply sensors

NTAG 5 • Read out sensor information without an MCU*
link • Secure sensor interaction

NTAG 5 • Smallest footprint antenna

boost • Enables NTAG 5 link features for tiny solutions

4
* only NTP5332 supports I²C master
NTAG 5 Family Overview
Development kits
NTAG 5 link Evaluation board (OM23510ARD) NTAG 5 boost Evaluation board (OM23511ARD)
• Integrating NTAG 5 link (NTP5332) • Integrating NTAG 5 boost (NTA5332)
• 54 x 27 mm Plutus antenna • 10 x 10 mm Active antenna
• Jumper to select between different supply voltages • Jumper to select between different supply voltages
• Hard-power-down button • Hard-power-down button
• Arduino header • Arduino header
• Easy to access wired interface signals through pins • Easy to access wired interface signals through pins

5
 General development
considerations

6
General development considerations
Content
• Main supported commands (NFC interface)
• Configuring NTAG 5 wired interface
• Setup used for examples

7
General development considerations
Main commands supported (NFC interface)
WRITE_CONFIG (Command code C1h)
Flags WRITE_CONFIG Manuf. Code UID (optional) Block Address Data CRC16 Command

8 bits 8 bits 8 bits 64 bits 8 bits 32 bits 16 bits

Response Error Code

8 bits / 16 bits

READ_CONFIG (Command code C0h)

Flags READ_CONFIG Manuf. Code UID (optional) Block Address Nº of blocks CRC16 Command

8 bits 8 bits 8 bits 64 bits 8 bits 8 bits 16 bits

Response Flags Data CRC16

8 bits Nº of block x 32 bits 16 bits

For Read Single Block and Write Single Block (EEPROM access) refer to ISO15693 or
NFC Forum Type 5 tag specifications
8
For more information on Flags and Error code refer to ISO15693 specifications
General development considerations
Configuring wired interface
NTAG 5 wire interface must be configured depending on the application. It can be configured via:
• NFC Interface (Recommended)
‐ Always configurable through NFC interface
• I2C Interface
‐ Only available if preconfigured as I2C Slave
‐ Configuration not reversible through I2C interface

Registers/Config

* I2C interface not supported in NTAG 5 switch

version

** I2C master only supported in NTP5332 and

NTA5332

9 NTAG 5
General development considerations
Configuring wired interface Session register address

Block Address
Byte 0 Byte 1 Byte 2 Byte 3
NFC I2 C
• Wired interface is configured through USE_CASE_CONF 37h 1037h
parameter from Configuration bytes block. CONFIG_0 CONFIG_1 CONFIG_2 RFU
A1h 10A1h

Most of the wired interface registers have both Bit Name Value Description
configuration and session registers. 0b ARBITER_MODE needs to be set after startup
7 EH_ARBITER_MODE_EN
1b ARBITER_MODE is set automatically in any case after startup
Session registers:
0b PLM
ü Changes take effect immediately 6 ALM_PLM
1b ALM mode when supplied by Vcc else PLM (default)
x Not persistent after reset 00b I2C slave (default)

Configuration settings: 01b I2C master

4-5 USE_CASE_CONF
ü Value remains valid after chip reset. 10b GPIO / PWM

x No immediate effect 11b All host interface functionality disabled

00b Normal mode (default)
01b SRAM mirror mode
2-3 ARBITER_MODE
10b SRAM pass-through mode
11b SRAM PHDC mode
0b SRAM not accessible (default)
1 SRAM_ENABLE
1b SRAM is available (when Vcc supplied)
0b Data transfer direction is I2C to NFC (default)
10 0 PT_TRANSFER_DIR
1b Data transfer direction is NFC to I2C
General development considerations
Setup used for examples
KW41Z development board (FRDM-KW41Z)
NTAG 5 link evaluation board
• NXP’s ultra-low-power KW41Z Wireless MCU
• Fully compliant Bluetooth v4.2 Low Energy
• 4-Mbit external serial flash memory for OTAP support
• Two LED indicator (One RGB and one red)
• Two push-button switches
• Two TSI buttons
• Arduino compatible header

FRDM-KW41Z development board

Arduino header
connection

11
 Using GPIO features

12
General development considerations
Configuring wired interface Session register address

Block Address
Byte 0 Byte 1 Byte 2 Byte 3
NFC I2 C
• Wired interface is configured through USE_CASE_CONF 37h 1037h
parameter from Configuration bytes block. CONFIG_0 CONFIG_1 CONFIG_2 RFU
A1h 10A1h

Most of the wired interface registers have both Bit Name Value Description
configuration and session registers. 0b ARBITER_MODE needs to be set after startup
7 EH_ARBITER_MODE_EN
1b ARBITER_MODE is set automatically in any case after startup
Session registers:
0b PLM
ü Changes take effect immediately 6 ALM_PLM
1b ALM mode when supplied by Vcc else PLM (default)
x Not persistent after reset 00b I2C slave (default)

Configuration settings: 01b I2C master

4-5 USE_CASE_CONF
ü Value remains valid after chip reset. 10b GPIO / PWM

x No immediate effect 11b All host interface functionality disabled

00b Normal mode (default)
01b SRAM mirror mode
2-3 ARBITER_MODE
10b SRAM pass-through mode
11b SRAM PHDC mode
0b SRAM not accessible (default)
1 SRAM_ENABLE
1b SRAM is available (when Vcc supplied)
0b Data transfer direction is I2C to NFC (default)
13 0 PT_TRANSFER_DIR
1b Data transfer direction is NFC to I2C
Using GPIO features
Configuring wired interface Session register address

Block Address
Step 2 Byte 0 Byte 1 Byte 2 Byte 3
NFC I 2C
• Define if pads are used as GPIO or PWM 39h 1039h PWM_GPIO_ PWM_GPIO_
RFU
A3h 10A3h CONFIG_0_REG CONFIG_1_REG
• For GPIO pads, we should also define if they are
destined as output or input pads
Bit Name Value Description
0b Output status on pad is LOW
7 GPIO1_SDA_PAD_OUT_STATUS
1b Output status on pad is HIGH
0b Output status on pad is LOW
6 GPIO0_SCL_PAD_OUT_STATUS
Wired interface registers have both configuration 1b Output status on pad is HIGH
and session registers. 0b
5 GPIO1_SDA_PAD_IN_STATUS Input status
1b
Session registers:
0b
ü Changes take effect immediately 4 GPIO0_SCL_PAD_IN_STATUS Input status
1b
x Not persistent after reset
0b Output
3 GPIO1_SDA_PAD
Configuration settings: 1b Input
ü Value remains valid after chip reset. 0b Output
2 GPIO0_SCL_PAD
x No immediate effect 1b Input
0b GPIO
1 GPIO1_PWM1_SDA_PAD
1b PWM
0b GPIO
14 0 GPIO0_PWM0_SCL_PAD
1b PWM
Using GPIO features
Changing GPIO line state (output) Session register address

Block Address
Setting up line state Byte 0 Byte 1 Byte 2 Byte 3
NFC I 2C
Write to PWM_GPIO_CONFIG_REG on bit 6 or bit 7 39h 1039h PWM_GPIO_ PWM_GPIO_
depending on the line chosen RFU
A3h 10A3h CONFIG_0_REG CONFIG_1_REG
• Write 0b to set line to LOW state
• Write 1b to set line to HIGH state Bit Name Value Description
0b Output status on pad is LOW
GPIO 1 7 GPIO1_SDA_PAD_OUT_STATUS
1b Output status on pad is HIGH
0b Output status on pad is LOW
GPIO 0 6 GPIO0_SCL_PAD_OUT_STATUS
Wired interface registers have both configuration 1b Output status on pad is HIGH
and session registers. 0b
5 GPIO1_SDA_PAD_IN_STATUS Input status
1b
Session registers:
0b
ü Changes take effect immediately 4 GPIO0_SCL_PAD_IN_STATUS Input status
1b
x Not persistent after reset
0b Output
3 GPIO1_SDA_PAD
Configuration settings: 1b Input
ü Value remains valid after chip reset. 0b Output
2 GPIO0_SCL_PAD
x No immediate effect 1b Input
0b GPIO
1 GPIO1_PWM1_SDA_PAD
1b PWM
0b GPIO
15 0 GPIO0_PWM0_SCL_PAD
1b PWM
Using GPIO features
Reading GPIO line state (input) Session register address

Block Address
Monitoring line state Byte 0 Byte 1 Byte 2 Byte 3
NFC I 2C
Read STATUS1_REG bit 3 or bit 4 depending on the line
A0h 10A0h STATUS0_REG STATUS1_REG RFU
chosen
• 0b indicates LOW level in the pad
• 1b indicates HIGH level in the pad Bit Name Value Description
0b VCC boot not done
7 VCC_BOOT_OK
1b VCC boot done
0b NFC boot not done
6 NFC_BOOT_OK
Wired interface registers have both configuration 1b NFC boot done
and session registers. 0b ALM RF not OK
5 ACTIVE_NFC_OK
1b AKN RF OK
Session registers:
0b GPIO_1 input is LOW
ü Changes take effect immediately GPIO 1 4 GPIO_PAD1_IN_STATUS
1b GPIO_1 input is HIGH
x Not persistent after reset
0b GPIO_0 input is LOW
GPIO 0 3 GPIO_PAD0_IN_STATUS
Configuration settings: 1b GPIO_0 input is HIGH
ü Value remains valid after chip reset. 0b Only Passive Load Modulation supported
2 ALM_PLM
x No immediate effect 1b Active Load Modulation supported
0b I2C interface not locked by arbiter
1 I2C_IF_LOCKED
1b Arbiter locked to I2C
0b NFC interface not locked by arbiter
16 0 NFC_IF_LOCKED
1b Arbiter locked to NFC
 LED example (output)
using FRDM-KW41Z and NTAG 5 Demo app

17
Using GPIO features
LED example

Description
• Using GPIO signal configured as output to switch ON / OFF LED present in FRDM-KW41Z board
• KW41Z shall be flashed so MCU dumps input signal to LED red channel*
• Example available in NTAG 5 Demo app for mobiles
• OM2351OARD shall be connected to FRDM-KW41Z

Send command
to turn LED ON

Send command
to turn LED OFF

18
* No MCU would be needed in a final implementation
Using GPIO features
LED example
Step 1
• WRITE_CONFIG command (C1h) over Configuration Bytes block (37h):

Flags WRITE_CONFIG Manuf. Code UID (optional) Block Address Data CRC16

12h C1h 04h ---- 37h 00220F00 Auto

Config Bytes block address

GPIO/PWM mode
WRITE_CONFIG command code

19 Non-address mode & High data rate

Using GPIO features
LED example
Step 2
• Change line state using PWM_GPIO_CONFIG_REG

20
Using GPIO features
LED example: Signal generation

1. Signal is generated by NTAG 5 depending on the

register dedicated to control the GPIO 1. KW41Z
monitors the signal generated by the NTAG 5 and
dumps its value to turn ON/OFF LED 3.

GND
GPIO 1
GPIO 0

GPIO 0 (output)

LED OFF
LED

Evaluation board image

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is NOT the final one
Using GPIO features
LED example: Signal generation

1. Signal is generated by NTAG 5 depending on the

register dedicated to control the GPIO 1. KW41Z
monitors the signal generated by the NTAG 5 and
dumps its value to turn ON/OFF LED 3
2. User can control the level state of the signal and
therefore the LED by writing to the specific
register in NTAG 5 memory.
GND
GPIO 1
GPIO 0

GPIO 0 (output)
LED ON

User turns signal level LED3

to high through RF
Evaluation board image
22
is NOT the final one
 Toggle button example (input)
using FRDM-KW41Z and NTAG 5 Demo app

23
Using GPIO features
Toggle button example

Description
• Using GPIO signal configured as input to monitor button state
• Toggle button emulated using SW3 and SW4 buttons from FRDM-KW41Z
• KW41Z shall be flashed so MCU changes signal state depending on button clicked
• Example available in NTAG 5 Demo app for mobiles
• OM2351OARD shall be connected to FRDM-KW41Z

Button state image:

- Pressed when signal is LOW
- Not pressed when signal is HIGH
Updates button
state image

24
Using GPIO features
Toggle button example
Check button state

25
Using GPIO features
Button SW4
Toggle button example: Signal monitoring
Button SW3

1. Signal is generated by the KW41Z and rooted to

the GPIO 1 pin of the NTAG 5 Eval board

GND
GPIO 1
GPIO 0

GPIO 1 (input)

Evaluation board image

26
is NOT the final one
Using GPIO features
Button SW4
Toggle button example: Signal monitoring
Button SW3

1. Signal is generated by the KW41Z and rooted to

the GPIO 1 pin of the NTAG 5 Eval board
2. If user clicks SW3 button, KW41Z turns the signal
level to low state.

GND
GPIO 1
GPIO 0

GPIO 1 (input) SW3 clicked

Evaluation board image

27
is NOT the final one
Using GPIO features
Button SW4
Toggle button example: Signal monitoring
Button SW3

1. Signal is generated by the KW41Z and rooted to

the GPIO 1 pin of the NTAG 5 Eval board
2. If user clicks SW3 button, KW41Z turns the signal
level to low state.
3. If user clicks SW4 button, the microcontroller will
turn the signal level back to high
GND
GPIO 1
GPIO 0

GPIO 1 (input) SW4 clicked

Evaluation board image

28
is NOT the final one
Using GPIO features
Toggle button example: Signal monitoring

1. Signal is generated by the KW41Z and rooted to

the GPIO 1 pin of the NTAG 5 Eval board
2. If user clicks SW3 button, KW41Z turns the signal
level to low state.
3. If user clicks SW4 button, the microcontroller will
turn the signal level back to high
??
4. User can sense and monitor the state of GPIO GND
input pad at any moment through NFC GPIO 1
GPIO 0

GPIO 1 (input)

Evaluation board image

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is NOT the final one
 Using PWM features

30
Using PWM features
Configuring wired interface
Step 1
• WRITE_CONFIG command (C1h) over Configuration Bytes block (37h):

Flags WRITE_CONFIG Manuf. Code UID (optional) Block Address Data CRC16

12h C1h 04h ---- 37h 00220F00 Auto

Config Bytes block address

GPIO/PWM mode
WRITE_CONFIG command code

31 Non-address mode & High data rate

Using PWM features
Defining pads purposes and PWM parameters
Step 2
• Configure pads as PWM
• Configure pre-scale and resolution for PWM signals

For more information about PWM signal parameters and

32 generation, please refer to application note AN11203
Using PWM features
Changing start time and duty cycle
Step 3
• Configure time for rising and falling edge. This can be
calculated out of the start time and duty cycle
parameters:
PWMx_ON:

PWMx_OFF:

Equivalent register for Channel 1 is found in addresses:

• 3Bh (configuration settings)
• A5h (session register)

33
 LED intensity example
using FRDM-KW41Z and NTAG 5 Demo app

34
Using PWM features
LED intensity example

Description
• Uses PWM signal to control intensity of two LEDs
present in FRDM-KW41Z board using signal duty cycle
• Signal is generated using four different parameters
• Example available in NTAG 5 Demo app for mobiles
• KW41Z shall be flashed so microcontroller roots signal
to LEDs input. Change duty cycle of
signals generated
• OM2351OARD shall be connected to FRDM-KW41Z for both channels

35
Using PWM features
LED intensity example

1. User changes PWM signal parameters 1

2. When user clicks on ‘Write config’ application gathers all

information and sends commands to re-configure PWM signal:

Configure pads as PWM

Define pre-scale and resolution

Configure rising/falling edge

for Channel 0 (LED 3)

2
Configure rising/falling edge
for Channel 1 (LED 4)

36
Using PWM features
LED intensity example: Signal generation

1. Signal is generated by NTAG 5 depending on the

register dedicated to control each PWM channel.
KW41Z monitors the signal generated by the
NTAG 5 and dumps its value to the input of the
respective LED.

GND
PWM 1
PWM 0

PWM 0

25% duty cycle

LED3

37
Using PWM features
LED intensity example: Signal generation

1. Signal is generated by NTAG 5 depending on the

register dedicated to control each PWM channel.
KW41Z monitors the signal generated by the
NTAG 5 and dumps it value to the input of the
respective LED.
2. User can change the intensity of the LED by
writing to the related session register and modify
the duty cycle of the generated PWM signal GND
PWM 1
PWM 0

PWM 0
75% duty cycle

LED3

38
 Using pass-through mode

39
Using pass-through mode
Introduction
• Pass through mode transfers data from RF to I2C interface and vice RF à I2C
versa using the 256-byte SRAM saving EEPROM cycles. Available for
NTAG 5 link and boost models.

• Data flow from one side to the other is synchronized using

interruption signal and register settings.

Use cases:
RF à I2C data exchange:
• Mobile device writes data into the microcontroller I2C à RF
• Update microcontroller FW from NFC interface

I2C à RF data exchange:

• Download of data into mobile device (e.g., large amount of
logging data, error descriptions…)

40
Using pass-through mode
Configuration (I)

WRITE_CONFIG command (C1h) over Configuration Bytes block (37h):

Flags WRITE_CONFIG Manuf. Code UID (optional) Block Address Data CRC16

12h C1h 04h ---- 37h 00020F00 Auto

Config Bytes block address

I2C slave mode
WRITE_CONFIG command code

41 Non-address mode & High data rate

Using pass-through mode
Configuration (II)
Requirements
1. NFC_FIELD_OK = 1b à bit0 of STATUS0_REG
2. VCC_SUPPLY_OK = 1b à bit1 of STATUS0_REG
3. SRAM_ENABLE = 1b à bit1 of CONFIG_1

Data flow direction

• PT_TRANSFER_DIR à bit2 of STATUS0_REG
• ED pin to notify when last SRAM page was read/written

Accessing SRAM
• RF perspective
SRAM_READ and SRAM_WRITE over addresses 00h-3Fh
• I2C perspective
READ / WRITE over addresses 2000h-203Fh

42
Using pass-through mode Host checks until Vcc and NFC field
are ready:
Diagram flow (RF à I2C) - VCC_SUPPLY_OK == 1?
- NFC_FIELD_OK == 1?

Host resets Session Registers:

- ARBITER_MODE: SRAM pass-through
- Enable SRAM memory
- Pass-through direction: NFC à I2C
NFC device performs tag activation
- ED_CONFIG_REG = 0100b
- Clears ED pin
NFC Device starts writing SRAM

NFC polls:
- SRAM_DATA_READY == 0b?
- I2C_IF_LOCKED == 0b?

Host starts reading SRAM. When finishes:

- ED pin goes LOW (after last page read)
- Arbiter unlocks access from I2C interface
NFC devices can continue writing in - Arbiter sets SRAM_DATA_READY bit to 0
SRAM

43 Diagram flow for I2C to NFC interface can be found in AN12364

 Pass-through example
using FRDM-KW41Z and NTAG 5 Demo app

44
Using pass-through mode
Pass-through example
Data transferred
to host
Description
• Uses pass-through feature to exchange pre-defined
data with KW41Z
• Wired interface must be configured in I2C slave mode to
communicate with KW41Z using I2C interface.
• Example available in NTAG 5 Demo app for mobiles
• KW41Z shall be flashed so microcontroller roots signal
to LEDs input.
• OM2351OARD shall be connected to FRDM-KW41Z

Data received
from host

Button to start
data transfer loop
45
Using pass-through mode Block diagram
Pass-through example

46
Using pass-through mode
Pass-through example
RF à I2C
1. NFC device writes in NTAG 5 SRAM memory. KW41Z
detects that PT_TRANSFER_DIR indicates RFàI2C
direction, turns LED in blue and waits until SRAM is
available to be read.

GND
SDA
SCL

LED

Evaluation board image

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is NOT the final one
Using pass-through mode
Pass-through example
RF à I2C
1. NFC device writes in NTAG 5 SRAM memory. KW41Z
detects that PT_TRANSFER_DIR indicates RFàI2C
direction, turns LED in blue and waits until SRAM is
available to be read.
2. When NFC device finishes writing KW41Z starts
reading from SRAM. LED remains in blue until
PT_TRANSFER_DIR changes to I2CàRF.
GND
SDA
SCL

LED

Evaluation board image

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is NOT the final one
Using pass-through mode
Pass-through example
I2C à RF
1. KW41Z starts writing in NTAG 5 SRAM memory and
turns LED in green. NFC device detects that
PT_TRANSFER_DIR indicates I2CàRF direction and
waits until SRAM is available to be read.

GND
SDA
SCL

LED

Evaluation board image

49
is NOT the final one
Using pass-through mode
Pass-through example
I2C à RF
1. KW41Z starts writing in NTAG 5 SRAM memory and
turns LED in green. NFC device detects that
PT_TRANSFER_DIR indicates I2CàRF direction and
waits until SRAM is available to be read.
2. When KW41Z finishes writing NFC device starts
reading from SRAM. LED remains in green until
PT_TRANSFER_DIR changes to I2CàRF.
GND
SDA
SCL

LED

50
 Using I2C Master mode

51
Using I2C Master mode
Introduction
• I2C Master mode allows users to execute I2C commands directly from an NFC device by
creating a transparent I2C channel with devices working as I2C slave.
• Working in I2C master mode, different I2C slave devices (e.g., sensors) can be connected
without a microcontroller.
• Needed power for the sensors can be provided with NTAG 5 energy harvesting capabilities.

52
Using I2C Master mode
Configuration

WRITE_CONFIG command (C1h) over Configuration Bytes block (37h):

Flags WRITE_CONFIG Manuf. Code UID (optional) Block Address Data CRC16

12h C1h 04h ---- 37h 00120F00 Auto

Config Bytes block address I2C Master mode

WRITE_CONFIG command code

Detailed information on how to configure I2C master channel and I2C

53 clock speed can be found in AN12368
Using I2C Master mode
Sending Read/Write I2C commands
Writing to I2C interface
• Write_I2C command (D4h) à Writes command into I2C line. Includes I2C address of the target slave

Reading from I2C interface

• Read_I2C command (D5h) à Reads data from I2C line and transfer it into NTAG 5 SRAM

Reading from SRAM memory

• Read SRAM command (D2h) à Reads data from NTAG 5 SRAM memory

54
 I2C Master mode example
using FRDM-KW41Z and NTAG 5 Demo app

55
Using I2C Master mode
I2C Master mode example

Description
• Allows user to directly send I2C commands to FXOS8700CQ accelerometer and
magnetometer sensor present in FRDM-KW41Z board.
• User can send a default command from a list or introduce a customized command

56
Using I2C Master mode
I2C Master mode example
Example: Get temperature from sensor
• Step 1: Sending command to Read temperature:

• Step 2: Reading response from I2C line and put it in SRAM:

57
Using I2C Master mode
I2C Master mode example
Example: Get temperature from sensor
• Step 3: Reading content from NTAG 5 SRAM:

58
 More support

59
More support
Relevant resources regarding NTAG 5 family

Ø NTAG 5 switch website

https://www.nxp.com/products/rfid-nfc/nfc-hf/ntag/nfc-tags-for-electronics/ntag-5-switch-nfc-forum-
compliant-pwm-gpio-bridge-for-lighting-and-gaming:NTAG5-SWITCH

Ø NTAG 5 link website

https://www.nxp.com/products/rfid-nfc/nfc-hf/ntag/nfc-tags-for-electronics/ntag-5-link-nfc-forum-
compliant-ic-bridge-for-iot-on-demand:NTAG5-LINK

Ø NTAG 5 boost website

https://www.nxp.com/products/rfid-nfc/nfc-hf/ntag/nfc-tags-for-electronics/ntag-5-boost-nfc-forum-
compliant-ic-bridge-for-tiny-devices:NTAG5-BOOST

Ø NTAG 5 development kit

http://www.nxp.com/products/rfid-nfc/nfc-hf/ntag/ntag-5-development-kit:OM23510ARD

Ø NXP Tech community

https://www.nxp.com/support/support:SUPPORTHOME

60
 MobileKnowledge

MobileKnowledge is a team of HW, SW and system engineers, experts in smart, connected and
secure technologies for the IoT world. We are your ideal engineering consultant for any specific
support in connection with your IoT and NFC developments. We design and develop secure HW
systems, embedded FW, mobile phone and secure cloud applications.

Our services include:

§ Secure hardware design
§ Embedded software development
§ NFC antenna design and evaluation
§ NFC Wearable
§ EMV L1 pre-certification support
§ Mobile and cloud application development
§ Secure e2e system design

www.themobileknowledge.com We help companies leverage

[email protected] the secure IoT revolution

61
 NTAG 5 Webinar series –
Product Support Package
Pablo Fuentes (Speaker)
Angela Gemio (Host)

Time for

Q&A

62
 NTAG 5 Webinar series –
Product Support Package

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addresses

Please check NXP and MobileKnowledge websites for upcoming

webinars and training sessions
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63
 MobileKnowledge

MobileKnowledge is a team of HW, SW and system engineers, experts in smart, connected and
secure technologies for the IoT world. We are your ideal engineering consultant for any specific
support in connection with your IoT and NFC developments. We design and develop secure HW
systems, embedded FW, mobile phone and secure cloud applications.

Our services include:

§ Secure hardware design
§ Embedded software development
§ NFC antenna design and evaluation
§ NFC Wearable
§ EMV L1 pre-certification support
§ Mobile and cloud application development
§ Secure e2e system design

www.themobileknowledge.com We help companies leverage

[email protected] the secure IoT revolution

64