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1. The document provides an academic plan for the 3rd semester Switching Theory and Logic Design course for ECE, CSE, and IT branches at Guru Tegh Bahadur Institute of Technology. 2. The course will cover topics like number systems, Boolean algebra, combinational circuits, sequential logic circuits, synchronous counters, shift registers, finite state machines, and fault detection over 22 class periods in the first term and 22 periods in the second term. 3. References for the course include books on switching and finite automata theory, digital logic and computer design, modern digital electronics, and digital integrated electronics.

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24 views3 pages

Switch 6

1. The document provides an academic plan for the 3rd semester Switching Theory and Logic Design course for ECE, CSE, and IT branches at Guru Tegh Bahadur Institute of Technology. 2. The course will cover topics like number systems, Boolean algebra, combinational circuits, sequential logic circuits, synchronous counters, shift registers, finite state machines, and fault detection over 22 class periods in the first term and 22 periods in the second term. 3. References for the course include books on switching and finite automata theory, digital logic and computer design, modern digital electronics, and digital integrated electronics.

Uploaded by

karthiksvr26
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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GURU TEGH BAHADUR INSTITUTE OF TECHNOLOGY

SEMESTER: 3rd
BRANCHES: ECE,CSE, IT

ACADEMIC PLAN FOR IV SEMESTER 2017-2018

Subject: Switching Theory and Logic Design


Class:3rd Sem. (CS, ECE, IT) Subject Code: ETEC-205
Total Lecture classes available: 44

No. of
S.No. TOPICS TO BE COVERED
Lectures
Number Systems and Codes:- Decimal, Binary, Octal and
1 Hexadecimal Number systems, Codes- BCD, Gray Code, Excess-3 2
Code, ASCII, EBCDIC, Conversion between various Codes
2 Boolean Algebra- Postulates and Theorems, De’ Morgan’s Theorem 1
3 Canonical Forms ,standard repesentation of logic function 1
K. Map simplification of logic functions don’t care conditions,
4 2
X-OR, X-NOR sirnplification, introduction to Q-M.
5 Combinational circuit, multiplexers, demux, decoders, encoders. 2
Adder Subtractors Carry Propagate Adder, Carry Look-ahead Adder,
6 2
Carry Save Adder
7 Code converter, binary codes 2
8 Comparator, Decoder / driver for display devices. 1
9 Logic implementation using ROM, PAL and PLA 1

Integrated circuits: - TTL and CMOS logic families and their


10 characteristics.
1
Sequential Logic Circuits: - Latches and Flip Flops- SR, , D, T and
11 2
MS-JK Flip Flops, Asynchronous Inputs
Asynchronous counter:- Binary, BCD, Decade and Up/Down
12 2
Counters ,
13 Synchronous counter 1
Shift Registers, Types of Shift Registers, Counters using Shift
14 Registers- Ring Counter and Johnson Counter. 2

Total Hours 22 hrs


2nd TERM END
Synchronous Sequential Circuits:- State Tables State Equations and
State Diagrams, State Reduction and State Assignment, Design of
17 Clocked Sequential Circuits using State Equations. 4

Finite state machine-capabilities and limitations, Mealy and Moore


18 models-minimization of completely specified and incompletely 3
specified sequential machines,
Partition techniques and merger chart methods-concept of minimal
cover table. 3

Algorithmic State Machine: Representation of sequential circuits


using ASM charts synthesis of output and next state functions,
3
Fault Detection and Location: Fault models for combinational and
sequential circuits, Fault detection in combinational circuits
3
Data path control path partition-based design.
3
Homing experiments, distinguishing experiments, machine
identification and fault detection experiments in sequential circuits. 3
GURU TEGH BAHADUR INSTITUTE OF TECHNOLOGY
SEMESTER: 3rd
BRANCHES: ECE,CSE, IT
Total Hours 22 hrs

Text Book:
[T1] Zyi Kohavi, “Switching & Finite Automata Theory”, TMH, 2nd Edition
[T2] Morris Mano, Digital Logic and Computer Design”, Pearson
[T3] R.P. Jain, “Modern Digital Electronics”, TMH, 2nd Ed,

Reference Books:
[R1] A Anand Kumar, “Fundamentals of Digital Logic Circuits”, PHI
[R2] Taub ,Helbert and Schilling, “Digital Integrated Electronics”, TMH
GURU TEGH BAHADUR INSTITUTE OF TECHNOLOGY
SEMESTER: 3rd
BRANCHES: ECE,CSE, IT

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