Ecen1011 2023 06
Ecen1011 2023 06
Flip-Flop-Based
synChronous networks
31-Oct-23 ECEN1011 232
A flip-flop-based
synchronous network is a
network in which the flip-
flops share the same clock,
and the flip-flop
asynchronous inputs (i.e.,
Clear and Preset) are used
only for their initialization. If
these two conditions are not
met, the network falls into
the category of
asynchronous networks.
31-Oct-23 ECEN1011 233
General
Structure of a
Synchronous
Network
Pe100 1 1 Pe
100
3.33067 14
1
0.952054716 year (347 days) only
Pe100 365day 24hour 3600second 1MHz
Pe100 k 1 1 Pe
100 k
3.33067 11
1
0.000952055 year (8.34 hours) only
Pe100 k 365day 24hour 3600second 1MHz
“serial” input
SIPO
Serial Input –
Parallel Output
(parallel–serial conversion)
multiplexer
31-Oct-23 ECEN1011 270
if i can build a counter
that starts from3 end at15
(never go to 0)
Up/Down
Counters
ripple counter
entity counter is
Port ( rst,clk,up_dwn : in std_logic;
o: out std_logic_vector(0 to 3));
end counter;