Set B Answer

Reg. No.

ROYAL UNIVERSITY OF BHUTAN

COLLEGE OF SCIENCE AND TECHNOLOGY
PHUENTSHOLING : BHUTAN

SUMMER SEMESTER EXAMINATION: 2014

Class : BE Third Year Electrical Engineering

BE Second Year In-Service Electrical
Engineering

Module : Microprocessor and Interfacing

Module Code : SAS302

Max. Marks : 50

Max. Time : 3 Hrs

General Instrutcions:
1. Answer all the questions.
2. Close books.
3. A candidate can use a calculator.

Page 1 of 19
Question No.1 [ 0.8,1,1,1,1,1,1]
1.1 Explain the difference between the machine language and the
assembly language of the 8085 microprocessor. 0.8 mark
The machine language of the 8085 is the commands to the
microprocessor given in binary. These are the binary instructions the
processor can understand and execute. The assembly language is
comprised of mnemonics (group of letters to represent commands)
assigned by the manufacture for the convenience of the users.
1.2 In 2011, Intel released a new microprocessor, 10-Core Xeon
Westmere-EX which is designed with 2,600 million transistors.
According to Moore’s law, how many transistors will a new
microprocessor have in 2026? Here, Moore’s law states that the
number of transistors per integrated circuit would double 18 months.
In 2026, a new microprocessor will have
2,600 × 2180⁄18 = 2,662,400 million transistors. 1 mark
1.3 Assemble the following instructions from the instruction set listed
on the 8085 instruction summary, starting with the memory address
8000H.
MVI A,B7H ;Load the accumulator with B7H
ADI B7H ;Add B7H to the accumulator contents
ORI B7H ;OR B7H with the accumulator contents
STA 80C6H ;Store the result at the memory location 80C6H
HLT ;End of program
Memory Address Hex Code
8000 3E
8001 B7
8002 C6
8003 B7
8004 F6
8005 B7
8006 32
8007 C6
8008 80
8009 76 0.1 mark × 10
1.4 In Question 1.3, identify the accumulator contents and the status of
S, Z, AC, P, and CY flags after the execution of ‘ADI B7H’.
A=6EH, S=0, Z=0, AC=0, P=0, CY=1. 0.5 mark, 0.5 mark
Page 2 of 19
1.5 In Question 1.3, identify the contents (Hex code) of memory
location 80FEH and the status of S, Z, AC, P, and CY flags after the
execution of the program.
(80C6H)=FFH, S=1, Z=0, AC=0, P=1, CY=0. 0.5 mark, 0.5 mark
1.6 In Question 1.3, write the assembly program if the second byte B7H
of the instruction ‘MVI A,B7H’ and the second byte B7H of the
instruction ‘ORI B7H’ are omitted.
MVI A,C6H ;Load the accumulator with D6H
ORA A ;Exclusive OR the accumulator contents with itself
ORI 32H ;Exclusive OR 32H with the accumulator contents
ADI 80H ;Compare 80H with the accumulator contents
HLT ;End of program 0.2 mark × 5
1.7 In Question 1.6, identify the accumulator contents and the status of
S, Z, AC, P, and CY flags after the execution of the program.
A=76H, S=0, Z=0, AC=0, P=0, CY=1. 0.5 mark, 0.5 mark

Question No.2 [ 1,1.2,1.6,1.3,1,1.6,1]

2.1 Write five logical steps to sum up the following three bytes. All the
bytes should be saved for future use. Save the sum in the memory
location 80D6H.
Numbers: 54H, 55H, and 56H
i. Load the numbers 54H, 55H, and 56H in registers B, C, and D,
respectively.
ii. Copy the contents of register B to the accumulator.
iii. Add the contents of register C to the contents of the accumulator.
iv. Add the contents of register D to the contents of the accumulator.
v. Store the sum in the memory location 80D6H. 0.2 mark × 5
2.2 Draw a flowchart of Question 2.1.

Page 3 of 19
 Start 0.2 mark

Load Hex
Numbers 0.2 mark
in Registers

Add register B to 0.2 mark

the accumulator

Add register C to 0.2 mark

the accumulator

Store Sum 0.2 mark

End 0.2 mark

2.3 Translate the logic steps in Question 2.1 into the 8085 assembly
language program.
MVI B,54H ;Load the first byte
MVI C,55H ;Load the second byte
MVI D,56H ;Load the third byte
MOV A,B ;Copy the contents of B to the accumulator
ADD C ;Add the contents of C to the accumulator
ADD D ;Add the contents of D to the accumulator
STA 80D6H ;Store the product into the memory 80D6H
HLT ;End of program 0.2 mark × 8

Page 4 of 19
2.4 Assemble the assembly program in Question 2.3, starting with the
memory location 8000H.
Memory Address Hex Code
8000 06
8001 54
8002 0E
8003 55
8004 16
8005 56
8006 78
8007 81
8008 82
8009 32
800A D6
800B 80
800C 76 0.1 mark × 13
2.5 In Question 2.4, identify the contents (Hex code) of memory
location 80D6H and the status of S, Z, AC, P, and CY flags after the
execution of the program.
(80D6H)=FFH, S=1, Z=0, AC=0, P=1, CY=0. 0.5 mark, 0.5 mark
2.6 In Question 2.3, write the assembly program if the first byte
(Opcode) of the instruction ‘STA 80D6H’ is omitted.
MVI B,54H ;Load the first byte
MVI C,55H ;Load the second byte
MVI D,56H ;Load the third byte
MOV A,B ;Copy the contents of B to the accumulator
ADD C ;Add the contents of C to the accumulator
ADD D ;Add the contents of D to the accumulator
SUI 80H ;Subtract 80H from the accumulator
HLT ;End of program 0.2 mark × 8
2.7 In Question 2.6, identify the accumulator contents and the status of
S, Z, AC, P, and CY flags after the execution of the program.
A=7FH, S=0, Z=0, AC=0, P=0, CY=0. 0.5 mark, 0.5 mark

Page 5 of 19
Question No.3 [ 1.5,1,1]
3.1 In Figure 1, the memory address of 6264 SRAM ranges from 8000H
to 9FFFH. Draw connections between each 2-to-4 decoder and the
6264 in Figure 1.
0.5 mark × 3
ഥ
IO⁄M

ഥ
E
MSB O3
തതതതത
WR 74LS139 O2
2-to-4 തതതത WE തതതത
തതതതത OE
O1 CE
തതതത
RD Decoder
LSB A12 A12
O0
6264
A15 SRAM
8192 × 8
ഥ
E A0 A0
MSB O3
A14 O7 O0
74LS139 O
2
2-to-4
O Data
A13 Decoder 1
LSB O0 Bus
D7 D0

3.2 In Question 3.1, exchange A15 and A14 and identify the memory
address range.
The memory addresses range from 4000H (= 010 00000000000002)
to 5FFFH (= 010 11111111111112). 1 mark
3.3 In Question 3.1, if we use the output lines (O3−O1) of the lower
decoder to select three memory chips of the same size as the 6264,
what is the total range of the memory map?
The total memory size is 8K × 3 = 24K. The total range of
memory map is from 2000H (= 001 00000000000002)
to 7FFFH (= 011 11111111111112). 1 mark

Page 6 of 19
 ഥ
IO⁄M

ഥ
E
MSB O3
തതതതത
WR 74LS139 O
2
2-to-4 തതതത WE തതതത
തതതതത OE
CE
തതതത
RD Decoder O1
LSB A12 A12
O0
6264
A15 SRAM
8192 × 8
ഥ
E A0 A0
MSB O3
A14 O7 O0
74LS139 O
2
2-to-4
Data
A13 Decoder O1
LSB O0 Bus
D7 D0

Figure 1

Question No.4 [ 1.2,1.2,1,1,1.6,1.2,1,1,1.2,1.4]

4.1 Figure 2 shows 8085 timing for execution of some instruction.
Identify the machine cycles M1, M2, and M3.
M1; Opcode Fetch
M2; Memory Read
M3; Memory Read 0.4 mark × 3
4.2 In Figure 2, specify the Hex machine code and its memory address.
8004 DAH
8005 0BH
0.4 mark × 3
8006 80H
4.3 In Question 4.2, identify mnemonics.
JC 800BH 1 mark
4.4 In Figure 2, specify the program counter after the execution of the
instruction. Also, some flag status can be identified. Specify the flag
and its status.
PC = 800BH, C=1. 0.5 mark × 2

Page 7 of 19
 Instruction
M1 M2 M3

CLK

A15 Unspe-
80H cified 80H 80H
-A8
AD7
04H DAH 05H 0BH 06H 80H
-AD0

ALE

IO/Mഥ ഥ =0,
IO/M ഥ =0,
IO/M
ഥ =0, S1=1, S0=1
IO/M
S1, S0 S1=1, S0=0 S1=1, S0=0

തതതത
RD

തതതതത
WR

Figure 2
4.5 Figure 3 shows 8085 timing for execution of some instruction.
Identify the machine cycles M1, M2, M3, and M4.
M1; Opcode Fetch
M2; Memory Read
M3; Memory Read
M4; Memory Read 0.4 mark × 4
4.6 In Figure 2, specify the Hex machine code and its memory address.
8005 3AH
8006 0AH
8007 80H 0.4 mark × 3
4.7 In Question 4.6, identify mnemonics.
LDA 800AH 1 mark
4.8 In Figure 3, specify the accumulator contents and the program
counter after the execution of the instruction.
A = 7DH, PC = 8008H. 0.5 mark × 2

Page 8 of 19
 Instruction
M1 M2 M3 M4

CLK

A15 Unspe-
80H cified 80H 80H 80H
-A8
AD7
05H 3AH 06H 0AH 07H 80H 0AH 7DH
-AD0

ALE

IO/Mഥ ഥ =0,
IO/M ഥ =0,
IO/M ഥ =0,
IO/M
ഥ =0, S1=1, S0=1
IO/M
S1, S0 S1=1, S0=0 S1=1, S0=0 S1=1, S0=0

തതതത
RD

തതതതത
WR

Figure 3
4.9 Identify the machine cycles in the instruction ‘STA 80C6H’.
M1; Opcode Fetch
M2; Memory Read
M3; Memory Read
M4; Memory Write 0.3 mark × 4
4.10 Referring to Figures 2 and 3, draw 8085 timing for execution of the
instruction ‘STA 80C6H’ in Question 1.3.
STA 80C6H
M1 M2 M3 M4

CLK 0.2 mark

A15
-A8
80H Unspe-
cified 80H 80H 80H 0.2 mark
AD7
-AD0
06H 32H 07H C6H 08H 80H C6H FFH 0.2 mark
ALE 0.2 mark
IO/Mഥ ഥ =0,
IO/M ഥ =0,
IO/M ഥ =0,
IO/M
S1, S0
ഥ =0, S1=1, S0=1
IO/M S1=1, S0=0 S1=1, S0=0 S1=0, S0=1 0.2 mark
തതതത
RD 0.2 mark
തതതതത
WR 0.2 mark

Page 9 of 19
Question No.5 [ 1.2,1.2,1,1,1]
5.1 In Figure 4, specify the primary memory address range of ROM1,
ROM2, and R/WM1.
The primary memory addresses of ROM1 range
from 4000H (= 01 0 00000000000002)
to 5FFFH (= 01 0 11111111111112). 0.4 mark
The primary memory addresses of ROM2 range
from 8000H (= 10 0 00000000000002)
to 9FFFH (= 10 0 11111111111112). 0.4 mark
The primary memory addresses of RW/M1 range
from 2000H (= 00 10 0 000000000002)
to 27FFH (= 00 10 0 111111111112). 0.4 mark
5.2 In Figure 4, specify the mirror (foldback) memory address range of
ROM1, ROM2, and R/WM1.
The mirror (foldback) memory addresses of ROM1 range
from 6000H (= 01 1 00000000000002)
to 7FFFH (= 01 1 11111111111112). 0.4 mark
The mirror (foldback) memory addresses of ROM2 range
from A000H (= 10 1 00000000000002)
to BFFFH (= 10 1 11111111111112). 0.4 mark
The mirror (foldback) memory addresses of RW/M1 range
from 2800H (= 00 10 1 000000000002)
to 2FFFH (= 00 10 1 111111111112). 0.4 mark
5.3 In Figure 4, eliminate the second decoder and connect തതതതത
CS0 to തതതത of
CE
the R/WM1, and identify its primary memory address range and its
mirror (foldback) memory address range of R/WM1.
The primary memory addresses of RW/M1 range
from 0000H (= 00 000 000000000002)
to 07FFH (= 00 000 111111111112). 0.5 mark
The foldback memory addresses of RW/M1 range
from 0800H (= 00 001 000000000002)
to3FFFH (= 00 111 111111111112). 0.5 mark

Page 10 of 19
 ഥ
IO⁄M

ഥ
E
MSB
74LS139 തതതതത2
CS
A15
O2
2-to-4 തതതതത1
CS
O1
A14 Decoder തതതതത0
CS
LSB O0

ഥ
E തതതതത തതതത
WR RD തതതത
RD തതതത
RD
MSB
74LS139 തതതതത
CS2
A13
O2
2-to-4 A10 തതതത WE
CE തതതത
തതതതത OE A12 തത
CEതത തതതത
OE A12 തത
CEതത തതതത
OE
A12 Decoder 6116 2764 2764
LSB R/WM1 ROM1 ROM2
2K × 8 8K × 8 8K × 8
A0 A0 A0

Figure 4
5.4 In Figure 5, identify the address range of the memory map.
The memory map ranges from 8000H (= 1 0000000000000002)
to FFFFH (= 1 1111111111111112). 1 mark
5.5 In Figure 5, replace the 27256 (32K) memory chip with the 27128
(16K) memory chip. Identify the primary address range and the
mirror (foldback) address range of the memory chip. Here the
address line A14 is at a don’t care logic state.
The primary memory map ranges
from 8000H (= 1 0 000000000000002)
to CFFFH (= 1 0 111111111111112). 0.5 mark
The mirror (foldback) memory map ranges
from B000H (= 1 1 000000000000002)
to FFFFH (= 1 1 111111111111112). 0.5 mark

Page 11 of 19
 Address Bus
A14 A14

27256
EPROM
32K × 8
A0 A0
A15 തതതത
CE
IO⁄Mഥ
തതതത
OE
തതതത
RD
O7 O0
Output
D7 Lines
Data Bus
D0
Figure 5

Question No.6 [ 1,1,1.2,1.2,1.2]

6.1 In Figure 6, identify the addresses of the input and the output ports.
Input Port Address = 85H (= 1 0000 1012)
Output Port Address = 80H (= 1 0000 0002) 0.5 mark × 2
6.2 In Figure 6, which switches from S0 to S7 are turned on to display
the number “0”?
To display “0”, segments A, B, C, D, E, and F should be turn on.
Thus S0, S1, S2, S3, S4, and S5 are turned on. 1 mark
6.3 In Figure 6, write a program to read the input port and turn on the
corresponding LED when a switch is closed.
IN 85H ;Read data from input port
OUT 89H ;Write data to output port
HLT ;End of the program 0.4 mark × 3
6.4 In Figure 6, eliminate the AND gate, and connect the IO/M ഥ signal
directly to the 3-to-8 decoder. Specify the primary input and output
port addresses and the mirror (foldback) input and output port
addresses. 0.3 mark × 4
Primary Input Port Address = 05H (= 0 0000 1012)
Primary Output Port Address = 00H (= 0 0000 0002)
Page 12 of 19
 Mirror (Foldback) Input Port Address = 85H (= 1 0000 1012)
Mirror (Foldback) Output Port Address = 80H (= 1 0000 0002)
6.5 In Question 6.4, write a program to read the input port and turn on
the corresponding LED when a switch is closed. Use the mirror
(foldback) port addresses for the input and output ports.
IN 85H ;Read data from input port
OUT 80H ;Write data to output port
HLT ;End of the program 0.4 mark × 3

+5V

S7
D7
S6
ഥ
IO⁄M S5
S4
Data Octal
S3
Bus Buffer
S2
A7
S1
A6
D0 തതതത
OE S0
A5
തതതത
RD
A4
A3
തതത
E1 തതത
E 2 E3
MSB
A2 DP
3-to-8 O5 D7
A1 G
A0 Decoder F
LSB E
O0 Data Octal
D +5V
Bus Latch
C
B
D0 LE തതതത
OE A

Common Anode
Seven-Segment LED

തതതതത
WR
Figure 6

Page 13 of 19
Question No.7 [ 1,1,1,1.4,0.8,0.8,0.8,1.4]
7.1 In Figure 7, identify the primary port address and the foldback
(mirror) port address for the upper common-anode seven-segment
LED port (The hundred’s place).
Primary Port Address = 24H (=001 0 01002)
Mirror (Foldback) Port Address = 34H (=001 1 01002) 0.5 mark × 2
7.2 In Figure 7, identify the primary port address and the foldback
(mirror) port address for the middle common-anode seven-segment
LED port (The ten’s place).
Primary Port Address = 23H (=001 0 00112)
Mirror (Foldback) Port Address = 33H (=001 1 00112) 0.5 mark × 2
7.3 In Figure 7, identify the primary port address and the foldback
(mirror) port address for the lower common-anode seven-segment
LED port (The one’s place).
Primary Port Address = 22H (=001 0 00102)
Mirror (Foldback) Port Address = 32H (=001 1 00102) 0.5 mark × 2
7.4 In Figure 7, write an assembly program to display the number “213”
at the common-anode seven-segment LED ports. Use the primary
port addresses for all the common-anode seven-segment LED ports.
MVI A,A4H ;Code for ‘2’ to upper LED
OUT 24H ;Display at upper LED
MVI A,F9H ;Code for ‘1’ for middle LED (CFH is OK)
OUT 23H ;Display at middle LED
MVI A,B0H ;Code for ‘3’ for lower LED
OUT 22H ;Display at lower LED
HLT ;End of the program 0.2 mark × 7
7.5 In Figure 7, eliminate the 2-to-4 decoder and connect A7 to (E തതത2 ) of
the 3-to-8 decoder. Then, identify the primary port address and the
foldback (mirror) port addresses for the upper common-anode
seven-segment LED port (The hundred’s place). 0.1 mark × 8
Primary Port Address = 04H (=0 000 01002)
Mirror (Foldback) Port Address = 14H (=0 001 01002)
= 24H (=0 010 01002)
= 34H (=0 011 01002)
= 44H (=0 100 01002)
= 54H (=0 101 01002)
= 64H (=0 110 01002)
Page 14 of 19
 = 74H (=0 111 01002)
7.6 In Question 7.5, identify the primary port address and the foldback
(mirror) port addresses for the middle common-anode seven-
segment LED port (The ten’s place). 0.1 mark × 8
Primary Port Address = 03H (=0 000 00112)
Mirror (Foldback) Port Address = 13H (=0 001 00112)
= 23H (=0 010 00112)
= 33H (=0 011 00112)
= 43H (=0 100 00112)
= 53H (=0 101 00112)
= 63H (=0 110 00112)
= 73H (=0 111 00112)
7.7 In Question 7.5, identify the primary port address and the foldback
(mirror) port addresses for the lower common-anode seven-segment
LED port (The one’s place). 0.1 mark × 8
Primary Port Address = 02H (=0 000 00102)
Mirror (Foldback) Port Address = 12H (=0 001 00102)
= 22H (=0 010 00102)
= 32H (=0 011 00102)
= 42H (=0 100 00102)
= 52H (=0 101 00102)
= 62H (=0 110 00102)
= 72H (=0 111 00102)
7.8 In Question 7.5, write an assembly program to display the number
“805” at the common-anode seven-segment LED ports. Use the
primary port addresses for all the common-anode seven-segment
LED ports.
MVI A,80H ;Code for ‘8’ to upper LED
OUT 04H ;Display at upper LED
MVI A,C0H ;Code for ‘0’ for middle LED (CFH is OK)
OUT 03H ;Display at middle LED
MVI A,92H ;Code for ‘5’ for lower LED
OUT 02H ;Display at lower LED
HLT ;End of the program 0.2 mark × 7

Page 15 of 19
 D7 DP
G
F
E
Data Octal
D +5V
Bus Latch
C The
A7 B hun-
തതതതത
WR
D0 തതതത
LE OE A dred’s
ഥ
E place
MSB
A6 2-to-4 Common Anode
Decoder Seven-Segment LED
A5 തതതതത
CS1
LSB O1
D7 DP
G
F
ഥ
IO⁄M E
A3 Data Octal
തതതതത
CS4 Latch
D +5V
Bus
C The
തതത
E1 തതത
E 2 E3
MSB B ten’s
A2 LE തതതത
OE A place
A1 3-to-8 O4 തതതതത3 D0
CS
A0 Decoder O3
LSB O2 Common Anode
Seven-Segment LED
തതതതത2
CS തതതതത
WR
D7 DP
G
F
E
Data Octal
D +5V
Bus Latch
C The
B one’s
D0 തതതത
LE OE A place

Common Anode
Seven-Segment LED

തതതതത
WR

Figure 7
Page 16 of 19
Appendix 8085 Instruction Summary

Mnemonic Hex Mnemonic Hex Mnemonic Hex Mnemonic Hex

MOV A,A 7F MOV D,C 51 MOV L,E 6B LHLD adr 2A
MOV A,B 78 MOV D,D 52 MOV L,H 6C LDA adr 3A
MOV A,C 79 MOV D,E 53 MOV L,L 6D STAX B 02
MOV A,D 7A MOV D,H 54 MOV L,M 6E STAX D 12
MOV A,E 7B MOV D,L 55 MOV M,A 77 SHLD adr 22
MOV A,H 7C MOV D,M 56 MOV M,B 70 STA adr 32
MOV A,L 7D MOV E,A 5F MOV M,C 71 ADD A 87
MOV A,M 7E MOV E,B 58 MOV M,D 72 ADD B 80
MOV B,A 47 MOV E,C 59 MOV M,E 73 ADD C 81
MOV B,B 40 MOV E,D 5A MOV M,H 74 ADD D 82
MOV B,C 41 MOV E,E 5B MOV M,L 75 ADD E 83
MOV B,D 42 MOV E,H 5C XCHG EB ADD H 84
MOV B,E 43 MOV E,L 5D MVI A,byte 3E ADD L 85
MOV B,H 44 MOV E,M 5E MVI B,byte 06 ADD M 86
MOV B,L 45 MOV H,A 67 MVI C,byte 0E ADC A 8F
MOV B,M 46 MOV H,B 60 MVI D,byte 16 ADC B 88
MOV C,A 4F MOV H,C 61 MVI E,byte 1E ADC C 89
MOV C,B 48 MOV H,D 62 MVI H,byte 26 ADC D 8A
MOV C,C 49 MOV H,E 63 MVI L,byte 2E ADC E 8B
MOV C,D 4A MOV H,H 64 MVI M,byte 36 ADC H 8C
MOV C,E 4B MOV H,L 65 LXI B,dble 01 ADC L 8D
MOV C,H 4C MOV H,M 66 LXI D,dble 11 ADC M 8E
MOV C,L 4D MOV L,A 6F LXI H,dble 21 SUB A 97
MOV C,M 4E MOV L,B 68 LXI SP,dble 31 SUB B 90
MOV D,A 57 MOV L,C 69 LDAX B 0A SUB C 91
MOV D,B 50 MOV L,D 6A LDAX D 1A SUB D 92

Page 17 of 19
Mnemonic Hex Mnemonic Hex Mnemonic Hex Mnemonic Hex
SUB E 93 INX H 23 ANA E A3 CMP L BD
SUB H 94 INX SP 33 ANA H A4 CMP M BE
SUB L 95 DCR A 3D ANA L A5 ADI byte C6
SUB M 96 DCR B 05 ANA M A6 ACI byte CE
SBB A 9F DCR C 0D XRA A AF SUI byte D6
SBB B 98 DCR D 15 XRA B A8 SBI byte DE
SBB C 99 DCR E 1D XRA C A9 ANI byte E6
SBB D 9A DCR H 25 XRA D AA XRI byte EE
SBB E 9B DCR L 2D XRA E AB ORI byte F6
SBB H 9C DCR M 35 XRA H AC CPI byte FE
SBB L 9D DCX B 0B XRA L AD JMP adr C3
SBB M 9E DCX D 1B XRA M AE JNZ adr C2
DAD B 09 DCX H 2B ORA A B7 JZ adr CA
DAD D 19 DCX SP 3B ORA B B0 JNC adr D2
DAD H 29 DAA 27 ORA C B1 JC adr DA
DAD SP 39 CMA 2F ORA D B2 JPO adr E2
INR A 3C STC 37 ORA E B3 JPE adr EA
INR B 04 CMC 3F ORA H B4 JP adr F2
INR C 0C RLC 07 ORA L B5 JM adr FA
INR D 14 RRC 0F ORA M B6 PCHL E9
INR E 1C RAL 17 CMP A BF CALL adr CD
INR H 24 RAR 1F CMP B B8 CNZ adr C4
INR L 2C ANA A A7 CMP C B9 CZ adr CC
INR M 34 ANA B A0 CMP D BA CNC adr D4
INX B 03 ANA C A1 CMP E BB CC adr DC
INX D 13 ANA D A2 CMP H BC CPO adr E4

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Mnemonic Hex Mnemonic Hex
CPE adr EC POP H E1
CP adr F4 POP PSW F1
CM adr FC XTHL E3
RET C9 SPHL F9
RNZ C0 OUT byte D3
RZ C8 IN byte DB
RNC D0 DI F3
RC D8 EI FB
RPO E0 NOP 00
RPE E8 HLT 76
RP F0 RIM 20
RM F8 SIM 30
RST 0 C7
RST 1 CF
RST 2 D7
RST 3 DF
RST 4 E7
RST 5 EF
RST 6 F7
RST 7 FF
PUSH B C5
PUSH D D5
PUSH H E5
PUSH PSW F5
POP B C1
POP D D1

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