Scribd
Upload
75 views6 pages

Practice Sheet CDA-1

1. The document contains 12 practice problems related to digital circuit design and computer architecture. The problems cover topics like Moore and Mealy machines, sequence counters, pattern detectors, ALU design, bus protocols, sequential circuits, and timing diagrams. 2. Problem 1 asks to define Moore and Mealy machines with block diagrams. Problem 2 involves designing a sequence counter and implementing it with a PROM and flip-flops. 3. Problem 3 asks to design a pattern detector circuit for the pattern "1010" using multiplexers and flip-flops.

Uploaded by

brijesh.gec21
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
75 views6 pages

Practice Sheet CDA-1

1. The document contains 12 practice problems related to digital circuit design and computer architecture. The problems cover topics like Moore and Mealy machines, sequence counters, pattern detectors, ALU design, bus protocols, sequential circuits, and timing diagrams. 2. Problem 1 asks to define Moore and Mealy machines with block diagrams. Problem 2 involves designing a sequence counter and implementing it with a PROM and flip-flops. 3. Problem 3 asks to design a pattern detector circuit for the pattern "1010" using multiplexers and flip-flops.

Uploaded by

brijesh.gec21
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 6

Practice Sheet 1

Computer Design and Applications (20ECE302T)


ECE, 5th semester
PDEU-Gandhinagar`
1. Define Moore and Mealy Machine with suitable block diagrams.
2. Design an arbitrary sequence counter which can generate the following sequence.
1,4,3,5,2,6

Implement the design using programmable ROM (PROM) and Flip-flops. Clearly mention the
ROM content Table i.e.; ROM address and the value stored at that address.
3. Design a pattern detector circuit which can detect the pattern “1010”. Overlapping of pattern
should also be taken into account. Use Multiplexers and Flip-flops to implement the design. You
may choose either Moore or Mealy Machine. Implement the same circuit using Decoders and
FFs.
4. In a digital system four 8-bit registers are sharing data with each other using a common bus
system. Design and explain a common system protocol by which they can share data among each
other.
5. Design a 4-bit ALU (detailed circuit) which can support the following microoperations.

6. Design an arithmetic circuit with one selection variable S and two 4-bit data inputs A and
B. The circuit generates the following four arithmetic operations in conjunction with the
input carry Cin. Draw the logic diagram for the circuit.
7. Design a 4-bit ALU (detailed circuit) with following microoperations. Clearly mention the
inputs and outputs of the proposed circuit.

8. Design a combinational circuit with three inputs x, y, z and three outputs A, B, C. When
the binary input is 0, 1, 2, or 3, the binary output is one greater than the input. When the
binary input is 4, 5, 6, or 7, the binary output is one less than the input.
9. A sequential circuit has two D flip-flops A and B, two inputs x and y, and one output z.
The flip-flop input equations and the circuit output are as follows:
DA = x'y + xA
DB = x'B + xA
z=B
a. Draw the logic diagram of the circuit
b. Tabulate the state table.

10. Design a sequential circuit with two JK/D flip-flops A and B and two inputs E and x. If E
= 0, the circuit remains in the same state regardless of the value of x. When E = 1 and x =
1, the circuit goes through the state transitions from 00 to 01 to 10 to 11 and back to 00,
and repeat. When E = 1 and x = 0, the circuit goes through the state transitions from 00 to
11 to 10 to 01 back to 00, and repeat.
11. The following memory units are specified by the number of words times the number of
bits per word. How many address lines and input-output data lines are needed in each
case? (a) 2K × 16; (b) 64K × 8; (c) 16M × 32; (d) 4G × 64.
12. Define with the help of proper timing diagrams a) Set-up time b) Hold time and c)
Propagation Delay of a FF.

You might also like