FET

(FIELD EFFECT
TRANSISTOR)
 Fet’s vs. Bjt’s

Similarities:
➢Amplifiers
➢Switching Device
➢Impedance Matching Circuits
 differences
FET’s BJT’s
✓ Voltage controlled devices ✓ Current controlled devices
✓ Higher input impedance ✓ Lower impedance
✓ Less sensitive to temp. ✓ Higher sensitive
variations ✓ Bipolar device
✓ Unipolar device ✓ Bigger IC
✓ Smaller/ Easily Integrated
Chips
 Types of fet

1. JFET (Junction FET)

2. MESFET (metal-semiconductor FET)
3. MOSFET (metal-oxide-semiconductor
FET)
a. D-MOSFET (Depletion)
b. E-MOSFET (Enhancement)
JFET
(JUNCTION FET)
 Construction and Characteristics of
JFET
➢ Is a three-terminal device with one terminal
capable of controlling the current between the
other two.

3 terminals are:

1. DRAIN (D)
2. SOURCE (S) – connected to n-channel
3. GATE (G) – connected to p-channel
 Two types of JFET
1. n-channel
2. p-channel
Drain Drain

Gate Gate

Note: Source Source

➢ n-channel is more widely used.

 D D

G G

S S
n-channel p-channel
Water Analogy for the JFET control mechanisms
 JFET OPERATING
CHARACTERISTICS
➢ JFET is always operated with the gate-source PN
junction reversed biased.

➢ Reverse biasing of the gate source junction with

the negative voltage produces a depletion region
along the PN junction which extends into the n-
channel and thus increases its resistance by
restricting the channel width as shown in the
preceding figure.
 𝑽𝑮𝑺 = 𝟎, 𝑽𝑫𝑺 Some Positive
Value
When 𝐕𝐆𝐒 = 𝟎 𝐚𝐧𝐝 𝐕𝐃𝐒 is increased
from 0 to a more positive voltage.

➢ The depletion region between p-

gate and n-channel increases

➢ Increasing the depletion region,

decreases the size of the n-channel
which increases the resistance of
the n-channel.

➢ Even though the n-channel

resistance is increasing, the
current (ID) from source to drain
through the n-channel is increasing.
IG = 0 This is because VDS is increasing.

Recall from DIODE discussion:

- The greater the applied reverse bias, the wider is the depletion region.
 Regions of JFET action
1. Ohmic Region – linear region
➢ JFET behaves like an ordinary resistor
2. Pinch Off Region
➢ Saturation or Amplifier Region
➢ JFET operates as a constant current device
because Id is relatively independent of Vds

➢ Idss – drain current with gate shorted to source.

3. Breakdown Region
➢ If Vds is increased beyond its value corresponding
to Va – avalanche breakdown voltage.
➢ JFET enters the breakdown region where Id
increases to an excessive value.
4. CutOff Region
➢ As Vgs is made more and more negative, the gate
reverse bias increases which increases the
thickness of the depletion region.
➢ As negative value of Vgs is increased, a stage
comes when the 2 depletion regions touch each
other.

Vgs (off) = -Vp

/Vp/ = /Vgsoff/
JFET Operating Characteristics: Pinch
Off
➢If VGS = 0 and VDS is further
increased to a more
positive voltage, then the
depletion zone gets so large
that it pinches off the n-
channel.

➢As VDS is increased beyond

|VP |, the level of ID
 𝑽𝑮𝑺 ≥ 𝟎
Voltage from gate to source is
controlling voltage of the JFET.

➢ As 𝐕𝐆𝐒 becomes more negative,

the depletion region increases.

➢ The more negative 𝐕𝐆𝐒 , the

resulting level for 𝐈𝐃 is reduced.

➢ Eventually, when 𝐕𝐆𝐒 =

𝐕𝐩 [Vp = VGS (off)], ID is 0 mA. (the
device is “turned off”.
 JFET Operating Characteristics

n-Channel JFET characteristics with IDSS = 8 mA and VP = -4 V.

 JFET Operating Characteristics:
Voltage-Controlled Resistor
The region to the left of the
pinch-off point is called the
ohmic region/Voltage
controlled resistance region.

The JFET can be used as a variable resistor, where VGS controls the
drain-source resistance (rd). As VGS becomes more negative, the
resistance (rd) increases
where ro is the resistance with VGS=0 and rd is the
resistance at a particular level of VGS.
 For example:
1. For an n-channel JFET with 𝑟𝑜 = 10𝑘Ω ൫𝑉𝐺𝑆 =
−3𝑉, 𝑉𝑝 = −6𝑉 ൯ results to what value of 𝑟𝑑 ?

10𝑘Ω
𝑟𝑑 =
−3 2
(1 − )
−6

𝑟𝑑 = 40𝑘Ω
p-Channel JFETS

The p-channel JFET

behaves the same as the
n-channel JFET, except
the voltage polarities and
current directions are
reversed.
p-Channel JFET Characteristics
Also note that at high levels of
VDS the JFET reaches a
breakdown situation: ID
increases uncontrollably if VDS >
VDSmax
 JFET Symbols

JFET symbols: (a) n-channel; (b) p-channel.

 Summary:
Important parameters to remember:

VGS = 0V, ID = IDSS

Cutoff (𝐼𝐷 = 0𝐴)

𝑉𝐺𝑆 less than the pinch off
level
𝐼𝐷 is between 0 A and 𝐼𝐷𝑆𝑆 𝑓𝑜𝑟 𝑉𝐺𝑆 ≤
0𝑉 𝑎𝑛𝑑 𝑔𝑟𝑒𝑎𝑡𝑒𝑟 𝑡ℎ𝑎𝑛 𝑡ℎ𝑒 𝑝𝑖𝑐𝑛ℎ 𝑜𝑓𝑓 𝑙𝑒𝑣𝑒𝑙.
 JFET Transfer Characteristics
In a BJT, 𝛽 indicates the relationship between 𝐼𝐵 (input) and 𝐼𝐶 (output).
Control variable
𝐼𝐶 = 𝑓 𝐼𝐵 = 𝛽𝐼𝑏

Constant

In a JFET, the relationship of 𝑉𝐺𝑆 (input) and 𝐼𝐷 (output) is defined by Shockley’s

Equation
Control variable
2
𝑉𝐺𝑆
𝐼𝐷 = 𝐼𝐷𝑆𝑆 1−
𝑉𝑝

Constant
 Co-inventor of the first
transistor and formulator of
the “field effect” theory
employed in the development
of the transistor and the FET

William Bradford Shockley (1910–

1989)
This graph shows the value of 𝑰𝑫 for a given value of 𝑽𝑮𝑺 .
 Plotting the JFET Transfer Curve
Using 𝐼𝐷𝑆𝑆 and 𝑉𝑝 (𝑉𝐺𝑆 (𝑜𝑓𝑓)) values found in a specification sheet, the transfer curve
can be plotted according to these three steps:

Step 1:
2
𝑉𝐺𝑆
Solving for 𝑉𝐺𝑆 = 0, 𝐼𝐷 = 𝐼𝐷𝑆𝑆 1− , ID = IDSS
𝑉𝑝
Step 2:
2
𝑉𝐺𝑆
Solving for 𝑉𝐺𝑆 = 𝑉𝑝 (𝑉𝐺𝑆 𝑜𝑓𝑓 ), 𝐼𝐷 = 𝐼𝐷𝑆𝑆 1− , ID = 0 A
𝑉𝑝

Step 3:

Solving for 𝐼𝐷 if we substitute 𝑉𝐺𝑆 = −1 𝑉 , 𝐼𝐷𝑆𝑆 = 8mA and 𝑉𝑝 =-4

2 2
𝑉𝐺𝑆 (−1)
𝐼𝐷 = 𝐼𝐷𝑆𝑆 1− , 𝐼𝐷 = 8𝑚𝐴 1 − ,
𝑉𝑝 (−4)
ID = 4.5mA
Conversely, for a given Shorthand
𝐼𝐷 , 𝑉𝐺𝑆 can be obtained:
Method:

𝑉𝐺𝑆
2 𝐼𝐷𝑆𝑆 𝑉𝑝
𝐼𝐷 = 𝐼𝐷𝑆𝑆 1− 𝐼𝐷 = ฬ 𝑉𝐺𝑆 =
𝑉𝑝 4 2

𝐼𝐷
𝑉𝐺𝑆 = 𝑉𝑝 1 − 𝐼𝐷𝑆𝑆
𝐼𝐷𝑆𝑆 𝑉𝐺𝑆 ≅ 0.3𝑉𝑝 ห𝐼𝐷 =
2
For Example:
Sketch the transfer curve defined by 𝐼𝐷𝑆𝑆 = 12𝑚𝐴 and 𝑉𝑝 = −6𝑉.

By shorthand method,

@ 𝑉𝑝 −6
𝑉𝐺𝑆 = = ൗ2 = −𝟑𝑽
2

𝐼𝐷𝑆𝑆 12𝑚𝐴
𝐼𝐷 = = ൗ4 = 𝟑𝒎𝑨
4

@
𝐼𝐷𝑆𝑆 12𝑚𝐴
𝐼𝐷 = = ൗ2 = 𝟔𝒎𝑨
2

𝑉𝐺𝑆 ≅ 0.3𝑉𝑝 = 0.3 −6𝑉 = −𝟏. 𝟖𝑽

IMPORTANT RELATIONSHIPS
 MOSFET
(METAL-OXIDE-
SEMICONDUCTOR
There are two types of MOSFETs:

➢ Depletion-Type
➢ Enhancement-Type
 Depletion-Type MOSFET
Construction
➢ The Drain (D) and Source (S) connect
to the to n-doped regions.

➢ These n-doped regions are connected

via an n-channel.

➢ This n-channel is connected to the

Gate (G) via a thin insulating layer of
SiO2.

➢ The n-doped material lies on a p-

n-Channel depletion-type doped substrate that may have an
MOSFET additional terminal connection called
Substrate (SS).
Dielectric
insulator
 Silicon Dioxide:
➢ Insulator refer to as DIELECTRIC.
➢ It sets up opposing electric field within the
dielectric when exposed to an externally
applied field.
➢ The fact that SiO2 layer is an insulating layer
means that:
There is no direct electrical connection between the gate
terminal and the channel of a MOSFET.

It is the insulating layer of SiO2 in the MOSFET

construction that accounts for the very desirable high
input impedance of the device
 Why MOSFET?
➢ Metal:
❖For the drain, source, and gate connection for the
proper surface – in particular, the gate terminal and
the control to be offered by the surface area of the
contact.
➢ Oxide:
❖For the Silicon dioxide insulating layer.
➢ Semiconductor:
❖For the basic structure on which the n- and p-type
region are DIFFUSED.

MOSFET is also called

INSULATED GATE-FET or IGFET
Depletion-Type MOSFET :Basic
Operation and Characteristics
✓ VGS = 0and VDS is applied
across the drain to
source terminals.

✓ This results to attraction

of free electrons of the
n-channel to the drain,
and hence current flows.
Continuation….
➢ 𝑉𝐺𝑆 is set at a negative voltage
such as -1 V
➢ The negative potential at the
gate pressure electrons toward
the p-type substrate and attract
the holes for the p-type
substrate.
➢ This will reduce the number of
free electrons in the n-channel
available for conduction.
➢ The more negative the 𝑉𝐺𝑆 , the
resulting level of drain current
𝐼𝐷 is reduced.
➢ When 𝑉𝐺𝑆 is reduced to 𝑉𝑃
(pinch off voltage), then 𝐼𝐷 =
0𝑚𝐴.
When 𝑉𝐺𝑆 is reduced to 𝑉𝑃 (pinch off) {i.e𝑉𝑃 = −6𝑉} then 𝐼𝐷 = 0𝑚𝐴.

For positive values of 𝑉𝐺𝑆 , the positive gate will draw additional electrons
(free carriers from the p-type substarte and hence 𝐼𝐷 increases.)
 depletion-type MOSFET can
operate
➢ Depletion mode
in two modes:
➢ Enhancement mode
D-Type MOSFET in Depletion
Mode

The characteristics are similar to a JFET.

➢ When 𝑉𝐺𝑆 = 0𝑉, 𝐼𝐷 = 𝐼𝐷𝑆𝑆

➢ When 𝑉𝐺𝑆 < 0𝑉, 𝐼𝐷 < 𝐼𝐷𝑆𝑆

2
𝑉𝐺𝑆
𝐼𝐷 = 𝐼𝐷𝑆𝑆 1−
𝑉𝑝
D-Type MOSFET in Enhancement
Mode

@ 𝑉𝐺𝑆 > 0
𝐼𝐷 increase above the 𝐼𝐷𝑆𝑆

2
𝑉𝐺𝑆
𝐼𝐷 = 𝐼𝐷𝑆𝑆 1−
𝑉𝑝

Note:
𝑉𝐺𝑆 is now positive polarity
D-Type MOSFET Symbols
Enhancement-Type
MOSFET
Enhancement-Type MOSFET
Construction
➢ The Drain (D) and Source (S)
connect to the to n-doped
regions.

➢ The Gate (G) connects to the p-

doped substrate via a thin
insulating layer of SiO2

➢ There is no channel

➢ The n-doped material lies on a

p-doped substrate that may
have an additional terminal
connection
➢ For 𝑉𝐺𝑆 = 0, 𝐼𝐷 = 0(no channel)
➢ For 𝑉𝐷𝑆 some positive voltage and
𝑉𝐺𝑆 = 0, two reversed biased n-
junctions and no significant flow
between drain and source.

➢ For 𝑉𝐺𝑆 > 0 and 𝑉𝐺𝑆 > 0, the

positive voltage at gate pressure
holes to enter deeper regions of the
p-substrate, and the electrons in p-
substrate and the electrons in p-
substrate will be attracted to the
positive gate.
➢ The level of 𝑉𝐺𝑆 that results in the
significant increase in drain current
in called:
THRESHOLD VOLTAGE (Vt)
➢ For 𝑉𝐺𝑆 < 𝑉𝑇 , 𝐼𝐷 = 0𝑚𝑎
Basic Operation of the E-Type
Note:
MOSFETThe enhancement-type MOSFET
operates only in the enhancement
mode

➢ 𝑉𝐺𝑆 is always positive

➢ As 𝑉𝐺𝑆 increases, 𝐼𝐷 increases
➢ As 𝑉𝐺𝑆 is kept constant and 𝑉𝐷𝑆 is
increased, then 𝐼𝐷 saturates (𝐼𝐷𝑆𝑆 )
and the saturation level, 𝑉𝐷𝑆𝑠𝑎𝑡 is
reached.
➢ 𝑉𝐷𝑆𝑠𝑎𝑡 can be calculated by

𝑉𝐷𝑠𝑎𝑡 = 𝑉𝐺𝑆 − 𝑉𝑇
 E-Type MOSFET Transfer Curve

To determine 𝐼𝐷 given 𝑉𝐺𝑆 :

Where,
𝑉𝑇 is the threshold voltage or voltage at which the MOSFET turns on.
𝑘, a constant, can be determined by using values at a specific point and the
formula:
For Example:
Substituting 𝐼𝐷(𝑜𝑛) = 10𝑚𝐴 𝑤ℎ𝑒𝑛 𝑉𝐺𝑆(𝑜𝑛) = 8𝑉

The level of 𝑉𝑇 is 2V, as revealed by the

fact that the drain current has dropped to
0 mA.

10𝑚𝐴
𝑘=
(8𝑉 − 2𝑉)2
= 𝟎. 𝟐𝟕𝟖𝒙𝟏𝟎−𝟑 𝑨ൗ 𝟐
𝑽
Note:
For values of 𝑉𝐺𝑆 less than the threshold level, the drain current of an enhancement
type MOSFET is 0 mA.

Substituting the 𝑉𝐺𝑆 from the general equation:

𝐼𝐷 = 𝑘(𝑉𝐺𝑆 − 𝑉𝑇 )2
𝑘 = 0.278𝑥10−3

𝐼𝐷 = 0.278𝑚𝐴/𝑉 2 (𝑉𝐺𝑆 − 2𝑉)2

i.e substituting 𝑉𝐺𝑆 = 4𝑉, we find that

𝐼𝐷 = 0.278𝑚𝐴/𝑉 2 (4𝑉 − 2𝑉)2

𝑰𝑫 = 𝟏. 𝟏𝟏𝒎𝑨
MOSFET Symbols
 VMOS
Vertical MOSFETs
 VMOS Characteristics:

➢ Compared with commercially available planar

MOSFETs, VMOS FETs have reduced channel resistance
levels and higher current and power ratings
➢ VMOS FETs have a positive temperature coefficient
that will combat the possibility of thermal runaway
➢ The reduced charge storage levels result in faster
switching times for VMOS construction compared to
those for conventional planar construction
 CMOS
Complementary MOSFETs
 CMOS Characteristics:

➢Extensive application in computer logic design

➢Relatively high input impedance
➢Fast switching speeds
➢Lower operating power levels – CMOS logic
design
 MESFETS

Metal semiconductor FETs

 ASSIGNMENT:
1. In what ways is the construction of a depletion type of
MOSFET similar to that of a JFET? In what ways is it
different?

2. What is the significant difference between the

construction of an enhancement type MOSFET and a
depletion type MOSFET?

3. Sketch the transfer characteristics of a p-channel

enhancement type MOSFET if 𝑉𝑇 = −5𝑉 and 𝑘 =
0.45𝑥10−3 𝐴Τ𝑉 2 .
 Source:
Electronic Devices and Circuit Theory, 10th Ed., R.
Boylestad & L. Nashelsky, Copyright ©2009 by
PEARSON Education, Inc.