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Embedded Lab Experiment 4 Final

1. The document contains code examples and circuit diagrams for using interrupts on an AVR microcontroller. 2. It includes assembly and C code for an example interrupt that toggles an LED when a button is pressed. 3. It also contains code and diagrams for two class assignments that use interrupts to increment or decrement the value displayed on a 7-segment display. The second assignment uses two interrupts to toggle between up and down counting.

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Shriram Dhamdhere
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19 views11 pages

Embedded Lab Experiment 4 Final

1. The document contains code examples and circuit diagrams for using interrupts on an AVR microcontroller. 2. It includes assembly and C code for an example interrupt that toggles an LED when a button is pressed. 3. It also contains code and diagrams for two class assignments that use interrupts to increment or decrement the value displayed on a 7-segment display. The second assignment uses two interrupts to toggle between up and down counting.

Uploaded by

Shriram Dhamdhere
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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1.

Assembly Code for Example of the Interrupt


// Interrupt Assembly
.INCLUDE "M32DEF.INC"
.ORG 0x0000
JMP MAIN
.ORG 0x0002
JMP EX0_ISR
MAIN: LDI R16,HIGH(RAMEND)
OUT SPH,R16
LDI R16,LOW(RAMEND)
OUT SPL,R16
SBI DDRA,PINA0
SBI DDRC,PINC0
CBI PORTC,PINC0
CBI DDRD,PIND2
SBI PORTD,PIND2
SEI
LDI R16,0x40
OUT GICR,R16
LDI R16,0x03
OUT MCUCR,R16
LDI R16,0x01;
LOOP: SBI PORTA,PINA0
CALL Delay
CBI PORTA,PINA0
CALL Delay
JMP LOOP
EX0_ISR:
COM R16
OUT PORTC,R16
RETI
Delay: LDI R17,0xFF //Loop 1
L1: LDI R18,0xFF // Loop 2
L2: LDI R19,0x04 // Loop 3
L3: NOP
DEC R19
BRNE L3 //Loop 3 End
DEC R18
BRNE L2 //Loop 2 End
DEC R17
BRNE L1 // Loop 1 End
RET
2. C Code for Example of the Interrupt
// Interrupt at INT0 Edge Triggered
#include <avr/io.h>
#define F_CPU 1000000L
#include <util/delay.h>
#include <avr/interrupt.h>
int main(void)
{
DDRD=0x00;
PORTD=0x04;
DDRA=DDRA|0x01;
DDRC=DDRC|0x01;
PORTC=0x00;
GICR=0x40;
MCUCR=0x03;
sei();
while (1)
{
PORTA=PORTA|0x01;
_delay_ms(500);
PORTA=PORTA&0xFE;
_delay_ms(500);
}
}
ISR(INT0_vect)
{
PORTC=!PORTC;
_delay_ms(1000);
}
3. Assembly Code for Class Assignment 1
// Interrupt Assembly
.INCLUDE "M32DEF.INC"
.ORG 0x0000
JMP MAIN
.ORG 0x0002
JMP EX0_ISR1
.ORG 0x0004
JMP EX0_ISR2
MAIN: LDI R16,HIGH(RAMEND)
OUT SPH,R16
LDI R16,LOW(RAMEND)
OUT SPL,R16
LDI R16,HIGH(RAMEND)
LDI R16,0x3F //Seven Segment Bits for 0
MOV R0,R16
LDI R16,0x06 //Seven Segment Bits for 1
MOV R1,R16
LDI R16,0x5B //Seven Segment Bits for 2
MOV R2,R16
LDI R16,0x4F //Seven Segment Bits for 3
MOV R3,R16
LDI R16,0x66 //Seven Segment Bits for 4
MOV R4,R16
LDI R16,0x6D //Seven Segment Bits for 5
MOV R5,R16
LDI R16,0x7D //Seven Segment Bits for 6
MOV R6,R16
LDI R16,0x07 //Seven Segment Bits for 7
MOV R7,R16
LDI R16,0x7F //Seven Segment Bits for 8
MOV R8,R16
LDI R16,0x6F //Seven Segment Bits for 9
MOV R9,R16
LDI R16,0XFF
OUT DDRA,R16
LDI R27,0x00; // XH of the register pair X
LDI R26,0x00; // XL of the register pair X

SBI DDRC,PINC0
CBI DDRD,PIND2
SBI PORTD,PIND2
CBI DDRD,PIND3
SBI PORTD,PIND3

SEI
LDI R16,0xC0
OUT GICR,R16
LDI R16,0x0F
OUT MCUCR,R16

LD R16,X
OUT PORTA,R16

LOOP: SBI PORTC,PINC0


CALL Delay
CBI PORTC,PINC0
CALL Delay
JMP LOOP

EX0_ISR1:
ADIW R26,0x01
CPI R26,0x0A
BRGE RED
LD R16,X
OUT PORTA,R16
RETI
EX0_ISR2:
ADIW R26,0x09
CPI R26,0x0A
BRGE RED
LD R16,X
OUT PORTA,R16
RETI
RED: SBIW R26,0x0A
LD R16,X
OUT PORTA,R16
RETI
Delay: LDI R17,0xFF //Loop 1
L1: LDI R18,0xFF // Loop 2
L2: LDI R19,0x04 // Loop 3
L3: NOP
DEC R19
BRNE L3 //Loop 3 End
DEC R18
BRNE L2 //Loop 2 End
DEC R17
BRNE L1 // Loop 1 End
RET
4. C Code for Class Assignment 1
#include <avr/io.h>
#include <util/delay.h>
#include <avr/interrupt.h>
int x = 0;
unsigned char segBits[] = {
0x3F, // Seven Segment Bits for 0
0x06, // Seven Segment Bits for 1
0x5B, // Seven Segment Bits for 2
0x4F, // Seven Segment Bits for 3
0x66, // Seven Segment Bits for 4
0x6D, // Seven Segment Bits for 5
0x7D, // Seven Segment Bits for 6
0x07, // Seven Segment Bits for 7
0x7F, // Seven Segment Bits for 8
0x6F // Seven Segment Bits for 9
};
int main(void)
{
DDRD = 0x00;
PORTD = 0x0C;
DDRA = 0xFF;
PORTA = segBits[x];
DDRC = DDRC | 0x01;
GICR = 0xC0;
MCUCR = 0x0F;
sei();

while (1)
{
PORTC = PORTC | 0x01;
_delay_ms(500);
PORTC = PORTC & 0xFE;
_delay_ms(500);
}
}

ISR(INT0_vect)
{
x = (x + 1) % 10;
PORTA = segBits[x];
}

ISR(INT1_vect)
{
x = (x + 9) % 10;
PORTA = segBits[x];
}
5. Assembly Code for Class Assignment 2
.INCLUDE "M32DEF.INC"
.ORG 0x0000
RJMP MAIN
.ORG 0x0002
RJMP INT0_ISR
.EQU flag=0x0100
MAIN:
LDI R16, HIGH(RAMEND)
OUT SPH, R16
LDI R16, LOW(RAMEND)
OUT SPL, R16
LDI R16, 0x3F ; Seven Segment Bits for 0
MOV R0, R16
LDI R16, 0x06 ; Seven Segment Bits for 1
MOV R1, R16
LDI R16, 0x5B ; Seven Segment Bits for 2
MOV R2, R16
LDI R16, 0x4F ; Seven Segment Bits for 3
MOV R3, R16
LDI R16, 0x66 ; Seven Segment Bits for 4
MOV R4, R16
LDI R16, 0x6D ; Seven Segment Bits for 5
MOV R5, R16
LDI R16, 0x7D ; Seven Segment Bits for 6
MOV R6, R16
LDI R16, 0x07 ; Seven Segment Bits for 7
MOV R7, R16
LDI R16, 0x7F ; Seven Segment Bits for 8
MOV R8, R16
LDI R16, 0x6F ; Seven Segment Bits for 9
MOV R9, R16
LDI R27, 0x00 ; XH of the register pair X
LDI R26, 0x00 ; XL of the register pair X
LDI R21,0x01;
LDI R22,0x09;
CBI DDRD,PIND2
SBI PORTD,PIND2
LDI R16, 0xFF
OUT DDRA, R16 ; Set PORTA as output
LD R16, X
OUT PORTA, R16 ; Initialize PORTA with segBits[x]
SEI ; Enable global interrupts
LDI R16, 0x40
OUT GICR, R16 ; Enable INT0 interrupt
LDI R16, 0x03
OUT MCUCR, R16 ; Trigger on rising edge
MAIN_LOOP:
LDS R16, flag
CPI R16,0x00
BRNE DOWN_COUNTER
; UP Counter logic
CPI R26,0x0A
BRGE RED
LD R16,X
ADIW R26,0x01
OUT PORTA,R16
RJMP WAIT_DELAY
DOWN_COUNTER:
; DOWN Counter logic
LD R16,-X
OUT PORTA,R16
CPI R26,0x00
BRNE WAIT_DELAY
LDI R26,0x0A
JMP WAIT_DELAY
RED:
SUBI R26,0x0A
RET
WAIT_DELAY:
RCALL DELAY
RJMP MAIN_LOOP
DELAY:
LDI R17, 0xFF ; Loop 1
L1:
LDI R18, 0xFF ; Loop 2
L2:
LDI R19, 0x04 ; Loop 3
L3:
NOP
DEC R19
BRNE L3 ; Loop 3 End
DEC R18
BRNE L2 ; Loop 2 End
DEC R17
BRNE L1 ; Loop 1 End
RETI
INT0_ISR:
LDS R16, flag
EOR R16, R21 ; Toggle flag on INT0 interrupt
STS flag, R16
RETI

6. C Code for Class Assignment 2


// Interrupt at INT0 Edge Triggered
#include <avr/io.h>
#define F_CPU 1000000L
#include <util/delay.h>
#include <avr/interrupt.h>
int flag=0;
int x=0;
unsigned char segBits[] = {
0x3F, // Seven Segment Bits for 0
0x06, // Seven Segment Bits for 1
0x5B, // Seven Segment Bits for 2
0x4F, // Seven Segment Bits for 3
0x66, // Seven Segment Bits for 4
0x6D, // Seven Segment Bits for 5
0x7D, // Seven Segment Bits for 6
0x07, // Seven Segment Bits for 7
0x7F, // Seven Segment Bits for 8
0x6F // Seven Segment Bits for 9
};
int main(void)
{
DDRD=0x00;
PORTD=0x0C;
DDRA=0xFF;
PORTA = segBits[x];
GICR=0x40;
MCUCR=0x03;
sei();
while (1)
{
if(flag==0)
{
PORTA = segBits[(x++)];
if(x==10)x=0;
_delay_ms(1000);
}
else
{
PORTA = segBits[--x];
if(x==0)x=10;
_delay_ms(1000);
}
}
}
ISR(INT0_vect)
{
flag = flag ^ 0x01;
}
7. Circuit Diagram for the Example of Interrupt
8. Circuit Diagram for the Class Assignment 1
9. Circuit Diagram for the Class Assignment 2

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