Chapter 3 Arithmetic and Logic Instructions

• Unsigned numbers
• Zero or positive numbers
• 0 – 0xFFFFFFFF (0 to 232 -1) for 32-bit operand
• Affecting flags in ARM instructions
• We need to explicitly request it by “S suffix”

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 ADD and ADDS (1)

The first ADDS in line 6

Z=
C=

The second ADDS in line 9

Z=
C=
2

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 ADD and ADDS (2)

The first ADDS in line 6

Z= C=

The ADD in line 8

Z = and C =

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 Increment / Decrement (increase/decrease by 1)
• There is no “increment” instruction in ARM
• We use, instead, add 1
• EX) ADD r4, r4, #1 // r4 = r4 +1

• There is no “decrement” instruction in ARM

• We use, instead, subtract 1
• EX) SUB r4, r4, #1 // r4 = r4 +1

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 ADC (Add with Carry) - 1
• Used for adding multiword (larger than 32-bit) numbers
• Format: ADC rd, rn, op2 // rd = rn + op2 + Carry
• Addition of Single Word data
• 10 0000 0000 = 0x3B 9A CA 00

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 ADC (Add with Carry) - 2
• Format: ADC rd, rn, op2 // rd = rn + op2 + Carry
• Addition of Multi-Word data
• Big numbers added could reach 8 byte wide or more
• Registers hold only 4 bytes
• Breakdown 8-byte data, break into two (2) 4-byte words
• Example: addition of 0x35 F6 25 62 FA (
5-byte data) and 0x 21 F4 12 96 3B (5-
byte data)

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 ADC (Add with Carry) - 3
• Addition of Multi-Word data
• Example: addition of 0x35 F6 25 62 FA ( 5-byte data) and
0x 21 F4 12 96 3B (5-byte data)

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 SUB (Subtraction of unsigned numbers)
Format: SUB rd, rn, op2 //rd = rn – op2
• Actual work of ARM: rn + 2’s complement of op2
• Because CPU has adder circuitry
Example: (a) 4F – 39 (b) 4F - 05

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 SBC (Subtract with Carry)
• For subtraction of multi-word numbers
• Format
• SBC rd, rn, op2 //rd = rn-op2 + C - 1
• Example: A = 0x 35 F4 12 96 3B B = 0x 21 F6 25 62 FA
• A - B

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 SBC (Subtract with Carry)
• For subtraction of multi-word numbers
• Format
• SBC rd, rn, op2
//rd = rn-op2 + C - 1
• Example: A = 0x 35 F4 12 96 3B
B = 0x 21 F6 25 62 FA
• A - B

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 Multiplication (of unsigned numbers)
MUL --- regular multiply --- result is less than 32-bit
UMULL – long multiply – result is greater than 32-bit

MUL (multiply)
Format: MUL rd, rn, op2 // rd = rn * op2
UMULL (Long multiply)
Format: UMULL rdLo, rdHi, Rn, op2 //rdHi:rdLo = rn*op2

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MUL & UMULL
Example:
(a) 0x25 * 0x65
(b) 100,000 * 150,000

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 MLA (Multiply and Accumulate)
• Purpose: (a) Multiply 2 variables and (b) add the
result to another variable – in a single instruction:
MLA (regular) and UMLAL (long)
• Format: MLA rd, rm, rs, rn // rd = rm*rs + rn
• Format: UMLAL rdLo, rdHi, rn, op2 // rdHi:rdLo = rn *
op2 + rdHi:rdLo
• Example
• (a) 100*5 + 40
• (b) 0x34000000
* 0x20000000
with rdLo = 0x0BBB
rdHi = 0

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MLA (Multiply and Accumulate)

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 Division
• Some ARM families do not have instructions for division of unsigned
numbers
• Because it takes many gates to implement it
• We use SUB instructions to perform the division (in the next chapter)

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 Logic Instructions

• AND: bit-wise logical AND on the operands and place the result in the destination
• Format: AND rd, rn , op2 // rd  rn & op2
• ORR: bit-wise OR
• Format: ORR rd, rn, op2 //rd  rn | op2
• EOR: bit-wise exclusive OR
• Format: bit-wise Exclusive-OR
• Format: EOR rd, rn, op2 //rd  rn ^ op2
• BIC (bit clear): clear selected bits (held by op2) of the rn register
• Format: BIC rd, rn, op2 //Clear bits of rn specified by op2 and place the results in rd

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Logic Instructions – Example: Q) Write a code which
performs the 6 logical instructions shown below.

1. 0x35 AND 0x0F

2. 0x97 AND 0xF0
3. 0x04 OR 0x68
4. 0x97 OR 0xF0
5. 0x54 EOR 0x78
6. 0xAA EOR 0x04
7. Clear the bits 0, 1, 2,and 3 of 0xAA

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MVN (Move NOT)
Format:
MVN rd, rn
//Move the complement (NOT) of rn to rd

Example:
LDR r1, =0xFFFFEEEE
MVN r2, r1 //r2 =
LDR r3, =0xAAAAAAAA
MVN r4, r3 //r4 =
LDR r5, =#0xAAAAAAAA
MVN r6,#0
//r6 =
EOR r7,r6,r5
//r7 = r6^r5 =

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 Rotate and Barrel Shift
• Rm (operand) can be
optionally shifted before
fed to ALU
• Shift amount: 8-bit immediate
number ( 0 – 255)
• LSR: logical shift right
• LSL: Logical shift left
• ROR: Rotate right
• Logical Shift Right (LSR)
• MSB filled with 0
• If S suffix is used, LSB will
go to the carry flag (C)
• Example of LSR by 4

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 Rotate and Barrel Shift
• Logical Shift Right (LSR) - Example 2

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 Rotate and Barrel Shift
• Logical Shift Left
(LSL)
• LSB filled with 0
• If S suffix is used,
MSB will go to the
carry flag (C)
• Example of LSL by 4

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 ROR [rotate right] and RRX [rotate right extended]
• Simple rotation – ROR
• LSB to MSB
• Ex) ROR by 4

• No Rotate Left in ARM

• Rotate Left using ROR
• Rotate left n bits
• = Rotate right (32 – n) bits
• Rotation through Carry – RRX
• Rotate only once

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 ROR [rotate right] and RRX [rotate right extended]
• No Rotate Left in ARM
• Rotate Left using ROR
• Rotate left n bits
• = Rotate right (32 – n) bits

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 ROR [rotate right] and RRX [rotate right extended]
• Rotation through Carry – RRX
• Rotate only once

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 Shift and Rotate Instruction (without using barrel shifter)
• Shift/Rotate without using Barrel Shifter
• MOV r0, r2, LSL #8 //with barrel shift
• LSL r0, r2, #8 //regular shift instruction
• ASR – Arithmetic Shift Right
• No ASL !!!
• LSL – Logical shift left
• LSR – Logical shift right
• ROR – Rotate Right
• RRX – Rotate Right with Extend
• ASR (Arithmetic Shift Right)
• For signed number shifting
• Format: ASR rd, rm, rn
• //shift rm by rn times
• //and store it in rd
• LSB bit removed
• Empty bit filled with MSB
• Keep the sign
• Divide by 2

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 Shift and Rotate Instruction (w/o using barrel shifter)
• LSL (Logical Shift Left)
• Format: LSL rd, rm, rn
• //shift rm left by rn times
• //and store it in rd
• MSB removed (or goes to Carry)
• LSLS updates Carry flag
• Empty bit filled with 0
• Multiply by 2

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 Shift and Rotate Instruction (w/o using barrel shifter)
• LSR (Logical Shift Right)
• Format: LSR rd, rm, rn
• //shift rm right by rn times
• //and store it in rd
• LSB removed (or goes to Carry)
• LSRS updates Carry flag
• Empty bit filled with 0
• Divide by 2

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 Shift and Rotate Instruction (w/o using barrel shifter)
• ROR (Rotate Right)
• Format: ROR rd, rm, rn
• //Rotate rm right by rn times
• //and store it in rd
• LSB is moved to MSB (and goes to Carry)

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 Shift and Rotate Instruction (w/o using barrel shifter)
• RRX (Rotate Right with Extend)
• Format: RRXD rd, rm
• //Rotate rm right by 1 bit through Carry
• //C is shifted to MSB

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