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Multiplication Algorithm

Multiplication algorithm

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9 views2 pages

Multiplication Algorithm

Multiplication algorithm

Uploaded by

tarakabhi82
Copyright
© © All Rights Reserved
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Multiplication Algorithm: + Multiplication of two fixed-point binary numbers in signed-magnitude representation is done with paper and pencil by a process of successive shift and add operations. his process is best illustrated with a numerical example, 23 oli Multiplicand 19 X10011 Multiplier 10111 lollL 00000 00000 10111 437 1101 10101 Product The process consists of looking at successive bits of the multiplier, least significant bit first. If the multiplier bit is a 1, the multiplicand is copied down; otherwise, zeros are copied down, The numbers copied down in successive lines are shifted one position to the left from the previous number. Finally, the numbers are added and their sum forms the product. The sign o f the product is determined from the signs of the multiplicand and multiplier. If they are alike, the sign of the product is positive. If they are unlike, the sign of the product is negative. Hardware Algorithm: Figure 3-D is a flowchart of the hardware multiply algorithm. Step 1 " Initially, the multiplicand is in B and the multiplier in Q. Their corresponding signs are in Bs, and Qs, respectively. ‘The signs are compared, and both A and Q are set to correspond to the sign of the product since a double-length product will be stored in registers A and Q. Step 2: Registers A and E are cleared and the sequence counter SC is set to a number equal to the number of bits of the multiplier. Step 3: After the initialization, the low-order bit of the multiplier in Qa, is tested. If it isa 1, the multiplicand in B is added to the present partial product in A .Ifit is a 0, nothing is done. Step 4: Register FAQ is then shifted once to the right to form the new partial product. The sequence counter is decremented by 1 and its new value checked. If it is not equal to zero, the process is repeated and a new partial product is formed, The process stops when SC Multiply operation Multiplicand in B Multiplier in ig 3-D: Flowchart for multiply operation NOTE: The partial product formed in A is shifted into Q one bit at a time and eventually replaces the multiplier. The final product is available in both A and Q, with A holding the most significant bits and Q holding the least significant bits

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