Unit 4 Unit IV Digital Electronics

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Basic Electrical
Electronics and
Instrumentation
Engineering
Department Mechanical Engineering

Batch/Year 2021-22 / I Year
Mr. HARIHARAN N
Created by
Date 22.11.2021
4
1. TABLE OF CONTENTS
S. No Topic Page No.
1 Course Objectives 6
2 Pre Requisites 8
3 Syllabus 10
4 Course outcomes 12
5 CO- PO/PSO Mapping 14
6 Lecture Plan 18
7 Activity based learning 21
8 Lecture Notes 23
9 Link to Videos 125
10 e-book reference 127
11 Multiple Choice Questions 129
12 Assignments 132
13 Part A Question with answers 134
14 Part B Questions 142
Supportive online Certification courses 145

15
Real time Applications in day to day life 147

16
and to Industry
17 Contents beyond the Syllabus 152
Prescribed Text Books & Reference 154

18
Books
19 Mini-project 156
5
COURSE
OBJECTIVES
1
6
1. COURSE OBJECTIVES
The students should be made:

To realize the basic laws using DC and AC circuits and its components
To understand the principle of operation and the characteristic of electrical
machines
To analyze various semiconductor devices and its applications
To aware of Boolean algebra and to analyze counters and converters
To comprehend the types of transducer and measuring instruments
7
PREREQUISITES
2
8
2. PREREQUISITES
+2 LEVEL
+2 LEVEL
9
SYLLABUS
3
10
3. SYLLABUS
20EE101-BASIC ELECTRICAL, ELECTRONICS& INSTRUMENTATIONENGINEERING
LTPC3003
UNIT I ELECTRICAL CIRCUITS
Basic circuit components - Ohms Law - Kirchhoff’s Law – Instantaneous Power – Inductors
- Capacitors – Independent and Dependent Sources - steady state solution of DC circuits
- Nodal analysis, Mesh analysis- Introduction to AC circuits – waveforms and RMS value –
power and power factor, single phase and three-phase balanced circuits.
UNIT II ELECTRICAL MACHINES
Principles of operation and characteristics of - DC machines, Transformers (single and

three phase) , Synchronous machines, three phase and single phase induction motors.
(Qualitative Analysis only)
UNIT III ELECTRONIC DEVICES AND CIRCUITS
Introduction –Characteristics of PN junction Diode-Zener Diode and its characteristics-Half

wave and Full wave Rectifiers- Voltage regulation-Bipolar Junction Transistor –
Characteristics – Field Effect Transistors – Transistor Biasing –Introduction to operational
Amplifier –Inverting Amplifier –Non Inverting Amplifier
UNIT IV DIGITAL ELECTRONICS
Binary number system-Boolean algebra theorems-Digital circuits-Introduction to

sequential circuits-Flip flops- Registers and counters- D/A converters (Weighted
resistance type and R-2R ladder type), A/D converters (Flash type, Dual slope type and
Successive Approximation types)
UNIT V MEASUREMENTS & INSTRUMENTATION
Introduction to transducers - Classification of Transducers: Resistive, Inductive,

Capacitive, Thermoelectric, piezoelectric, photoelectric, Hall effect and Mechanical-
Classification of instruments - Types of indicating Instruments - multimeters
–Oscilloscopes.
11
COURSE OUTCOMES
4
12
4. COURSE OUTCOMES
On completion of the course, the students will be able to
CO NO. COURSE OUTCOME K-LEVEL
CO1 Analyze the concept of DC and AC electric circuits K2
Identify appropriate machine for a given

CO2 K2
application
CO3 Explain the working of electron devices K2
CO4 Demonstrate the concept of digital logic circuits K2
Choose appropriate instruments and transducers

CO5 K2
for specific application
9
CO- PO/PSO
MAPPING
5
14
PROGRAM OUTCOMES (POS)
On completion of the B.E (Mechanical Engineering) Degree the Mechanical

Engineering graduates will be able to
1. Engineering knowledge: Apply the knowledge of mathematics, science, engineering

fundamentals, and an engineering specialization to the solution of complex engineering
problems.
2. Problem analysis: Identify, formulate, review research literature, and analyze complex
engineering problems reaching substantiated conclusions using first principles of
mathematics, natural sciences, and engineering sciences.
3. Design/development of solutions: Design solutions for complex engineering problems
and design system components or processes that meet the specified needs with
appropriate consideration for the public health and safety, and the cultural, societal, and
environmental considerations.
4. Conduct investigations of complex problems: Use research-based knowledge and
research methods including design of experiments, analysis and interpretation of data,
and synthesis of the information to provide valid conclusions.
5. Modern tool usage: Create, select, and apply appropriate techniques, resources, and
modern engineering and IT tools including prediction and modeling to complex
engineering activities with an understanding of the limitations.
6. The engineer and society: Apply reasoning informed by the contextual knowledge to
assess societal, health, safety, legal and cultural issues and the consequent
responsibilities relevant to the professional engineering practice.
7. Environment and sustainability: Understand the impact of the professional engineering
solutions in societal and environmental contexts, and demonstrate the knowledge of,
and need for sustainable development.
8. Ethics: Apply ethical principles and commit to professional ethics and responsibilities and
norms of the engineering practice.
9. Individual and team work: Function effectively as an individual, and as a member or
leader in diverse teams, and in multidisciplinary settings.
10. Communication: Communicate effectively on complex engineering activities with the
engineering community and with society at large, such as, being able to comprehend
and write effective reports and design documentation, make effective presentations,
and give and receive clear instructions.
11. Project management and finance: Demonstrate knowledge and understanding of the
engineering and management principles and apply these to one's own work, as a
member and leader in a team, to manage projects and in multidisciplinary environments.
12. Life-long learning: Recognize the need for, and have the preparation and ability to
engage in independent and life-long learning in the broadest context of technological
change.
15
PROGRAM SPECIFIC OUTCOMES (PSOs)
After successful completion of the B.E degree program, the graduates

will be able to
1. Analyze the performance of complex interconnected Power system.
2. Implement latest technological developments in the field of Control and
Automation.
3. Apply cutting edge technology to trouble shoot Electrical equipment.
4. Develop managerial skills to establish Startup Company in the field of
Engineering and Technology.
16
PROGRAM SPECIFIC OUTCOMES (PSOS)
After successful completion of the B.E degree program, the graduates

will be able to
Develop the process for extraction of oil from seeds, plastics and analyse their
properties based on the concepts of thermal science.
Design and implement product life cycle management for digital manufacturing
process.
Utilize composite materials to develop quality consumer goods at affordable price.
12
5. CO- PO/PSO MAPPING
SUBJECT CODE : 21GE102
COURSE NAME : BASIC ELECTRICAL, ELECTRONICS AND
INSTRUMENTATIONENGINEERING
Programme
Program Outcomes Specific
COs Outcomes
1 2 3 4 5 6 7 8 9 10 11 12 1 2 3
1 2 1 2 1 1 - - - - - - - 1 -
2 2 1 2 1 1 - - - - - - - - 1 -
3 2 1 2 1 1 - - - - - - - - - -
4 1 2 2 1 1 1 - - - - - - - - -
5 1 2 2 1 1 - - - - - - - - 1 -
10
6
LECTURE PLAN
18
UNIT IV DIGITAL ELECTRONICS 9 Hours
Contents
Binary number system
Boolean algebra theorems
Digital circuits
Introduction to sequential circuits
Flip flops
Registers
counters
D/A converters
A/D converters
19
Lecture Plan
No.
Actual Taxon
Sl. of Propose Pertaini Mode of
Topic Lecture omy
No. perio d Date ng CO Delivery
Date Level
ds
Binary number
1 system 1 CO4 K2
B o o l e a n
a l g e b r a
2 1 CO4 K2
theorems
Digital circuits
3 1 CO4 K2
Introduction to Online
classes,
sequential
4 1 CO4 K2 YouTube
circuits video,
Google
classroom
Flip flops
5 1 CO4 K2
Registers
6 1 CO4 K2
counters
7 1 CO4 K2
D/A converters
8 1 CO4 K2
A/D converters CO4

9 1 K2
20
7
ACTIVITY BASED
LEARNING
21
7. Activity based learning
Basic level
Play with Binary Numbers using Binary Puzzles http://www.binarypuzzle.com/
Binary to create on-off pictures, Binary magic tricks
https://www.digitaltechnologieshub.edu.au
Troubleshooting Logic Gates for
1.Open Input
2. Open Output conditions
Logic Gate Testing using Multisim software
Practice using open source DEEDS: https://www.digitalelectronicsdeeds.com/

8
LECTURE NOTES
23
Introduction to Digital System
We are in the digital era and digital systems are used in the industries, internet,
medical treatment, space applications, communication, and all possible areas of
automation.
A few examples of digital systems start with a basic calculator to digital computer,
digital telephones, digital media, digital money, digital control systems, home
appliances, etc.
A digital system is an interconnection of digital modules to give a required output
or to do a specified operation.
A basic knowledge of digital circuits and their logical function is required to
understand the operation of each digital module.
Digital System manipulates discrete elements of information represented in binary
form.
Discrete elements of information are represented with groups of bits called binary
codes.
The signals in most present‐day electronic digital systems use just two discrete
values 0 and 1 represented by a binary digit, called a bit.
The natural signals generated by the nature are mostly continuous in nature like
Temperature, Voltage, Current (can be converted to discreet)
The processing in a digital system basically has the following sections:
Input: Analog-to-Digital (A/D) converter at the input end.
Processing: Done using a digital system.
Output: Digital-to-Analog (D/A) converter at the output end.

The Hardware Levels of Digital System
The levels of the hardware system from a CPU to a single transistor layout is
shown below.
The design level, logical representation and the elements that form the circuit at
each level are also shown below.
Source: Thomas Floyd- Digital Fundamentals

NUMBER SYSTEMS
1. Number systems
1.1 Introduction:
1. Number System defines a set of values used to represent a quantity.
2. Number System is a basis for counting various items.
3. Digits: A collection of various symbols in a number system is called digits.
4. Radix / Base: The number of unique digits (including Digit 0) used to represent
the numbers in a positional number system is called radix or base of a number
system.
(or)
The number of values that a digit (one character) can assume in a positional
number system is called radix or base of a number system.
5. The largest value of a digit is always one less than radix / base of a number
system.
6. Weight / Value: In a positional number system, the position of a digit with

reference to the decimal point determines the weight / value.
a. Usually weight / value is expressed in powers of radix / base.
b. The sum of all digits multiplied by their weight gives the total number
being represented.
7. Most Significant Digit / Bit: The leftmost digit / bit which has the greatest
weight is called Most Significant Digit / Bit (MSD / MSB).
8. Least Significant Digit / Bit: The rightmost digit / bit which has the least weight
is called Least Significant Digit / Bit (LSD / LSB).
1.2 Classification of Number System:
1.2.1 Decimal Number System:
1. Base: Base 10 System / Radix 10 System.
a. Number of values assumed by each digit: 10
b. Range: Uses ten digits: 0,1,2,3,4,5,6,7,8,9.
c. Each digit in the Decimal Number System will assume 10 different values
from 0 to 9.
2. Largest Value of a digit: The largest value a digit can take is 9.
a. If larger values than 9 are needed, extra columns are added to the left.
Each column value is now ten times the value of the column to its right.
For example, the decimal value 47 is written 47 (4 tens + 7 ones).
3. Positional Weights: The positional weight of each digit is represented in the

power of 10.
1.2.2 Binary Number System:
b. Range: Uses two digits: 0,1.
c. Each digit in the Binary Number System will assume 2 different values
either 0 or 1.
Each column value is now two times the value of the column to its right.
For example, the decimal value 2 is written 10 in binary (1 twos + 0
ones).

power of 2.
1.2.3 Octal Number System:
b. Range: Uses ten digits: 0,1,2,3,4,5,6,7.
c. Each digit in the Octal Number System will assume 8 different values
from 0 to 7.
Each column value is now eight times the value of the column to its right.
For example, the decimal value 27 is written 33 in octal (3 eights + 3
ones).

power of 8.
1.2.4 Hexadecimal Number System:
1. Base: Base 16 Number System / Radix 16 Number System.
b. Range: Uses ten digits: 0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F.
c. Each digit in the Octal Number System will assume 16 different values
from 0 to 9, A to F.
2. Largest Value of a digit: The largest value a digit can take is F.
a. If larger values than F are needed, extra columns are added to the left.
Each column value is now sixteen times the value of the column to its
right. For example, the decimal value 68 is written as 44 in hexadecimal
(4 sixteens + 4 ones).

power of 16.
1.2.5 Other Number Systems:

1.3 Conversion Between Number Systems:
1.3.1 Decimal to Other Number System Conversion:
Integer Part Conversion:
1. Successively divide by the base of the other number system.
2. Bottom to top approach.
Fraction Part Conversion:
1. Successively multiply by the base of the other number system.
2. Top to bottom approach.
Decimal to Binary Conversion:

Decimal to Octal Conversion:
Decimal to Hexadecimal Conversion:

Decimal to Any Other Number System Conversion:
Remember!!!!
1.3.2 Other Number System to Decimal Conversion:
Express in powers of base of other number system.
Binary to Decimal Conversion:
Octal to Decimal Conversion:

Hexadecimal to Decimal Conversion:
Any Other Number System to Decimal Conversion:

1.3.3 Binary to Other Number System Conversion:
Binary to Octal Conversion:
Group 3 binary bits and write the octal equivalent.
Binary to Hexadecimal Conversion:

Group 4 binary bits and write the hexadecimal equivalent.
1.3.4 Octal to Other Number System Conversion:
Octal to Binary Conversion:
Write the 3 bit binary equivalent for each of the octal digit.
Octal to Hexadecimal Conversion:

Step 1: Octal to Binary Conversion.
Step 2: Binary to Hexadecimal Conversion.
1.3.5 Hexadecimal to Other Number System Conversion:
Hexadecimal to Binary Conversion:
Write the 4 bit binary equivalent for each of the hexadecimal digit.
Hexadecimal to Octal Conversion:

Step 1: Hexadecimal to Binary Conversion.
Step 2: Binary to Octal Conversion.
1.3.6 Any Other Number System 1 to Any Other Number System 2
Conversion:
Step 1: Any Other Number System 1 to Decimal Conversion.
Step 2: Decimal to Any Other Number System 2 Conversion.
1.4 BINARY OPERATION
1.4.1 Binary Addition

Two binary numbers can be added in the same way as two decimal number are
added. Consider the addition of the binary number 1101 and 1111.
Binary Decimal
MSB LSB
1 1 0 1 13 (+)
1 1 1 1 15
1 1 1 0 0 28 Ans
Thus the sum is 11100.
1.4.2 Binary Subtraction
Binary subtraction is also carried out in the same way as decimal number
are subtracted. Suppose that 1001 is subtracted from 1110
Binary Decimal
MSB LSB
1 1 1 1 14 (+)
1 0 0 1 9
0 1 0 1 5 Ans
Thus the answer is 101.

1.4 BINARY OPERATION
1.4.3 Binary Multiplication
Binary multiplication is same as that of decimal multiplication. Multiply the

following binary numbers 1101 and 1100
1 1 0 1
x 1 1 0 0
0 0 0 0
0 0 0 0
1 1 0 1
1 1 0 1
1 0 0 1 1 1 0 0
Thus the answer is 10011100.
1.4.4 Binary Division

Division in binary follows the same procedure as division in decimal. Division by 0
is meaningless. Perform the following division
1 0 .1 2.5
110 1 1 1 1 .0 6 15.0
1 1 0 12
1 1 0
30
1 1 0
30
0 0 0 0
Thus the answer is 10.12 or 2.510

2. Representation of Signed Number
2.1 Signed magnitude

For Positive number - sign bit will be 0
For negative number – sign bit will be 1
The various ways of representing negative numbers are:

1. Sign magnitude
2. 1’s complement
3. 2’s complement
Sign magnitude – 1 101001

1’s complement – 1 010110
2’s complement - 1 010111
2.2 SUBTRACTION USING 1’S COMPLEMENT

Subtraction of smallest number from largest number
Ex 1: 43-21 = 22
43 in Binary 101011
21 in Binary 010101
1’s complement of 21 = 101010
43 in Binary 101011 (+)
1’s complement of 21 101010
=1010101 = 010101 + 1 (End around Carry)
_____________________________________
= 010110 (Answer)
If carry is present, then the answer is positive.
For 1’s complement you have to do End around carry.
Ans =+22
Subtraction of largest number from smallest number.
Ex 2: 21-43
Soln:
21 in Binary 010101
43 in Binary 101011
1’s complement of 43 = 010100
010101
010100 +
________________________
= 101001
There is no carry. Answer is negative.
Ans = -(1’s complement 101001)
=-010110 = - 22
2.3 SUBTRACTION USING 2’S COMPLEMENT

Subtraction of smallest number from largest number using 2’s
complement.
Ex:1) 43-21 = 22
43 in Binary 101011
21 in Binary 010101
2’s complement of 21 = 1’s complement of 21 + 1
101010 1’s complement of 21
1+
= 101011 2’s complement of 21
101011 43 in Binary
101011 +2’s complement of 21
= 1010110 (Ignore Carry)
After ignoring carry, the answer is 0 1 0 1 1 0
If carry is present. The answer is positive.
For Subtraction using 2’s complement , Ignore carry.
Ans =+22
Subtraction of largest number from smallest number using 2’s
complement.
Ex: 2) 21-43
Soln:
21 in Binary 010101
43 in Binary 101011
2’s complement of 43 = 1’s complement of 43 +1
= 010100 +1 =010101
010101 21 in Binary
010101 + 2’s complement of 43
= 101010 .
There is no carry. Answer is negative.
Ans = -(2’s complement 101010)= -(010101 +1) = -010110
Ans =-(010110) =-22
3. Binary Codes
In the coding, when numbers, letters or words are represented by a specific group
of symbols, it is said that the number, letter or word is being encoded. The group
of symbols is called as a code.
The digital data is represented, stored and transmitted as group of binary bits.
This group is also called as binary code. The binary code is represented by
number as well as alphanumeric letter.
Advantages of Binary Code
Binary codes are suitable for computer applications.
Binary codes are suitable for the digital communications.
Binary codes make the analysis and designing of digital circuits easier since only 0 &
1 are being used.
3.1 Classification of binary codes
The codes are broadly categorized into following four categories.
Weighted Codes
Non-Weighted Codes
Binary Coded Decimal Code
Alphanumeric Codes
Error Detecting Codes
Error Correcting Codes
3.1.1 Weighted Codes
Weighted binary codes are those binary codes which obey the positional weight
principle. Each position of the number represents a specific weight. Several systems
of the codes are used to express the decimal digits 0 through 9. In these codes each
decimal digit is represented by a group of four bits.
3.1.2 Non-Weighted Codes
In this type of binary codes, the positional weights are not assigned. The examples
of non-weighted codes are Excess-3 code and Gray code.
Excess-3 code
The Excess-3 code is also called as XS-3 code. It is non-weighted code used to
express decimal numbers. The Excess-3 code words are derived from the 8421 BCD
code words adding 00112 or 3 10 to each code word in 8421. The excess-3 codes
are obtained as follows −
Gray Code
It is the non-weighted code and it is not arithmetic codes. That means there are no
specific weights assigned to the bit position. It has a very special feature that, only
one bit will change each time the decimal number is incremented as shown in fig. As
only one bit changes at a time, the gray code is called as a unit distance code. The
gray code is a cyclic code. Gray code cannot be used for arithmetic operation.
Application of Gray code
Gray code is popularly used in the shaft position encoders.
A shaft position encoder produces a code word which represents the angular
position of the shaft
3.2 Binary Coded Decimal BCD code
In this code each decimal digit is represented by a 4-bit binary number. BCD is a
way to express each of the decimal digits with a binary code. In the BCD, with four
bits we can represent sixteen numbers 0000to1111. But in BCD code only first ten of
these are used 0000to1001. The remaining six code combinations i.e. 1010 to 1111
are invalid in BCD
3.2.1 BCD Addition
BCD is a numerical code, and many applications require that arithmetic operations
be performed. Addition is the most important operation because the other three
operations like subtraction, multiplication and division can be accomplished using
addition. The rule for adding two BCD numbers is given below.
RULES FOR BINARY ADDITION
1. If a four-bit sum is equal to or less than 9, it is a valid BCD number.
2. If a four-bit sum is greater than 9, or if a carry-out of the group is generated, it is
an invalid result. Add 6 to the four-bit sum in order to skip the six invalid states
and return the code to 8421. If a carry results when 6 is added, simply add the
carry to the next four-bit group.
1) Add the following BCD numbers 1001 and 0100
1 0 0 1 9
+ 0 1 0 0 + 4
1 1 0 1 Invalid BCD 13
+ 0 1 1 0 Add 6
0 0 0 1 0 0 1 1 valid BCD
1 3 valid BCD
Ans: 00010011
2) Add the following BCD numbers 00011001 and 00010100
0 0 0 1 1 0 0 1 1 9
+ 0 0 0 1 0 1 0 0 + 1 4
0 0 1 0 1 1 0 1 Invalid BCD 3 3
+ 1 1 0 Add 6
0 0 1 1 0 0 1 1 valid BCD
3 3
Ans: 00110011
Advantages of BCD Codes
It is very similar to decimal system.
We need to remember binary equivalent of decimal numbers 0 to 9 only.
Disadvantages of BCD Codes
The addition and subtraction of BCD have different rules. The BCD arithmetic is little
more complicated.
BCD needs more number of bits than binary to represent the decimal number. So
BCD is less efficient than binary.
3.3 Alphanumeric codes
A binary digit or bit can represent only two symbols as it has only two states '0' or
'1'. But this is not enough for communication between two computers because
there we need many more symbols for communication. These symbols are
required to represent 26 alphabets with capital and small letters, numbers from 0
to 9, punctuation marks and other symbols.
The alphanumeric codes are the codes that represent numbers and alphabetic
characters. Mostly such codes also represent other characters such as symbol and
various instructions necessary for conveying information. An alphanumeric code
should at least represent 10 digits and 26 letters of alphabet i.e. total 36 items.
The following three alphanumeric codes are very commonly used for the data
representation.
American Standard Code for Information Interchange ASCII.
Extended Binary Coded Decimal Interchange Code EBCDIC.
Five bit Baudot Code.
ASCII code is a 7-bit code whereas EBCDIC is an 8-bit code. ASCII code is more
commonly used worldwide while EBCDIC is used primarily in large IBM computers.
4. Boolean Algebra
Boolean algebra is a convenient and systematic way of expressing and

analysing the operation of logic circuits.It was developed by George Boole
in 1847 and was proposed for design by Claude E. Shannon in 1938.
Boolean algebra provides economical and straightforward approach and is
used extensively in designing electronic circuits used in computers.
4.1 Laws of Boolean Algebra
Basic Identities
1. X + 0 = X
2. X · 1 = X
3. X + 1 = 1
4. X · 0 = 0
5. X + X = X
6. X · X = X
7. X + X’ = 1
8. X · X’ = 0
9. (X’)’ = X
Commutative
10. X + Y = Y + X
11. X · Y = Y · X
Associative
12. X+(Y+Z)=(X+Y)+Z
13. X(YZ) = (XY)Z
Distributive
14. X(Y+Z) =XY+XZ
15. X+YZ=(X+Y)(X+Z)
De Morgan’s Theorem
16. (X + Y)’ = X’ · Y’
17. (XY)’ = X’ + Y’
Consensus Theorem
18. XY + X’Z + YZ = XY + X’Z
The dual of a function is obtained by interchanging OR and AND
operations and replacing 1s and 0s with 0s and 1s.
Theorem Dual Theorem
X+X=X X.X=X Idempotent Law
X+1=1 X.0=0 Annulment Law
X+X.Y=X X. (X + Y) = X Absorption Law
(X’)’ = X Involution Law
X + (Y + Z) = (X+Y) + Z X . (Y . Z) = (X . Y). Z Associative Law
(X + Y)’ = X’ · Y’ (XY)’ = X’ + Y’ De Morgan’s Theorem

5. Digital circuits
5.1 LOGIC GATES

The basic elements that make up a digital system are called as logic gates. The
most common logic gates are OR, AND, NOT, NAND and NOR gates. The NAND
and NOR gates are called as universal gates. Exclusive-OR gate is another logic
circuit which can be constructed using AND, OR and NOT gates.
5.1.1 OR Gate
The OR gate performs logical addition, commonly known as OR function. The OR
gate has two or more inputs and only one output. The operation of OR gate is
such that a high (1) on the output is produced when any of the inputs is high (1).
The output is low (0) only when all the inputs are low (0).
As shown in Fig. 5.1 (a), A and B represent the inputs and Y the output.
Resistance R is the load resistance.
If A = 0 and B = 0 then V0 = 0 and Y = 0.
If A = 1 and B = 0, diode D1 will conduct and so the output Y = 1.
If A = 0 and B = 1, diode D2 will conduct and the output Y = 1.
If A = 1 and B = 1, both the diodes will conduct and so the output Y = 1
The electrical equivalent circuit of an OR gate is shown in Fig. 5.1(b) where

switches A and B are connected in parallel with each other. If either A, B or both
are closed, then the output will result. The logic symbol for OR gate is shown in
Fig. 5.1(c). The logic operation of the two input OR gate is described in the truth
table shown in Table 1.
5.1 (a) Circuit diagram of an OR gate, (b) Electrical equivalent of an OR gate, (c)
Logic symbol
Table 5.1 Truth table for the two-input OR gate
Digital circuits
5.1.2 AND Gate

The AND gate performs logical multiplication, commonly known as AND function.
The AND gate has two or more inputs and a single output. The output of AND
gate is high only when all the inputs are high. When any of the inputs is low, the
output is low.
As shown in the Fig. 5.2(a), A and B represent the inputs and Y represents the
output.
If A = 0 and B = 0, both diodes conduct as they are forward biased and the
output Y = 0.
If A = 0 and B = 1, diode D1 conducts and D2 does not conduct, and again the
output Y = 0.
If A = 1 and B = 0, diode D1 does not conduct and D2 conducts, and the output
Y= 0.
If A = 1 and B = 1, both the diodes do not conduct as they are reverse based and
so the output Y = 1.
The electrical equivalent circuit of an AND gate is shown in Fig. 5.2 (b) where two
switches A and B are connected in series. If both A and B are closed, then only
output will result. Logic symbol of the AND gate is shown in Fig. 2(c). The logic
operation of the two input AND gate is described in the truth table shown in
Table.5.2.
Fig. 5.2 (a) Circuit diagram of an AND gate, (b) Electrical equivalent of an AND gate, (c)
Logic symbol
Table 5.2 Truth table for a two-input AND gate

Digital circuits
5.1.3 NOT Gate (Inverter)
The NOT gate performs a basic logic function called inversion or complementation.
The purpose of the gate is to change one logic level to opposite level. It has one
input and one output. When a high level is applied to an inverter input, a low level
will appear at its output and vice-versa.
The operation of the circuit can be explained as follows. When a high voltage is
applied to the base of the transistor, base current increases and the transistor is
saturated. The transistor now acts as a closed switch and conducts heavily. Thus
the output voltage is logic 0. On the other hand, when a low voltage is applied at
the base, the transistor is cut-off due to very low or no base current. Now, the
transistor can be considered as an open switch, with no current flowing through it.
The output is now clamped to the supply voltage. The transistor when operated
between cut-off and saturation will act as a switch.
As shown in Fig. 5.3(a), A represents the input and y represents the output. If the
input is high, the transistor is in ON state and the output is low. If the input is low,
the transistor is in OFF state and the output is high. The symbol for the inverter is
shown in Fig. 3(b). The truth table is given in Table. 5.3
Fig. 5.3 (a) Circuit diagram of an INVERTER gate (b) Logic symbol
Table 5.3 Truth table for an INVERTER

Digital circuits
5.1.4 NAND Gate

NAND is a contraction of NOT–AND. It has two or more inputs and only one
output.
When all the inputs are high, the output is low. If any of the inputs is low, the
output is high. The logic symbol for the NAND gate is shown in Fig. 5.4.
Table. 5.4 Truth table for NAND gate
Fig. 5.4 Logic symbol for the NAND gate
The NAND gate is a very popular logic function because it is an universal function;
that is, it can be used to construct an AND gate, an OR gate, and INVERTER or
any combination of these functions. Figure.5.5(a), 5.5(b) and 5.5(c) show how
NAND gates can be connected to realize various logic gates.
Fig.5.5 (a)OR gate using NAND gate
Fig.5.5(b)AND gate using NAND gate
Fig.5.5(c)OR gate using NAND gate

Digital circuits
5.1.5 NOR Gate
NOR is a contraction of NOT–OR. It has two or more inputs and only one output.
Only when all the inputs are low, the output is high. If any of the inputs is high,
the output is low. The logic symbol for the NOR gate is shown in Fig. 6.
NOR is a contraction of NOT–OR. It has two or more inputs and only one output.
Only when all the inputs are low, the output is high. If any of the inputs is high,
the output is low. The logic symbol for the NOR gate is shown in Fig. 5.6. The
truth-table for the NOR gate is shown in Table 5.5.
Table 5.5 Truth table for NOR gate
Fig. 5.6 Logic symbol for NOR gate
The NOR gate is also a very popular logic function because it is also an universal
function; that is, it can be used to construct an AND gate, an OR gate, and
INVERTER or any combination of these functions. Figure 5.7 shows how NOR
gates can be connected to realize various logic gates.
Fig.5.7 (a)OR gate using NOR gate
Fig.5.7 (b)AND gate using NAND gate
Fig.5.7 (c)NOT gate using NAND gate

Digital circuits
5.1.6 Exclusive–OR (Ex-OR) Gate
An Exclusive-OR Gate is a gate with two or more inputs and one output. The
output of a two-input Ex-OR gate assumes a HIGH state if one and only one input
assumes a HIGH state. This is equivalent to saying that the output is HIGH if
either input A or input B is HIGH exclusively, and low when both are 1 or 0
simultaneously. The logic symbol for the Ex-OR gate is shown in Fig. 5.8 (a) and
the truth table for the Ex-OR operation is given in Table 5.8.
The truth table of the Ex-OR gate shows that the output is HIGH when any one,
but not all, of the inputs is at 1. This exclusive feature eliminates a similarity to
the OR gate. The Ex-OR gate responds with a HIGH output only when an odd
number of inputs is HIGH. When there is an even number of HIGH inputs, such as
two or four, the output will always be LOW. From the truth table of a 2-input Ex-
OR gate, the Ex-OR function can be written as .
The above expression can be read as Y equals A Ex-OR B. Using the above
expression, a 2-input Ex-OR gate can be implemented using basic gates like AND,
OR and NOT gates as shown in Fig. 5.8.
Fig 5.8.(a) Ex-OR gate Logic symbol Fig 5.8. (b) Ex-OR gate 0Using AND-
OR-NOT gates
Table 5.8 Truth table of a 2-input Ex-OR gate

The 2-input Ex-OR gate can also be implemented using NAND
gates as shown in Fig. 5.9.
Fig. 5.9 Ex-OR gates using NAND gates
5.1.7 Exclusive-NOR (Ex-NOR) Gate

The exclusive-NOR gate, abbreviated Ex-NOR, is an Ex-OR gate, followed by an
inverter. An Exclusive-NOR gate has two or more inputs and one output. The
output of a two-input Ex-NOR gate assumes a HIGH state if both the inputs
assume the same logic state or have an even number of 1s, and its output is LOW
when the inputs assume different logic states or have an odd number of 1s. The
logic symbol of Ex-NOR gate is shown in Fig. 5.10 and its truth table is given in
Table 5.9. From the truth table, it is clear that the Ex-NOR output is the
complement of the Ex-OR gate. The Boolean expression for the Ex-NOR gate is
According to DeMorgan’s theorem.
=
Table 5.9 Truth table of 2-input Ex-NOR gate
Fig. 5.10 Logic symbol of 2-input Ex-NOR gate
An important property of the Ex-NOR gate is that it can be used for bit
comparison. The output of an Ex-NOR gate is 1 if both the inputs are similar, i.e.
both are 0 or 1; otherwise, its output is 0. Hence, it can be used as a one-bit
comparator. It is also called a coincidence circuit.
Another property of the Ex-NOR gate is that it can be used as an even-parity

checker. The output of the Ex-NOR gate is 1 if the number of 1 s in its inputs is
even; if the number of 1s is odd, the output is 0. Hence, it can be used as an
even/odd parity checker. Hence, the 2-input Ex-NOR gate is immensely useful for
bit comparison and parity checking.
Example 1 Realise the logic expression using basic

gates.
Solution: In the given expression, there are 3 product terms each with two
variables which can be implemented using three 2-input AND gates, and the
product terms can be OR operated together using a 3-input OR gate. The
complemented form of individual variable can be obtained by 3 NOT gates. Thus,
the circuit for the given expression is realised as shown in fig below
Example 2 Implement using NAND gates only
Solution: The implementation of the given function is shown in figure
below .
Example 3 Simplify the logic circuit shown in figure below
Solution: From the given logic circuit, the expression for Z can be
written as
Therefore, the above logic circuit can be simplified as shown in

Figure below
6. COMBINATIONAL CIRCUITS
6.1Introduction
1. In digital logic, the inputs and output of a function are in the form of binary numbers
(boolean values) i.e., the values are either zero (0) or one (1). Therefore, digital logic is
also known as ‘Boolean logic’.
2. These inputs and output can be termed as ‘Boolean Variables’.
3. The output boolean variable of a digital signal can be expressed in terms of input
boolean variables which forms the ‘Boolean Expression’.
4. A boolean expression is an expression which consists of variables, constants (0-false

and 1-true) and logical operators which results in true or false.
5. They are used to describe Switching Function / Boolean Function.
6. In Boolean function, the variables are appeared either in complemented or in

uncomplemented form. Each occurrence of a variable in either a complemented or a
uncomplemented form is called a literal.
7. A Boolean function can be represented as:
• Algebraic expression Eg: Z(A,B,C,D) = AB + CD Truth table

• Truth table
• Logic diagram using gates
Logic diagram for Z(A,B,C,D) = AB + CD

6.2 Simplification using Boolean rules
Reduce AB + (AC)’ + AB’C(AB + C)
AB + (AC)’ + AB’C(AB + C) = AB + (AC)’ + AAB’BC + AB’CC
= AB + (AC)’ + AB’CC [A.A’ = 0]
= AB + (AC)’ + AB’C [A.A = 1]
= AB + A’ + C’ =AB’C [(AB)’ = A’ + B’]
= A’ + B + C’ + AB’C [A + AB’ = A + B]
= A’ + B’C + B + C’ [A + A’B = A + B]
= A’ + B + C’ + B’C
=A’ + B + C’ + B’
=A’ + C’ + 1
=1 [A + 1 =1]
Simplify the following using De Morgan’s theorem [((AB)’C)’’ D]’
[((AB)’C)’’ D]’ = ((AB)’C)’’ + D’ [(AB)’ = A’ + B’]
= (AB)’ C + D’
= (A’ + B’ )C + D’
Show that (X + Y’ + XY)( X + Y’)(X’Y) = 0
(X + Y’ + XY)( X + Y’)(X’Y) = (X + Y’ + X)(X + Y’ )(X’ + Y) [A + A’B = A + B]
= (X + Y’ )(X + Y’ )(X’Y) [A + A = 1]
= (X + Y’ )(X’Y) [A.A = 1]
= X.X’ + Y’.X’.Y
=0 [A.A’ = 0]
A logic circuit can be designed and realized or implemented with
minimal gates by simplifying the expression.
Simplify F=X’YZ+X’YZ’+XZ
X’YZ+X’YZ’+XZ = X’Y (Z + Z’) + XZ
= X’Y . 1 + XZ [A + A’ =1]
= X’Y + XZ
F= X’Y + XZ
The simplification of the equation reduces the number of gates
used for implementing the circuit
For the given expression F=X’YZ+X’YZ’+XZ the logic diagram is as
follows:
For the reduced expression F= = X’Y + XZ the logic diagram is

minimized as follows:
6.3. Representation of logic functions - SOP and POS forms
1. Representation of Boolean expression can be primarily done in two ways. They are as
follows:
a. Sum of Products (SOP) form
b. Product of Sums (POS) form
2. The terms “product” and “sum” have been borrowed from mathematics to describe
AND and OR logic operations.
3. Note: If the number of input variables are n, then the total number of combinations in
n
Boolean algebra is 2 .
6.3.1 Sum of Products (SOP) Form :
1. It is one of the ways of writing a boolean expression, formed by adding (OR operation)
the product terms.
2. Product Term: Is defined as either a literal or a product of literals (also called as

conjunction). It is also defined as a group of literals that are ANDed together. Eg: ABC ,
XYZ
3. SOP: Is defined as group of product terms that are ORed together.
Eg: F(A,B,C) = AB + BC + AC
4. Other Names: Disjunctive Normal Form, Disjunctive Normal Formula.
5. Standard SOP / Canonical SOP: SOP is said to be a Standard SOP / Canonical SOP, if
each product term consists of all literals in either complemented form or
uncomplemented form.
Eg.: F(A,B,C) = A B C + A B C + A B C + A B C+A B C
6. Minterms ( ∑m ): Is defined as each individual product term in Standard SOP /

Canonical SOP. 0 Complement of a Variable
1 Variable
7. SOP Form is obtained by writing one product term for each input combination that
produces an output 1.
6.3.2 Product of Sums (POS) Form :
1. It is one of the ways of writing a boolean expression, formed by multiplying (AND

operation) the sum terms.
2. Sum Term: Is defined as either a literal or a sum of literals (also called as disjunction). It
is also defined as a group of literals that are ORed together.
Eg: A+B+C , X+Y+Z
3. POS: Is defined as group of sum terms that are ANDed together.
Eg: F(A,B,C) = (A+B) (B+C) (A+C)
4. Other Names: Conjunctive Normal Form, Conjunctive Normal Formula.
5. Standard POS / Canonical POS: POS is said to be a Standard POS / Canonical POS, if
each sum term consists of all literals in either complemented form or
uncomplemented form.
Eg.: F(A,B,C) = (A+B+C) (A+B+C) (A+B+C) (A+B+C) (A+B+C)
6. Maxterms (ΠM ): Is defined as each individual sum term in Standard POS / Canonical
POS.
0 Variable
1 Complement of a Variable
7. POS Form is obtained by writing one sum term for each input combination that
produces an output 0.
7. ADDERS
7.1 HALF ADDER

A combinational circuit that performs the addition of two bits is called a half adder
It has two input A and B, two output Sum, S and Carry, C.
Block Diagram:
Truth Table:
Sum, S=Ʃm(1,2)
Carry, C=Ʃm(2)
C=AB
Logic Diagram:
7.2 FULL ADDER
A full adder is a combinational circuit that forms the arithmetic sum of three bits.
It consists of three inputs and two outputs.
Truth Table:
Sum, S=Ʃm(1,2,4,7)
Carry Out, Cout=Ʃm(3,5,6,7)
Cout= A’ B Cin + A B’ Cin + A B Cin’ + A B Cin

Cout= Cin (A’ B + A B’) + A B (C in’ + Cin )
Cout= Cin (A ⊕ B ) + A B
Full Adder Using Half Adder :
Two Half Adders can be connected as shown below to produce full adder output.
7.3 Half Subtractor

A combinational circuit that performs the subtraction of two
bits is called a half subtractor.
It has two input A and B, two output Difference, D and
Borrow, B.
Truth Table:
Difference, D=Ʃm(1,2)
Borrow ,B=Ʃm(1)
Logic Diagram:
7.4 Full Subtractor:
Full Subtractor is a combinational logic circuit used for the purpose of subtracting
two single bit numbers.
It also takes into consideration borrow of the lower significant stage.
Thus, full subtractor has the ability to perform the subtraction of three bits.
Full subtractor contains 3 inputs and 2 outputs (Difference and Borrow) as shown-
Truth Table:
Difference,D=Ʃm(1,2,4,7) and Borrow Out,Bout=Ʃm(1,2,3,7)
Difference, D= A’ B’ Bin + A’ B Bin’ + A B’ Bin’ + A B Bin

= (A’ B’ + A B ) Bin + (A’ B + A B’) Bin’
= A ⊕ B ⊕ Bin
Bout = A’ Bin + A’ B + B Bin
Logic Diagram For Full Subtractor:

7.5 Full Subtractor using Half Subtractor
Block Diagram:
From The Truth Table:

Difference,D= A’ B’ Bin + A’ B Bin’ + A B’ Bin’ + A B Bin
= (A’ B’ + A B ) Bin + (A’ B + A B’) Bin’
= A ⊕ B ⊕ Bin
Borrow Out,Bout= A’ B’ Bin + A’ B Bin + A’ B Bin’ + A B Bin

=(A’ B’ + A B ) Bin + A’ B (Bin + Bin’)
= ( A ⊕ B ) Bin + A’ B
Logic Diagram:
8. Multiplexer
8.1 Multiplexer (Data selector)

Multiplexer is a combinational circuit that has maximum of 2n data inputs, ‘n’
selection lines and single output line. One of these data inputs will be connected
to the output based on the values of selection lines.
Since there are ‘n’ selection lines, there will be 2n possible combinations of zeros
and ones. So, each combination will select only one data input. Multiplexer is also
called as MUX.
Digital multiplexer (MUX) selects binary information from one of many input lines
and directs it to a single output line.
8.2 MUX
2x1 Multiplexer has two data inputs W0, W1 one selection line S and one output f.
The block diagram of 2x1 Multiplexer is shown in the following figure.
Fig8.1 Block diagram of 2:1 MUX

One of these 2 inputs will be connected to the output based on the combination
of inputs present at the selection line. Truth table of 4x1 Multiplexer is shown
below.
Fig8.2 Truth table of 2:1 MUX Fig 8.3Logic diagram of 2:1 MUX
From Truth table 8.2, we can directly write the Boolean function for output, f as
We can implement this Boolean function using Inverters, AND gates & OR gate.
The Logic diagram of 2x1 multiplexer is shown in the figure.
8.3 4:1 MUX
4x1 Multiplexer has four data inputs I3, I2, I1 & I0, two selection lines s1 & s0 and
one output Y. The block diagram of 4x1 Multiplexer is shown in the following
figure.
Fig 8.4 Block diagram of 4:1 MUX

One of these 4 inputs will be connected to the output based on the combination
of inputs present at these two selection lines. Truth table of 4x1 Multiplexer is
shown below.
Fig 8.5 Truth table of 4x1 MUX Fig 8.6 Logic diagram of 4:1 MUX
From Truth table, we can directly write the Boolean function for output, Y as
We can implement this Boolean function using Inverters, AND gates & OR gate.
The Logic diagram of 4x1 multiplexer is shown in the figure.
9.1 Demultiplexer
It is also known as a demux or data distributor.

Demultiplexer is a combinational circuit that accepts multiplexed data and
distributes over multiple output lines
In other words, the function of Demultiplexer is the inverse of the multiplexing
operation. Similar to Multiplexer the output depends on the control input.
It is a circuit which can distribute or deliver multiple outputs from a single input.
It can perform as single input many output switch.
The output lines of demultiplexer are 2N and one Data input=1
where N- no.of Selection lines.
Fig 9.1 Demultiplexer

Types of Demultiplexer:
1:2 Demultiplexer
1:4 Demultiplexer
1:8 Demultiplexer
1:16 Demultiplexer
9.2 1 to 2 Demultiplexer
It consists of 1 data input, 1 Selection line and 2 output bits. Y0 and Y1 are the
two output bits.
Block Diagram:
Fig 9.2 1 to 2 Demultiplexer

Output:
Y0 = Din S0 ’
Y1 = Din S0
Logic Diagram:
Fig 9.3 Logic Diagram

9.3 1 to 4 Demultiplexer
It consists of 1 data input, 2 Selection lines and 4 output bits. Y0 ,Y1 , Y2 and Y4 are the
four output bits.
Block Diagram:
Fig 9.4 Block Diagram
Truth Table 9.1 : 1 to 4 Demultiplexer
Output:
Y0 = Din S1 ’ S0 ’
Y1 = Din S1 ’ S0
Y2 = Din S1 S0 ’
Y3 = Din S1 S0
Logic Diagram: 1 to 4 Demultiplexer
Fig 9.5 Logic Diagram of 1 to 4 Demultiplexer

10.Code Converters
Code converters are logic circuits that implement the number conversion from one
binary code to another.
10.1 Types of Code converters:
Binary-to-Gray code
Gray-to-Binary code
BCD-to-Excess-3
Excess-3-to-BCD
Binary-to-BCD
BCD-to-binary
10.2 Steps to design code converters:
Construction of a truth table to meet input -output requirements.
Determine Boolean expressions for various output variables in terms of input

variables.
Simplify Boolean expression by minimization using Karnaugh map method.
Implement the simplified Boolean expression with minimum number of logic gates.
Don’t care conditions are considered for minimization using K-Map

* Don’t care conditions for BCD are (‘X’=10,11,12,13,14,15)
* For Excess 3 code (‘X’=0,1,2,13,14,15)
10.3 Binary to Gray Code converter
Gray code is a reflected code with a value of a single bit between successive
numbers
Truth table for the Binary-to-Gray code converter with Binary code as input and
Gray Code as output
Truth Table
Decimal Binary code Gray code

B3 B2 B1 B0 G3 G2 G1 G0
0 0 0 0 0 0 0 0 0
1 0 0 0 1 0 0 0 1
2 0 0 1 0 0 0 1 1
3 0 0 1 1 0 0 1 0
4 0 1 0 0 0 1 1 0
5 0 1 0 1 0 1 1 1
6 0 1 1 0 0 1 0 1
7 0 1 1 1 0 1 0 0
8 1 0 0 0 1 1 0 0
9 1 0 0 1 1 1 0 1
10 1 0 1 0 1 1 1 1
11 1 0 1 1 1 1 1 0
12 1 1 0 0 1 0 1 0
13 1 1 0 1 1 0 1 1
14 1 1 1 0 1 0 0 1
15 1 1 1 1 1 0 0 0
From the truth table, the logic expression for the binary code outputs obtained
are:
G3= ∑m (8, 9, 10, 11, 12, 13, 14, 15)
G2= ∑m (4, 5, 6, 7, 8, 9, 10, 11)
G1= ∑m (2, 3, 4, 5, 10, 11, 12, 13)
G0= ∑m (1, 2, 5, 6, 9, 10, 13, 14)
Logic Diagram
10.2 Gray to Binary Code converter
The same procedure is followed to obtain the circuit for Gray to Binary code
conversion.
Truth Table
Decimal Gray code Binary code

G3 G2 G1 G0 B3 B2 B1 B0
0 0 0 0 0 0 0 0 0
1 0 0 0 1 0 0 0 1
2 0 0 1 0 0 0 1 1
3 0 0 1 1 0 0 1 0
4 0 1 0 0 0 1 1 1
5 0 1 0 1 0 1 1 0
6 0 1 1 0 0 1 0 0
7 0 1 1 1 0 1 0 1
8 1 0 0 0 1 1 1 1
9 1 0 0 1 1 1 1 0
10 1 0 1 0 1 1 0 0
11 1 0 1 1 1 1 0 1
12 1 1 0 0 1 0 0 0
13 1 1 0 1 1 0 0 1
14 1 1 1 0 1 0 1 1
15 1 1 1 1 1 0 1 0
From the truth table, the logic expression for the binary code outputs obtained
are:
B3= ∑m (8, 9, 10, 11, 12, 13, 14, 15)
B2 = ∑m (4, 5, 6, 7, 8, 9, 10, 11)
B1 = ∑m (2, 3, 4, 5, 8, 9, 14, 15)
B0 = ∑m (1, 2, 4, 7, 8, 11, 13, 14)

B0= G3‘G2‘ G1‘G0+ G3‘G2’G1G0‘+ G3G2G1’G0+ G3G2G1G0‘+ G3‘G2G1‘G0‘+
G3G2’G1’G0’+ G3’G2G1G0+G3G2’G1G0
= G3‘G2‘ (G1‘G0+ G1G0‘) + G3G2 (G1‘G0+ G1G0‘) + G1‘G0‘ (G3‘G2+ G3G2‘) + G1G0
(G3‘G2+ G3G2‘).
= G3‘G2‘ (G0 ⊕ G1) + G3G2 (G0 ⊕ G1) + G1‘G0‘ (G2 ⊕ G3) +G1G0 (G2 ⊕ G3).
= G0 ⊕ G1 (G3‘G2‘ + G3G2) + G2 ⊕ G3 (G1‘G0‘+G1G0)
= (G0 ⊕ G1) (G2 ⊕ G3)‘+ (G2 ⊕ G3) (G0 ⊕ G1)
B0= (G0 ⊕ G1) ⊕ (G2 ⊕ G3)
B0 = G0 ⊕ B1
Logic Diagram:
The logic diagram for the output binary code expressions can be implemented
using XOR gates
10.4 BCD to Excess-3 Converter
Excess-3 code is a modified binary code derived from the BCD code by adding 3
to each coded number.
Truth Table:
Decimal BCD code Excess-3 code

B3 B2 B1 B0 E3 E2 E1 E0
0 0 0 0 0 0 0 1 1
1 0 0 0 1 0 1 0 0
2 0 0 1 0 0 1 0 1
3 0 0 1 1 0 1 1 0
4 0 1 0 0 0 1 1 1
5 0 1 0 1 1 0 0 0
6 0 1 1 0 1 0 0 1
7 0 1 1 1 1 0 1 0
8 1 0 0 0 1 0 1 1
9 1 0 0 1 1 1 0 0
The logic expression for the Excess-3 code outputs from the truth table are:
E3= ∑m (5, 6, 7, 8, 9) + ∑d (10, 11, 12, 13, 14, 15)
E2= ∑m (1, 2, 3, 4, 9) + ∑d (10, 11, 12, 13, 14, 15)
E1= ∑m (0, 3, 4, 7, 8) + ∑d (10, 11, 12, 13, 14, 15)
E0= ∑m (0, 2, 4, 6, 8) + ∑d (10, 11, 12, 13, 14, 15)

Logic Diagram
10.5 Excess-3 to BCD Converter
The same procedure is followed for the implementation of the Excess 3 to BCD
converter
Truth Table
Decimal Excess-3 code BCD code

E3 E2 E1 E0 B3 B2 B1 B0
3 0 0 1 1 0 0 0 0
4 0 1 0 0 0 0 0 1
5 0 1 0 1 0 0 1 0
6 0 1 1 0 0 0 1 1
7 0 1 1 1 0 1 0 0
8 1 0 0 0 0 1 0 1
9 1 0 0 1 0 1 1 0
10 1 0 1 0 0 1 1 1
11 1 0 1 1 1 0 0 0
12 1 1 0 0 1 0 0 1
The logic expression for the Excess-3 code outputs are:
B3= ∑m (11, 12) + ∑d (0, 1, 2, 13, 14, 15)
B2= ∑m (7, 8, 9, 10) + ∑d (0, 1, 2, 13, 14, 15)
B1= ∑m (5, 6, 9, 10) + ∑d (0, 1, 2, 13, 14, 15)
B0= ∑m (4, 6, 8, 10, 12) + ∑d (0, 1, 2, 13, 14, 15)

Logic Diagram
The logic diagram for the output expressions obtained can be implemented as
follows:
11. DECODER
11.1 DECODER
• A Decoder is a combinational circuit converts binary information from n input lines
to 2 n unique output lines. If n bit coded information has some unused
combinations , the decoder may have fewer than 2n outputs.
Fig 11.1 Block diagram of decoder
11.2 Decoder configurations
• 2 to 4 decoder
• 3 to 8 decoder
• 4 to 16 decoder etc.,
 3 to 8 line decoder
Three to eight line decoder is also called as binary to octal converter. The
input variables represents a binary number and the output represents the eight
digits of a number in octal in the octal system.However, a three-to-eight-line
decoder can be used for decoding any three-bit code to provide eight outputs, one
for each element of the code.
11.3 Three to Eight line Decoder
Fig 11.2 Block diagram of 3x8 Decoder
Fig 11.3 Circuit Diagram of 3X8 Decoder

INPUTS OUTPUTS
X Y Z D0 D1 D2 D3 D4 D5 D6 D7
0 0 0 1 0 0 0 0 0 0 0
0 0 1 0 1 0 0 0 0 0 0
0 1 0 0 0 1 0 0 0 0 0
0 1 1 0 0 0 1 0 0 0 0
1 0 0 0 0 0 0 1 0 0 0
1 0 1 0 0 0 0 0 1 0 0
1 1 0 0 0 0 0 0 0 1 0
1 1 1 0 0 0 0 0 0 0 1
Truth Table of 3X8 decoder

The other configurations can be obtained in a similar method. A decoder
with enable input can function as a demultiplexer circuit that receives information
from a single line and directs it to one of 2" possible output lines. The selection of a
specific output is controlled by the bit combination of n selection lines. Decoder and
demultiplexer operations are obtained from the same circuit. a decoder with an
enable input is referred as a demultiplexer.
Decoders with enable inputs can be connected together to form a larger

decoder circuit. the figure shows two 3 to 8 line decoders with enable inputs
connected to form a 4 to 16 line decoder. When E = O, the top decoder is enabled
and the other is disabled. The bottom decoder outputs are all O's. and the top eight
outputs generate minterms 0000 to 0111. When E = 1 , the enable conditions are
reversed. The bottom decoder outputs generate minterms from 1000 to 1111, while
the outputs of the top decoder are all 0's. In general enable inputs are a convenient
feature for interconnecting two or more standard components for the purpose of
combining them into a similar function with more input
s and outputs.
Fig 11.4. 4 to 16 decoder using 3 to 8 decoder

11.4 Combinational Logic Implementation with Decoder
A decoder provides the 2n minterms of n input variables . Since any Boolean function
can be expressed in sum-of-minterms form a decoder that generates the minterms
of the function, together with an external OR gate that forms their logical sum,
provides a hardware implementation of the function. In this way. any combinational
circuit with n inputs and m outputs can be implemented with an n to 2n line decoder
and m number of OR gates.
Implementation of Full adder using Decoder
From the truth table of full adder minterms of sum and output carry are as follows
S(A,B,C) =∑m(1,2,4,7)
Cout(A,B,C)= ∑m(3,5,6,7)
Fig 11.5 Full Adder Implementation with decoder

12. ENCODER
12.1 Octal to binary encoder (or) 8 to 3 encoder

An encoder is a digital circuit that performs the inverse operation of a decoder. An
encoder has 2n(or fewer) input lines and n output lines. The output lines generate
the binary code corresponding 10 the input value. An example of an encoder is the
octal-to-binary encoder whose truth table is given in table. It has eight inputs (one
for each of the octal digits) and three outputs that generate the corresponding
binary number. It is assumed that only one input has a value of 1 at any given time.
The encoder can be implemented with OR gates whose inputs are determined
directly from the truth table. Output z is equal to 1 when the input octal digit is 1, 3,
5 or 7. Output y is 1 for octal digits 2, 3,6 or 7. and output x is 1 for digits 4, 5, 6
or 7.
INPUTS OUTPUTS
D0 D1 D2 D3 D4 D5 D6 D7 X Y Z
1 0 0 0 0 0 0 0 0 0 0
0 1 0 0 0 0 0 0 0 0 1
0 0 1 0 0 0 0 0 0 1 0
0 0 0 1 0 0 0 0 0 1 1
0 0 0 0 1 0 0 0 1 0 0
0 0 0 0 0 1 0 0 1 0 1
0 0 0 0 0 0 1 0 1 1 0
0 0 0 0 0 0 0 1 1 1 1
Output functions of encoder are
X=D4+D5+D6+D7
Y=D2+D3+D6+D7
Z=D1+D3+D5+D7
12.2 Limitation of encoder
The encoder has the limitation that only one input can be active at any
given time. If two inputs are active simultaneously, the output produces an
undefined combination. Another ambiguity in the octal-to-binary encoder is that an
output with all O's is generated when all the inputs are 0; but this output is the
same as when Do is equal to 1. The discrepancy can be resolved by providing one
more output to indicate whether at least one input is equal to 1 .
Fig 12.1 Octal to binary encoder

13. Introduction to Sequential Logic
Output depends not only on current input but also on past input values, e.g.,
design a counter
Need some type of memory to remember the past input values
Sl. Combinational Circuit Sequential Circuit

No
1 Output depends on only the Output depends

present states. not only on current
input but also on
past input values.
No need of memory elements. It requires memory
2 elements
3 There is no clock pulse. It requires clock
pulse.
13.1 Types of Sequential Logic Circuits
Synchronous Sequential Logic

Asynchronous Sequential Logic
13.2 Difference between Synchronous and Asynchronous Sequential Circuit:
Sl.No. Synchronous Sequential Circuit Asynchronous

Sequential Circuit
1 circuit output changes only at circuit output can
some discrete instants of time change at any time.
2 This type of circuits achieves It performs clockless
synchronization by using a operation.
timing signal called the clock.
13.3 Block Diagram of Sequential circuit
Fig.13.1 Block Diagram of Sequential circuit
Sequential Logic circuits remember past inputs and past circuit state.
Outputs from the system are “fed back” as new inputs With gate delay and wire
delay
The storage elements are circuits that are capable of storing binary information:
memory
The binary information stored in these elements at any given time defines the
state of the sequential circuit at that time.
13.4 Latches and Flip-Flops
Latches are “transparent” (= any change on the inputs is seen at the outputs
immediately when C=1).
This causes synchronization problems.
Solution: use latches to create flip-flops that can respond (update) only on specific
times (instead of any time).
A flip-flop circuit maintains a binary state indefinitely till power is on or a change

in the input signal occurs.
The state of a latch or flip-flop is switched by a change in the control input
This momentary change is called a trigger
Latch: level-sensitive
Flip-Flop: edge-triggered
13.5 Difference between Latches and Flip Flops
13.6 SR Latch
The SR latch is a circuit with two cross-coupled NOR gates or two cross-coupled
NAND gates. It has two inputs labeled S for set and R for reset.
13.6.1 SR Latch ( using NOR Gates)
Fig 13.2 SR Latch

13.6.2 SR Latch ( using NAND Gates)
13.6.3Functional Table:
S R Q Q’ Remarks
0 1 0 1 Resets
1 1 0 1 Holds the
previous value
1 0 1 0 Sets
1 1 1 0 Holds the
previous value
13.7. FLIP –FLOPS
13.7.1 Types of Flip Flops
1. SR (Set-Reset) FF
2. JK FF
3.Delay/ Data (D) FF
4.Toggle (T) FF
13.8 SR Flip –Flop
13.8.1.Block Diagram: 13.8.2. Logic Diagram:
13.8.3 Simplified Characteristic Table with inputs and next state

Two useful states:
S=1, R=0 set state (Q will become to 1)
S=0, R=1 reset state (Q will become to 0)
When S=0 and R=0 No change in current value
When S=1 and R=1 Indeterminate state

Table 13.1 Characteristic Table
S R Q(t+1)
0 0 NC
0 1 0
1 0 1
1 1 X
13.9 JK Flip –Flop:
The indeterminate state of the SR FF is defined in the JK FF

When J and K are equal to 1, the flip-flop switches to its complement state, if
Q = 1, it switches to Q = 0
13.9.1.Block Diagram: 13.9.2. Logic Diagram:
13.9.3.Characteristic Table:
J K Q(t) Q(t+1)
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0
13.10 D Flip –Flop:
13..10.1.Block Diagram:
13.10.2. Logic Diagram:
D Q(t) Q(t+1)
0 0 0
0 1 0
1 0 1
1 1 1
13.11. T Flip –Flop:
13.11.1.Block Diagram:
13.11.2. Logic Diagram:
T Q(t) Q(t+1)
0 0 0
0 1 1
1 0 1
1 1 0
14. COUNTERS
Counter is a sequential circuit.

A digital circuit which is used for counting pulses is known as counter.
Counter is the widest application of flip-flops. It is a group of flip-flops with a
clock signal applied.
Counters are of two types.
Asynchronous or ripple counters.
Synchronous counters.
14.1 Difference between Synchronous Counter Asynchronous Counter
Sl.No Synchronous Counter Asynchronous Counter

1
In synchronous counter, all flip In asynchronous counter, different
flops are triggered with same clockflip flops are triggered with different
simultaneously. clock, not simultaneously.
2 Asynchronous Counter is slower
Synchronous Counter is faster than than synchronous counter in
asynchronous counter in operation. operation.
3 Synchronous Counter is also called Asynchronous Counter is also called
Parallel Counter. Serial Counter.
4
Asynchronous Counter will operate
Synchronous Counter will operate only in fixed count sequence
in any desired count sequence. (UP/DOWN).
5
Asynchronous Counter examples
Synchronous Counter examples are: Ripple UP counter, Ripple
are: Ring counter, Johnson counter. DOWN counter
6 In synchronous counter, In asynchronous counter, there is
propagation delay is less. high propagation delay.
14.2 Asynchronous Counter/ Ripple Counter
Asynchronous counters are those counters which do not operate on simultaneous

clocking.
In asynchronous counter, only the first flip-flop is externally clocked using clock
pulse while the clock input for the successive flip-flops will be the output from a
previous flip-flop.
As the data ripples between the output of one flip-flop to the input of the next, it
is called as Ripple Counter.
14.3 Design of Asynchronous Counter:
3-bit up counter
3 bit Down Counter
MOD-5 counter
4-bit up counter
14.4 Decade counter/ MOD-10 Counter/BCD Counter
Asynchronous counter is implemented in toggle mode
The toggle flip-flop changes state when the clock input is applied, T = 1
The T-type flip-flop is not available commercially but can be constructed from a JK
flip-flop (or D-type flip-flop)
By connecting the J input with the K input and both to logic level “1”.
With J and K HIGH, the flip-flop changes state every time it is triggered at its
clock input. This clock input is now called the “toggle input” as the output
becomes “1” if it was “0”, and a “0” if it was “1”, that is it toggles.
The Data/Delay D-type flip-flop can just like the JK flip-flop be converted to
perform as a toggle flip-flop by connecting the Q output directly to the D-input
14.5 Design of 3-bit up counter
Step-1 : State Diagram ( 0-1-2-3-4-5-6-7-0)

No.of FFs Required= 3
Block Diagram:
Truth Table
Output Waveform
14.5 Design of 3-bit Down counter
Step-1 : State Diagram
Counting sequence (0-7-6-5-4-3-2-1-0)

No.of FFs Required=3
Block Diagram:
Truth Table:
Output Waveform:
15. SHIFT REGISTERS
A shift register consists of a group of flip-flops arranged such that the output of
one feeds the input of the next so that the binary numbers stored shift from one
flip-flop to the next controlled by a clock pulse.
This implementation is a 4-bit shift register utilising D-type flip-flops. In this type
of circuit, the clock inputs of all the flip-flops connect to a common line, so they
receive clock inputs simultaneously.
With a D-type flip-flop, the value at the input D transfers to the output Q on
the rising edge of every clock pulse. Since they all receive the clock pulse
simultaneously, they all do this operation together on the rising edge.
A shift register “shifts” its output once every clock cycle
15.1 Types of Shift Register
Serial-in, Serial-out (SISO)
In this type of shift register, the binary data is input, shifted and output serially in
either left or right direction one bit at a time under a common clock signal.
Serial-in, Parallel-out (SIPO)
In this type of shift register, the binary data is input and shifted serially in either
left or right direction one bit at a time but is output parallel all together under a
clock signal.
Parallel-in, Serial-out (PISO)
In this type of shift register, the binary data is input all together in parallel mode
but is shifted and output serially in either left or right direction one bit at a time
under a clock signal.
Parallel-in, Parallel-out (PIPO)
In this type of shift register, the binary data is input as well as shifted and output
in parallel mode all together under a clock signal.
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shift-register-animation.html
15.2 Asynchronous Inputs
1. Preset -Sets the FF as 1
2. Clear -Clear the state of the FF
15.3 Serial-in, Serial-out (SISO)

Block Diagram:
Data: 1011
Shift Register Truth Table
15.4 Serial-in, Parallel-out (SIPO)

Block Diagram:
Data :1001
15.5 Parallel-in, Serial-out (PISO)

Block Diagram:
SHIFT/LOAD is a control input that allows the four bit of data at A, B, C and D
inputs to enter into the register in parallel or shift the data in serial.
When SHIFT/LOAD is LOW, AND gates G1 ,G2, G3 are enabled, allowing the data
at parallel inputs i.e. A, B, C and D to the Data inputs of the respective flip-flops.
When SHIFT/LOAD is HIGH, AND gates G1, G2, G3 are disabled and the
remaining AND gates G4 G5 G6 are enabled, allowing the data bits to shift right
from one stage to the next.
The OR gates allow either the normal shifting operation or the parallel data-entry
operation, depending on which the AND gates are enabled by the level on the
SHIFT/LOAD input.
Data: 1101
15.6 Parallel-in, Parallel-out (PIPO)
Block Diagram:
Data: 1101
Application of Shift Registers:

15.7 Johnson Counter/Twisted Ring Counter:
Block Diagram
Complement of the output of the last flip-flop is connected back
to the D input of the first flip-flop
If the counter starts at 0, this feedback arrangement produces a
characteristic sequence of states,
4-bit sequence has a total of eight states
5-bit sequence has a total of ten states
Johnson counter will produce a modulus of 2n, where n is the number of
stages in the counter
Truth Table:
State Diagram:
15.8 Ring Counter:
Ring counter has one flip-flop for each state in its sequence
Initially, a 1 is preset into the first flip-flop
Remaining flip-flops are cleared
Block Diagram
Inter stage connections are the same as Johnson counter

But Q rather than Q’ is fed back from the last stage
Outputs of the counter indicate directly the decimal count of the clock pulse
1 is always retained in the counter and simply shifted “around the ring,”
advancing one stage for each clock pulse
Truth Table State Diagram

16. A/D AND D/A CONVERTER CIRCUITS:
Physical quantities such as pressure, temperature, and flow are analog in nature. There
are usually several steps in producing electrical signals which represent the values of
these variables and in converting the electrical signals to a digital form that can be used
for example, to drive an LED display or be stored in the memory of a microcomputer.
The first step involves a sensor which produces a current or voltage signal that is
proportional to the amount of the physical pressure, temperature, or other variable.
The signals from most sensors are quite small, so they must be amplified and perhaps
filtered to remove unwanted noise. Amplification is usually done with some type of
operational amplifier circuit. The final step is to convert the signal to a proportional binary
word with an analog-to-digital (A/D) converter.
16.1 DIGITAL-TO-ANALOG CONVERTERS
A digital quantity will have a value that is specified as one of two possibilities such as 0 or
1, LOW or HIGH, true or false, and so on. Many systems accept a digital word as an input
signal and translate or convert it to an analog voltage or current. These systems are
called digital-to-analog converters. The digital word is presented in a variety of codes, the
most common being pure binary or binary-coded-decimal.
In practice, the voltage representation a digital quantity such as a may actually have a
value that is anywhere within specified ranges. For example, for TTL logic :
0V to 0.8V = logic 0
2V to 5V = logic 1
Any voltage falling in the range 0 to 0.8 V is given the digital value 0, and any voltage in
the range 2 to 5 V is assigned the digital value 1. The digital circuits respond accordingly
to all voltage values within a given range.
16.2 DIGITAL-TO-ANALOG CONVERTER
16.2.1 A BINARY-WEIGHTED RESISTOR D/A CONVERTER:

Figure shows a circuit which will produce an output voltage proportional to the
binary word applied to its inputs by the four switches. Since this converter has four
data inputs, it is called a 4-bit converter.
The circuit in Fig is just a 4-input op amp adder circuit. The noninverting input of
the op amp is tied to ground, so that input will be at 0 V. There is feedback from the
output of the op amp to the inverting input, so the op amp will work continually to
hold this input at 0 V.
Fig16.1. Digital-to-analog Converter

Suppose the 1 data switch alone is closed. Since 2 is only half the value of
1 ,twice as much current, or 0.1 mA, will flow through 2 to the summing point
and on through into the output of the op amp. In order to pull a current of 0.1
mA through , the op amp will assert a voltage of –1 V on its output. The 1
data switch then produces an output voltage of –1 V, or twice as much as that

produced by the 0 switch.
If 2 alone is closed, a current of 0.2 mA, will flow through 3 to the summing
point an on through into the output of the op amp. This current will produce a
voltage of –2 V on the output of the op amp. Likewise,
if switch the 3 is closed, a current of 0.4 mA, will flow into the summing point
and on through into the output of the op amp. This current will produce a
voltage of –4 V on the output of the op amp.
Now, suppose that switches 2 and 3 are both closed. The 0.2 mA current
through 3 will combine with the 0.4 mA current through 4 at the summing point
to produce a total current of 0.6 mA.
The output voltage is proportional to the sum of the currents produced by the
closed switches and is –6 V. The value of the four currents are related to each
other in the same way that the weights of binary digits are. Therefore, the output
voltage will be proportional to the binary word applied to the data inputs. 0
represents the least significant bit (LSB) because it produces the smallest current,
and 3 represents the most significant bit (MSB) because it produces the largest
current.Since there are four inputs, there are 16 possible input words, 0000 to
1111. These words produce output voltages ranging from 0 V for an input word of
0000 to –7.5 for an input word of 1111.
LADDER TYPE D/A CONVERTER :
D/A converter using R–2R ladder network

Fig16.2.
Figure shows D/A converter using R–2R ladder network. The ladder used in this
circuit is a current-splitting device, and thus the ratio of the resistors is more
critical than their absolute value. It can be observed from the figure that at any of
the ladder nodes the resistance is 2R looking to the left or the right or towards the
switch. Hence, the current will split equally toward the left and right, and this
happens at every node.
Considering node N – 1 and assuming the MSB turned ON, the voltage at that
node will be − 3. Since the gain of the operational amplifier to node N–1 is
–3R/2R, the weight of the MSB becomes
3
0= -
3 2
=
2
Similarly, when the second most significant bit is ON and all others are OFF, the
output will 0 =+ 4 the third bit gives + and the LSB gives + The circuit uses a
8 2
negative reference voltage and gives a positive analog output voltage. If negative
binary numbers are to be converted, the sign-magnitude approach is used; an
extra bit is added to the binary word to represent the sign, and this bit can be
used to select the polarity of the reference voltage.
16.3 ANALOG-TO-DIGITAL CONVERTERS
It is often required that data taken in a physical system be converted into digital form.
Such data would normally appear in electrical analog form. For example, a temperature
difference would be represented by the output of a thermocouple, the strain of a
mechanical member would be represented by the electrical unbalance of a strain-gauge
bridge, etc. The need therefore arises for a device that converts analog information into
digital form. Two major characteristics of an A/D converter are
1.Resolution
2.Conversion time
The resolution of an A/D converter is determined by the number of bits in the output
word.
The conversion time for an A/D converter is simply the time it takes the converter to
produce a valid output word after it is given a ‘start conversion’ signal.
There are many different ways to do an analog-to-digital conversion. The method

chosen depends on the resolution, speed, and type of interfacing needed for a given
application.
16.3.1 PARALLEL COMPARATOR OR FLASH CONVERTER:
The simplest in concept and the fastest type of A/D converter is the parallel converter,
or flash type shown in Fig 16.3. The resistor voltage divider sets a sequence of voltages
on the reference inputs of the comparators as shown.
If the voltage on the ‘+’ input of a comparator is greater than the reference voltage on
its ‘–’ input, the output of the comparator will be high. In the circuit, the voltage to be
converted is applied to the + inputs of all the comparators in parallel, so the number of
comparators that have high on their outputs indicates the amplitude of the input
voltage.
(a)
Fig 16.3 (a) Flash Converter
(b)
(a)Circuit for flash type A/D converter, (b) Comparator output codes
An input voltage of between 0 and 1 V, for example, is less than the reference
voltage on any of the comparators, so none of the comparator outputs will be
high. If the input voltage is between 1.001 and 2 V, only the 1 output will be
high. For an input voltage between 2.001 and 3 V, both the 1 and 2 outputs
will be high.
Finally, for an input voltage greater than 3V, all the comparator outputs will be
high. Figure summarizes the comparator output code that will be produced by
input voltages between 0 and 4 V. The code produced on the outputs of the
comparators is not binary, but with a simple gate circuit it can be converted to the
binary equivalents shown in the rightmost column of Figure. To increase the
resolution, more comparators can be added. Seven comparators are required for
3-bit resolution and 15 comparators are required for 4-bit resolution . An N-bit
converter requires 2 – 1 comparators.
The number of comparators needed increases rapidly as the desired number of

bits increases. The main advantage of a parallel comparator type A/D converter is
its speed. The binary word is present on the outputs after just the propagation
delay time of the comparators plus the delay time of the encoding gates. This is
why a parallel comparator type A/D converter is often called a flash converter.
16.4 Dual-slope Analog to Digital Converter
Fig16.4. Dual-slope ADC
The dual-slope ADC architecture was truly a breakthrough in ADCs for high
resolution applications such as digital voltmeters (DVMs), etc. A simplified diagram
is shown in Figure 1, and the integrator output waveforms are shown in Figure 2.
The input signal is applied to an integrator; at the same time a counter is started,
counting clock pulses. After a predetermined amount of time (T), a reference
voltage having opposite polarity is applied to the integrator. At that instant, the
accumulated charge on the integrating capacitor is proportional to the average
value of the input over the interval T.
Fig16.5.Dual-slope ADC integrator output waveforms
16.5 SUCCESSIVE APPROXIMATION A/D CONVERTERS:

The successive approximation technique is another method to
implement an A/D converter. Instead of a binary counter as in counter type
a/d converter a programmer is used here. The programmer sets the most
significant bit (MSB) to 1, with all other bits to 0, and the comparator
compares the D/A output with the analog signal.
If the D/A output is larger, the 1 is removed from the MSB, and
it is tried in the next most significant bit. If the analog input is larger, the 1
remains in that bit. Thus a 1 is tried in each bit of the D/A decoder until, at
the end of the process, the binary equivalent of the analog signal is obtained.
The successive approximation type A/D converter has the
disadvantage that it
requires a D/A converter, but it has the advantages of good resolution and
relatively high speed.
Fig 16.6 Successive Approximation A/D Converters Circuit Diagram
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LEARNING
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9. Video Links
Video Links
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e-book reference
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9. Lecture Notes
E-Books
1)Digital Fundamentals_ Global Ed - Thomas L Floyd:
https://www.amazon.in/Digital-Fundamentals-Pearson-Thomas-Floyd-
ebook/dp/B082D14QCQ#reader_B082D14QCQ
2)Digital Design - M. Morris Mano
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https://www.pdfdrive.com/digital-design-3rd-edition-e186109995.html
ONLINE LEARNING MATERIALS:

1)http://nptel.iitm.ac.in/ video.php? subject Id=117106086
2)http://nptel.iitm.ac.in/courses/117101001
3) https://youtu.be/C-oAyXibnJU
4) https://youtu.be/oYRMYSIVj1o
5) https://www.youtube.com/watch?v=XZmGGAbHqa0
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Quizzes
11
129
11.QUIZ QUESTIONS:
1. What is/are the crucial function/s of memory elements used in the
sequential circuits?
a. Storage of binary information
b. Specify the state of sequential
c. Both a & b
d. None of the above
2. The behaviour of synchronous sequential circuit can be predicted by
defining the signals at ______.
a. discrete instants of time
b. continuous instants of time
c. sampling instants of time
d. at any instant of time
3. In Moore models, output are the function of only
a. present state
b. input state
c. next state
d. both a and b
4. Memory elements in clocked sequential circuits are called

a.latches
b.flip-flop
c.signals
d.gates
5.The state of flip-flop can be switched by changing its

a.input signal
b.output signal
c.momentary signals
d.all signals
6.The flip-flops can be constructed with two
a.NAND gates
b.XOR gates
c.AND gates
d.NOT gates
7.Unused states are treated as Don't cares conditions during the
a.Design of a circuit
b.Execution
c.Pulse trigger
d.None
8. .A synchronous sequential circuit is made up of
a.combinational gates
b.flip-flops
c.latches
d.both a and b
9. In the last step of design procedure we
a.draw map
b.draw circuit
c.draw table
d.draw a logic diagram
10. In T flip-flop when state of the T flip-flop has to be
complemented the T must be
a.0
b.1
c.t
d.t+1
12
ASSIGNMENTS
132
12. Assignments
1)Design a combinational circuit with 4 inputs and 2 outputs. The output is 01

whenever the input binary value is greater the 10, 11 whenever the input binary
value is between 6 to 9, 10 whenever the input binary value is less than 4 and 00
for remaining conditions.
2)Design a combinational circuit with two inputs and four outputs. The output
binary number should be the square of the input binary number
3)Design a 3 input combinational circuit whose output is equal to 1 if the input

variables have more number of 1 s than 0’s. The output is ‘0’ otherwise
4)The input to a combinational logic circuit is a 4 bit binary number .Design the
logic circuit with minimum hardware for the following (i)Output Y1=1, if input
binary number is 5 or less than 5 (ii)Output Y2=1,if input binary number is 9 or
more than 9
5)Draw the logic circuit using NAND logic.
F (A, B, C, D,E) =∑m(6,9,13,18,19,25,27,29,31)+d(2,3,11,15,17,24,28)
6)Draw the logic circuit using only NOR gates
F(A,B,C,D)= πM (0,2,3,8,9,12,13,15) .πd(1,4,5,10,14)

13
PART A
2 MARKS QUESTIONS WITH ANSWERS
134
11. Part A Q & A (with K level and CO)
PART A
Questions and Answers Blooms COs
Level
1. What is a binary number system ?

The number system with base (or radix) two is known as the binary
K1 CO4
number system. Only two symbols are used to represent the
numbers in the system and these are 0 and 1.
K1 CO4
2. What is an Excess3 code?
The excess3 code is a non weighted code which is obtained from the
8-4-2-1 code by adding 3(0011) to each of the codes.
K1 CO4
3. What is the difference between analog and digital systems?
In a digital system the physical quantities or signals can assume only
discrete values, while in analog systems the physical quantities
or signals vary continuously over a specified range.
K1 CO4
4. Subtract X = 1010100 and Y = 1000011 using 2’s compliment
X = 1010100, 2’s complement of Y = + 0111101
Sum = 10010001, Discard end carry, X - Y = 0010001
K1 CO4
5. Subtract X = 1010100 and Y = 1000011, using 1’s complement.
X = 1010100, 1’s complement of Y = + 0111100
Sum = 10010000, End -around carry = + 1, X - Y = 0010001
6. Convert 0.640625 decimal number to its octal equivalent. K1 CO4

0.640625 x 8 = 5.125, 0.125 x 8 = 1.0
Ans. = 0.640 625 10 = 0.51
K1 CO4
7. Represent binary number 1101.101 in power of 2 and find its
decimal equivalent
N = 1 x 2 3 + 1 x 2 2 + 0 x 2 1 + 1 x 2 0 + 1 x 2 -1 + 0 x 2 -2 + 1 x 2 -
3
= 13.625
K1 CO4
8. Convert 0.1289062 decimal number to its hex equivalent
0.1289062 x 16 = 2.0625
0.0625 x 16 = 1.0
Ans. = 0.21 16
K1 CO4
9. Convert decimal number 22.64 to hexadecimal number.
16/ 22 R-6
16/ 1 R-1
R-0
0.64 x 16 = 10.24
0.24 x 16 = 3.84
0.84 x 16 = 13.44
.44 x 16 = 7.04
Ans. = (16 . A 3 D 7)
K1 CO4
10. What are the two steps in Gray to binary conversion?
The MSB of the binary number is the same as the MSB of the gray code
number. To obtain the next binary digit, perform an exclusive OR
operation between the bit just written down and the next gray code bit.
K1 CO4
11. Convert gray code 101011 into its binary equivalent.
Gray Code : 1 0 1 0 1 1
Binary Code 1 1 0 0 1 0
K1 CO4
12. Convert (9 B 2 - 1A) H to its decimal equivalent.
N = 9 x 16 2 + B x 16 1 + 2 x 16 0 + 1 x 16 -1 + A (10) x 16 -2
= 2304 + 176 + 2 + 0.0625 + 0.039

= 2482.1 10
13. What are combinational circuits?

A combinational circuit consists of logic gates whose outputs at any time
are determined
K1 CO4
from the present combination of inputs. A combinational circuit performs
an operation that can be specified logically by a set of Boolean functions.
It consists of input variables, logic gates, and output variables.
14. Define half adder. K1 CO4
A combinational circuit that performs the addition of two bits is called a
half adder. A half adder needs two binary inputs and two binary outputs.
The input variables designate the augend and addend bits; the output
variables produce the sum and carry
K1 CO4
15.Define full adder?
A combinational circuit that performs the addition of three bits is a full
adder. It consists of three inputs and two outputs.
PART A
Level
16. Define binary adder. K1 CO4
A binary adder is a digital circuit that produces the arithmetic sum of
two binary numbers. It can be constructed with full adders
constructed in cascade, with the output carry from each full adder
connected to the input carry of the next full adder in the chain.
17. What are decoders? K1 CO4
A decoder is a combinational circuit that converts binary information
from n input lines to a maximum of 2n unique output lines. If the n
bit coded information has unused combinations, the decoder may
have fewer than 2n outputs.
18. What are encoders? K1 CO4
An encoder is a digital circuit that performs the inverse operation of a
decoder. An encoder has 2n and n output lines. The output lines
generate the binary code corresponding to the input value.
19. Define multiplexer? K1 CO4
A multiplexer is combinational circuit that selects binary information
from one of many input lines and directs it to a single output line.
The selection of a particular input line is controlled by a
set of selection lines. Normally there are 2n input lines and n
selection lines whose bit combinations determine which input is
selected.
20. Define binary decoder? K1 CO4
A decoder which has an n- bit binary input code and a one activated
output out-of -2n
output code is called binary decoder. A binary decoder is used when
it is necessary to activate exactly one of 2n outputs based on an n-bit
input value.
21. Simplify the following expression Y = (A + B)(A + C’ )(B’ + C’ ) K2 CO4
Y = (A + B)(A + C’ )(B’ + C’ )
= (AA’ + AC +A’B +BC )(B’ + C’) [A.A’ = 0]
= (AC + A’B + BC)(B’ + C’ )
= AB’C + ACC’ + A’BB’ + A’BC’ + BB’C + BCC’
= AB’C + A’BC’
22. State De Morgan’s theorem. K1 CO4
De Morgan suggested two theorems that form important part of
Boolean algebra. They are,
1) The complement of a product is equal to the sum of the
complements.
(AB)’ = A’ + B’
2) The complement of a sum term is equal to the product of the
complements.
(A + B)’ = A’B’
K2 CO4
23. Reduce A.A’C
A.A’C = 0.c [A.A’ = 1] = 0
24. Reduce A(A + B) K2 CO4

A(A + B) = AA + AB
= A(1 + B) [1 + B = 1] = A.
K2 CO4
25. Reduce A’B’C’ + A’BC’ + A’BC
A’B’C’ + A’BC’ + A’BC = A’C’(B’ + B) + A’B’C
= A’C’ + A’BC [A + A’ = 1]
= A’(C’ + BC) = A’(C’ + B) [A + A’B = A + B]
K1 CO4
26. What are the two models of synchronous sequential circuits?
The two models of synchronous sequential circuits are,
Moore model
Melay model
K1 CO4
27. What is a ring counter?
A counter formed by circulating a ‘bit’ in a shift register whose serial
output has been connected to its serial input.
K1 CO4
28. What is Johnson counter?
It is a ring counter in which the inverted output is fed into the input. It is
also known as a twisted ring counter.
K1 CO4
29. What is meant by modulus of a counter?
By the term modulus of a counter we say it is the number of states
through which a counter can progress.
K1 CO4
30. Give the characteristic equation of a JK and T flip-flop.
JK characteristic equation Q(t+1)=JQ’+K’Q
T characteristic equation Q(t+1)=TQ’+T’Q
PART A
Level
31.What is a sequential circuit?
A sequential circuit is one in which the output variables dependent

K1 CO4
not only on the present input variables but they also depend up on
the past history of the input variables.
.
32. What are the types of sequential circuits? K1 CO4
Synchronous sequential circuit: Change in input signals can affect the

memory elements only at discrete instants of time.
Asynchronous sequential circuit: Change in input signals can affect
memory element at any instant of time.
33. Define flip flop. K1 CO4
Flip flop is a device with two stable states 0 or 1. A flip flop maintains
its output state until directed by an input signal to change its state.
Since it can store 1-bit of information, it is also called 1-bit memory
unit.
34. What are the types of flip flops? K1 CO4
SR Flip flop
JK Flip flop
Delay (D) Flip flop
Toggle (T) Flip flop
35. What is a latch? K1 CO4
A latch is a memory device without clock signal.
.
36. What is a characteristic table? K1 CO4
A characteristic table defines the logical property of the flip-flop and

completely characteristic its operation.
37. What is the difference between truth table and excitation table. K1 CO4
i) An excitation table is a table that lists the required inputs for a

given
change of state.
ii) A truth table is a table indicating the output of a logic circuit for
various
input states.
K1 CO4
38. What are the types of triggering a flip flop?
The types of triggering a flip flop are,
Level triggering
Edge triggering.
K1 CO4
39. What is edge triggering in flip flops?
Edge triggering means that the flip flop changes state either at the
positive edge(rising edge) or at the negative edge (falling edge) of the
clock pulse and is sensitive to its inputs only at this transition of the
clock.
K1 CO4
40. What is meant by level triggering?
In level triggering the output of the flip-flop changes state or responds
only when
the clock pulse is present.
41. What are shift registers? K1 CO4

A register is a group of flip flops to store a word. The binary information
in a register can be moved from stage to stage upon application of clock
pulses. This gives rise to group of registers called shift registers. This
type of bit shifting is essential for certain arithmetic and logic operations
used in microprocessors.
42. What is a counter? K1 CO4

A counter is a register capable of counting the number of clock pulses
arriving at its clock input. Count represents the number of clock pulses
arrived.
43. What is the difference between binary code and BCD? K1 CO4
Binary: Any distinct element can be represented by a binary code. No
limitation for the minimum or maximum number of elements
required for coding the element.
BCD: Only a decimal digit can be represented. It is a four bit
representation
K1 CO4
44. What is ripple or asynchronous counter?
Ripple counter is one in which first flip flop is clocked by the external
clock pulse and then each successive flip flop is clocked by the output of
previous flip flop.
K1 CO4
45. What is a gray code?
A gray code is a non weighted code which has the property
that the codes for successive decimal digits differ in exactly one bit.
46. What are the types of ADC and DAC. K1 CO4

Types of ADC:
1. Flash (comparator) type converter
2. Counter type converter
3. Tracking or servo converter
4. Successive approximation type converter
Types of DAC:
1. Weighted resistor DAC
2. R-2R Ladder
3. Inverted R-2R Ladder
47. What are the advantages and disadvantages of R-2R ladder DAC. K1 CO4
Advantages:
a) Easier to build accurately as only two precision metal films are
required.
b) Number of bits can be expanded by adding more sections of same
R/2R values.
Disadvantage:
In this type of DAC, when there is a change in the input, changes the
current flow in the resistor which causes more power dissipation which
creates non-linearity in DAC.
48. What is the advantage and disadvantages of flash type ADC? K1 CO4
Flash type ADC is the fastest as well as the most expensive.

The disadvantage is the number of comparators needed almost doubles
for each added bit (For a n-bit convertor 2(n-1) comparators, 2n
resistors are required).
49. List the drawbacks of binary weighted resistor technique of D/A K1 CO4
conversion.
a) Wide range of resistor values needed
b) Difficulty in achieving and maintaining accurate ratios over a wide
range of variations
14
PART B
LONG ANSWER QUESTIONS
142
12. Part B Qs (with K level and CO)
PART B
1.Expand A+BC’+ABD’+ABCD to canonical SOP K2 CO4
Show that AB’C+B+BD’+ABD’+A’C =B+C
2.Draw the logic circuit K2 CO4

(i)F(A,B,C,D)= ∑m(0,1,2,4,5,6,8,10,11,14,15)
(ii) F(A,B,C)= ∑m(0,3,5,8,9,13)+ ∑d(1,4,7,12)
3.Implement the following boolean function using Multiplexer K2 CO4

Y( A,B,C) = Σ(0,1,3,5,6)
Y( A,B,C,D) = Σ(0,1,6,12,14,15)
4. Design full adder and full subtractor. K2 CO4
5.Implement full adder and subtractor using demultiplexer. K2 CO4
6. Design BCD to Excess 3 code converter K2 CO4
7. Design Binary to gray code converter K2 CO4
8.Construct a 4 bit binary Adder/Subtractor and Design a BCD K2 CO4

adder
9. Design Gray to binary code converter K2 CO4
10. Explain the working of two types ADC and DAC K2 CO4
12. Part B Qs (with K level and CO)
PART B
11. (i) Perform the following using BCD and Excess-3 K2 CO4
addition(205+569) (ii)Encode the binary word11010 into odd parity
Hamming code
12. Perform the following operation and express the answer in octal K2 CO4
form (756) 8-(437) 8+ (725) 16.
13. Perform each of the following computations using signed 8-bit K2 CO4
words in 1’s complement and 2’s complement binary arithmetic:
(i) (+95)10 + (63)10 (ii) (+42)10 + (-87)10
(iii) (-13)10 + (-59)10
(iv) (+38)10 + (-38)10
(v) (-105)10 + (-120)10
14. The state of a 12-cell register is 010110010111. What is its content K2 CO4
if it represents:
(a) 3 decimal digits in BCD.
(b) 3 decimal digits in Excess-3 code
(c) 3 decimal digits in 2421 BCD code
(d) 3 decimal digits in 84-2-1 BCD code.
15
SUPPORTIVE ONLINE
CERTIFICATION COURSES
145
13.Supportive online Certification courses (NPTEL, Swayam,
Coursera, Udemy, etc.,)
Swayam
Digital Circuits: https://swayam.gov.in/nd1_noc20_ee70/preview
Duration: 12 weeks, Start Date: 14 Sep 2020, End Date: 04 Dec 2020
Udemy
Digital Electric Circuits & Intelligent Electrical Devices
https://www.udemy.com/course/digital-electric-circuits-intelligent-electrical-devices/
Coursera
Build a Modern Computer from First Principles: From Nand to Tetris (Project-
Centered Course)
https://www.coursera.org/learn/build-a-computer
16
REAL TIME APPLICATIONS

IN DAY TO DAY LIFE AND
TO INDUSTRY
147
14. Real time Applications in day to day life and to Industry
A few real time applications of digital systems is shown and explained.

Basic block diagram of a iPod player
The iPod player stores music in the digital form in its memory and the Digital to
analog converter converts it into the music that we hear through the head phones.
Basic block diagram of a CD player

The compact disk (CD) player has both digital and analog circuits. Music is stored
on the compact disk in digital form. A laser diode optical system picks up the
digital data from the rotating disk and transfers it to the digital-to-analog
converter (DAC). The DAC changes the digital data into an analog signal which is
an electrical reproduction of the original music. This signal is amplified and sent to
the speaker. An analog-to-digital converter (ADC) is used to record the music on
to the disk in digital form.
Source: Thomas Floyd- Digital Fundamentals

14. Real time Applications in day to day life and to Industry
DIGITAL CLOCK
A digital clock displays seconds, minutes, and hours
AC voltage is converted to pulse waveform and divided down to a 1
Hz pulse waveform by divide counters.
Both the seconds and minutes counts are produced by divide
counters
Synchronous decade counters are used for implementation a
truncated sequence achieved by using the decoder count 6 to
asynchronously clear the
Automobile Parking Control
An up/down counter is used as a means of monitoring available
spaces in a parking garage and provide indication of a full condition
by illuminating a display sign and lowering a gate bar at the
entrance
Each automobile entering the garage breaks a light beam,

activating a sensor that produces an electrical pulse.
This positive pulse sets the S-R latch on its leading edge.
The LOW on the Q output of the latch puts the counter in the UP
mode. Also, the sensor pulse goes through the NOR gate and clocks
the counter on the LOW-to-HIGH transition of its trailing edge.
Each time an automobile enters the garage, the counter is
advanced by one (incremented).
When the one-hundredth automobile enters, the counter goes to
its last state (10010).
The MAX/MIN output goes HIGH and activates the interface circuit
(no detail), which lights the FULL sign and lowers the gate bar to
prevent further entry.
When an automobile exits, an optoelectronic sensor produces a
positive pulse, which resets the S-R latch and puts the counter in
the DOWN mode. The trailing edge of the clock decreases the
count by one (decremented).
If the garage is full and an automobile leaves, the MAX/MIN output
of the counter goes LOW, turning off the FULL sign and raising the
gate.
17
CONTENT BEYOND
THE SYLLABUS
152
17. Contents beyond the Syllabus
Simulation of logic gates using PLC simulation software
Example: Two limit switches connected in series and used to control a solenoid
valve.
Example: Two limit switches connected in parallel and used to control a solenoid
valve.
PRESCRIBED TEXT
BOOKS & REFERENCE
BOOKS
18
154
TEXT BOOKS AND REFERENCE BOOKS
TEXT BOOK
1. S.K.Bhattacharya, "Basic Electrical & Electronics Engineering", Pearson Education.
2. REFERENCES
1. Del Toro, “Electrical Engineering Fundamentals”, Pearson Education, New Delhi,
2007
2. John Bird, “Electrical Circuit Theory and Technology”, Elsevier, First Indian Edition,
2006
3. Allan S Moris, “Measurement and Instrumentation Principles”, Elseveir, First
Indian Edition, 2006
4. Rajendra Prasad, “Fundamentals of Electrical Engineering”, Prentice Hall of India,
2006
5. A.E.Fitzgerald, David E Higginbotham and Arvin Grabel, “Basic Electrical
Engineering”, McGraw Hill Education(India) Private Limited, 2009
6. N K De, Dipu Sarkar, “Basic Electrical Engineering”, Universities Press
(India)Private Limited 2016
155
MINIPROJECT
19
156
17.MINI PROJECT
24 HOUR DIGITAL CLOCK AND TIMER CIRCUIT:
Features of 24-Hour Digital Clock and Timer Circuit
This circuit can be used for two purposes: both as a timer and a 24-hour clock.
When using this circuit as a timer/an alarm. The time at which the device or load
is to be switched ‘on’ or ‘off ‘ can be electronically stored while being displayed
simultaneously.
After storage of the time as mentioned above, the clock is set to display the real
time (in 24-hour mode) and it serves our purpose.
Circuit Description of 24-hour Digital Clock and Timer Circuit
A 24-hour digital clock circuit.
Fig. . shows the circuit of 24-hour digital clock section. This section is designed to
display the time in hours and minutes format, and is wired such that it functions
in 24-hour mode. For this purpose, this circuit make use of six 74LS90 decade
counters (in figure,IC1 through IC6), four 74LS247 BCD to 7-segment
decoders/drivers (IC7 through IC10) and four LT S542 common anode displays
(DIS1 through DIS4). In addition, passive components like few resistors,
capacitors and push-to-on switches are employed. A 1Hz clock is used to supply
the input to the IC1 through pin 14. 1 Hz clock generator circuit is shown in
button of article. The output obtained from both of the above mentioned circuits
become more accurate with the fact that both circuit take advantage of
32.768kHz quartz crystal.
Description of Counter Circuit
Each ICs are designed/wired with particular task to perform. During this course,
IC1 serves as divide-by-10 counter and the IC2 as divide-by-6 counter. Thus the
output of IC2 connected to clock pin 14 of IC3 has a pulse recurrence period of
one minute. In the similar way, following the connection pattern of IC1-IC2, IC3-
IC4 pair is wired likewise. And, so the output of IC4 connected to clock pin 14 of
IC5 has a pulse recurrence frequency of one hour. IC pair 5 and 6(IC5-IC6) is set
such that it resets itself on reaching a count of 24. The BCD to 7-segment
decoders IC7 through IC10 are used to decode the BCD outputs of IC3 through
IC6. In response to which, the 7-segment common-anode displays DIS1 is driven
through DIS4 respectively.
Thank you
D i s c l a i m e r :
This document is confidential and intended solely for the educational purpose of RMK Group of
Educational Institutions. If you have received this document through email in error, please notify the
system manager. This document contains proprietary information and is intended only to the
respective group / learning community as intended. If you are not the addressee you should not
disseminate, distribute or copy through e-mail. Please notify the sender immediately by e-mail if you
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Department Mechanical Engineering

S. No Topic Page No.

5 CO- PO/PSO Mapping 14

7 Activity based learning 21

9 Link to Videos 125

10 e-book reference 127

11 Multiple Choice Questions 129

13 Part A Question with answers 134

14 Part B Questions 142

Supportive online Certification courses 145

Real time Applications in day to day life 147

Prescribed Text Books & Reference 154

The students should be made:

20EE101-BASIC ELECTRICAL, ELECTRONICS& INSTRUMENTATIONENGINEERING

UNIT I ELECTRICAL CIRCUITS

UNIT II ELECTRICAL MACHINES

Principles of operation and characteristics of - DC machines, Transformers (single and

UNIT III ELECTRONIC DEVICES AND CIRCUITS

Introduction –Characteristics of PN junction Diode-Zener Diode and its characteristics-Half

UNIT IV DIGITAL ELECTRONICS

Binary number system-Boolean algebra theorems-Digital circuits-Introduction to

UNIT V MEASUREMENTS & INSTRUMENTATION

Introduction to transducers - Classification of Transducers: Resistive, Inductive,

On completion of the course, the students will be able to

CO NO. COURSE OUTCOME K-LEVEL

CO1 Analyze the concept of DC and AC electric circuits K2

Identify appropriate machine for a given

CO3 Explain the working of electron devices K2

CO4 Demonstrate the concept of digital logic circuits K2

Choose appropriate instruments and transducers

On completion of the B.E (Mechanical Engineering) Degree the Mechanical

1. Engineering knowledge: Apply the knowledge of mathematics, science, engineering

After successful completion of the B.E degree program, the graduates

After successful completion of the B.E degree program, the graduates

Binary number system

Boolean algebra theorems

Introduction to sequential circuits

A/D converters CO4

Play with Binary Numbers using Binary Puzzles http://www.binarypuzzle.com/

Binary to create on-off pictures, Binary magic tricks

Troubleshooting Logic Gates for

2. Open Output conditions

Logic Gate Testing using Multisim software

Practice using open source DEEDS: https://www.digitalelectronicsdeeds.com/

The processing in a digital system basically has the following sections:

Input: Analog-to-Digital (A/D) converter at the input end.

Processing: Done using a digital system.

Output: Digital-to-Analog (D/A) converter at the output end.

Source: Thomas Floyd- Digital Fundamentals

1. Number System defines a set of values used to represent a quantity.

2. Number System is a basis for counting various items.

3. Digits: A collection of various symbols in a number system is called digits.

6. Weight / Value: In a positional number system, the position of a digit with

a. Usually weight / value is expressed in powers of radix / base.

1.2.1 Decimal Number System:

1. Base: Base 10 System / Radix 10 System.

a. Number of values assumed by each digit: 10

b. Range: Uses ten digits: 0,1,2,3,4,5,6,7,8,9.

2. Largest Value of a digit: The largest value a digit can take is 9.