Embedded (Practical)
Embedded (Practical)
PIN10 VCC=+5V
PIN11 GND
PIN12 XTAL2
PIN13 XTAL1
PIN33 –
PAx: I/O,ADCx (Where x is 7 – 0)
PIN40
Microprocessor Microcontroller
Ans 3)
Interrupt is the method of creating a temporary halt during program execution
and allows peripheral devices to access the microprocessor. The
microprocessor responds to that interrupt with an ISR (Interrupt Service
Routine), which is a short program to instruct the microprocessor on how to
handle the interrupt.
Hardware Interrupts
Hardware interrupt is caused by any peripheral device by sending a signal
through a specified pin to the microprocessor.
The 8086 has two hardware interrupt pins, i.e. NMI and INTR. NMI is a non-
maskable interrupt and INTR is a maskable interrupt having lower priority.
One more interrupt pin associated is INTA called interrupt acknowledge.
Software Interrupts
Some instructions are inserted at the desired position into the program to create
interrupts. These interrupt instructions can be used to test the working of
various interrupt handlers.
Ans 4)
Direct Memory Access (DMA):
DMA Controller is a hardware device that allows I/O devices to directly
access memory with less participation of the processor. DMA controller
needs the same old circuits of an interface to communicate with the CPU and
Input/Output devices.
DMA CYCLE DIAGRAM in Comp. Architecture
Ans 5)
In embedded system programming C code is preferred over other language. Due to the
following reasons:
o Easy to understand
o High Reliability
o Portability
o Scalability
The If Statements
This type of statement would enable a programmer to choose various instruction sets on
the basis of the available condition. The instruction sets will only get executed when the
evaluation of the condition turns out to be true. In case the evaluation of the condition is
false, there will be an execution of a different instruction set. These are also known
as decision control statements. These are of the following types:
Here, the execution of the expression_1 will only occur when the given condition is valid.
In case this statement is incorrect, then the execution of the expression_2 will occur .
• Do While Loop
• While Loop
• For Loop
Input Configuration
If any pin of this port is configured as an input, then it acts as if it “floats”, i.e. the input has
unlimited input resistance and in-determined potential.
Output Configuration
When the pin is configured as an output, then it acts as an “open drain”. By applying logic 0 to a
port bit, the appropriate pin will be connected to ground (0V), and applying logic 1, the external
output will keep on “floating”.
In order to apply logic 1 (5V) on this output pin, it is necessary to build an external pullup
resistor.
Port 1
P1 is a true I/O port as it doesn’t have any alternative functions as in P0, but this port can be
configured as general I/O only. It has a built-in pull-up resistor and is completely compatible
with TTL circuits.
Port 2
P2 is similar to P0 when the external memory is used. Pins of this port occupy addresses
intended for the external memory chip. This port can be used for higher address byte with
addresses A8-A15. When no memory is added then this port can be used as a general
input/output port similar to Port 1.
Port 3
In this port, functions are similar to other ports except that the logic 1 must be applied to
appropriate bit of the P3 register.
Ans 6)
Embedded Sensor
Keypad Programming
LCD
The principle behind the LCDs is that when an electrical current is applied to the
liquid crystal molecule, the molecule tends to untwist. This causes the angle of light
which is passing through the molecule of the polarized glass and also causes a
change in the angle of the top polarizing filter. As a result, a little light is allowed to
pass the polarized glass through a particular area of the LCD.
Thus that particular area will become dark compared to others. The LCD works on
the principle of blocking light. While constructing the LCDs, a reflected mirror is
arranged at the back. An electrode plane is made of indium-tin-oxide which is kept
on top and a polarized glass with a polarizing film is also added on the bottom of the
device. The complete region of the LCD has to be enclosed by a common electrode
and above it should be the liquid crystal matter.
Ans 7)
We assumed a new 2-bit register called Instruction Cycle Code (ICC). The ICC
designates the state of processor in terms of which portion of the cycle it is in:-
00 : Fetch Cycle
01 : Indirect Cycle
10 : Execute Cycle
11 : Interrupt Cycle
Machine Cycle
The machine cycle is the most basic operation that a computer performs, and in
order to complete menial tasks such as showing a single character on the screen,
the CPU has to perform multiple cycles. The computer does this from the moment
it boots up until it shuts down.
• Fetch – The control unit requests instructions from the main memory that is stored at a
memory’s location as indicated by the program counter (also known as the instruction
counter).
• Decode – Received instructions are decoded in the instruction register. This involves
breaking the operand field into its components based on the instruction’s operation code
(opcode).
• Execute – This involves the instruction’s opcode as it specifies the CPU operation required.
The program counter indicates the instruction sequence for computer. These instructions
are arranged into the instructions register and as each are executed, it increments the
program counter so that the next instruction is stored in memory. Appropriate circuitry is
then activated to perform the requested task. As soon as instructions have been executed,
it restarts the machine cycle that begins the fetch step
T-STATES
T-state is defined as one subdivision of operation performed in one clock period. These
subdivisions are internal states synchronized with the system clock, and each T-state is
precisely equal to one clock period.
Original assembly
Opcode Operand Description
language
ADD 1C ADD 1C
Add this number to the number stored at
memory address 1C
OUT OUT Output the result
HLT HLT Stop the program
A high-level language has a higher level of abstraction from the computer, and focuses
more on the programming logic rather than the underlying hardware components such as
memory addressing and registers utilization.
The machine-level language is a language that consists of a set of instructions that
are in the binary form 0 or 1. As we know that computers can understand only machine
instructions, which are in binary digits, i.e., 0 and 1, so the instructions given to the computer
can be only in binary codes.
Ans 8)
It is also known as ISA (Instruction set architecture) computer and is having three basic
units:
1. The Central Processing Unit (CPU)
2. The Main Memory Unit
3. The Input/Output Device Let’s consider them in detail.
It is faster in comparison to
4. Segmentation is slow.
segmentation.
In paging, the logical address is split Here, the logical address is split into
6.
into a page number and page offset. section number and section offset.
Paging comprises a page table that While segmentation also comprises the
7. encloses the base address of every segment table which encloses segment
page. number and segment offset.
The page table is employed to keep Section Table maintains the section
8.
up the page data. data.
The size of the page needs always There is no constraint on the size of
15.
be equal to the size of frames. segments.
Parallel Processing
Parallel processing can be described as a class of techniques which enables the system to
achieve simultaneous data-processing tasks to increase the computational speed of a computer
system.
A parallel processing system can carry out simultaneous data-processing to achieve faster
execution time. For instance, while an instruction is being processed in the ALU component of
the CPU, the next instruction can be read from memory.
The primary purpose of parallel processing is to enhance the computer processing capability
and increase its throughput, i.e. the amount of processing that can be accomplished during a
given interval of time.
A parallel processing system can be achieved by having a multiplicity of functional units that
perform identical or different operations simultaneously. The data can be distributed among
various multiple functional units.