3 Unit
3 Unit
1 Architecture of 8255
PA7-PA0: These are eight port A lines that acts as either latched output or
buffered input lines depending upon the control word loaded into the control
word register.
PC7-PC4: Upper nibble of port C lines. They may act as either output latches or
input buffers lines. This port also can be used for generation of handshake lines
in mode 1 or mode 2.
PC3-PC0: These are the lower port C lines, other details are the same as PC7-
PC4 lines.
PB0-PB7: These are the eight port B lines which are used as latched output lines
or buffered input lines in the same way as port A.
RD: This is the input line driven by the microprocessor and should be low to
indicate read operation to 8255.
WR: This is an input line driven by the microprocessor. A low on this line
indicates write operation.
CS: This is a chip select line. If this line goes low, it enables the 8255 to respond
to RD and WR signals, otherwise RD and WR signal are neglected.
A1-A0: These are the address input lines and are driven by the microprocessor.
These lines A1-A0 with RD, WR and CS from the following operations for
8255. These address lines are used for addressing any one of the four registers,
i.e. three ports and a control word register as given in table below.
D0-D7: These are the data bus lines those carry data or control word to/from the
microprocessor.
RESET: A logic high on this line clears the control word register of 8255. All
ports are set as input ports by default after reset.
Input/output mode
Bit set/reset mode
There are three types of the input/output mode. They are as follows:
Mode 0
In this mode, the ports can be used for simple input/output operations
without handshaking. If both port A and B are initialized in mode 0, the two halves
of port C can be either used together as an additional 8-bit port, or they can be used
as individual 4-bit ports. Since the two halves of port C are independent, they may
be used such that one-half is initialized as an input port while the other half is
initialized as an output port. The input output features in mode 0 are as follows:
Mode 2
Only group A can be initialized in this mode. Port A can be used for
bidirectional handshake data transfer. This means that data can be input or output
on the same eight lines (PA0 - PA7). Pins PC3 - PC7 are used as handshake lines
for port A. The remaining pins of port C (PC0 - PC2) can be used as input/output
lines if group B is initialized in mode 0. In this mode, the 8255 may be used to
extend the system bus to a slave microprocessor or to transfer data bytes to and
from a floppy disk controller.
In this mode only port B can be used (as an output port). Each line of port C (PC0 -
PC7) can be set/reset by suitably loading the command word register.no effect
occurs in input-output mode. The individual bits of port C can be set or reset by
sending the signal OUT instruction to the control register.
4 Control Word Format
The figure shows the control word format in the input/output mode. This mode is
selected by making
D7 = '1' .
D0, D1, D3, D4 are for lower port C, port B, upper port C and port A
respectively. When D0 or D1 or D3 or D4 are "SET", the corresponding ports
act as input ports. For eg, if D0 = D4 = '1', then lower port C and port A act as
input ports. If these bits are "RESET", then the corresponding ports act as
output ports. For eg, if D1 = D3 = '0', then port B and upper port C act as output
ports.
D2 is used for mode selection for group B (Port B and Lower Port C). When D2
= '0', mode 0 is selected and when D2 = '1', mode 1 is selected.
D5, D6 are used for mode selection for group A (Upper Port C and Port A). The
format is as follows:
• Here we use port A as output port for selecting a row of keys while port B is used
as an input port for sensing a closed key.
• Hence the keyboard lines are selected one by one through Port A and the Port B
lines are polled continuously till a key closure is sensed.
• The higher order lines of Port A and Port B are left unused. The flow chart of the
ALP is as shown below :
We suppose that we use simple mechanical switches. For keyboard, then to get the
meaningful data from a keyboard requires three steps :
• (1) Detect a key press •
• (2) Debounce the key press •
• (3) Encode the key press
The three tasks can be done with a hardware, software or a combination of the two.
The rows of the matrix are connected to four output port lines. The column line of
the matrix are connected to four input port lines
INTERFACING LED WITH 8085
LEDs are interfaced with 8085 using 8255 PPI.
8255 PPI is interfaced using address lines, data lines and control line RD and WR.
LEDs are connected to any one of the port by configuring the port in simple IO
mode.
An interfacing diagram with 8 LEDs is shown below.
LEDs are connected to the ground through current limiting resistors.
When logic 1 is send to any pin of Port A, the LED will conduct the current and it
will glow.
When logic 0 is send to any pin of Port A, then the LEDs will be off.
Seven segment LED display is interfaced with 8085 using 8255 PPI.
8255 PPI is interfaced using address lines, data lines and control line RD and WR.
Seven segment LED display is connected to any one of the port by configuring the
port in simple IO mode.
Seven segment LED display is connected to the ground through 74LS244 driver
and current limiting resistors.
Seven segment LED display used here is a common anode type, hence When logic
0 is send to any pin of Port A, the LED will conduct the current and it will glow.
When logic 1 is send to any pin of Port A, then the LEDs will be off.
In this schematic the DAC0800 is interfaced using an 8-bit latch 74LS273 to the
system bus.
The 3-to-8 decoder 74LS 138 is used to generate chip select signals for I/O
devices.
The address lines A4, A5 and A6 are used as input to decoder.
The address line A7 and the control signal IO/M (low) are used as enable for
decoder.
The decoder will generate eight chip select signals and in this the signal IOCS-7 is
used as enable for latch of DAC.
The I/O address of the DAC is shown in table.
In order to convert a digital data to analog value, the processor has to load the data
to latch.
The latch will hold the previous data until next data is loaded.
The DAC will take definite time to convert the data. The software should take care
of loading successive data only after the conversion time.
The DAC 0800 produces a current output, which is converted to voltage output
using I to V converter
The amplified output is fed to channel 3 of ADC and 8085 provides High to Low SOC and
ALE signal.
When ADC completes the conversion, 8085 reads the equivalent digital data from Port A
which is the current value of temperature of object.
For measuring temperature of furnace, water bath, etc. 8085 1st measures current temperature
(t1) and compares with the reference temperature (T1) at which the temperature is to be kept
constant.
If the measure temperature (t1) is greater than reference temperature (T1) then 8085 sends
control signal to the transistorized relay circuit through Port B and turns OFF the heating process
to maintain temperature at desired level.
If the measure temperature (t1) is less than reference temperature (T1) then 8085 sends
control signal to the transistorized relay circuit through Port B and turns ON the heating process
to maintain temperature at desired level, thus maintaining the temperature of furnace, bath tub,
etc.
MICROPROCESSOR BASED TRAFFIC LIGHT CONTROL:
Nowadays microprocessors are used to implement the traffic control system. Figure 10.62 shows
the simple model of Microprocessor Based Traffic Light Control.
The various control signals such as red, green, orange, forward arrow, right arrow and left arrow
are used in this scheme. The forward, right and left arrows are used to indicate forward, right and
left movement respectively. The red (R) signal is used to stop the traffic in the required lane and
the yellow (Y) signal is used as standby, which indicates that the traffic must wait for the next
signal. The green (G) light for a particular lane remains ON for DELAY-1 seconds followed by
the standby signal for DELAY-2 seconds. However, at a time for 3 out of the four roads, the left
signal or the left arrow remains on even though that lane may have a red signal. The traffic light
control is implemented using the 8085 microprocessor kit having 8255 on board and the
interfacing circuit is illustrated in Fig.
Each signal is controlled by a separate pin of I/O ports. The total number of logic signals
required for this arrangement is twenty-four. The programmable peripheral interface device 8255
is used to interface these 24 logic signals with the lamps.
The logic 0 and 1 represent the state of the lamp. Logic 1 represents ON and 0 represents OFF.
All ports of 8255 are used as output ports. The control word to make all ports as output ports for
Mode 0 operation is 80H.