1/22/2024

ECE 3130
Microcomputer Systems

01 Architecture
Computer
 1/22/2024

Outline

• Data representation

• Computer Hardware

• Memory

• Processor

• Program execution
 1/22/2024

Data Representation
 1/22/2024

Bit, Byte, Half-word, Word, Double-Word

 1/22/2024

Binary, Octal, Decimal and Hex

Decimal Binary Octal Hex
0 0000 00 0x0
1 0001 01 0x1
2 0010 02 0x2
3 0011 03 0x3
4 0100 04 0x4
5 0101 05 0x5
6 0110 06 0x6
7 0111 07 0x7
8 1000 010 0x8
9 1001 011 0x9
10 1010 012 0xA
11 1011 013 0xB
12 1100 014 0xC
13 1101 015 0xD
14 1110 016 0xE
15 1111 017 0xF
 1/22/2024

Magic 32-bit Numbers

• Used as a special pattern for debug
• Used as a special pattern of memory values during allocation and de-allocation

0xDEADBEEF Dead Beef

0xBADDCAFE Bad Cafe
0xFEE1DEAD Feel Dead
0x8BADF00D Ate Bad Food
0xBAADF00D Bad Food
0xDEADC0DE Dead Code
0xFACEB00C Facebook
0xDEADD00D Dead Dude
 1/22/2024

Unsigned Integers

Convert from Binary to Decimal:

𝟏𝟎𝟏𝟏𝟐 = 𝟏 × 𝟐𝟑 +𝟎 × 𝟐𝟐 +𝟏 × 𝟐𝟏 + 𝟏 × 𝟐𝟎
= 𝟖+𝟐+𝟏
= 𝟏𝟏

Five-bit binary code

 1/22/2024

Range of Unsigned Integers

Storage Size Range Powers of 2

Unsigned Byte 0 to 255 0 to 28-1
Unsigned Halfword 0 to 65,535 0 to 216-1
Unsigned Word 0 to 4,294,967,295 0 to 232-1
Unsigned Double-word 0 to 18,446,744,073,709,551,615 0 to 264-1
 1/22/2024

Unsigned Integers
Convert Decimal to Binary

Example 1 Example 2

5210 = 1101002 3210 = 1000002

 1/22/2024

Carry/borrow flag bit for unsigned numbers

• Given unsigned integers 𝑎 and 𝑏

• 𝒄=𝒂+𝒃
• Carry happens if c is too big to fit in n bits (i.e. c > 2 −1).

• 𝒄=𝒂−𝒃
• Borrow happens if 𝑐 < 0.

• On ARM Cortex-M processors, the carry flag and the borrow

flag are physically the same flag bit in the status register.
• For an unsigned subtraction, Carry = NOT Borrow
 1/22/2024

Carry/borrow flag bit for unsigned numbers

If the traverse crosses the boundary between 0 and 𝟐𝒏 − 𝟏, the carry flag is set on
addition and is cleared on subtraction.

• Carry flag = 1, indicating carry has occurred

on unsigned addition.
• Carry flag is 1 because the result crosses
the boundary between 31 and 0.
A carry occurs when adding 28 and 6
 1/22/2024

Carry/borrow flag bit for unsigned numbers

If the traverse crosses the boundary between 0 and 𝟐𝒏 − 𝟏, the carry flag is set on
addition and is cleared on subtraction.

Borrow 1 1 1 0 0
0 0 0 1 1 3
- 0 0 1 0 1 - 5
1 1 1 1 0 30

5-bit result

• Carry flag = 0, indicating borrow has

occurred on unsigned subtraction.
• For subtraction, carry = NOT borrow.

A borrow occurs when subtracting 5 from 3.

 1/22/2024

Signed Integer Representation

• Three ways to represent signed binary integers:
• Signed magnitude
• 𝒗𝒂𝒍𝒖𝒆 = (−𝟏)𝒔𝒊𝒈𝒏 × 𝑴𝒂𝒈𝒏𝒊𝒕𝒖𝒅𝒆
• One’s complement (𝜶)
• 𝜶 + 𝜶 = 𝟐𝒏 − 𝟏
• Two’s complement (𝜶)
• 𝜶 + 𝜶 = 𝟐𝒏

One’s
Sign-and-Magnitude Two’s Complement
Complement
Range [−2 + 1, 2 − 1] [−2 + 1, 2 − 1] [−2 ,2 − 1]
Zero Two zeroes (±0) Two zeroes (±0) One zero
Unique
2 −1 2 −1 2
Numbers
 1/22/2024

Signed Integers
Method 1: Signed Magnitude

Sign-and-Magnitude:
𝒗𝒂𝒍𝒖𝒆 = (−𝟏)𝒔𝒊𝒈𝒏 × 𝑴𝒂𝒈𝒏𝒊𝒕𝒖𝒅𝒆
• The most significant bit is the sign.
• The rest bits are magnitude.

• Example: in a 5-bit system

• +710 = 001112
• -710 = 101112

• Two ways to represent zero

• +010 = 000002
• -010 = 100002

• Not used in modern systems

• Hardware complexity
• Two zeros
 1/22/2024

Signed Integers
Method 2: One’s Complement
One’s Complement (𝜶):
𝜶 + 𝜶 = 𝟐𝒏 − 𝟏

The one's complement

representation of a negative binary
number is the bitwise NOT of its
positive counterpart.

Example: in a 5-bit system

+710 = 001112
-710 = 110002

+710 + (-710) = 001112 + 110002

= 111112
= 25 - 1
 1/22/2024

Signed Integers
Method 3: Two’s Complement (TC)
Two’s Complement (𝜶):
𝜶 + 𝜶 = 𝟐𝒏

TC of a negative number can be

obtained by the bitwise NOT of its
positive counterpart plus one.

Example 1: TC(3)

Binary Decimal
Original number 0b00011 3
Step 1: Invert
0b11100
every bit
Step 2: Add 1 + 0b00001
Two’s complement 0b11101 -3
 1/22/2024

Signed Integers
Method 3: Two’s Complement (TC)
Two’s Complement (TC)
𝜶 + 𝜶 = 𝟐𝒏

TC of a negative number can be

obtained by the bitwise NOT of its
positive counterpart plus one.

Example 2: TC(-3)

Binary Decimal
Original number 0b11101 -3
Step 1: Invert
0b00010
every bit
Step 2: Add 1 + 0b00001
Two’s complement 0b00011 3
 1/22/2024

Comparison

Signed magnitude One’s complement Two’s Complement

representation representation representation
0 = positive Negative = invert all TC = invert all bits,
1 = negative bits of a positive then plus 1

Used in modern computers!

 1/22/2024

Range of Signed Integers

(Two’s Complement)

Storage Size Range Powers of 2

Signed Byte -128 to +127 -27 to 27-1
Signed Halfword -32,768 to +32,767 -215 to 215-1
Signed Word -2,147,483,648 to +2,147,483,647 -231 to 231-1
Signed Double-word -9,223,372,036,854,775,808 to -263 to 263-1
+9,223,372,036,854,775,807
 1/22/2024

Overflow for Signed Add/Sub

• When adding signed numbers represented in two’s complement, overflow occurs
only in two scenarios:
1. adding two positive numbers but getting a non-positive result, or
2. adding two negative numbers but yielding a non-negative result.

• Similarly, when subtracting signed numbers, overflow occurs in two scenarios:

1. subtracting a positive number from a negative number but getting a positive result, or
2. subtracting a negative number from a positive number but producing a negative result.

• Overflow cannot occur when adding operands with different signs or when
subtracting operands with the same signs.
 1/22/2024

Overflow for Signed Add

11111 00000 00001
11110 00010
11101 00011
-1 0 1
11100 -2 2 00100
-3 3
11011 -4 4 00101

-5 5
11010 00110
-6 6
11001 00111
-7 7

11000 -8 8 01000

-9 9
10111 01001
-10 10
10110 01010
-11 11
Overflow +5
10101 -12 12 01011
-13 13
10100 -14 14 01100
-15 -16 15
10011 01101
01110
1. On addition, overflow occurs if 𝑠𝑢𝑚 ≥ 2
10010
10001 10000 01111

when adding two positives.

Overflow occurs when 2. Overflow never occurs when adding two
adding two positive integers numbers with different signs.
but getting a negative
result.
 1/22/2024

Overflow for Signed Add

11111 00000 00001
11110 00010
11101 00011
-1 0 1
11100 -2 2 00100
-3 3
11011 -4 4 00101

-5 5
11010 00110
-6 6
11001 00111
-7 7

11000 -8 8 01000

-9 9
10111 01001
-10 10
10110 01010
-11 11
Overflow
10101 -12 -7 12 01011
-13 13
10100 -14 14 01100
-15 -16 15
10011 01101
10010 01110
10001 10000 01111
On addition, overflow occurs if
𝑠𝑢𝑚 < −2 when adding two
Overflow occurs when adding negatives.
two negative integers but
getting a positive result.
 1/22/2024

Signed or Unsigned
a = 0b10000
b = 0b10000
c = a + b

 Are a and b signed or unsigned numbers?

• CPU does not know the answer at all.

• Therefore the hardware sets up both the carry flag and the
overflow flag.
• It is software’s (programmers’/compilers’) responsibility to
interpret the flags.
 1/22/2024

Signed or unsigned
• Whether the carry flag or the overflow flag should be used depends on the programmer’s intention.

 When programming in high-level languages such as C, the compiler

automatically chooses to use the carry or overflow flag based on how this
integer is declared in source code (“int” or “unsigned int”).
 1/22/2024

Signed or Unsigned
a = 0b10000
b = 0b10000
c = a + b
 Are a and b signed or unsigned numbers?

uint a;
uint b; Check the carry flag!
…
c = a + b
…

C Program
 1/22/2024

Signed or Unsigned
a = 0b10000
b = 0b10000
c = a + b
 Are a and b signed or unsigned numbers?

int a;
int b; Check the overflow flag!
…
c = a + b
…

C Program
 1/22/2024

Signed Integer Representation

Method 3: Two’s Complement
Assume a four-bit system:

Expression Result Carry? Overflow? Correct Result?

0100 + 0010 0110

0100 + 0110 1010
1100 + 1110 1010
1100 + 1010 0110
 1/22/2024

Signed Integer Representation

Method 3: Two’s Complement

Assume a four-bit system:

Expression Result Carry? Overflow? Correct Result?

0100 + 0010 0110 No No Yes

0100 + 0110 1010 No Yes No
1100 + 1110 1010 Yes No Yes
1100 + 1010 0110 Yes Yes No
 1/22/2024

Why use Two’s Complement

Two’s complement simplifies hardware

Operation Are signed and unsigned operations the same?

Addition Yes
Subtraction Yes
Multiplication Yes if the product is required to keep the same number of
bits as operands
Division No
 1/22/2024

Adding two signed integers: (-9) + 6

-9 + 6
9 flip +1 -9
1 0 1 1 1 0 0 1 1 0 01001 10110 10111
23 6 Two’s
Complement

Simple Hardware Adder

29 3
flip +1
1 1 1 0 1 00010 00011
Two’s Complement
-3 Counterpart
 1/22/2024

Subtracting two signed integers: (-9) - 6

-9 - 6
9 flip +1 -9
1 0 1 1 1 0 0 1 1 0 01001 10110 10111
23 6 Two’s
Complement

Simple Hardware Subtractor

17
15 flip +1 -15
1 0 0 0 1 01111 10000 10001

-15
 1/22/2024

Two’s Complement Simplifies Hardware Implementation

• In two’s complement, the same hardware works correctly for both

signed and unsigned addition/subtraction.

• If the product is required to keep the same number of bits as

operands, unsigned multiplication hardware works correctly for
signed numbers.

• However, this is not true for division.

 1/22/2024

Condition Codes

Bit Name Meaning after add or sub

N negative result is negative
Z zero result is zero
V overflow signed arithmetic out of range
C carry signed arithmetic out of range

• C is set upon an unsigned addition if the answer is wrong

• C is cleared upon an unsigned subtract if the answer is wrong
• V is set upon a signed addition or subtraction if the answer is wrong

Why do we care about these bits?

 1/22/2024

Carry and Overflow

𝑐 =𝑎±𝑏

Carry Overflow
(for unsigned) (for signed)
Add 𝐶𝑎𝑟𝑟𝑦 = 1 if 𝑐 is too
large to fit in. 𝑂𝑣𝑒𝑟𝑓𝑙𝑜𝑤 = 1 if 𝑐 is too
Subtract 𝐵𝑜𝑟𝑟𝑜𝑤 = 1, i.e. large or too small to fit in
𝐶𝑎𝑟𝑟𝑦 = 0 if 𝑎 < 𝑏.

• ARM Cortex-M has no dedicated borrow flag, • Signed Subtraction is converted to sign
carry flag is reused. addition
• For unsigned subtract, 𝐵𝑜𝑟𝑟𝑜𝑤 = 𝐶𝑎𝑟𝑟𝑦 • 𝑎 − 𝑏 = 𝑎 + (−𝑏)
 1/22/2024

Formal Representation for Addition

R = X + Y

When adding two 32-bit integers X and Y, the flags are

• N = R31
• Z is set if R is zero.
• C is set if the result is incorrect for an unsigned
addition
𝐶 = 𝑋 & 𝑌 ∥ 𝑋 &𝑅 ∥ 𝑌 &𝑅
• V is set if the result is incorrect for a signed addition.
𝑉 =𝑋 &𝑌 &𝑅 ∥ 𝑋 & 𝑌 &𝑅
 1/22/2024

Formal Representation for Subtraction

R = X - Y

When subtracting two 32-bit integers X and Y, the flags are

• N = R31
• Z is set if R is zero.
• C is clear if the result is incorrect for an unsigned subtraction
𝐶 = 𝑌 & 𝑅 ∥ 𝑋 &𝑅 ∥ 𝑋 &𝑌
• V is set if the result is incorrect for a signed subtraction.
𝑉 = 𝑋 &𝑌 &𝑅 ∥ 𝑋 &𝑌 &𝑅
 1/22/2024

Characters Dec
0
Hex
00
Char
NUL
Dec
32
Hex
20
Char
SP
Dec
64
Hex
40
Char
@
Dec
96
Hex
60
Char
‘
1 01 SOH 33 21 ! 65 41 A 97 61 a
2 02 STX 34 22 " 66 42 B 98 62 b
3 03 ETX 35 23 # 67 43 C 99 63 c
4 04 EOT 36 24 $ 68 44 D 100 64 d
American 5 05 ENQ 37 25 % 69 45 E 101 65 e
Standard 6 06 ACK 38 26 & 70 46 F 102 66 f
7 07 BEL 39 27 ’ 71 47 G 103 67 g
Code for 8 08 BS 40 28 ( 72 48 H 104 68 h
Information 9 09 HT 41 29 ) 73 49 I 105 69 i
10 0A LF 42 2A * 74 4A J 106 6A j
Interchange 11 0B VT 43 2B + 75 4B K 107 6B k
12 0C FF 44 2C , 76 4C L 108 6C l
13 0D CR 45 2D - 77 4D M 109 6D m
14 0E SO 46 2E . 78 4E N 110 6E n
15 0F SI 47 2F / 79 4F O 111 6F o
• Standard ASCII 16 10 DLE 48 30 0 80 50 P 112 70 p
0 - 127 17 11 DC1 49 31 1 81 51 Q 113 71 q
18 12 DC2 50 32 2 82 52 R 114 72 r
• Extended ASCII 19 13 DC3 51 33 3 83 53 S 115 73 s
0 - 255 20 14 DC4 52 34 4 84 54 T 116 74 t
21 15 NAK 53 35 5 85 55 U 117 75 u
• ANSI 22 16 SYN 54 36 6 86 56 V 118 76 v
0 - 255 23 17 ETB 55 37 7 87 57 W 119 77 w
• Unicode 24 18 CAN 56 38 8 88 58 X 120 78 x
25 19 EM 57 39 9 89 59 Y 121 79 y
0 - 65535 26 1A SUB 58 3A : 90 5A Z 122 7A z
27 1B ESC 59 3B ; 91 5B [ 123 7B {
28 1C FS 60 3C < 92 5C \ 124 7C |
29 1D GS 61 3D = 93 5D ] 125 7D }
30 1E RS 62 3E > 94 5E ^ 126 7E ~
31 1F US 63 3F ? 95 5F _ 127 7F DEL

Standard ASCII: Encoding 128 characters

 1/22/2024

Null-terminated String

char str[13] = “ARM Assembly”; Memory Memory

Letter
Address Content
// The length has to be at least
str + 12  0x00 \0
// 13 even though it has 12 str + 11  0x79 y
// letters. The NULL terminator str + 10  0x6C l
// should be included. str + 9  0x62 b
str + 8  0x6D m
str + 7  0x65 e
or simply str + 6  0x73 s
char str[] = “ARM Assembly”; str + 5  0x73 s
str + 4  0x41 A
str + 3  0x20 space
str + 2  0x4D M
str + 1  0x52 R
str  0x41 A
 1/22/2024

String Comparison
Strings are compared based on their ASCII values
• “j” < “jar” < “jargon” < “jargonize”
• “CAT” < “Cat” < “DOG” < “Dog” < “cat” < “dog”
• “12” < “123” < “2”< “AB” < “Ab” < “ab” < “abc”
 1/22/2024

String Length
• Strings are terminated with a null character (NULL, ASCII value 0x00)

Pointer dereference operator * Array subscript operator [ ]

int strlen (char *pStr){ int strlen (char *pStr){
int i = 0; int i = 0;

// loop until *pStr is NULL // loop until pStr[i] is NULL

while( *pStr ) { while( pStr[i] )
i++; i++;
pStr++;
} return i;
return i; }
}
 1/22/2024

Convert to Upper Case

A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A

a b c d e f g h i j k l m n o p q r s t u v w x y z
61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A

‘a’ – ‘A’ = 0x61 – 0x41 = 0x20 = 32

Pointer dereference operator * Array subscript operator [ ]

void toUpper(char *pStr){ void toUpper(char *pStr){
char *p; int i;
char c = pStr[0];
for(*p = pStr; *p; ++p){ for(i = 0; c; i++, c = pStr[i];) {
if(*p >= ’a’ && *p <= ’z’) if(c >= ’a’ && c <= ’z’)
*p -= ‘a’ – ‘A’; pStr[i] -= ‘a’ – ‘A’;
//or: *p -= 32; // or: pStr[i] -= 32;
} }
} }
 1/22/2024

Questions?