Faculty of Engineering

Electrical Engineering Department

Computer and Control
Third Year
Second Semester
General System

Digital Electronic circuit

Experience NO.6

XOR Logic gate

Prepared by:
Mutasim alkamil (202270192)
Osama maaodhah (202270222)
Fares qaid alselwi (202270243)

Supervised by:
Eng. Abdulraqeeb Alshraay

Sana’a 2024
 Contents

 Abstract ......................................................... 0
 Introduction ................................................... 0
1. XOR Background .......................................... 0
2. Output Observation: .................................... 1
5.Datasheet : ................................................... 2
 EXPERMENT TOOLS ........................................ 4
 Experiment Objectives: .................................. 4
 Experiment procedures :................................. 5
 Conclusion ..................................................... 6
 Abstract
This experiment investigated the simulation of an XOR gate using a
combination of RTL NOT, DTL ANDs, and RTL NORs gates. The
experiment aimed to evaluate the effectiveness of this approach and
analyze the circuit's behavior under various input combinations.

The obtained results demonstrated a successful implementation, with

output values matching the theoretical XOR truth table. Further analysis
revealed key observations and conclusions regarding the functionality
and potential limitations of this specific logic gate construction. The
experiment ultimately reinforced the understanding of creating complex
logic functions using simpler building blocks like NOT, AND, and NOR
gates.

Introduction

Digital circuits rely on building blocks like the XOR gate, which
performs an exclusive "OR" operation. Understanding how to implement
such functions using combinations of simpler gates is crucial for digital
logic design. This experiment delves into simulating an XOR gate using a
specific combination of NOT, AND, and NOR gates within [multisim]. We
meticulously analyze the designed circuit's behavior under various input
combinations, meticulously comparing its outputs against the established
XOR truth table to comprehensively evaluate its effectiveness and shed
light on potential limitations. The insights gained from this exploration
contribute to a deeper understanding of how complex logic functions can
be constructed from fundamental building blocks, enriching our knowledge
of digital design principles.

1. XOR Background: The XOR (Exclusive OR) gate is a

fundamental logic gate that has several interesting aspects relevant
to your experiment. One of the most intriguing aspects is its
mathematical properties. Unlike other basic gates, such as AND and
OR, XOR produces a true output only when the number of true inputs
is odd. This property makes it useful for various applications,

2
 including error detection, parity generation, and cryptographic
algorithms.

XOR gates are also fundamental building blocks in digital

circuits, playing a crucial role in the design of arithmetic units, data
processing systems, and communication protocols. The historical
development of XOR gates is also noteworthy, as they have been an
integral part of digital logic since its inception.

2. Technical Background: It is important to assess the level of

technical expertise of your target audience to determine the appropriate
level of explanation. If your audience is familiar with basic digital logic
concepts like logic gates and truth tables, you can provide a more concise
explanation and focus on the specific aspects of the XOR gate. However, if
your audience is less familiar with these concepts, it would be beneficial to
provide more foundational explanations, including an introduction to logic
gates, basic Boolean algebra, and truth tables.

2. Output Observation: During our experimentation or simulation,

it is essential to document any unique or unexpected .Documenting
these findings and analyzing them in comparison to the expected
behavior will provide valuable insights into the practical
implementation of the XOR gate using the combination of RTL NOT,
DTL AND, and RTL NOR gates see table.1.

Table 1: XOR truth table

4. General Background: When considering your audience's prior
knowledge about digital logic design, it is important to determine if they
require an introduction to basic concepts or if you can delve deeper into
specific engineering principles relevant to your chosen logic gate
implementation. If your audience has a solid understanding of digital logic
design, you can focus on the specific engineering principles related to the
RTL NOT, DTL AND, and RTL NOR gates and their role in the XOR gate
implementation. However, if your audience lacks foundational knowledge,
it would be helpful to provide an introduction to digital logic design,
including an explanation of logic gates, truth tables, and basic circuit
elements. This will ensure that your audience can follow the report and
understand the significance of your experiment.

5.Datasheet :

Quad 2-Input Exclusive-OR Gate

General Description
This device contains four independent gates each of
which performs the logic exclusive-OR function.

Ordering Code:
Order Package Package Description
Number Number
DM7486N N14A 14- Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Connection Diagram Function Table

Y=A⊕B
H = HIGH Logic Level
Inputs Output
A B Y
L L L
L H H
H L H
H H L
 EXPERMENT TOOLS

TO Construct the circuit These tools are needed:

• breadboard
• 4x diodes,
• 4x transistors
• 2x 1k ohm resistors.
• 2x 4.7k ohm resistors.
• 1x 470 ohm resistors.
• 2x switches
• 5 volt source
• 3x 10k ohm resistors
• 3x 2.2k ohm resistor
• 1x multimeter

Experiment Objectives:
 Design and simulate an XOR gate using a combination of
RTL NOT, DTL ANDs, and RTL NORs gates Analyze the
impact of input combinations on the XOR gate's output.
 Evaluate the effectiveness of chosen logic gates in
realizing the XOR function.
 Compare the simulated behavior of the XOR gate with its
theoretical truth table .
 Gain a deeper understanding of digital logic design
principles.
 Experiment procedures :

1. Component Setup: Gather necessary components mentioned in the

experiment tools.

2. Circuit connection Construct the circuit on the breadboard see

fig.1.

Figure 1: simulation diagram

3. Connect the inputs: Based on the chosen logic gate configuration for
your XOR implementation, connect the inputs of each NOT, AND, and
NOR gate to the appropriate source voltages (often 0V or reference
voltage for "LOW" and a higher voltage like 5V for "HIGH"). You might
also connect specific inputs to the outputs of other gates within your
circuit.

4. Connect the intermediate stages: If your implementation involves

cascading multiple logic gates, follow the designed structure and connect
the outputs of some gates to the inputs of others, ensuring the flow of
signals aligns with your intended functionality.
5. Connect the final output: Identify the designated output point of your
XOR gate (usually the output of the final gate in your configuration) and
connect it to the designated output terminal in your simulation
environment. This is where you will observe the final XOR function
results.

Conclusion

In conclusion, this experiment successfully simulated an XOR gate

using a combination of NOT, AND, and NOR gates. All observed outputs
aligned with the theoretical truth table, validating the effectiveness of this
implementation. While limitations exist, this experiment emphasizes the
potential of combining basic logic gates to construct more complex
functions, contributing to the understanding of digital logic design
principle.