NETUSB II User Manual
NETUSB II User Manual
NetUSB II
High-Speed JTAG Controller
User’s Manual
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Preface i
Product Warranty
For product warranty and software maintenance information, see the PRODUCT WARRANTY AND
SOFTWARE MAINTENANCE POLICY statement included with your product shipment.
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OR ANY OTHER LEGAL THEORY.
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products. For assistance, contact your nearest Corelis Sales and Service Office.
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[email protected].
For more information about other products and services that Corelis offers, please visit www.corelis.com.
Preface ii
Table of Contents
Chapter 1: Product Overview ................................................................................ 1
Introduction.................................................................................................................................................... 1
What is IEEE Standard 1149.1? .................................................................................................................. 1
Product Versions ........................................................................................................................................... 2
Features of the NetUSB II ........................................................................................................................... 2
Absolute Maximum Ratings ......................................................................................................................... 4
Recommended Operating Conditions ........................................................................................................ 4
Specifications .................................................................................................................................................. 4
Chapter 2: NetUSB II Installation & Use ............................................................7
Package Contents........................................................................................................................................... 7
Microsoft Windows Software Installation ................................................................................................. 7
Linux Software Installation .......................................................................................................................... 8
Hardware Installation .................................................................................................................................... 8
Chapter 3: Use with ScanExpress Tools............................................................. 11
Overview .......................................................................................................................................................11
Hardware Setup............................................................................................................................................11
Chapter 4: Third Party Application Interface ..................................................... 21
Using the NetUSB II with ScanExpress Runner API ............................................................................21
Using the NetUSB II with the Scan Function Library ...........................................................................25
Chapter 5: Recommended Target Connectors ................................................... 27
10-pin TAP Connector ...............................................................................................................................27
16-pin Flash Programming TAP Connector ...........................................................................................29
20-pin Flash Programming & Power Test TAP Connector..................................................................32
Direct I2C Direct Programming Connector............................................................................................35
Direct SPI Programming Connector ........................................................................................................36
Chapter 6: Self-Test Application ......................................................................... 37
Overview .......................................................................................................................................................37
Loopback Cables..........................................................................................................................................37
Running the Test .........................................................................................................................................37
Chapter 7: Firmware Update Utility ................................................................... 39
Overview .......................................................................................................................................................39
Table of Contents iv
Table of Figures
Figure 1-1. NetUSB II 4-TAP (left) and NetUSB II 8-TAP (right) JTAG Controllers. ......................................... 1
Figure 1-2. JTAG Controller Test Access Port (TAP) ................................................................................................. 1
Figure 1-3. Net USB II 4-TAP front panel (left) and rear panel (right)..................................................................... 2
Figure 2-1 Example Entry in Windows Device Manager ............................................................................................ 7
Figure 2-2. NetUSB II Network Configuration Tool ................................................................................................... 9
Figure 3-1. NetUSB II Controller Configuration ........................................................................................................ 12
Figure 3-2. NetUSB II Advanced Configuration ......................................................................................................... 15
Figure 3-3. Pinout Configuration Dialog ...................................................................................................................... 17
Figure 3-4. NetUSB II Parallel Outputs ........................................................................................................................ 18
Figure 5-1. Standard 10-pin TAP Connector (top view) ............................................................................................ 27
Figure 5-2. 10-pin TAP Connector Schematic ............................................................................................................. 28
Figure 5-3. Boundary-scan Flash Programming 16-pin TAP Connector (top view) ............................................. 29
Figure 5-4. 16-pin Flash Programming TAP Connector Schematics ....................................................................... 31
Figure 5-5. Boundary-scan Flash Programming with Power Test Points 20-pin TAP Connector (top view) .. 32
Figure 5-6. 20-pin Flash Programming with Power Test Points Connector Schematics ...................................... 34
Figure 5-7. Direct I2C Programming Connector Schematics.................................................................................... 35
Figure 5-8. SPI Direct Programming Connector Schematics .................................................................................... 36
Figure 6-1. NetUSB II Self-Test Results ....................................................................................................................... 38
Figure 7-1. NetUSB II Firmware Update Utility ......................................................................................................... 39
Figure 7-2. Firmware Update Confirmation Dialog.................................................................................................... 40
Figure 7-3. Firmware Update Success Dialog .............................................................................................................. 40
Table of Figures v
Table of Tables
Table 1-1. NetUSB II Model Descriptions ..................................................................................................................... 2
Table 1-2. Power & Status Indicator States .................................................................................................................... 3
Table 1-3. Absolute Maximum Ratings ........................................................................................................................... 4
Table 1-4. Recommended Operating Conditions .......................................................................................................... 4
Table 3-1. TAPs Voltage options ................................................................................................................................... 12
Table 3-2. Programmable TCK Frequencies ................................................................................................................ 13
Table 3-3. TAPs Configuration options ........................................................................................................................ 13
Table 3-4. SPI/I2C TAPs options ................................................................................................................................. 14
Table 3-5. TAPs Off State options ................................................................................................................................ 14
Table 3-6. Delay Compensation options....................................................................................................................... 15
Table 3-7. TCK Mode options ....................................................................................................................................... 16
Table 3-8. TAP Configuration - Threshold options ................................................................................................... 16
Table 3-9. TAP Configuration - Pinouts options ........................................................................................................ 17
Table 3-10. Standard Pinouts .......................................................................................................................................... 17
Table 3-11. NetUSB II Parallel Outputs Mapping ...................................................................................................... 18
Table 4-1. NetUSB II Controller Parameters ............................................................................................................... 21
Table 4-2. Pinout Values.................................................................................................................................................. 25
Table 5-1. 10-pin TAP Signal Description and Termination ..................................................................................... 28
Table 5-2. Standard 10-Pin TAP Connector ................................................................................................................ 28
Table 5-3. Flash Programming TAP 16-Pin Connector ............................................................................................. 29
Table 5-4. 16-pin TAP Signal Description and Termination ..................................................................................... 30
Table 5-5. Flash Programming TAP 20-pin Connector ............................................................................................. 32
Table 5-6. 20-pin TAP Signal Description and Termination ..................................................................................... 33
Table 5-7. I2C Signal Description and Recommended Termination ....................................................................... 35
Table 5-8. SPI Signal Description and Recommended Termination ....................................................................... 36
Table 6-1. Self-Test Loopback Cable Connections. .................................................................................................... 37
Table of Tables vi
Chapter 1: Product Overview
Introduction
The NetUSB II 4-TAP and 8-TAP High-Speed JTAG Controllers are members of the Corelis ScanExpress™
family of scan-based test, analysis, and diagnostic tools. The NetUSB II interfaces between a PC equipped
with a USB2.0 or Ethernet port and any IEEE Standard 1149.1 compatible target. The NetUSB II is designed
to control the operation of an IEEE Standard 1149.1 boundary-scan (JTAG) test access port (TAP) by
generating the proper signals under software control to interface with the target device. It supports scan
operations at continuous JTAG clock (TCK) speeds of up to 100 MHz.
Figure 1-1. NetUSB II 4-TAP (left) and NetUSB II 8-TAP (right) JTAG Controllers.
Product Overview 1
Product Versions
The NetUSB II is available in a 4-TAP or 8-TAP configuration, as described in Table 1-1 below. The 4-TAP
front and rear panels are pictured in Figure 1-3 below.
Table 1-1. NetUSB II Model Descriptions
Figure 1-3. Net USB II 4-TAP front panel (left) and rear panel (right).
TAP Interface
Adjustable Voltage
The software-programmable voltage level of the TAP interfaces and discrete I/O can be set to any voltage
between 1.00 V and 3.30 V in increments of 0.05 V.
Programmable Clock
The NetUSB II’s programmable TCK output to the IEEE Standard 1149.1 compatible target system can be
generated with a wide range of frequencies using the programmable clock generator.
Pin Protection
The NetUSB II features 5 V tolerant signals, board-level ESD protection, and voltage detection circuitry to
prevent the drivers from being damaged if the outputs are inadvertently shorted to power or ground.
Product Overview 2
Serial TAP Chaining
The NetUSB II TAPs can be programmed to daisy-chain sub-sets of the TAP ports into single chains.
Delay Compensation
The NetUSB II delay compensation feature allows higher clock frequencies on TCK to be used by adjusting
when data on TDO coming back from the target is sampled by the hardware in half clock increments.
Status Description
Off The NetUSB II is powered off.
Blinking green The NetUSB II is currently booting. The boot process can take up to 30
seconds.
Solid green The NetUSB II is ready for use.
Active Cooling
The NetUSB II includes an automatically controlled internal fan to control the unit temperature. Ventilation
holes on the left and right panels of the NetUSB II allow for air flow.
Note: The ventilation holes must not be obscured to allow proper airflow. Inadequate
ventilation could result in damage to the NetUSB II.
Product Overview 3
Absolute Maximum Ratings
Table 1-3. Absolute Maximum Ratings
Specifications
Host Computer System Requirements
Interface Available USB 2.0-compatible or 10/100/1000Base-T Ethernet port
Operating System Microsoft Windows 7
Microsoft Windows 8/8.1
Microsoft Windows 10
Linux (Scan Function Library only)
JTAG Interface
TCK frequency range 0.1 MHz to 100 MHz
Product Overview 4
SPI Interface
SCK frequency 0.1 MHz to 50 MHz
I2C Interface
SCL frequency 100 kHz
Power Requirements
12 V ±5% 4 A maximum
Physical Dimensions
NetUSB II 4-TAP 5.71 inches × 6.24 inches × 2.14 inches
NetUSB II 8-TAP 5.71 inches × 6.24 inches × 3.09 inches
Product Overview 5
Chapter 2: NetUSB II Installation & Use
Package Contents
The standard NetUSB II product package contains the following components:
Note: The NetUSB II requires a Linux kernel with TCP/IP and RNDIS support. The
NetUSB II was verified to be compatible with Ubuntu 14.04 LTS.
Hardware Installation
Using the NetUSB II Over USB
To install the NetUSB II on PC using a USB port:
1. Connect the NetUSB II to an available USB port on your PC using the supplied USB cable.
2. Connect the power adapter to the NetUSB II power connected labeled 12V DC and plug the power
adapter into an electrical outlet.
3. Toggle the switch labeled Power to the ON position.
The front panel Power LED will blink during the power up sequence and remain on when the NetUSB II is
ready for operation.
Note: The NetUSB II uses port 6471 when communicating over the network. If the
NetUSB II is behind a firewall, port 6471 must be opened.
Hardware Setup
You must configure the NetUSB II controller inside the ScanExpress application before the application can
use it. This chapter uses ScanExpress Runner as an example to illustrate the configuration process.
IP Address/USB
Select “USB” when using the USB interface or enter a network IP address when using the Ethernet interface.
TAPs Voltage
The “TAPs Voltage” setting configures all TAP signals and GPIO to a fixed voltage between 1.00 V and 3.30
V. For multiple TAP voltages, select “Advanced” and select the voltage for each TAP in the NetUSB II
Advanced Configuration dialog.
Table 3-1. TAPs Voltage options
Note: The clock (SCL) for I2C Direct Programming is always fixed at 100 kHz.
TAPs Configuration
The “TAPs Configuration” setting selects the TAP(s) to be used. Valid selections are described in Table 3-3
below.
Table 3-3. TAPs Configuration options
A TAP signal protection feature is enabled when the off state is set to “Tri-State.” Under these conditions,
ScanExpress Runner will test the TAP output signals (TMS, TDI, and TCK) to determine if they are shorted
to power. If ScanExpress Runner detects that any of the TAP output signals are shorted to power, it will stop
the execution of the test to prevent damage to the hardware.
Delay Compensation
The NetUSB II’s delay compensation feature allows higher clock frequencies on TCK to be used by adjusting
when data on TDO coming back from the target is sampled by the hardware in half clock increments. Valid
selections are shown in Table 3-6 below.
Table 3-6. Delay Compensation options
Note: Continuous TCK mode does guarantee that TCK will always remain active. The
NetUSB II may stop the clock under certain conditions.
Threshold Description
Automatic The input threshold will be one half of the selected Voltage setting.
0.50V to 2.00V The input threshold will be equal to the selected value.
Pinouts Description
Standard The Corelis standard pinouts will be used for JTAG and SPI/I2C TAPs. These
pinouts are shown in Table 3-10.
Custom A custom pinout will be used for JTAG and SPI/I2C TAPs. When this option is
selected, the Pinout Configuration dialog shown in Figure 3-3 will be displayed and
allow a pin to be selected for each JTAG or SPI/I2C signal.
The default pinouts for JTAG, SPI, and I2C are shown in Table 3-10 below.
Table 3-10. Standard Pinouts
For example, if the initial hex value is set to “4321” and a NetUSB II controller is being used, GPIO1 of
TAP1, GPIO3 of TAP2, GPIO3 of TAP3 and GPIO1 of TAP4 will be driven high and the remaining GPIO
signals will be driven low. The most significant digit of the hex value (“4” in this case) is ignored.
Example
To select the NetUSB II controller using:
• A USB connection
• All TAP voltages set to 3.30 V
• TCK frequency set to1 MHz
• TAP1 used for JTAG
• TAP2 used for direct SPI/I2C programming
• Tri-state the JTAG signal when test is finished
• Automatic delay compensation
• Automatic input threshold
• Default pinout
To configure the NetUSB II for these options, use this “controller specification” string:
Note: The pinout configuration value in decimal format represents the encoded pin
Numbers for the JTAG, SPI, or I2C signals. Each digit of the value in hex format
corresponds to the pin number of the signals.
Hex Digits 1st 2nd 3rd 4th 5th 6th 7th 8th
JTAG TRST TDI TDO TMS TCK IO1 IO2 IO3
SPI SCK MOSI MISO CS0 CS1 CS2 CS3 CS4
I2C SDA SCL - - - - - -
If an invalid number is used, the configuration will be set to the standard pinouts by default. Therefore, if you
want to use the standard pinout configuration, you may just use the value “0” instead of “324508639”.
Note: Corelis recommends that each signal be terminated with a resistor to improve noise
immunity.
The connector on the user’s target should have a standard flat cable compatible pin-out to match the TAP
connector described in Table 5-1. Figure 5-1 shows the top component-side view of the basic target 10-pin
connector header (0.100 × 0.100 in. spacing).
TRST* 1 2 GND
TDI 3 4 GND
TDO 5 6 GND
TMS 7 8 GND
TCK 9 10 GND
Table 5-1 describes the 10-pin TAP connector signals and the Corelis recommended values of terminating
resistors.
Note: Some target boards may require a pull-down resistor on the TRST* signal to ensure
normal device operations when not in boundary-scan test mode.
Table 5-2 summarizes the specifications for the 10-pin TAP connector. Equivalent connectors are available
from other manufacturers.
Table 5-2. Standard 10-Pin TAP Connector
Figure 5-2 shows a typical schematic of the target TAP connector with the recommended termination
resistors. The 4.7 kΩ pull-up resistors should connect to the target Vcc supply corresponding to the
boundary-scan device interface voltage (programmable on the NetUSB II controller from 1.00 V to 3.30V).
Recommended resistor values are ±5%. Good design practices specific to the UUT and the device
manufacturer recommendations take precedence over Corelis recommended values.
TAP
4.7 k
4.7 k
4.7 k
4.7 k
Connector
TRST* 1 2
To All Boundary-Scan Devices
TDI 3 4
To TDI of First Device
TDO 5 6
From TDO of Last Device 33
TMS 7 8
To all Boundary-scan Devices
TCK 9 10
To all Boundary-scan Devices
TRST* 1 2 GND
TDI 3 4 GND
TDO 5 6 GND
TMS 7 8 GND
TCK 9 10 GND
GPIO2 13 14 GND
Figure 5-3. Boundary-scan Flash Programming 16-pin TAP Connector (top view)
Corelis flash programming software supports the external signals Write_Strobe* and Ready_Busy*,
while still offering the standard—but slower—fully scanned out/in signals approach.
The Write_Strobe* signal is active low and should be pulled up with a 4.7 kΩ resistor on the target board.
It should be logically OR-ed with the flash Write-Enable (WE*) signal and both inputs to the OR should be
pulled up. This way either the target’s flash WE* signal or the controller’s external Write_Strobe* going
low will assert the flash WE* input.
The active low Ready_Busy* signal is typically an open-collector/open-drain signal that ties directly to the
same signal(s) on the flash device(s). This enables multiple devices to drive it toward the NetUSB II
controller.
Table 5-3 summarizes the specifications for a 16-pin TAP connector without latch ejector. Equivalent
connectors are available from other manufacturers.
Table 5-3. Flash Programming TAP 16-Pin Connector
Note: Some target boards may require a pull-down resistor on the TRST* signal to assure
normal device operations when not in boundary-scan test mode.
TAP
4.7 k
4.7 k
4.7 k
4.7 k
4.7 k
4.7 k
Connector
TRST* 1 2
To All Boundary-Scan Devices
TDI 3 4
To TDI of First Device
TDO 5 6
From TDO of Last Device 33
TMS 7 8
To all Boundary-scan Devices
TCK 9 10
To all Boundary-scan Devices
Write_Strobe* 11 12
To WE* Control of Flash Device(s)
13 14
Ready_Busy* 15 16
From RY/BY* Signal of Flash Device(s)
TRST* 1 2 GND
TDI 3 4 GND
TDO 5 6 GND
TMS 7 8 GND
TCK 9 10 GND
GPIO2 13 14 GND
VCC1 17 18 NC
VCC2 19 20 NC
Figure 5-5. Boundary-scan Flash Programming with Power Test Points 20-pin TAP Connector (top view)
Corelis’ Flash Programming software supports the external signals Write_Strobe* and Ready_Busy*,
while still offering the standard, but slower, fully scanned out/in signals approach.
The Write_Strobe* signal is active low and should be pulled up with a 4.7 kΩ resistor on the target board.
It should be logically OR-ed with the flash Write-Enable (WE*) signal. This way either the target’s flash WE*
signal or the controller’s external Write_Strobe* going low will assert the flash WE* input.
The active low Ready_Busy*signal is typically an open-collector/open-drain signal that ties directly to the
same signal(s) on the flash device(s). This enables multiple devices to drive it toward the NetUSB II
controller.
Table 5-5summarizes the specifications for a 20-pin TAP connector without latch ejector. Equivalent
connectors are available from other manufacturers.
Table 5-5. Flash Programming TAP 20-pin Connector
Figure 5-6 below shows a typical schematic of the target TAP connector with termination resistors. The 4.7
kΩ pull-up resistors should connect to the target Vcc supply corresponding to the boundary-scan device
interface voltage (programmable on the NetUSB II controller from 1.00 V to 3.30 V). Recommended resistor
values are ±5%. Good design practices specific to the UUT and the device manufacturer recommendations
take precedence over Corelis recommended values.
TAP
4.7 k
4.7 k
4.7 k
4.7 k
4.7 k
4.7 k
Connector
TRST* 1 2
To All Boundary-Scan Devices
TDI 3 4
To TDI of First Device
TDO 5 6
From TDO of Last Device 33
TMS 7 8
To all Boundary-scan Devices
TCK 9 10
To all Boundary-scan Devices
Write_Strobe* 11 12
To WE* Control of Flash Device(s)
13 14
Ready_Busy* 15 16
From RY/BY* Signal of Flash Device(s)
VCC1 17 18
From UUT Power Test Point
VCC2 19 20
From UUT Power Test Point
Figure 5-6. 20-pin Flash Programming with Power Test Points Connector Schematics
Vcc Vcc
I2C
1k
1k
Connector
SDA 1 2
To all I2C Devices (bidirectional)
SCL 3 4
To all I2C Devices
SPI
4.7 k
4.7 k
4.7 k
4.7 k
4.7 k
4.7 k
Connector
SCK 1 2
To all SPI Devices
MOSI 3 4
To MOSI of all SPI Devices
MISO 5 6
From MISO of all SPI Devices 33
CS0* 7 8
To CS* of first SPI Device
CS1* 9 10
To CS* of second SPI Device
CS2* 11 12
To CS* of third SPI Device
CS3* 13 14
To CS* of fourth SPI Device
CS4* 15 16
To CS* of fifth SPI Device
Loopback Cables
The self-test includes an optional loopback capability to verify proper operation of the TAP signals.
Connect 1:1 20-pin cables (Corelis P/N 15466) between the TAPs shown in Table 6-1 or disable the
loopback test steps.
Table 6-1. Self-Test Loopback Cable Connections.
Note: Disconnect any other targets as they will interfere with the self-test.
Self-Test Application 37
The program should respond with results similar to those shown in Figure 6-1.
Self-Test Application 38
Chapter 7: Firmware Update Utility
Overview
The NetUSB II includes field-upgradable firmware. A firmware update utility is included with ScanExpress
Tools and the Scan Function Library CD.
Note: The firmware should not normally need to be modified unless the ScanExpress
application or a Corelis support engineer asks you to do so.
5. Click Yes to start the update process. The utility will show a progress bar while updating the firmware.
Note: Do not power off the unit or disconnect the Ethernet/USB cable until the firmware
update process is complete.
7. Close the firmware update utility and cycle power on the NetUSB II unit.
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