Scribd
Upload
113 views6 pages

DLD 09 Arbitrary Seq Counter

This document provides instructions on implementing an arbitrary sequence counter that counts the sequence 2->3->1->4->6->0->2 repeatedly using either a D flip-flop or a J-K flip-flop. It includes creating state tables, K-maps, equations, and circuit diagrams for the counter. If the counter starts at 5 or 7, it should reset to 0. The document also provides the input equations and excitation table for a J-K flip-flop and information needed for a report on the counter implementation.

Uploaded by

rayanansary007
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
113 views6 pages

DLD 09 Arbitrary Seq Counter

This document provides instructions on implementing an arbitrary sequence counter that counts the sequence 2->3->1->4->6->0->2 repeatedly using either a D flip-flop or a J-K flip-flop. It includes creating state tables, K-maps, equations, and circuit diagrams for the counter. If the counter starts at 5 or 7, it should reset to 0. The document also provides the input equations and excitation table for a J-K flip-flop and information needed for a report on the counter implementation.

Uploaded by

rayanansary007
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 6

What to do

• Implement an arbitrary sequence Counter


using
• (1) D flip-flop – trainer board and
• (2) J-K flip-flop - logisim

• That counts the following sequence


repeatedly
• 2->3->1->4->6->0->2->so on,
• If accidentally the counter starts with
‘5’ or ‘7’, it should move to ‘0’ in the
next step
State Diagram
5-Jan-22 CSE 226: Digital Logic Design Lab 2
Q(t) Q(t+1) J K
Flip-flop input table: 0 0 0 x
0 1 1 x
using J-K 1 0 x 1
1 1 x 0
2->3->1->4->6->0->2->so on J-K Excitation Table

D2 D1 D0
Q2 Q1 Q0 Q2 Q1 Q0 J2 K2 J1 K1 J0 K0

4-Jan-22 CSE 226: Digital Logic Design Lab 3


Input Equations

J2 = Q0 . Q1
K2 = Q1 + Q0
J1 = Q0
K1 = Q2 + Q0
J0 = Q1 . Q2
K0 = Q1 + Q2

Verify that you also have the same equations.

4-Jan-22 CSE 226: Digital Logic Design Lab 4


74LS76AP: Dual J-K Flip-Flops (with Preset and Clear)

4-Jan-22 CSE 226: Digital Logic Design Lab 5


Writing Report

• ICs being used


• For the arbitrary sequence counter, provide for both
J-K and D flip-flop
o Flip-flop Input/Output (state) tables
o K-maps
o Equations
o Circuit diagrams

4-Jan-22 CSE 226: Digital Logic Design Lab 6

You might also like