EEE 2303

CIRCUIT AND NETWORK THEORY III

Bilinear transfer functions

By

Duncan Kilungu

1
 Introduction
Z1 I2 = 0
+ V1 = ( Z1 + Z 2 ) I
+
-
v1 I Z2 v2 V2 = Z 2 I
-
Fig. 1
The voltage ratio transfer function
V2 Z2
T ( s) = = R
V1 Z1 + Z 2 +
+
-
v1 C v2
-

1 Fig. 2
If Z1 = R and Z 2 = as in Fig. 2
sC 2
 1 1
T ( s) = sC = RC ......................(1)
R+ 1 s+ 1
sC RC
 A bilinear transfer function (TF) is of the form
a1 s + a2 p( s )
T ( s) = = ......................... (2)
b1 s + b2 q( s )
where a and b coefficients are real constants which
may be either positive or negative.
Equation (2) may be re-written as
a1 ( s + a2 a1 ) s + z1
T ( s) = =K ............... (3)
b1 ( s + b2 b1 ) s + p1
3
 z1 is the zero of T(s) and p1 is the pole
 In the s-plane, these quantities are located
at s = - z1 and s = - p1 .
 For a bilinear TF, the pole is always on the
negative real axis, whereas the zero may
be on either the positive or negative part
of the real axis e.g.
s −1
T ( s) =
s+5

4
 T(s) Pole location Zero location
K1 s s=∞ s=0
K2(s+z1) s=∞ s = -z1
K3 /s s=0 s=∞
K4 /(s+p1) s = -p1 s=∞
K5 s /(s+p1) s = -p1 s=0

 For the voltage divider circuit considered earlier, if the

circuit is operating in the sinusoidal steady-state, then s
= jω and equation (1) can be written as
5
 1 1
T ( j ) = .......................... (4)
RC j + 1
RC
T ( j ) = Re T ( j ) + ImT ( j )
= T ( j )  ( j )
where
T ( j ) = ( Re T ( j ) ) + ( Im T ( j ) ) .... (5)
2 2

Im T ( j )
 ( j ) = tan −1
......................... (6)
Re T ( j )
log T ( j ) = log T ( j ) + j ( j )
A( ) = 20log T ( j ) dB
6
 Example

Let 1/RC = ω0 The network

has a zero at s =
1− j ∞ and a pole at
1 0
T ( j ) = s = - ω0
( )
=
1+ j
2
0 1+ 
−
0

1 0
Re T ( j ) = and ImT ( j ) =
( ) ( )
2 2
1+  1+ 
0 0

T ( ) =
1
1 + (  0 )
2
and  ( ) = − tan −1
( )

0
7
 Classification of magnitude responses
 For the RC circuit of Fig. 2, with 1/RC = ω0
1
T ( ) =
1 + (  0 )
2

 If ω = 0, |T(0)| = 1; ω = ω0, |T(ω0)| = 1/ 2; ω → ∞,

|T(∞)| → 0
 The magnitude of the TF can be plotted on a linear
scale as shown in Fig. 3a.
 The plot is called magnitude response i.e. the
response of TF magnitude as a function of
frequency.
8
 |T| |T|
1
1 1
 0.707
2 Pass Stop

0 ω0=1/RC ω ω0 ω
Fig. 3a Fig. 3b
 The frequency ω0, is the half-power frequency
 The ideal response of the circuit is shown in Fig. 3b
known as the idealized brick wall.
 ω0 is the cut-off frequency.
 For a practical filter, the half-power frequency is
taken as the cut-off frequency
 The magnitude response shown in Fig. 3 9
characterizes a low-pass filter.
 C
+
+
-
v1 R v2
-

Fig. 4
If the position of R and C in the circuit of Fig. 2,
are interchanged as shown in Fig. 4, the TF
becomes
R s
T ( s) = =
R+ 1 s+ 1
sC RC
 The network has a zero at s = 0 and a pole at s = -
1/RC 10
 Let 1/RC = ω0 and s = jω so that
j
j 0
T ( j ) = =
0 + j 1 + j 
 0
0
T ( j ) =
1 + (  0 )
2

For ω = 0, |T(j0)| = 0;
ω = ω0, |T(jω0)| = 1/ 2;
ω → ∞, |T(j∞)| → 1
 The magnitude response for the circuit is as shown
in Fig. 5 and characterizes a high-pass filter.
11
 |T|
1 |T|
1
0.707 Stop Pass

0 ω0 = 1/RC ω ω0 ω
Fig. 5a Fig. 5b

12
• Consider the bridge circuit R1 C
+
shown in Fig. 6. v1 VA + v2 - VB
-
• The output voltage R1 R
V2 = VA - VB
Fig. 6
V1 s
But VA = and VB = V1
2 s+ 1
RC

1 s  1 −s
 V2 =  −  V1 = RC
( )
V1
 2 s + 1  2 s + 1
RC RC
13
 V2 −s
1
 T ( s ) = = 0.5 RC
V1 s+ 1
RC
➢ The network has a zero at s = 1/RC and a pole at
s = - 1/RC
➢ Let s = jω and 1/RC = ω0 |T| All-pass filter

1− j 0.5
0
T ( j ) = 0.5
1+ j
0 0 ω
= 0.5 (for all  ) Fig. 7 14
 R1
+
+
v1 C R2 v2
-
-
Fig. 8
V2 Z2 R2
T ( s) = = =
V1 Z1 + Z 2 R + 1
2
( sC1 + 1 R1 )
s+ 1
R1C s + z1
= =
s+ 1 + 1 s + p1
R1C R2C
Where z1= 1/R1C and p1= z1 +1/R2C (p1> z1 )
15
 jω
•For ω = 0, |T(j0)| = z1 /p1=
x R2/(R1+R2) and p1= z1 +1/R2C
-p1 -z1 0 σ
(p1> z1 )
Fig. 9 •As ω →∞, |T(j∞)| →1
|T| High-pass filter
1

z1 /p1
0 ω
Fig. 10 16
 R1
V2 Z2
+ T ( s) = =
C V1 Z1 + Z 2
+
v1 v2
-
R2
- R2 + 1
= sC
Fig. 11 R1 + R2 + 1
sC

T ( s) =
R2 (R2C
s+ 1 )
R1 + R2  
 s + ( R + R )C 
1
 1 2 
17
❖ The circuit has a zero at s = -1/R2C and a pole at
s = - 1/(R1+R2)C
❖ For this TF, the pole is always closer to the
origin than the zero i.e. p1< z1

jω
x
-z1 -p1 0 σ
Fig. 12

18
 T ( j ) =
R2 ( j + 1
R2C )
R1 + R2  
 j + ( R + R ) C 
1
 1 2 
j + 1
R2 R2C
T ( j ) =
R1 + R2 |T|Low-pass filter
j + 1
( R1 + R2 ) C 1

R2 R2
T ( j 0) = 1 T ( j ) → R1 + R2
R1 + R2 0 ω
Fig. 13
19
➢ The TF T(s) = K/s represents an ideal integrator
with a zero at infinity and a pole at the origin.
➢ With s = jω, |T(j ω )| = K/ ω

|T| Ideal integrator

0 K ω
Fig. 14
20
• The TF T(s) = sK represents an ideal differentiator
with a zero at the origin and a pole at infinity.
• With s = jω, |T(j ω )| = Kω

|T| Ideal differentiator

Slope = K

0 ω
Fig. 15
21
 Classification of phase responses

 If the input voltage to a circuit v1 = V1sinωt and the

output voltage v2 = V2sin(ωt+ θ), the TF is expressed
as

V2
T ( j ) = = T ( j ) 
V1 0
 Where is the phase difference between v1 and v2 with
v1 chosen as the reference
 For the bilinear TF,

s + z1
T ( s) = K
s + p1
22
 If s = jω
z1 + j
T ( j ) = K = T ( j )  ( )
p1 + j
 θ = phase of K + phase of (z1+jω) - phase of (p1+jω)
=0º (180º) for positive K (negative K) + tan-1(ω/z1) - tan-1(ω/p1)
 For positive K
θ = tan-1(ω/z1) - tan-1(ω/p1)
 Circuits that give a positive value of θ are lead
circuits and those that give a negative value are lag
circuits
23
 R
+
+
-
v1 C v2
-

1 1 Fig. 1
T ( s) = sC = RC
R+ 1 s+ 1
sC RC
1
For s = j , T ( j ) = RC
j + 1
 = − tan  RC
−1 RC
For ω = 0, θ =0º; ω = 1/RC, θ = -45º; ω → ∞, θ → -90º.
24
 ω0=1/RC ω
0 For this RC circuit, θ is
-45º negative for all ω.
Therefore, the circuit is a
-90º lag circuit.
θ
Fig. 2

C
+ R s
+ T ( s) = =
-
v1 R v2 R+ 1 s+ 1
- sC RC
Fig. 3
25
 j
For s = j , T ( j ) =
1 + j
RC
 = 90 − tan  RC
−1

For ω = 0, θ =90º; ω = 1/RC, θ = 45º; ω → ∞, θ → 0º.

θ
90º
θ is positive for all ω.
45º Therefore, the circuit is a
lead circuit.
0 ω0=1/RC ω 26
Fig. 4
 C
1 −s
R1 T ( s) = RC
( )
+ + v2 - VB
-
v1 VA 2 s+ 1
R1 R RC

Fig. 5
1 − j
T ( j ) = RC
(
2 1
RC
+ j )
 = z −  p

 = tan − (  RC ) − tan (  RC ) = −2tan (  RC )

−1 −1 −1

27
 For ω = 0, θ = 0º;
ω = 1/RC, θ = -90º;
ω → ∞, θ → -180º.

ω0=1/RC ω
0
θ is negative for all ω.
-90º Therefore, the circuit is a
-180º lag circuit.
θ
Fig. 6
28
 R1 s+ 1
R1C s + z1
T ( s) = =
+ s+ 1 + 1 s + p1
+ v2 R1C R2C
v1 C R2
- - 1 + j
R1C
T ( j ) =
( )
Fig. 7
1 + 1 + j
 = z −  p R1C RC
2

   z1 + j
 = tan (  R1C ) − tan 
−1 −1 R R C T ( j ) =
p1 + j
1 2

 ( R1 + R2 ) 
  −1   
 = tan   − tan  
−1

 z1   p1  29
 θº
90
θz
45º (p1 > z1)

0 ω
z1 p1
-45º
-90º -θp

Fig. 8

θ is positive for all ω. Therefore, the circuit is a lead circuit.

30
 R1
T ( s) =
R2 ( s+ 1
R2C )
+ R1 + R2  
 s + 1 
+
v1
C
 ( R1 + R2 ) C 

( )
- v2
R2 1 + j
R2 R2C
T ( j ) =
-
Fig. 9 R1 + R2  1 
 ( R + R ) C + j 
 1 2 

 = z −  p
= tan −1 (  R2C ) − tan −1  C ( R1 + R2 )
31
 θº
90
θz
45º

0 ω (p1 < z1)

p1 z1
-45º θ is negative for all
-θp ω. Therefore, the
-90º circuit is a lag circuit.
Fig. 10

• Integrator T(s) = K/s  θ = -90º  lag circuit

• Differentiator T(s) = Ks  θ = 90º  lead circuit
32