Previous University questions & Answers

Module-1
December 2017
1. Explain the architecture of 8085 microprocessor with neat block diagram (10)

Answer:

Microprocessor is a programmable integrated device that has computing and decision making
capability. 8085 is 8-bit microprocessor. It mainly contains ALU, timing and control unit and
registers.It has 8 bit data bus and 16 bit address bus.

Registers: Used to store date temporarily during the execution of program

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General purpose registers: The 8085 has six general purpose registers to store 8-bit data.
They are denoted as B, C, D, E, H and L. They can be combined as register pair – BC, DE, HL
– to perform 16-bit operations.

Special purpose register:

1.Accumulator (A): The accumulator is an 8-bit register used to store 8-bit data and to perform
arithmetic and logical instructions. Accumulator is also used for input/output operations.

2.Flags:

There are five flip-flops which can be set or rest after an operation according to data conditions
of the result in accumulator and other registers. They are sign, zero, auxiliary carry, parity and
carry.

3.Instruction register: It us used to fetched instructions.

4. Program Counter: It is used to store16 bit address of next instruction to be fetched

5. Stack pointer: 16-bit register used to store address of most recent stack entry.

Temporary registers: Programmer cannot access these registers. They are

a) W & Z registers: Used to store data temporarily.

b) Temporary data register: Internally used for most arithmetic & logical instructions.

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Incrementer /decrementer address latch: 16- bit register used to increment or decrement the
content of program counter or stack pointer

Address buffer: 8-bit unidirectional buffer used to drive higher order address bus (A15-A8)

Address/data buffer: 8-bit bidirectional buffer used to drive lower order address bus (A7-A0)
& address bus (D7-D0)

Interrupt control: It has five interrupt inputs RST 7.5, RST 6.5, RST 5.5, INTR , TRAP and
one interrupt acknowledge signal INTA.

Serial input/output control: In serial data communication one bit is transferred at a time over
a single line. There are two pins to receive and transmit data. They are SOD and SID. Serial
Output Data (SOD) line is used to send data serially. Serial Input Data (SID) line is used to
receive data serially.

Timing and control unit: This unit is responsible for all operations in 8085. The functions are:

a. Controls fetching & decoding of instructions.

b. Generate appropriate signals for instruction execution.
c. Generate signals required to interface external device to the processor.

The control signals are:

1. Status signals: S0, S1, IO/M

2. DMA signals: HOLD, HLDA
3. Reset signals: RESET IN, RESET OUT
4. Control signal: RD, WR, ALE
5. Clock: CLOCK OUT
2. Explain different addressing modes of 8085 with example. (6)
Answer: The different ways that a microprocessor can access data are referred to as
addressing modes. 8085 has 5 addressing modes
1. Immediate addressing mode: 8 or16 bit data specified as a part of instruction. I indicate
immediate addressing mode.
Examples:
MVI A, 34H
LXI D, 10FFH
ADI 45H

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2. Register addressing mode: Specifies source operand, destination operand or both in 8085
registers.
Example: MOV A, B
ADD C
3. Direct addressing mode: 16 -bit address of the operand within the instruction itself.
Examples: LDA 3000H
IN 07H
4. Indirect addressing mode: The memory address where the operand located is specified by
the content of register pair.
Examples: LDAX B
MOV M, A
5. Implied addressing mode: Opcode specifies the address of operand
Examples: CMA
RAL

December 2018

3. Explain the following pins in microprocessor

i)HOLD ii) ready iiii) TRAP iv) ALE (5)

Answer:

ALE: Address Latch Enable. It goes high when operation is started by the processor. ALE is
high, when address passed through address/data bus.

READY: Used by microprocessor to sense whether peripherals are ready or not for data
transfer. It is used to synchronize slower external device to microprocessor. If it is low, then
microprocessor waits until becomes high.

HOLD: It indicates that another device is requesting for the use of address bus, data bus &
control bus. When microprocessor receives hold signal it completes current machine cycle &
stops executing next instruction

TRAP: TRAP is a non-maskable interrupt. Whenever this pin gets activated, the 8085 always
get interrupted. The input of TRAP is level sensitive and edge sensitive. It is highest priority
interrupt.

4. Write an ALP in 8085 to find the smallest number in an array (5)

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(Write the program of ascending order of an array)

REPEAT MVI D, FFH

LXI H, 3040H

MOV B, M

DCR B

INX H

BACK MOV A, M

INX H

CMP M

JC NEXT BYTE

MOV C, M

MOV M, A

DCX H

MOV M, A

INX H

DCR D

NEXT BYTE DCR B

JNZ BACK

MOV A,D

CPI FFH

JNZ REPEAT

5. Explain with neat block diagram architecture of intel 8085 microprocessor. (10)
Answer: Repeated question

December 2019

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 6. Explain the operation of following instructions (5)

i)MVI C,05H ii)INR H iii)MOV A,B iv)CMA

MVI C, 05H: Load 8-bit data 05 to C register. It is an immediate addressing mode.

INR H: Increment the content of H register by one.

MOV A,B: Move the content of B register to A register

CMA: Complement the content of A register.

7. Explain the function of following pins in 8085

i) ALE ii) TRAP (4 marks) - Repeated question

8. Write an ALP in 8085 to find largest number in an array (6)

Answer: Write the program of descending order of an array. Change the instruction JC by
JNC in the program of ascending order.

REPEAT MVI D, FFH

LXI H, 3040H

MOV B, M

DCR B

INX H

BACK MOV A, M

INX H

CMP M

JNC NEXT BYTE

MOV C, M

MOV M, A

DCX H

MOV M, A

INX H

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 DCR D

NEXT BYTE DCR B

JNZ BACK

MOV A, D

CPI FFH

JNZ REPEAT

MAY 2019

9.The content of accumulator and B register are 2AH and ABH respectively. Find the
content of A register and flag after the execution of instruction ADD B. (5)

Answer:

10.Explain the operation of following instruction in 8085: (5)

i)MOV A, M ii) XCHG

Answer:

MOV A, M - Copy the data byte into register from the memory specified by the address in HL
register pair

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XCHG – Exchange the content of HL register pair with DE register pair. The content of H &
D registers and L & E registers are swapped respectively.

April 2018

12. With examples explain the addressing modes of 8085. (5)-Repeated question

13. With a neat block diagram explain the internal architecture of 8085 microprocessor. (10)

Repeated question

14. Write a program to sort an array of 10 numbers in ascending order. (6) – Repeated question

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