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Store Program Control Concept

The document discusses the stored program concept in computing, including its introduction by John von Neumann in the 1940s. This concept involves storing programs in memory to allow computers to perform tasks sequentially or intermittently. The document then describes three classifications of the stored program concept: the von Neumann model, general purpose systems, and parallel processing. It provides details on the von Neumann model, including its components like the CPU, registers, buses, and memory unit.

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0% found this document useful (0 votes)
461 views

Store Program Control Concept

The document discusses the stored program concept in computing, including its introduction by John von Neumann in the 1940s. This concept involves storing programs in memory to allow computers to perform tasks sequentially or intermittently. The document then describes three classifications of the stored program concept: the von Neumann model, general purpose systems, and parallel processing. It provides details on the von Neumann model, including its components like the CPU, registers, buses, and memory unit.

Uploaded by

SARFRAZ
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Store Program Control Concept

The term Stored Program Control Concept refers to the storage of instructions in computer
memory to enable it to perform a variety of tasks in sequence or intermittently.
The idea was introduced in the late 1040s by John von Neumann who proposed that a program
be electronically stored in the binary-number format in a memory device so that instructions
could be modified by the computer as determined by intermediate computational results.
ENIAC (Electronic Numerical Integrator and Computer) was the first computing system
designed in the early 1940s. It was based on Stored Program Concept in which machine use
memory for processing data.
Stored Program Concept can be further classified in three basic ways:
1. Von-Neumann Model
2. General Purpose System
3. Parallel Processing

Von-Neumann Model
Von-Neumann proposed his computer architecture design in 1945 which was later known as
Von-Neumann Architecture. It consisted of a Control Unit, Arithmetic, and Logical Memory
Unit (ALU), Registers and Inputs/Outputs. Von Neumann architecture is based on the stored-
program computer concept, where instruction data and program data are stored in the same
memory. This design is still used in most computers produced today.
A Von Neumann-based computer:
o Uses a single processor
o Uses one memory for both instructions and data.
o Executes programs following the fetch-decode-execute cycle
Components of Von-Neumann Model:
o Central Processing Unit
o Buses
o Memory Unit
Central Processing Unit
The part of the Computer that performs the bulk of data processing operations is called the
Central Processing Unit and is referred to as the CPU.
The Central Processing Unit can also be defined as an electric circuit responsible for executing
the instructions of a computer program. The CPU performs a variety of functions dictated by the
type of instructions that are incorporated in the computer. The major components of CPU are
Arithmetic and Logic Unit (ALU), Control Unit (CU) and a variety of registers.
Arithmetic and Logic Unit (ALU)
The Arithmetic and Logic Unit (ALU) performs the required micro-operations for executing the
instructions. In simple words, ALU allows arithmetic (add, subtract, etc.) and logic (AND, OR,
NOT, etc.) operations to be carried out.
Control Unit
The Control Unit of a computer system controls the operations of components like ALU,
memory and input/output devices.
The Control Unit consists of a program counter that contains the address of the instructions to be
fetched and an instruction register into which instructions are fetched from memory for
execution.
Registers
Registers refer to high-speed storage areas in the CPU. The data processed by the CPU are
fetched from the registers.
Following is the list of registers that plays a crucial role in data processing.

Registers Description
MAR (Memory Address Register) This register holds the memory location of the data that needs to be accessed.

MDR (Memory Data Register) This register holds the data that is being transferred to or from memory.

AC (Accumulator) This register holds the intermediate arithmetic and logic results.

PC (Program Counter) This register contains the address of the next instruction to be executed.

CIR (Current Instruction Register) This register contains the current instruction during processing.

Buses
Buses are the means by which information is shared between the registers in a multiple-register
configuration system.
A bus structure consists of a set of common lines, one for each bit of a register, through which
binary information is transferred one at a time. Control signals determine which register is
selected by the bus during each particular register transfer.
Von-Neumann Architecture comprised of three major bus systems for data transfer.

Bus Description

Address Bus Address Bus carries the address of data (but not the data) between the processor and the memory.

Data Bus Data Bus carries data between the processor, the memory unit and the input/output devices.

Control Bus Control Bus carries signals/commands from the CPU.

Memory Unit
A memory unit is a collection of storage cells together with associated circuits needed to transfer
information in and out of the storage. The memory stores binary information in groups of bits
called words. The internal structure of a memory unit is specified by the number of words it
contains and the number of bits in each word.
Two major types of memories are used in computer systems:
1. RAM (Random Access Memory)
2. ROM (Read-Only Memory)

General Purpose System


The General Purpose Computer System is the modified version of the Von-Neumann
Architecture. In simple words, we can say that a general purpose computer system is a modern
day architectural representation of Computer System.

The CPU (Central Processing Unit) consists of the ALU (Arithmetic and Logic Unit), Control
Unit and various processor registers.
The CPU, Memory Unit and I/O subsystems are interconnected by the system bus which
includes data, address, and control-status lines.

The following image shows how CPU, Memory Unit and I/O subsystems are connected through
common single bus architecture.

However, practical systems may differ from the single bus architecture in the sense that it may
be configured around multiple buses. Multiple Bus Architecture favors high throughput as
compared to Single Bus Architecture.

Parallel Processing
Parallel processing can be described as a class of techniques which enables the system to achieve
simultaneous data-processing tasks to increase the computational speed of a computer system.

A parallel processing system can carry out simultaneous data-processing to achieve faster
execution time. For instance, while an instruction is being processed in the ALU component of
the CPU, the next instruction can be read from memory. The primary purpose of parallel
processing is to enhance the computer processing capability and increase its throughput, i.e. the
amount of processing that can be accomplished during a given interval of time.

A parallel processing system can be achieved by having a multiplicity of functional units that
perform identical or different operations simultaneously. The data can be distributed among
various multiple functional units.

The following diagram shows one possible way of separating the execution unit into eight
functional units operating in parallel. The operation performed in each functional unit is
indicated in each block if the diagram:
o The adder and integer multiplier performs the arithmetic operation with integer numbers.
o The floating-point operations are separated into three circuits operating in parallel.
o The logic, shift, and increment operations can be performed concurrently on different
data. All units are independent of each other, so one number can be shifted while another
number is being incremented.

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