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CSC520 Syllabus

This document provides information about a graduate computer architecture course, including required textbooks, course objectives, topics, assessments, and policies. The course aims to help students understand modern computer architecture design through topics like instruction set design, pipelining, parallelism, and memory hierarchies. Assessments include homework, a design project, midterm, and final exams. Course policies address attendance, plagiarism, exams, assignments, and schedules.

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Le Song Lam
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9 views

CSC520 Syllabus

This document provides information about a graduate computer architecture course, including required textbooks, course objectives, topics, assessments, and policies. The course aims to help students understand modern computer architecture design through topics like instruction set design, pipelining, parallelism, and memory hierarchies. Assessments include homework, a design project, midterm, and final exams. Course policies address attendance, plagiarism, exams, assignments, and schedules.

Uploaded by

Le Song Lam
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Required Text

Computer Architecture, A Quantitative Approach. John L. Hennessy and David A.


Patterson, 6th Edition (2019), Morgan Kaufman.

Course Description
Instruction set design, pipelining, instruction-level parallelism, memory hierarchy
design, and multiprocessors.

Course Objectives
The objective of this course is for the student to build upon the fundamental princi-
ples of a von Neumann computer architecture to understand how modern architec-

Computer
tures are designed. A key theme of the course is the exploitation of instruction-level
parallelism to increase performance. An emphasis is placed upon the use of quan-

Architecture
titative metrics to evaluate cost/performance tradeoffs.
The following topics will be covered:
CSC 520 • memory hierarchy design
Section 101 • pipelining
• instruction-level parallelism
Spring 2024 • thread-level parallelism

Assessment
Instructor Info Homework/Quizzes 10%
g Dr. George Clark Project 30%
Midterm Exam 30%
U Office Hours:
Mon. and Wed. Final Exam 30%
9:00a - 12:00p A normal grading scale will be used:
Other hours available by
appointment. A ≥ 90.0 > B ≥ 80.0 > C ≥ 70.0 > D ≥ 60.0 > F
Office: Shelby Hall 1121
T 251-460-7639 Assignments
@ [email protected] Assignments will include homework problems from the book and may include read-
ings from current applicable research.

Course Info Exams


All exams are in-class and may contain questions of an objective nature, short prob-
 Prerequisite(s): CS Grad or lems, short-answer questions, or other types of questions. The exam questions will
instructor approval generally be derived from or cover materials presented in the lectures and/or in the
Mon & Wed textbook, and in most cases, exams will be closed-book and closed-notes.

U 4:30p-5:45p
Project
Shelby Hall 2316
There is a two-part design trade-off project. Phase 1 introduces you to the simulator
² Lecture - Web Enhanced software we will be using. Phase 2 is a trade-off study on performance vs. hardware
design options. A complete final written report is required.
Important Dates
Jan 8 Classes Begin
Jan 15 Martin Luther King Day / No Classes
Feb 13 Mardi Gras Day / No Classes
Mar 4-10 Spring Break / No Classes
Apr 5 Last day to drop or withdraw by 11:59 pm
Apr 26 Last Day of Classes
Apr 29 - May 2 Final Examinations

Final Exam
May 1, 3:30p - 5:30p

Course Policies
Attendance
See ‘Attendance and Absences’, Undergraduate and Graduate Bulletin for University policy. http://www.southalabama.edu/
bulletin/current/academic-policy/

Plagiarism and Cheating Penalties


Students are required to complete their own coursework. Unless otherwise instructed in an assignment, students are not
allowed to use materials found online, materials from another student, or generative AI tools (such as ChatGPT, Google Bard,
etc.) to complete an assignment. This includes all graded assignments, e.g., exams, quizzes, homework, projects, papers,
and coding. Students charged with plagiarism on graded assignments will receive a grade of zero for the plagiarized
assignment and a University Academic Misconduct Penalty Record (AMPR) will be submitted for the charge.

Makeup Policy
All exams must be taken on the scheduled date on campus or by a proctor. In the event that an absence from a scheduled exam
is unavoidable, you must notify the instructor in advance or within 24 hours if the absence was unforeseeable. No make-ups
will be given unless documented proof is provided that the absence was absolutely necessary, and is a University-approved
absence. All make-ups will be given at the instructor’s discretion. Make-ups, when given, will be a modified version of the
original and will be scheduled at the instructor’s convenience and must be taken as soon as possible. If for any reason a
proctor is used, the instructor retains the right to approve said proctor or facility and the student will bear responsibility for
any additional charges associated with exam proctoring.

Late Assignment Policy


Late assignments are not accepted. A grade of zero will be assigned for all late assignments. Each assignment is due by
the date/time listed in the assignment posting. In-class assignments must be turned in by the end of class or when otherwise
instructed. It is the student’s responsibility to be sure that the assignments submitted are in the correct file and that there
are no technical issues with the file.

Additional Policies
Additional Academic Course Policies are available at this link: Additional Policies

These policies include:


• Academic Disruption Policy and Class Demeanor
• Changes in Course Requirements
• Student Academic Conduct Policy
• Students with Disabilities
• USAOnline
• Operational Disruptions
Tentative Course Schedule
This course schedule is subject to change. Students will be notified in advance of any change to this schedule and will be
provided with an updated schedule.
Topic Reading Week
Computer Design Fundamentals Chapter 1 1, 2
Memory Hierarchy Appendix B 3
Memory Hierarchy and Design Chapter 2 4, 5
Pipelining Appendix C 6, 7
Midterm Exam 8
Spring Break 9
Instruction-Level Parallelism Chapter 3 10-13
Thread-Level parallelism Chapter 5 14, 15, 16
Instruction Set Principles Appendix A time permitting
Data-Level Parallelism Chapter 4 time permitting

Updated: January 5, 2024

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