8051 Microcontroller Architecture, Intro to Assembly Programming

EE4380 Fall 2002 Class 2

Pari vallal Kannan

Class 2: Objective
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8051 internal architecture Register Set Instruction Set Memory Map Intro to Stack, SFRs Assembly language programming

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8051 Architecture
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Programmers View

Register Set Instruction Set Memory map Pinout Timing characteristics Current / Voltage requirements

Hardware Designers View

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Programmers View Register Set

Registers

A, B, R0 to R7 : 8 bit registers DPTR : [DPH:DPL] 16 bit register PC : Program Counter (Instruction Ptr) 16bits 4 sets of register bank R0-R7 Stack pointer SP PSW : Program Status Word (a.k.a Flags) SFR : Special Function Registers
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Control the on-board peripherals

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Assembly Absolute Basics

Intel Assembly format

; comment

Values are to be preceded by a # sign

Hex values are to be followed by H

If the first figure in a hex quantity is a letter (AF) then a 0 must precede it

#0FFH, #0C1H, #0D2H

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Register Set Accumulator A, ACC

Commonly used for moving data around, logic and arithmetic operations on 8bit data Examples
mov A, R0 push ACC mov A, #10 mov B, A mov A, 10 mov A, 0xFF mov A, 0FFH ;copy contents of R0 to A ;store A onto stack ;A 10 ;B A ;A mem(10) ;A 0xFF ;same as above

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Register Set B Register

Commonly used as a temporary register, much like a 9th R register Used by two opcodes

mul AB, div AB

B register holds the second operand and will hold part of the result

Upper 8bits of the multiplication result Remainder in case of division

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Register Set R0 to R7
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Set of 8 registers R0, R1, R7, each 8 bit wide Widely used as temporary registers Available in 4 banks (effectively 4x8 registers) Bank is chosen by setting RS1:RS0 bits in PSW Default bank (at power up) is the bank0 Examples
mov R0, A mov A, R0 mov R1, #45 ;R0 A ;A R0 ;R1 45

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Registers - DPTR
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16 bit register, called Data Pointer Used by commands that access external memory Also used for storing 16bit values
mov DPTR, #data16 movx A, @DPTR ; setup DPTR with 16bit ext address ; copy mem[DPTR] to A

DPTR is useful for string operations, look up table (LUT) operations

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Registers - PC
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PC is the program counter Referred to as the Instruction Pointer (IP) in other microprocessors PC points to the next program instruction always After fetching an instruction (1 or multi byte), PC is automatically incremented to point to the next instruction

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Registers - SP
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SP is the stack pointer SP points to the last used location of the stack

push will first increment SP and then copy data pop will first copy data and then decrement SP

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In 8051, stack grows upwards (from low mem to high mem) and can be in the internal RAM only On power-up, SP is at 07H Register banks 2,3,4 (08H to 1FH) is the default stack area Stack can be relocated by setting SP to the upper memory area in 30H to 7FH

mov SP, #32H

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Registers - PSW
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Program Status Word is a bit addressable 8bit register that has all the flags CY - Carry Flag

Set whenever there is a carry in an arithmetic operation Carry from D3 to D4. Used for BCD operation P=1 if A has odd number of 1s Even parity Set if any arithmetic operation causes an overflow

AC - Aux. Carry Flag

P - Parity Flag

OV - Overflow Flag

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Flags - Illustration
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Addition example

mov A, #38 add A, #2F

38 + 2F --------67 --------CY = 0 AC = 1 P =1

0011 1000 0010 1111 --------------0110 0111 ---------------

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Registers - SFRs
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Control the operation of on-board peripherals Special Function Registers at direct addresses 80H to FFH 8051 Clones may have additional SFRs All registers have an address
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8051 Memory map

Separate Code and Data memory Code Memory

Upto 64K long (some maybe onboard) (0x0000 to 0xFFFF) PSEN is the controlling signal Can store Program only (Read only) Upto 64K long (0x0000 to 0xFFFF) RD/WR are the controlling signals Can store data only (Read and Write) 128 bytes 0x00 to 0x7F (includes register banks) SFRs 0x80 to 0xFF (not all available)

Data Memory

Internal RAM

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8051 - Memory Map

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Internal ROM is vendor dependant On power-up PC starts at 0000H in ROM space Clones may have internal memory that may be used as both Code+Data
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8051 Instruction Set

Data Transfer

Move/Copy data from one location to another mov, movc, movx, push, pop, xch, xchd Perform logic operations on data anl, orl, xrl, clr, cpl, rl, rlc, rr, rrc, swap Perform arithmetic operations on data add, addc, subb, inc, dec, mul, div Control the program flow (jumps, subroutine calls) jmp, ajmp, ljmp, sjmp, jc, jnc, jb, jnb, jbc, jz, jnz, acall, lcall, cjne, djnz, ret, reti
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Logical

Arithmetic

Program control

NOP
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8051 Instruction Set (contd.)

Read through the instruction set

Dont have to remember all the instructions Dont have to remember all possible cases

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Remember the types of instructions When writing code

Write down the operation needed in simple English Lookup the instruction set to see which (combo) of instructions will do the job

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Assembly Opcode
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Every assembly instruction translates to a unique binary Opcode

Can be 1, 2 or 3 bytes long 8051 Family Programmers Guide has a list 2 bytes, 1 cycles 0111 0100 data8 mov A, 0xAA 0111 0100 1010 10101 74 AA a10 a9 a8 1 0001 a7 a6 a5 a4 a3 a2 a1 a0 acall 0x557 101 1 0001 0101 0111 B1 57

Example1: mov A, #data

Example2: acall address11

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Assembler Directives
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Assembly statement structure

Assembler directives Instruct assembler to do a special task

ORG xxxxH EQU

: origin, start assembling at xxxxH : define a constant : define byte, defines allocation of storage

count EQU 25 DATA1: DATA2: DB DB 28 hello world

DB
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END

: end of assembly file

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Assembly Design Flow

Create the assembly source file test.asm Assemble the asm file
C:\> as51 test.asm Assembler produces error and code list in test.lst If no errors, assembler produces .obj file

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Link the .obj files to produce an .abs file Create hex file from the .abs file Most assemblers directly produce the .hex file Download the .hex file onto the board or burn it into an EPROM.

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Assembly Example #1
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Target 8051 dev system

Program to fill up the first 4 registers in the register bank with some numbers and find their sum

Std 8051 device 2K on-chip ROM running a monitor program 32K external RAM at address 0x0000 to 0x7FFF This RAM is both code and data First 0x30 locations in external RAM is dedicated for the Interrupt Vector Table (IVT)

Start:

clearA: Addup:

Done:

ORG 0x30 ;skip the IVT area mov R0, #10 mov R1, #0A5H mov R2, #1 mov R3, #0x20 mov A, #0 ;now A = 0 add A, R0 ;now A = A + R0 add A, R1 add A, R2 add A, R3 mov R4, A ;store sum in R4 mov DPTR, #7FFF movx @DPTR, A ;store in ext. mem sjmp done ;loop here forever END

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Class 2 Review
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What are the different views/models of a uP ? What are the registers available in the 8051 ? What are the functions of the 8051 registers ? What is stack, PC, SFR, PSW/Flags ? What is an instruction set ? What is a memory map ? Why is it needed ? What is an assembly language program ? How does it look ?

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