R22 M.Tech.

Embedded Systems JNTUH

UNIT -V
Floating Point Operations About Floating Point Data,Cortex-M4 Floating Point Unit (FPU)- overview,
FP registers overview, CPACR register, Floating point register bank, FPSCR, FPU->FPCCR, FPU-
> FPCAR, FPU->FPDSCR, FPU->MVFR0, FPU->MVFR1. ARM Cortex-M4 and DSP
Applications: DSP on a microcontroller, Dot Product example, writing optimized DSP code for the
CortexM4-Biquad filter, Fast Fourier transform, FIR filter.

TEXT BOOKS:
1. Andrew N. SLOSS, Dominic SYMES, Chris WRIGHT- ARM System Developer’s Guide
Designing and Optimizing System Software, Elsevier Publications, 2004.
2. Joseph Yiu, The Definitive Guide to ARM Cortex-M3 and Cortex-M4 Processors by Elsevier
Publications, 3rd Ed.,

REFERENCE BOOKS:
1. Steve Furber - Arm System on Chip Architectures –Edison Wesley, 2000.
2. David Seal - ARM Architecture Reference Manual, Edison Wesley, 2000.
R22 M.Tech. Embedded Systems JNTUH

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

M.TECH.- I YEAR- II SEMESTER
EMBEDDED SYSTEMS
DIGITAL CONTROL SYSTEMS (PC -IV)

Prerequisite: Control Systems

Course Objectives:
1. To understand the fundamentals of digital control systems representations, z-transforms
2. To understand analysis of discrete complex domain: Z-Transforms
3. To understand the concepts of state variables analysis for discrete LTIV systems.
4. To understand the concepts of controllability and observability of discrete time systems
5. To get exposed the design aspects of controllers and for discrete time systems
6. To understand the concepts of the stability for discrete LTIV systems
7. To understand the design aspects of observers for discrete time systems.

Course Outcomes: At the end of this course, students will demonstrate the ability to
1. Obtain discrete representation of LTI systems.
2. Find the state space analysis of discrete time systems.
3. Test and analyze the controllability and observability for discrete time systems
4. Analyze stability of discrete time systems using various methods
5. Design and analyze digital controllers.
6. Design state feedback controllers and observers.

UNIT- I: REPRESENTATION OF DISCRETE TIME SYSTEMS

Basics of Digital Control Systems. Discrete representation of continuous systems. Sample and hold
circuit. Mathematical Modeling of sample and hold circuit. Effects of Sampling and Quantization. Choice
of sampling frequency. ZOH equivalent.
Z-Transforms, Mapping from s-plane to z plane, Properties of Z-Transforms and Inverse Z Transforms.
Pulse Transfer function: Pulse transfer function of closed loop systems. Solution of Discrete time
systems. Time response of discrete time system, Steady State errors.

UNIT- II: DISCRETE TIME STATE SPACE ANALYSIS

State space representation of discrete time systems, Conversion of pulse transfer function to state
space models and vice-versa, Solving discrete time state space equations, State Transition Matrix,
Pulse Transfer Function Matrix. Discretization of continuous time state space equations. Concept of
Controllability, stabilizability, observability, reachability – Controllability and observability tests. Effect of
pole zero cancellation on the controllability & observability.

UNIT- III: STABILITY ANALYSIS OF DISCRETE TIME SYSTEM

Concept of stability in z-domain, Stability analysis discrete time system: by Jury test, using bilinear
transformation. Stability Analysis of discrete time systems using Lyapunov methods.

UNIT- IV: DESIGN OF DIGITAL CONTROL SYSTEM BY CONVENTIONAL METHODS

Design and realization of digital PID Controller, Design of discrete time controllers with bilinear
transformation, Design of digital control system with dead beat response, Practical issues with dead
beat response design.

UNIT-V: DESIGN STATE FEEDBACK CONTROLLERS AND OBSERVERS

Design of discrete state feedback controllers through pole placement, Design of Discrete Observer for
LTI System: Design of full order and reduced observers, Design of observer-based controllers.
R22 M.Tech. Embedded Systems JNTUH

TEXT BOOKS:
1. K. Ogata, “Digital Control Engineering”, Prentice Hall, Englewood Cliffs, 1995.
2. M. Gopal, “Digital Control Engineering”, Wiley Eastern, 1988.
3. V, I, George and C. P. Kurian, Digital Control Systems, CENGAGE Learning, 2012

REFERENCE BOOKS:
1. G. F. Franklin, J. D. Powell and M. L. Workman, “Digital Control of Dynamic Systems”,
Addison-Wesley, 1998.
2. B.C. Kuo, “Digital Control System”, Holt, Rinehart and Winston, 1980.
R22 M.Tech. Embedded Systems JNTUH

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

M.TECH.- I YEAR- II SEMESTER
EMBEDDED SYSTEMS
IOT ARCHITECTURES AND SYSTEM DESIGN (PE– III)

Course Objectives
1. To Know the definition and basic concepts of IoT
2. Learn the interfacing the IoT and M2M
3. To understand the Architecture of IoT

Course Outcomes: Students will be able to:

1. Integrate the sensors and actuator depending on the applications
2. Interface the IoT and M2M with value chains
3. Write Python programming for Arduino, Raspberry Pi devices
4. Design IoT based systems such as Agricultural IoT, Vehicular IoT etc.,

UNIT - I
IoT introduction: Introduction and definition of IoT, Evolution of IoT, IoT growth, Application areas of
IoT, Characteristics of IoT, IoT stack, Enabling technologies, IoT levels, IoT sensing and actuation,
Sensing types, Actuator types.

UNIT - II
IoT and M2M: M2M to IoT – A Basic Perspective– Introduction, Differences and similarities between
M2M and IoT, SDN and NFV for IoT.M2M Value Chains, IoT Value Chains, An emerging industrial
structure for IoT, The international driven global value chain and global information monopolies.

UNIT - III
IoT Hands-on: Introduction to Arduino Programming, Integration of Sensors and Actuators with
Arduino. Introduction to Python programming, Introduction to Raspberry Pi, Interfacing Raspberry Pi
with basic peripherals, Implementation of IoT with Raspberry Pi.

UNIT - IV
IoT Architecture: IoT Architecture components, Comparing IoT architectures, A simplified IoT
architecture, The core IoT functional stack, IoT data management and compute stack

UNIT - V
IoT System design: Challenges associated with IoT, Emerging pillors of IoT, Agricultural IoT, Vehicular
IoT, Healthcare IoT, Smart cities, Transportation and logistics.

TEXT BOOKS:
1. Sudip Misra, Anandarup Mukherjee, Arijit Roy “Introduction to IOT”, Cambridge University
Press.
2. David Hanes, Gonzalo salgueiro, Patrick Grossetete, Rob barton, Jerome henry “IoT
Fundamentals Networking technologies, protocols, and use cases for IoT”, Cisco Press

REFERENCE BOOKS:
1. Cuno pfister, “Getting started with the internet of things”, O Reilly Media, 2011
2. Francis daCosta, “Rethinking the Internet of Things: A Scalable Approach to Connecting
Everything”, 1 st Edition, Apress Publications.
3. “Internet of Things concepts and applications”, Wiley
4. Arshdeep Bahga,Vijay Madisetti “Internet of Things A Hands on approach”, Universities Press
R22 M.Tech. Embedded Systems JNTUH

5. Shriram K Vasudevan, RMD Sundaram, Abhishek S Nagarajan, “Internet of things” John Wiley
and Sons.
6. Massimo Banzi, Michael Shiloh Make: Getting Started with the Arduino, Shroff Publisher/Maker
Media Publishers.
R22 M.Tech. Embedded Systems JNTUH

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

M.TECH.- I YEAR- II SEMESTER
EMBEDDED SYSTEMS
DESIGN FOR TESTABILITY (PE – III)

Pre-Requisite: Digital System Design

Course Objectives:
1. To acquire the knowledge of fundamental concepts of testing
2. To provide broad understanding the fault simulation.
3. To illustrate the framework of Built-in-self test and Boundary scan methods.

Course Outcomes: Students will be able to

1. Acquire verification knowledge and test evaluation
2. Design for testability rules and techniques.
3. Utilize the scan architectures for different digital circuits.
4. Acquire the knowledge of design of built-in-self test.

UNIT - I
Introduction to Testing: Testing Philosophy, Role of Testing, Digital and Analog VLSI Testing, VLSI
Technology Trends affecting Testing, Types of Testing, Fault Modeling: Defects, Errors and Faults,
Functional Versus Structural Testing, Levels of Fault Models, Single Stuck-at Fault.

UNIT - II
Logic and Fault Simulation: Simulation for Design Verification and Test Evaluation, Modeling Circuits
for Simulation, Algorithms for True-value Simulation, Algorithms for Fault Simulation, ATPG.

UNIT - III
Testability Measures: SCOAP Controllability and Observability, High Level Testability Measures,
Digital DFT and Scan Design: Ad-Hoc DFT Methods, Scan Design, Partial-Scan Design, Variations of
Scan.

UNIT - IV
Built-In Self-Test: The Economic Case for BIST, Random Logic BIST: Definitions, BIST Process,
Pattern Generation, Response Compaction, Built-In Logic Block Observers, Test-Per-Clock, Test-Per-
Scan BIST Systems, Circular Self Test Path System, Memory BIST, Delay Fault BIST.

UNIT - V
Boundary Scan Standard: Motivation, System Configuration with Boundary Scan: TAP Controller and
Port, Boundary Scan Test Instructions, Pin Constraints of the Standard, Boundary Scan Description
Language: BDSL Description Components, Pin Descriptions.

TEXT BOOK:
1. M.L. Bushnell, V. D. Agrawal, “Essential of Electronic Testing for Digital, Memory and Mixed
Signal VLSI Circuits”, Kluwer Academic Publishers.

REFERENCE BOOKS:
1. M. Abramovici, M. A. Breuer and A.D Friedman, Digital Systems and Testable Design”, Jaico
Publishing House.
2. P. K. Lala, “Digital Circuits Testing and Testability”, Academic Press.
R22 M.Tech. Embedded Systems JNTUH

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

M.TECH.- I YEAR- II SEMESTER
EMBEDDED SYSTEMS
SOC DESIGN (PE – III)

Course Objectives:
1. To learn ASIC design concepts and strategies
2. To know the NISC applications and advantages
3. To familiar with simulation and synthesis process

Course Outcomes: At the end of the course, students will be able to:
1. Identify and formulate a given problem in the framework of SoC based design approaches
2. Design SoC based system for engineering applications
3. Realize impact of SoC on electronic design philosophy and Macro-electronics thereby incline
towards entrepreneurship & skill development.

UNIT - I
ASIC: Overview of ASIC types, design strategies, CISC, RISC and NISC approaches for SOC
architectural issues and its impact on SoC design methodologies, Application Specific Instruction
Processor (ASIP)concepts.

UNIT - II
NISC: NISC Control Words methodology, NISC Applications and Advantages, Architecture
Description Languages (ADL) for design and verification of Application Specific Instruction- set
Processors (ASIP), No-Instruction-Set-computer (NISC)- design flow, modeling NISC architectures
and systems, use of Generic Netlist Representation - A formal language for specification, compilation
and synthesis of embedded processors.

UNIT - III
Simulation: Different simulation modes, behavioural, functional, static timing, gate level, switch level,
transistor/circuit simulation, design of verification vectors, Low power FPGA, Reconfigurable systems,
SoC related modeling of data path design and control logic, Minimization of interconnects impact,
clock tree design issues.

UNIT - IV
Low power SoC design / Digital system Design synergy, Low power system perspective- power
gating, clock gating, adaptive voltage scaling (AVS), Static voltage scaling, Dynamic clock frequency
and voltage scaling (DCFS), building block optimization, building block memory, power down
techniques, power consumption verification.

UNIT - V
Synthesis: Role and Concept of graph theory and its relevance to synthesizable constructs, Walks,
trails paths, connectivity, components, mapping/visualization, nodal and admittance graph.
Technology independent and technology dependent approaches for synthesis, optimization
constraints, Synthesis report, analysis Single core and Multi core systems, dark silicon issues, HDL
coding techniques for minimization of power consumption, Fault tolerant designs

TEXT BOOKS:
1. Hubert Kaeslin, “Digital Integrated Circuit Design: From VLSI Architectures to CMOS
Fabrication”, Cambridge University Press, 2008.
2. B. Al Hashimi, “System on chip-Next generation electronics”, The IET, 2006
R22 M.Tech. Embedded Systems JNTUH

REFERENCE BOOKS
1. Rochit Rajsuman, “System-on- a-chip: Design and test”, Advantest America R & D Center, 2000
2. P Mishra and N Dutt, “Processor Description Languages”, Morgan Kaufmann, 2008
3. Michael J. Flynn and Wayne Luk, “Computer System Design: System-on-Chip”. Wiley, 2011
R22 M.Tech. Embedded Systems JNTUH

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

M.TECH.- I YEAR- II SEMESTER
EMBEDDED SYSTEMS
HARDWARE AND SOFTWARE CO-DESIGN (PE – IV)

Course Objectives:
1. To Know the Co-design Issues, prototype and emulation techniques
2. To learn Architecture specific techniques
3. To know the different tool for design
Course Outcomes: Students will be able to:
1. Acquire the knowledge on various models of Co-design.
2. Explore the interrelationship between Hardware and software in a embedded system
3. Acquire the knowledge of firmware development process and tools during Co-design.
4. Implement validation methods and adaptability.

UNIT - I
Co-Design Issues: Co- Design Models, Architectures, Languages, A Generic Co-design Methodology.
Co-Synthesis Algorithms: Hardware software synthesis algorithms: hardware – software partitioning
distributed system co-synthesis.

UNIT - II
Prototyping and Emulation: Prototyping and emulation techniques, prototyping and emulation
environments, future developments in emulation and prototyping architecture specialization techniques,
system communication infrastructure.
Target Architectures: Architecture Specialization techniques, System Communication infrastructure,
Target Architecture and Application System classes, Architecture for control dominated systems (8051-
Architectures for High performance control), Architecture for Data dominated systems (ADSP21060,
TMS320C60), Mixed Systems.

UNIT - III
Compilation Techniques and Tools for Embedded Processor Architectures: Modern embedded
architectures, embedded software development needs, compilation technologies, practical
consideration in a compiler development environment.

UNIT - IV
Design Specification and Verification: Design, co-design, the co-design computational model,
concurrency coordinating concurrent computations, interfacing components, design verification,
implementation verification, verification tools, interface verification.

UNIT - V
Languages for System – Level Specification and Design-I: System – level specification, design
representation for system level synthesis, system level specification languages,
Languages for System – Level Specification and Design-II: Heterogeneous specifications and multi-
language co-simulation, the cosyma system and lycos system.

TEXT BOOKS
1. Hardware / Software Co- Design Principles and Practice – Jorgen Staunstrup, Wayne Wolf –
Springer, 2009.

REFERENCE BOOKS
1. Hardware / Software Co- Design - Giovanni De Micheli, Mariagiovanna Sami, Kluwer Academic
Publishers, 2002.
2. A Practical Introduction to Hardware/Software Co-design -Patrick R. Schaumont, Springer,
2010
R22 M.Tech. Embedded Systems JNTUH

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

M.TECH.- I YEAR- II SEMESTER
EMBEDDED SYSTEMS
SECURE NETWORKS (PE -IV)

Course Objectives:
1. To underlying principles and techniques for network and communication security.
2. To learn practical examples of security problems and principles for countermeasures
3. To provide cryptographic methods, protocols and applications.

Course Outcomes: At the end of the course, students will be able to:
1. Identify and utilize different forms of cryptography techniques.
2. Incorporate authentication and security in the network applications.
3. Distinguish among different types of threats to the system and handle the same.

UNIT -I:
Security: Need, security services, Attacks, OSI Security Architecture, one time passwords, Model for
Network security, Classical Encryption Techniques like substitution ciphers, Transposition ciphers,
Cryptanalysis of Classical Encryption Techniques.

UNIT -II
Number Theory: Introduction, Fermat’s and Euler’s Theorem, The Chinese Remainder Theorem,
Euclidean Algorithm, Extended Euclidean Algorithm, and Modular Arithmetic.

UNIT -III
Private-Key (Symmetric) Cryptography: Block Ciphers, Stream Ciphers, RC4 Stream cipher, Data
Encryption Standard (DES), Advanced Encryption Standard (AES), Triple DES, RC5, IDEA, Linear and
Differential Cryptanalysis.

UNIT -IV
Public-Key (Asymmetric) Cryptography: RSA, Key Distribution and Management, Diffie-Hellman
Key Exchange, Elliptic Curve Cryptography, Message Authentication Code, hash functions, message
digest algorithms: MD4 MD5, Secure Hash algorithm, RIPEMD-160, HMAC.

UNIT -V
Authentication and System Security: IP and Web Security Digital Signatures, Digital Signature
Standards, Authentication Protocols, Kerberos, IP security Architecture, Encapsulating Security
Payload, Key Management, Web Security Considerations, Secure Socket Layer, Secure Electronic
Transaction Intruders, Intrusion Detection, Password Management, Worms, viruses, Trojans, Virus
Countermeasures, Firewalls, Trusted Systems.

TEXT BOOKS:
1. William Stallings, “Cryptography and Network Security, Principles and Practices”, Pearson
Education, 3rd Edition.
2. Charlie Kaufman, Radia Perlman and Mike Speciner, “Network Security, Private
Communication in a Public World”, Prentice Hall, 2nd Edition

REFERENCE BOOKS:
1. Christopher M. King, Ertem Osmanoglu, Curtis Dalton, “Security Architecture, Design
Deployment and Operations”, RSA Press,
2. Stephen Northcutt, Leny Zeltser, Scott Winters, Karen Kent, and Ronald W. Ritchey, “Inside
Network Perimeter Security”, Pearson Education, 2nd Edition
3. Richard Bejtlich, “The Practice of Network Security Monitoring: Understanding Incident
Detection and Response”, William Pollock Publisher, 2013.