Week Eight - Combinational Circuits
Week Eight - Combinational Circuits
A Combinational circuit is a circuit in which we combine the different gates, for example encoder, decoder,
multiplexer and de-multiplexer. Some of the characteristics of combinational circuits are as follows;
The output of combinational circuit at any instant of time, depends only on the levels present at input
terminals.
The combinational circuit do not use any memory. The previous state of input does not have any
effect on the present state of the circuit.
A combinational circuit can have an n number of inputs and m number of outputs.
i. Define and determine the total inputs and total outputs of the circuit.
ii. Make the truth table that defines the relationship between inputs and outputs
iii. Determine Boolean equations using K-Map.
iv. Based on Boolean equation, we can design the circuit.
1. HALF ADDER
The Half-Adder is a basic building block of adding two numbers as two inputs and produce out two outputs.
The adder is used to perform OR operation of two single bit binary numbers. The augent and addent bits
are two input states, and 'carry' and 'sum 'are two output states of the half adder.
Block diagram
Truth Table
1. 'A' and' B' are the input states, and 'sum' and 'carry' are the output states.
2. The carry output is 0 in case where both the inputs are not 1.
3. The least significant bit of the sum is defined by the 'sum' bit.
The Sum Of Product (SOP) form of the sum and carry are as follows:
Sum= A'B+AB'
Carry = AB
In the block diagram, we have seen that it contains two inputs and two outputs. The augent and addent bits
are the input states, and carry and sum are the output states of the half adder. The half adder is designed
with the help of the following two logic gates;
The Sum bit is generated with the help of the Exclusive-OR or Ex-OR Gate.
The above is the symbol of the EX-OR gate. In the above diagram, 'A' and 'B' are the inputs, and the
'SUMOUT' is the final outcome after performing the XOR operation of both numbers.
The truth table of the EX-OR gate is as follows:
From the above table, it is clear that the XOR gate gives the result 1 when both of the inputs are different.
When both of the inputs are the same, the XOR gives the result 0.
The XOR gate is unable to generate the carry bit. For this purpose, we use another gate called AND Gate.
The AND gate gives the correct result of the carry.
The above is the symbol of the AND gate. In the above diagram, 'A' and 'B' are the inputs, and 'OUT' is the
final outcome after performing AND operation of both numbers.
From the above table, it is clear that the AND gate gives the result 1 when both of the inputs are 1. When
both of the inputs are different and 0, the AND gates gives the result 0.
2. FULL ADDER
Full Adder is the adder that adds three inputs and produces two outputs. The first two inputs are A and B and
the third input is an input carry as C-IN. The output carry is designated as C-OUT and the normal output is
designated as S which is SUM. A full adder logic is designed in such a manner that can take eight inputs
together to create a byte-wide adder and cascade the carry bit from one adder to another. We use a full adder
because when a carry-in bit is available, another 1-bit adder must be used since a 1-bit half-adder does not
take a carry-in bit. A 1-bit full adder adds three operands and generates 2-bit results
Block diagram
Truth Table
In the above table,
1. 'A' and' B' are the input variables. These variables represent the two significant bits which are going
to be added
2. 'Cin' is the third input which represents the carry. From the previous lower significant position, the
carry bit is fetched.
3. The 'Sum' and 'Carry' are the output variables that define the output values.
4. The eight rows under the input variable designate all possible combinations of 0 and 1 that can occur
in these variables.
Logical Expression for SUM: USE K-MAP TO SOLVE FOR SUM AND CARRY OUT
= (1,2,4,7)
= A B + B C-IN + A C-IN
= (3,5,6,7)
A Full Adder Logic Circuit
3. HALF SUBTRACTOR
Half Subtractor (HS): Half subtractor is a combination circuit with two inputs and two outputs which is
difference and borrow. It produces the difference between the two binary bits at the input and also
produces an output (Borrow) to indicate if a 1 has been borrowed. In the subtraction (A-B), A is called a
Minuend bit and B is called as Subtrahend bit.
Block diagram
Truth Table
o A' and 'B' are the input variables whose values are going to be subtracted.
o The 'Diff' and 'Borrow' are the variables whose values define the subtraction result, i.e., difference
and borrow.
o The first two rows and the last row, the difference is 1, but the 'Borrow' variable is 0.
o The third row is different from the remaining one. When we subtract the bit 1 from the bit 0, the
borrow bit is produced.
So, the Half Subtractor is designed by combining the 'XOR', 'AND', and 'NOT' gates and provide the Diff
and Borrow.
4. FULL SUBTRACTOR
The Half Subtractor is used to subtract only two numbers. To overcome this problem, a full subtractor was
designed. The full subtractor is used to subtract three 1-bit numbers A, B, and C, which are minuend,
subtrahend, and borrow, respectively. The full subtractor has three input states and two output states i.e., diff
and borrow.
Block diagram
Truth Table
The SOP form can be obtained with the help of K-map as:
For Borrow,
Logical expression for difference –
OR